Compal LA-736 N32NN6, LA-736B N32NN6, LA-736C N32NN6 Schematic

Page 1
COMPAL CONFIDENTIAL
N32NN6 LA736B/C DISCRETE MODEL AMD MOBILE K7 + ALI M1647 & M1535+
VER1.0 (w/ LCL)
LA-736B AND LA-736C DIFFERENCE IN PAGE 41(P.I.R) FOR DETAIL!
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
145Monday, September 10, 2001
of
1F
Page 2
MODEL NAME : N32N AMD K7 M/B LA-736C
REV:1.A
CRT CONN.
page 9
AUDIO
ESS 1988
PAGE 26
EQ
PAGE 28
DOT MATRIX LCD CONN. FDD CONN. TOUCH PAD CONN. INTERNAL K/B CONN.
PIR
PAGE 37
AMP AUDIO JACK
TV OUT
page 10
VGA Board CONN.
page 8
PAGE 23
POWER CIRCUIT
PAGE 30,33,34,35,36
14.3M_VGA
AGP Bus
CARD-BUS CONTROLLER
TI1420 Solt1/2
PAGE 19
POWER
PAGE 20
COREFB +/-
CARDBUSPCMCIA
SLOT
PAGE 20
VID & FID
PROCRDY
CFWDRST
CONNECT
AMD K7(Socket A) CPU
page 3,4
Address OUT[14:2]#
AOCLK# AICLK#
Address IN[14:2]#
SDATAIN CLK[3:0]#
SDATAOUT CLK[3:0]#
COREFB +/-
CPUCLK +/-
SDATA[0..63]#
ALI M1647
PAGE 5,6
PCI BUS
M1535 FOR LA-736B
ALI ALI
M1535+ FOR LA-736C
PAGE 15,16
ISA/PCI BUS PULLUP/DOWN
PAGE 14
USB
PAGE 17PAGE 27
ISA BUS
RESET PS2 CKT
PAGE 29
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
EMBEDDED CONTLR.
NS PC87570
PAGE 24
DC-DC INTERFACE
RTC BATT
PAGE 30
I/O BUFFER
BIOS
PAGE 25
HDD CONN.
PAGE 21
OZ163
PAGE 22
PIO SIO
PAGE 17
VID & FID POWER GOOD
PAGE 31,32
CLOCK GEN.
ICS9248-171
PAGE 7
SODIMM 1
PAGE 12
SODIMM 2
PAGE 13
MINI_PCI SLOT
PAGE 18
CD-ROM CONN.
PAGE 21
VID & FID
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
245Monday, September 10, 2001
of
1F
Page 3
JP6A
SDATA#[0..63]5
DICLK#[0..3]7
DIVAL#5
DOCLK#[0..3]5
AIN#[2..14]5
AICLK#7
CFWDRST5 CONNECT5
PROCRDY5
SDATA#0 SDATA#1 SDATA#2 SDATA#3 SDATA#4 SDATA#5 SDATA#6 SDATA#7 SDATA#8 SDATA#9 SDATA#10 SDATA#11 SDATA#12 SDATA#13 SDATA#14 SDATA#15 SDATA#16 SDATA#17 SDATA#18 SDATA#19 SDATA#20 SDATA#21 SDATA#22 SDATA#23 SDATA#24 SDATA#25 SDATA#26 SDATA#27 SDATA#28 SDATA#29 SDATA#30 SDATA#31 SDATA#32 SDATA#33 SDATA#34 SDATA#35 SDATA#36 SDATA#37 SDATA#38 SDATA#39 SDATA#40 SDATA#41 SDATA#42 SDATA#43 SDATA#44 SDATA#45 SDATA#46 SDATA#47 SDATA#48 SDATA#49 SDATA#50 SDATA#51 SDATA#52 SDATA#53 SDATA#54 SDATA#55 SDATA#56 SDATA#57 SDATA#58 SDATA#59 SDATA#60 SDATA#61 SDATA#62 SDATA#63
DICLK#0 DICLK#1 DICLK#2 DICLK#3
DIVAL# DOCLK#0
DOCLK#1 DOCLK#2 DOCLK#3
DOVAL# AIN#0
AIN#1 AIN#2 AIN#3 AIN#4 AIN#5 AIN#6 AIN#7 AIN#8 AIN#9 AIN#10 AIN#11 AIN#12 AIN#13 AIN#14
CFWDRST CONNECT PROCRDY FILVAL#
AA35
W37 W35
Y35 U35 U33 S37
S33 AA33 AE37 AC33 AC37
Y37 AA37 AC35
S35
Q37
Q35
N37
J33
G33
G37
E37
G35
Q33
N33
L33
N35
L37
J37
A37
E35
E31
E29
A27
A25
E21
C23
C27
A23
A35
C35
C33
C31
A29
C29
E23
C25
E17
E13
E11
C15
A13
C21
A21
E19
C19
C17
A11
A17
A15
W33
J35
E27
E15 AN33 AE35
C37
A33
C11
AL31 AJ29
AL29
AG33
AJ37 AL35
AE33
AJ35
AG37
AL33
AN37
AL37 AG35 AN29 AN35 AN31
AJ33
AJ21
AL23 AN23
AJ31
E9 C9
A9
SDATA0 SDATA1 SDATA2 SDATA3 SDATA4 SDATA5 SDATA6 SDATA7 SDATA8 SDATA9 SDATA10 SDATA11 SDATA12 SDATA13 SDATA14 SDATA15 SDATA16 SDATA17 SDATA18 SDATA19 SDATA20 SDATA21 SDATA22 SDATA23 SDATA24 SDATA25 SDATA26 SDATA27 SDATA28 SDATA29 SDATA30 SDATA31 SDATA32 SDATA33 SDATA34 SDATA35 SDATA36 SDATA37 SDATA38 SDATA39 SDATA40 SDATA41 SDATA42 SDATA43 SDATA44 SDATA45 SDATA46 SDATA47 SDATA48 SDATA49 SDATA50 SDATA51 SDATA52 SDATA53 SDATA54 SDATA55 SDATA56 SDATA57 SDATA58 SDATA59 SDATA60 SDATA61 SDATA62 SDATA63
SDATAINCLK0 SDATAINCLK1 SDATAINCLK2 SDATAINCLK3
SDATAINVAL SDATAOUTCLK0
SDATAOUTCLK1 SDATAOUTCLK2 SDATAOUTCLK3
SDTATOUTVAL SADDIN0
SADDIN1 SADDIN2 SADDIN3 SADDIN4 SADDIN5 SADDIN6 SADDIN7 SADDIN8 SADDIN9 SADDIN10 SADDIN11 SADDIN12 SADDIN13 SADDIN14
SADDINCLK CLKFWDRST
CONNECT PROCRDY SFILLVAL
A20M FERR
INIT
INTR
IGNNE
NMI
RESET
SMI
STPCLK PWROK
PICCLK PICD0/BYPASSCLK PICD1/BYPASSCLK
COREFB-
COREFB+
CLKIN CLKIN
RSTCLK RSTCLK
K7CLKOUT K7CLKOUT
ANALOG
SYSVREFMODE
VREF_SYS
PLLBYPASS PLLBYPASSCLK PLLBYPASSCLK
PLLMON1 PLLMON2
PLLTEST
SCANCLK1 SCANCLK2
SCANINTEVAL
SCANSHIFTEN
DBRDY DBREQ
FLUSH
TCK
TDO TMS
TRST
VID0 VID1 VID2 VID3 VID4
FID0 FID1 FID2 FID3
SCHECK0 SCHECK1 SCHECK2 SCHECK3 SCHECK4 SCHECK5 SCHECK6 SCHECK7
SADDOUT0 SADDOUT1 SADDOUT2 SADDOUT3 SADDOUT4 SADDOUT5 SADDOUT6 SADDOUT7 SADDOUT8
SADDOUT9 SADDOUT10 SADDOUT11 SADDOUT12 SADDOUT13 SADDOUT14
SADDOUTCLK
ZN ZP
TDI
AE1 AG1 AJ3 AL1 AJ1 AN3 AG3 AN5 AC1
AE3
N1 N3 N5
AG13 AG11
AN17 AL17
AN19 AL19
AL21 AN21
AJ13 AA5
W5 AC5
AE5 AJ25
AN15 AL15
AN13 AL13 AC3
S1 S5 S3 Q5
AA1 AA3 AL3
Q1 U1 U5 Q3 U3
L1 L3 L5 L7 J7
W1 W3 Y1 Y3
U37 Y33 L35 E33 E25 A31 C13 A19
J1 J3 C7 A7 E5 A5 E7 C1 C5 C3 G1 E1 A3 G5 G3
E3
PPGA_462
A20M# FERR INIT# INTR IGNNE# NMI CPURST#
SMI#
STPCLK#
APICCLK APICD0
APICD1 COREFB-
COREFB+
CPUCK CPUCK#
CLKOUT CLKOUT#
VREFMODE VREF_SYS
ZN ZP
PLLBP#
PLLMON1 PLLMON2 PLLTEST#
SCANCLK1 SCANCLK2 SINTVAL SSHIFTEN
DBRDY DBREQ# FLUSH#
TCK TDI TDO TMS TRST#
PVID0 PVID1 PVID2 PVID3 PVID4
FID0 FID1 FID2 FID3
AOUT#0 AOUT#1 AOUT#2 AOUT#3 AOUT#4 AOUT#5 AOUT#6 AOUT#7 AOUT#8 AOUT#9 AOUT#10 AOUT#11 AOUT#12 AOUT#13 AOUT#14
AOCLK#
A20M# 15,24 CPUINIT 15
INTR 15 IGNNE# 15 NMI 15 CPURST# 5,15 SMI# 15 STPCLK# 15
PWROKCPU 29
COREFB­COREFB+
+CPU_CORE
R439
100_1%_0402
100_1%_0402
R440 100_1%_0402
R447
R448 100_1%_0402
1
TP1
1
TP2
1
TP3
PVID[0..4] 32
FID[0..3] 31
AOUT#[2..14] 5
THERMDA4
THERMDC4
AOCLK# 5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
10 Miles
2
@MMBT3904
10 Miles
Near socket-A
COREFB+ COREFB-
+CPU_CORE
R423 820_0402
FERR
APICCLK APICD0 APICD1
VREF_SYS is set at 50% of VCC_CORE to CPU
VREF_SYS
R968
1K
R441 1K_0402
.01UF_0402
R414 @10K_0402 R417 0_0402
2
R442 1K_0402
C585
FOR A-TEST RESERVE
JP7
+5VALW
HEADER 5X2
+3V
12
C587
C588 @2200PF_0402
1 2
+3V
@.1UF_0402
R462
1 2
@1K_0402
1
Q52
3
+CPU_CORE
+3VS
R424
4.7K FERR#
Q50
1 3
MMBT2222A
+3VS
R436 @330_0402 R437 @330_0402 R438 @330_0402
DEL BY AMD SUGGESTION
R443 1K_0402
+CPU_CORE
C586
0.1UF
12 34 56 78 910
ATF#
R459
1 2
@10K_0402
U18
1
NC
2
VCC
3
SMBCLK
DXP
4
DXN
5
SMBDATA
NC
6
ADD1
7
GND
8 9
GND NC
@NE1617DS
RESERVE FOR MOBILE K7
R449 100_1%_0402
R450 100_1%_0402
NC
STBY
NC
ALERT
ADD0
@1K_0402
FERR# 15
+CPU_CORE
NMI
Reduce NMI noise for C3
SMD 22..25,36 SMC 22..25,36
ATF# 25
16 15 14 13 12 11 10
12
R463
DBREQ# TCK TMS TDI TRST# PLLTEST# FLUSH# PLLBP#
1 2 3 4 5
SSHIFTEN SINTVAL SCANCLK2 SCANCLK1
RP1
10P8R_680
1 8 2 7 3 6 4 5
A20M# IGNNE#
INIT#
C1189
560PF_0402
VREFMODE=Low=No voltage scaling
ZN ZP
Change Value by tunning
+3V
R460 @4.7K_0402
ATF# 25
12
+3VS
+3V
R464
@10K_0402
1 2
+CPU_CORE R411 510_0402 R412 510_0402 R415 510_0402 R418 510_0402 R420 510_0402 R421 510_0402 R932 820_0402 R933 820_0402
RP2
8P4R-270
10 9 8 7 6
INTRCPURST# NMI SMI# STPCLK#
+CPU_CORE
Near socket-A
CPUCK
C583 680PF_0402
CPUCK#
C584 680PF_0402
+CPU_CORE +CPU_CORE
R451
+CPU_CORE R456 36.5 1% R457 36.5 1%
S
Q53
G
@2N7002
2
@1K_0402
R453
1.5K_0402
Trace lengths of CLKOUT and CLKOUT# are between 2" and 3"
Q51 @2N7002
S
G
2
D
13
VREFMODE
R461 @4.7K_0402
R465 @10K_0402
D
13
PLLMON1 PLLMON2 AIN#1
AOUT#0
AOUT#1
FILVAL#
AIN#0
DOVAL#
+CPU_CORE
R444
60.4 1% R446
301 1%
CLKOUT
CLKOUT#
SMC 22..25,36
SMD 22..25,36
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
+CPU_CORE
R413 56_0402 R416 56_0402 R432 820_0402
R422 @1K_0402
R427 @1K_0402
R429 820_0402
R419 820_0402
R434 820_0402
R445
60.4 1%
R452 100_1%_0402
R454 100_1%_0402
+CPU_CORE
R455 100_1%_0402
R458 100_1%_0402
345Monday, September 10, 2001
CPUCLK 7 CPUCLK# 7
1F
Page 4
+CPU_CORE
+CPU_CORE +CPU_CORE
12
C589
0.22UF
+CPU_CORE
12
C619
0.22UF
12
0.22UF
12
0.22UF
C590
C620
12
C591
0.22UF
12
C621
2.2UF
Located at Socket-A Cap
0.22UF(0603) X 22
0.22UF(0603) X3 FOR RESERVE
0.1UF(0603) X 2
0.01UF(0603) X 8 1UF(0805) X 8 10UF(1206) X 4
AMD recommandation 220UF X10
+CPU_CORE
+
C656 220UF_4V_D
SVID[0..4]32
+CPU_CORE
+
C658 220UF_4V_D
+CPU_CORE
+
C1163 220UF_4V_D
+
C657
220UF_4V_D
+
C1162
220UF_4V_D
+
C1164
220UF_4V_D
SVID0 SVID4
SVID2 SVID3
SVID1
AD30
AD8 AF10 AF28 AF30 AF32
AF6
AF8 AH30
AH8
AJ9
AK8
AL9
AM8
F30
H10
H28
H30
H32
K30 AJ7
AL7
AN7
G25
G17
AG7 AG15 AG29
AA7
AG9 AG17 AG27
G15
G23
AH6
12
0.22UF
12
0.22UF
F8
H6 H8
K8
G9 N7 Y7
G7 Q7
VCC_SRAM1 VCC_SRAM2 VCC_SRAM3 VCC_SRAM4 VCC_SRAM5 VCC_SRAM6 VCC_SRAM7 VCC_SRAM8 VCC_SRAM9 VCC_SRAM11 VCC_SRAM13 VCC_SRAM14 VCC_SRAM16 VCC_SRAM17 VCC_SRAM19 VCC_SRAM20 VCC_SRAM21 VCC_SRAM22 VCC_SRAM23 VCC_SRAM24 VCC_SRAM25 VCC_SRAM26 VCC_SRAM27 VCC_SRAM28 VCC_SRAM29 VCC_SRAM30 VCC_SRAM31
KEY4 KEY6 KEY8 KEY10 KEY12 KEY14 KEY16 KEY18
KEY KEY KEY KEY KEY KEY KEY KEY
AMD
12
C592
0.22UF
12
C622
0.22UF
H12
H16
H20
H24M8P30R8T30V8X30Z8AB30
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_CORE6
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
H14
H18
H22
H26
M30P8R30T8V30X8Z30
C593
C623
VCC_CORE7
VSS7
VCC_CORE8
VCC_CORE9
VSS8
VSS9
VCC_CORE10
VCC_CORE11
VSS10
VSS11
12
C594
0.22UF
AF14
VCC_CORE12
VSS12
AB8
AF12
AF18
VCC_CORE13
VCC_CORE14
VSS13
VSS14
AF16
12
12
C597
0.22UF
AH22
AH18
VCC_CORE29
VSS30
AH32
AH28
AH14
VCC_CORE30
VCC_CORE31
VSS31
VSS32
AH24
AH10
VCC_CORE32
VSS33
AH20
AH4
VCC_CORE33
VSS34
AH16
AH2
VCC_CORE34
VSS35
AH12
12
C598
0.22UF
AF36
AF34
VCC_CORE35
VSS37
AF4
AF2
AD6
VCC_CORE36
VCC_CORE37
VSS38
VSS39
AD36
+CPU_CORE
AM26
AD4
AD2
VCC_CORE38
VCC_CORE39
VCC_CORE40
VSS40
VSS41
VSS42
AD34
AD32
AB6
AF22
VCC_CORE15
VSS15
AF20
AF26
VCC_CORE16
VSS16
AF24
AM34
VCC_CORE17
VSS17
AM36
12
0.22UF
AK36
VCC_CORE18
VSS18
AK32
C596
C595
0.22UF
AK34
AK30
AK26
AK22
AK18
AK14
AK10
AL5
AH26
AM30
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VSS19
VSS20
VSS21
VSS22
VSS23
VSS25
VSS26
VSS27
VSS28
VSS29
AK28
AK24
AK20
AK16
AK12
AK4
AK2
AH36
AM32
AH34
12
C599
0.22UF
12
C632
.1UF_0402
AB36
AB34
AB32Z6Z4Z2X36
VCC_CORE41
VCC_CORE42
VCC_CORE43
VSS43
VSS44
VSS45
AB4
AB2
Z36
+CPU_CORE
VCC_CORE44
VCC_CORE45
VCC_CORE46
VSS46
VSS47
VSS48
Z34
Z32X6AM28X4X2
12
C600
0.22UF
12
C633
.1UF_0402
X34
AM22
VCC_CORE47
VCC_CORE48
VCC_CORE49
VSS49
VSS50
VSS51
12
0.22UF
X32V6V4V2T36
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VSS52
VSS53
VSS54
VSS55
V36
V34
V32T6T4T2R36
C601
T34
VCC_CORE54
VSS56
T32R6R4R2AM18
VCC_CORE55
VCC_CORE56
VCC_CORE57
VSS57
VSS58
VSS59
R34
AM24
12
C602
0.22UF
VCC_CORE58
VCC_CORE59
VCC_CORE60
VSS60
VSS61
VSS62
R32P6P4P2M36
P36
VCC_CORE61
VSS63
P34
P32M4M6M2K36
VCC_CORE62
VCC_CORE63
VCC_CORE64
VSS64
VSS65
VSS66
M34
12
C603
0.22UF
K34
VCC_CORE65
VCC_CORE66
VCC_CORE67
VSS67
VSS68
VSS69
M32K6K4K2AM20
12
0.22UF
+CPU_CORE
12
K32H4H2
VCC_CORE68
VCC_CORE69
VCC_CORE70
VSS70
VSS71
VSS72
H36
H34
C604
C634 10UF_10V_1206
AM14
F36
F34
F32
F28
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VSS73
VSS74
VSS75
VSS76
VSS77
F26
F22
F18
F14
F10F6F4F2AM16
12
0.22UF
F24
VCC_CORE76
VCC_CORE77
VSS78
VSS79
C605
F20
VCC_CORE78
VSS80
F16
VCC_CORE79
VSS81
12
F12
12
C606
0.22UF
C635 10UF_10V_1206
D32
D28
AM10
D24
D20
VCC_CORE80
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VSS82
VSS83
VSS84
VSS85
VSS86
D36
D34
D30
D26
D22
D16
D12D8D4D2B36
VCC_CORE85
VCC_CORE86
VCC_CORE87
VSS87
VSS88
VSS89
D18
D14
12
C607
0.22UF
0.22UF
12
C636 10UF_10V_1206
VCC_CORE88
VCC_CORE89
VCC_CORE90
VSS90
VSS91
VSS92
D10D6B34
AM12
B32
VCC_CORE91
VCC_CORE92
VSS93
VSS94
B30
AM2
VCC_CORE93
VSS95
B26
12
B28
VCC_CORE94
VSS96
B22
C608
B24
VCC_CORE95
VSS97
B18
B20
B14
12
C609 1000PF_0402
12
C637 10UF_10V_1206
B16
B12B8B4
VCC_CORE96
VCC_CORE97
VCC_CORE98
VSS98
VSS99
VSS100
B10B6B2
.1UF_0402
AJ5
VCC_CORE99
VCC_CORE100
VSS101
VSS102
AM4
AK6
12
C610
VCC_CORE101
BP0_CUT BP1_CUT BP2_CUT BP3_CUT
VSS103
VSS104
AM6
12
+VCCA2.5
AC7
AJ23
VCC_Z
VCC_A
NC1 NC2 NC3 NC6 NC7 NC8
NC9 NC10 NC11 NC12 NC13 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC42 NC43 NC44 NC45
VSS_Z
AE7
12
C611 .01UF_0402
JP6B PPGA_462
AA31 AC31 AE31 AG23 AG25 AG31 AG5 AJ11 AJ15 AJ17 AJ19 AJ27 AL11 AN11 AN9 G11 G13 G27 G29 G31 J31 J5 L31 N31 Q31 S31 S7 U31 U7 W31 W7 Y31 Y5 AG19 G21 AG21 G19
AN27 AL27 AN25 AL25
12
C612
C613 .1UF_0402
1000PF_0402
+CPU_CORE
C638
1UF_10V_0603
+CPU_CORE
C642
1UF_10V_0603
+CPU_CORE
12
C646
39PF_0402
+CPU_CORE
12
C651
560PF_0402
THERMDA
THERMDC
9/04/2000 CHANGE BACK
+CPU_CORE
12
12
C615
C614
1000PF_0402
.01UF_0402
C639
1UF_10V_0603
C643
1UF_10V_0603
12
12
C648
C647 39PF_0402
39PF_0402
12
12
C652
C653
560PF_0402
560PF_0402
THERMDA 3 THERMDC 3
ONE INCH SPACING ALONG THE PLANE EDGE
12
C616
.01UF_0402
C640
1UF_10V_0603
C644
1UF_10V_0603
12
C649 39PF_0402
12
C654 560PF_0402
560PF_0402
12
12
C617 1000PF_0402
.01UF_0402
C641
1UF_10V_0603
C645
1UF_10V_0603
12
C650
39PF_0402
12
C655
C618
AMD Socket-A processors will not implement a pin at location AH6.
+CPU_CORE
+
C668 220UF_4V_D
12
+
C669 220UF_4V_D
12
+
C670 220UF_4V_D
12
+
C671 220UF_4V_D
CONTROL ON/OFF
+3VS
R466 0-0402
C672 39PF_0402
C673
1UF_10V_0603
VR_ON25,35
(2.5V Output)
U19 SI9183BT-25
1
VIN
3
SD#
VSS
2
2.5V,if 1GHz need 100mA
+VCCA2.5
5
VOUT
BP
C674
.1UF_0402
4
12
C665
C664
.01UF_0402
4.7UF_10V_0805
C666
39PF_0402
Near socket-A pin AJ23
R467 0
C667 39PF_0402
+VCCP2.5
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
VCCA for cpu internal PLL power source!
12
C659
1000PF_0402
12
12
C660
1000PF_0402
1000PF_0402
FOR EMI RESERVE
C661
12
12
C662
1000PF_0402
1000PF_0402
445Monday, September 10, 2001
C663
1F
Page 5
PFRAME# PIRDY# PTRDY# PSTOP#
PDEVSEL# SERR# PLOCK# PCIREQ#
SERR#
REQ#_0 REQ#_1 REQ#_2 REQ#_3
GNT#_0 GNT#_1 GNT#_2 GNT#_3
GNT#_4 GNT#_5 REQ#_4 REQ#_5
Near M1647
+3VS
+3VS
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
SUS_STAT#8,15,16
C/BE#0
C/BE#1
C/BE#2
C/BE#3
R468
11K 1%
R469
5.9K 1%
R470 120 CPUCLK_NB
R473
120
AGP_BUSY#8,15
AGP_STP#8,15
RP3
8P4R-2.7K RP4
8P4R-2.7K R959 560
RP5
8P4R-2.7K
RP6
8P4R-2.7K RP7
8P4R-2.7K
R949
1 2
2.2K-0402 R950
1 2
2.2K-0402 R952
1 2
2.2K-0402 R954
1 2
2.2K-0402
C675 .047UF
R474
@10
C677
+3VS
+3VS
+3VS
+3VS
+3VS
DCLK_NB7
CPUCLK_NBVR
C676
0.1uF
@10PF
PCLK_NB7 PCIRST#10,14,15,18..21,26
FRAME#15,18,19,26
IRDY#15,18,19,26
TRDY#15,18,19,26
STOP#15,18,19,26
DEVSEL#15,18,19,26
SERR#15,18,19
PHLD#14,15 PHLDA#14,15 PCIREQ#8
AD[0..31]15,18,19,26,31
R1024 0-0402
1 2
Under M1647 (Solder side)
CPURST#3,15
PAR15,18,19,26
REQ#018 REQ#118 REQ#226 REQ#319
R476
1 2
GNT#018 GNT#118 GNT#226 GNT#319
R477
1 2
SUSPEND#
ST0
ST1
SDATA#[0..63]3 DOCLK#[0..3]3
@0
@0
C/BE#015,18,19,26 C/BE#115,18,19,26 C/BE#215,18,19,26 C/BE#315,18,19,26
AD0 AD1AD1 AD2AD2AD2 AD3 AD4AD4 AD5AD5AD5 AD6AD6AD6AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
R478
10K
TP5
+3VALW
1
C1204 @?PF
ADD FOR SUSPEND ISSUE
R951
1 2
2.2K-0402 R953
1 2
2.2K-0402
DICLK_NB#[0..3]7 AOUT#[2..14]3
AOCLK#3
AIN#[2..14]3
AICLK_NB#7
DIVAL#3 PROCRDY3 CONNECT3 CFWDRST3
R984 @0_0402
CPUCLK_NB7
PAR SERR# PLOCK# PHLD# PHLDA#
GNT#_0
PDEVSEL#
PCIREQ# REQ#_0 REQ#_1 REQ#_2 REQ#_3 REQ#_4 REQ#_5
GNT#_1 GNT#_2 GNT#_3 GNT#_4 GNT#_5
TESTMODE TESTEN1
R479
R491 10K
R471
@0
ACNBP
C678
@10PF
PFRAME# PIRDY# PTRDY# PSTOP#
10K
Near M1647
ACNBS
RTCCLK8,16,20
CPUCLK_NBVR
Near M1647
F9
PCICLK
G6
PCIRST#
D6
FRAME#
A5
IRDY#
B5
TRDY#
A4
STOP#
C5
DEVSEL#
A3
PAR
C4
SERR#/CLKRUN#
B4
LOCK#
E5
PHLD#
F5
PHLDA#
F6
AREQ#
D10
PREQ0#
B10
PREQ1#
E11
PREQ2#
C11
PREQ3#
A11
PREQ4#
B12
PREQ5#
C10
PGNT0#
A10
PGNT1#
D11
PGNT2#
B11
PGNT3#
C12
PGNT4#
A12
PGNT5#
D3
CBE0#
C3
CBE1#
B6
CBE2#
C8
CBE3#
F1
AD0
F4
AD1
F2
AD2
F3
AD3
E2
AD4
E1
AD5
E3
AD6
D1
AD7
D2
AD8
C1
AD9
C2
AD10
B1
AD11
D4
AD12
B2
AD13
A2
AD14
B3
AD15
D7
AD16
A6
AD17
C7
AD18
B7
AD19
F8
AD20
A7
AD21
E8
AD22
D8
AD23
B8
AD24
A8
AD25
D9
AD26
E9
AD27
C9
AD28
B9
AD29
F10
AD30
A9
AD31
E6
NC
AE2
TESTMODE
AF2
NT_TESTEN
R485 @0
C680 @10PF
AD11
AD5
V21
U21
HCLK
DCLK
W21
Y21
DCLK_NBJ
R505
1 2
10K-0402 R511
1 2
2.2K-0402
AD[5..31] M1647 HARDWARE STRAPPING
AICLK#
AIN#4
AIN#2
AIN#7
AIN#3
AIN#8
AIN#5
AIN#6
W26
C13
A13
E12
C14
A14
B17
A17
B16
A18
E13
E15
D13
SAIN2#
SAIN3#
SAIN4#
SAIN5#
SAIN6#
SAIN7#
SAICLK#
CLKFRST
CPURST#
SDINVAL#
CONNECT
PROCRDY
VREF_HCLK
?
PCI Interface
SUSPEND#
CLK32KI
MWE#
SRAS#
SCAS#
DCLK#
CS0#
CS1#
CS2#
CS3#
CS4#
AC20
AA9
RAS#0
AB9
RAS#1
AB8
RAS#2
AC8
RAS#3
**
AD12
AD13
AD14
AD15
AB7
CS5#
AA8
Y23
CCKE0
1 2
1 2
1 2
1 2
AB5
AC5
AB10
AA10
R490
10K
R492
10K
+3VS
AIN#9
AIN#10
AIN#11
C15
A16
C17
SAIN8#
SAIN9#
SAIN10#
CKE0
CKE1
CKE2
Y26
AB22
Y25
CCKE1
CCKE3
CCKE2
R493
@2.2K-0402 R499
2.2K-0402 R506
2.2K-0402 R512
2.2K-0402
AIN#12
AIN#13
B14
SAIN11#
SAIN12#
CKE3
CKE4
AB21
AIN#14
B15
SAIN13#
CKE5
Y24
A15
SAIN14#
AA11
MMA0
AOCLK#
U25
SAOCLK#
MA0
MA1
AB11
MMA1
AB12
MMA2
AOUT#2
R25
MA2
AB15
MMA3
AOUT#3
AOUT#4
R26
N22
SAOUT2#
SAOUT3#
MA3
MA4
AC14
AB14
MMA4
MMA5
AOUT#5
AOUT#6
T26
R24
SAOUT4#
SAOUT5#
MA5
MA6
AC17
AA16
MMA6
MMA7
AD17
AD18
AD19
AOUT#8
AOUT#7
V26
T25
SAOUT6#
SAOUT7#
MA7
MA8
AB16
AA18
MMA9
MMA8
AOUT#9
AOUT#11
AOUT#10
T24
P25
P26
SAOUT8#
SAOUT9#
SAOUT10#
MA9
MA10
MA11
AA17
AA19
AB19
MMA11
MMA10
MMA12
R494
1 2
10K-0402 R500
1 2
10K-0402 R507
1 2
2.2K-0402 R513
1 2
2.2K-0402
AOUT#12
AOUT#13
U26
V25
SAOUT11#
SAOUT12#
SAOUT13#
MA12
BA0
BA1
AB17
AB18
MMA14
MMA13
DOCLK#3
DOCLK#0
DOCLK#1
DICLK_NB#1
DICLK_NB#2
DICLK_NB#0
AOUT#14
V24
SAOUT14#
C20
D22
SDICLK0#
SDICLK1#
DICLK_NB#3
F24
L25
SDICLK2#
SDICLK3#
DOCLK#2
D16
D24
SDOCLK0#
SDOCLK1#
G23
N25
SDOCLK2#
SDOCLK3#
SDATA#0
SDATA#1
A20
F18
SDATA0#
SDATA#2
SDATA#3
A21
B20
SDATA1#
SDATA2#
SDATA#5
SDATA#4
B21
A22
SDATA3#
SDATA4#
SDATA#7
SDATA#6
B22
C23
SDATA5#
SDATA6#
SDATA#9
SDATA#8
F17
B18
SDATA7#
SDATA8#
SDATA#10
E16
SDATA9#
CPU Interface
M1647-SDR
Northbridge
SDR SDRAM Interface
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
AD3
MMD0
AF3
MMD1
+3VS
+3VS
AF4
MMD2
AE5
MMD3
MMD4
AC6
AF6
AE7
AE8
AC9
AF9
AE10
AD11
MMD6
MMD7
MMD9
MMD5
MMD8
MMD11
MMD10
AD20AD16
1 2
AD21
1 2
AD22
1 2
AD23
1 2
AC12
AF12
MMD12
MMD14
MMD13
R495
@2.2K-0402 R501
@2.2K-0402 R508
@2.2K-0402 R514
@2.2K-0402
AE13
AD14
MMD15
AF17
MMD16
AF18
MMD17
AE19
MMD18
MD19
AD20
MMD20
MMD19
AF20
SDATA#19
SDATA#22
SDATA#20
SDATA#12
SDATA#13
SDATA#14
SDATA#11
SDATA#17
SDATA#15
SDATA#18
SDATA#21
SDATA#16
C18
D17
B19
A19
D18
A23
B23
A24
A25
B26
C26
D26
SDATA10#
SDATA11#
SDATA12#
SDATA13#
SDATA14#
SDATA15#
SDATA16#
SDATA17#
SDATA18#
SDATA19#
SDATA20#
SDATA21#
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
AE21
AE22
AC23
MMD21
MMD23
MMD22
Modify by 4/10 Tunning Time
MD31
AF23
AE24
AF25
AE26
AC24
AC26
AB26
AA25
AE3
MMD32
MMD27
MMD26
MMD25
MMD28
MMD29
MMD24
MMD31
MMD30
R496
AD24
1 2
2.2K-0402 R502
AD25
1 2
2.2K-0402 R509
AD26
1 2
@2.2K-0402
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
SDATA#23
SDATA#24
C25
D19
SDATA22#
SDATA23#
SDATA24#
MD32
MD33
MD34
AD4
AD5
MMD34
MMD33
SDATA#25
SDATA#26
SDATA#27
E19
D20
SDATA25#
SDATA26#
MD35
MD36
AF5
AE6
MMD37
MMD36
MMD35
SDATA#29
SDATA#28
F19
E20
SDATA27#
SDATA28#
MD37
MD38
AD7
AD8
MMD39
MMD38
SDATA#31
SDATA#30
F20
E23
SDATA29#
SDATA30#
MD39
MD40
AF8
AE9
MMD40
MMD41
SDATA#32
SDATA#33
E22
F23
F22
SDATA31#
SDATA32#
MD41
MD42
AD10
AF10
AF11
MMD42
MMD43
AD27
AD28
AD29
SDATA#34
SDATA#35
G21
H22
SDATA33#
SDATA34#
SDATA35#
MD43
MD44
MD45
AE12
AD13
MMD45
MMD44
1 2
1 2
1 2
SDATA#38
SDATA#37
SDATA#36
J22
H21
G24
SDATA36#
SDATA37#
SDATA38#
MD46
MD47
MD48
AF13
AE14
AE18
MMD46
MMD47
MMD48
R497
@2.2K-0402 R503
@2.2K-0402 R510
@2.2K-0402
SDATA#40
SDATA#39
SDATA#41
J26
D25
E26
SDATA39#
SDATA40#
MD49
MD50
AD19
AF19
AE20
MMD51
MMD49
MMD50
SDATA#43
SDATA#42
SDATA#44
E25
F26
SDATA41#
SDATA42#
SDATA43#
MD51
MD52
MD53
AC21
AD22
MMD52
MMD54
MMD53
SDATA#45
SDATA#46
G26
G25
J21
SDATA44#
SDATA45#
MD54
MD55
AF22
AE23
AD23
MMD55
MMD56
SDATA#48
SDATA#47
H26
J23
SDATA46#
SDATA47#
SDATA48#
MD56
MD57
MD58
AF24
AE25
MMD57
MMD58
AD20
AD21
AD22
M1647 North Bridge (1/2)
SDATA#49
SDATA#50
SDATA#51
M25
K21
K23
SDATA49#
SDATA50#
MD59
MD60
AD26
AC25
AB24
MMD61
MMD59
MMD60
1 2
1 2
1 2
SDATA#52
SDATA#53
L23
M24
SDATA51#
SDATA52#
SDATA53#
MD61
MD62
MD63
AA23
AA26
MMD63
MMD62
R985
10K-0402 R987
10K-0402 R990
10K-0402
SDATA#54
M23
SDATA#57
SDATA#55
SDATA#56
M22
H25
SDATA54#
SDATA55#
SDATA56#
DQM0
DQM1
AC15
AF15
CAS#0
CAS#1
CAS#2
SDATA#58
SDATA#59
J25
J24
SDATA57#
SDATA58#
DQM2
DQM3
AE16
AD17
CAS#4
CAS#3
+3VS
+3VS
+3VS
SDATA#60
K26
K24
SDATA59#
SDATA60#
DQM4
DQM5
AE15
AD16
CAS#5
SDATA#63
SDATA#61
SDATA#62
C21
E17
B24
D21
H23
F25
N26
SCHECK0#
SCHECK1#
SCHECK2#
SCHECK3#
SCHECK4#
SCHECK5#
AGPDEVSEL#
K25
SCHECK6#
AGPFRAME#
AGPIRDY#
AGPTRDY# AGPSTOP#
TYPEDET#
AD_STB0# AD_STB1#
L22
L26
SDATA61#
SDATA62#
M26
SDATA63#
AGP Interface
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS0
AB25
DQS1
AD25
DQS2
AF21
AC18
AF14
DQS4
DQS3
R986
1 2
10K-0402 R988
1 2
10K-0402 R991
1 2
10K-0402
DQS7
AE11
AF7
AE4
DQS5
DQS6
DQS7
CAS#[0..7] 11 MMD[0..63] 11 MMA[0..14] 11
RAS#[0..3] 11 RRMWEA# 11 SCAS#0 11 SRAS#0 11
AF16
CAS#6
DQM6
CAS#7
DQM7
AE17
AD23
AD26
AD27
H6
SCHECK7#
GCLK
U1 V3 V2 V1 W2 H3
GREQ#
G1
GGNT#
Y3
GSERR#
W1
AGPPAR
J2
PIPE#
G2 K2
WBF#
J1
RBF#
H1
ST0
H2
ST1
J3
ST2
U5
GCBE0#
Y2
GCBE1#
U2
GCBE2#
M5
GCBE3#
AB1
AD_STB0
AB2 R3
AD_STB1
P1
GAD0
W6
GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8
GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
SB_STB
SB_STB#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
U20A
+3VS
AE1 V4 AD1 V5 AD2 V6 AC1 AA1 U6 AA2 T4 AA3 T5 Y1 R5 R4 U3 P5 T1 N4 T2 N5 R1 L4 P2 L5 P3 K4 N1 K5 N2
L1 L2
K1 H4 L3 J6 M3 J5 M1 J4
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CCKE0 CCKE1 CCKE2 CCKE3
GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GSBA0 GSBA1 GSBA2 GSBA3 GSBA4 GSBA5 GSBA6 GSBA7
RP70 8P4R-10K
RP71 8P4R-10K
Strapping Pin Set: 7C
+3VS
AD28
1 2
+3VS
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
Near M1647
R472
33
ACNBG
C679
10PF
Modify by 4/10 Tunning Time
1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5
CKE0 12 CKE1 12 CKE2 13 CKE3 13
+3VS
R989
10K-0402
LA-736B : R472 USE 0 Ohm
AGPCLK_NB 7 GFRAME# 8
GIRDY# 8 GTRDY# 8 GDEVSEL# 8 GSTOP# 8 GREQ# 8 GGNT# 8 GSERR# 8 GPAR 8 PIPE# 8
2X AGP
WBF# 8
4X AGP NEED PULL LOW
RBF# 8
ST0 8 ST1 8 ST2 8
GC/BE#0 8 GC/BE#1 8 GC/BE#2 8 GC/BE#3 8
AD_STBA 8 AD_STBA# 8
AD_STBB 8
AD_STBB# 8
GAD[0..31] 8
R998
AD6
1 2
10K-0402 R999
AD7
1 2
10K-0402
R1000
AD8
1 2
10K-0402 R1001
AD9
1 2
10K-0402
R1002
AD10
1 2
AD6~10,12,24,25,29~31 strapping for C3
GSBA[0..7] 8
10K-0402
SBSTB 8 SBSTB# 8
R1003
AD12
1 2
10K-0402 R1004
AD24
1 2
@10K-0402
R1005
AD25
1 2
@10K-0402
R1006
AD29
1 2
10K-0402
R1007
AD30
1 2
10K-0402
R1008
AD31
1 2
@10K-0402 R1026
AD30
1 2
@2.2K-0402 R1025
AD31
1 2
2.2K-0402
RESERVE BY 2/19
545Monday, September 10, 2001
of
+VDDQ
R475 10K
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
1F
Page 6
M1647 North Bridge (2/2)
+VDDQ
VREF_GC8
R515
+VCC_2.5
R517
Near M1647
+CPU_CORE
Near M1647
Modify By 6/5/2001
4.7
4.7
R520
4.7_0805
C715
1000PF
C681
1000PF
C690
1000PF
VDDPM_CPU1
C716
0.1UF
+VDDQ
AGP 2X
+CPU_CORE
C742
0.1UF
150_1%
+VCC_2.5
VDDPM_AGP1
C682
0.1UF
VDDPM_AGP2
C691
0.1UF
+VCC_2.5
R521
4.7_0805 VDDPM_CPU2
C717
C718
1000PF
0.1UF
LA-736B :R522 USED 270_1% ;
R23 USED 180_1%
AGP 2X,R522,R523 USE 270 1%,180 1%
R522
AGP 4X,R522,R523 USE 100 1%,100
1.5K_1%
1%
R523
C730
C731
1000PF
1K_1%
0.1UF
Near M1647
10 MILES
R526100_1%
R527
C743
1000PF
C744
C732
0.1UF
Near M1647
R516
4.7_0805
R518
CHB2012B800_0805
R519
4.7
Near M1647
R936 @0
Close the Node
1000P
VREF_CPU
C683
1000PF
C692
1000PF
C694
1000PF
C684
0.1UF
C693
0.1UF
+CPU_CORE
C695
0.1UF
+VCC_2.5
+VDDQ
+3V
+3V
+3V
+5V
+VDDQ
R524 150 1%_0805
Change Value by tunning
+CPU_CORE
R525 120 1%_0805
Change Value by tunning
R528 10K-0402 R529 10K-0402 R530 10K-0402
AVDD_MEM
AVDD_CPU
AVDD_AGP
VCC_CORENB
VCC2_5NB
VCC_AGPNB
3V_DRAMNB
3V_PCINB
3V_DRAMNB
VCC_DRAMNB
SENSE_AGP VDDPM_AGP1 VDDPM_AGP2
VREF_AGP
SENSE_CPU VDDPM_CPU1 VDDPM_CPU2
VREF_MEM1 VREF_MEM2 VREF_MEM3
AC10 AC11 AC13 AC16 AC19 AB20 AC22 AB23
AB13 AA20 AA21
W22 W23
T22 T23
D12 D15 E18 E21 D23 B25 G22 K22 N23 N24 T21
K10 K11 K16 K17 L10 L17 T10 T17 U10 U11 U16 U17
AB4
AC3
AC7
E10
L21 F16
F11
AA4 AA5 AA6
U23 U22 V23 V22
P23 D14 F21 P22 E14
AA7
AB6
H5
G4
M4
P4
U4 W4 W5
E4
D5
E7
L6
T6
F7
Y6
Y5
K6
Y4
AVDD_MEM VDDPL_MEM
AVDD_CPU
M1647-SDR
VDDPL_CPU
AVDD_AGP
Power
VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K VDDIO_S2K
VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE VDD_CORE
VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP VDDIO_AGP
VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM VDDIO_MEM
VDDIO_PCI VDDIO_PCI VDDIO_PCI VDDIO_PCI VDDPD_S2K VDDPD_S2K VDDPD_AGP VDDPD_AGP
VDD5V VDD5V
SENSE_AGP VDDPM1_AGP VDDPM2_AGP GNDPM
VREF_AGP VREF_AGP SHLD_AGP
SENSE_CPU VDDPM1_CPU VDDPM2_CPU GNDPM
VREF_CPU VREF_CPU VREF_CPU SHLD_CPU SHLD_CPU
VREF_MEM VREF_MEM VREF_MEM SHLD_MEM SHLD_MEM
GNDPL GNDPL
AGND AGND AGND
AA22 R23
R22 Y22 G5
B13
GND
C16
GND
C19
GND
C22
GND
C24
GND
A26
GND
E24
GND
H24
GND
L24
GND
P24
GND
U24
GND
W24
GND
W25
GND
AC4
GND
AD6
GND
AD9
GND
AD12
GND
AD15
GND
AD18
GND
AD21
GND
AA24
GND
AD24
GND
AF26
GND
G3
GND
K3
GND
M2
GND
N3
GND
R2
GND
T3
GND
W3
GND
AB3
GND
AC2
GND
AF1
GND
A1
GND
C6
GND
L12
G/T
L13
G/T
L14
G/T
L15
G/T
L16
G/T
M11
G/T
M12
G/T
M13
G/T
M14
G/T
M15
G/T
M16
G/T
N11
G/T
N12
G/T
N13
G/T
N14
G/T
N15
G/T
N16
G/T
P16
G/T
P15
G/T
P14
G/T
P13
G/T
P12
G/T
P11
G/T
T16
G/T
T15
G/T
T14
G/T
T13
G/T
T12
G/T
T11
G/T
R16
G/T
R15
G/T
R14
G/T
R13
G/T
R12
G/T
R11
G/T
L11
G/T
K12
G/T
K13
G/T
K14
G/T
K15
G/T
U12
G/T
U13
G/T
U14
G/T
U15
G/T
M10
G/T
M17
G/T
N10
G/T
N17
G/T
P10
G/T
P17
G/T
R10
G/T
R17
G/T
3V_PCINB
12
+
C685
22UF_10V_1206
3V_DRAMNB
12
+
C696
47UF_6.3V_B
VCC2_5NB
12
+
C1165
22UF_10V_1206
VCC_CORENB
12
+
C719
22UF_10V_1206
VCC_CORENB
C727
0.1UF
VCC_AGPNB
12
+
C733
47UF_6.3V_B
VCC_AGPNB
C745
0.1UF
C686 1000PF
C687
0.1UF
C688 1000PF
C689
0.1UF
PLACE NEAR M1647
C697
0.1UF
C698 1000PF
C699
0.1UF
PLACE NEAR M1647
C707
0.1UF
C708 1000PF
C709
0.1UF
C710 1000PF
PLACE NEAR M1647
C721
0.1UF
C722 1000PF
0.1UF
C720 1000PF
C723
PLACE UNDER M1647 SOLDER SIDE
C728 1000PF
PLACE NEAR M1647
C734
0.1UF
C735 1000PF
C736
0.1UF
PLACE ON M1647 SOLDER SIDE
C746 1000PF
C747
0.1UF
C748 1000PF
C700 1000PF
C737 1000PF
C701
0.1UF
C711
0.1UF
C724 1000PF
VCC_DRAMNB
C729
0.1UF
C738
0.1UF
C749 1000PF
C712 1000PF
C725
0.1UF
C703
C702
0.1UF
1000PF
VCC2_5NB
C713
0.1UF
PLACE ON M1647 SOLDER SIDE
C726 1000PF
C740
C739
0.1UF
1000PF
C704 1000PF
C714 1000PF
C741 1000PF
C705
0.1UF
C706 1000PF
NOTE : R524,R525 Value depend on PCB impedance X 3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
126
A
M1647 NORTHBRIDGE 35x35mm 528 BALLS
AF
TOPSIDE VIEW
U20B
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
645Monday, September 10, 2001
1F
Page 7
PLACE NEAR CLOCK GENERATOR
+3VS
L1
1 2
CHB3216U121_1206
VDD3_3
C750
22UF_10V_1206
C751 .1UF
FOR S1 FUNCTION
PCI_STP#16
+3VS
Place close to CLK gen
RCPUCLK
RCPUCLK#
RCPUCLK_NB
C760 @22PF
C761 @22PF
C762 @22PF
16,24
C1170 .01UF
C752 .1UF
CPU_STP#
R935 10K
+3VS
C1171 .01UF
R551 0 R552 0 R553 @0 R554 @0
C753 .1UF
C1172 .01UF
D12
21
RB751V
R934 10K
C754 .1UF
+3VS
1 8
C1173 .01UF
2 7
3 6
SCK_CLK12 SDA_CLK12
4 5
C755 .1UF
RP8
8P4R-10K
C1174 .01UF
RP9
1 8 2 7 3 6 4 5
8P4R-10K
Place close to CLK gen and series terminator
Note : S0 ~ S1 & CPU ON C0~C3,THE CPU CLOCK CAN'T STOPPED
C756 .1UF
C1175 .01UF
FS3 FS2 FS1 FS0
Clock Generator
U21
6
VDD
8
C757 .1UF
MODE
R550 10K
VDD
17
VDD
21
VDD
28
VDD
35
VDD
40 39
VDD SDRAM2
1
DG_STOP#
3
GND
11
GND
16
GND
23
GND
29
GND
34
GND
41
GND
48
GND
25
SDRAM12
26
SDRAM11
27
SDRAM10/PCI_STOP#
18
MODE/PCICLK3
24
SCLK
44
SDATA
4 5
X1 X2
Y1
C758 10PF
1 2
XTAL-14.318MHZ
CLOCK FREQUENCY TABLE
FS3 FS2 FS1 FS0 CPU SDRAM PCICLK AGP SPREAD 0 0 1 1 100.00 100.00 33.33 66.66
0 1 0 0 100.00 133.33 33.33 66.66 1 0 1 1 100.00 100.00 33.33 66.66 1 1 0 0 100.00 133.33 33.33 66.66
CPUCLKT0
CPUCKLC0
CPUCLKT1
SDRAM0 SDRAM1
SDRAM3 SDRAM4 SDRAM5 SDRAM6 SDRAM7 SDRAM8 SDRAM9
FS1/AGP0
FS2/PCICLK_F
PCICLK0 PCICLK1 PCICLK2 PCICLK4 PCICLK5
FS3/48MHZ
FS0/REF0
ICS9248AF-171
Place close to CLK gen
RCPUCLK
47
RCPUCLK#
46
RCPUCLK_NB
45
RDCLK_NB
43
RDCLK0
42
RDCLK1 RDCLK2
38
RDCLK3 CLK_SDRAM3
37 36 33 32 31 30
FS1
9
RAGPCLK
10
AGP1
PD#
FS2
12 13
RPCLK_PCM
14
RPCLK_MINI
15
RPCLK_AUD PCLK_AUD
19 20
FS3
22 7 2
XOUTXIN
C759 10PF
R531 10 R532 10 R533 0
R534 22 R535 22 R536 22 R537 22 R538 22
Change Kenny 5/31/2001
R539 22 R540 22
R541 33 R542 22 R543 22 R544 33 R545 22
R546 22 R547 22
R548
1 2
22
R549
1 2
0-0402
0 ~ 0.5% DOWN SPREAD 0 ~ 0.5% DOWN SPREAD
VR_POK 29,32
+/- 0.25 % +/- 0.25 %
CPUCLK CPUCLK# CPUCLK_NB
DCLK_NB CLK_SDRAM0 CLK_SDRAM1 CLK_SDRAM2
AGPCLK_NB GCLK_O
PCLK_NB PCLK_1535 PCLK_PCM PCLK_MINI
48M 14MOSCFS0
14MTV
CPUCLK 3 CPUCLK# 3 CPUCLK_NB 5
DCLK_NB 5 CLK_SDRAM0 12 CLK_SDRAM1 12 CLK_SDRAM2 13 CLK_SDRAM3 13
AGPCLK_NB 5
GCLK_O 8
PCLK_NB 5 PCLK_1535 15 PCLK_PCM 19 PCLK_MINI 18 PCLK_AUD 26
48M 15
14MOSC 16
14MTV 10
LCL
Place these component near middle of
DICLK#0
DICLK#1
trace.
L44 10nH
L48 10nH
L50 10nH
C1196
5PF
L45 10nH
L49 10nH
L51 10nH
C1197
5PF
12
12
12
C1195
5PF
DICLK_NB#0
12
DICLK_NB#1
12
AICLK_NB#
12
No data traces should be routed within 20mil of the L.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
DICLK_NB#0 5
DICLK_NB#1 5
AICLK_NB# 5
DICLK#[0..3]3
AICLK#3
Place these component near middle of trace.
DICLK#2
DICLK#3
L42 10nH
L46 10nH
12
12
C1193 5PF
C1194 5PF
L43 10nH
L47 10nH
DICLK_NB#2
12
DICLK_NB#3
12
Title
Size Document Number Rev
Date: Sheet
DICLK_NB#2 5
DICLK_NB#3 5
SCHEMATIC, M/B LA-736/736B/736C 401168
745Monday, September 10, 2001
1F
of
Page 8
JP8
R578
@0
R580
@1K 1%
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79 80
CONT-80P
VREF_CG
PID0 16 PID1 16 PID2 16 PID3 16
AGP_STP# 5,15 GSERR# 5
+5V
+3V
ENVEE 25 BKOFF# 24 DISPOFF# 23 GPIO0_VGA
+12VS +3VS
+5VS
+VDDQ
VREF_CG
VREF_GC
+3V
12
C778
10UF_10V_1206
+VDDQ
12
C780
10UF_10V_1206
VREF_GC 6
M_SEN#9,24
CRTGND9
CRTGND9 HSYNC9 VSYNC9 DDC_DATA9,10 DDC_CLK9,10
TVD[0..7]10
G9 R9 B9
SUS_STAT#5,15,16
VGA_SUSP#24
SUSP30 CLKRUN#14,15,18,19 DEV_RST#10,19,20
PIRQC#14,15,26
PIRQB#14,15,18,19 PIRQA#14,15,19
DAC_CONTR24
M_SEN# CRTGND
G R
B CRTGND HSYNC VSYNC DDC_DATA DDC_CLK
AGP_BUSY#
TVD[0..7]
12
C781
@560PF
R574
@75 1%
R579
@75 1%
12
C782
@560PF
TVHS TVVS TVD7 TVD6 TVD5 TVD4 TVD3 TVD2 TVD1 TVD0
R572
@1K 1%
TVCLK10
TVHS10 TVVS10
+VDDQ
G_VREF1
G_VREF2
ST[0..2]GAD[0..31] GSBA[0..7]
GPAR5
GFRAME#5
GIRDY#5
GTRDY#5
GDEVSEL#5
GREQ#5 GGNT#5
GSTOP#5
SBSTB5
RBF#5
GC/BE#35
AD_STBB5
GC/BE#25
GPAR GFRAME# GIRDY# GTRDY#
GDEVSEL#
GREQ# GGNT# GSTOP# GSBA5 GSBA6 GSBA4 GSBA7 SBSTB
ST15
RBF# GAD25 GAD1 GAD30 GAD24 GAD29 GC/BE#3 GAD26
GAD31 GAD27 GAD28
GAD23 GAD17 GAD20 GAD16 GC/BE#2
GAD18 GAD22 GAD21 GAD19 GAD9
GREQ#5
PCIREQ#5
GSBA[0..7]5ST[0..2]5GAD[0..31]5
JP9
79 80 77
78
75
76
73
74
71
72
69
70
67
68
65
66
63
64
61
62 59 60 57 58 55 56 53 54 51 52 49 50 47 48 45 46 43 44 41 42 39 40 37 38 35 36 33 34 31 32 29 30 27 28 25 26 23 24 21 22 19 20 17 18 15 16 13 14 11 12 910 78 56 34 12
CONT-80P
+3V
R577
10K
AGP_BUSY#
1 2
D14
@RB751V
3
D15 @RB717F
R581
0
AD_STBA# AD_STBB#
PIPE# SBSTB#
WBF# GCLKO
GSBA3 GSBA0 GSBA1 GSBA2
ST0ST1 ST2
GAD4 GAD2 GAD3 GC/BE#0 GAD0
GAD7 GAD5 GAD6
GAD8 GAD13 GAD12 GAD10 GC/BE#1
GAD15 GAD11 GAD14
+3VS
21
R575
10K
AD_STBA# 5 AD_STBB# 5
PIPE# 5 SBSTB# 5
RTCCLK 5,16,20 WBF# 5
ST0 5 ST2 5
GC/BE#0 5
AD_STBA 5
GC/BE#1 5
GGREQ# 16AGP_BUSY#5,15
GCLKO
12
GCLK_O 7
C779 @22PF
AGP BUS PULL/DOWN RESISTER
GFRAME# GIRDY# GTRDY# GDEVSEL# GSTOP# GREQ# GPAR
RBF# PIPE# GGNT# WBF# GSERR#
ST2
AD_STBA AD_STBB SBSTB
AD_STBA# AD_STBB# SBSTB#
R555 8.2K R556 8.2K R557 8.2K R558 8.2K R559 8.2K R560 8.2K R561 8.2K R562 8.2K R563 8.2K R564 8.2K R565 8.2K R566 8.2K R567 8.2K
R568 8.2K R569 8.2K R570 8.2K
R571 8.2K R573 8.2K R576 8.2K
+VDDQ
+VDDQ
Change by 8/28/2000 ALI Suggest
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
845Monday, September 10, 2001
of
1F
Page 9
CRTVDD
1
D18
DAN217
2
CRT Connector
R8
G8
B8
L6
CRTGND8
12
0_0805
R
G
B
R585
1 2
+12VS
R586
75
75
1 2
R584 75
HSYNC8
VSYNC8
C785 10PF
1 2
HSYNC
2N7002
VSYNC
R588
1 2
0
C786
C787
12
12
10PF
10PF
D
S
13
Q55
G
S
2
L2
1 2
CB-2012D-800T_0805
L3
1 2
CB-2012D-800T_0805
L4
1 2
CB-2012D-800T_0805
12
D
13
Q57
G
2N7002
2
R589
@10K
CB-1608D-121T
1 2
1 2
12
C788 10PF
L5
1 2
CB-1608D-121T
L7
1 2
R590
@10K
CRTVDD
1
D19
DAN217 2
3
12
C789 10PF
12
C794 68PF
1
D20
DAN217 2
3
12
C790 10PF
12
C795 68PF
+5VS
3
12
D16
2 1
RB491D
M_SEN#8,24
C791 100PF
220PF
C792
C783 .1UF
12
D17
CRTVDD +5VALW
R582
2.2K
C793 220PF
12
12
+12VS
R583
2.2K
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
Q56 2N7002
R587
1 2
0
12
JP10 CRT-15P
D
1 3
2
G
C784 68PF
D
1 3
S
12
12
1
2
DAN217
S
G
DDC_DATA
Q54 2N7002
DDC_CLK
3
2
DDC_DATA 8,10
DDC_CLK 8,10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
945Monday, September 10, 2001
of
1F
Page 10
R1009
@0
SDA_TV12
SCK_TV12
+3V
1 2
DDC_DATA8,9
DDC_CLK8,9
+5V +3VS
R591 @0
1 2
TVD[0..7]8
R592 0
Modify By 4/ 1 0 , F or Power Consumption
1 2
CB-1608D-121T
1 2
L8
12
C798
10UF_10V_1206
CB-1608D-121T
1 2
12
C801
10UF_10V_1206
R597 0
R598 0
12
C799
10UF_10V_1206
L9
12
C802
10UF_10V_1206
CLK_GND CLK_GND
R593 @0
1 2
R594 @0
1 2
1 2
1 2
Modify by 11/03/2K
USE VGA DIRECTORY
TVCLK8
TVHS8
TVVS8
TVCLK
TVHS
TVVS
TVD[0..7]
Modify By 4/10,For Power Consumption
DACVDD C800 .1UF
1 2
DAC_GNDDAC_GND
TVCLK
CLKVDD C803 .1UF
1 2
R595 1K
12
VLF
C808 560PF
1 2
CLK_GND
26 27
7
9 39 40
41
6
4
3
2
1 44 43 42 29
R604
10K
R1013
@0
Add R1009~R1013 for TVout leakage on C3
R605 @22
C817
@10PF
12
REV TVCLK TVHS
TVVS TVD7
TVD6 TVD5 TVD4 TVD3 TVD2 TVD1 TVD0
DAC_GND
TVRST#
TVRST#
DVDD
SD SC
D8/SUSP D9
XCLK HS
VS D7
D6 D5 D4 D3 D2 D1 D0 SUBSTRATE
CLK_GND
12
12
R958
@0
CLKVDD
DACVDD
31
25
VDD
AVDD
AGND
GND
GND
34
19238
DAC_GND
+3VS
DEV_RST# 8,19,20
XTALO
14MTV2
C796 @27PF
12
VLF
51630
VLF
DGND
182836
DVDD
DGND
DVDD
DGND
Y2
1 2
12
@14.318MHZ
C804 .1UF
1 2
V5SF
CVBS/B
Y/R C/G
CSYNC
DVDD ADDR
XTALO
XTALI
D10 D11 D12 D13 D14 D15
IRSET
RESET#
TVXPRESS_LQFP
TVRST#
1 2
U22
C805 .1UF
38 20 22 21 17
35 37
33 32
10 11 12 13 14 15
24
TVRST#
12
C797 @10PF
CB-1608D-121T
1 2
12
10UF_10V_1206
DVDD
C811 .1UF
Stuff For TVXpress
XTALO 14MTV2
REV
@22K
2 1
L10
C806
12
R5990
R600
22K
R603
560_1%
12
R1012
RB751V D21
R606
@0
12
12
12
+3VS
+3V
R1010
R1011
@0
0
Modify By 4/10,For Power Consumption
1 2
1 2
12
C807
10UF_10V_1206
C812 .1UF
12
DVDD
14MTV 7
+3VS
12
+3V
Modify By 4/10, For Power Consumption
DAC_GND
12
R601
ADD FOR TVXPRESS SET "C0H/C1H"
12
R596 75
4.7K
Clean GND required
PCIRST# 5,14,15,18..21,26
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C810
1 2
@27PF
L12
1 2
CB-1608D-121T
C815 @270PF
1 2
L13 CB-2012D-601T
1 2
DAC_GND
L14 CB-2012D-601T
1 2
CLK_GND
1 2
JP11 RCA JACK
DAC_GNDDAC_GNDDAC_GNDDAC_GND
C813 150PF
14MTV2
CB-1608D-121T
1 2
12
R602 @22
C816
@10PF
C809
1 2
47PF L11
1 2
C814 270PF
CONFIGURATION
PART
TVXpress
R591 R599 R601 R603 C808 D21 R606 R958 OPEN STUFF
NOTE :CH7004 ADDR SET 76H BY PIN 29 "LOW"
STUFFR592 OPEN STUFF STUFF STUFF 560 1% 560PF STUFF OPEN
CH7004
OPEN OPEN 360 1% OPEN OPEN STUFF
NOTE
USE +3VSOPEN USE +5VS
FOR TVXPRESS ADDR SET "C0H/C1H"
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
10 45Monday, September 10, 2001
of
1F
Page 11
MMA[0..14]5
MA[0..14]12,13
MMA[0..14] MA[0..14]
MMD[0..63]5 MD[0..63]12,13
MMD[0..63] MD[0..63]
MMD0 MMD1 MMD2 MMD3 MMD4 MMD5 MMD6 MMD7
MMD8 MMD9 MMD10 MMD11 MMD12 MMD13 MMD14 MMD15
MMD16 MMD17 MMD18 MMD19 MMD20 MMD21 MMD22 MMD23
MMD24 MMD25 MMD26 MMD27 MMD28 MMD29 MMD30 MMD31
16 15 14 13 12 11 10
16 15 14 13 12 11 10
16 15 14 13 12 11 10
16 15 14 13 12 11 10
RP10
16P8R-10
RP13
16P8R-10
RP16
16P8R-10
RP20
16P8R-10
MD0
1
MD1
2
MD2
3
MD3
4
MD4
5
MD5
6
MD6
7
MD7
89
MD8
1
MD9
2
MD10
3
MD11
4
MD12
5
MD13
6
MD14
7
MD15
89
MD16
1
MD17
2
MD18
3
MD19
4
MD20
5
MD21
6
MD22
7
MD23
89
MD24
1
MD25
2
MD26
3
MD27
4
MD28
5
MD29
6
MD30
7
MD31
89
MMD32 MMD33 MMD34 MMD35 MMD36 MMD37 MMD38 MMD39
MMD40 MMD41 MMD42 MMD43 MMD44 MMD45 MMD46 MMD47
MMD48 MMD49 MMD50 MMD51 MMD52 MMD53 MMD54 MMD55
MMD56 MMD57 MMD58 MMD59 MMD60 MMD61 MMD62 MMD63
16 15 14 13 12 11 10
16 15 14 13 12 11 10
16 15 14 13 12 11 10
16 15 14 13 12 11 10
RP11
16P8R-10
RP14
16P8R-10
RP17
16P8R-10
RP21
16P8R-10
MD32
1
MD33
2
MD34
3
MD35
4
MD36
5
MD37
6
MD38
7
MD39
89
MD40
1
MD41
2
MD42
3
MD43
4
MD44
5
MD45
6
MD46
7
MD47
89
MD48
1
MD49
2
MD50
3
MD51
4
MD52
5
MD53
6
MD54
7
MD55
89
MD56
1
MD57
2
MD58
3
MD59
4
MD60
5
MD61
6
MD62
7
MD63
89
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
RAS#[0..3]5
MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7
MMA8 MMA9 MMA10 MMA11 MMA12 MMA13 MMA14
RP12
16 15 14 13 12 11 10
16P8R-10
RP15
16 15 14 13 12 11 10
16P8R-10
CAS#05 CAS#15 RCAS#1 12,13 CAS#25 CAS#35
CAS#45 CAS#55 CAS#65 CAS#75
SRAS#05
RRMWEA#5
1 2 3 4 5 6 7 89
1 2 3 4 5 6 7 89
RAS#0 RAS#1 RAS#2 RAS#3
MA0 MA1 MA2 MA3 MA4 MA5 MA6 MA7
MA8 MA9 MA10 MA11 MA12 MA13 MA14
CAS#0 CAS#1 CAS#2 CAS#3
CAS#4 CAS#5 CAS#6 CAS#7
RP18 1 8 2 7 3 6 4 5
8P4R-10
RP19 1 8 2 7 3 6 4 5
8P4R-10
RP22 1 8 2 7 3 6 4 5
8P4R-10
RP23 1 8 2 7 3 6 4 5
8P4R-10
RCAS#0 RCAS#1 RCAS#2 RCAS#3
RCAS#4 RCAS#5 RCAS#6 RCAS#7
SRASA#SRAS#0 SCASA#SCAS#0
RRAS#0 12
RRAS#1 12
RRAS#2 13
RRAS#3 13
RCAS#0 12,13 RCAS#2 12,13
RCAS#3 12,13
RCAS#4 12,13 RCAS#5 12,13 RCAS#6 12,13 RCAS#7 12,13
SRASA# 12,13 SCASA# 12,13SCAS#05 RMWEA# 12,13
LA-736B : RP18 ~ RP23 USED 22 Ohm
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
11 45Monday, September 10, 2001
of
1F
Page 12
Page 13
+3V
+3V+3V
+3V
+3V
12
12
12
C818 1000PF
C821 1000PF
C828 .1UF
ENDIM016 ENDIM116
INHIB ENDIM0 ENDIM1
SB_SMC16 SB_SMD16
C819 1000PF
C822 1000PF
12
C820 .01UF
12 C823
10UF_10V_1206
12
C830 .1UF
RP24
8P4R-10K
ENDIM0 ENDIM1
JP12
1
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143
3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65
RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC
SO-DIMM144
RESVD/DQ68 RESVD/DQ69
RESVD/DQ70 RESVD/DQ71
CE6#/RESVD CE7#/RESVD
DIMM1
RFU/CKE0
RFU/CKE1
MD0 MD1 MD2
RCAS#[0..7]11,13
MA[0..14]11,13
12
12
C824 .01UF
12
12
C831 .1UF
45 36 27 18
12
6
10
9
3
13
INH A B
X Y
C834
.1UF
C832
10UF_10V_1206
*
+3V
16
X0 X1
VCC
X2 X3
Y0 Y1 Y2 Y3
GND
GND
7
8
12
C825 .01UF
C826 .01UF
PULL HIGH TO +3V FOR LEAKAGE ISSUE
U23
1 5 2 4
12 14 15 11
74HC4052
MD[0..63]11,13
CLK_SDRAM07
+3V+3VS
RP25
8P4R-10K
1 8
2 7
3 6
4 5
RP26
8P4R-10K
1 8
2 7
3 6
4 5
SCKDIMM1INHIB
SDADIMM1
RCAS#[0..7]
MA[0..14]
MD[0..63]
C827
10PF
SCKDIMM2 13 SCK_TV 10 SCK_CLK 7
SDADIMM2 13 SDA_TV 10 SDA_CLK 7
R607
12
12
33
SRASA#11,13 RMWEA#11,13 RRAS#011 RRAS#111
SM BUS
INHIB ENDIM1
0
0
0
0
1
0
0
1
1
XX
ENDIM0
0
1
0
1
CHANNEL ON
SCKDIMM0/SDADIMM0
SCKDIMM1/SDADIMM1
SCK_TV/SDA_TV
SCK_CLK/SDA_CLK
NONE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
MD3 MD4
MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1 MA2
MD8 MD9 MD10 MD11
MD12 MD13 MD14 MD15
RMWEA# RRAS#0 RRAS#1
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
RCAS#2
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
SDADIMM1
VSS DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
VSS CE4# CE5#
VCC
VSS DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
VSS
VCC
RFU RFU
RFU
RFU/CLK1
VSS
VCC DQ48 DQ49 DQ50 DQ51
VSS DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0
VSS
A12/BA1
A13/A11
VCC
VSS DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VSS SCL
VCC
2
MD32
4
MD33
6
MD34
8
MD35
10 12
MD36
14
MD37
16
MD38
18
MD39
20 22
RCAS#4
24
RCAS#5
26 28
MA3
30
A3 A4 A5
A7
32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
MA4 MA5
MD40 MD41 MD42 MD43
MD44 MD45 MD46 MD47
MA12
MD48 MD49 MD50 MD51
MD52 MD53 MD54 MD55
MA7 MA13
MA14 MA11
RCAS#6 RCAS#7RCAS#3
MD56 MD57 MD58 MD59
MD60 MD61 MD62 MD63
SCKDIMM1
CKE0 5 SCASA# 11,13
CKE1 5
12
R608 33
12
C833 10PF
CLK_SDRAM1 7
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
12 45Monday, September 10, 2001
of
1F
12
12
12
C829 .1UF
Page 14
Page 15
+3V
+3V
+3V
12
12
12
C836 1000PF
C840 1000PF
C846 .1UF
+3V+3V
JP13
1
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143
3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65
RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC
SO-DIMM144
RESVD/DQ68 RESVD/DQ69
RESVD/DQ70 RESVD/DQ71
CE6#/RESVD CE7#/RESVD
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1 MA2
MD8 MD9 MD10 MD11
MD12 MD13 MD14 MD15
RMWEA# RRAS#2 RRAS#3
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
RCAS#2 RCAS#3
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
SDADIMM2
C838 .01UF
12
C849 .1UF
RCAS#[0..7]
MA[0..14]
MD[0..63]
12
C843 .01UF
12
10UF_10V_1206
C850
12
C844 .01UF
12
C845 .01UF
R609
C835
12
10PF
CLK_SDRAM27
12
33
SRASA#11,12 RMWEA#11,12 RRAS#211 RRAS#311
SDADIMM212 SCKDIMM2 12
RCAS#[0..7]11,12
MA[0..14]11,12
MD[0..63]11,12
C837 1000PF
C841 1000PF
12
12 C842
10UF_10V_1206
12
C848 .1UF
12
12
12
C847 .1UF
DIMM2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
VSS DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
VSS
CE4# CE5#
VCC
VSS DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
VSS
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
VCC DQ48 DQ49 DQ50 DQ51
VSS DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0
VSS
A12/BA1 A13/A11
VCC
VSS DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VSS
SCL
VCC
2
MD32
4
MD33
6
MD34
8
MD35
10 12
MD36
14
MD37
16
MD38
18
MD39
20 22
RCAS#4
24
RCAS#5
26 28
MA3
30
A3 A4 A5
A7
32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
MA4 MA5
MD40 MD41 MD42 MD43
MD44 MD45 MD46 MD47
MA12
MD48 MD49 MD50 MD51
MD52 MD53 MD54 MD55
MA7 MA13
MA14 MA11
RCAS#6 RCAS#7
MD56 MD57 MD58 MD59
MD60 MD61 MD62 MD63
SCKDIMM2
CKE2 5 SCASA# 11,12
CKE3 5
12
R610 33
12
C839 10PF
CLK_SDRAM3 7
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
13 45Monday, September 10, 2001
of
1F
Page 16
Page 17
1
2
3
4
5
6
7
8
ISA
10P8R_4.7K
SD[0..7] SA[0..19]
5 4 3 2 1
5 4 3 2 1
10 9 8 7 6
10 9 8 7 6
SD0 SD1 SD2 SD3
SA15 SA12 SA14 SA11
SA5 SA7 SA6 SA4
+5VS
+5VS
MEMW# 16,24 MEMR# 16,24 IOR# 16,24 IOW# 16,24
+5VS
+5VS
PERR#18,19
PIRQD#15,18
PHLD#5,15
PHLDA#5,15
+3VS
+3VS
+3VS
+5VS
SD[0..7]16,24 SA[0..19]16,24
RP28
SD7
6
SD6
A A
+5VS
+5VS
B B
+5VS
+5VS
SD5 SD4
SA18 SA17 SA16 SA19
SA1 SA3 SA2 SA0
SA13 SA9 SA10 SA8
7 8 9
10
10P8R_4.7K
RP29
6 7 8 9
10
10P8R_4.7K
RP30
1 2 3 4 5
10P8R_4.7K
RP31
1 2 3 4 5
1 2
R611 10K
1 2
R612 @1K
1 2
R613 1K
1 2
R614 @10K
1 2
PCI
RP27
1 2 3 4 5
10P8R_10K
NOTE: +3V 8.2K
12
@1000PF
IOCHRDY
1KR615
10 9 8 7 6
CLKRUN# 8,15,18,19
SIRQ 16,19
PCIRST# 5,10,15,18..21,26
C851
IOCHRDY 16,18,24
+3VS PIRQA# 8,15,19 PIRQB# 8,15,18,19 PIRQC# 8,15,26
For VGA BROAD HOLE
H8
H12
HOLED
1
EMI PAD:FOR LEFT SIDE CPU ON BOTTOM
H13
HOLED
HOLED
1
1
H14 HOLED
1
EP141EP151EP17
1
HOLEA : Hole 3mm +0mm -0.05mm, With ring 8mm PTH
H1 HOLEA
H6 HOLEA
1
1
1
1
1
H3
H2
HOLEA
HOLEA
1
1
FM1
FM5
FM9
FM13
FM17
1
H7 HOLEA
1
1
FM2
1
FM6
1
FM10
1
FM14
1
FM18
1
H4 HOLEA
1
H9 HOLEA
1
H5 HOLEA
1
H11
H10
HOLEA
HOLEA
1
1
FM3
1
FM7
1
FM11
1
FM15
1
FM4
1
FM8
1
FM12
1
FM16
1
EMI PAD : FOR SOCKET462 CPU EMI FRAME
EP1
EP3
1
EP81EP9
1
1
EP5
EP4
1
EP101EP11
EP7
EP6
1
1
EP12
1
1
EP13
1
1
+5VS
AUDIO POWER SOURCE
RP32
1 8
C C
Modify by 11/06/2K
+5VALW
+3VS +5VE
12
C861 .1UF
D D
+3VE +5VS
12
C870
.1UF
2 7 3 6 4 5
8P4R-4.7K
1 2
FOR SOUTH BRIDGE
12
12
C862
.1UF
12
C871
.01UF
1
C863
.1UF
12
C872
.01UF
10KR929
12
C864 1000PF
12
C873
10UF_10V_1206
IRQ12 16,24 IRQ14 16,21 IRQ15 16,21
IRQ1 16,24
12
C865
.01UF
2
C874 .1UF
12
C866
10UF_10V_1206
12
12
C875 1000PF
12
12
12
C876
.1UF
C867 .1UF
12
.01UF
3
C868
.1UF
C877
10UF_10V_1206
12
C878
+5V_ALW
12
R616
2.2K
1 2
R617
D22 AS2431L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
10K 2
EN_5VCD#22
1 3
1 2
4
R620 442_1%
2
L15
CB-2012D-121T
13
Q59 2N7002
1 2
R621
5.11K_0.5% 1 2
R624 0
+12VALW
84
U24A
3
+
2
-
LM358
5.1K
C857 68PF
1 2
R622
5.11K_0.5%
C858 220PF
1
R618
12
12
C852
1 2
.1UF
12
6
12
+5VALW
12
C854
.1UF
5
+5VALW
2
G
12
C869
.1UF
C853
1 2
.1UF
13
D
Q58 SI2304DS
S
1 2
R965 33
+5VAMP
C855
4.7UF_10V_0805 +12VS
Q121
13
D
2
G
S
1 2
R619 10K
R623 100K
2N7002
1 2
2
+5VAMP
G
EN_5VCD# 22
13
D
Q60
SI2306DS
S
C859
4.7UF_10V_0805
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
7
1 2
14
C856
.1UF
AVDD
12
C860 .1UF
1F
of
45Monday, September 10, 2001
8
Page 18
PCLK_15357
+3V
PCIRST#5,10,14,18..21,26
SPARE GATES
R631 @0
1 2
+12VS
R632 0
1 2
+5VS
5
+
6
-
AD[0..31]5,18,19,26,31
C/BE#[0..3]5,18,19,26
SBD[0..15]22 PDD[0..15]21
R625
1 2
33
48M7
+3VS
CPURST#3,5
Add By Kenny 1/4/2001
C880
12
@10PF
12
R955
10K
1
2
34
U58
7SH08
5
+3V
Modify by 11/01/2K
C881
1 2
.1UF
84
7
U17B
LMC6482IM
+5VS POWER
PAR5,18,19,26
AGP_STP#5,8
SUS_STAT#5,8,16
AD[0..31] C/BE#[0..3] SBD[0..15] PDD[0..15]
C879
1 2
10PF
R627
1 2
R992 0_0402
R629
@33
R956
12
10K
FRAME#5,18,19,26
DEVSEL#5,18,19,26
PIRQC#8,14,26 PIRQD#14,18
+3VS
PHLDA#5,14
AGP_BUSY#5,8
+3VALW+3VE
R626
0_0805
+5VALW
R628
0_0805
+3VS+3VS +5VS
F15
P15
F14F6G15
P6N6F7
VCC_G
VCC_3B
VCC_3C
VCC_3C
VCC_3C
VCC_3C
GND
GND
GND
GND
GND
GND
J9
J10
J8
H13
H12
H11
OVCUR#2 OVCUR#3
R979
1 2
0_0805 R980
1 2
@0_0805
E10
R15
G6
K16
VCC_F
VCC_F
VCC_5A
VCC_5A
GND
GND
GND
GND
GND
J11
J12K9K10
K8
J13
SDCS3# 21 SDCS1# 21 SDDREQ 21 SDDACK# 21 SIORDY 21 SDIOR# 21 SDIOW# 21 CLKRUN# 8,14,18,19
ACIN_SYS 16
N15
VCC_5A
VCC_5A
VCC_5A
GND
GND
GND
K11
K12L9L10
K13
+3VS
+5VS
GND
L8
LA-736C : USED
FOR M1535+ IDE POWER SOURCE
LA-736B : MOUNT R980,UNMOUNT R979
PDD0
PDD1
PDD5
PDD6
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
G18
PIDED15
PRIMARY IDE
SECONDARY IDE
GND
GND
PDD8
PDD7
G16
F19
F17
E20
E18
D19
C20
B20
PIDED9
PIDED8
PIDED14
PIDED13
PIDED12
PIDED11
PIDED10
GND
GND
GND
GND
GND
GND
GND
L11
L12M9M10
M11
M8
L13
LA-736B : USED M1535 LA-736C : USED M1535+
D18
D20
PIDED7
PIDED6
GND
GND
M12
PDD4
PDD3
E19
F16
PIDED5
PIDED4
GND
GND
N9N8M13
PDD2
F18
F20
PIDED3
PIDED2
PIDED1
PIDEA2 PIDEA1
PIDEA0 PIDECS3J PIDECS1J
PIDEDRQ
PIDEDAKJ
PIDERDY PIDEIORJ
PIDEIOWJ
SIDED15 SIDED14 SIDED13 SIDED12 SIDED11 SIDED10
SIDED9
SIDED8
SIDED7
SIDED6
SIDED5
SIDED4
SIDED3
SIDED2
SIDED1
SIDED0
SIDEA2
SIDEA1
SIDEA0
GND
GND
H8
G17
PIDED0
GND GND GND GND
M1535+
J16 H19 H20 J18 J17 G19 H18 H17 H16 G20
B17 E16 C16 A16 D15 B15 E14 D13 E13 D14 A15 C15 E15 B16 D16 A17 B19 C18 A19 N13 N12 N11 N10
PDA2 21 PDA1 21 PDA0 21 PDCS3# 21
OVCUR#2
OVCUR#3
PDCS1# 21 PDDREQ 21 PDDACK# 21 PIORDY 21 PDIOR# 21 PDIOW# 21
SDA2 21 SDA1 21 SDA0 21
RP33
16P8R-47 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
RP34
R633
1 2
10K R634
1 2
10K
SBD15
16
SBD14
15
SBD13
14
SBD12
13
SBD11
12
SBD10
11
SBD9
10
SBD8 SBD7
16
SBD6
15
SBD5
14
SBD4
13
SBD3
12
SBD2
11
SBD1
10
SBD0
16P8R-47
+5VS
+5VS
PDDREQ
SDD15 SDD14 SDD13 SDD12 SDD11 SDD10 SDD9 SDD8 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
15 45Monday, September 10, 2001
1F
OVCUR#117 OVCUR#017
USBP3-23 USBP3+23 USBP2-23 USBP2+23 USBP1-17
USBP1+17
USBP0-17
USBP0+17
R931 0
L2_ZZ
FERR#3
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
1 2
STPCLK#3 A20M#3,24
CPUINIT3
C/BE#3 C/BE#2 C/BE#1 C/BE#0
1 2 1 2
R640
@0
SMI#3
NMI3
INTR3
IGNNE#3
FERR#
U25A
E8
PCICLK
C5
PCIRSTJ
G2
AD31
F1
AD30
F2
AD29
F3
AD28
E1
AD27
E2
AD26
E3
AD25
D1
AD24
D3
AD23
C1
AD22
B1
AD21
A1
AD20
C2
AD19
B2
AD18
A2
AD17
C3
AD16
E6
AD15
D6
AD14
C6
AD13
B6
AD12
A6
AD11
E7
AD10
D7
AD9
C7
AD8
A7
AD7
D8
AD6
C8
AD5
B8
AD4
A8
AD3
C9
AD2
B9
AD1
A9
AD0
CBEJ2
CBEJ1
CBEJ3
B3A5B7A3C4D4A4B4D5B5F4F5G3G4G5H4A10
D2
R635 8.2K R636 8.2K
10K
12
TRDY#5,18,19,26
IRDY#5,18,19,26 STOP#5,18,19,26
SERR#5,18,19
PIRQA#8,14,19 PIRQB#8,14,18,19
PHLD#5,14
A20M#
C14
B13
A12
INIT
FERRJ
CPURST
PCI
CBEJ0
FRAMEJ
TRDYJ
IRDYJ
STOPJ
DEVSELJ
R638 0 R639 0
1 2
C13
B12
C12
A14
NMI
INTR
A20MJ
IGNNEJ
HOST
SERRJ
PAR
INTAJ_M1
INTEJ INTFJ
1 2 1 2
B14
D12
E12
A13
ZZ
SLEEPJ
STPCLKJ
H5W8V8U9Y7
SMIJ
USBP0+
USBCLK
USBP0-
W7V7U8T8T6U5U6
USBP1-
USBP2-
USBP1+
USBP2+
USBP3+
T5
USBP3-
OVCRJ0
OVCRJ1
OVCRJ2
USB
ALI M1535
INTBJ_S0
INTCJ_S1
INTDJ_S2
INTEJ
INTFJ
PHLDAJ
PHOLDJ
C11
D11
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
AGPBUSYJ
AGPSTPJ
SLOWDOWN
GPI25
E11D9E9
CLKRUNJ
D17
A11
+3VS
SIDEIORJ
SIDEIOWJ
E17
+5VE
R14
R8
R6
OVCRJ3
VCCR_3E
VCCR_3E
VCCR_3E
SIDECS1J
SIDEDRQ
SIDEDAKJ
SIDERDY
C19
C17
B18
A18
R637 100K
1 2
1 2
R13
R7
VCCR_5D
VCCR_5D
SIDECS3J
GND
A20
H10
H9
SDDREQ
GND
Page 19
ON/OFF_EC#25
+5VALW
SYSVOL_UP#26 SYSVOL_DW#26
FDD_DET#23
R659 10K
1 2
+3VS
R664 4.7K
+5VS
R650 4.7K
1 2
SUS_STAT#5,8,15
+5VALW
R653 100K 1 2
+3VS
ACP
MODIFY BY 8/18/2000
SYSVOL_UP# SYSVOL_DW# FDD_DET#
ENDIM012 ENDIM112
SB_SMD12
1 2
SB_SMC12
SA[0..19]14,24
PID[0..3]8
+3VS
+3VS
SUSC#24 SUSB#24
SUSA#24
TP6
1
R651 10K
1 2
1 2
R655 @0
1 2
R656 @0
1 2
R657 @0
1 2
PID38 PID28
PID18 PID08
SHDRST#21
R975 @0
1 2
R976 @0
1 2
SD714,24 SD614,24 SD514,24 SD414,24 SD314,24 SD214,24 SD114,24 SD014,24
R670 10K
1 2
R672 10K
1 2
LRCLK R924
PID3 PID2
PID1 PID0
TESTJ SDAP4 SCKP4 SMBALT#
SDAP4
SCKP4
R646 10K
SPWROFF#29,32,35
@0
+5VALW
GGREQ#8 CPU_STP#7 PCI_STP#7
RSMRST#29
W19
W20
Y19 V20
Y20 U18 U19 U20
R647 10K
E5 E4 T3
U3 R5 U2 Y2
Y1 W3 W2 W1
V3
V2
V1
R4
T4 W5
V5
Y5
U4
U7
T7
T2
U25B
LRCLK SCLK PCMDATA
ACGP_UP ACGP_DOWN ACGP_MUTE ACGAME7 ACGAME6 ACGAME5 ACGAME4 ACGAME3 ACGAME2 ACGAME1 ACGAME0 ACMID_TXD ACMID_RXD
FANOUT1 FANOUT2 FANIN2
TESTJ SMBDATA SMBCLK SMB_ALERT
XD7 XD6 XD5 XD4 XD3 XD2 XD1 XD0
3MODE#23
TRACK0#23
DSKCHG#23
FDDIR#23
HDSEL#23 WDATA#23 WGATE#23
W10
U10
RSM_RSTJ
V10
PWG
SLPBTNJ
PBTN#
C10
B10
PCISTPJ
CPUSTPJ
RDATA#23
B11
R648 10K
CPU_STP#
OFF_PWR2 OFF_PWR1 OFF_PWR0
ZV
VOLUME CONTROL
GAME PORT/MIDI PORT
SM BUS
BIOSA18
BIOSA17
BIOSA16
SA15
SA14
SA13
SA12
T15
U15
V15
W15
T16
U16
V16
W16
SA18
SA17
SA16
SA12
SA15
SA14
SA13
SA11
R682
R683
IOCHRDY
@10K
GPIO4 GPIO5
@10K
INDEX#23
WP#23 MTR0#23 DRV0#23
STEP#23
W14
V14
W13
PCIREQJ
SUSPENDJ
OFF_PWR1
OFF_PWR0
ISA BUS
SA11
SA10
SA9
SA8
Y16
R17
T17
SA10
SA9
SA8
IOCHRDY14,18,24
IRQ1414,21 IRQ1514,21
Y14
Y15
PWRBTNJ
OFF_PWR2
SA7
SA6
U17
V17
SA7
SA6
SA5
IOW#14,24
MEMR#14,24
MEMW#14,24
SIRQ14,19
IOR#14,24
AEN24
W17
SA5
SA4
SA4
Y17
M18
RDATAJ
SA3
V18
SA3
SA2
L19
L18
M19
L16
L17
M20
K19
K20
K17
K18
M16
L20
STEPJ
DRV0J
DRV1J
MOT0J
FD_DIRJ
DSKCHGJ
MOT1J
WPROTJ
HDSELJ
WDATAJ
WGATEJ
ALI M1535
SA2
SA1
W18
Y18
SA1
R684
@10K
SA0
V19
SA0
T13
IOCHRDY
APICREQJ
APICCSJ
MEMRJ
MEMWJ
IORJ
IOWJ
M17
N17
N18
T14
U14
U13
SA19
AEN
R973 0
RTS2J
AUD_UP#
J20
J19H2K4J5K2H1K3J3L2J4K1H3K5G1J1J2L1
SIN2
TRK0J
RTS2J
SOUT2
INDEXJ
DENSEL
R641 0 R642 0 R643 0 R974 0
RI2J
AUD_DW#
RTS1J
SOUT1
RI1J
CTS1J
DTR1J
DSR1J
DCD1J
RI2J
SIN1
CTS2J
DTR2J
DSR2J
DCD2J
SYSVOL_UP# SYSVOL_DW#
FDD_DET#
R1R2R3P1M4M3M5L5T1M2N5N4N3N2N1P3P2
PE
SLCT
BUSY
PRINITJ
STROBJ
SLCTINJ
AUTOFDJ
PRNACKJ
SIO/PIOFDD
AC LINK
SIRQI
SIRQII
THRMJ
SQWO
IRQSER
N16
P16
T18
V6
R16
SQWO
PCS1J
PIDE_IRQ
SIDE_IRQ
12
R1027
4.7K
Modify by 4/18
ADD from LA-736C
PCS1J
PCS0J
P20
PCS0J
CLK32KO
V13
OSC32KI
RTCX2
RTCX1
OSC32KII
D10W6Y6
OSC14M
12
12
GPIRJ
P18
P19
GPO34
GPO35
R676 33
C882 10PF
LDRQJ
LFRAMEJ
GPOW
P17
N20
GPIO4
GPIO5
14MOSC 7 RTCCLK 5,8,20
ROMKBCSJ
T20
12
RTCAS
R20
R19
RTCX2
C883 10PF
RTCRW
RTCDS
V12
R18
1 2
R678 10M
KBCLK
KBINH
U11
U12
X1
32.768KHZ
APICGNTJ
N19
SIRQ
For Power Consumption
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
PD7
PD6
ERRORJ
KBDATA
MSCLK
MSDATA
T11
T12
BIOSCS#
RTCX1
PD5
PD4
MSCLK KBDATA KBCLK
IRQ1
12
ENDIM0 12
ENDIM1 12
PD3
PD2
PD1
PD0
IR
ACSDATA_IN1
ACRESETJ
ACSDATA_IN0
ACBIT_CLK
ACSDATA_OUT
USBP_PWRENJ
OFF_CDPWR
RUN_ENT3 RUN_ENT2 RUN_ENT1 RUN_ENT0
C884 10PF
IRTX IRRX
IRRXH
ACSYNC
SPKR
SPLED
IRQ8J
ACPWR
PMEJ
LLBJ
UPSPWR
12
LPD7 LPD6 LPD5 LPD4 LPD3 LPD2SLPBTNJ LPD1 LPD0
M1 L3 L4
Y8 Y9 P4 W9 P5 U1 T19
SPLED
Y13 Y12 Y10 W12
RING#_1535
V11
RIJ
LBJ
W11
LBJ
R680 20M
LLBJ
Y11 T10 V9
OFFCDPWR
T9
+3VALW RUNENT3
Y4
RUNENT2
W4 V4
RUNENT0
Y3
LA-736B : USED M1535
M1535+
LA-736C : USED M1535+
IRQ12 14,24
IRQ1 14,24 BIOSCS# 24 FLASH# 25 PHDRST# 21
+5VALW
ACIN_SYS15
IRQ8#
ACPWR
RXDA 17 TXDA 17 RTSA# 17 DTRA# 17 CTSA# 17 DSRA# 17 DCDA# 17 RIA# 17 LPTAFD# 17 INIT# 17 SLCTIN# 17 LPTSTB# 17 LPTBUSY 17 LPTACK# 17 LPTPE 17 LPTSLCT 17 LPTERR# 17
RP72
8P4R-10K
SPKR 27
R663 10K
1 2
EXTSMI# 24
+3VALW
R666 4.7K
1 2
SCI# 24
R677 100K
1 2
AUD_DW#
RI2J
MODIFY BY KENNY 9/5/2000
LPD[0..7]
18 27 36 45
OFFCDPWR
PCS0J
ACPWR
ACP
PS/2 MODE
R644 10K
R925 10K
R937 10K
LPD[0..7] 17
MODIFY BY KENNY 9/5/2000
+5VALW
12
+3VALW
MODIFY BY 9/19/2K
RUNENT3 RUNENT2 RUNENT0
MSCLK KBDATA KBCLK
R669 100K
Disable 4Mb ROM
R673 @10K
R675 1K
Enable 4Mb ROM
D24
2
1
3
RB425D
12
12
R660
4.7K
LIDSW# 25
RP35
8P4R-10K
RP36
8P4R-10K
+5V
51RING#25
IRQ8# 24
18 27 36 45
18 27 36 45
ACIN 24,33,34
AUD_UP#
LBJ
R645 1K
SET OFF_PWR 0,1,2 ACTIVE LOW
RTS2J
R649 1K
Disable Int. KBC
1 2
R652 0
MODIFY BY 8/18/2000
PCS1J
LLBJ
R658 10K
BIOSCS#
GPO35
No LPC ROM
SPLED
RTCCLK
AEN TESTJ
RING#_1535
1 2
R654 1K
ENABLE IOCHRDY
NORMAL MODE
R661 10K
R662 1K
CHIP TEST MODE
R665 10K
GPO34
1 2
Pentium II CPU
SQWO
R667 1K
MODIFY FOR K7 BY 8/18/2000
R668 1K
RTSA#
MODIFY BY KENNY 8/21/2000
R671 1K
R674 1K
R679 10K
R681 1K
+5VS
370H
ATX MODE
12
+5VALW
+5VS
+5VS
+5VS
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
16 45Monday, September 10, 2001
+5VS
1F
Page 20
+5VS
+12VS
USBP1+15 USBP1-15 USBP0+15 USBP0-15
Q62 SI2306DS
D
S
13
G
12
2
R692 100K
F2
EVERFUSE_0.75A
OVCUR#015
PCM_RI#19
USB
RP41 1 8 2 7 3 6 4 5
CP7 8P4C-47P
OVCUR#115
USB_VCCB
W=40mils W=40mils
C897
1000PF
12
12
8P4R-27
1 8
2 7
3 6
4 5
USB_VCCA
F1
W=40mils W=40mils
C893
1000PF
12
12
12
USB_BS
EVERFUSE_0.75A
CHB4516G750
L20
1 2
R694 470K
C895 .1UF
R695 560K
+3VALW
12
R686 10K
RING#24
RP42 8P4R-15K
1 8
2 7
3 6
4 5
CHB4516G750
L16
1 2 R691
470K
R693 560K
12
12
C891 .1UF
USB1_D­USB1_D+
1 2
FBM-L10-201209-301LMT
USB0_D-
L22
USB0_D+
FBM-L10-201209-301LMT
L23
CHB4516G750
1 2 1 2
1 2
L21
1 2
L17 FBM-L10-201209-301LMT L18 FBM-L10-201209-301LMT
L19 CHB4516G750
C896 10UF_10V_1206
D25
RB751V
USB_AS
12
C894
47PF
1 2
12
SERIAL / PARALLEL PORT
+3VALW
12
R685
21
Q61
2N7002
USB1_D+ USB1_D­USB0_D+ USB0_D-
C892 10UF_10V_1206
12
10K
13
1 2 3 4
5 6 7 8 13
C898
47PF
2
JP16
VCC D0­D0+ VSS
VCC D1­D1+ VSS G5
Molex-67300
DTRA#16 RTSA#16
TXDA16
CTSA#16
RIA#16
RXDA16 DCDA#16 DSRA#16
G1 G2 G3 G4
C887 .1UF
C889
25V
.47UF_0805
RIA# RI1#
RIA0
SUSP#24,25,30
INIT#16
SLCTIN#16
LPD[0..7]16
LPTSTB#16
Guide Pins
9 10 11 12
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
28
24
1
2 14 13 12 19 18 17 16 15 20
23 22
C885 .1UF
C1+
C1­C2+
C2­TIN1 TIN2 TIN3 ROUT1 ROUT2 ROUT3 ROUT4 ROUT5 ROUTB2
FORCEON FORCEOFF#
U27 MAX3243
R687 33
1 2
R688 33
1 2
LPD[0..7]
LPTSTB#
LPTAFD#16
LPTERR#16
LPTACK#16
LPTBUSY16
LPTPE16
LPTSLCT16
+5VALW
26
VCC
V+
V-
TOUT1 TOUT2 TOUT3
RIN1 RIN2 RIN3 RIN4 RIN5
INVLD#
GND
LPTINIT#
LPTSLCTIN#
+5VS
AFD#/3M#
FD0 LPTERR# FD1 LPTINIT# FD2 LPTSLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
27
C888
3
.47UF_0805
DTR1#
9
RTS1#
10
TXD1
11
CTS1#
4 5
RXD1
6
DCD1#
7
DSR1#
8 21 25
D26
2 1
RB420D
.47UF_0805
R972
33
R690
33
C886
25V
+5V_PRN
DCD1# DSR1# RXD1 RTS1# TXD1 CTS1# DTR1# RI1#
25V
RI1# DTR1# CTS1# TXD1
RTS1# RXD1 DSR1# DCD1#
w=10miles
R689
2.2K
1
w=10miles
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
JP15 LPTCN-25
(1)
1
(6)
6
(2)
2
(7)
7
(3)
3
(8)
8
(4)
4
(9)
9
(5)
5
CP1 1 8 2 7 3 6 4 5
8P4C-220PF
CP3 1 8 2 7 3 6 4 5
8P4C-220PF
C890 220PF
JP14
COM-DB9
LPD3 LPD2 LPD1 LPD0 LPD7 LPD6 LPD5 LPD4
RP37 1 8 2 7 3 6 4 5
8P4R-68
AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN#
LPTACK# LPTBUSY LPTPE LPTSLCT
FD0 FD1 FD2 FD3
FD4 FD5 FD6 FD7
Compal Electronics, inc.
Title
Size Document Number Rev
Date: Sheet of
RP38 1 8 2 7 3 6 4 5
8P4R-68
CP2 1 8 2 7 3 6 4 5
8P4C-220PF
CP4 1 8 2 7 3 6 4 5
8P4C-220PF
CP5 1 8 2 7 3 6 4 5
8P4C-220PF
CP6 1 8 2 7 3 6 4 5
8P4C-220PF
SCHEMATIC, M/B LA-736/736B/736C 401168
FD3 FD2 FD1 FD0 FD7
FD5 FD4
+5V_PRN
109876
12345
+5V_PRN
109876
12345
LPTACK# LPTBUSY LPTPE LPTSLCTFD6
RP39 10P8R-2.7K
+5V_PRN
AFD#/3M# LPTERR# LPTINIT# LPTSLCTIN#
FD7 FD6 FD5 FD4
RP40 10P8R-2.7K
+5V_PRN
FD3 FD2 FD1 FD0
17 45Monday, September 10, 2001
1F
Page 21
75
75
C908 .1UF
JP17
1
TX+
2
TX-
3
RX+
4
N/C
5
N/C
6
RX-
7
N/C
8
N/C
9
N/C
10
RING
11
TIP
12
N/C
RJ-45 & RJ-11
C909 .1UF
GND
CATHODE1
ANODE1
CATHODE2
ANODE2
GND
MOD_RING MOD_TIP
C910 1000PF
13
12
C1201
47PF
JP19
1 2
HEADER 2
JP20
1
1
2
2
3
3
4
4
5
5
6
6
HEADER 6
12
C915 10UF_10V_1206
12
C919 10UF_10V_1206
LED1_GRNN
LED1_GRNP
LED2_YELN
LED2_YELP
+3VS
+5VS
15
16
17
18
14
12
C911
.1UF
12
C1198 47PF
ADD BY EMI REQUESTMENT 2/21
12
C904 1000PF_2KV_1206
C912 .1UF
12
12
C916 1000PF
12
12
C1199
C1200
47PF
47PF
NEED PLACE ON BOTTOM
12
C905 1000PF_2KV_1206
TX+ TX-
RX+ RX-
12
12
C914
C913
.1UF
.1UF
12
C918
C917
.1UF
.1UF
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
12
C899 .1UF
12
C903 .1UF
18 45Monday, September 10, 2001
1F
of
TX+
+3VALW
12
EN_WOL#25
TIP RING
LAN RESERVED
LED1_GRNP LED1_GRNN
R1014
PIRQD#
+3VS
PCLK_MINI
12
R699 10
12
C906 22PF
IAC_BITCLK26
REQ#05
PCLK_MINI7
REQ#15
C/BE#35,15,19,26
C/BE#25,15,19,26
CLKRUN#8,14,15,19
SERR#5,15,19
PERR#14,19 C/BE#15,15,19,26
+5VS
IAC_SYNC26
IAC_SDATAI26
12
R702 10
12
C920 15PF
MD_MIC26
+5VS
PIRQD#14,15
W=40mils
1 2
10
R1016
REQ#0
1 2
10
R1018
REQ#1
1 2
10 AD31 AD29
AD27 AD25 R1021
AD26
1 2
100 AD23
AD21 AD19
AD17
IRDY#5,15,19,26
AD14 AD12
AD10 AD8
AD7 AD5 AD3
W=30mils
AD1
MD_SPK
W=30mils W=20mils
0603
AD[0..31]
Q63 SI2306DS
D
1 3
C900 1UF_25V_0805
101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124
2
13
2
G
JP18
1 2
12
KEY KEY
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
41 42
41 42
43 44
43 44
45 46
45 46
47 48
47 48
49 50
49 50
51 52
51 52
53 54
53 54
55 56
55 56
57 58
57 58
59 60
59 60
61 62
61 62
63 64
63 64
65 66
65 66
67 68
67 68
69 70
69 70
71 72
71 72
73 74
73 74
75 76
75 76
77 78
77 78
79 80
79 80
81 82
81 82
83 84
83 84
85 86
85 86
87 88
87 88
89 90
89 90
91 92
91 92
93 94
93 94
95 96
95 96
97 98
97 98
99 100
99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124
Mini-PCI SLOT
AD[0..31] 5,15,19,26,31
D
S
G
S
1 2
Q64 2N7002
R698
100K
LAN RESERVED
W=40mils
+3.3VAUX
12
C901 1UF_25V_0805
+12VALW
J3
12
LED2_YELP LED2_YELN
W=30mils
PCIRST#
R1020 10
1 2
AD30 AD28
AD26 AD24
MINI_IDSEL
AD22 AD20
AD18 AD16
AD15 AD13 AD11
AD9
AD6 AD4 AD2 AD0
MD_SPK
12
C921 .1UF
IOCHRDY 14,16,24
PIRQB#
R1015 10
1 2
R1017 10
GNT#0
1 2
+3.3VAUX
PCIRST# 5,10,14,15,19..21,26
GNT#1
R1019 10
1 2
MDM_PME# 25
AD27
R700
1 2
100
PAR 5,15,19,26
FRAME# 5,15,19,26 TRDY# 5,15,19,26 STOP# 5,15,19,26
DEVSEL# 5,15,19,26
C/BE#0 5,15,19,26
IAC_SDATAO 26
MD_SPK 26
+3.3VAUX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
IDSEL : AD27
L24
0_0805
MOD_TIP
VH1
DSSA-P3100SB
MOD_RING
+5VS
PIRQB# 8,14,15,19 GNT#0 5
W=40mils
GNT#1 5
1 2
R701 @0
1 2
R703 0
12
12
+3VS
IAC_RST# 26
PCIRST# 5,10,14,15,19..21,26
TX­RX+
R696
RX-
R697
12
C902
1000PF_2KV_1206
C907 .1UF
Page 22
RTCCLKA20
S1_D[0..15]20
S1_A[0..25]20 S2_D[0..15]20 S2_A[0..25]20
AD[0..31]5,15,18,26,31
C/BE#[0..3]5,15,18,26
+12VS
R717 22K
S2_WP
1 2
S2_A23
1 2
R718 22K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
S1_D[0..15] S1_A[0..25] S2_D[0..15] S2_A[0..25] AD[0..31] C/BE#[0..3]
R707
1 2
SERR#5,15,18
G
2
2N7002
100K
Q66
13
D
S
S2_D0 S1_D0 S2_D1 S1_D1 S2_D2 S1_D2 S2_D3 S1_D3 S2_D4 S1_D4 S2_D5 S1_D5 S2_D6 S1_D6 S2_D7 S1_D7 S2_D8 S1_D8 S2_D9 S1_D9 S2_D10 S1_D10 S2_D11 S1_D11 S2_D12 S1_D12 S2_D13 S1_D13 S2_D14 S1_D14 S2_D15 S1_D15
S2_A0 S1_A0 S2_A1 S1_A1 S2_A2 S1_A2 S2_A3 S1_A3 S2_A4 S1_A4 S2_A5 S1_A5 S2_A6 S1_A6 S2_A7 S1_A7 S2_A8 S1_A8 S2_A9 S1_A9 S2_A10 S1_A10 S2_A11 S1_A11 S2_A12 S1_A12 S2_A13 S1_A13 S2_A14 S1_A14
R710
S2_A16 SB_A16 SA_A16 S1_A16
1 2
Placement near to PCMCIA controller
S2_BVD120 S2_BVD220 S2_CD1#20 S2_CD2#20 S2_RDY#20
S2_WAIT#20
S2_WP20
S2_INPACK#20
S2_CE1#20 S2_CE2#20 S2_WE#20
S2_IORD#20
S2_IOWR#20
S2_OE#20 S2_VS120 S2_VS220 S2_REG#20 S2_RST20
S2_VCC S2_VCC
S2_A15 S1_A15 S2_A17 S1_A17
47
S2_A18 S1_A18 S2_A19 S1_A19 S2_A20 S1_A20 S2_A21 S1_A21 S2_A22 S1_A22 S2_A23 S1_A23 S2_A24 S1_A24 S2_A25 S1_A25
S2_BVD1 S1_BVD1 S2_BVD2 S1_BVD2 S2_CD1# S1_CD1# S2_CD2# S1_CD2# S2_RDY# S1_RDY# S2_WAIT# S1_WAIT# S2_WP S1_WP S2_INPACK# S1_INPACK#
S2_VS2 S2_RST
SLDATA20
DEV_RST#8,10,20
GNT#35 REQ#35
C/BE#35,15,18,26 C/BE#25,15,18,26 C/BE#15,15,18,26 C/BE#05,15,18,26
PCLK_PCM7
FRAME#5,15,18,26 DEVSEL#5,15,18,26
PCIRST#5,10,14,15,18,20,21,26
TRDY#5,15,18,26 IRDY#5,15,18,26 STOP#5,15,18,26
PERR#14,18
76
B_D0/CAD27
78
B_D1/CAD29
80
B_D2/RSVD
17
B_D3/CAD0
19
B_D4/CAD1
21
B_D5/CAD3
24
B_D6/CAD5
26
B_D7/CAD7
77
B_D8/CAD28
79
B_D9/CAD30
81
B_D10/CAD31
18
B_D11/CAD2
20
B_D12/CAD4
23
B_D13/CAD6
25
B_D14/RSVD
27
B_D15/CAD8
67
B_A0/CAD26
66
B_A1/CAD25
65
B_A2/CAD24
62
B_A3/CAD23
60
B_A4/CAD22
59
B_A5/CAD21
57
B_A6/CAD20
54
B_A7/CAD18
39
B_A8/CC/BE1#
36
B_A9/CAD14
29
B_A10/CAD9
34
B_A11/CAD12
52
B_A12/CC/BE2#
41
B_A13/CPAR
43
B_A14/CPERR#
50
B_A15/CIRDY#
48
B_A16/CCLK
37
B_A17/CAD16
40
B_A18/RSVD
42
B_A19/CBLOCK#
45
B_A20/CSTOP#
47
B_A21/CDEVSEL#
49
B_A22/CTRDY#
51
B_A23/CFRAME#
53
B_A24/CAD17
55
B_A25/CAD19
72
B_BVD1/CSTSCHG
71 137
B_BVD2/CAUDIO A_BVD2/CAUDIO
16
B_CD1#/CCD1#
74
B_CD2#/CCD2#
69
B_READY/CINT#
70
B_WAIT#/CSERR#
73
B_WP/CCLKRUN#
61
B_INPACK/CREQ#
28
B_CE1#/CC/BE0#
30
B_CE2#/CAD10
46
B_WE#/CGNT#
33
B_IORD#/CAD13
35
B_IOWR#/CAD15
32
B_OE#/CAD11
68
B_VS1#/CVS1
56
B_VS2#/CVS2
63
B_REG#/CC/BE3#
58
B_RESET/CRST#
CBRST#
1 2
R704 10
1 2
R705 10
PAR5,15,18,26
202
200
199
PAR
SERR#
198
STOP#
PERR#
195
IRDY#
196
TRDY#
166
197
RSTIN#
Add by Charles at 3/27
12 R706
33
C930
12
10PF
193
FRAME#
DEVSEL#
Slot
B
AD0
AD4
AD9
AD8
AD7
AD6
AD5
AD3
AD2
AD1
AD0
8
91112
14
15
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD1
AD2
AD10
AD10
AD11
1722346
AD11
AD12
208
AD12
AD13
206
AD13
AD14
205
AD14
AD15
AD15
AD16
1805203
PCLK
C/BE0#
AD17
AD18
AD16
19010204
189
191
AD18
AD19
AD17
169
192
162
C/BE1#
C/BE2#
C/BE3#
Interface
AD22
AD21
AD20
AD19
183
184
185
186
188
AD21
AD23
AD22
AD20
REQ#
AD23
179
AD24
168
AD24
165
AD25
GNT#
AD25
177
AD26
175
G_RST#
PCI
AD27
AD26
176
AD27
AD28
174
AD28
152
173
AD29
151
DATA
AD29
171
AD30
150
CLOCK
AD30
170
AD31
LATCH
AD31
149
SPKOUT#
IDSEL
182
12
R716 100
AD15
SLATCH 20 PCM_SPK# 27
+3V
Q65
S
2N7002
G
2
D
1 3
R930
0
1 2 +3V_PCMCIA
178
1
148
VCCI
VCCP
VCCP
Power
IRQ/DMA
IRQSER/MFUNC3
INTA#/MFUNC0
INTB#/MFUNC1
SUSPEND#
DMAREQ#/MFUNC2
158
154
155
156
157
PCM_INTB#
PCM_INTA#
1 2
Add by Charles at 3/27
31
64
7
VCC
VCC
VCC
Slot
A
DMAGNT#/MFUNC5
LOCK#/MFUNC4
CLKRUN#/MFUNC6
160
159
161
PCM_RI#
R719 10
SYSON_ALW 30
12
C922 .1UF
+3VALW
86
113
143
164
187
201
VCC
VCC
VCC
VCC
VCC
VCC
GND
RIOUT#/PME#
GND
GND
163
22
13
PCM_PME# 25 CLKRUN# 8,14,15,18
+3VALW
12
C923 .1UF
S1_VCC_R
S2_VCC_R
120
38
VCCA
VCCB
A_A19/CBLOCK#
A_A21/CDEVSEL#
A_A23/CFRAME#
A_BVD1/CSTSCHG
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_INPACK/CREQ#
A_CE1#/CC/BE0#
A_IOWR#/CAD15
A_REG#/CC/BE3#
A_RESET/CRST#
GND
GND
GND
GND
GND
44
75
96
129
153
167
PCM_RI# 17 SIRQ 14,16
C924
.1UF
1 2
W=40mils
W=40mils
C931
1 2
.1UF
A_D0/CAD27 A_D1/CAD29
A_D2/RSVD A_D3/CAD0 A_D4/CAD1 A_D5/CAD3 A_D6/CAD5
A_D7/CAD7 A_D8/CAD28 A_D9/CAD30
A_D10/CAD31
A_D11/CAD2 A_D12/CAD4 A_D13/CAD6 A_D14/RSVD A_D15/CAD8
A_A0/CAD26 A_A1/CAD25 A_A2/CAD24 A_A3/CAD23 A_A4/CAD22 A_A5/CAD21 A_A6/CAD20 A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14 A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A20/CSTOP#
A_A22/TRDY# A_A24/CAD17
A_A25/CAD19
A_CD1#/CCD1# A_CD2#/CCD2#
A_READY/CINT#
A_CE2#/CAD10 A_WE#/CGNT#
A_IORD#/CAD13
A_OE#/CAD11 A_VS1#/CVS1 A_VS2#/CVS2
GND
GND
GND
GND
PCI1420
181
194
207
R720 22K
1 2
2 1
D29 RB751V
R708 0_0805
1 2 1 2
R709 0_0805
U28
141 144 146 83 85 88 90 92 142 145 147 84 87 89 91 93
133 132 131 128 126 125 123 119 104 102 95 100 117 106 108 115 112 103 105 107 109 111 114 116 118 121
138 82
140 135 136 139 127
94 97 110 99 101 98
S1_VS1S2_VS1
134
S1_VS2
122 130
S1_RST
124
+3V
S2_VCC S1_VCC
PCM_SUSP# 24
CARDBUS PCI1420
R711
1 2
47
Placement near to PCMCIA controller
S1_BVD1 20 S1_BVD2 20 S1_CD1# 20 S1_CD2# 20 S1_RDY# 20 S1_WAIT# 20 S1_WP 20 S1_INPACK# 20
S1_CE1# 20 S1_CE2# 20 S1_WE# 20 S1_IORD# 20 S1_IOWR# 20 S1_OE# 20 S1_VS1 20 S1_VS2 20 S1_REG# 20 S1_RST 20
+3VALW
+3V_PCMCIA
12
12
C926
C927
.1UF
.1UF
+3VALW +3VALW
12
C932 1000PF
PCM_INTA#
PCM_INTB#
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
B
401168
Date: Sheet of
12
12
C925 .1UF
C933 1000PF
S1_A23
S1_WP
R714 22K
12
+3VALW
12
C928 .1UF
12
C934 1000PF
12
12
12
R712 22K
1 2
1 2
R713 22K
+3V
R715 22K
D27
RB751V D28
@RB751V
C929 .1UF
C935 1000PF
21
21
S1_VCC
S1_VCC
PIRQA# 8,14,15
PIRQB# 8,14,15,18
1F
19 45Monday, September 10, 2001
Page 23
PCMCIA POWER CTRL.
SOCKETCARDBUS
JP21
A77
a68
A76
S1_CD2#19
S1_WP19
S1_BVD119
S1_BVD219 S1_REG#19
S1_INPACK#19
S1_WAIT#19
S1_RST19 S1_VS219
S1_VPP S2_VPP S1_VCC
S1_RDY#19
S1_WE#19
S1_IOWR#19
S1_IORD#19
S1_VS119 S1_OE#19
S1_CE2#19
S1_CE1#19
S1_CD1#19
S1_CD2# S1_WP
S1_D10 S1_D2 S1_D9 S1_D1 S1_D8 S1_D0 S1_BVD1
S1_A0 S1_BVD2 S1_A1 S1_REG# S1_A2 S1_INPACK# S1_A3
S1_WAIT# S1_A4 S1_RST S1_A5 S1_VS2 S1_A6 S1_A25
S1_A7 S1_A24 S1_A12 S1_A23 S1_A15 S1_A22
S1_A16
S1_A21 S1_RDY# S1_A20 S1_WE# S1_A19 S1_A14 S1_A18 S1_A13
S1_A17 S1_A8 S1_IOWR# S1_A9 S1_IORD#
S1_A11 S1_VS1 S1_OE# S1_CE2# S1_A10
S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S2_D12 S1_D5 S1_D11
S1_D4
S1_CD1#
S1_D3
A75 A74 A73 A72 A71 A70 A69 A68 A67 A66 A65 A64 A63 A62 A61 A60 A59 A58 A57 A56 A55 A54 A53 A52 A51 A50 A49 A48 A47 A46 A45 A44 A43 A42 A41 A40 A39 A38 A37 A36 A35 A34 A33 A32 A31 A30 A29 A28 A27 A26 A25 A24 A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10
a34 a67 a33 GND a66 a32 a65 a31 a64 a30 a63 GND a29 a62 a28 a61 a27 a60 a26 GND a59 a25 a58 a24 a57 a23 a56 GND a22 a55 a21 a54 a20 a53 GND a19 a52 a18 a51 a17 a50 a16 a49 a15 a48 a14 a47 a13 GND a46 a12 a45 a11 a44 GND a10 a43 a9 a42 a8 GND a41 a7 a40 a6 a39 a5
A9
GND
A8
a38
A7
a4
A6
a37
A5
a3
A4
a36
A3
a2
A2
a35
A1
a1
787980
787980
b68 b34 b67 b33
GND
b66 b32 b65 b31 b64 b30 b63
GND
b29 b62 b28 b61 b27 b60 b26
GND
b59 b25 b58 b24 b57 b23 b56
GND
b22 b55 b21 b54 b20 b53
GND
b19 b52 b18 b51 b17 b50 b16 b49 b15 b48 b14 b47 b13
GND
b46 b12 b45 b11 b44
GND
b10 b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
81
PCMC154PIN
81
B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1
S2_CD2# S2_WP
S2_D10 S2_D2 S2_D9 S2_D1 S2_D8 S2_D0 S2_BVD1
S2_A0 S2_BVD2 S2_A1 S2_REG# S2_A2 S2_INPACK# S2_A3
S2_WAIT# S2_A4 S2_RST S2_A5 S2_VS2 S2_A6 S2_A25
S2_A7 S2_A24 S2_A12 S2_A23 S2_A15 S2_A22
S2_A16
S2_A21 S2_RDY# S2_A20 S2_WE# S2_A19 S2_A14 S2_A18 S2_A13
S2_A17 S2_A8 S2_IOWR# S2_A9 S2_IORD#
S2_A11 S2_VS1 S2_OE# S2_CE2# S2_A10
S2_D15 S2_CE1# S2_D14 S2_D7 S2_D13 S2_D6
S2_D5 S2_D11 S2_D4 S2_CD1# S2_D3
S2_CD2# 19 S2_WP 19
S2_BVD1 19
S2_BVD2 19 S2_REG# 19
S2_INPACK# 19
S2_WAIT# 19 S2_RST 19 S2_VS2 19
S2_VCC
S2_RDY# 19 S2_WE# 19
S2_IOWR# 19 S2_IORD# 19
S2_VS1 19 S2_OE# 19 S2_CE2# 19
S2_CE1# 19
S2_CD1# 19
S1_D[0..15]19 S1_A[0..25]19
S2_D[0..15]19
S2_A[0..25]19
S1_VCC
S2_VCC
S1_D[0..15] S1_A[0..25] S2_D[0..15] S2_A[0..25]
C946 .1UF
C949 .1UF
S1_CD1#
S1_CD2#
S2_CD1#
S2_CD2#
1000PF
1000PF
1000PF
C954
1 2
C957
1 2
C958
1 2
C959
1 2 1000PF
LA-736B : C937~C944 USED 0.1UF
RTCCLK5,8,16
C947 .01UF
C950 .01UF
12
C948
4.7UF_10V_0805
C951
4.7UF_10v_0805
C937 C938 C939 C940 C942 C943 C944
1UF 1UF 1UF
1UF 1UF
1UF 1UF
+3V
R983 0
+3VALW
SLDATA19 SLATCH19
RTCCLKA
R721 @100K
RTCCLKA
+5VALW
+12VALW
U29
25
NC
7
12V
24
12V
1
5V
2
5V
30
5V
15
3.3V
16
3.3V
17
3.3V
3
DATA
5
LATCH
4
CLOCK
13
NC
19
STBY#
18 12
OC# GND
TPS2216AI
RTCCLKA 19
+3VALW
C945 .1UF
+3VALW POWER
S1_VPP
C952 .01UF
S2_VPP
C955 .01UF
12
14
2 3 7
RESET
RESET#
1
U30A
74LVC125
12
12
8
AVPP
9
AVCC
10
AVCC
11
AVCC
23
BVPP
20
BVCC
21
BVCC
22
BVCC
6 14
26
NC
27
NC
28
NC
29
MODE
DEV_RST#
C953
4.7UF_25V_1206
C956
4.7UF_25V_1206
R722
TP
10K
S1_VPP
S2_VPP
TPAD1
PCMRST# 24
+3VALW
S1_VPP S1_VCC
12
C936
4.7UF_10V_0805
S2_VPP S2_VCC
12
C941
4.7UF_10V_0805
DEV_RST# 8,10,19PCIRST#5,10,14,15,18,19,21,26
MODIFY BY 10/27/2000
DEV_RST# 8,10,19
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
Size Document Number Rev
B
Date: Sheet of
SCHEMATIC, M/B LA-736/736B/736C 401168
20 45Monday, September 10, 2001
1F
Page 24
IDE & CD-ROM CONNECTORS
+5VS
12
C960 1000PF
Place component's closely IDE CONN.
HDDLED#23
+5VS
PJ1
+5VCD +5VS
+5VCD
2 1
If system is not install OZ 163 then short PJ , otherwise not short.
VCCPAD
CDD[0..15]
Place component's closel y CD-ROM conn.
INT_CD_L22
CD_RSTDRV#22
CD_SIOW#22 CD_SIORDY22 CD_IRQ22 CD_SBA122 CD_SBA022 CD_SCS1#22 CDLED#23,25
12
C971
.1UF
1 2
+5VCD
R745
CDD[0..15] 22
1 2 R994 0
1 2
R734 @10K
12
C972
.1UF
100K
CDLED#
CDLED#
CD_RSTDRV#
R731
10K
R742 470
12
CDD7 CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0
C961 10UF_10V_1206
1 2
R724 @10K
PBIDERST# PBD7
PBD5 PBD4 PBD3 PBD2 PBD1 PBD0
PBDREQ PBDIOW# PBDIOR# PBDIORDY PBDACK# IIRQ14 PBA1 PBA0 PCS1#
+5VS
+5VS
12
12
C965 10UF_10V_1206
12
12
JP22
HDD 44P
PDIAG#
W=80mils
C973 1000PF
12
C962 1UF_25V_0805
12
C964 1000PF
Place component's closely CD-ROM CONN.
JP23
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM CONN.
+5VCD
C963 .1UF
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
R736 100K
12
C968
Place component's closely CD-ROM CONN.
12
C966 1UF_25V_0805
1 2
+5VCD
.1UF
W=80mils
12
C974 10UF_10V_1206
PBD8 PBD9PBD6 PBD10 PBD11 PBD12 PBD13 PBD14 PBD15
PCSEL
PBA2 PCS3#
12
INT_CD_R 22
CD_DREQ 22 CD_SIOR# 22
CD_DACK# 22
12
C969
.1UF
1 2
+5VS
C967 .1UF
12
C975 1UF_25V_0805
+5VS
12
R726 100K
R727
470
+5VCD CD_SBA2 22 CD_SCS3# 22
12
C970
.1UF
CDD[0..15]22
PDD[0..15]15
PCIRST_#
PHDRST#16
PHDD# 25
+5VALW
1
14
IRQ1414,16
+5VALW POWER
PDDREQ15
2 3 7
+5VCD
PCIRST_#
74HCT125 U31A
PCIRST#5,10,14,15,18..20,26
SHDRST#16
CD_AGND 22,26
R733
Place component's closely to rounte trace modille
0
1 2
+5VCD+5VCD
12
C976 .1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
CDD[0..15]
PDD[0..15]
+5VS
D31
1 2
RB717F
R737 82
R739 5.6K
R743 82
R723
1 2
10K
D30
1
3
2
RB717F
PCIRST_#
R732
1 2
10K
3
LA-736B : MOUNT R978,R740
UNMOUNT R981,R982
1 2
1 2
1 2
PBDREQ
PDDREQ
Add by kenny 11/07/2K
PIDERST#
SIDERST#
PDDREQ 15
RP43
SDCS3#15 SDCS1#15 SDA215 SDA015
SDA115
SDIOW#15 SDIOR#15
SDDACK#15
SDDREQ15 SIORDY15 SBDIORDY 22
+5VS +3VS
RP45
PDD0
1
PDD1
2
PDD2
3 4
PDD4
5
PDD5
6
PDD6
7
PDD7
8 9
16P8R-47
PDCS3#15 PDCS1#15 PDA215 PDA015
PDIOW#15 PDIOR#15
PDDACK#15
PIORDY15
+5VS
+3VS
PIDERST# PBIDERST#
SIDERST#IRQ14 IIRQ14
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
1 8 2 7 3 6 4 5
1 2
1 8 2 7 3 6 4 5
1 2
R728 82
1 2
R729 33
IRQ15
1 2
R730 82
1 2
R977 5.6K
1 2
R978 @10K
1 2
R981 10K
PBD0
16
PBD1
15
PBD2
14
PBD3
13
PBD4
12
PBD5
11
PBD6
10
PBD7
PDA115
R738 33
R740 @10K
R982 10K
R741 0
R744 0
8P4R-33 R725
33 RP44
8P4R-33
SDDREQ
RP47 1 8 2 7 3 6 4 5
8P4R-33 R735
1 2
33
RP48 1 8 2 7 3 6 4 5
8P4R-33
1 2
1 2
1 2
1 2
1 2
SCS3# 22 SCS1# 22 SBA2 22 SBA0 22
SBA1 22
SBDIOW# 22 SBDIOR# 22
SBDACK# 22
SBDREQ 22
IIRQ15 22IRQ1514,16
SDDREQ 15
Add by kenny 11/07/2K
SBDIORDY SBDIORDY
FOR M1535+
RP46 1 2
PDD10
3
PDD11PDD3
4
PDD12
5
PDD13
6
PDD14
7 8 9
16P8R-47
PCS3# PCS1# PBA2 PBA0
PBA1
PBDIOW# PBDIOR#
PBDACK#
PBDIORDY
PBDIORDY
Add by kenny 11/07/2K
PBDIORDY
FOR M1535+ RESERVE
16 15 14 13 12 11 10
21 45Monday, September 10, 2001
SBIDERST# 22
of
PBD8PDD8 PBD9PDD9 PBD10 PBD11 PBD12 PBD13 PBD14 PBD15PDD15
1F
Page 25
+5VALW
FOR +5VALW STABLE
EN_5VCD#
12
C991
4.7UF_10V_0805
+5VALW
ISCDROM CD_IRQ CDASPN MODE1
BN_8P4R-10K
GPIO_0 GPIO_1 INTN
D32 BN_RB751V
PLAY# PLAYBTN#
2 1
D33 BN_RB751V
REV# REVBTN#
2 1
D34 BN_RB751V
FRD#
2 1
STOPCD#
2 1
OSC1
C985 BN_10PF
C1176
2.2UF_16V_0805
+5VCD
12
13
D
2
G
S
1UF_25V_0805
C992
1 2
FRDBTN#
D35 BN_RB751V
STOPBTN#
X2
OSC2
BN_8MHZ R758
BN_1M
+5VCD
R768 470
Q70 2N7002
+5VALW
R770
D
10K
S
RP49 1 8 2 7 3 6 4 5
RP50 1 8 2 7 3 6 4 5
BN_8P4R-10K
C986 BN_10PF
BN_10UF_10V_1206
C987
R763 BN_10K
1 2
D36 BN_1N4148
U34
8 7 6
SI4800
EN_5VCD#
13
CDPLAY
2
G
Q74 2N7002
+5VCD
+5VCD
PLAYBTN# 23,25
REVBTN# 23,25
FRDBTN# 23,25
STOPBTN# 23,25
21
S
D
S
D
SGDD
+5VCD
SBA021 SBA121 SBA221
SCS1#21 SCS3#21
SBDIOR#21 SBDIOW#21
SBDIORDY21
IIRQ1521 CD_IRQ 21 SBDREQ21 SBDACK#21
SBIDERST#21
+5VCD
SDATA
+5VCD
SCLK
+5VCD
4.7UF_10V_0805
1 2 3
EN_5VCD
45
C1187
1UF_25V_0805
CD_PLAY 25
R746
CD_SIORDY
BN_1K
CDD[0..15] 21
SBD[0..15] 15
94458
VDD
76
HDD0
78
HDD1
81
HDD2
83
HDD3
86
HDD4
90
HDD5
95
HDD6
97
HDD7
2
HDD8
4
HDD9
8
HDD10
11
HDD11
15
HDD12
18
HDD13
20
HDD14
22
HDD15
68
HDA0
70
HDA1
66
HDA2
63
HCS0
61
HCS1
99
HDIOR#
6
HDIOW#
72
HIOCS16#
93
HIORDY
74
HINTRQ
12
HDMARQ
88
HDMACK#
24
HRESET#
59
HDASPN
48
HSYNC
53
HBIT_CLK
55
HDATA_OUT
50
HDATA_IN
46
DM_ON PLAY# FRD# REV# STOPCD# ISCDROM
DM_ON INTN
10K
10K
C989
HACRSTN
28
PAV_EN
36
PLAY/PAUSE
35
FFORWARD
34
REWIND
37
STOP/EJECT
29
PCSYSTEM_OFF
25
INTN
30
RESET#
26
SDATA
27
SCLK
31
OSCI
32
OSCO
C990 .1UF
VDD
GND
GND
GND
1633658592
C978
BN_.1UF
VDD
CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CDIOR#
CDIOW#
CIOCS16#
CIORDY
CHINTRQ CDMARQ
CHDMACK#
CRESET#
CDASPN
SSYNC
SBIT_CLK
SDATA_OUT
SDATA_IN SACRSTN
PWR_CTL
ISCDROM
GPIO[1]/VOL_UP GPIO[0]/VOL_DN
MODE0 MODE1
PAVMODE
GND
GND
SMC3,23..25,36
EN_5VCD
SMD3,23..25,36
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
CDD[0..15]
SBD[0..15]
R764
R766
12
C988
1 2
SBD0 SBD1 SBD2 SBD3 SBD4 SBD5 SBD6 SBD7 SBD8 SBD9 SBD10 SBD11 SBD12 SBD13 SBD14 SBD15
SBA0 SBA1 SBA2
SCS1# SCS3#
SBDIOR# SBDIOW#
SBDIORDY
IIRQ15 SBDREQ SBDACK#
SBIDERST#
OSC1 OSC2
1UF_25V_0805
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8 CDD9
CDA0 CDA1 CDA2
CCS0 CCS1
CSN
INCN
UDN
Q71 BN_2N7002
D
1 3
1 3
C979 BN_.1UF
U33 BN_OZ163
77 79 82 84 87 91 96 98 1 3 7 10 14 17 19 21
69 71 67
64 62
100 5 73 94
75 13 89
23 60
47 52 54 49 45
51
80 39
40
56 57
38 41
42 43
S
G
2
2
G
D
Q72 BN_2N7002
L40
1 2
BN_HB1M2012-601JT
C980 BN_.1UF
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CD_SBA0 CD_SBA1 CD_SBA2
CD_SCS1# CD_SCS3#
CD_SIOR# CD_SIOW# CIOCS16# CD_SIORDY
CD_IRQ CD_DREQ CD_DACK#
CD_RSTDRV# CDASPN
1 2
R760
1 2
R761 @10K
GPIO_1 GPIO_0
R765 BN_1K
1 2
MODE1
1 2
R767 BN_10K
SCLK
S
BN_10K
+12VALW
1 2
13
D
S
CD_DREQ
CIOCS16#
CD_SBA0 21 CD_SBA1 21
CD_SBA2 21
CD_SCS1# 21 CD_SCS3# 21
CD_SIOR# 21 CD_SIOW# 21
CD_SIORDY 21
CD_DREQ 21 CD_DACK# 21
CD_RSTDRV# 21
+5VCD
+5VCD
R769 10K
Q73
2N7002
EN_5VCD#SDATA
2
G
+5VCD+5VCD_1
R755
1 2
4.7K
SAME LA733
INT_CD_L21
INT_CD_R21
SBDREQ
1 2
R756 5.6K
1 2 R757 4.7K
+5VCD
DM_ON
CD_PLAY_ON#23,25
EN_5VCD# 14
R748 20K
R749 24K
R752 20K
R753 24K
CD_AGND21,26
2
+5VCD
+5VCD
12 12
12 12
+5VCD
13
CDD3 CDD1 CDD2 CDD0
CDD8 CDD9 CDD10 CDD11
AVDD
R759 100K
DM_ON#
Q68 2N7002
AVDD
C981
1 2
2.2UF_16V_0805 R751
C983
@10K
1 2
2.2UF_16V_0805
1 3
DM_ON
DJON_LED#
+5VCD
13
2
RP55
1 2 3 4 5
BN_10P8R_4.7K
RP56
1 2 3 4 5
BN_10P8R_4.7K
12
R747 @10K
INT_CD_L2 R750
@10K
12
INT_CD_R2
12
R754 @10K
Q67
2N7002
2
R762 100K
DM_ON
Q69 2N7002
10 9 8 7 6
10 9 8 7 6
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
12
DM_ON
INT_CD_R2
DM_ON#
INT_CD_L2
+5VCD CDD4 CDD6 CDD5 CDD7
+5VCD CDD12 CDD13 CDD14 CDD15
+5VCD
C977
U32A 74HCT4066
13
U32B 74HCT4066
12
U32C
5
74HCT4066
74HCT4066
6
SBD3 SBD1 SBD2 SBD0 SBD4 SBD6 SBD5 SBD7
SBD8 SBD9 SBD10 SBD11 SBD12 SBD13 SBD14 SBD15
C982
1 2
2.2UF_16V_0805
C984
1 2
2.2UF_16V_0805
TO ESS 1988 INPUT
U32D
RP51 1 8 2 7 3 6 4 5
BN_8P4R-10K
RP52 1 8 2 7 3 6 4 5
B@8P4R-0
RP53 1 2 3 4 5 6 7 8 9
B@16P8R_33
RP54 1 2 3 4 5 6 7 8 9
B@16P8R_0
RP57 1 2 3 4 5 6 7 8 9
B@16P8R_0
TO AMPLIFY INPUT
16 15 14 13 12 11 10
14
.1UF
1 2 7
14 11 10
7
14
4 3 7
14
8 9 7
DM_ON#
PLAY# REV# FRD# STOPCD#
SBIDERST# CD_RSTDRV# SBDREQ CD_DREQ
IIRQ15
SCS3# SCS1# SBA2 SBA0 SBA1 SBDIOW# SBDIOR# SBDACK#
LEFT_EQ 26,28
RIGHT_EQ 26,28
CDROM_R 26
CDROM_L 26
+5VCD
CD_SIORDYSBDIORDY CD_IRQ
CD_SCS3# CD_SCS1# CD_SBA2 CD_SBA0 CD_SBA1 CD_SIOW# CD_SIOR# CD_DACK#
16 15 14 13 12 11 10
16 15 14 13 12 11 10
22 45Monday, September 10, 2001
CDD3 CDD1 CDD2 CDD0 CDD4 CDD6 CDD5 CDD7
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
of
1F
Page 26
+5VS
12
12
C994
C993
.1UF
.1UF
INDEX#16
DSKCHG#16
MTR0#16
FDDIR#16 3MODE#16
STEP#16
WDATA#16 WGATE#16 TRACK0#16
WP#16 RDATA#16 HDSEL#16
FDD_DET#16
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP# FDD_DET# WDATA#
WGATE# TRACK0# WP# RDATA# HDSEL#
ADD BY KENNY 8/18/2000
FDD CONN.
+5VS +5VS
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
FDD_DET#
DOT MATRIX BD CONN.
VOL_DW# VOL_UP# EC_ACT# 51ON# MODE# DJ_ON/OFF# PLAYBTN# FRDBTN# REVBTN# STOPBTN# SMC SMD
CD_PLAY_ON#
BACKLED#
DOT_CLK DOT_DATA DOT_CS# DOT_A0 DOT_PRES#
12
C1000 .1UF
VOL_DW#25
VOL_UP#25
EC_ACT#24
51ON#29,34
LCD_MODE#25
DJ_ON/OFF#25
PLAYBTN#22,25
FRDBTN#22,25
REVBTN#22,25
STOPBTN#22,25
SMC3,22,24,25,36 SMD3,22,24,25,36
+5VALW
CD_PLAY_ON#22,25
BACKLED#25
DOT_CLK25
DOT_DATA25
DOT_CS#25
DOT_A025
DOT_PRES#25
+5VALW+5VALW
12
C1001 .1UF
JP25
1 27
127
282
3
29303
4
4
5
31
5
6
32
6
7
33
7
8
34
8
9
35
9
36
10
37
11
38
12
39
13
40
14
41
15
42
16
43
17
44
18
45
19
46
20
47
21
48
22 232449
50
25
51
26
52
FDD_CONN
USBP2+15 USBP2-15 USBP3+15 USBP3-15
282 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
JP27
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
BN_HEADER 24
1.0mm PITCH
CP12 @8P4C-47P
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP# FDD_DET# WDATA#
WGATE# TRACK0# WP# RDATA# HDSEL#
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
VOL_DW# VOL_UP# EC_ACT# 51ON# MODE# DJ_ON/OFF# PLAYBTN# FRDBTN# REVBTN# STOPBTN# SMC SMD
CD_PLAY_ON#
BACKLED#
DOT_CLK DOT_DATA DOT_CS# DOT_A0 DOT_PRES#
1 8
2 7
3 6
4 5
DSKCHG# INDEX# WP# TRACK0#
+5VS
+5VALW
RP59 1 8 2 7 3 6 4 5
@8P4R-27
1 2
R771 1K
DTC124EK
+3VS
DRV0#16
1 8
2 7
RP58
1 8 2 7 3 6 4 5
8P4R-1K
Q75
2
RP60 @8P4R-15K
3 6
4 5
+5VS
RDATA#
DRV_0#
22K
22K
DRV0#
BT_WAKE_UP24
+3VALW
SWITCH BOARD CONN.
12
C997 .1UF
+5VALW
12
12
+5VCD
12
C998 .1UF
ON/OFFBTN# 24
R772
100K
J4
+5VALW+5VS
12
12
C995
C996
.1UF
.1UF
SCROLLED#24
NUMLED#24
CAPSLED#24
CDLED#21,25
13
INT_MIC27
DISPOFF#8
DAC_BRIG24
INVT_PWM24
GND-MIC
+5VALW
INVPWR
JP26 1 2 3 4 5 6 7 8
DRV_0#
Place in Closest JP26 Place in Closest JP26
GND-MIC
9
10 11 12 13 14 15 16 17 18 19 20
R1022
1 2
0
FOR EMI REQUEST Change By 2/26
AGND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
HEADER 40
R1023
1 2
@0
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
+5VS +5VALW
+5VCD
ON/OFFBTN#
SUSPBTN# 25 USER_BTN1# 25 USER_BTN2# 25 USER_BTN3# 25 USER_BTN4# 25 LID_SW# 24,25 EC_ACT# 24HDDLED#21
SMC SMD
GND
51ON# 29,34
ON/OFFBTN#
INT SPK CONN.
JP28
SPKR+27 SPKR-27 SPKL+27 SPKL-27
1 2 3 4
HEADER 4
1 2 3 4
LINE OUT CONN.
JP29
LINE_OUT_PLUG27,28
LINEOUT_R27 LINEOUT_L27
12
C1190
47PF
12
C1191
47PF
12
C1192
47PF
FOR EMI REQUEST
BLUETOOTH CONN.
BT_DET25
BT_RST#25
12
C1002
@.1UF
JP31
12 34 56 78 910
121411 13 15 16 171918
20
@AXN420530P
+5VALW
1
1
2
2
3
3
4
4
5
5
6
6
HEADER 6
Place in Closest JP9
AGND GND
ADD By EMI Requestment
BT_ON# 25 BT_PRE# 24
R997
1 2
0
PS2_DATA24
PS2_CLK24
INT_KBD CONN.
KSO[0..15]24
KSI[0..7]24
KSI1 KSI6 KSI4 KSO0 KSI3 KSO1 KSO2 KSO7 KSO6 KSO12 KSO14 KSO10
KSO2 KSO4 KSO7 KSO12 KSO8
KSO0 KSO5 KSO1
D37
1
DAN217
D38
1
DAN217
KSO[0..15] KSI[0..7]
JP24
1
1
3
3
5
5
7
7
9
9
10
11
11
12
13
13
14
15
15
16
17
17
18
19
19
20
21
21
22
23
23
24
INT_KB_CONN.
CP8 1 8 2 7 3 6 4 5
8P4C-220PF
CP10 1 8 2 7 3 6 4 5
8P4C-220PF
NEED CLOSEST JP20 ADD BY EMI REQUEST
Modify By 12/28/2K EMI Requestment
KSI7
2
2
KSO9
4
4
KSI5
6
6
KSI2
8
8
KSO5
10
KSI0
12
KSO4
14
KSO8
16
KSO3
18
KSO13
20
KSO11
22
KSO15
24
KSO6 KSO3
KSO13
KSO14KSO9 KSO11 KSO10 KSO15
TOUCH PAD CONN.
3
+5VS
+5VS
2
TPAD_ON/OFF#25
TPAD_LED#25
3
+5VS
2
1 2 3 4 5 6 7 8
HEADER 8
CP9 1 8 2 7 3 6 4 5
8P4C-220PF
CP11 1 8 2 7 3 6 4 5
8P4C-220PF
JP30
1 2 3 4 5 6 7 8
12
C999 .1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
23 45Monday, September 10, 2001
of
1F
Page 27
EC_HPOWON29
CRY1
12
C1013 10PF
IRQ114,16 IRQ8#16
IRQ1214,16
+5VALW
R785
1 2
22M
X3
32.768KHZ
R781 100K
12
C1005
.1UF
R780 10K
1 2
+RTCVCC
1 2
CRY2
12
1 2 12
C1006 .1UF
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13
KSO15
R786 51K
C1014 33PF
36 35 34 33 32 31 30 29
56 55 54 53 52 51 50 49 48 47 42 41 40 39 38 37
156 155 154 153
79
165
28
+5VALW
12
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
IRQ1 IRQ8# IRQ11 IRQ12
PFAIL# HPWRON VBAT
INVT_PWM23
PCM_SUSP#19
C1007
1000PF
RING#17
SMC3,22,23,25,36 SMD3,22,23,25,36
ON/OFFBTN#23
SCROLLED#23
CB-1608D-800T
12
C1008
C1009
.1UF
1000PF
242666
GND
GND
GND
Environment ENV0 ENV1
IRE
IRD
Development
SHBM#(Shared/Non-Shared BIOS Memory)
1
0
HDEN#(Host Device Enable)
Mode
Device are enabled o reset
Devices are disabled on reset
32KX1
32KX2
252712
CRY1 CRY2
SA18
KBA18
SMC SMD
G20 RCL#
NUMLED#23
CAPSLED#23
EC_ACT#23
A20M#3,15
SA[0..19]14,16
SD[0..7]14,16
W= 30mils
L25
12
109
1602367
VCC
VCC
GND
GND
(P136)
Non Shared Memories
Shared Memories
(P111)
PE0/HA18
PE1/A18
PB0/RING
PB1/SCL
136717273747576777861626370695860575981
EC_ACT#
D43
2 1
@RB751V
12
C1004
.1UF
R774
0
W=60mils
12
C1010 1000PF
ECAGND
108
1619192
80
VCC
VCC
AVCC
AGND
AVREF
(P104) (P103)
00
01
PB2/SDA
PB3/TA
PB4/TB
PB5/GA20
PB6/HRSTO
PB7/SWIN
PC0
PC1
PC2
G20
MODIFY BY EMI
SA0
SA1
SA2
166
167
168
HA0
HA1
HA2
PC3/EXINT0
PC4/EXTINT11
PC5/EXINT15
646568
KSI[0..7]23
KBA[0..18]25
ADB[0..7]25
KSO[0..15]23
KSI[0..7]23
SA3
SA6
SA4
SA8
SA5
SA7
169
170
171
172
173
174345678910111516171819202122157
HA3
HA4
HA5
HA6
HA7
HA8
01
HDEN#
1
0
PC6/PSCLK3
PC7/PSDAT3
PSCLK1
PSCLK2
PSDAT1
2
G
Q78 2N7002
S
IOCHRDY
2434445468788
NCNCNCNCNCNCNC
NC
133
132
131 1
90
PC87570-176PIN
51ON 29 ACOFF 34
R773
1 2
100K
BIOSCS#
A13/BE0 A14/BE1 A15/PG1 A16/PA5 A17/PA6
SEL0#
WR0#
PG0/SELIO#
PG2/CLK PG3/SEL1# PG4/WR1#
PF0/D8
PF1/D9 PF2/D10 PF3/D11 PF4/D12 PF5/D13 PF6/D14 PF7/D15
NCNCNCNCNC NC
NC
175
134
176
A10 A11 A12
RD#
HMR
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
D0 D1 D2 D3 D4 D5 D6 D7
+12VS
BIOSCS# 16
MEMR# 14,16
MEMW# 14,16 AEN 16
IOR# 14,16 IOW# 14,16 IOCHRDY 14,16,18
U36
KBA0
114
KBA1
115
KBA2
116
KBA3
117
KBA4
118
KBA5
119
KBA6
120
KBA7
121
KBA8
122
KBA9
123
KBA10
124
KBA11
125
KBA12
126
KBA13
127
KBA14
128
KBA15
129
KBA16
130
KBA17
135
ADB0
137
ADB1
138
ADB2
139
ADB3
140
ADB4KSO14
141
ADB5
142
ADB6
143
ADB7
144
HDEN#
111
HRMS#
105 112
SELIO#
110
VGASUSP#_1
107
PCMRST#
106
ATFOUT#
113
HPID0
145
HPID1
146 147 148 149
SYSON
150
ACIN
151
BKOFF#
152 164
13
D
S
Q79 2N7002
BATT_TEMP
LI/NIMH#
+5VALW
IOCHRDY
R782 0
2
G
D
S
C1011 .01UF
C1012 .01UF
R787 10K R788 10K
SYSON
1
FREAD# 25 FSEL# 25 FWR# 25
SUSA# 16 SUSB# 16 SUSC# 16
ACIN 16,33,34 BKOFF# 8
12
R783
13
100K
2
G
Q80 2N7002
1 2
1 2
TP4
SA[0..19] SD[0..7] KSI[0..7] KBA[0..18] ADB[0..7] KSO[0..15] KSI[0..7]
SA14
SA9
SA15
SA10
SA11
SA13
SA12
SA16
SA17
SD0
HA9
HA10
HA11
HA12
HA13
HRMS#(Host Reset Mode Select)
Mode HRMS#
Reset host when shared memory access can not be completed
Extend access until completed
FXBUSEN#(FX Bus Interface Enable)
Mode FXBUSEN#
FX Bus Interface Enabled
ISA Bus Compatible Mode
PSDAT2
PD0/AD0
PD1/AD1
82838485869394
1 2
R784 10K
+5VALW
BATT_TEMP EXT_DATA EXT_CLK KBD_DATA KBD_CLK PS2_DATA PS2_CLK
HD0
HA14
HA15
HA16/PA3
HA17/PA4
(P105)
(P130)
TRIS(TRI-STATE)
0
1
PD2/AD2
PD3/AD3
PD4/AD4
PD5/AD5
PD6/AD6
PD7/AD7
M_SEN#
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
SD2
SD1
SD3
HD1
HD2
DA0
DA1
959697
LI/NIMH#
SD4
SD5
SD6
HD3
HD4
HD5
HD6
DA2
DA3
98
BATT_TEMP 36 EXT_DATA 29 EXT_CLK 29 KBD_DATA 29 KBD_CLK 29 PS2_DATA 23 PS2_CLK 23
2N7002
Q76
1 3
SD7
HD7
PH1/BST1
PH0/BST0
103
104
2
D
162
163
HMEMCS#/PA0
HMEMRD#/PA1
(P102)
Normally
TriState
PH3/PFS#
PH2/BST2
101
10299100
G
S
2
G
1 3
D
S
Q77 2N7002
1 3
D
13
158
159
14
HIOR#
HIOW#
HIOCHRDY
HMEMWR#/PA2
HAEN/FXASTB#
1
0
1
0
PH5/ISE#
PH4/PLI#
NC
89
570SCI# ECSMI#
TRIS ENV1 ENV0
DAC_BRIG 23 DAC_CONTR 8 EN_DFAN 30 TRICKLE 34
LI/NIMH# 34,36 BT_PRE# 23
BT_WAKE_UP 23 M_SEN# 8,9
HPID1 HPID0 PLATFORM
0 1 LA-736 0 0 NONE 1 0 LA-733 1 1 LA-733L
+3VALW
14
1 2
SYSON 30
Power Now for C3
SELIO# 25
PCMRST# 20
51RST 25,29
12
12 12
+5VS
+5VALW
GATE_RST# 25
ECAGND
HPID0 HPID1
Title
Size Document Number Rev
Date: Sheet of
1 2
C1003 .1UF
U35A 74LVC14
4
ECSMI#
ATFOUT#
VGASUSP#_1
570SCI#
ENV1 KBA15 KBA16 ENV0 KBA17
BIOSCS# EXT_DATA PS2_CLK EXT_CLK
+5VALW
+5VALW
HDEN# SELIO# SMC RCL# SMD
U30B
5 6
74LVC125
D39
RB751V
D40
RB751V
D41
RB751V
RP61 10P8R_10K
10
9 8 7 6
RP62
10
9 8 7 6
10P8R_10K
RP63 1 8 2 7 3 6 4 5
8P4R-10K
RP64
10
9 8 7 6
10P8R_4.7K
+3V
21
+3V
21
+3V
21
EXTSMI#
+3VALW POWER
R775
10K
1 2
R776 10K
1 2
12
R777 10K
SCI#
1 2 3 4 5
1 2 3 4 5
VGASUSP#_1 SUSP#
M_SEN#
1 2 3 4 5
Modify by 1/20/2K
HRMS# ECSMI# KBA18
KBD_DATA KBD_CLK PS2_DATA
+5VS
EC_ACT# BKOFF# G20
+5VALW
Compal Electronics, inc.
SCHEMATIC, M/B LA-736/736B/736C 401168
EXTSMI# 16
CPU_DECT# 32
VGA_SUSP# 8
SCI# 16
SUSP# 17,25,30 LID_SW# 23,25
24 45Monday, September 10, 2001
1F
Page 28
6
CDLED#21,23
PHDD#21
LID_SW#23,24
U39C
74HCT32
8
14
4 5
7
10UF_10V_1206
1 2
C1024
C1026
1 2
.1UF
32
FWE#
31 30 29 28 27 26 25 24 23 22
ADB7
21 20
ADB5
19
ADB4
18
ADB3
17
+5VALW
CC
U44B
74HCT32
+5VALW
12
R789 100K
PLAYBTN#
REVBTN# FRDBTN#
STOPBTN#
LID_SW# PME_51#
DD
DJ_ON/OFF# VOL_UP# VOL_DW#
6
+5VALW
12
R794 100K
1 2
FREAD# 24 FSEL# 24
+5VALW
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
+5VALW
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
+5VALW
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
R797
@0
8
+5VALW POWER
R800
1 2
20
VCC
GND
10
20
VCC
GND
10
20
VCC
GND
10
U44C
74HCT32
0
1 2
U37
74HCT244
C1018 .1UF
1 2
U40
74HCT244
C1021
1 2
.1UF
U42
74HCT244
C1015
.1UF
.1UF
+5VALW
C1016
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
14 9
10 7
MMO_ON
PCM_PME#19
MDM_PME#18
AUD_PME#26
PLAYBTN# REVBTN# STOPBTN# FRDBTN#
51RST 24,29
11
U44D 74HCT32
LID_SW#
EC_LID#
+5VALW
R790 1K
1 2
R791 @0
1 2
R793 0
1 2
RP65
10
9 8 7 6
10P8R_10K
+5VALW
14 12
13 7
VR_ON 4,35
U39A
74HCT32
KBA4 SELIO# LARST#SELIO#
C1023
1 2
.1UF
KBA6 SELIO#
+5VALW
14
1 2
7
14 12
13
7
+5VALW
14
1 2
7
R792
1 2
20K
U39D
74HCT32
74HCT32
KBA3 SELIO#
D44
21
RB751V
+3VALW
D45
21
RB751V
D46
21
RB751V
D47
21
RB751V
DJ_ON/OFF#
1
VOL_UP#
2
VOL_DW#
3 4 5
12
R798 100K
2
1 3
D
R799
1 2
100K
G
Q81
S
2N7002
FWR# 24
12
R795 100K
+5VALW
LIDSW# 16
PME_51#
+12VS
FLASH# 16
U44A
3
11
3
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
AA
LARST#
C1017
1 2
1UF_25V_0805
ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
BB
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
LARST#
13 12 14 15 17 16 18 19
11
13 12 14 15 17 16 18 19
11
1 2
20
3 4 5 7 6 8 9
1
3 4 5 7 6 8 9
1
U38
Q0
D0 D1 Q1
VCC D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7
CLK CLR
GND
74HCT273
10
+5VALW
1 2
20
U41
Q0
D0 D1 Q1
VCC D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7
CLK CLR
GND
74HCT273
10
+5VALW
20
D0 D1 Q1
VCC D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7
CLK CLR
C1025
1 2
.1UF
SMC3,22..24,36 SMD3,22..24,36
Q0
GND
10
+5VALW
U43 3 4 5 7 6 8 9
13 12 14 15 17 16 18 19
11
1
2
C1019
.1UF
2
C1022
1 2
.1UF
2
74HCT273
12
R801 1K
MMO_ON
EC_LID#ADB0
8 7 6 5
U45
VCC WC SCL SDA
NM24C164
ON/OFF_EC# 16 BT_DET 23 FSTCHG 34
BT_ON# 23 EN_WOL# 18 RSMRST_570# 29
ADD BY 8/18/2000
EC_MUTE 27 51RING# 16 CD_PLAY 22 SUSP# 17,24,30 GATE_RST# 24 CD_PLAY_ON# 22,23 BEEP# 27
TPAD_LED# 23 BACKLED# 23 DIS_ADJVOL 27 ADJVOL_UP/DW# 27 DOT_CLK 23 DOT_DATA 23 DOT_CS# 23 DOT_A0 23
1
A0
2
A1
3
A2
4
GND
+5VALW
12
12
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
25 45Monday, September 10, 2001
of
INPUT OUTPUT
PLAYBTN#22,23
MUTE_MIC26 ATF#3
REVBTN#22,23 BT_RST# 23
FRDBTN#22,23
ENVEE8
STOPBTN#22,23
U39B
74HCT32
C1020.1UF
KBA2
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
+5VALW
12
KBA[0..18] ADB[0..7]
U46
NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
29F040
14
4 5
7
DOT_PRES#23
LCD_MODE#23
TPAD_ON/OFF#23
14
9
10
7
USER_BTN1#23 USER_BTN2#23 USER_BTN3#23 USER_BTN4#23 SUSPBTN#23 DJ_ON/OFF#23 VOL_UP#23 VOL_DW#23
KBA5
SELIO#
VCC
WE* A17 A14 A13
A8
A9 A11 OE* A10
CE* DQ7 DQ6 DQ5 DQ4 DQ3
KBA1
SELIO#24
KBA[0..18]24
ADB[0..7]24
SELIO#
KBA18 KBA16 KBA15 KBA17 KBA12 KBA14 KBA7 KBA13 KBA6 KBA8 KBA5 KBA9 KBA4 KBA11 KBA3 KBA2 KBA10 KBA1 KBA0 ADB0 ADB6 ADB1 ADB2
R796 100K
R802 1K
1F
Page 29
12
C1027
4.7UF_10V_0805
MD_SPK18 MD_MIC18
CD_AGND21,22 CDROM_L22 CDROM_R22
C1028 .1UF
C1032 10PF
NPO
49.152 MHz
C1033 12PF
NPO
C1049 1000PF
12
C1056 .1UF
12
Y3
C1034 1500PF
NPO
R809 6.8K
R812
R813 R814 R815
C1050
1000PF
12
12
C1057 .1UF
AVDD+5VS
12
R808 390
12
L26
LK1608-1R0K
12
R810 0
R811
12
0
12
6.8K 12
6.8K 12
6.8K
12
C1051
10UF_10V_1206
12
C1058
C1059
.1UF
.1UF
C1029 .1UF
MICIN
12
4.7UF_10V_0805
12
12
12
0
C1052 .1UF
12
C1060 .01UF
C1030
12
R805 1M
MICIN27
CD_GNA
LEFT_EQ22,28
RIGHT_EQ22,28
12
C1053
10UF_10V_1206
12
12
C1061 .01UF
MONO_IN27
1 2
C1035 1UF
MICIN
1 2
C1039 2.2UF_16V
1 2
C1041 2.2UF_16V
1 2
C1042 2.2UF_16V
C1054 .1UF
AGND
+3VS
12
C1062
C1063
10UF_10V_1206
.01UF
12
@22PF
1 2
C1036 1UF
1 2
C1037 1UF
1 2
C1038 1UF
1 2
C1040 2.2UF
1 2
C1043 2.2UF_16V
1 2
C1044 2.2UF_16V
IAC_BITCLK
C1031
FOR EMI REQUEST
AD[0..31]5,15,18,19,31
C/BE#[0..3]5,15,18,19
AD[0..31] C/BE#[0..3]
NEAREST U31
For Fix S4 issue
IAC_SYNC18
IAC_BITCLK18
IAC_SDATAO18
MUTE27
MUTE_MIC25
SYSVOL_UP#16
SYSVOL_DW#16
57
OSCI OSCO
64
PC_BEEP
65 83
PHONE AVDD2
81
MONO_OUT
69
MIC
67
CD_GND
66
CD_L
68
CD_R
70
LINE_IN_L
71
LINE_IN_R
79
LINE_OUT_L
80
LINE_OUT_R
75
AFILT1
76
AFILT2
77
VCM
78
VREFADC
73
AVSS1
82
AVSS2
89
GND
40
GND
21
GND
3
GND
AD0
38
AD0
IAC_BITCLK
AD2
AD1
AD1
AD2
46
AD3
GD4
AD3
AD4
44
GD3 / ECLK / VOLDN#
AD4
AD5
GD2 / EDIN / VOLUP#
AD5
AD6
42
435845
GD1 / EDOUT
AD6
31323334353637
AD7
R804 22
GD0
AD8
AD7
29
AD9
AD8
AD9
AD10
GPIO15 / GD7
AD10
AD11
474849
GPIO14 / GD6
AD11
AD12
63
GPIO13 / GD5
AD12
AD13
12
GPIO12 / PCGNT# / GTO# / GS0
AD13
AD14
GPIO11 / SDO2 / VauxD
AD14
22232425262728
AD15
606162
GPIO9 / SDFS2
GPIO10 / SCLK2
AD16
AD15
11
AD17
AD16
56
GPIO8 / SDI2
GPIO6 / ISDATA / R0#
GPIO7 / MC97_DI / PCREQ# / VOLUP#
AD19
AD18
AD17
AD18
AD20
AD19
R803 47
R806 @3.3K
1 2
5950515253
85
84
GPIO2 / TXD
GPIO3 / SRESET2
GPIO4 / ISCLK / SIRQ#
GPIO5 / ISLR / GS0 / GT0#
AD23
AD22
AD21
AD20
45678910
100
AD24
AD21
AD23
AD22
GPIO1 / RXD
AD24
+3VS
PME# / SPDIFO / VOLDN#
SPDIFO / R0# / IDSEL
AD28
AD27
AD26
AD25
AD25
AD27
AD28
AD26
12
1 2
39
CLKRUN# / ECS
AD29
AD29
R807 10K
AD30
IAC_SDATAI 18
AVDD1
VREF
REQ# GNT#
PCICLK
C/BE3# C/BE2# C/BE1# C/BE0#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
VAUX
AD31
AD30
93949596979899
AD31
IAC_RST# 18
U47
ES1988
90
VCC
41
VCC
12
VCC
72
74
92 91
88 87
INT#
86
RST#
1 13 20 30
54 2 19
PAR
18 17 16 15 14 55
+3VS
AVDD
AUD_VREF
PCLK_AUD
R817 100
+3VALW
R816 0 AD19
12
L27 @0_0805
1 2
L28 @0_0805
1 2
L29 @0_0805
Modify By 3/7
REQ#2 5 GNT#2 5
PCLK_AUD 7 PIRQC# 8,14,15
PCIRST# 5,10,14,15,18..21 C/BE#3 5,15,18,19
C/BE#2 5,15,18,19 C/BE#1 5,15,18,19 C/BE#0 5,15,18,19
12
AUD_PME# 25
PAR 5,15,18,19 STOP# 5,15,18,19 DEVSEL# 5,15,18,19 TRDY# 5,15,18,19 IRDY# 5,15,18,19 FRAME# 5,15,18,19
12
+3VALW
12
C1045 1UF
12
C1046 .1UF
12
R818 33
12
C1055 22PF
AUD_VREF
PCLK_AUD
12
12
C1048
C1047
.1UF
1UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
26 45Monday, September 10, 2001
of
1F
Page 30
SPKR+23 SPKR-23
SPKL+23 SPKL-23
Control by headphone out
LINE_OUT_PLUG23,28
R831 0
MUTE26
EC_MUTE25
PCM_SPK#19
1 2 1 2
R833 @0
BEEP#25
SPKR+ SPKR­SPKL+ SPKL-
RIGHT28
LEFT28
R834 10K
+5VAMP
LINE_OUT_PLUG
1 2
1 2
10
U30C
9 8
74LVC125
+3VALW POWER
RIGHT
LEFT
R825 10K
1 2
+5VALW
C1076
.1UF
2 1
3 5
R835 10K
+3VALW
12
R838 100K_1%
R843
1 2
DTC124EK
R819 0
1 2
R820 @0
1 2
R821 0
1 2
R822 @0
1 2
10K_1%
22K
2
B
22K
SPKR16
2.2UF_0805
2.2UF_0805
R826 0
1 2
12
R829
10K
MUTE_AUD
4
U50 NC7ST32_SC70
+3VALW
14
3 4
12
C1083
0.22UF
+3VALW 12
R849
2.2K
13
Q88
C
E
14
5 6
C1069
1 2
C1070
1 2
U35B 74LVC14
+3VALW
R828 10K
1 2
1 2
U35C 74LVC14
C1064 .1UF
C1086
1UF
+5VAMPP
17
15
4
5
C1081 1UF
1 2
C1089
1 2
RLINEIN
LLINEIN
HPS
MODE
1UF
C1065 .1UF
1 2
R850
1 2
560
R851
1 2
560
1 2
8
13
VDD2
GND2
GND1 VDD1
1 3
R844 560
VDD3
R_UP/DOWN#
L_UP/DOWN#
GND3
L39 HB1M2012-601JT
12
C1066
4.7UF_10V_0805
U48
18
VDD4
ROUT+
ROUT-
LOUT+
LOUT-
GAINSEL
SVR
GND4
201110
TDA8552TS
2
12
R852 10K
+5VAMP
Q123
C1067
4.7UF_10V_0805
2
1 3
1 3
Q127
2
R827 2.2K
1 2
C1078 .1UF
C1082
12
1UF
2N7002
2
1 3
Q124 SI2304DS
1 3
C1079
2.2UF_0805
12
R847 10K
3 1
R993
1 2
2
100K
Q126 SI2304DS
2
74HCT125
C1084
1UF_25V_0805
U31B
+5VALW POWER
+12VALW
C1068
+
1 2
150UF_6.3V_D
SPKR- 23
C1071
+
1 2
150UF_6.3V_D
SPKL- 23
4
56
+5VAMP
R830
1 2 13
D
S
Q83 2N7002
LINEOUTR
LINEOUTL
10K
LINE_OUT_PLUG
2
G
MONO_IN 26
SPKR+ 23 LINEOUT_R 23
SPKL+ 23 LINEOUT_L 23
DIS_ADJVOL 25
ADJVOL_UP/DW# 25
MICIN26
INT_MIC23
AUD_VREF
L41
1 2
HB1M2012-601JT
C1188 470PF
MIC
AVDD
3
+
2
-
AVDD
U49B
@TDA1308
7
R836
1 2
0 C1080
1 2
@15PF
AVDD
FOR PC99
12
12
R841
R842
18K_1%
18K_1%
12
12
R846
C1085
100K
1UF
L30
CB-1608D-601T 1 2 1 2
L31
CB-1608D-601T
MODIFY BY EMI REQUESTMENT
EC_MUTE25
12
INTSPK_R+
12
Q125 SI2304DS
INTSPK_R-
19
INTSPK_L+
2
INTSPL_L-
9
SI2304DS
6
7
14 16
AVDD
12
R840 10K
12
R845 10K
1
Q87 2SC2411EK
3
D48 RB751V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
2 1
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
AVDD
1
Q82
2
2SC2411EK
3
@0
C1077
JP32
GND-A
1 2
C1074 10UF_10V_1206
1 2
MIC
1UF
+12VS
??
FOXCONN JA6033L-101
R995
1 2
0
R824
2.2K
7
8
EXT. MIC
Place in Closest JP32 R996
1 2
@0
GND AGND
Modify By 3/7
27 45Monday, September 10, 2001
C1075 @.1UF
R832
@0
Q84 SI2304DS
S
G
D
S
AVDD
12
C1088 330PF
2 13
1 3
BIAS
R823
1 2
12
C1073 @.1UF
1 2
D
13
R837
1 2
100K
MUTE_AUD
2
G
Q86 2SC2411EK
5 4 3
6 2 1
Place in Closest JP32
GND-A
C1072
1 2
@.1UF
84
U49A
@TDA1308
1
12
84
5
+
6
-
Title
Size Document Number Rev
Date: Sheet of
1 2
Q85
2N7002
BIAS
2
R848
2.2K
12
12
C1087 330PF
Compal Electronics, inc.
SCHEMATIC, M/B LA-736/736B/736C 401168
1F
Page 31
R862
1.5K_1%
R866
1.5K_1%
R878
1.5K_1%
R882
1.5K_1%
+5VAMP
1 2
1 2
+5VAMP
1 2
1 2
LINE_OUT_PLUG23,27
EQ_L_INPUT1 EQ_L_INPUT2 EQ_L_INPUT3 EQ_L_INPUT4 EQ_L_INPUT5
C1202
4.7UF
EQ_R_INPUT1 EQ_R_INPUT2 EQ_R_INPUT3 EQ_R_INPUT4 EQ_R_INPUT5
C1203
4.7UF
C1184
1UF
C1185 1UF
C1101 1UF
C1113 1UF
+5VEQL
3 5
7 10 12 14
+5VEQR
3
5
7 10 12 14
2
Q90
2N7002
C1093 .1UF
U51
IN1 IN2 IN3 IN4 IN5 IN6
C1104 .1UF
U53
IN1 IN2 IN3 IN4 IN5 IN6
+5VCD
216
5VGND
216
5VGND
12
R891 10K
1 3
L37
1 2
HB1M2012-601JT
C1094 10UF_10V_1206
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6
SUM_OUTREF
LMV801
L38
1 2
HB1M2012-601JT
C1105 10UF_10V_1206
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6
SUM_OUTREF
LMV801
+5VCD
12
R890 10K
1
2
Q89
3
2N7002
1 4 6 11 13 15 98
1 4 6 11 13 15 98
+5VAMP
OUT1_L OUT2_L OUT3_L OUT4_L OUT5_L
EQ_IN_L
+5VAMP
OUT1_R OUT2_R OUT3_R OUT4_R OUT5_R
EQ_IN_R
HPS_PLUG
HPS_DIS
LEFT_EQ22,26
RIGHT_EQ22,26
RIGHT_EQ
C1118
EQ_IN_R
1 2
.1UF
14
4 3 7
14
8 9 7
1 2
R892 @0
R887 @0
5
6
LEFT_EQ
RIGHT_EQ
RIGHT
+5VCD
U52C 74HCT4066
U52D 74HCT4066
C1095
2.2UF
EQ_IN_L
C1109
2.2UF
1 2
HPS_PLUG
HPS_DIS
C1106 1500PF
1 2
140K_1%
RIGHT 27
C1090 1500PF
1 2
R856
140K_1%
R859
140K_1%
1 2
R863
1 2
@0
14
1 2 7
13
U52A 74HCT4066
14 11 10
7
12
U52B 74HCT4066
R871
1 2
@0
1 2
R875
1 2
R879
140K_1%
1 2
C1096
1 2
1500PF
C1110
1500PF
LEFTLEFT_EQ
EQ_L_INPUT1
R853
560K_1%
1 2
OUT1_LL_EQ
536HZ +6dB Q=1.41
EQ_R_INPUT1
R872
560K_1%
1 2
OUT1_RR_EQ
536HZ +6dB Q=1.41
C1091 470PF
1 2
R857
C1099 82PF
R867
75K_1%
C1107 470PF
R876
C1114 82PF
R885
200K_1%
1 2
1 2
75K_1%
1 2
1 2
200K_1%
1 2
1 2
75K_1%
1 2
1 2
R860
1 2
R869
1 2
R880
1 2
R888
1 2
220K_1%
LEFT 27
1 2
R_EQ OUT2_R
1 2
220K_1%
R_EQ
1 2
75K_1%
C1097
470PF
C1102
82PF
C1111
470PF
C1116
82PF
EQ_L_INPUT2
R854
220K_1%
1 2
OUT2_LL_EQ
2230HZ
-6dB Q=0.72
EQ_L_INPUT4
R864
300K_1%
1 2
OUT4_LL_EQ
18299HZ +6dB Q=1.41
EQ_R_INPUT2
R873
220K_1%
1 2
2230HZ
-6dB Q=0.72
EQ_R_INPUT4
R883
300K_1%
1 2
OUT4_R R_EQ OUT5_R
18299HZ +6dB Q=1.41
C1092 330PF
1 2
C1098
R858
R868
C1108 330PF
R877
C1115 220PF
R886
1 2
1 2
R861
200K_1%
1 2
1 2
R870
39K_1%
1 2
R881
200K_1%
1 2
1 2
R889
39K_1%
1 2
1 2
330PF
C1103
220PF
C1112
1 2
330PF
C1117
1 2
220PF
1 2
7646HZ +1.45dB Q=1.59
1 2
200K_1%
C1100 220PF
1 2
127K_1%
R_EQ OUT3_R
1 2
200K_1%
1 2
127K_1%
EQ_L_INPUT3
R855
200K_1%
1 2
OUT3_LL_EQ
3410HZ
-6dB Q=0.707
EQ_L_INPUT5
R865
300K_1%
OUT5_LL_EQ
EQ_R_INPUT3
R874
200K_1%
1 2
3410HZ
-6dB Q=0.707
EQ_R_INPUT5
R884
300K_1%
1 2
7646HZ +1.45dB Q=1.59
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
28 45Monday, September 10, 2001
of
1F
Page 32
+3V
R893 10K
1 2
12
PWROK 12
R896 @10K
C1119 1UF
12 11
R894
1 2
@ 0
5 3
C1120
1 2
.1UF
MR# PFI
+3VS
12
VCCGND
U54 MAX6342
RST#
PFO#
6
4
VR_POK7,32
VR_POK
+3VS
R895
1 2
10K
U35D
14
74LVC14
9 8
13
U30D
74LVC125
+3VALW POWER
MODIFY BY 12/14/2K
+3VALW POWER
R957
1 2
1K
13
U31D
74HCT125
12 11
C1121
10PF
1 2
+CPU_CORE
9 8
+5VALW POWER
10
U31C
74HCT125
+5VALW POWER
12
R897
4.7K
EC_HPOWON 24
SPWROFF# 16,32,35
+3VS
R960 10K
1 2
13
Q120
C
RSMRST_570#25
R899
0
22K
B
C1127
@0.47UF
C
22K
14 11 10
13
Q92
E
R900
1 2
@330K
+5VALW
12
51ON24
1 2
R901
4.7K
R902 33K
1 2 12
2
DTC124EK
PWR ON CKT
+3VALW
U35E 74LVC14
51ON# 23,34
12
C1133 1000PF
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
U35F
14
74LVC14
13 12
+3VALW POWER+3VALW POWER
D53
12
RLZ20A
2 1
RSMRST# 16
SW1 1 2 3 4
RESET BTN
+3VS
+5V
C1123
C1122
1 2
.1UF
.1UF
1 2
Reset Button
+5VALW
2
C1134
R903
4.7K
31
10K
10K
51RST
Q91 DTA114EK
51RST 24,25
D52
1N4148
2 1
12
1UF_25V_0805
1 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+3VS
+3VS +3V
12
C1125
C1124
.1UF
.1UF
1 2
+5VS
EVERFUSE_1.1A
C1126
1 2
.1UF
F3
W=40mils W=40mils
CHB4516G750
2
D54 DAN217
D55 DAN217
3
2
3
+5VS
+5VS
+5VS
+5VS
EXT_CLK24
EXT_DATA24
1 2
4516
KBD_DATA24
KBD_CLK24
L34
1
1
D50 DAN217
D51 DAN217
22K
PWROK
2
B
E
22K
DTC124EK
2
1
3
2
1
3
L32
1 2
CB-1608D-800T
1 2
L33
CB-1608D-800T
KB_ASKB_VCC
C1130 1000PF
L35
1 2
CB-1608D-800T
1 2
L36
CB-1608D-800T
0603
12
C1131
220PF
12
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
12
R898 820_0402
13
D
Q119
2
G
2N7002
S
Modify by 12/10/2k
PS2 CONN.
12
C1132
4.7UF_10V_0805
12
12
PWROKCPU 3
C1128
220PF
JP33
KBD/PS2_6
4 2 1
C1135
220PF
12
C1129 220PF
563
12
C1136 220PF
29 45Monday, September 10, 2001
1F
of
Page 33
+5VALW Transfer to +5V
+5VALW +5V
U2
12
C271 .1UF
8 7 6 5
12
4.7UF_10V_0805
D D D D
SI4800
C25
SYSON#
S S S G
Q31 2N7002
R158 470
2
G
1 2 3 4
13
D
S
+5VALW Transfer to +5VS
+5VALW
U3
D D D D
SI4800
SUSP
S S S G
Q11 2N7002
1 2 3 4
R34 470
13
D
2
G
S
8 7 6 5
12
C29
4.7UF_10V_0805
+3VALW Transfer to +3V
+3VALW
U6
D D D D
SI4800
Q29 2N7002
1
S
2
S
3
S
4
G
R183 470
13
D
2
G
S
8 7 6 5
12
C64 10UF_10V_1206
SYSON#
+3VALW Transfer to +3VS
+3VALW
U5
D D D D
SI4800
Q28 2N7002
1
S
2
S
3
S
4
G
R166 470
13
D
2
G
S
C41 .01UF
8 7 6 5
12
C48 10UF_10V_1206
SUSP
12
4.7UF_10V_0805
SYSON_ALW
12
C283 .01UF
+5VS
12
4.7UF_10V_0805
+5VS_GATE
12
C279 .01UF
+3V
12
12
C328
.1UF_25V_0805
+3VS
12
+5VS_GATE
12
C72
.1UF_25V_0805
C30
C289
C90 .1UF
SYSON_ALW
10UF_10V_1206
C40 .1UF
4.7UF_10V_0805
12
C292 1UF
SYSON_ALW 19
4.7UF_10V_0805
12
C280 .1UF
12
C85
10UF_10V_1206
12
R184
1M
12
C42
10UF_10V_1206
12
R179
1M
C35
12
+5V
12
C33
12
C86
10UF_10V_1206
R185 100K
13
D
2
G
S
12
C39
1 2
13
D
S
4.7UF_10V_0805
C37
1UF
4.7UF_10V_0805
12
SYSON#
Q30
2N7002
10UF_10V_1206
12
C47
100K R174
SUSP
2
G
Q12
2N7002
C34
12
C32
12
12
C88
10UF_10V_1206
+12VALW
R366 100K
13
D
S
Q49 2N7002
12
C56 10UF_10V_1206
+12VALW
SUSP 8
C36
4.7UF_10V_0805
12
C31
4.7UF_10V_0805
12
C87 10UF_10V_1206
2
G
12
+5VALW
SYSON 24
+12VALW TO +12VS Transfer
12
R154 100K
2
12
R155 51K
13
D
S
U57
ADJ
1
@AMS1085
12
C1169
@10UF_10V_1206
+12VALW
G
S
D
Q8
1 3
NDS352P
+12VS
12
C269 1UF_25V_0805
+VDDQ+3V
12
C27
1UF_25V_0805
R947 @100 1%
R948 @20 1%
+5VS
EN_DFAN24
+VDDQ+3V
R2 100K
R145
1M
+VDDQ For AGP 4X 1.5V Reserve
12
+
C1167
@47UF_6.3V_B
100K
SUSP#17,24,25
R1
SUSP# SUSP
R143
3M
2 3
R410
@10K
+12VALW
12
C26 .1UF_25V_0805
SUSP#
2
G
Q9 2N7002
JOPEN7
1 2
2MM
JOPEN8
1 2
2MM
PLACE ON NEAR 3V POWER
SHORT FOR +3V,OPEN FOR 1.5V
3 2
IN OUT
12
C1168
@.1UF
R32,R33 Use The 100 1%,20 1% for +1.5V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
+5VALW
12
R146
10K
SUSP
13
D
G
1
R408
C1
1UF
Q4 2N7002
S
FAN Connector
+12VS
12
R3
3.48K 1 2
21
2
12
D1
1N4148
3
2SA1036K
1
FMMT619
Q2
2
1 2
R4
10M
C252
10UF_10V_1206
-
+
U17A LMC6482IM
8 4
C582
@10UF_10V_1206
@0
RTC BATT
BATT1
-+
+RTCVCC
W=30mils
J2
1 2
12
C498 .1UF
D3
RB751V
RTCBATT
Q38
CBE
2SA1037K
2
1 2
R324
2SC2412K
21
31
Q39
1 2
10K
1 3
R22
100
Q1
2
12
W=30milsW=30mils
12
2
12
1 3
2 1
C43
1 2
.1UF
D4
RB751V
R310
1 2
0_0805
R312 33K
R323
10K
2
G
D10 1SS355
+12VS
2 1
12
13
D
S
21
R153
470
Q5 2N7002
+5V
D11 1SS355
JP5
1 2
FAN_CON_2P
RTCVREF
W=30mils
12
200_0805
W=30mils
+3V
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
30 45Monday, September 10, 2001
of
R29
1F
Page 34
CPU FID ISOLATION
+3VS
+5VS
SUSPEN POWER
RP66
AD[0..4]5,15,18,19,26
Place near 1647
AD0
R905
2.2K
AD1
R906
2.2K
AD2
R907
2.2K
AD3
R908
2.2K
AD4
R909
2.2K
ClkDiv[3] FID[3]
0000 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1111
8P4R-10K-0402
1 8
2 7
3 6
4 5
ClkDiv[2]
ClkDiv[1]
FID[2]
FID[1]
00 0 0 1 1 1 1 0 0 0 0 1 1 11
1 1 0 0 1 1 0 0 1 1 0 0
ClkDiv[0] FID[0]
1 11.5 0 1 0 1 0 1 0 1 0 1 0 1 0
Processor Clock and SYSCLK Frequency Ratio
11
12
12.5 5
5.5 6
6.5 7
7.5 8
8.5 9
9.5 10
10.5
FIDJMP0
FIDJMP1
FIDJMP2
FIDJMP3
+3V
R904 10K
FIDEN
R912
1 2
10K
2
G
2
G
2
G
2
G
+VCC_2.5S
RP67
8P4R-3.9K
1 8
2 7
3 6
4 5
13
D
Q93
2N7002
S
13
D
Q94
2N7002
S
FID0
FID1
FID[0..3] 3
Decoupling Between Planes
13
D
Q95
2N7002
S
13
D
Q96
2N7002
S
+3V +VCC_2.5S
C1157
22UF_10V_1206
+3V
T=40mil
+
T=40mil
3 2
U55
4
VIN
S-816A25AMC
3
ON/OFF
S-816A25AMC
3 2
U59
4
VIN
S-816A25AMC
3
ON/OFF
@S-816A25AMC
Q98
Q122
2SB1188
1 1
EXT
+2.5V
1.0A
REGULATOR
@2SB1188
1 1
EXT
+2.5V
VOUT
VOUT
FID2
C1138
.1UF
FID3
C1141
.1UF
C1144
C1147
.1UF
.1UF
MODIFY BY KENNY 10/19/2K
+12VS
Q97 SI2304DS
D
1 3
2
1 2
+VCC_2.5
T=100mil
12
12
C1154
+
C1153
5
12
T=50mil
C1156
10UF_10V_1206
12
C1186
@10UF_10V_1206
VSS
2
5
VSS
2
47UF_6.3V_B
.01UF
+3V+3VS+CPU_CORE +3VS+5VS+CPU_CORE
C1145
.1UF
C1148
.1UF
T=40milT=50mil
S
12
G
R911
10K
C1155
4.7UF_10V_0805
D
1
23
G
S
2N7002
WARNING: PRELIMINARY SCHEMATICS. FOR REFERENCE PURPOSES ONLY. DESIG N HAS NOT BEEN BUILT OR VERIFIED.
NOTE: All resistors are 5% 0603, and all capacitors are 10% 0603 unless otherwise noted.
1.0A
REGULATOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
31 45Monday, September 10, 2001
1F
Page 35
+VCC_2.5S
SUSPEN POWER
R914 3.9K
1 8 2 7 3 6 4 5
8P4R-3.9K
PVID[0..4]3
FROM PROCESSOR
U60
3 4
SPWROFF#16,29,35 CPU_DECT#24
+CPU_CORE
R918 10K
+VCCP2.5
R920 15K
12
C1160
FOR EMI REQUEST
POWEROK IS EQUAL TO CPUPOWEROK, THEN IT WILL BE DELAYED 20nS TO GENERATE PWDGD FOR SYSTEM
@39PF-0402
From VCCA pin of PPGA 462
2 1
DETECT CPU TYPE BY EC
7SH08
For Mobil Athlon Model 6 & Mobil Duron Model 7 For Mobile Duron Model 3 Athlon/Duron
R919 @20K
R921 @15K
C1159 .047UF
C1161 .047UF
R967
0
5
+5V
+5VS
Q114
1
2
3
Q115
1
2
3
PVID0
PVID1
PVID2
PVID3
PVID4
R915
@0
Modify By 3/8
SVID_GATE : HIGH SVID_GATE : LOW
+3VS
R916
4.7K
13
D
2
G
S
MMBT2222A
MMBT2222A
SVID_GATE
R917
4.7K
Q113
2N7002
2
G
12
PWROK circuit for Socket-462 CPU
+5VS
13
D
Q109
2N7002
S
+VCC_2.5S
SVID[0..4]4
To Pin PWROK of Socket-462 CPU
VR_POK
C1158 1UF_10V_0603
Modify By 3/8
R913
3.9KRP69
G
2
13
D
S
Q103
2N7002
G
2
13
D
S
Q104
2N7002
G
2
13
D
S
Q105
2N7002
G
2
13
D
S
Q106
2N7002
G
2
13
D
S
Q107
2N7002
This disables the CPU's VIDs from being passed through during sleep state.
RP73 1 8 2 7 3 6 4 5
8P4R-3.9K
R966 3.9K
VR_POK 7,29
K7 PGA IO only 2.5 volt. tolerant
VID0
VID1
VID2
VID3
VID4
13
D
Q110
2
2N7002
G
S
SVID0
13
D
Q117
2
2N7002
G
S
SVID1
13
D
Q111
2
2N7002
G
S
SVID2
13
D
Q112
2
2N7002
G
S
SVID3
13
D
Q118
2
2N7002
G
S
SVID4
VID[4:0] Code to Voltage Definition
VID[4:0]
00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
VID0 35
VID1 35
VID2 35
VID3 35
VID4 35
VCC_CORE(V)
2.000V
1.950V
1.900V
1.850V
1.800V
1.750V
1.700V
1.650V
1.600V
1.550V
1.500V
1.450V
1.400V
1.350V
1.300V NO CPU
VID[4:0]
10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111
VCC_CORE(V)
1.275V
1.250V
1.225V
1.200V
1.175V
1.150V
1.125V
1.100V
1.075V
1.050V
1.025V
1.000V
0.975V
0.950V
0.925V NO CPU
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet of
32 45Monday, September 10, 2001
1F
Page 36
A
SB+
1 1
PC9
PZD1 @RLZ4.3B
PC10
4.7UF_1210_25V
10UH_SPC_1207P_100
+
PC166
47UF_D_6.3V
6.3V
PZD3
21
RLZ3.6B
1000P_0603_50V
PC8
12
PD7
BYS10-45
4.7UF_1210_25V
21
+5VP
0.1UF_0805_25V
2 2
+3VALWP
3 3
PL3
PR5
0.015_2512
+
47UF_D_6.3V
PC31
P6
PC24
1 2
ACIN16,24,34
+
PC25
47UF_D_6.3V
PR8 120K 5%
876
DDD
SSG
S
134
2
+
5
D
PQ1 FDS6690S
PC18 @1000PF
PC26
PR123 @1M
47UF_D_6.3V
PR125 0
876
134
PR131
@0
VL
B
SB+
PD1
1 2
RB751V PR1 10_1206
PC5
PR7 47K 5%
0.1UF_0805_25V
+
PC4
4.7UF_C_35V
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PR6 100K
PC30
.047U_0603_16V
MAINPWON 36
5
PQ2
DDD
D
SI4800
SSG
S
PC13
0.1UF_0805_25V
2
PR129 4.7 PR130
P5
PR132 10K
22
V+
PU1
MAX1632
VL
PC7
0.1UF_0805_25V
21
VL
GND
8
12OUT
VDD
BST5
DH5 DL5
PGND
CSH5
CSL5
FB5 SEQ REF
SYNC
RST#
LX5
VREF
4 5 18 16 17 19 20 14 13 12 15 9 6 11
C
PD2
RB751V
12
PC6
4.7UF_1206_16V
4.7UF_1206_16V
PC29
PC1
4.7UF_1206_25V
PC14
0.1UF_0805_25V
PQ3 SI4800
4.7 876
5
DDD
D
4.7UF_1210_25V
SSG
S
134
2
+12VALWP
SB+
PC19
PC11 1UF_0805_25V
PC20
4.7UF_1210_25V
PR124 @1M
PR126 0
PL1
1UH_BLM3216
1 2
470PF_0805_100V
PC21
0.1UF_0805_25V
PC12
PR3
22_1206
P7 P8
PQ4 FDS6690S
D
PC23 @1000PF
4
1
876
DDD
SSG
S
134
2
+
PC2
2.2UF_1206_25V 25V
12
PD4
EC11FS2
PT1
5
D
PC27 47UF_D_6.3V
2
10UH_SDT-1205P-100-120
3
P9
PR4
0.015_2512 1W
PC28
+
47UF_D_6.3V
PZD2 @RLZ6.2C
21
12
E
+5VALWP
PD8 RB051L-40
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
B
401168
Date: Sheet of
33 45Monday, September 10, 2001
E
1F
Page 37
A
2
ADAPTER CURRENT 2.5A
P1 P2
PQ5
S
D D
S S
D
G
D
SI4835
0.22UF_0805_16V
1
PQ16
3
2N7002
VMB
CHGRTCP
1 2 3 4
PR11 51K
PR18 100K
1 3
PQ9
2N7002
100K
2
100K
PC170
1 3
FSTCHG25 LI/NIMH# 24,36
PD16 RB751V
2 1
2 1
PZD4 RLZ6.2C
PR60 100K
1 2
PR62 22K
A
TRICKLE
8 7 6 5
ACOFF24
PR230
1.43K_1%
2
51ON#23,29
VIN
PR12 10K
1 1
2 2
4
3 3
4 4
2
1 2
13
PQ114
2N7002
12
PQ7
1
S
2
S
3
S
4
G
SI4435
PR22
47K
PD11 1SS355
PQ14 DTC115EK
22K_1%
PR231
26.1K_1%
2
PC186
2
0.22UF_0805_16V
TP0610T
12
PC54
0.22UF_1206_25V
D D D D
PR232
PR233
1
PQ17
3
2N7002
PD18
RLS4148
PQ24
2
8 7 6 5
PACIN
VCHGREF
20K_1%
100K
2
P1
13
PR234 20K_1%
PR235
@1M_1%
13
100K
21
1 2
PR58 47_1206
PR9
0.035_2512
1W
PR237 20K_1%
PR236
57.6K_1%
PR267 100K
PQ113 DTC115EK
VS
12
PC55
0.1UF_0805_25V
95.3K_1%
1 2
PR238
4.7
PR241
1 3
12
PR59
3.9K_1%
VIN
PQ18
2N7002
PR264 100K
PR61 150K
B
2
12
12
B
B+
PR26
47K
+5VP
PC56
0.1UF_16V
PC33 @100P
1 2 3 4
PR288
PR240
22_1206
PR242
15K_1%
2700PF_0603_50V
PC187
0.1UF_0805_25V
12
PZD5 RLZ5.1B
2 1
PQ6
8
S
D
7
D
S
6
S
D
5
G
D
SI4435
1 2
KC FBM-Ll11-322513-201LMAT
0
OVP# 36
1UF_1206_25V
PR250100K
1 2
1K
PC172
PR252
0.01UF_0603_50V
PQ15
1
2
3
2N7002
PR27033K_1%
+5VP
C
CP: 2.57A
SB+
PL9
4.7
0.1UF_0805_25V
PC171
PC173
NIMH/LI# 36
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1
DCIN
15
VCTL
14
ICTL
13
REFIN
11
ACIN
12
ACOK ICHG
28
IINP
7
CCV
6
CCI
5
CCS
PC174
0.01UF_0603_50V
PR271
10K
PC188
@0.1UF_0805_25V
PC175
1UF_0603_10V
PC176
27
CSSP
PU10
MAX1772
REF
4
2
C
PC40
4.7UF_1210_25V
0.1UF_0805_25V
26
CELLS
CSSN
DLOV
PGND
CSIP CSIN BATT
CLS
GND
GND
3108
9
249K_1%
120K_1%
1
PQ115
3
2SC2411K
PC41
4.7UF_1210_25V
PC177
1UF_0805_16V
16 2
LDO
25
BST
22 24
DHI
23
LX
21
DLO
20 19
18 17
PR246
PR247
10K
PR251
PC178
200K_1%
200K_1%
PC42
4.7UF_1210_25V
PR2662.7
PR248
PR249
PACIN
PC43
0.1UF_0805_25V
PR243909_1%PR239
33
PR245
21
PD46
RB751V
0.1UF_0603_16V
PC180
0.1UF_0805_25V
PQ19
31
PC189
0.1UF_0805_25V
ACIN 16,24,33
VCHGREF
PR244
1.5K_1% PC179
4.7 PR265
SI2303DS
2
D
ACIN threshold 15V
PQ111
SI4800
876
5
DDD
D
SSG
S
134
2
P3
PL4
PQ112
1 2
SI4810DY
2
S
5
PC185
1 2
@_2200P
22UH_SPC_1207P_220
D
0.1UF_0805_25V
876
DDD
SSG
134
LI/NIMH# 24,36
RTCVREF
D
P4
PC51
10UF_1206_10V
Title
Size Document Number Rev
Date: Sheet of
E
VMB
PR255
0.035_2512
1W
PR253 1
PC181
33uF_25V
PC182
0.1UF_0805_25V
PC37
+
PR254 1
PC102
4.7UF_1210_25V
4.7UF_1210_25V
PC38
CV:LI-ION 13.241V
NI-MH 17.1V
CC: 2.78A LI-ION FAST
CC: 2.0A NI-MH FAST CC: 0.36A LI-ION TRICKLE CC: 0.36A NI-MH TRICKLE
CHGRTCP
2
1UF_0805_25V
PR45
200_0805
PC52
PU6
S-81235SG
3
3
2
1
1
Compal Electronics, inc.
SCHEMATIC, M/B LA-736/736B/736C
B
401168
E
PC39
4.7UF_1210_25V
PZD6 RLZ16B
2 1
34 45Monday, September 10, 2001
1F
Page 38
1
PR221
PC183
1M
A A
1 2
1 2
4700PF_0603_50V
PR222
1M
1 2
VR_ON4,25
PR189 120K
VID032
VID132
1 2
VID232
VID332 VID432
B B
2
PR223 1M
4700PF_0603_50V
1 2
PC190
1 2
4700PF_0603_50V
12
PC95 470P_0603_50V
SPWROFF#16,29,32
PC191
1 2
PR224
1M
4700PF_0603_50V
1 2
PC94
12
+5V
0.22UF_16V_0805
3
+5VALW B+
PC80
1UF_0603_10V
PR104
PC184
PR225
1M
1 2
4700PF_0603_50V
1 2
PC192
1 2
0
12
PR272
2
3
0
12
21
0
12
20
0
12
19
0
12
18 17
12
0
6
12
8
PR107
@_0
PR273
PR274
PR275
PR276
PR277
16 12
PR280
@0
1 2
12
PR279 0
+5VALW COREFB-
1 2
15
VDD
SKP/SDN#
TIME
D0
PU9
D1
MAX1717
D2
D3 D4
CC
TON
A/B# VGATE
PR278
12
0
1 2
7
GNDS
ILIM
10
12
PR112 @215K_1%
20_0805
V+
VCC
BST
DH
LX
DL
GND
FB
FBSREF
PD28 @RB751V
2 1
2 1
1 2
1
22
24
23
14
13
4
59
11
4
RB751V PD43
PC81
0.22UF_0805_16V
2.2 12
PR226
12
PR281 @0
PC88
1 2
0.1UF_0805_25V
PR269
12
0
PQ34 IRF7811A
876
DDD
SSG
134
2
PQ36 FDS7764A
876
DDD
SSG
134
2
12
5
5
S
1 2
5
S
PC93
1 2
@_2200P
PR282 @0
D
PR227 0
D
PQ35 IRF7811A
876
DDD
SSG
134
2
FDS7764A
876
134
5
D
S
1 2
PQ37
DDD
SSG
S
2
0.1UF_0805_25V
PR228 0
5
D
PC82
PQ109 FDS7764A
876
DDD
SSG
S
134
2
12
5
D
6
PC83
4.7UF_1210_25V
12
4.7UF_1210_25V
PL8 HK-RM136-22A0R7
1 2
@SRC-1307_0R6
1 2
PD39
EC31QS04
2 1
PR283
1 2
100
PC89
PL7
PC84
4.7UF_1210_25V
12
12
4.7UF_1210_25V
PC85
12
PC97
@10PF
7
PC86
4.7UF_1210_25V
12
1000PF_0603_50V
PC90
220UF_D_4V
+
PD29 BYS10-45
2 1
1 2
PL6
KC FBM-Ll11-322513-201LMAT
1 2
JOPEN3
12
1 2
3MM
PC116
PC91 220UF_D_4V
PC92
+
+
PC96
1000PF_0603_50V
220UF_D_4V
PR106
1 2
100
8
1 2
PL12
KC FBM-Ll11-322513-201LMAT
CPU_COREP
1 2
COREFB+
C C
JOPEN2
+5VALWP
+3VALWP
CPU_COREP
1 2
3MM JOPEN6
1 2
3MM
+5VALW
+3VALW
+CPU_CORE
CUT POWER PLANE
JOPEN4
+12VALWP
D D
1 2
2MM
+12VALW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
1
2
3
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
4
5
6
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
7
35 45Monday, September 10, 2001
of
8
1F
Page 39
A
B
C
D
E
+5VALWP
PR127 15K_1%
PD20
PD22
@BAS40-04
1
PD23
VMB
PR63
6.49K 1%
1
1
1 1
+5VALWP
LI/NIMH#24,34
Add by CT at 2/25
PR196 @470
PR197 @10K
PC150 @100PF
PR198
PR199
@11K
@100K
VREF
2 2
PC152 @0.1UF
+5VALWP
52
1
+
3
-
PU11 @MAX4490
4
+5VALWP
PQ108
@SI3443DV
1
34
D
GS
D
DD
6
5 2
PR200
0
INVPWR
PC153 @10UF_10V_1206
+
PC151 @47UF_D_6.3V
PD31
1
@BAS40-04
+5VALWP
3
2
SMD3,22..25
BATT_TEMP24 +5VALWP
+5VALWP
PR128 1K 1%
3
2
@BAS40-04
3
2
3
2
PR64 1K
PC101
0.01UF_0603_50V
PR69 200
PF1 5A
PC100 1000P_0603_50V
PR71 200
PR67 1K
PCN1
1
B/I
TS
SLD SLC
2 3 4 5 6 789
BATT CONN.
@BAS40-04
SMC3,22..25
VMB
MODIFY FOOTPRINT BY KENNY 12/23/2K
PL10
PCN2
1
3
3
2
DC JACK 2DC-S315-B01
3 3
VL
PC163
0.1UF_0805_25V
PD24
BYS10-45
1
12
2
PC61
1000PF_0603_50V
PC62
0.01UF_0805_50V
VS
PR259
22
CHC4532U800
1 2
2
1
PL11
1 2
CHC4532U800
3
PT2 @JBT0385-100805-4
4
1000PF_0603_50V
PR257
PR261
2.15K_1%
PR258
16.9_1%
PR256 0
4 4
PC167
1000PF_0805_50V
PH1 10K_1%_0805
PC168
0.22UF_0805_16V
3 2
PR262 100K_1%
PR268
100K_1%
47K
PU4A
84
LM393
+
1
-
VL
MAINPWON 33
CPU thermal protection 100C
VIN
PR284
PC193
VIN34
PC64
PC63
0.01UF_0805_50V
LI-ON OVP14.3V NI-MH OVP17.8V
P1
OVP#34
PR73 @39K
PR82
PR87 @100K
@324K_1%
1
2
3
PQ25 @2N7002
@2M
@0.1UF_0805_25V
PD25 @1SS355
7
PC66 @4.7UF_1206_25V 25V
12
PU4B
84
LM393
5
+
6
-
PC67 @0.1UF_0603_16V
PR285
PQ116
2
@1M
RTCVREF
PR75
0
PR83 @10K
1%
PC65
@2.2UF_0805_16V
PR286
@2.2K_0805
1 3
@2N7002
VMB
LI/NIMH#24,34
PR72 1M_0.5%
PR84
0
Noise immunity for charger OVP on 2/8 by James
PR287
PQ117
2
PC194
@0.1UF_0805_16V
@1M
PR74 @1M_0.5%
PR76 @1M
PQ26
1
PR85
@1M
2
3
NIMH/LI# 34
@2N7002
Compal Electronics, inc.
1 3
@2N7002
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
B
401168
Date: Sheet of
36 45Monday, September 10, 2001
E
1F
Page 40
N32NN061 / LA-736 Rev0.1 HISTORY LIST (PIR)
01. 21/AUG/2000 *) PAGE 1: Correct R419 from 56 Ohm to 1K *) PAGE 3: Correct U20.E6 Pin Name from RATIO# to NC,DEL R480 *) PAGE 3: Correct U20.Y3 Pin Name from GSERR#/CLKRUN# to GSERR# *) PAGE 4: CHANGE R493 FROM OPEN TO STUFF *) PAGE 4: Change all pull low strapping resister value from 10K to 2.2K *) PAGE 10: ADD TVXpress and CH7004 Configuration table *) PAGE 15 :Change U26A location to U17A *) PAGE 16: RTSA# Change pull up +5VS to GND,by BIOS Requested ,Set to 370H *) PAGE 16:U25.K1 Add Pull up resister to +5VS *) PAGE 16: U25.L3 , U25.Y8 , U25.W9 ,U25.P5 Add Pull up resister to +3VS *) PAGE 21: Add U31A pin 14 connect to +5VALW and pin 7 connect to GND *) PAGE 33~36 :Change all Location to the same LA-732,Power team requested
01. 22/AUG/2000 *) PAGE 15:Correct RP33,RP34 from 33 to 47 Ohm *) PAGE 21 :Correct RP44,R729,RP45,RP46,RP48,R738 From 33 to 47 Ohm *) PAGE 21 :Correct R728,R737 Value from 22 to 82 Ohm *) PAGE 21 :Correct R741,R744 Value from 33 to 0 Ohm *) PAGE 21 :Correct R739 Value from 4.7K to 5.6K Ohm *) PAGE 21 :Change R724,R734 to OPEN *)PAGE 22:Correct R755 from 4.7K to 5.6K Ohm
01. 24/AUG/2000
Ali Suggestion
*)PAGE 4: ADD 3 CAP. C1162,C1163,C1164 *)PAGE 16:Correct R654.,R668 from 10K to 1K
01. 25/AUG/2000 *)PAGE 5:Change R502,R503 from OPEN to STUFF,set the S2K BUS read & write forward clock"5/16 T" *)PAGE 5:Correct R481,R482,R483,R484,R486,R487,R488,R489 to RP70,RP71 *)PAGE 5:Change R927 pull up from +3VS TO +3VALW,Because it it resume power group *)PAGE 5:Change R491 from +3VS to +3VALW *)PAGE 14:Change IRQ1 pull up from +3VS TO +3VALW,Because it it resume power group,So add R929 pull up to
+5VALW *)PAGE 16:Change R683,R684 from STUFF to OPEN
*)PAGE 30:Del outport "+5VS_GATE",because don't used! *)PAGE 19:Add R930 for VCCP
01. 28/AUG/2000 *)PAGE 3:Correct R419 Value from 1K to 270 Ohm and Change pull up to +CPU_CORE to GND *)PAGE 3:Correct R432 Value from 1K to 680 Ohm and Change pull up to GND to +CPU_CORE *)PAGE 3:Correct R429 Value from 0 to 270 Ohm *)PAGE 3:Correct R434 Value from 1K to 270 Ohm *)PAGE 3:Correct R425 ~ R433,RP1 Value from 560 to 680 Ohm *)PAGE 3:Correct R453 Value from 1K to 270 Ohm *)PAGE 3:DEL R435,No request *)PAGE 3:Correct R585 from STUFF to OPEN *)PAGE 3:Correct R586 Value from 0.1UF to 0.047UF *)PAGE 3,Add R931 on SMI#,AMD suggest no connect! *)PAGE 4 DEL C624 ~ C631,by AMD Suggestion. *)PAGE 4 &PAGE 31 : DEL BPFID[0:3] CIRCUIT *)PAGE 6:Correct Value R524,R525 from 210 to 180,depend on PCB impedance X 3,ALI recommend *)PAGE 6:Add R936 for AGPVREF,NEAR NODE *)PAGE 7:ADD R934,R935 Pull Up the U21Pin 1,27 *)PAGE 8:Change R577,R575,D14,D15 from STUFF to OPEN,R581 from OPEN to STUFF *)PAGE 16:ADD R937 for U25.L1 PULL UP TO +5VS *)PAGE 16:ADD R938 for U25.P5 PULL UP TO +3VALW *)PAGE 17:Correct C894,C898 Value from 0.1UF to 47PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
01. 28/AUG/2000 *)PAGE 31:Correct RP67 Value from 10K to 680
Ohm,R905 ~ R909 from 10K to 3.3K *)PAGE 32:Correct R913,R914,RP69 Value from 10K to 680 Ohm,By AMD Suggest
*)PAGE 32:Correct VID Table
01. 29/AUG/2000 *)PAGE 6:Correct C685,C719 from 0.1UF to 22UF_1206 *)PAGE 7:Add R939, "6 inch" trace "GCLK_1",for AGP Clock tunning by ALI Suggest *)PAGE 14,ADD H12,H13 For VGA Broad HOLE! *)PAGE 35,ADD PR230 0 Ohm on COREFB-
01. 30/AUG/2000 *)PAGE 35:DEL PR229,BY Power request *)PAGE 3:MOVE R931 TO PAGE 15 (North bridge side)
01. 1/SEP/2000 *)PAGE 3:Change R414,R417 from STUFF to OPEN,By AMD suggestion *)PAGE 3,4:Correct Some Resister and Cap. to 0402 size *)PAGE 27:Correct C1083 to 0402 size *)PAGE 5:Change R475 from +3VS to +3V *)PAGE 3:Change R446 from OPEN to STUFF,BY AMD NEW SPEC. *)PAGE 3:Change R446 from OPEN to STUFF,BY AMD NEW SPEC. *)PAGE 6:ADD R940,C1166 FOR G_RST
01. 4/SEP/2000 *)PAGE 4:Change Back THERMDA(S7),THERMDC(U7) By AMD Recommand *)PAGE 6,For VDDIO_AGP,ADDPM_AGP Change Name From +3V to +VDDQ
*)PAGE 8,JP8 Pin62 ~68 Change Name From +3V to +VDDQ *)PAGE 30,Add 1.5V Regulator,JOPEN7 for AGP 4X Reserve. *)PAGE 6,Del R922,R923,Because it can't suspend the PCI power,By ALI Recommand *)PAGE 5,Add pull low resister R949 ~ R954 For C/BE#0 ~ C/BE#3,ST0,ST1 By ALI Recommand *)PAGE 31,Correct R905~R909 Value From 3.3K to 2.2K
01. 5/SEP/2000 *)PAGE 3,Correct Value R423 from 4.7K to 680 Ohm *)PAGE 3,Correct Value RP2 from 10K to 270 Ohm *)PAGE 5,Change R475 Pull up from +3V to +VDDQ *)PAGE 7,Change PCLK_1535 Connect with PCLK_NB,Before Damping *)PAGE 8,Change AGP PULL UP Resister From +3V to +VDDQ *)PAGE 15,ADD U58 ON PCIRST# For LEAKAGE *)PAGE 16,Correct R925 ~ R928 & R937,R938 Pull Down to GND *)PAGE 19,ADD OUTPORT ON CBRST# *)PAGE 20,CHANGE U29 RESET# FROM DEV_RST# TO CBRST# *)PAGE 32,ADD Q117,Q118 For Meet AMD NEW SPEC.
01. 6/SEP/2000 *)PAGE 5,DELR498,R504,Because Repeat By R511,R909 *)PAGE 29,ADD R957 For Time Tuning *)PAGE 8,Correct R599 Note(Stuff For TVXPRESS) *)PAGE 6,8 : Correct Net Name From AGPVREF To VREF_GC *)PAGE 10, ADD R958 ON U22 PIN 30 FOR CH7004 RESERVE
01. 7/SEP/2000 *)PAGE 31,Correct RP67 From 0804 to 8P4R Size *)PAGE 3,Correct RP2 From 0804 to 8P4R Size *)PAGE 14,ADD H14~H18,EP13~EP17 FOR LAYOUT RESERVE
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
37 45Monday, September 10, 2001
1F
of
Page 41
4
N32NN061 / LA-736 Rev0.1 HISTORY LIST (PIR)
01. 7/SEP/2000 *)PAGE 5,Correct Footprint R468,R469 From 0805 to 0603 *)PAGE 8,Correct R577 From OPEN to STUFF *)PAGE 15,Change R955 and U58 From +3VS to +3V,By ALI Recommand *)PAGE 31,Correct Value C1137 ~ C1152 From C0603 To C0402
D D
*)PAGE 32,Correct R905~R909 Footprint From 0603 to 0402
02. 13/SEP/2000 *)PAGE 7,Correct L1 From CHB2012U170_0805 To CHB010012800_1206 *)PAGE 29,Correct R957 Value From 22 Ohm to 1K *)PAGE 32,Change U56 PIN 2 From PWROKCPU to SPWROFF#
02. 14/SEP/2000 *)PAGE 33,34,35,36,Change From Power team Schematic by K9-DC-0914-1.DSN *)PAGE 35,Add PR230 On COREFB­*)PAGE 7,Del C763~C777
02. 15/SEP/2000 *)PAGE 4,Correct C589~C608,C619~C623 From C0402 To C0603,Because the material shortage *)PAGE 14,Modify the EMI PAD Footprint to "EPIPAD_PS-4
02. 18/SEP/2000 *)PAGE 14,DEL RP27.6 Signal(PAR),Because M1535 Internal Pull Low
C C
*)PAGE 16,Change R663 from 0 Ohm to 10K Pull Up +3VALW,By Bios Request
02. 21/SEP/2000 *)PAGE 18,Chaneg Q63 from 2N7002 to SI2306DS
02. 22/SEP/2000 *)PAGE 27,Change C1083 from C0402 to C0603 *)PAGE 7,MOVE R939 To PAGE 8 ,It Need Closest The JP9 *)PAGE 35,ADD RQ115,RP270,RP271 for ACIN
02. 26/SEP/2000 *)PAGE 33~36,Modify the Power Schematic By K7-DC-0925.DSN
It Modify Some Value
N32NN061 / LA-736 Rev0.2 HISTORY LIST ( PI R )
FOR A-TEST 8/OCT/2000 *)PAGE 31,Change RP66 from 8P4R_0804 size to 8P4R *)PAGE 29,Change C1121 from 0.1UF to 10PF,By Power Good Timing
B B
*)PAGE 3,Change Q50 from 2CS2412K to 2N7002 *)PAGE 5,ADD R499,R506,R510,R496 & DEL R494,R500,R503 By ALI Strapping 12/OCT/2000 PAGE 24,Modify HPID 01 for LA-736 PAGE 7,ADD C1170 ~ C1175 0.01UF For Clock GN PAGE 14,DEL EP2 PAGE 19,Mount R941 and DEL R940,C1166 13/0CT/2000 PAGE 8,DEL R939 17/0CT/2000 PAGE 3,Change value R460,R461 from 4.7K to 1K(SMB pull up) PAGE 28,ADD L37,L38 & C1184,C1185(0.1UF For EQ REF Votalge) to Solve the EQ Noise! PAGE 14,ADD R965,Q121 For Fix Noise Sound When Plug-in headphone PAGE 26,DEL L27,L28,L29 Fix T/P Noise
A A
19/0CT/2000 PAGE 27,ADD L39 For U48(+5VAMP) PAGE 31,DEL C1137,C1140,C1139,C1142,C1143,C1146,C1149,C1151,C1150,C1152 26/0CT/2000 *)PAGE 3,ADD R968,Change Q50 from 2N7002 to MMBT2222A *)PAGE 32,DEL U56,R915,R919,R921 ADD Q111,Q112,Q117,RP73,R966,R967 For Power Now 27/0CT/2000
4
3
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1
Fix Battery Only Boot Fail: *)PAGE 29,Change R899 From 47K to 0 Ohm,Change C1127 from 0.47UF To OPEN Fix Boot Beep Loudly : *)PAGE 27,ADD R970(1K),Change R847 from 10K To 1K 1/DEC/2000 Power update schematic for B-TEST! Fix suspen resume problem! *)PAGE 15,Change U58 power source from +3VS TO +3V, Fix VCC_2.5V drop,Change REGULATOR By AMS1085 *)PAGE 17,ADD R972 on LPTSTB# 3/DEC/2000 Change GPIO For VOLUME CONTROL and ENDIM0,1 (Because original group need enable UART3) *)PAGE 16,unmount R655,R656,R657,and reserve R975,R976 for ENDIM0,1 *)PAGE 16,mount R641,R642,R643 and ADD R973,R974 for ENDIM0,1 TUNNING PCI CLK *)PAGE 15,UNMOUNT R629,C880
7/DEC/2000 For meet ALI IDE interface design notice
1)PAGE 14 : Change RP32 value from 10K to 4.7K Change IRQ14,15 pull down instead pull high to +5VS
*)PAGE 21 : ADD R977 For SDDREQ pull down 5.6K to GND
ADD R978 for SBDIORDY pull high 10K to +5VS Change R740 value From 1K to 10K Change R728 value From 33 to 82 Ohm(SBDREQ) Change R743,R730 value From 22 to 82 Ohm(IRQ 14,15)
Add One +3V Jump For +VDDQ *)PAGE 30,Add JOPEN8 For +VDDQ 14/DEC/2000 RESERVE RESISTER (+3VS) FOR M1535+ *)PAGE 15,Add R979,R980 For +3VS,+5VS Option *)PAGE 21,Add R981,R982 FOR IDERDY Pull Up to +3VS FIX System Unstable Tunning : *)PAGE 3,Change R456,R457 Value from 40.2 Ohm 1% to 35 Ohm 1% *)PAGE 6,Change R524 Value from 180 Ohm1% to 150 Ohm 1% *)PAGE 6,Change R525 Value from 180 Ohm 1% to 120 Ohm 1% *)PAGE 27,Correct R970 Value from 1K Ohm to 0 Ohm 15/DEC/2000 *)Power Modify Schematic! Modify Some Value: *)PAGE 3,R417 Mount 0 Ohm,Becaus need connect to gnd
CORRECT C586 From 0.1UF To 0.47UF *)PAGE 5,Change RP3,RP4,RP5,RP7 Value From 8P4R-2.7K TO 8P4R-8.2K *)PAGE 6,Correct R515,R517 Value From 4.7 Ohm to CB-1608D-800TT(0603)
Correct R516,R518,R519,R520,R521 Value From 4.7 Ohm to CB-2012D-800TT(0805) For PC-133 Stable: *)PAGE 11,Correct RP18,RP19,RP22,RP23 Value From 8P4R-10 to 8P4R-22 *)PAGE 12,Correct R607,R608,R609,R610 from 10 Ohm to 33 Ohm
*)PAGE 14,DEL R614,C851 *)PAGE 28,Correct C1184,C1185 Value From 0.1UF to 1UF *)PAGE 32,Correct RP73 Value From 8P4R-680 to 8P4R-2.7K
Correct R966 Value From 680 to 2.7K
*)PAGE 20,ADD R986
3
2
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
1
38 45Monday, September 10, 2001
of
1F
Page 42
4
3
2
1
N32NN061 / LA-736 Rev0.2 HISTORY LIST (PIR)
11/16/NEV *)PAGE 26,Correct Some Value : R804 From 22 to 47 Ohm,C1031 Mount 22 PF L27,L28,L29 Need Mount *)PAGE 32,Correct R913,R914,RP69 Value from 680 to 2.7K Ohm
D D
*)PAGE 31,Correct RP67 Value From 680 Ohm to 2.7K Ohm,ADD One Regulator Circuit for +VCC_2.5
11/17/NEV *)PAGE 6,Change R516,R518,R519,R520,R521 Value from 4.7_0805 to CHB2012B800_0805 *)PAGE 6,Change R515,R517 Value from 4.7 Ohm to CHB1608U800 11/22/NEV FOR AGP 4X Function Reserve: *)PAGE 6,Change R524 Pull Up From +3V To +VDDQ *)PAGE 6,Change R936 Connect From VREF_GC to VREF_CG,UNMOUNT 936 *)PAGE 8,Change R578 Connect From VREF_CG To VREF_GC
11/24/NEV FOR FIX SUSPEND / RESUME FAIL: *)PAGE 24,Correct R775 Pull Up from +3V to +3VS *)PAGE 24,Correct R776 Pull Up from +3VS to +3V
C C
*)PAGE 24,DEL R778,R779,D42 Then Connect PCMRST# From U36.106 to U30.1 11/24/NEV
MODIFY POWER RB751V FOOTPRINT FROM RB751V TO CH71B 11/27/NEV *)PAGE 23,ADD Q75 FOR FDD LED
B-TEST FOR VER0.3 For Fix Boot Need Twice,Change CPURST# From Northbridge to Sorthbridge:: *)Page 5,ADD R984,Page 15,ADD R992 For CPURST# For SUSPEN Stable By ALI Requestment *)Page 5,ADD Straping R985~R991 FOR DETECT CPU TYPE BY EC: *)PAGE 24,35 ADD CPU_DETECT# From U36 pin 94,AND with SPWROFF# for SVID_GATE FOR FIX BC018:
B B
*)Modify the PCN2 footprint from DJ-305S to DJ-305S-NEW,it will include hole change size! *)Modify Footprint For New Lib FOR FIX MONO_IN NOISE:: *)PAGE 27:Correct R852 value from 33K to 10K *)PAGE 27:DEL R839,Correct R847 from 4.7K to 10K FOR Mic NOISE: *)PAGE 27:Correct R836 Value From 0 to 6.8K For EMI requestment Correct value: *)PAGE 23:Correct CP8,CP9,C10,C11 Value From 33pf to 220 pf *)PAGE 22,Add L40 For EMI request For TV Out Resest Stable: *)PAGE 10:ADD R604
FOR Layout Requestment: *)Page 31,Q98,Q122 Change Footprint to 2SB1188
A A
*)Page 7,PCLK_1535 Trace Modify From 9533 to 2977 *)Page 36,Change PCN2 Footprint From DJ-305S To DJ-305S-NEW *)Page 14,Change EP13,EP14,EP15,EP16 Footprint From EMIPAD_PS-4 To EMIPAD_PS-3 *)Page 14,Del H15,H16,H17,H18 *)Page 3,Del TP5,TP6,TP7,TP8 For Fix +5VALW Drop: *)Page 22,U34 Pin 4 ADD C1187 On "EN_5VCD"
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3
Some Requestment: *)PAGE 3,Correct 680 Ohm 820 Ohm (R432,R429,R419,R434,RP1) *)PAGE 7:Change D12,1 From SUSA# to CPU_STP#
Change R542 From 33 Ohm To 22 Ohm DEL C1177 ~ C1183 By EMI Requestment
*)PAGE 9,Change JP10 PIN 1,6,8 From CRTGND to GND By EMI Requestment
(Change L6 Position) *)PAGE 10:Umount C810 (27PF),mount C809 (47PF) For TV_OUT Quality And Meent EMI Requestment *)PAGE 26,Correct C1039 From 1UF To 2.2UF,DEL L27,L28 *)PAGE 27:ADD Q123,Q124,Q125,Q126,Q127 For POWER ON PO-PO Sound *)PAGE 29,C1119 Mount 1UF For EC_HPOWON Stable FEB/14/2001 FOR MIC QUALITY: ADD L41 : HB1M2012-601JT,C1188 : 470PF Change SVID to FIX VID *)PAGE 32,Change R967 to R915 (0_0603)
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
2
Date: Sheet
1
39 45Monday, September 10, 2001
1F
of
Page 43
4
3
2
1
N32NN061 / LA-736 Rev0.4 HISTORY LIST (PIR) FOR C3-TEST
1/20/JAN *)PAGE 3,Change C621 from 0.22UF(0603) to 2.2UF (0805) For Assembly.(Thermal Pad) Modify For Power Now Function: *)PAGE 24,Change R775 Pull Up From +3VS to +3V *)PAGE 24,Change R775 PIN1 & D39 PIN 2 From ATFINT# to CPU_DECT#
D D
FOR FIX AUDIO MONO_IN NOISE: *)PAGE 27,DEL R839
2/12/FEB
FOR FIX STR ISSUE
*)PAGE 5,UNMOUNT R493[AD12],THEN MOUNT R1003 USE OFFSET MODE
RESERVE R998 ~ R1008 PULL UP TO +3VS,CPU READ/WRITE USE 8 STAGE FOR FIX S1 HALT ISSUE: *)PAGE 7,UNMOUNT D12 AND Change D12 PIN1 From CPU_STP# To SUSB# FOR FIX BLUE SCREEN CC005: *)PAGE 3,ADD C1189(560PF_0402) ON NMI(NEED NEAR AN3) For FIX TV_OUT Leagage *)PAGE 10:ADD R1010 FOR DVDD And Change From +3VS To +3V
ADD R1012 FOR D10 ~ D15 FOR REV Change Pull +3VS To +3V
C C
ADD R1009 FOR DACVDD,CLKVDD Change From +3VS To +3V AND Reserve +5VS FOR FIX Play CD Audio Volume Too Small: *)PAGE 22,Change R749,R753 Value From 24K TO 33K RESERVE SOME PCI Signal On MINI-PCI: *)PAGE 18:ADD R1014 ~ R1021 FOR OPTION IN FEATURE FOR POWER NOW FUNCTION: *)PAGE 32,MOUNT R967,UNMOUNT R915 (MODIFY BOM) FOR EMI REQUESTMENT: *)PAGE 23,ADD C1190 ~ C1192 *)PAGE 19:ADD PIN 7,8 ON JP24 AND CONNECT TO GND-A,C1087,C1088 CHANGE CONNECT FROM GNDA TO GND
FOR MIC TUNNING: *)PAGE 23,ADD R1022,AND RESERVE R1023
FOR LAYOUT MODIFY: *)Change FOOTPRINT 10P8R,16P8R,0402 TO 10P-8R-NEW,16P-8R-NEW,0402-U
B B
*)PAGE 36,Change PCN2 Flootprint From DJ-305S-new to DJ-305S
*)PAGE 29,Change R898 Footprint From R0603 to R0402 *)MODIFY JP32,GND-A AND AGND
2/21/FEB
UPDATE FROM 736 A(2.0) VER 0.4(C3-TEST) TO 736B ( A 2.1) VER 0. 6
FOR LCL TUNNING: *)PAGE 7: ADD LCL FILTER: ADD L42,L43,L45,L46,L47,L51 & C1193 ~ C1197 ON DICLK#0~3,AICLK# FOR EMI REQUESTMENT: ADD C1198 ~ C1201 ON JP17 PIN15 ~ 18 2/27FEB *)PAGE 7,Change D12.1 FROM SUSB# TO CPU_STP#,AND MOUNT D12 3/1/MARCH *)PAGE 5,ADD R1024,TP5,TP6 ON SUS_STAT# FOR RESERVE
A A
*)PAGE 23,MODIFY MIC GND,R1022 CONNECT TO AGND,R1023 CONNECT TO GND 3/7/MARCH FIX EARPHONE NOISE: *)PAGE 26:DEL L29, PAGE 27:DEL R996;PAGE 23:DEL R997
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
4
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3
3/14/MARCH *)Power Team Modify Circuit By Send New Schematic(Jone) 3/16/MARCH *)PAGE 3,DEL R436,R437,R438(330) By AMD Suggestion!
2
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
1
40 45Monday, September 10, 2001
of
1F
Page 44
4
3
2
1
N32NN061 / LA-736B Rev1.0 HISTORY LIST (PIR) FOR MP
4/10/APRIL
*)PAGE 5,Tunning S2K BUS Time:(Clock In Side) Use AD[31..24] "FC"
DEL R1004,R1005(10K_0402),ADD R496,R502(2.2_0402)
*)PAGE 5,Change RP3,RP4,RP5,RP6,RP7 From 8P4R-8.2K To 8P4R-2.7K *)PAGE 6,Change R515,R517 From CHB1608U800 To 4.7 Ohm (By EMI Requestment)
D D
*)PAGE 6,Change R516,R519,R520,R521 From CHB2012U800_0805 To 4.7_0805 Ohm (By EMI Requestment) *)PAGE 10,Change TV_OUT Power Source From +3V to +3Vs
DEL R1009,R1010(0 Ohm),R1012 (22K),AND R592,R1011(0 Ohm),R600(22 K)
*)PAGE 28,For FIX Audio Quality: Change R862,R866,R878,R882 From 22K to 1.5K_1%
4/16/APRIL
*)PAGE 5,Tunning S2K BUS Time:(Clock In Side & Clock Out Side) Use AD[31..24] :"75" (By ALI Suggestion) DEL R1008,R991,R496(10K_0402),then ADD R1025,R497,R1004 (By ALI Suggestion) For Fix S4 Resume issue: *)PAGE 26,DEL C1031(22 PF),Change R804 From 47 Ohm to 22 Ohm
4/20/APRIL
For Enable Save Power Consumption Function,Ali Suggest Need Pull Low "THERMJ": *)PAGE 16,ADD R1027(4.7K) For FIX MIC Phone Record Noise Issue:
C C
*)PAGE 27,Change C1077 From 0 Ohm to 1UF,R836 From 1K to 0 Ohm For Fix Wireless Noise Issue: *)PAGE 23,Mount R997 0 Ohm
5/4/MAY
Update Power P.I.R
5/16/MAY
Update Power Circuit By Jones send(5/15)
B B
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
4
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3
2
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
1
41 45Monday, September 10, 2001
of
1F
Page 45
4
3
2
1
N32NN061 / LA-736C Rev1.0 HISTORY LIST (PIR) C-TEST
5/28/MAY
*)PAGE 16:ADD R1027(4.7K) For Enable Clock Trollter (Save Power Comsumption.) Layout: Modify +5VALW,+3VALW Trace,Add Trace By Cut Power Plan. Power Team Modify PCN2 Footprint
D D
ME Team Modify OUTLET Drawing!
5/31/MAY
*)PAGE 5,Set Strapping Pin "7C" Clock Tunning: *)PAGE 7:Change R539,R540 From 33 to 22 Ohm. *)PAGE 5:Change R472 From 0 to 33 Ohm. For PC-133 Tunning: *)PAGE 11,Change RP18 ~ RP23 From 22 to 10 Ohm For Save Power Comsumption While S3: *)PAGE 6,Change R522 From 270_1% to 1.5K_1%; R523 From 180_1% to 1K_1%. For PCMCIA Power Solution More Stable: *)PAGE 20: Change C938 ~ C944 From 0.1UF to 1UF For Change Sourth Bridge From M1535 to M1535+: *)PAGE 15:DEL R980,Mount R979 (For IDE Power Solution)
C C
*)PAGE 21:DEL R978,R740,Mount R981,R982 (FOR IDE IORDY)
8/28/2001 Modify BOM before M P
EMI Solution
*)PAGE 35: PR226 change from 0 to 2.2 ohm *)PAGE 17: L17,L18,L21,L22 from 800 to 300 ohm
KDS crystal issue
*)PAGE 26: R808 change from 0 to 390 ohm C1033 change from 33 PF to 12
Improve POP sound when CD player power on
PF *)PAGE 27: R833 delete
Improve pcmcia modem sound
*)PAGE 27: R849 change from 10K to 2.2K
B B
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
4
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3
2
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
1
42 45Monday, September 10, 2001
of
1F
Page 46
5
4
3
2
1
Version change list (P.I.R. List) Page 1 of 2
Power section
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
P1
D D
P2
P3
P4
P5 P6
P7
C C
P8
AC018 With adapter connected, system
P9
will shut down by r em ov e b a tte r y.
DCIN quiescent current too large while battery existed
Change Ni-MH c h an g in g c ur r e n t t o 2 A Change PR231 to 26.1K34
Improve overshot voltage of charger start-up voltage
Setting OCP of CPU-Core at 30A
Reduce noise on PU9
Trace between PF1 and PC1 too small 1. rework withg big wir e
Setting OVP point of Ni-MH charging voltag e a t 1 8 .5 V Change PR74 to 768K.
Setting CPU thermal protection point to 100C Change PR257 to 16.9K Function for selecting cell on PU10 didn't wor k well
0.1
0.1
0.1 35
0.1 35 0.2 EVT1
0.1 36
0.1 36 0.2 EVT1
0.1 35 0.2 EVT1
0.1
AC019 Use R570.exe to check the
340.1
Change PC172 to 2700PF.
34
1. Remove PR112
2. Add +5VALW to PU9 Pin#10
Change PC80 to 1UF/10V.
2. remove PL5 and enlarge trace in next ver.
36 34
1. Change PR127 to 15K.
2. Change PQ19 to SI2303DY.
0.2Connect PR241 to PU10
EVT1
EVT1
0.2
EVT1
0.2
EVT1
0.2
0.2 EVT1
EVT1
0.2
charging status, battery cannot be
charged
P10
Setting input of VID from system chip 1. reserve PR280
0.1A
35 0.2 EVT1
2. Add +5VALW to PU9 pin#16 DVT1
P11
B B
P12
Add PR272 for testing VR-ON Add PR272
Reverve resistors and capa c itors for selecting B set of VID in PU9
0.1A
0.2 35
35
1. Add PR273, PR274, PR275, PR276, PR277, PC190, PC191, PC192
0.2 DVT1
0.2 DVT1
2. set o to all resistor
3. set 4700PF to all capacitors
P13
reserve resistor to adjust OCP setting point of PU9. 1. Add PR278.
P14
reserve resistor to have a option of A/B#
P15
P16
A A
reserve resistor to have a option for monitoring feedback of CPU voltage
reserve a resistor to ground PU9 pin11 for COREF B - 0.2 35 Add PR28 1
0.2 35
2. set PR278 to 0
0.2 35 0.2 DVT1
1. Add PR279.
2. set PR279 to 0
1. Add PR282, PR283
2. set PR282, PR283 to 0
0.2 DVT1
0.2 DVT10.2 35
0.2 DVT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
3
2
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
43 45Monday, September 10, 2001
1
of
1F
Page 47
5
4
3
2
1
Version change list (P.I.R. List) Page 2 of 2
Power section
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
P17
D D
P18
Reduce transition of control signal 1. Add PC187, PC188, PC189
Cost down on common choke
340.2
2. set PC187, PC189 to .1UF
1. reserve PL10, PL11
0.2
0.2 DVT10.2 36
DVT1
2. use KC FBM-LI11-322523-121AT at PL10, PL11 to replace PT2
P19
Cost down on CPU thermal protection circuitry 1. delete PQ110, PC169, PD45, PR263,
0.2 36
PD49
2. change the location of PH1
0.2
DVT1
3. PR256 change to 5.11K
4. PR257 change to 7.32K
5. PR257 connect to VL
P20
C C
P21
delete redundant resistor
Reduce leakage current of battery quiescent on system 0.2 34 Change PQ112 to SI4810DY
delete PR1630.2 34 0.2
DVT1
P22
Improve EMI performance
0.1A &
0.2
0.2
35 33
add PL9
Change PR129, PR130 to 4.7
0.2
EVT1
DVT1
DVT1
P23
B B
P24
P25
Improve voltage rating 0.2 35 Change PD39 from RB081L-20 to
EC31QS04
Cost d o w n on CP U _ C O R E 0.2 35 Delete PD28 0.2 DVT1
Modify Thermal Protection to 85 degree C 36
0.3
1. Change PR256 to 0
2. Change PR258 to 16.9K
0.2 DVT1
0.2
PVT
3. Change PR257 to 2.15K
P26
Improve current rating
P27
A A
0.3
0.3 36 0.2 PVTChange footprint Change footprint of PR200 to R0805
36
Change PL11 and PL10 to CHENG-HANNCHC4532U800(1812)
0.2
PVT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
3
2
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
44 45Monday, September 10, 2001
1
of
1F
Page 48
5
4
3
2
1
Version change list (P.I.R. List) Page 2 of 2
Power section
Reason for change Rev. PG# Modify List B.Ver# PhaseFixed IssueItem
34
P28
D D
P29
Enhance OVP function
Increase charger OVP design margin for plugging out Ni_MH battery
0.2
0.3
0.4
1. change PQ15 from DTC115EK to 2N7002 (P34)
36
2 .change PR83 from 100K to 10K (P36)
1. change PC67 from 1000pF to 0.1uF 2 .change PC66 from 1uF to 4.7uF
36
3. add PC194 0.1uF 0805
4. add PR287 1M
0.2 DVT1
0.3 DVT3
5. add PR286 2.2K 0805
6. add PQ117 2N7002
P30
P31
C C
Fix OVP function
Remove OVP function
0.4 36
P32
1. change pin#6 of PU4 connection from VREF to RT CV REF 2 .change PR84 from 249K to 374K
3. change PR74 from 768K to 1.1M
1. Delete PQ25 and PQ26 2n7002 2 .Delete PR87 100K +-5% 0603
3. Delete PR82 324K +-1% 0603
4. Delete PR73 39K +-5% 0603
0.3 DVT3
5. Delete PR83 10K +-1% 0603
P33
0.4 36
6. Delete PR72 and PR74 1M +-0.5% 0603
7. Delete PC66 4.7UF_1206_25V
8. Delete PC67 0.1UF_0603_16V
0.3 DVT3
9. Delete PD25 1SS355
10.Delete PC65 2.2UF_16V
11.Change PR84 from 249K to 0
Increase design margin 1. Add PR288 10K
2. Change PR59 from 10K to 3.9K
P34
B B
34
3. Change PR11 from 150K to 51K
4. Change PR241 from 113K to
95.3K
DVT3
5. Change PR270 from 100K to 33K
P35
P36
Reduce leakage current while plugging out Adapter
36
34
6. Change PC167 from 1U to 1000P
1. Change PQ15 from DTC115EK to 2SC2411K 2 .Change PR288 from 10K to 0
DVT3
P37
P38
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
3
2
Title
SCHEMATIC, M/B LA-736/736B/736C
Size Document Number Rev
401168
Date: Sheet
45 45Monday, September 10, 2001
1
of
1F
Page 49
Loading...