Compal LA-7241P P4LS0, ID47H, EasyNote NX69 Schematic

5

4

3

2

1

D D

+1.05VS_VCCP

12

R419

24.9_0402_1%

JCPU1A

EDP_COMP

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

SUYIN_100361HK988_SANDY BRIDGE

CONN@

DMI

Intel(R) FDI

eDP

DMI_CRX_PTX_N0<16> DMI_CRX_PTX_N1<16> DMI_CRX_PTX_N2<16> DMI_CRX_PTX_N3<16>

DMI_CRX_PTX_P0<16> DMI_CRX_PTX_P1<16> DMI_CRX_PTX_P2<16> DMI_CRX_PTX_P3<16>

DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>

DMI_CTX_PRX_P0<16>

C C

+1.05VS_VCCP

eDP_COMPIO and ICOMPO signals

B B

should be shorted near balls and routed with typical impedance <25 mohms

12

R106

24.9_0402_1%

DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>

FDI_CTX_PRX_N0<16> FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N2<16> FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N5<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N7<16>

FDI_CTX_PRX_P0<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P3<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P6<16> FDI_CTX_PRX_P7<16>

FDI_FSYNC0<16> FDI_FSYNC1<16>

FDI_INT<16>

FDI_LSYNC0<16> FDI_LSYNC1<16>

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12]

PCI EXPRESS* - GRAPHICS

PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

J22 J21 H22

PEG_GTX_C_HRX_N15

K33

PEG_GTX_C_HRX_N14

M35

PEG_GTX_C_HRX_N13

L34

PEG_GTX_C_HRX_N12

J35

PEG_GTX_C_HRX_N11

J32

PEG_GTX_C_HRX_N10

H34

PEG_GTX_C_HRX_N9

H31

PEG_GTX_C_HRX_N8

G33

PEG_GTX_C_HRX_N7

G30

PEG_GTX_C_HRX_N6

F35

PEG_GTX_C_HRX_N5

E34

PEG_GTX_C_HRX_N4

E32

PEG_GTX_C_HRX_N3

D33

PEG_GTX_C_HRX_N2

D31

PEG_GTX_C_HRX_N1

B33

PEG_GTX_C_HRX_N0

C32

PEG_GTX_C_HRX_P15

J33

PEG_GTX_C_HRX_P14

L35

PEG_GTX_C_HRX_P13

K34

PEG_GTX_C_HRX_P12

H35

PEG_GTX_C_HRX_P11

H32

PEG_GTX_C_HRX_P10

G34

PEG_GTX_C_HRX_P9

G31

PEG_GTX_C_HRX_P8

F33

PEG_GTX_C_HRX_P7

F30

PEG_GTX_C_HRX_P6

E35

PEG_GTX_C_HRX_P5

E33

PEG_GTX_C_HRX_P4

F32

PEG_GTX_C_HRX_P3

D34

PEG_GTX_C_HRX_P2

E31

PEG_GTX_C_HRX_P1

C33

PEG_GTX_C_HRX_P0

B32

PEG_HTX_GRX_N15

M29

PEG_HTX_GRX_N14

M32

PEG_HTX_GRX_N13

M31

PEG_HTX_GRX_N12

L32

PEG_HTX_GRX_N11

L29

PEG_HTX_GRX_N10

K31

PEG_HTX_GRX_N9

K28

PEG_HTX_GRX_N8

J30

PEG_HTX_GRX_N7

J28

PEG_HTX_GRX_N6

H29

PEG_HTX_GRX_N5

G27

PEG_HTX_GRX_N4

E29

PEG_HTX_GRX_N3

F27

PEG_HTX_GRX_N2

D28

PEG_HTX_GRX_N1

F26

PEG_HTX_GRX_N0

E25

PEG_HTX_GRX_P15

M28

PEG_HTX_GRX_P14

M33

PEG_HTX_GRX_P13

M30

PEG_HTX_GRX_P12

L31

PEG_HTX_GRX_P11

L28

PEG_HTX_GRX_P10

K30

PEG_HTX_GRX_P9

K27

PEG_HTX_GRX_P8

J29

PEG_HTX_GRX_P7

J27

PEG_HTX_GRX_P6

H28

PEG_HTX_GRX_P5

G28

PEG_HTX_GRX_P4

E28

PEG_HTX_GRX_P3

F28

PEG_HTX_GRX_P2

D27

PEG_HTX_GRX_P1

E26

PEG_HTX_GRX_P0

D25

PEG_COMP

24.9_0402_1%

C547 0.1U_0402_10V7KOPT@C547 0.1U_0402_10V7KOPT@

1 2

C545 0.1U_0402_10V7KOPT@C545 0.1U_0402_10V7KOPT@

1 2

C543 0.1U_0402_10V7KOPT@C543 0.1U_0402_10V7KOPT@

1 2

C541 0.1U_0402_10V7KOPT@C541 0.1U_0402_10V7KOPT@

1 2

C555 0.1U_0402_10V7KOPT@C555 0.1U_0402_10V7KOPT@

1 2

C553 0.1U_0402_10V7KOPT@C553 0.1U_0402_10V7KOPT@

1 2

C556 0.1U_0402_10V7KOPT@C556 0.1U_0402_10V7KOPT@

1 2

C561 0.1U_0402_10V7KOPT@C561 0.1U_0402_10V7KOPT@

1 2

C563 0.1U_0402_10V7KOPT@C563 0.1U_0402_10V7KOPT@

1 2

C569 0.1U_0402_10V7KOPT@C569 0.1U_0402_10V7KOPT@

1 2

C571 0.1U_0402_10V7KOPT@C571 0.1U_0402_10V7KOPT@

1 2

C574 0.1U_0402_10V7KOPT@C574 0.1U_0402_10V7KOPT@

1 2

C576 0.1U_0402_10V7KOPT@C576 0.1U_0402_10V7KOPT@

1 2

C579 0.1U_0402_10V7KOPT@C579 0.1U_0402_10V7KOPT@

1 2

C582 0.1U_0402_10V7KOPT@C582 0.1U_0402_10V7KOPT@

1 2

C587 0.1U_0402_10V7KOPT@C587 0.1U_0402_10V7KOPT@

1 2

C546 0.1U_0402_10V7KOPT@C546 0.1U_0402_10V7KOPT@

1 2

C544 0.1U_0402_10V7KOPT@C544 0.1U_0402_10V7KOPT@

1 2

C542 0.1U_0402_10V7KOPT@C542 0.1U_0402_10V7KOPT@

1 2

C540 0.1U_0402_10V7KOPT@C540 0.1U_0402_10V7KOPT@

1 2

C554 0.1U_0402_10V7KOPT@C554 0.1U_0402_10V7KOPT@

1 2

C552 0.1U_0402_10V7KOPT@C552 0.1U_0402_10V7KOPT@

1 2

C557 0.1U_0402_10V7KOPT@C557 0.1U_0402_10V7KOPT@

1 2

C562 0.1U_0402_10V7KOPT@C562 0.1U_0402_10V7KOPT@

1 2

C565 0.1U_0402_10V7KOPT@C565 0.1U_0402_10V7KOPT@

1 2

C570 0.1U_0402_10V7KOPT@C570 0.1U_0402_10V7KOPT@

1 2

C572 0.1U_0402_10V7KOPT@C572 0.1U_0402_10V7KOPT@

1 2

C575 0.1U_0402_10V7KOPT@C575 0.1U_0402_10V7KOPT@

1 2

C577 0.1U_0402_10V7KOPT@C577 0.1U_0402_10V7KOPT@

1 2

C581 0.1U_0402_10V7KOPT@C581 0.1U_0402_10V7KOPT@

1 2

C585 0.1U_0402_10V7KOPT@C585 0.1U_0402_10V7KOPT@

1 2

C588 0.1U_0402_10V7KOPT@C588 0.1U_0402_10V7KOPT@

1 2

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 mohms

PEG_HTX_C_GRX_N15 PEG_HTX_C_GRX_N14 PEG_HTX_C_GRX_N13 PEG_HTX_C_GRX_N12 PEG_HTX_C_GRX_N11 PEG_HTX_C_GRX_N10 PEG_HTX_C_GRX_N9 PEG_HTX_C_GRX_N8 PEG_HTX_C_GRX_N7 PEG_HTX_C_GRX_N6 PEG_HTX_C_GRX_N5 PEG_HTX_C_GRX_N4 PEG_HTX_C_GRX_N3 PEG_HTX_C_GRX_N2 PEG_HTX_C_GRX_N1 PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_P15 PEG_HTX_C_GRX_P14 PEG_HTX_C_GRX_P13 PEG_HTX_C_GRX_P12 PEG_HTX_C_GRX_P11 PEG_HTX_C_GRX_P10 PEG_HTX_C_GRX_P9 PEG_HTX_C_GRX_P8 PEG_HTX_C_GRX_P7 PEG_HTX_C_GRX_P6 PEG_HTX_C_GRX_P5 PEG_HTX_C_GRX_P4 PEG_HTX_C_GRX_P3 PEG_HTX_C_GRX_P2 PEG_HTX_C_GRX_P1 PEG_HTX_C_GRX_P0

PEG_GTX_C_HRX_N[0..15] <23> PEG_GTX_C_HRX_P[0..15] <23>

PEG_HTX_C_GRX_N[0..15] <23> PEG_HTX_C_GRX_P[0..15] <23>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

2010/09/28

Compal Secret Data

Deciphered Date

2011/09/28

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(1/7) DMI,FDI,PEG

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

4

1

55

0.1

5

D D

4

3

2

1

XDP_DBRESET#

R407 1K_0402_5%R407 1K_0402_5%

+3VS

12

For eDP

CLK_CPU_DPLL_R

CLK_CPU_DPLL#_R

JCPU1B

C C

H_SNB_IVB#<18>

+1.05VS_VCCP

B B

PLT_RST# PM_DRAM_PWR GD_RPM_SYS_PWRGD_BUF

Follow DG 0.71

A A

PM_DRAM_PWR GD<16>

Processor Pullups

R67 62_0402_5%R67 62_0402_5%

R70 10K_0402_5%R70 10K_0402_5%

12

Buffered reset to CPU

+3VS

12

C74

0.1U_0402_16V4Z

5

U8

1

P

NC

2

A

PLT_RST# <18,35,38,39,44>

BUFO_CPU_RST#

4

Y

G

SN74LVC1G07DCKR_SC70-5

3

+3VS

0.1U_0402_16V4Z

10K_0402_5%

1 2

5

R440

H_PROCHOT#

H_CPUPWRGD

+1.05VS_VCCP

12

C280

R84

R84 75_0402_5%

75_0402_5%

R85

43_0402_1%

1 2

+3VALW

U11

U11 74AHC1G09GW_TSSOP5

74AHC1G09GW_TSSOP5

5

1

P

B

2

A

G

3

SUSP<46,53>

BUF_CPU_RST#

12

@

R86

R86 0_0402_5%

0_0402_5%

PM_SYS_PWRGD_BUF

4

O

SUSP

2

G

+1.5V_CPU_VDDQ

12

@

R153

R153 39_0402_5%

39_0402_5%

13

D

@

Q19

Q19 2N7002E_SOT23-3

2N7002E_SOT23-3

S

12

R149

R149 200_0402_5%

200_0402_5%

R72

H_CATERR#

H_PROCHOT#_R

H_CPUPWRGD

BUF_CPU_RST#

T9 PADT9 PAD

H_PECI<19,39>

56_0402_5%

H_PROCHOT#<39,50>

H_THRMTRIP#<19>

H_CPUPWRGD<19>

4

1 2

H_PM_SYNC<16>

R150

130_0402_5%

1 2

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWR OK

AR33

RESET#

SUYIN_100361HK988_SANDY BRIDGE

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MISCTHERMALPWR MANAGEMENT

CLOCKS

DDR3

JTAG & BPM

2010/09/28

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

MISC

PREQ#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

Compal Secret Data

BCLK

BCLK#

PRDY#

TRST#

DBR#

A28 A27

A16 A15

R8

AK1 A5 A4

AP29 AP27

AR26

TCK

AR27

TMS

AP30

AR28

TDI

AP26

TDO

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

Deciphered Date

CLK_CPU_DMI CLK_CPU_DMI#

CLK_CPU_DPLL_R CLK_CPU_DPLL#_R

H_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

DBRESET#_R

2

R409 1K_0402_5%R409 1K_0402_5%

1 2

R414 1K_0402_5%R414 1K_0402_5%

1 2

H_DRAMRST# <6>

T7PAD T7PAD T27PAD T27PAD T25PAD T25PAD

T26PAD T26PAD T6PAD T6PAD

R402 0_0402_5%R402 0_0402_5%

1 2

2011/09/28

CLK_CPU_DMI <15> CLK_CPU_DMI# <15>

XDP_DBRESET#

Title

Size Document Number Rev

Custom

Date: Sheet of

R410 0_0402_5%@R410 0_0402_5%@

1 2

R413 0_0402_5%@R413 0_0402_5%@

1 2

+1.05VS_VCCP

CLK_CPU_DPLL <15>

CLK_CPU_DPLL# <15>

DDR3 compensation Signals

SM_RCOMP0

R151 140_0402_1%R151 140_0402_1%

SM_RCOMP1

R436 25.5_0402_1%R436 25.5_0402_1%

SM_RCOMP2

R437 200_0402_1%R437 200_0402_1%

12

PU/PD for JTAG signals

Del resister and add test point

XDP_DBRESET# <16>

Compal Electronics, Inc.

PROCESSOR(2/7) PM,XDP,CLK

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

5

0.1

55

5

JCPU1C

4

3

JCPU1D

2

1

DDR_A_D[0..63]<11,12>

D D

C C

B B

DDR_A_BS0<11,12> DDR_A_BS1<11,12> DDR_A_BS2<11,12>

DDR_A_CAS#<11,12> DDR_A_RAS#<11,12> DDR_A_WE#<11,12>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AP11 AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8

AK9 AH8 AH9 AL9 AL8

AE8 AD9 AF9

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9] SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24] SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27] SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40] SA_DQ[41]

AJ9

SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1]

V6

SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

RSVD_TP[10]

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]

RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]

SA_CS#[0]

SA_CS#[1] RSVD_TP[7] RSVD_TP[8]

SA_ODT[0]

SA_ODT[1] RSVD_TP[9]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_CLK_DDR1 M_CLK_DDR#1

R159 36_0402_1%R159 36_0402_1%

R161 36_0402_1%R161 36_0402_1%

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 <11,12> M_CLK_DDR#0 <11,12> DDR_CKE0_CHA <11,12>

12

R160 36_0402_1%R160 36_0402_1%

DDR_CS0_CHA# < 11,12>

12

M_ODT0 <11,12>

12

DDR_A_DQS#[0..7] <11,12>

DDR_A_DQS[0..7] <11,12>

DDR_A_MA[0..15] <11,12> DDR_B_MA[0..15] <13>

+0.75VS

DDR_B_D[0..63]<13>

DDR_B_BS0<13> DDR_B_BS1<13> DDR_B_BS2<13>

DDR_B_CAS#<13> DDR_B_RAS#<13> DDR_B_WE#<13>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9 AA7

AA10

AB8 AB9

J10

C9 A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2

J7 J8

K9

J9

K8

K7 M5 N4 N2 N1 M4 N5 M2 M1

R6

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

DDR SYSTEM MEMORY B

RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]

RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]

RSVD_TP[17] RSVD_TP[18]

RSVD_TP[19] RSVD_TP[20]

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0] SB_CS#[1]

SB_ODT[0] SB_ODT[1]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

M_CLK_DDR2 <13> M_CLK_DDR#2 <13> DDR_CKE2_DIMMB <13>

M_CLK_DDR3 <13> M_CLK_DDR#3 <13> DDR_CKE3_DIMMB <13>

DDR_CS2_DIMMB# <13> DDR_CS3_DIMMB# <13>

M_ODT2 <13> M_ODT3 <13>

DDR_B_DQS#[0..7] <13>

DDR_B_DQS[0..7] <13>

SUYIN_100361HK988_SANDY BRIDGE

R156@

0_0402_5%

1 2

D

S

D

S

123

Q17

Q17 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

G

12

C260

0.047U_0402_16V4Z

DDR3_DRAMRST#_R

5

H_DRAMRST#

4.99K_0402_1%

R155

1 2

H_DRAMRST#<5>

A A

DRAMRST_CNTRL_PCH<11,13,15>

+1.5V

R192

1K_0402_5%

12

R193

R193 1K_0402_5%

1K_0402_5%

1 2

4

CONN@

DDR3_DRAMRST# <11,12,13>

M_CLK_DDR1

M_CLK_DDR#1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

1

C251

1.8P_0402_50V8

2

1 2

R163

30.1_0402_1%

R162

30.1_0402_1%

2010/09/28

1

C261

0.1U_0402_16V4Z

2

Compal Secret Data

SUYIN_100361HK988_SANDY BRIDGE

Deciphered Date

2

2011/09/28

CONN@

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(3/7) DDRIII

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1

55

6

55

6

55

6

5

4

3

2

1

CFG Straps for Processor

CFG2

D D

JCPU1E

L7

RSVD28

AG7

AK28

CFG[0]

AK29

CFG2

CFG4 CFG5 CFG6 CFG7

C C

B B

AJ31 change to VAXG_VAL_SENSE AH31 change to VSSAXG_VAL_SENSE AJ33 change to VCC_VAL_SENSE AH33 change to VSS_VAL_SENSE

RSVD6 and RSVD7 had changed to SA_DIMM_VREFDQ and SB_DIMMVREFDQ

SA_DIMM_VREFDQ<11>

+3VS

SB_DIMM_VREFDQ<13>

12

R406

R406 10K_0402_5%@

10K_0402_5%@

VCCIO_SEL

12

R408

R408 10K_0402_5%@

10K_0402_5%@

SA_DIMM_VREFDQ SB_DIMM_VREFDQ For Future CPU M3 support, Sandey bridge not supportM3, Check list1.0&CRB say can NC

R157

1K_0402_1%

T8 PADT8 PAD T4 PADT4 PAD T3 PADT3 PAD T2 PADT2 PAD

12

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

12

R158

R158 1K_0402_1%

1K_0402_1%

VCCIO_SEL

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

VCCIO_SEL

J15

RSVD27

RESERVED

VCCIO_SEL

1/NC : (Default) +1.05VS_VTT

A19

*

0: +1.0VS_VTT

SUYIN_100361HK988_SANDY BRIDGE

CONN@

RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RSVD51 RSVD52

VCC_DIE_SENSE

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

KEY

AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

T5PAD T5PAD

PEG Static Lane Reversal - CFG2 is for the 16x

CFG2

*

Display Port Presence Strap

CFG4

*

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

*

CFG[6:5]

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

12

R90

R90 1K_0402_1%

1K_0402_1%

1: Normal Operation; Lane # definition matches socket pin map definition

0:Lane Reversed

CFG4

1K_0402_1%

12

@

R91

R91 1K_0402_1%

1K_0402_1%

1 : Disabled; No Physical Display Port attached to Embedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

CFG6

CFG5

CFG7

12

R87@

12

R87@

1K_0402_1%

R71@

R71@ 1K_0402_1%

1K_0402_1%

R88@

VCCIO_SEL For 2012 CPU support

RSVD26 had changed the name to VCCIO_SEL Need PH +3VS 10K at +1.05VS_VTT source for 2012 processor +1.05V and +1.0V select

A A

PEG DEFER TRAINING

1: (Default) PEG Train immediately following xxRESETB

CFG7

de assertion

0: PEG Wait for BIOS for training

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(4/7) RSVD,CFG

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

7

55

0.1

5

+CPU_CORE

C97

10U_0805_6.3V6M

C97

10U_0805_6.3V6M

C98

10U_0805_6.3V6M

C98

10U_0805_6.3V6M

12

D D

12

+CPU_CORE

C59

22U_0805_6.3V6M

C59

22U_0805_6.3V6M

12

C100

22U_0805_6.3V6M

C100

22U_0805_6.3V6M

+CPU_CORE

12

@

C C

B B

A A

12

C608

10U_0805_6.3V6M

C608

10U_0805_6.3V6M

12

330U_D2_2V_Y

12

+

C80

10U_0805_6.3V6M

C80

10U_0805_6.3V6M

12

C60

22U_0805_6.3V6M

C60

22U_0805_6.3V6M

C58

22U_0805_6.3V6M

C58

22U_0805_6.3V6M

12

C81

22U_0805_6.3V6M

C81

22U_0805_6.3V6M

C92

22U_0805_6.3V6M

C92

22U_0805_6.3V6M

12

C551

330U_D2_2V_Y+C551

330U_D2_2V_Y

C33

12

+

4

SV type CPU

QC 94A DC 53A

C77

10U_0805_6.3V6M

C77

10U_0805_6.3V6M

C82

10U_0805_6.3V6M

C82

10U_0805_6.3V6M

C78

10U_0805_6.3V6M

C78

10U_0805_6.3V6M

12

C595

10U_0805_6.3V6M

C595

10U_0805_6.3V6M

12

C55

22U_0805_6.3V6M

C55

22U_0805_6.3V6M

12

C99

22U_0805_6.3V6M

C99

22U_0805_6.3V6M

12

C516

330U_D2_2V_Y+C516

330U_D2_2V_Y

12

+

12

C592

10U_0805_6.3V6M

C592

10U_0805_6.3V6M

12

C128

330U_D2_2V_Y+C128

330U_D2_2V_Y

C594

10U_0805_6.3V6M

C594

10U_0805_6.3V6M

12

C34

22U_0805_6.3V6M

C34

22U_0805_6.3V6M

12

C79

22U_0805_6.3V6M

C79

22U_0805_6.3V6M

12

330U_D2_2V_Y

12

C603

+

C591

22U_0805_6.3V6M

C591

22U_0805_6.3V6M

C593

22U_0805_6.3V6M

C593

C600

C96

22U_0805_6.3V6M

12

C105

22U_0805_6.3V6M

C105

22U_0805_6.3V6M

12

C605

22U_0805_6.3V6M

C605

22U_0805_6.3V6M

12

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

3

POWER

JCPU1F

POWER

8.5A

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

CORE SUPPLY

SENSE LINES SVID

PEG AND DDR

VCCIO_SENSE

VSSIO_SENSE

VCC_SENSE VSS_SENSE

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

2

+1.05VS_VCCP

12

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

22U_0805_6.3V6M

12

C163

C168

22U_0805_6.3V6M

12

C164

C166

12

R59

R59 130_0402_5%

130_0402_5%

R56 0_0402_5%R56 0_0402_5% R58 0_0402_5%R58 0_0402_5%

VCCIO_SENSE <53> VSSIO_SENSE <53>

22U_0805_6.3V6M

12

C167

22U_0805_6.3V6M

12

@

C111

+1.05VS_VCCP+1.05VS_VCCP

R57

43_0402_1%

1 2 1 2 1 2

22U_0805_6.3V6M

12

C161

22U_0805_6.3V6M

12

@

C126

22U_0805_6.3V6M

12

C165

330U_D2_2V_Y

12

C598

+

22U_0805_6.3V6M

12

C612

12

+

C155@

330U_D2_2V_Y

12

C613

330U_D2_2V_Y

12

C606

+

Cap quantity follow 43890_HR_CHKLST_Rev07

12

R54

R54 75_0402_5%

75_0402_5%

Place the PU resistors close to VR

R76

R76 100_0402_1%

100_0402_1%

R77

R77 100_0402_1%

100_0402_1%

Place the PU resistors close to CPU

VCCSENSE <54 > VSSSENSE <54>

+CPU_CORE

12

1

22U_0805_6.3V6M

12

C611

VR_SVID_ALRT# <54> VR_SVID_CLK <54> VR_SVID_DAT <54>

C610

+1.05VS_VCCP

22U_0805_6.3V6M

12

C156

SUYIN_100361HK988_SANDY BRIDGE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

CONN@

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(5/7) PWR,BYPASS

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

8

55

0.1

5

D D

+VGFX_CORE

22U_0805_6.3V6M

C109

12

22U_0805_6.3V6M

C88

12

C124

C95

12

2x 470 µF Bottom Socket Edge

2x 22 µF Top Socket Cavity

22U_0805_6.3V6M

4x 22 µF Top Socket Edge

C C

2x 470 µF Bottom Socket Cavity

22U_0805_6.3V6M

C119

C87

12

22U_0805_6.3V6M

C135

C94

12

C94

12

4x 22 µF Bottom Socket Edge

330U_D2_2V_Y

12

+

@

C583

C614

+

22U_0805_6.3V6M

@

C141

C596

12

Vaxg

Can connect to GND if motherboard only

‧

supports external graphics and if GFX VR is not stuffed in a common motherboard design,

VAXG can be left floating in a common

B B

‧

motherboard design (Gfx VR keeps VAXG from floating) if the VR is stuffed

+1.8VS

R432

0_0805_5%

1 2

C618

330U_D2_2V_Y+C618

330U_D2_2V_Y

12

+

4

POWER

QC 33A DC 26A

22U_0805_6.3V6M

C125

C110

12

22U_0805_6.3V6M

C142

C604

12

C604

12

AT24 AT23 AT21 AT20 AT18

AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17 AK24 AK23 AK21 AK20 AK18 AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

JCPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

POWER

GRAPHICS

1.5A

+1.8VS_VCCPLL

C624

1U_0402_6.3V6K

C624

1U_0402_6.3V6K

C623

1U_0402_6.3V6K

C623

C622

10U_0805_6.3V6M

C622

10U_0805_6.3V6M

12

1U_0402_6.3V6K

12

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

1.8V RAIL

SUYIN_100361HK988_SANDY BRIDGE

CONN@

1.8V RAIL

SENSE

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

3

VAXG_SENSE

VSSAXG_SENSE

LINES

SM_VREF

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

FC_C22

VCCSA_VID1

AK35 AK34

+V_SM_VREF should have 20 mil trace width

AL1

0.1U_0402_16V4Z

10A

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

6A

M27 M26 L26 J26 J25 J24 H26 H25

H23

H_FC_C22

C22 C24

VCC_AXG_SENSE <54> VSS_AXG_SENSE <54>

+V_SM_VREF

12

C642

10U_0805_6.3V6M

12

C259

C276

+VCCSA

10U_0805_6.3V6M

12

C29

C590

12

R95

R95 10K_0402_5%

10K_0402_5%

1 2

2

Follow DG 0.71 page 6

+1.5V_CPU_VDDQ

12

R438

R438 1K_0402_1%

1K_0402_1%

12

R439

R439 1K_0402_1%

1K_0402_1%

10U_0805_6.3V6M

12

C248

10U_0603_6.3V6M

@

12

10U_0805_6.3V6M

12

C255

+VCCSA

C85

12

+

VCCSA_SENSE <52>

VCCSA_VID1 <52>

10U_0805_6.3V6M

12

C250

10U_0805_6.3V6M

12

C93

R93@

R93@ 0_0402_5%

0_0402_5%

+1.5V_CPU_VDDQ

10U_0805_6.3V6M

12

+

C262

C263

330U_D2_2V_Y

R390 0_0402_5%R390 0_0402_5%

1 2

C32

C32 330U_D2_2V_Y

330U_D2_2V_Y

R389 0_0402_5%R389 0_0402_5%

1 2

JP1@

1 2

PAD-OPEN 4x4m

VCCSA_SENSE

VSSSA_SENSE <52>

1

+1.5VS

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(6/7) PWR

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

9

55

9

55

9

55

0.1

5

D D

C C

B B

4

JCPU1H

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10

AR25 AR22 AR19 AR16 AR13 AR10

AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7 AM4 AM3 AM2

AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AJ25

AT7 AT4 AT3

AR7 AR4 AR2

AP7 AP4 AP1

AN7 AN4

AL7 AL4 AL2

AK7 AK4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

3

JCPU1I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

2

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

1

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

SUYIN_100361HK988_SANDY BRIDGE

CONN@

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

SUYIN_100361HK988_SANDY BRIDGE

CONN@

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR(7/7) VSS

P4LS0 M/B LA-7241P Schematic

Friday, November 19, 2010

1

10

55

10

55

10

55

0.1

5

4

3

2

1

U41

R552

F10

H10

A11

N11

C4 D4

B4 C8 C3 C9

E4

E9 D3

E8

A8

B8 H9

E2

J9

K4

L8

L4

K3

L9

L3 M9 M3 N9 M4 H8 M8

K8 N4

J8

H2

F2

A1 N8

A4 N1

R335

U41

DQS DQS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

NU/TDQS# DM/TDQS ZQ

VREFDQ VREFCA

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13

A15/BA3 NC NC NC NC NC NC NC NC NC NC

MT41J256M8HX-187E:D C38

X76@

C4 D4

B4 C8 C3 C9 E4 E9 D3 E8

A8 B8 H9

E2 J9

K4 L8 L4 K3 L9

L3 M9 M3

N9 M4

H8 M8

K8

N4

J8

F10

H2

F2

H10

A1

N8

A11

A4

N1

N11

RESET#

U20

DQS DQS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

NU/TDQS# DM/TDQS ZQ

VREFDQ VREFCA

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13

A15/BA3 NC NC NC NC NC NC NC NC NC NC

MT41J256M8HX-187E:D C38

X76@

VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

ODT

CKE

RAS# CAS#

WE#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

CK#

BA0 BA1 BA2

CS#

CK

RESET#

DDR_A_DQS0 DDR_A_DQS#0

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4

C736

2.2U_0603_6.3V6K

C736

2.2U_0603_6.3V6K

1 2

240_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

DDR_A_MA[0..15]

DDR_A_DQS#[0..3]

DDR_A_DQS[0..3]

DDR_A_D[0..31]

DDR_A_DQS3 DDR_A_DQS#3

5

DDR_A_D5 DDR_A_D6 DDR_A_D7

DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

1 2

240_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

D D

+VREF0 +VREF0 +VREF0

C750

0.1U_0402_16V4Z

C750

0.1U_0402_16V4Z

1

12

2

+VREF1

C740

0.1U_0402_16V4Z

C740

0.1U_0402_16V4Z

1

2

C C

DDR_A_MA[0..15]<6,12>

DDR_A_DQS#[0..3]<6>

DDR_A_DQS[0..3]<6>

DDR_A_D[0..31]<6>

B B

+VREF0

C412 0.1U_0402_16V4ZC412 0 .1U_0402_16V4Z

C411 0.1U_0402_16V4ZC411 0 .1U_0402_16V4Z

1

2

+VREF1

C450

0.1U_0402_16V4Z

C450

0.1U_0402_16V4Z

1

2

A A

+1.5V +1.5V

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

G2 F8 G8

DDR_CKE0_CHA

G10

J3 K9 J4

DDR_CS0_CHA#

H3 F4 G4 H4

DDR3_DRAMRST#

N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

ODT

CK

CK#

CKE

BA0 BA1 BA2

CS# RAS# CAS#

WE#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

M_ODT0

M_CLK_DDR0

M_CLK_DDR#0

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

G2 F8 G8

DDR_CKE0_CHA

G10

J3 K9 J4

DDR_CS0_CHA#

H3 F4 G4 H4

DDR3_DRAMRST#

N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

M_ODT0 <6,12> M_CLK_DDR0 <6,12> M_CLK_DDR#0 <6,12> DDR_CKE0_CHA <6,12>

DDR_A_BS0 <6,12> DDR_A_BS1 <6,12> DDR_A_BS2 <6,12>

DDR_CS0_CHA# <6,12> DDR_A_RAS# <6,12> DDR_A_CAS# <6,12> DDR_A_WE# <6,12> DDR3_DRAMRST# <6,12,13>

+1.5V

M_ODT0 M_CLK_DDR0 M_CLK_DDR#0

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

4

C452 0.1U_0402_16V4ZC452 0.1U_0402_16 V4Z

+VREF1

C455

0.1U_0402_16V4Z

C455

0.1U_0402_16V4Z

1

2

M3 support

SA_DIMM_VREFDQ<7>

DRAMRST_CNTRL_PC H<6,13,15>

DDR_A_DQS1 DDR_A_DQS#1

1 2

240_0402_1%

C451 0.1U_0402_16V4ZC451 0.1U_0402_16 V4Z

1

2

240_0402_1%

1

2

BSS138_NL_SOT23-3 @

R343

1K_0402_1%

R338

1K_0402_1%

DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

@R345

@

0_0402_5%

1 2

S

+1.5V

12

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

R336

R345

D

13

Q39

G

2

C449

0.1U_0402_16V4Z

C449

0.1U_0402_16V4Z

12

Issued Date

C4 D4

B4 C8 C3 C9 E4 E9 D3 E8

A8 B8 H9

E2

J9

K4

L8 L4

K3

L9

L3 M9 M3 N9 M4 H8 M8 K8 N4

J8

F10

H2 F2

H10

A1 N8

A11

A4 N1

N11

U21

DQS DQS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

NU/TDQS# DM/TDQS ZQ

VREFDQ VREFCA

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13

A15/BA3 NC NC NC NC NC NC NC NC NC NC

MT41J256M8HX-187E:D C38

X76@

+1.5V

12

R346

R346 1K_0402_1%

1K_0402_1%

12

R347

R347 1K_0402_1%

1K_0402_1%

+VREF1

2.2U_0603_6.3V6K

C448

12

3

B10

VDDQ

C2

VDDQ

E3

VDDQ

E10

VDDQ

A3

VDD

A10

VDD

D8

VDD

G3

VDD

G9

VDD

K2

VDD

K10

VDD

M2

VDD

M10

VDD

G2

ODT

F8

CK

G8

CK#

G10

CKE

J3

BA0

K9

BA1

J4

BA2

H3

CS#

F4

RAS#

G4

CAS#

H4

WE#

N3

RESET#

B3

VSSQ

B9

VSSQ

C10

VSSQ

D2

VSSQ

D10

VSSQ

A2

VSS

A9

VSS

B2

VSS

F3

VSS

F9

VSS

D9

VSS

J2

VSS

J10

VSS

L2

VSS

L10

VSS

N2

VSS

N10

VSS

+VREF0

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

C442

C462

12

2010/04/26 2011/04/26

+1.5V

M_ODT0 M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_CHA

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR3_DRAMRST#

Layout Note: Place near JDIMM1.203,204

DDR_A_RAS# DDR_A_CAS# M_ODT0

DDR_CKE0_CHA

DDR_A_WE# DDR_A_MA10

DDR_CS0_CHA#

DDR_A_BS2

DDR_A_BS0 DDR_A_MA12 DDR_A_MA0 DDR_A_BS1

DDR_A_MA3 DDR_A_MA1 DDR_A_MA2 DDR_A_MA4

DDR_A_MA5 DDR_A_MA11 DDR_A_MA9 DDR_A_MA14

DDR_A_MA13 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA15

Compal Secret Data

Deciphered Date

C741 0.1U_0402_16V4ZC741 0 .1U_0402_16V4Z

C739

4 5 3 6 2 7 1 8

R272 36_0402_1%R272 36_0402_1%

SPD define A0 address

1

12

2

+VREF1

0.1U_0402_16V4Z

1

2

RP1

RP1 36_0804_8P4R_5%

36_0804_8P4R_5%

36_0804_8P4R_5% RP2

RP2

RP3

RP3 36_0804_8P4R_5%

36_0804_8P4R_5%

RP4

RP4 36_0804_8P4R_5%

36_0804_8P4R_5%

RP5

RP5 36_0804_8P4R_5%

36_0804_8P4R_5%

RP7

12

2

C747

2.2U_0603_6.3V6K

C747

2.2U_0603_6.3V6K

DDR_A_DQS2 DDR_A_DQS#2

DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23

1 2

240_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

+0.75VS

U42

C4

DQS

D4

DQS#

B4

DQ0

C8

DQ1

C3

DQ2

C9

DQ3

E4

DQ4

E9

DQ5

D3

DQ6

E8

DQ7

A8

NU/TDQS#

B8

DM/TDQS

R550

H9

ZQ

E2

VREFDQ

J9

VREFCA

K4

A0

L8

A1

L4

A2

K3

A3

L9

A4

L3

A5

M9

A6

M3

A7

N9

A8

M4

A9

H8

A10/AP

M8

A11

K8

A12/BC#

N4

A13

J8

A15/BA3

F10

NC

H2

NC

F2

NC

H10

NC

A1

NC

N8

NC

A11

NC

A4

NC

N1

NC

N11

NC

MT41J256M8HX-187E:D C38

X76@

+0.75VS

C407

1U_0402_6.3V6K

C407

1U_0402_6.3V6K

12

+1.5V

C454

1U_0402_6.3V6K

C454

1U_0402_6.3V6K

12

+1.5V

C429

10U_0603_6.3V6M

C429

10U_0603_6.3V6M

12

Title

DDRIII DIMMA

Size Document Number Rev

Custom

Date: Sheet of

1U_0402_6.3V6K

C388

12

10U_0603_6.3V6M

VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

ODT

CK#

CKE

BA0 BA1 BA2

CS# RAS# CAS#

WE#

RESET#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

C453

1U_0402_6.3V6K

C453

1U_0402_6.3V6K

C751

CK

12

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

G2 F8 G8 G10

J3 K9 J4

H3 F4 G4 H4 N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

C394

1U_0402_6.3V6K

C394

1U_0402_6.3V6K

12

C738

10U_0603_6.3V6M

C738

10U_0603_6.3V6M

1

M_ODT0

M_CLK_DDR0

M_CLK_DDR#0

DDR_CKE0_CHA

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA#

DDR_A_RAS# DDR_A_CAS#

DDR_A_WE#

DDR3_DRAMRST#

C400

1U_0402_6.3V6K

C400

1U_0402_6.3V6K

12

Layout Note: Place near each memory part

C445

1U_0402_6.3V6K

C445

1U_0402_6.3V6K

C428

12

C456

10U_0603_6.3V6M

C456

10U_0603_6.3V6M

330U_D2_2V_Y

C408

12

+

11 54Wednesday, December 29, 2010

0.1

5

U19

DDR_A_DQS4

C463

DDR_A_DQS#4

DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39

1 2

240_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

1 2

240_0402_1%

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15

DDR_A_MA14

5

D D

+VREF0

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

1

12

C464

2

+VREF1

C447

0.1U_0402_16V4Z

C447

0.1U_0402_16V4Z

1

2

C C

B B

+VREF0

C444

0.1U_0402_16V4Z

C444

0.1U_0402_16V4Z

1

2

+VREF1

C446

0.1U_0402_16V4Z

C446

0.1U_0402_16V4Z

A A

C443

0.1U_0402_16V4Z

C443

0.1U_0402_16V4Z

1

2

1

2

U19

C4 D4

B4 C8 C3 C9

E4

E9 D3

E8

A8

B8

R302

H9

E2

J9

K4

L8

L4

K3

L9

L3 M9 M3 N9 M4 H8 M8

K8 N4

J8

F10

H2

F2

H10

A1 N8

A11

A4 N1

N11

MT41J256M8HX-187E:D C38

X76@

U18

C4

D4

B4

C8

C3

C9

E4

E9

D3

E8

A8

B8

R337

H9

E2

J9

K4

L8

L4

K3

L9

L3 M9 M3 N9 M4 H8 M8

K8 N4

J8

F10

H2

F2

H10

A1 N8

A11

A4 N1

N11

MT41J256M8HX-187E:D C38

X76@

DQS DQS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

NU/TDQS# DM/TDQS ZQ

VREFDQ VREFCA

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13

A15/BA3 NC NC NC NC NC NC NC NC NC NC

DQS DQS#

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

NU/TDQS# DM/TDQS ZQ

VREFDQ VREFCA

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13

A15/BA3 NC NC NC NC NC NC NC NC NC NC

VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

ODT

CK# CKE

CS# RAS# CAS#

WE#

RESET#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS

VDDQ VDDQ VDDQ VDDQ

VDD

ODT

CK#

CKE

CS# RAS# CAS#

WE#

RESET#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

M_ODT0

G2

M_CLK_DDR0

F8

CK

BA0 BA1 BA2

CK

BA0 BA1 BA2

G8 G10

J3 K9 J4

H3 F4 G4 H4 N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

G2 F8 G8 G10

J3 K9 J4

H3 F4 G4 H4 N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

M_CLK_DDR#0 DDR_CKE0_CHA

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR3_DRAMRST#

M_ODT0 M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_CHA

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR3_DRAMRST#

+1.5V

4

C744

M_ODT0 <6,11> M_CLK_DDR0 <6,11> M_CLK_DDR#0 <6,11> DDR_CKE0_CHA <6,11>

DDR_CS0_CHA# <6,11> DDR_A_RAS# <6,11> DDR_A_CAS# <6,11> DDR_A_WE# <6,11> DDR3_DRAMRST# <6,11,13>

4

3

+1.5V

U43

DDR_A_DQS5 DDR_A_DQS#5

DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

+VREF0 +VREF0

0.1U_0402_16V4Z

1

C742

1

2

+VREF1

0.1U_0402_16V4Z

1

2

1 2

240_0402_1%

0.1U_0402_16V4Z

DDR_A_MA0

C743

DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA14

U43

C4

DQS

D4

DQS#

B4

DQ0

C8

DQ1

C3

DQ2

C9

DQ3

E4

DQ4

E9

DQ5

D3

DQ6

E8

DQ7

A8

NU/TDQS#

B8

DM/TDQS

R553

H9

ZQ

E2

VREFDQ

J9

VREFCA

K4

A0

L8

A1

L4

A2

K3

A3

L9

A4

L3

A5

M9

A6

M3

A7

N9

A8

M4

A9

H8

A10/AP

M8

A11

K8

A12/BC#

N4

A13

J8

A15/BA3

F10

NC

H2

NC

F2

NC

H10

NC

A1

NC

N8

NC

A11

NC

A4

NC

N1

NC

N11

NC

MT41J256M8HX-187E:D C38

X76@

DDR_A_MA[0..15]<6,11>

DDR_A_DQS#[4..7]<6>

DDR_A_DQS[4..7]<6>

DDR_A_D[32..63]<6>

+1.5V +1.5V

C718

10U_0603_6.3V6M

C718

10U_0603_6.3V6M

C460

10U_0603_6.3V6M

C460

10U_0603_6.3V6M

C728

10U_0603_6.3V6M

C728

10U_0603_6.3V6M

12

Layout Note: Place near each memory part

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

VDDQ VDDQ VDDQ VDDQ

RAS# CAS#

RESET#

VSSQ VSSQ VSSQ VSSQ VSSQ

10U_0603_6.3V6M

B10 C2 E3 E10

A3

VDD

A10

VDD

D8

VDD

G3

VDD

G9

VDD

K2

VDD

K10

VDD

M2

VDD

M10

VDD

G2

ODT

F8

CK

G8

CK#

G10

CKE

J3

BA0

K9

BA1

J4

BA2

H3

CS#

F4 G4 H4

WE#

N3

B3 B9 C10 D2 D10 A2

VSS

A9

VSS

B2

VSS

F3

VSS

F9

VSS

D9

VSS

J2

VSS

J10

VSS

L2

VSS

L10

VSS

N2

VSS

N10

VSS

DDR_A_MA[0..15]

DDR_A_DQS#[4..7]

DDR_A_DQS[4..7]

DDR_A_D[32..63]

C457

2009/12/01

M_ODT0 M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_CHA

DDR_A_BS0

DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR3_DRAMRST#

C748

1U_0402_6.3V6K

C748

1U_0402_6.3V6K

12

C733

1U_0402_6.3V6K

C733

1U_0402_6.3V6K

C732

1U_0402_6.3V6K

C732

1U_0402_6.3V6K

12

Compal Secret Data

Deciphered Date

DDR_A_BS0 <6,11> DDR_A_BS1 <6,11> DDR_A_BS2 <6,11>

12

2

1

2

+VREF1

C746

0.1U_0402_16V4Z

C746

0.1U_0402_16V4Z

C724

1U_0402_6.3V6K

C724

1U_0402_6.3V6K

2010/12/31

2

1

+1.5V

U44

DDR_A_DQS6 DDR_A_DQS#6

DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55

1 2

240_0402_1%

C749

2.2U_0603_6.3V6K

C749

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

12

C745

1

2

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8

DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13

DDR_A_MA15DDR_A_MA15

DDR_A_MA14

M_CLK_DDR0<6,11>

M_CLK_DDR#0<6,11>

D_CK_SCLK<13,15> D_CK_SDATA<13,15>

U44

C4

DQS

D4

DQS#

B4

DQ0

C8

DQ1

C3

DQ2

C9

DQ3

E4

DQ4

E9

DQ5

D3

DQ6

E8

DQ7

A8

NU/TDQS#

B8

DM/TDQS

R554

H9

ZQ

E2

VREFDQ

J9

VREFCA

K4

A0

L8

A1

L4

A2

K3

A3

L9

A4

L3

A5

M9

A6

M3

A7

N9

A8

M4

A9

H8

A10/AP

M8

A11

K8

A12/BC#

N4

A13

J8

A15/BA3

F10

NC

H2

NC

F2

NC

H10

NC

A1

NC

N8

NC

A11

NC

A4

NC

N1

NC

N11

NC

MT41J256M8HX-187E:D C38

X76@

C367

1 2

0.1U_0402_16V4Z

R246

30.1_0402_1%

1

C397

1.8P_0402_50V8

2

+3VS

R368

@

1 2

10K_0402_5%

Title

DDRIII DIMMB

Size Document Number Rev

Custom

LA-7221P

Date: Sheet of

@

U24

8

VCC

7

WP

6

SCL

5

SDA

AT24C02N-10SU-2.7_SO8

Compal Electronics, Inc.

Wednesday, December 29, 2010

VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

ODT

CK

CK#

CKE

BA0 BA1 BA2

CS# RAS# CAS#

WE#

RESET#

VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

12

END topology

A0 A1 A2

GND

1

B10 C2 E3 E10

A3 A10 D8 G3 G9 K2 K10 M2 M10

G2 F8 G8 G10

J3 K9 J4

H3 F4 G4 H4 N3

B3 B9 C10 D2 D10 A2 A9 B2 F3 F9 D9 J2 J10 L2 L10 N2 N10

1 2 3 4

12

M_ODT0 M_CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_CHA

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_CS0_CHA# DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR3_DRAMRST#

Tacoma

R250

30.1_0402_1%

12

55

0.1

5

R483

@R483

M3 support

SB_DIMM_VREFDQ<7>

BSS138_NL_SOT23-3 @

DRAMRST_CNTRL_PC H<6,11,15>

D D

C C

B B

A A

@

0_0402_5%

1 2

S

G

2

D

13

Q48

<Address: 01>

DIMM_B Reverse type H:4mm

5

+1.5V

12

R498

R498 1K_0402_1%

1K_0402_1%

12

R496

R496 1K_0402_1%

1K_0402_1%

10K_0402_5%

+0.75VS

4

12

All VREF traces should have 10 mil trace width

DDR_CKE2_DIMMB<6>

DDR_B_BS2<6>

M_CLK_DDR2<6> M_CLK_DDR#2<6>

DDR_B_BS0<6>

DDR_B_WE#<6> DDR_B_CAS#<6>

DDR_CS3_DIMMB#<6>

+3VS

C354

0.1U_0402_16V4Z

C354

0.1U_0402_16V4Z

12

R228

4

12

3

+1.5V

+DIMM1_VREF

C702

0.1U_0402_16V4Z

C702

0.1U_0402_16V4Z

C705

2.2U_0603_6.3V6K

C705

2.2U_0603_6.3V6K

C355

2.2U_0603_6.3V6K

C355

2.2U_0603_6.3V6K

12

DDR_B_D0

12

DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDR_CKE2_DIMMB DDR_CKE3_DIMM B

DDR_B_BS2

DDR_B_MA9

DDR_B_MA8

M_CLK_DDR2 M_CLK_DDR3 M_CLK_DDR#2 M_CLK_DDR#3

DDR_B_MA10 DDR_B_BS0

DDR_B_WE# DDR_B_CAS#

DDR_B_MA13 DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50

+3VS

DDR_B_D51

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

12

R229

10K_0402_5%

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013290-1

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

+1.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

2010/09/28

DDR_B_D4 DDR_B_D5

DDR_B_DQS#0

DDR_B_DQS0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR3_DRAMRST#

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_D22 DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3

DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11DDR_B_MA12

DDR_B_MA7

DDR_B_MA6 DDR_B_MA4DDR_B_MA5

DDR_B_MA2DDR_B_MA3 DDR_B_MA0DDR_B_MA1

DDR_B_BS1

DDR_B_RAS#

DDR_CS2_DIMMB#

M_ODT2

M_ODT3

+VREF_CB

DDR_B_D36 DDR_B_D37

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5

DDR_B_DQS5

DDR_B_D46 DDR_B_D47

DDR_B_D52 DDR_B_D53

DDR_B_D54 DDR_B_D55

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7

DDR_B_DQS7

DDR_B_D62 DDR_B_D63

D_CK_SDATA

D_CK_SCLK

+0.75VS

Compal Secret Data

DDR3_DRAMRST# <6,11,12>

DDR_CKE3_DIMMB <6>

M_CLK_DDR3 <6> M_CLK_DDR#3 <6>

DDR_B_BS1 <6> DDR_B_RAS# <6>

DDR_CS2_DIMMB# <6> M_ODT2 <6>

M_ODT3 <6>

12

D_CK_SDATA <12,15> D_CK_SCLK <12,15>

Deciphered Date

2

+1.5V

C346

1U_0402_6.3V6K

C346

1U_0402_6.3V6K

C351

1U_0402_6.3V6K

C351

1U_0402_6.3V6K

12

Layout Note:

+1.5V

12

R202

R202 1K_0402_1%

1K_0402_1%

C311

2.2U_0603_6.3V6K

C311

2.2U_0603_6.3V6K

C312

0.1U_0402_16V4Z

C312

0.1U_0402_16V4Z

12

R201

12

1K_0402_1%

2011/09/28

2

+0.75VS

Title

Size Document Number Rev

Custom

Date: Sheet of

Place near JDIMMB

C673

10U_0603_6.3V6M

C673

10U_0603_6.3V6M

C671

10U_0603_6.3V6M

C671

10U_0603_6.3V6M

12

C322

1U_0402_6.3V6K

C322

1U_0402_6.3V6K

12

10U_0603_6.3V6M

12

Layout Note: Place near JDIMMB.203,204

C352

1U_0402_6.3V6K

C352

1U_0402_6.3V6K

12

Compal Electronics, Inc.

DDRIII DIMMB

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

C347

1U_0402_6.3V6K

C347

1U_0402_6.3V6K

12

C344

12

C353

1U_0402_6.3V6K

C353

1U_0402_6.3V6K

12

1

DDR_B_DQS#[0..7] <6>

DDR_B_DQS[0..7] <6>

DDR_B_D[0..63] <6>

DDR_B_MA[0..15] <6>

C349

1U_0402_6.3V6K

C349

1U_0402_6.3V6K

12

C348

10U_0603_6.3V6M

C348

10U_0603_6.3V6M

C309

10U_0603_6.3V6M

C309

10U_0603_6.3V6M

12

C321

1U_0402_6.3V6K

C321

1U_0402_6.3V6K

12

1

330U_D2_2V_Y

C350

10U_0603_6.3V6M

C350

10U_0603_6.3V6M

12

330U_D2_2V_Y

10U_0603_6.3V6M

@

C307

C345

12

+

0.1

55

13

55

13

55

13

5

PCH_RTCX1

1 2

R557 10M_0402_5%R557 10M_0402_5%

1

Y4

18P_0402_50V8J

12

D D

32.768KHZ_12.5PF_9H03200413

+RTCVCC

R354 1M_0402_5%R354 1M_0402_5%

R582 330K_0402_5%R582 330K_0402_5%

*

OSC4OSC

NC3NC

C753

2

1 2

INTVRMEN

H：Integrated VRM enable L：Integrated VRM disable

PCH_RTCX2

12

C752

C752 18P_0402_50V8J

18P_0402_50V8J

SM_INTRUDER#

PCH_INTVRMEN

(INTVRMEN should always be pull high.)

+3VS

R261 @ 1K_0402_5%R261 @ 1K_0402_5%

1 2

HIGH= Enable ( No Reboot ) LOW= Disable (Default)

*

+3VALW_PCH

C C

HDA_SDO<39>

HDA_SDO

ME debug mode,this signal has a weak internal PD Low = Disabled (Default)

*

High = Enabled [Flash Descriptor Security Overide]

+3VALW_PCH

R501 1K_0402_5%R501 1K_0402_5%

R538@

1K_0402_5%

R535

0_0402_5%

12

This signal has a weak internal pull-down

On Die PLL VR Select is supplied by

1.5V when sampled high

*

1.8V when sampled low Needs to be pulled High for Huron River platfrom

33_0402_5%

HDA_BITCLK_AUDIO<42>

HDA_SYNC_AUDIO<42>

B B

HDA_RST_AUDIO#<42>

HDA_SDOUT_AUDIO<42>

No PCH XDP Delete JTAG_TMS,PCH_JTAG_TDI,JTAG_TD0

W=20mils

+RTCBATT +RTCVCC +3VS

A A

R341

1K_0402_5%

1 2

33_0402_5%

1 2

33_0402_5%

1 2

33_0402_5%

1 2

trace width 10mil

D19

1

12

BAS40-04_SOT23-3

R524

R312

R534

Place C174 clos e to PCH.

5

12

HDA_SYNC

R517

HDA_BIT_CLK

HDA_SYNC_R

HDA_RST#

HDA_SDOUT_R

+CHGRTC

2

3

0.1U_0402_16V4Z

HDA_SPKR

HDA_SDOUT

W=20mils

1

C466

2

+RTCVCC

R351 20K_0402_5%R351 20K _0402_5%

R353 20K_0402_5%R353 20K _0402_5%

12

C465

1U_0603_10V4Z

1 2

1U_0603_10V4Z

C471

12

ME

HDA_SPKR<42>

HDA_SDIN0<42>

Prevent back drive issue.

+3VS

G

S

1 2

R504@

R504@ 0_0402_5%

0_0402_5%

12

R521

R521 1M_0402_5%

1M_0402_5%

9/29 DG1.5

CMOS

JCMOS1

SHORT PADS

JCMOS1

SHORT PADS

12

JME1

SHORT PADS

JME1

SHORT PADS

12

R520

51_0402_5%

12

T22

@PAD

T21

@PAD

T51

Q49

Q49 BSS138_NL_SOT23-3

BSS138_NL_SOT23-3

123

D

4

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK

HDA_SYNC

HDA_SPKR

HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_SPI_CLK

PCH_SPI_CS#

PCH_SPI_SI

PCH_SPI_SO

HDA_SYNCHDA_SYNC_R

4

U38A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGARPOINT_FCBGA989~D

RTCIHDA

JTAG

SPI

Prevent back drive issue.

G

2

Q51

Q51 BSS138_NL_SOT23-3

HDA_SDOUT_R HDA_SDOUT

3

S

1 2

R530@

R530@ 0_0402_5%

0_0402_5%

BSS138_NL_SOT23-3

1

D

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP

SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP

SATA1TXN SATA1TXP

SATA2RXN SATA2RXP

SATA2TXN SATA2TXP

SATA3RXN SATA3RXP

SATA3TXN SATA3TXP

SATA4RXN SATA4RXP

SATA4TXN

SATA LPC

SATA4TXP

SATA5RXN SATA5RXP

SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP / GPIO21

SATA1GP / GPIO19

3

C38 A38 B37 C37

D36

E36 K36

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

AH1

P3

V14

P1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

PCH_GPIO23

SERIRQ

SATA_COMP

SATA3_COMP

RBIAS_SATA3

PCH_SATALED#

PCH_GPIO21

PCH_GPIO19

LPC_AD0 <39> LPC_AD1 <39> LPC_AD2 <39> LPC_AD3 <39>

LPC_FRAME# <39>

PCH_GPIO23 <19>

SERIRQ <39>

SATA_PRX_DTX_N0 <35> SATA_PRX_DTX_P0 <35> SATA_PTX_DRX_N0 <35> SATA_PTX_DRX_P0 <35>

SATA_PRX_DTX_N2 <35> SATA_PRX_DTX_P2 <35> SATA_PTX_DRX_N2 <35> SATA_PTX_DRX_P2 <35>

R258

37.4_0402_1%

1 2

R259

49.9_0402_1%

1 2

R492 750_0402_1%R492 750_0402_1%

@ PAD

+1.05VS_PCH

PCH_SATALED# <41>

T50

HDD

ODD

2

SERIRQ

PCH_SATALED#

PCH_GPIO21

SPI ROM FOR ME ( 4MByte )

If use SPI programmer, R144 should be open (Normal is pop)

+3VS

PCH_SPI_CS# P CH_SPI_CS#_R

PCH_SPI_CLK P CH_SPI_CLK_R

PCH_SPI_SI PCH_SPI_SI_R

PCH_GPIO19

Debug Port DG 1.2 PH 4.7K +3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

R249 10K_0402_5%R249 10K_0402_5%

R500 10K_0402_5%R500 10K_0402_5%

R252 10K_0402_5%R252 10K_0402_5%

R580

0_0402_5%

1 2

Please short PJP35

0.1U_0402_16V4Z

1 2

R576 0_0402_5%R576 0_0402_5%

1 2

R499 0_0402_5%R499 0_0402_5%

1 2

R593 0_0402_5%R593 0_0402_5%

+3V_DSW_SPI

C755

1 2

C762@

22P_0402_50V8J

12

PCH_SPI_WP#

PCH_SPI_HOLD#

12

Reserve for EMI please close t o UH1

+3VS

12

R502

4.7K_0402_5% @

Compal Electronics, Inc.

Title

PCH (1/8) SATA,HDA,SPI, LPC, XDP

Size Document Number Rev

Custom

P4LS0 M/B LA-7241P Schematic

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

PCH_SPI_WP#

PCH_SPI_HOLD#

PCH_SPI_SO_R

U48

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

W25Q32BVSSIG

P/N:SA00003K800

R590@

33_0402_5%

PCH_SPI_CLK_R

1 2

1

+3VS

R565 3.3K_0402_5%R565 3.3K_0402_5%

1 2

R587 3.3K_0402_5%R587 3.3K_0402_5%

1 2

R577

R577 0_0402_5%

0_0402_5%

PCH_SPI_SO

1 2

4

VSS

PCH_SPI_SO_R

2

Q

14

55

14

55

14

1

55

+3VS

0.1

5

PCIE_PRX_DTX_N1<35>

PCIE LAN

Mini Card

D D

Card Reader

USB3.0

+3VS

R511 10K_0402_5%R511 10K_0402_5%

R264 10K_0402_5%R264 10K_0402_5%

+3VALW_PCH

R522 10K_0402_5%R522 10K_0402_5%

R548 10K_0402_5%R548 10K_0402_5%

R348 10K_0402_5%R348 10K_0402_5%

R350 10K_0402_5%R350 10K_0402_5%

R276 10K_0402_5%R276 10K_0402_5%

C C

R310 10K_0402_5%R310 10K_0402_5%

PCIE_PRX_DTX_P1<35> PCIE_PTX_C_DRX_N1<35> PCIE_PTX_C_DRX_P1<35>

PCIE_PRX_DTX_N2<36>

PCIE_PRX_DTX_P2<36> PCIE_PTX_C_DRX_N2<36> PCIE_PTX_C_DRX_P2<36>

PCIE_PRX_DTX_N3<38>

PCIE_PRX_DTX_P3<38> PCIE_PTX_C_DRX_N3<38> PCIE_PTX_C_DRX_P3<38>

PCIE_PRX_DTX_N4<44>

PCIE_PRX_DTX_P4<44> PCIE_PTX_C_DRX_N4<44> PCIE_PTX_C_DRX_P4<44>

12

MINI1_CLKREQ#

USB30_CLKREQ#

PCH_GPIO73

LAN_CLKREQ#

CARD_CLKREQ#

PCH_GPIO44

PCH_GPIO45

PCH_GPIO46

Mini Card

USB3.0

PCIE LAN

Card Reader

B B

+3VALW_PCH

12

R313

10K_0402_5%

A A

PEG_CLKREQ#_R

10K_0402_5%

for safe

5

C681 0.1U_0402_10V7KC681 0.1U_0402_10V7K

1 2

C678 0.1U_0402_10V7KC678 0.1U_0402_10V7K

1 2

C682 0.1U_0402_10V7KC682 0.1U_0402_10V7K

1 2

C683 0.1U_0402_10V7KC683 0.1U_0402_10V7K

1 2

C688 0.1U_0402_10V7KC688 0.1U_0402_10V7K

1 2

C694 0.1U_0402_10V7KC694 0.1U_0402_10V7K

1 2

C685 0.1U_0402_10V7KC685 0.1U_0402_10V7K

1 2

C684 0.1U_0402_10V7KC684 0.1U_0402_10V7K

1 2

CLK_PCIE_MINI1#<36> CLK_PCIE_MINI1<36>

MINI1_CLKREQ#<36>

CLK_PCIE_USB30#<44> CLK_PCIE_USB30<44>

USB30_CLKREQ#<44>

CLK_PCIE_LAN#<35> CLK_PCIE_LAN<35>

LAN_CLKREQ#<35>

CLK_PCIE_CARD#<38> CLK_PCIE_CARD<38>

CARD_CLKREQ#<38>

CLK_PEG_VGA#<23>

CLK_PEG_VGA<23>

2

G

1 3

D

S

D

R308

@

2.2K_0402_5%

S

12

VGA_ON <18,26,46,55>

Q37

OPT@

Q37

OPT@

2N7002E_SOT23-3

12

R332

@

2.2K_0402_5%

4

PCIE_PRX_DTX_N1 PCIE_PRX_DTX_P1 PCIE_PTX_DRX_N1 PCIE_PTX_DRX_P1

PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_DRX_N2 PCIE_PTX_DRX_P2

PCIE_PRX_DTX_N3 PCIE_PRX_DTX_P3 PCIE_PTX_DRX_N3 PCIE_PTX_DRX_P3

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCH_GPIO73

PCH_GPIO44

PEG_CLKREQ#_R

PCH_GPIO45

PCH_GPIO46

Pull high @ VGA side

4

U38B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D

PEG_CLKREQ# <23>

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

PCI-E*

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

3

LID_SW_OUT#

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

XTAL25_IN

OPTIMUS

UMA

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

C8

G12

PCH_GPIO74

C13

PCH_SML1CLK

E14

PCH_SML1DATA

M16

M7

T11

P10

PCH_GPIO47

M10

AB37 AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_CPU_DPLL#

AM12

CLK_CPU_DPLL

AM13

CLK_BUF_CPU_DMI#

BF18

CLK_BUF_CPU_DMI

BE18

CLKIN_DMI2#

BJ30

CLKIN_DMI2

BG30

CLK_BUF_DREF_96M#

G24

CLK_BUF_DREF_96M

E24

CLK_BUF_PCIE_SATA#

AK7

CLK_BUF_PCIE_SATA

AK5

CLK_BUF_ICH_14M

K45

CLK_PCI_LPBACK

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

CLK_FLEX0

K43

CLK_27M_TCLK_R

F47

H47

DGPU_PRSNT#

K49

GPIO67

DGPU_PRSNT#

2010/09/28

0 1

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N / CKSSCD_N

CLKIN_SATA_P / CKSSCD_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

LID_SW_OUT# <39>

PCH_SMBCLK <36>

PCH_SMBDATA <36>

DRAMRST_CNTRL_PCH <6,11,13>

CLK_CPU_DMI# <5> CLK_CPU_DMI <5>

CLK_CPU_DPLL# <5> CLK_CPU_DPLL <5>

CLK_PCI_LPBACK <18>

R271

90.9_0402_1%

1 2

@ PAD

T17

R319 22_0402_5%@R319 22_0402_5%@

1 2

DGPU_PRSNT#

Compal Secret Data

Deciphered Date

+3VS

12

1 2

2

120MHz for eDP.

+1.05VS_PCH

R533

R533 10K_0402_5%

10K_0402_5%

UMA ONLY@

R531

R531 10K_0402_5%

10K_0402_5%

OPT@

2

CLK_27M_TCLK <23>

2011/09/28

1

LID_SW_OUT#

DRAMRST_CNTRL_PCH

PCH_SMBCLK

PCH_SMBDATA

PCH_GPIO74

PCH_SML1CLK

PCH_SML1DATA

PCH_GPIO47

For DDR

PCH_SMBDATA

2N7002DWH_SOT363-6

PCH_SMBCLK

PCH_SML1DATA

2N7002DWH_SOT363-6

PCH_SML1CLK

CLK_BUF_CPU_DMI# CLK_BUF_CPU_DMI

CLKIN_DMI2# CLKIN_DMI2

CLK_BUF_DREF_96M# CLK_BUF_DREF_96M

CLK_BUF_PCIE_SATA# CLK_BUF_PCIE_SATA

CLK_BUF_ICH_14M

XTAL25_IN

XTAL25_OUT

CLK_PCI_LPBACK

6

R328 10K_0402_5%R328 10K_0402_5%

1 2

R562 1K_0402_5%R562 1 K_0402_5%

1 2

R382 2.2K_0402_5%R382 2.2K_0402_5%

1 2

R360 2.2K_0402_5%R360 2.2K_0402_5%

1 2

R561 10K_0402_5%R561 10K_0402_5%

1 2

R589 2.2K_0402_5%R589 2.2K_0402_5%

1 2

R591 2.2K_0402_5%R591 2.2K_0402_5%

1 2

R305 10K_0402_5%R305 10K_0402_5%

1 2

+3VS

Q43A

3

2N7002DWH_SOT363-6

6

Q57A

2N7002DWH_SOT363-6

1

C725

2

R363

4.7K_0402_5%

2

1 2

1

5

1 2

4

Q43B

+3VS

2

1

5

4

3

Q57B

R225 10K_0402_5%R225 10K_0402_5%

1 2

R220 10K_0402_5%R220 10K_0402_5%

1 2

R480 10K_0402_5%R480 10K_0402_5%

1 2

R481 10K_0402_5%R481 10K_0402_5%

1 2

R334 10K_0402_5%R334 10K_0402_5%

1 2

R333 10K_0402_5%R333 10K_0402_5%

1 2

R242 10K_0402_5%R242 10K_0402_5%

1 2

R245 10K_0402_5%R245 10K_0402_5%

1 2

R304 10K_0402_5%R304 10K_0402_5%

1 2

R512 1M_0402_5%R512 1M_0402_5%

Y3

25MHZ_20PF_7A25000012

33P_0402_50V8J

R317@

33_0402_5%

12

+3VS

D_CK_SDATA

R364

4.7K_0402_5%

+3VS

D_CK_SCLK

Pull up at EC side.

EC_SMB_DA2

EC_SMB_CK2

12

C723

C436@

22P_0402_50V8J

1 2

1

2

Reserve for EMI please close t o UH4

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (2/8) PCIE, SMBUS, CLK

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

+3VALW_PCH

D_CK_SDATA <12,13>

D_CK_SCLK <12,13>

EC_SMB_DA2 <23,39>

EC_SMB_CK2 <23,39>

33P_0402_50V8J

55

15

55

15

55

15

0.1

5

D D

@

R586 0_0402_5%

1 2

+3VS

5

SUSACK#_R

1

IN1

VCC

OUT

2

IN2

GND

MC74VHC1G08DFT2G_SC70-5

3

12

R563

0_0402_5%

12

@

12

SYS_PWROKSYS_PW ROK

4

U47

SYS_PWROK

XDP_DBRESET#<5>

SUSWARN#_R

PM_DRAM_PWR GD<5>

PCH_RSMRST#<39>

PM_DRAM_PWR GD

SUSWARN#_R

PCH_ACIN PCH_GPIO29

PCH_GPIO72

RI#

PBTN_OUT#<39>

PCH_PWROK<39>

VGATE<54>

C C

R585 10K_0402_5%R585 10K_0402_5%

+3VS

B B

R575 200_0402_5%R575 200_0402_5%

+3VALW_PCH

R564 10K_0402_5%R564 10K_0402_5%

R352 200K_0402_5%R352 200K_0402_5%

R323 10K_0402_5%R323 10K_0402_5%

R578 10K_0402_5%R578 10K_0402_5%

+1.05VS_PCH

PCH_PWROK

ACIN<39,46,48>

4

DMI_CTX_PRX_N0<4> DMI_CTX_PRX_N1<4> DMI_CTX_PRX_N2<4> DMI_CTX_PRX_N3<4>

DMI_CTX_PRX_P0<4> DMI_CTX_PRX_P1<4> DMI_CTX_PRX_P2<4> DMI_CTX_PRX_P3<4>

DMI_CRX_PTX_N0<4> DMI_CRX_PTX_N1<4> DMI_CRX_PTX_N2<4> DMI_CRX_PTX_N3<4>

DMI_CRX_PTX_P0<4> DMI_CRX_PTX_P1<4> DMI_CRX_PTX_P2<4> DMI_CRX_PTX_P3<4>

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

1 2

DMI_IRCOMP

RBIAS_CPY

SYS_PWROK

PCH_PWROK_R PCH_GPIO29

PM_DRAM_PWR GD

PCH_RSMRST#_R

SUSWARN#_R

PBTN_OUT#_R

PCH_ACIN

1 2

R482 49.9_0402_1%R482 49.9_0402_1%

1 2

R479 750_0402_1%R479 750_0402_1%

4mil width and place within 500mil of the PCH

R566 0_0402_5%R566 0_0402_5%

1 2

R574 0_0402_5%R574 0_0402_5%

1 2

R365 0_0402_5%R365 0_0402_5%

1 2

D21 CH751H-40PT_SOD323-2D 21 CH751H-40PT_SOD323-2

SUSACK#_R

PCH_GPIO72

RI#

U38C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PW R_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D

3

DMI

System Power Management

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

FDI

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9

BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWODVREN

PCH_RSMRST#_R

WAKE#

1 2

CLKRUN#

SUS_STAT#

SUSCLK

PM_SLP_S5#

PM_SLP_S4#

PM_SLP_S3#

SLP_A#

PM_SLP_SUS#

H_PM_SYNC

R558

R558 0_0402_5%

0_0402_5%

R303 100K_0402_5%

2

FDI_CTX_PRX_N0 <4> FDI_CTX_PRX_N1 <4> FDI_CTX_PRX_N2 <4> FDI_CTX_PRX_N3 <4> FDI_CTX_PRX_N4 <4> FDI_CTX_PRX_N5 <4> FDI_CTX_PRX_N6 <4> FDI_CTX_PRX_N7 <4>

FDI_CTX_PRX_P0 <4> FDI_CTX_PRX_P1 <4> FDI_CTX_PRX_P2 <4> FDI_CTX_PRX_P3 <4> FDI_CTX_PRX_P4 <4> FDI_CTX_PRX_P5 <4> FDI_CTX_PRX_P6 <4> FDI_CTX_PRX_P7 <4>

FDI_INT <4>

FDI_FSYNC0 <4>

FDI_FSYNC1 <4>

FDI_LSYNC0 <4>

FDI_LSYNC1 <4>

not support Dee p S4,S5 DPWROK mux with PWROK check list1.0 P .42

PCH_PCIE_WAKE# <35,36,44>

T23 PADT23 PAD

SUSCLK <39>

1 2

@

PM_SLP_S5# <39>

PM_SLP_S4# <39>

PM_SLP_S3# <39>

T19 PADT19 PAD

T24 PADT24 PAD

H_PM_SYNC <5>

Can be left NC when IAMT is no t support on the platfrom

not support Dee p S4,S5 can NC PCH EDS1.2 P.74

DSWODVREN

DSWODVREN - On Die DSW VR Enab le H：Enable

*

L：Disable

WAKE#

CLKRUN#

EC team suggest ion South Bridge si de must have pull-low 10K on this pin(GPIO3 2)

1

R567 330K_0402_5%R567 330K_0402_5%

R584 @ 330K_0402_5%R584 @ 330K_0402_5%

R549 10K_0402_5%R549 10K_0402_5%

R349 10K_0402_5%R349 10K_0402_5%

R510 8.2K_0402_5%R510 8.2K_0402_5%

R505 10K_0402_5%@R505 10K_0402_5%@

12

1 2

+RTCVCC

+3VALW_PCH

+3VS

R583 10K_0402_5%R583 10K_0402_5%

A A

12

5

PCH_RSMRST#_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (3/8) DMI,FDI,PM,

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

16

55

16

55

16

55

0.1

5

4

3

2

1

ENBKL

ENBKL<39>

D D

C C

B B

R539 0_0402_5%R539 0_0402_5%

+3VS

R295 2.2K_0402_5%R295 2.2K_0402_5%

1 2

R298 2.2K_0402_5%R298 2.2K_0402_5%

1 2

+3VS

R536 2.2K_0402_5%R536 2.2K_0402_5%

1 2

R532 2.2K_0402_5%R532 2.2K_0402_5%

1 2

R285 150_0402_1%R285 150_0402_1%

1 2

R284 150_0402_1%R284 150_0402_1%

1 2

R288 150_0402_1%R288 150_0402_1%

1 2

12

IGPU_BKLT_EN

R537

R537 100K_0402_5%

100K_0402_5%

1 2

CTRL_CLK

CTRL_DATA

PCH_CRT_CLK

PCH_CRT_DATA

PCH_CRT_B

PCH_CRT_G

PCH_CRT_R

Pull high at LVDS conn side.

PCH_ENVDD<32>

DPST_PWM<32>

PCH_LCD_CLK<32>

PCH_LCD_DATA<32>

2.37K_0402_1%

R263

0_0402_5%

R262

PCH_TXCLK-<32> PCH_TXCLK+<32>

PCH_TXOUT0-<32> PCH_TXOUT1-<32> PCH_TXOUT2-<32>

PCH_TXOUT0+<32> PCH_TXOUT1+<32> PCH_TXOUT2+<32>

PCH_CRT_B<33> PCH_CRT_G<33> PCH_CRT_R<33>

PCH_CRT_CLK<33>

PCH_CRT_DATA<33>

PCH_CRT_HSYNC<33> PCH_CRT_VSYNC<33>

IGPU_BKLT_EN

12

PCH_TXCLKPCH_TXCLK+

PCH_TXOUT0PCH_TXOUT1PCH_TXOUT2-

PCH_TXOUT0+ PCH_TXOUT1+ PCH_TXOUT2+

PCH_CRT_B PCH_CRT_G PCH_CRT_R

PCH_CRT_CLK PCH_CRT_DATA

PCH_CRT_HSYNC PCH_CRT_VSYNC

R287

1K_0402_0.5%

CTRL_CLK CTRL_DATA

LVDS_IBG

LVD_VREF

CRT_IREF

12

U38D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT_FCBGA989~D

SDVO_INTN

SDVO_INTP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_CTRLDATA strap pull high at level shift page

SDVO_SCLK SDVO_SDATA

PCH_DPB_HPD

PCH_DPB_N0 PCH_DPB_P0 PCH_DPB_N1 PCH_DPB_P1 PCH_DPB_N2 PCH_DPB_P2 PCH_DPB_N3 PCH_DPB_P3

SDVO_SCLK <34> SDVO_SDATA <34>

PCH_DPB_HPD <34>

PCH_DPB_N0 <34> PCH_DPB_P0 <34> PCH_DPB_N1 <34> PCH_DPB_P1 <34> PCH_DPB_N2 <34> PCH_DPB_P2 <34> PCH_DPB_N3 <34> PCH_DPB_P3 <34>

HDMI D2

HDMI D1

HDMI D0

HDMI CLK

SDVO_TVCLKINN

SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN

CRT

DDPD_AUXP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (4/9) LVDS,CRT,DP,HDMI

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

17

55

0.1

5

+3VS

D D

C C

RP8

PCI_PIRQA#

1

8 7 6

8.2K_0804_8P4R_5%

8 7 6

8.2K_0804_8P4R_5%

8 7 6

8.2K_0804_8P4R_5%

R542 8.2K_0402_5%R542 8.2K_0402_5%

1 2

R540 100K_0402_5%R540 100K_0402_5%

1 2

RP6

RP9

2 3 45

1 2 3 45

PCI_PIRQD# PCI_PIRQC# PCI_PIRQB#

PCH_GPIO55 PCH_GPIO51 PCH_GPIO5 PCH_GPIO52

PCH_GPIO2 PCH_GPIO53 PCH_GPIO4 ODD_DA#

DGPU_HOLD_RST#

PLT_RST#

Boot BIOS Strap bit1 BBS1

Boot BIOS

Bit10

1

0

Destination

Reserved

PCI

SPI

LPC

CLK_PCI_LPBACK<15>

CLK_PCI_LPC<39>

PLT_RST#

DGPU_HOLD_RST#

CLK_PCI_LPBACK CLK_PCI_LPC

Bit11

GNT1#/ GPIO51

B B

A A

0

110

0

4

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

DGPU_HOLD_RST# PCH_GPIO52

VGA_ON<15,26,46,55>

ODD_DA#<35>

T18 @PAD T18 @PAD

PLT_RST#<5,35,38,39,44>

R316 22_0402_5%R316 22_0402_5% R309 22_0402_5%R309 22_0402_5%

1 2

1

2

U45

U45 MC74VHC1G08DFT2G_SC70-5

MC74VHC1G08DFT2G_SC70-5

OPT@

VGA_ON

PCH_GPIO51 PCH_GPIO53 PCH_GPIO55

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PLT_RST#

12

T52 @PAD T52 @PAD T16 @PAD T16 @PAD T20 @PAD T20 @PAD

+3VS

5

IN1

VCC

OUT

IN2

GND

3

4

CLK_PCI0 CLK_PCI1 CLK_PCI2 CLK_PCI3 CLK_PCI4

12

100K_0402_5%

U38E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D

R291OPT@

100_0402_5%

1 2

R523OPT@

NVRAM

RSVD

PCI

USB

PLTRST_VGA# <23>

3

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

PLT_RST#

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5

DF_TVS

AY1

AV10

AT8

AY5 BA2

AT12 BF3

USB20_N0

C24

USB20_P0

A24

USB20_N1

C25

USB20_P1

B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28

Some PCH config not support USB port 6 & 7.

M28

USB20_N8

L30

USB20_P8

K30 G30 E30

USB20_N10

C30

USB20_P10

A30 L32 K32 G32 E32

USB20_N13

C32

USB20_P13

A32

USBRBIAS

C33

B33

USB_OC0#

A14

USB_OC1#

K20

USB_OC2#

B17

USB_OC3#

C16

USB_OC4#

L16

USB_OC5#

A16

USB_OC6#

D14

USB_OC7#

C14

MC74VHC1G08DFT2G_SC70-5

Within 500 mils

R559 22.6_0402_ 1%R559 22.6_0402_ 1%

0_0402_5%

+3VS

5

1

IN1

2

IN2

3

U46

USB20_N0 <37> USB20_P0 <37> USB20_N1 <37> USB20_P1 <37>

USB20_N8 <36> USB20_P8 <36>

USB20_N10 <32> USB20_P10 <32>

USB20_N13 <37> USB20_P13 <37>

1 2

R545@

VCC

OUT

GND

12

4

12

R555

100K_0402_5%

USB/B (Right side)

Mini Card (WLAN)

CMOS Camera (LVDS)

Bluetooth

2

USB_OC0# <37>

PLT_RST_BUF# <36>

1

DMI Termination Voltage

DF_TVS

Set to Vcc when HIGH

Set to Vss when LOW

DG1.2 CRB1.0 PH 2.2K series 1K

+1.8VS

12

R490

2.2K_0402_5%

DF_TVS

R489 1K_0402_5%R489 1K_0402_5%

12

CLOSE TO THE BRANCHING POINT

RP11

USB_OC7# USB_OC1# USB_OC4# USB_OC6#

USB_OC2# USB_OC5# USB_OC3# USB_OC0#

RP11

4 5 3 2 1

10K_1206_8P4R_5%

RP10

4 5 3 2 1

10K_1206_8P4R_5%

H_SNB_IVB# <5 >

+3VALW_PCH

6 7 8

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Compal Electronics, Inc.

Title

PCH (5/9) PCI, USB, NVRAM

Size Document Number Rev

Custom

P4LS0 M/B LA-7241P Schematic

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

1

55

18

55

18

55

18

0.1

+3VS

UMA ONLY@

R503 10K_0402_5%

R506 10K_0402_5%OPT@R 506 10K_0402_5%OPT@

1 2

* OPTIMUS

D D

Non-OPTIMUS

5

12

OPTIMUS_EN#

GPIO38

OPTIMUS_EN#

0 1

4

3

2

ODD_EN#

EC_KBRST#

1

R573 10K_0402_5%R573 10K_0402_5%

1 2

R279 10K_0402_5%R279 10K_0402_5%

1 2

+3VS

GPIO28

On-Die PLL Voltage Regulator

This signal has a weak internal pull up

H

：：：：

On-Die PLL voltage regulator enable

*

L

：：：：

On-Die PLL Voltage Regulator disable

+3VALW_PCH

R296 4.7K_0402_5%@R 296 4.7K_0402_5%@

1 2

@

R290

1K_0402_5%

Deep S4,S5 wake event signal RTC alarm,Power BTN,GPIO27 PCH_GPIO27 (Have internal Pull-High) Deep S4,S5 wake event signal No use PD to GND Check list1.0 P.70

C C

B B

A A

R322 10K_0402_5%R322 10K_0402_5%

1 2

+3VS

R266 10K_0402_5%R266 10K_0402_5%

R570 10K_0402_5%R570 10K_0402_5%

1 2

R314 10K_0402_5%R314 10K_0402_5%

1 2

R495 10K_0402_5%R495 10K_0402_5%

1 2

R569 10K_0402_5%R569 10K_0402_5%

1 2

R300 100K_0402_5%R300 100K_0402_5%

1 2

R268 200K_0402_5%R268 200K_0402_5%

1 2

R518 10K_0402_5%R518 10K_0402_5%

1 2

R256 10K_0402_5%R256 10K_0402_5%

1 2

R497 10K_0402_5%R497 10K_0402_5%

1 2

+3VALW_PCH

R543 10K_0402_5%R543 10K_0402_5%

1 2

R541 1K_0402_5%R541 1K_0402_5%

1 2

R315 10K_0402_5%R315 10K_0402_5%

1 2

R320 10K_0402_5%R320 10K_0402_5%

1 2

+3VS

R270 10K_0402_5%X7 6@R270 10K_0402_5%X76@

1 2

R289 10K_0402_5%X7 6@R289 10K_0402_5%X76@

1 2

R340 10K_0402_5%X7 6@R340 10K_0402_5%X76@

1 2

R339 10K_0402_5%X7 6@R339 10K_0402_5%X76@

1 2

12

PCH_GPIO28

PCH_GPIO0

PCH_GPIO1

DGPU_HPD_INT#

PCH_GPIO16

DGPU_PWROK

GPIO37

ODD_DETECT#

BT_ON#

PCH_GPIO48

WL_OFF#

PCH_GPIO12

SMIB

PCH_GPIO57

PCH_GPIO24

PCH_GPIO22

PCH_GPIO23

PCH_GPIO27

CRB1.0 PH200K to +3VS

CRB1.0 PH10K to +3VALW GPIO24 Unmultiplexed NOTE: GPIO24 configuration register bits are not cleared by CF9h reset event.

PCH_GPIO23 <14>

+1.5VSDGPU

Modify R02

+3VS

12

R594

R594 10K_0402_5%

10K_0402_5%

1

C

Q60

Q60 PDTC143TT_SOT23-3

PDTC143TT_SOT23-3

2

B

E

3

2

G

+3VS

12

13

D

S

R568

R568 10K_0402_5%

10K_0402_5%

Q61

Q61 2N7002E_SOT23-3

2N7002E_SOT23-3

DGPU_HPD_INT#<34>

EC_SCI#<39>

EC_SMI#<39>

SMIB<44>

BT_ON#<36,37>

ODD_DETECT#<35>

WL_OFF#<36>

PCH_GPIO0

PCH_GPIO1

DGPU_HPD_INT#

EC_SCI#

EC_SMI#

PCH_GPIO12

SMIB

PCH_GPIO16

DGPU_PWROK

PCH_GPIO22

PCH_GPIO24

PCH_GPIO27

PCH_GPIO28

BT_ON#

ODD_DETECT#

GPIO37

OPTIMUS_EN#

PCH_GPIO39

PCH_GPIO48

WL_OFF#

PCH_GPIO57

T58 @PAD T58 @PAD

T68 @PAD T68 @PAD

T67 @PAD T67 @PAD

T66 @PAD T66 @PAD

T60 @PAD T60 @PAD

T62 @PAD T62 @PAD

T57 @PAD T57 @PAD

T65 @PAD T65 @PAD

T47 @PAD T47 @PAD

T48 @PAD T48 @PAD

T46 @PAD T46 @PAD

T40 @PAD T40 @PAD

T45 @PAD T45 @PAD

T41 @PAD T41 @PAD

U38F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D

ODD_EN#

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

NC_1

NC_2

NC_3

NC_4

NC_5

C40

PCH_GPIO69

B41

PCH_GPIO70

C41

PCH_GPIO71

A40

P4

PCH_PECI_R

AU16

EC_KBRST#

P5

AY11

PCH_THRMTRIP#_R

AY10

T14

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

TACH4 / GPIO68

TACH5 / GPIO69

TACH6 / GPIO70

TACH7 / GPIO71

PROCPWRGD

GPIO

CPU/MISC

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

VSS_NCTF_23

NCTF

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

0_0402_5% R487

0_0402_5%

T39@ PADT39@ PAD

T42@ PADT42@ PAD

T38@ PADT38@ PAD

T30@ PADT30@ PAD

T36@ PADT36@ PAD

T44@ PADT44@ PAD

T31@ PADT31@ PAD

T43@ PADT43@ PAD

T35@ PADT35@ PAD

T34@ PADT34@ PAD

T55@ PADT55@ PAD

T64@ PADT64@ PAD

T56@ PADT56@ PAD

T63@ PADT63@ PAD

T53@ PADT53@ PAD

T61@ PADT61@ PAD

T54@ PADT54@ PAD

T59@ PADT59@ PAD

ODD_EN# <35>

T69@ PADT69@ PAD

T70@ PADT70@ PAD

@

1 2

R487

1 2

R488 390_0402_5%R488 390_0402_5%

H_PECI < 5,39>

EC_KBRST# <39>

H_CPUPWRGD <5>

H_THRMTRIP#

+3VS

INIT3_3V

This signal has weak internal PU, can't pull low

Intel schematic reviwe recommand.

Follow P5WE0 R02

10K_0402_5% X76@

PCH_GPIO71

10K_0402_5% X76@

VRAM 800 MHz VRAM 900 MHz

R294

R294 10K_0402_5%

10K_0402_5%

1 2

R571

R572

+3VS

12

1 2

GATEA20 <39>

H_THRMTRIP# <5>

GPIO71

PCH_GPIO71

0 1

R515 10K_0402_5%@R515 10K_0402_5%@

1 2

R513 10K_0402_5%R513 10K_0402_5%

1 2

5

PCH_GPIO39

on board ram flag

GPIO22 GPIO23 GPIO39

Samsung 2G

0 0 0

Hynix 2G Nanya 2G Micron 2G

0 1 0

4

1 0 0

Security Classification

1 1 0

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (6/9) GPIO, CPU, MISC

P4LS0 M/B LA-7241P Schematic

Wednesday, December 29, 2010

1

19

55

0.1

5

4

3

2

1

POWER

2925mA

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

60mA

DMI

190mA

NAND / SPI HVCMOS

20mA

1mA

VCCADAC

VSSADAC

1mA

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

20mA

VCCSPI

U48

U47

AK36

AK37

AM37

AM38

AP36

AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

+VCCADAC

12

+VCCTX_LVDS

12

C366

0.01U_0402_16V7K

+3VS

12

+VCCAFDI_VRM

+1.8VS

12

0.1U_0402_10V7K

C730

0.01U_0402_16V7K

C730

0.01U_0402_16V7K

12

C405

0.1U_0402_10V7K

C378

0.1U_0402_10V7K

C396

C396 1U_0402_6.3V6K

1U_0402_6.3V6K

C729

12

C368

0.01U_0402_16V7K

+1.05VS_PCH

12

C363

C363 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VS

L42

MBK1608221YZF_2P

C731

C731 10U_0805_6.3V6M

10U_0805_6.3V6M

+3VS

12

+3VS

12

L39

0.1UH_MLF1608DR10KT_10%_1608

22U_0805_6.3V6M

C701

L39

0.1uH inductor, 200mA

+1.8VS

12

+1.05VS_VCCP

D D

C C

B B

JP2@

12

C679

10U_0805_6.3V6M

C679

10U_0805_6.3V6M

C379

1U_0402_6.3V6K

C379

1U_0402_6.3V6K

12

1U_0402_6.3V6K

12

T33 @PAD T33 @PAD

C374

1U_0402_6.3V6K

12

C328

0.1U_0402_10V7K

T37 @PAD T37 @PAD

+1.05VS_PCH

C369

PAD-OPEN 4x4m

This pin can be left as no connect in On-Die VR enabled mode (default).

+1.05VS_PCH

C680

10U_0805_6.3V6M

C680

10U_0805_6.3V6M

12

+3VS

+1.05VS_PCH

C375

1U_0402_6.3V6K

C375

1U_0402_6.3V6K

12

+1.05VS_PCH

+VCCAPLLEXP

C373

1U_0402_6.3V6K

C373

1U_0402_6.3V6K

12

+1.05VS_VCCAPLL_FDI

12

C380

1U_0402_6.3V6K

C380

1U_0402_6.3V6K

12

C372

1U_0402_6.3V6K

C372

1U_0402_6.3V6K

12

+VCCAFDI_VRM

C362

C362 1U_0402_6.3V6K

1U_0402_6.3V6K

U38G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_Sus

Vcc3_3

VccADAC

VccADPLLA

VccADPLLB

VccCore

VccDMI

Voltage

1.05

3.3

1.05

S0 Iccmax Current (A)

0.001

5

0.001

0.266

0.001

0.08

1.3

0.042

1.05Vcc IO 2.925

1.05Vcc ASW 1.01

3.3VccSPI 0.02

3.3VccDSW 0.003

1.8 0.19VccpNAND

3.3VccRTC 6 uA

3.3VccSus3_3

3.3 / 1.5VccSusHDA

0.119

0.01

VccVRM 1.8 / 1.5 0.16

1.05Vcc CLKDMI

0.02

VccSSC 1.05 0.095

VccDIFFCLKN 1.05 0.055

VccALVDS 3.3

0.001

1.8VccTX_LVDS 0.06

+1.5VS

R237 0_0603_5%R237 0_0603_5%

VCCVRM==>1.5V FOR MOBILE VCCVRM==>1.8V FOR DESKTOP

VCCVRM = 160mA detal waiting for newest spec

A A

5

12

4

+VCCAFDI_VRM

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2

2011/09/28

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (7/9) PWR

P4LS0 M/B LA-7241P Schematic

Friday, November 19, 2010

1

55

20

55

20

55

20

0.1

5

+3VS

L23

10UH_LB2012T100MR_20%

1 2

D D

C C

+1.05VS_PCH

B B

A A

L18

10UH_LB2012T100MR_20%

1 2

L20

10UH_LB2012T100MR_20%

12

+

+1.05VS_PCH

12

+3VS_VCC_CLKF33

C419

10U_0805_10V4Z

C419

10U_0805_10V4Z

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

C336

1U_0402_6.3V6K

C336

1U_0402_6.3V6K

C676

220U_B2_2.5VM_R35+C676

220U_B2_2.5VM_R35

12

C381

1U_0402_6.3V6K

C381

1U_0402_6.3V6K

+1.05VS_PCH

C406

1U_0402_6.3V6K

C406

1U_0402_6.3V6K

12

220U_B2_2.5VM_R35+C704

220U_B2_2.5VM_R35

12

+

C382

1U_0402_6.3V6K

C382

1U_0402_6.3V6K

12

C704

1U_0402_6.3V6K

12

+1.05VS_PCH

C337

1U_0402_6.3V6K

12

+1.05VS_PCH

C376

0.1U_0402_10V7K

12

4.7U_0603_6.3V6K

12

4

Have internal VRM

R493@

0_0603_5%

12

+3VALW_PCH

12

T14@ PADT14@ PAD

T32@ PADT32@ PAD

+1.05VS_PCH

T13@ PADT13@ PAD

+1.05VS_PCH

12

C389

1U_0402_6.3V6K

C389

1U_0402_6.3V6K

12

C418

+VCCSST

0.1U_0402_10V7K

0.1U_0402_10V7K C409

C409

T15@ PADT15@ PAD

C325

C327

0.1U_0402_10V7K

C327

0.1U_0402_10V7K

C326

0.1U_0402_10V7K

C326

0.1U_0402_10V7K

12

+VCCACLK

C410

0.1U_0402_10V7K

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCAPLL_CPY_PCH

+VCCSUS1

C693

22U_0805_6.3V6M

C693

22U_0805_6.3V6M

C692

22U_0805_6.3V6M

C692

22U_0805_6.3V6M

12

C401

1U_0402_6.3V6K

C401

1U_0402_6.3V6K

C393

1U_0402_6.3V6K

C393

1U_0402_6.3V6K

12

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

+1.05VM_VCCSUS

+V_CPU_IO

+RTCVCC

C458

1U_0402_6.3V6K

C458

1U_0402_6.3V6K

12

3

2

1

VCC3_3 = 266mA detal waiting for newest spec

VCCDMI = 42mA detal waiting for newest spec

POWER

1010mA

55mA

95mA

1mA

POWER

3mA

Clock and Miscellaneous

80mA

CPURTC

119mA

PCI/GPIO/LPCMISC

SATA USB

HDA

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

1mA

VCCSUS3_3[1]

1mA

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCCAPLLSATA

10mA

VCCSUSHDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

V5REF

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

N26

P26

P28

T27

T29

T23

T24

V23

V24

P24

T26

M26

AN23

AN24

P34

N20

N22

P20

P22

AA16

W16

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

+VCCSATAPLL

+VCCAFDI_VRM

+VCCME_22

+VCCME_23

+VCCME_21

+VCCSUSHDA

12

C414

C414 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VALW_PCH

C402

0.1U_0402_10V7K

C402

0.1U_0402_10V7K

C399

0.1U_0402_10V7K

C399

0.1U_0402_10V7K

12

+VCCAFDI_VRM

+1.05VS_PCH

R307 0_0603_5%R307 0_0603_5%

R297 0_0603_5%R297 0_0603_5%

R325 0_0603_5%R325 0_0603_5%

R321 0_0603_5%R321 0_0603_5%

C417

0.1U_0402_16V4Z

Place C217 near T23 pin

12

Place C218 near P24 pin

+3VALW_PCH

0.1U_0402_10V7K

12

C709

+1.05VS_PCH

12

C390

C390 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_PCH

T12 @PADT12 @PAD

+3VALW_PCH

12

C413

C413 1U_0402_6.3V4Z

1U_0402_6.3V4Z

+3VS

C426

C392

0.1U_0402_10V7K

C392

0.1U_0402_10V7K

12

Place C228 near AA16.W16 pin Place C233 near T34 pin Place C234 near AJ2 pin

C377

C377 1U_0402_6.3V6K

1U_0402_6.3V6K

T49 @PADT49 @PAD

+1.05VS_PCH

12

+3VALW_PCH

12

+5VALW

PCH_PWR_EN#<46>

@R344

@

R361

100_0402_5%

R362

100_0402_5%

R344 0_0603_5%

0_0603_5%

12

Q40

AO3413L_SOT23-3

123

DGS

+3VALW_PCH+5VALW

12

1 2

12

+3VS+5VS

12

1 2

12

+5VALW_PCH

C470

0.1U_0402_10V7K

C470

0.1U_0402_10V7K

1

2

D22

D22 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_SUS

C461

0.1U_0603_25V7K

D20

D20 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

+PCH_V5REF_RUN

C459

C459 1U_0603_10V6K

1U_0603_10V6K

R355

20K_0402_5%

R355

20K_0402_5%

12

U38J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

C433

0.1U_0402_10V7K

C433

0.1U_0402_10V7K

12

VCCRTC

COUGARPOINT_FCBGA989~D

C440

0.1U_0402_10V7K

C440

0.1U_0402_10V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2011/09/28

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (8/9) PWR

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

21

55

21

55

21

55

0.1

5

D D

C C

B B

A A

U38H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D

4

AK38

VSS[80]

AK4

VSS[81]

AK42

VSS[82]

AK46

VSS[83]

AK8

VSS[84]

AL16

VSS[85]

AL17

VSS[86]

AL19

VSS[87]

AL2

VSS[88]

AL21

VSS[89]

AL23

VSS[90]

AL26

VSS[91]

AL27

VSS[92]

AL31

VSS[93]

AL33

VSS[94]

AL34

VSS[95]

AL48

VSS[96]

AM11

VSS[97]

AM14

VSS[98]

AM36

VSS[99]

AM39

VSS[100]

AM43

VSS[101]

AM45

VSS[102]

AM46

VSS[103]

AM7

VSS[104]

AN2

VSS[105]

AN29

VSS[106]

AN3

VSS[107]

AN31

VSS[108]

AP12

VSS[109]

AP19

VSS[110]

AP28

VSS[111]

AP30

VSS[112]

AP32

VSS[113]

AP38

VSS[114]

AP4

VSS[115]

AP42

VSS[116]

AP46

VSS[117]

AP8

VSS[118]

AR2

VSS[119]

AR48

VSS[120]

AT11

VSS[121]

AT13

VSS[122]

AT18

VSS[123]

AT22

VSS[124]

AT26

VSS[125]

AT28

VSS[126]

AT30

VSS[127]

AT32

VSS[128]

AT34

VSS[129]

AT39

VSS[130]

AT42

VSS[131]

AT46

VSS[132]

AT7

VSS[133]

AU24

VSS[134]

AU30

VSS[135]

AV16

VSS[136]

AV20

VSS[137]

AV24

VSS[138]

AV30

VSS[139]

AV38

VSS[140]

AV4

VSS[141]

AV43

VSS[142]

AV8

VSS[143]

AW14

VSS[144]

AW18

VSS[145]

AW2

VSS[146]

AW22

VSS[147]

AW26

VSS[148]

AW28

VSS[149]

AW32

VSS[150]

AW34

VSS[151]

AW36

VSS[152]

AW40

VSS[153]

AW48

VSS[154]

AV11

VSS[155]

AY12

VSS[156]

AY22

VSS[157]

AY28

VSS[158]

3

U38I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT_FCBGA989~D

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28

Compal Secret Data

Deciphered Date

2011/09/28

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

PCH (9/9) VSS

P4LS0 M/B LA-7241P Schematic

Friday, November 19, 2010

1

22

55

22

55

22

55

0.1

A

PEG_HTX_C_GRX_P0<4> PEG_HTX_C_GRX_N0<4> PEG_HTX_C_GRX_P1<4> PEG_HTX_C_GRX_N1<4> PEG_HTX_C_GRX_P2<4> PEG_HTX_C_GRX_N2<4> PEG_HTX_C_GRX_P3<4> PEG_HTX_C_GRX_N3<4> PEG_HTX_C_GRX_P4<4> PEG_HTX_C_GRX_N4<4> PEG_HTX_C_GRX_P5<4> PEG_HTX_C_GRX_N5<4>

1 1

2 2

PEG_GTX_C_HRX_N[0..15]<4>

PEG_GTX_C_HRX_P[0..15]<4>

3 3

+1.05VSDGPU

4 4

22P_0402_50V8J

12

CLK_27M_TCLK<15>

C649

OPT@

OPT@ L8

OPT@

BLM18PG300SN1D_2P

C627OPT@

22U_0805_6.3V6M

XTALOUT

12

PEG_HTX_C_GRX_P6<4> PEG_HTX_C_GRX_N6<4> PEG_HTX_C_GRX_P7<4> PEG_HTX_C_GRX_N7<4> PEG_HTX_C_GRX_P8<4> PEG_HTX_C_GRX_N8<4> PEG_HTX_C_GRX_P9<4>

PEG_HTX_C_GRX_N9<4> PEG_HTX_C_GRX_P10<4> PEG_HTX_C_GRX_N10<4> PEG_HTX_C_GRX_P11<4> PEG_HTX_C_GRX_N11<4> PEG_HTX_C_GRX_P12<4> PEG_HTX_C_GRX_N12<4> PEG_HTX_C_GRX_P13<4> PEG_HTX_C_GRX_N13<4> PEG_HTX_C_GRX_P14<4> PEG_HTX_C_GRX_N14<4> PEG_HTX_C_GRX_P15<4> PEG_HTX_C_GRX_N15<4>

PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0 PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4 PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6 PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8 PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9 PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10 PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11 PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12 PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13 PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14 PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15

+3VSDGPU

PEG_CLKREQ#<15>

L8

R444

27MHZ_16PF_X5H027000FG1H

A

12

R474 0_0402_5%@R474 0_0402_5%@

@

Y2 OPT@

R434

12

1M_0402_5%R444

1M_0402_5%

12

C213OPT@

10U_0603_6.3V6M

12

OPT@

1 2

12

C219@

4700P_0402_25V7K

XTALIN

12

C650

22P_0402_50V8J

OPT@

C210 0.1U_0402_10V7KOPT@C210 0.1U_0402_10V7KOPT@

1 2

C207 0.1U_0402_10V7KOPT@C207 0.1U_0402_10V7KOPT@

1 2

C206 0.1U_0402_10V7KOPT@C206 0.1U_0402_10V7KOPT@

1 2

C198 0.1U_0402_10V7KOPT@C198 0.1U_0402_10V7KOPT@

1 2

C187 0.1U_0402_10V7KOPT@C187 0.1U_0402_10V7KOPT@

1 2

C197 0.1U_0402_10V7KOPT@C197 0.1U_0402_10V7KOPT@

1 2

C186 0.1U_0402_10V7KOPT@C186 0.1U_0402_10V7KOPT@

1 2

C182 0.1U_0402_10V7KOPT@C182 0.1U_0402_10V7KOPT@

1 2

C179 0.1U_0402_10V7KOPT@C179 0.1U_0402_10V7KOPT@

1 2

C175 0.1U_0402_10V7KOPT@C175 0.1U_0402_10V7KOPT@

1 2

C173 0.1U_0402_10V7KOPT@C173 0.1U_0402_10V7KOPT@

1 2

C162 0.1U_0402_10V7KOPT@C162 0.1U_0402_10V7KOPT@

1 2

C157 0.1U_0402_10V7KOPT@C157 0.1U_0402_10V7KOPT@

1 2

C151 0.1U_0402_10V7KOPT@C151 0.1U_0402_10V7KOPT@

1 2

C143 0.1U_0402_10V7KOPT@C143 0.1U_0402_10V7KOPT@

1 2

C149 0.1U_0402_10V7KOPT@C149 0.1U_0402_10V7KOPT@

1 2

C139 0.1U_0402_10V7KOPT@C139 0.1U_0402_10V7KOPT@

1 2

C130 0.1U_0402_10V7KOPT@C130 0.1U_0402_10V7KOPT@

1 2

C129 0.1U_0402_10V7KOPT@C129 0.1U_0402_10V7KOPT@

1 2

C123 0.1U_0402_10V7KOPT@C123 0.1U_0402_10V7KOPT@

1 2

C120 0.1U_0402_10V7KOPT@C120 0.1U_0402_10V7KOPT@

1 2

C113 0.1U_0402_10V7KOPT@C113 0.1U_0402_10V7KOPT@

1 2

C106 0.1U_0402_10V7KOPT@C106 0.1U_0402_10V7KOPT@

1 2

C112 0.1U_0402_10V7KOPT@C112 0.1U_0402_10V7KOPT@

1 2

C103 0.1U_0402_10V7KOPT@C103 0.1U_0402_10V7KOPT@

1 2

C102 0.1U_0402_10V7KOPT@C102 0.1U_0402_10V7KOPT@

1 2

C101 0.1U_0402_10V7KOPT@C101 0.1U_0402_10V7KOPT@

1 2

C91 0.1U_0402_10V7KOPT@C91 0.1U_0402_10V7KOPT@

1 2

C90 0.1U_0402_10V7KOPT@C90 0.1U_0402_10V7KOPT@

1 2

C89 0.1U_0402_10V7KOPT@C89 0.1U_0402_10V7KOPT@

1 2

C86 0.1U_0402_10V7KOPT@C86 0.1U_0402_10V7KOPT@

1 2

C83 0.1U_0402_10V7KOPT@C83 0.1U_0402_10V7KOPT@

1 2

10K_0402_5%R434

10K_0402_5%

PLTRST_VGA#<18>

12

C226OPT@

C220OPT@

0.1U_0402_16V4Z

under GPU

CLK_PEG_VGA<15> CLK_PEG_VGA#<15>

12

C227OPT@

0.1U_0402_16V4Z

B

PEG_GTX_HRX_P0 PEG_GTX_HRX_N0 PEG_GTX_HRX_P1 PEG_GTX_HRX_N1 PEG_GTX_HRX_P2 PEG_GTX_HRX_N2 PEG_GTX_HRX_P3 PEG_GTX_HRX_N3 PEG_GTX_HRX_P4 PEG_GTX_HRX_N4 PEG_GTX_HRX_P5 PEG_GTX_HRX_N5 PEG_GTX_HRX_P6 PEG_GTX_HRX_N6 PEG_GTX_HRX_P7 PEG_GTX_HRX_N7 PEG_GTX_HRX_P8 PEG_GTX_HRX_N8 PEG_GTX_HRX_P9 PEG_GTX_HRX_N9 PEG_GTX_HRX_P10 PEG_GTX_HRX_N10 PEG_GTX_HRX_P11 PEG_GTX_HRX_N11 PEG_GTX_HRX_P12 PEG_GTX_HRX_N12 PEG_GTX_HRX_P13 PEG_GTX_HRX_N13 PEG_GTX_HRX_P14 PEG_GTX_HRX_N14 PEG_GTX_HRX_P15 PEG_GTX_HRX_N15

R115 OPT@ 200_0402_1%R115 OPT@ 200_0402_1%

R113 OPT@ 2.49K_0402_1%R113 OPT@ 2.49K_0402_1%

+GPU_PLLVDD

C233OPT@

0.1U_0402_16V4Z

B

12

150mA

XTALIN XTALOUT

XTAL_OUTBUFF XTAL_SSIN

I2CS_SCL I2CS_SDA

I2CC_SCL I2CC_SDA

I2CB_SCL I2CB_SDA

I2CA_SCL I2CA_SDA

I2CH_SCL I2CH_SDA

GS@

AP17

PEX_RX0

AN17

PEX_RX0_N

AN19

PEX_RX1

AP19

PEX_RX1_N

AR19

PEX_RX2

AR20

PEX_RX2_N

AP20

PEX_RX3

AN20

PEX_RX3_N

AN22

PEX_RX4

AP22

PEX_RX4_N

AR22

PEX_RX5

AR23

PEX_RX5_N

AP23

PEX_RX6

AN23

PEX_RX6_N

AN25

PEX_RX7

AP25

PEX_RX7_N

AR25

PEX_RX8

AR26

PEX_RX8_N

AP26

PEX_RX9

AN26

PEX_RX9_N

AN28

PEX_RX10

AP28

PEX_RX10_N

AR28

PEX_RX11

AR29

PEX_RX11_N

AP29

PEX_RX12

AN29

PEX_RX12_N

AN31

PEX_RX13

AP31

PEX_RX13_N

AR31

PEX_RX14

AR32

PEX_RX14_N

AR34

PEX_RX15

AP34

PEX_RX15_N

AL17

PEX_TX0

AM17

PEX_TX0_N

AM18

PEX_TX1

AM19

PEX_TX1_N

AL19

PEX_TX2

AK19

PEX_TX2_N

AL20

PEX_TX3

AM20

PEX_TX3_N

AM21

PEX_TX4

AM22

PEX_TX4_N

AL22

PEX_TX5

AK22

PEX_TX5_N

AL23

PEX_TX6

AM23

PEX_TX6_N

AM24

PEX_TX7

AM25

PEX_TX7_N

AL25

PEX_TX8

AK25

PEX_TX8_N

AL26

PEX_TX9

AM26

PEX_TX9_N

AM27

PEX_TX10

AM28

PEX_TX10_N

AL28

PEX_TX11

AK28

PEX_TX11_N

AK29

PEX_TX12

AL29

PEX_TX12_N

AM29

PEX_TX13

AM30

PEX_TX13_N

AM31

PEX_TX14

AM32

PEX_TX14_N

AN32

PEX_TX15

AP32

PEX_TX15_N

AR16

PEX_REFCLK

AR17

PEX_REFCLK_N

AR13

PEX_CLKREQ_N

AJ17

PEX_TSTCLK_OUT

AJ18

PEX_TSTCLK_OUT_N

AM16

PEX_RST_N

AG21

PEX_TERMP

AE9

PLLVDD

AF9

SP_PLLVDD

AD9

VID_PLLVDD

B1

XTAL_IN

B2

XTAL_OUT

D1

XTAL_OUTBUFF

D2

XTAL_SSIN

E2

I2CS_SCL

E1

I2CS_SDA

E3

I2CC_SCL

E4

I2CC_SDA

G3

I2CB_SCL

G2

I2CB_SDA

G1

I2CA_SCL

G4

I2CA_SDA

F6

I2CH_SCL

G6

I2CH_SDA

N12P-GS-A1_BGA973

U31A

Part 1 of 7

GPIO

DVO

PCI EXPRESS

MIOA_HSYNC_NC

MIOA_VSYNC_NC

MIOB_HSYNC_NC

MIOB_VSYNC_NC

MIOA_VREF_NC

MIOB_VREF_NC

MIOA_CLKIN_NC

MIOA_CLKOUT_NC

MIOB_CLKIN_NC

MIOB_CLKOUT_NC

MIOA_CLKOUT_NC_N MIOB_CLKOUT_NC_N

MIOACAL_PD_VDDQ_NC

MIOACAL_PU_GND_NC

MIOBCAL_PD_VDDQ_NC

MIOBCAL_PU_GND_NC

CLK

DACs

I2C

C

R170 OPT11@ 100K_0402_5%R170 OPT11@ 100K_0402_5%

K1

GPIO0

K2

GPIO1

K3

GPIO2

H3

GPIO3

H2

GPIO4

H1

GPIO5

H4

GPIO6

H5

GPIO7

H6

GPIO8

J7

GPIO9

K4

GPIO10

K5

GPIO11

H7

GPIO12

J4

GPIO13

J6

GPIO14

L1

GPIO15

L2

GPIO16

L4

GPIO17

M4

GPIO18

L7

GPIO19

L5

GPIO20

K6

GPIO21

L6

GPIO22

M6

GPIO23

M7

GPIO24

DACA_RED

DACA_BLUE

DACA_VDD DACA_VREF DACA_RSET

DACB_RED

DACB_BLUE

DACB_VDD DACB_VREF DACB_RSET

Issued Date

C

N1 P4 P1 P2 P3 T3 T2 T1 U4 U1 U2 U3 R6 T6 N6

Y1 Y2 Y3 AB3 AB2 AB1 AC4 AC1 AC2 AC3 AE3 AE2 U6 W6 Y6

N3 L3

W1 W2

N2 P5 N5

Y5 W3 AF1

N4 R4

AE1 V4

T4 W4

U5 T5

AA7 AA6

AM15 AM14 AL14

AM13 AL13

AJ12 AK12 AK13

AK4 AL4 AJ4

AM1 AM2

AG7 AK6 AH7

MIOA_D0_NC MIOA_D1_NC MIOA_D2_NC MIOA_D3_NC MIOA_D4_NC MIOA_D5_NC MIOA_D6_NC MIOA_D7_NC MIOA_D8_NC

MIOA_D9_NC MIOA_D10_NC MIOA_D11_NC MIOA_D12_NC MIOA_D13_NC MIOA_D14_NC

MIOB_D0_NC

MIOB_D1_NC

MIOB_D2_NC

MIOB_D3_NC

MIOB_D4_NC

MIOB_D5_NC

MIOB_D6_NC

MIOB_D7_NC

MIOB_D8_NC

MIOB_D9_NC MIOBD_10_NC MIOB_D11_NC MIOB_D12_NC MIOB_D13_NC MIOB_D14_NC

MIOA_DE_NC

MIOA_CTL3_NC

MIOB_DE_NC

MIOB_CTL3_NC

DACA_GREEN

DACA_HSYNC

DACA_VSYNC

DACB_GREEN

DACB_HSYNC

DACB_VSYNC

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

VGA_HDMI_DET <34>

GPU_VID0 <39,55> GPU_VID1 <39,55>

R168 OPT@ 10K _0402_5%R168 OPT@ 10K _0402_5% R167 OPT@ 10K _0402_5%R167 OPT@ 10K _0402_5%

R185

OPT@R185

OPT@

0_0402_5%

R169

@R169

@

0_0402_5%

Replace GPIO 12 with GPIO 18. When : B stage platforms

R135 OPT@ 10K_0402_5 %R135 OPT@ 10K_0402_5 %

1 2

R467 OPT@ 10K_0402_5 %R467 OPT@ 10K_0402_5 %

1 2

R120 OPT@ 10K_0402_5 %R120 OPT@ 10K_0402_5 %

1 2

C214@ 0.1U_0402_16V4ZC214@ 0.1U_0402_16V4Z

1 2

R119@ 124_0402_1%R119@ 1 24_0402_1%

1 2

OPT@

R468 C647@ 0.1U_0402_16V4ZC647@ 0.1U_0402_16V4Z

1 2

R452@ 124_0402_1%R452@ 1 24_0402_1%

1 2

12 12

12

GPU_VID2 <55>

10K_0402_5%

I2CS_SCL

I2CS_SDA

10K_0402_5%R 468

10K_0402_5%

+3VSDGPU

R186

OPT@

I2CS_SCL I2CS_SDA I2CH_SCL I2CH_SDA I2CB_SCL I2CB_SDA I2CC_SCL I2CC_SDA

I2CA_SCL I2CA_SDA

+3VSDGPU

2

G

Q20

1 2

2N7002E_SOT23-3

1 3

D

S

D

S

+3VSDGPU

2

1

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6 Q46A

Q46A

+3VSDGPU

5

4

2N7002DWH_SOT363-6

2N7002DWH_SOT363-6 Q46B

Q46B

R457 OPT@ 2.2K_0402_5%R457 OPT@ 2.2K_0402_5% R462 OPT@ 2.2K_0402_5%R462 OPT@ 2.2K_0402_5% R174 OPT@ 2.2K_0402_5%R174 OPT@ 2.2K_0402_5% R171 OPT@ 2.2K_0402_5%R171 OPT@ 2.2K_0402_5% R445 OPT@ 2.2K_0402_5%R445 OPT@ 2.2K_0402_5% R446 OPT@ 2.2K_0402_5%R446 OPT@ 2.2K_0402_5% R459 OPT@ 2.2K_0402_5%R459 OPT@ 2.2K_0402_5% R458

R458

R447 OPT@ 2.2K_0402_5%R447 OPT@ 2.2K_0402_5% R173

R173

External Spread Spectrum

OSC_OUT

Compal Secret Data

Deciphered Date

OPT@

6

3

1 2 1 2 1 2 1 2 1 2 1 2 1 2

OPT@ 2.2K_0402_5%

1 2

OPT@ 2.2K_0402_5%

1 2

@ASM3P287 2AF-06OR_TSOT-23-6

If External Spread Spectrum not stuff then stuff resistor

U34

1

REFOUT

2

XOUT

XIN/CLKIN3VDD

D

NV_PERFORMANCE <39>

EC_SMB_CK2 <15,39>

EC_SMB_DA2 <15,39>

+3VSDGPU

6

VSS

5

MODOUT

4

2011/09/282010/09/28

D

OSC_SPREAD

+3VSDGPU

12

@

C658

0.1U_0402_16V4Z

E

GPIO I/O ACTIVE USAGE

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

OSC_OUT

OSC_SPREAD

IN

OUT

IN

OUT

IN

OUT

R472 @ 22_0402_5%R472 @ 22_0402_5%

R471 @ 22_0402_5%R471 @ 22_0402_5%

1 2

N/A

H

N/A

L

N/A

L N/A

N/A

XTAL_OUTBUFF

12

R456

R456 10K_0402_5%

10K_0402_5%

OPT@

XTAL_SSIN

12

R455

R455 10K_0402_5%

10K_0402_5%

OPT@

Option Component

U31

N12P-GV-A1_BGA973

GV@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

N11P PEG 1/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

5523

0.1Custom

A

MDA[15..0]

MDA[31..16]

MDA[47..32]

MDA[63..48]

CLKA0 <28> CLKA0# <28>

CLKA1 <29> CLKA1# <29>

CMDA[30..0] <28,29>

DQMA[3..0] <28>

DQMA[7..4] <29>

DQSA#[3..0] <28>

DQSA#[7..4] <29>

DQSA[3..0] <28>

DQSA[7..4] <29>

+1.5VSDGPU

40.2_0402_1% R103

40.2_0402_1%

40.2_0402_1% R108

40.2_0402_1%

60.4_0402_1% R110

60.4_0402_1%

MDC0 MDC1 MDC2 MDC3 MDC4 MDC5 MDC6 MDC7 MDC8 MDC9 MDC10 MDC11 MDC12 MDC13 MDC14 MDC15 MDC16 MDC17 MDC18 MDC19 MDC20 MDC21 MDC22 MDC23 MDC24 MDC25 MDC26 MDC27 MDC28 MDC29 MDC30 MDC31 MDC32 MDC33 MDC34 MDC35 MDC36 MDC37 MDC38 MDC39 MDC40 MDC41 MDC42 MDC43 MDC44 MDC45 MDC46 MDC47 MDC48 MDC49 MDC50 MDC51 MDC52 MDC53 MDC54 MDC55 MDC56 MDC57 MDC58 MDC59 MDC60 MDC61 MDC62 MDC63

OPT@

FBB_DEBUG0 FBB_DEBUG1

12

R103

R108

R110

GS@

B13

FBC_D0

D13

FBC_D1

A13

FBC_D2

A14

FBC_D3

C16

FBC_D4

B16

FBC_D5

A17

FBC_D6

D16

FBC_D7

C13

FBC_D8

B11

FBC_D9

C11

FBC_D10

A11

FBC_D11

C10

FBC_D12

C8

FBC_D13

B8

FBC_D14

A8

FBC_D15

E8

FBC_D16

F8

FBC_D17

F10

FBC_D18

F9

FBC_D19

F12

FBC_D20

D8

FBC_D21

D11

FBC_D22

E11

FBC_D23

D12

FBC_D24

E13

FBC_D25

F13

FBC_D26

F14

FBC_D27

F15

FBC_D28

E16

FBC_D29

F16

FBC_D30

F17

FBC_D31

D29

FBC_D32

F27

FBC_D33

F28

FBC_D34

E28

FBC_D35

D26

FBC_D36

F25

FBC_D37

D24

FBC_D38

E25

FBC_D39

E32

FBC_D40

F32

FBC_D41

D33

FBC_D42

E31

FBC_D43

C33

FBC_D44

F29

FBC_D45

D30

FBC_D46

E29

FBC_D47

B29

FBC_D48

C31

FBC_D49

C29

FBC_D50

B31

FBC_D51

C32

FBC_D52

B32

FBC_D53

B35

FBC_D54

B34

FBC_D55

A29

FBC_D56

B28

FBC_D57

A28

FBC_D58

C28

FBC_D59

C26

FBC_D60

D25

FBC_D61

B25

FBC_D62

A25

FBC_D63

K27

FBCAL_PD_VDDQ

L27

FBCAL_PU_GND

M27

FBCAL_TERM_GND

G19

FBC_DEBUG0

G16

FBB_DEBUG1

N12P-GS-A1_BGA973

MDC[15..0]<30>

MDC[31..16]<30>

MDC[47..32]<31>

MDC[63..48]<31>

U31C

Part 3 of 7

FBC_DQS_RN0 FBC_DQS_RN1 FBC_DQS_RN2

MEMORY INTERFACE C

FBC_DQS_RN3 FBC_DQS_RN4 FBC_DQS_RN5 FBC_DQS_RN6 FBC_DQS_RN7

FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7

FBC_WCK0_N

FBC_WCK1_N

FBC_WCK2_N

FBC_WCK3_N

MDC[15..0]

MDC[31..16]

MDC[47..32]

MDC[63..48]

FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8

FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31

FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7

FBC_WCK0

FBC_WCK1

FBC_WCK2

FBC_WCK3

FBC_CLK0

FBC_CLK0_N

FBC_CLK1

FBC_CLK1_N

CMDC0

F18

CMDC1

E19

CMDC2

D18

CMDC3

C17

CMDC4

F19

CMDC5

C19

CMDC6

B17

CMDC7

E20

CMDC8

B19

CMDC9

D20

CMDC10

A19

CMDC11

D19

CMDC12

C20

CMDC13

F20

CMDC14

B20

CMDC15

G21

CMDC16

F22

CMDC17

F24

CMDC18

F23

CMDC19

C25

CMDC20

C23

CMDC21

F21

CMDC22

E22

CMDC23

D21

CMDC24

A23

CMDC25

D22

CMDC26

B23

CMDC27

C22

CMDC28

B22

CMDC29

A22

CMDC30

A20 G20

DQMC0

A16

DQMC1

D10

DQMC2

F11

DQMC3

D15

DQMC4

D27

DQMC5

D34

DQMC6

A34

DQMC7

D28

DQSC#0

B14

DQSC#1

B10

DQSC#2

D9

DQSC#3

E14

DQSC#4

F26

DQSC#5

D31

DQSC#6

A31

DQSC#7

A26

C14 A10 E10 D14 E26 D32 A32 B26

G14 G15 G11 G12 G27 G28 G24 G25

E17 D17

D23 E23

DQSC0 DQSC1 DQSC2 DQSC3 DQSC4 DQSC5 DQSC6 DQSC7

CMDC[30..0] <30,31>

CLKC0 <30> CLKC0# <30>

CLKC1 <31> CLKC1# <31>

DQMC[3..0] <30>

DQMC[7..4] <31>

DQSC#[3..0] <30>

DQSC#[7..4] <31>

DQSC[3..0] <30>

DQSC[7..4] <31>

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_WCK0

FBA_WCK1

FBA_WCK2

FBA_WCK3

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

MDA[15..0]<28>

MDA[31..16]<28>

MDA[47..32]<29>

MDA[63..48]<29>

CMDA0

U30

CMDA1

V30

CMDA2

U31

CMDA3

V32

CMDA4

T35

CMDA5

U33

CMDA6

W32

CMDA7

W33

CMDA8

W31

CMDA9

W34

CMDA10

U34

CMDA11

U35

CMDA12

U32

CMDA13

T34

CMDA14

T33

CMDA15

W30

CMDA16

AB30

CMDA17

AA30

CMDA18

AB31

CMDA19

AA32

CMDA20

AB33

CMDA21

Y32

CMDA22

Y33

CMDA23

AB34

CMDA24

AB35

CMDA25

Y35

CMDA26

W35

CMDA27

Y34

CMDA28

Y31

CMDA29

Y30

CMDA30

W29 Y29

DQMA0

P32

DQMA1

H34

DQMA2DQMA2

J30

DQMA3

P30

DQMA4DQMA4

AF32

DQMA5

AL32

DQMA6

AL34

DQMA7

AF35

DQSA#0

L35

DQSA#1

G35

DQSA#2

H31

DQSA#3

N32

DQSA#4

AD32

DQSA#5

AJ31

DQSA#6

AJ35

DQSA#7

AC34

DQSA0

L34

DQSA1

H35

DQSA2

J32

DQSA3

N31

DQSA4

AE31

DQSA5

AJ32

DQSA6

AJ34

DQSA7

AC33

P29 R29 L29 M29 AG29 AH29 AD29 AE29

T32 T31

AC31 AC30

VRAM Interface

U31B

GS@

U31B

GS@

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43

1 1

MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+FB_PLLAVDD_0

+FB_PLLAVDD_1

FBA_DEBUG0 FBA_DEBUG1

L32

N33

L33 N34 N35 P35 P33 P34 K35 K33 K34 H33 G34 G33 E34 E33 G31 F30 G30 G32 K30 K32 H30 K31

L31

L30 M32 N30 M30 P31 R32 R30

AG30 AG32 AH31

AF31

AF30 AE30 AC32 AD30 AN33

AL31

AM33

AL33 AK30 AK32

AJ30 AH30 AH33 AH35 AH34 AH32

AJ33

AL35

AM34 AM35

AF33 AE32

AF34 AE35 AE34 AE33 AB32 AC35

AG27

AF27

J19 J18

J27 T30 T29

N12P-GS-A1_BGA973

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FB_DLLAVDD_0 FB_PLLAVDD_0

FB_DLLAVDD_1 FB_PLLAVDD_1

FB_VREF_NC FBA_DEBUG0 FBA_DEBUG1

Part 2 of 7

MEMORY INTERFACE

FBA_DQS_RN0

A

FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_WCK0_N

FBA_WCK1_N

FBA_WCK2_N

FBA_WCK3_N

+1.5VSDGPU

60.4_0402_1% R101

60.4_0402_1%

60.4_0402_1% R112

60.4_0402_1%

10K_0402_5% R107

10K_0402_5%

10K_0402_5% R117

10K_0402_5%

OPT@

12

R101

12

R112

12

R107

12

R117

FBA_DEBUG0

FBB_DEBUG0

FBA_DEBUG1

FBB_DEBUG1

OPT@

12

C584OPT@

10U_0805_6.3V6M

A

OPT@

12

+1.05VSDGPU

L32

BLM18PG330SN1_2P

2010/09/28 2011/09/28

+FB_PLLAVDD_1

Compal Secret Data

Deciphered Date

+FB_PLLAVDD_0

100mA 100mA

12

C104OPT@

C108OPT@

0.1U_0402_16V4Z

12

0.1U_0402_16V4Z

C121OPT@

C122OPT@

0.1U_0402_16V4Z

1U_0603_10V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

OPT@

12

+1.05VSDGPU

L12

BLM18PG330SN1_2P

12

C172OPT@

C150OPT@

0.1U_0402_16V4Z

12

C293OPT@

C159OPT@

0.1U_0402_16V4Z

BLM18PG330SN1_2P

12

C294OPT@

10U_0805_6.3V6M

1U_0603_10V4Z

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N11P VRAM 2/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

24 55

0.1

5

4

3

2

1

For GB2-128 & GB2b-128 colayout....

MULTI LEVEL STRAPS

U31D

GS@

U31D

GS@

AM11

IFPA_TXC

AM12

IFPA_TXC_N

AM8

IFPA_TXD0

AL8

IFPA_TXD0_N

AM10

IFPA_TXD1

AM9

IFPA_TXD1_N

AK10

D D

VGA_HDMI_TXD2+<34> VGA_HDMI_TXD2-<34>

VGA_HDMI_TXD1+<34>

VGA_HDMI_TXD1-<34>

VGA_HDMI_TXD0+<34>

VGA_HDMI_TXD0-<34>

VGA_HDMI_TXC+<34>

VGA_HDMI_TXC-< 34>

C C

+3VSDGPU

12

R469

R470

4.7K_0402_5%

OPT@

VGA_HDMI_SCLK<34> VGA_HDMI_SDATA<34>

B B

+3VSDGPU

A A

R469

4.7K_0402_5%

OPT@

1 2

R451 10K_0402_5%

STRAP0 STRAP1 STRAP2

IFPA_TXD2

AL10

IFPA_TXD2_N

AK11

IFPA_TXD3

AL11

IFPA_TXD3_N

AP13

IFPB_TXC

AN13

IFPB_TXC_N

AN8

IFPB_TXD4

AP8

IFPB_TXD4_N

AP10

IFPB_TXD5

AN10

IFPB_TXD5_N

AR11

IFPB_TXD6

AR10

IFPB_TXD6_N

AN11

IFPB_TXD7

AP11

IFPB_TXD7_N

AM7

IFPC_L0

AM6

IFPC_L0_N

AL5

IFPC_L1

AM5

IFPC_L1_N

AM3

IFPC_L2

AM4

IFPC_L2_N

AP1

IFPC_L3

AR2

IFPC_L3_N

AR8

IFPD_L0

AR7

IFPD_L0_N

AP7

IFPD_L1

AN7

IFPD_L1_N

AN5

IFPD_L2

AP5

IFPD_L2_N

AR5

IFPD_L3

AR4

IFPD_L3_N

AH6

IFPE_L0

AH5

IFPE_L0_N

AH4

IFPE_L1

AG4

IFPE_L1_N

AF4

IFPE_L2

AF5

IFPE_L2_N

AE6

IFPE_L3

AE5

IFPE_L3_N

AL2

IFPF_L0

AL3

IFPF_L0_N

AJ3

IFPF_L1

AJ2

IFPF_L1_N

AJ1

IFPF_L2

AH1

IFPF_L2_N

AH2

IFPF_L3

AH3

IFPF_L3_N

AP2

IFPC_AUX_I2CW_SCL

AN3

IFPC_AUX_I2CW_SDA_N

AP4

IFPD_AUX_I2CX_SCL

AN4

IFPD_AUX_I2CX_SDA_N

AE4

IFPE_AUX_I2CY_SCL

AD4

IFPE_AUX_I2CY_SDA_N

N12P-GS-A1_BGA973

AF3

IFPF_AUX_I2CZ_SCL

AF2

IFPF_AUX_I2CZ_SDA_N

A4

BUFRST_N

AB5

CEC

W5

STRAP0

W7

STRAP1

V7

STRAP2

N12P-GS-A1_BGA_973P

Part 4 of 7

LVDS/TMDS

GENERAL

MULTI_STRAP_REF0_GND

MULTI_STRAP_REF1_GND

NC_0 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8

NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25 NC_26

NC

NC_27 NC_28 NC_29

VDD_SENSE_0 VDD_SENSE_1 VDD_SENSE_2

GND_SENSE_0 GND_SENSE_1 GND_SENSE_2

TEST

TESTMODE

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

SERIAL

ROM_CS_N

ROM_SI

ROM_SO

ROM_SCLK

NC/SPDIF_NC

THERMDP

THERMDN

A2 A7 B7 C5 C7 D5 D6 D7 E5 E7 F4 G5 H32 J25 J26 P6 U7 V6 Y4 AA4 AB4 AB7 AC5 AD6 AF6 AG6 AG20 AJ5 AK15 AL7

D35 P7 AD20

AD19 E35 R7

AP35 AP14 AN14 AN16 AR14 AP16

C3 D3 C4 D4

A5

N9

M9

B5 B4

STRAP4

STRAP3

PGOOD

STRAP_REF2

Power delete the circuit of VGAVSS_SENSE, due to the connection isn't differental.

OPT@

R411

1 2

R429 OPT@ 10K_ 0402_5%R429 OPT@ 10K_0402_5%

ROM_CS#

R460 10K_0402_5%OPT@R460 10K_0402_5%OPT@

ROM_SI ROM_SO ROM_SCLK

R441 OPT@ 36K_0402_1%R441 OPT@ 36K_0402_1%

R125 OPT@ 40.2K_0402_1%R125 OPT@ 40.2K_0402_1%

R131 OPT@ 40.2K_0402_1%R131 OPT@ 40.2K_0402_1%

1 2

12

R128

12

GV@

10K_0402_5%

R134

12

GV@

40.2K_0402_1%

10K_0402_5%R 411

10K_0402_5%

JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST

12

VGAVCC_SENSE < 55>

PAD

PAD PAD

PAD

+3VSDGPU

if unuse this pin , pull down 36k

+3VSDGPU

R187

R187 10K_0402_5%

10K_0402_5%

@

1 2

STRAP4

R172

R172 10K_0402_5%

10K_0402_5%

GV@

1 2

+3VSDGPU

R443

R443 10K_0402_5%

10K_0402_5%

@

1 2

STRAP3

12

R442

4.99K_0402_1%

GV@

R433

@R433

@

1 2

10K_0402_5%

@

T11

@

T10

@

T29

@

T28

10K_0402_5%

Option Component

ROM_SCLK

--->

STRAP2

--->

2 1R 177 4.99K_04 02_1%GV@2 1R 177 4.99K_ 0402_1%GV@ 2 1R 448 4.99K_04 02_1%GV@2 1R 448 4.99K_ 0402_1%GV@

N12P-GV

64MX16 Samsung SA000035700

64MX16 Hynix SA000032400

128MX16 Samsung SA000047Q20

Hynix (900MHZ) 64MX16 H5TQ1G63DFR-11C SA000041S40

Hynix (900MHZ) 128M16 H5TQ2G63BFR-11C SA00003YO20

Samsung (900MHZ) 64M16 K4W1G1646G-BC11 SA00004GS10

Samsung (900MHZ) 128M16 K4W2G1646C-HC11 SA000047Q20

Straps

STRAP0 STRAP1 STRAP2

N12P-GS

64MX16 Samsung SA000035700

64MX16 Hynix SA000032400

128MX16 Samsung SA000047Q20

128MX16 Hynix SA00003VS10

strap0 strap1

H 45K

GPU

N12P-GS 0x0DF4

512MB

1GB

2GB

512MB

1GB

2GB (SD034453280)

+3VSDGPU

12

@

L 35K

12

R166@

R450OPT@

R449

45.3K_0402_1%

strap0

H 45K

R463@

34.8K_0402_1%

45.3K_0402_1%

ROM_SI ROM_SO ROM_SCLK

12

R448

R165

OPT@

GS@ R448

GS@

34.8K_0402_1%

24.9K_0402_1%

strap1 strap2 ROM_SI R OM_SO ROM_SCLK

L

35K

25KL20K

L 35K

strap2

strap3 strap4 ROM_SI R OM_SOROM_SCLK

L5KL

5KL10KL20K

L5KL

5KL10K

L

5K

DeviceID

L

15K

25K

L

45K

25K

L

35K

25K

L 10K

ROM_SCLK STRAP2

+3VSDGPU

12

R188

R178GV@

@

15K_0402_1%

12

R175

R179

20K_0402_5%

X76@

GS@

L 10K

H 10KH5K

H

L

10KH5K

15K

H

L

10K

45K

Pull up 15K Pull down 25K

0x0DF7 Pull down 5KN12P-GV

0010

Pull up 5K

PD 15K

(SD034150280)

(SD034348280)PD 34.8k0110

0011

PD 20K

(SD034200280)

PD 45.3K0111

R177

GS@

15K_0402_1%

GS@

15K_0402_1%

10K_0402_1%

12

R176@

15K_0402_1%

10K_0402_1%

H 15K

H 5K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28 2011/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11P LVDS 3/9

P4LS0 M/B LA-7241P Schematic

Wednesday, December 29, 2010

1

0.1

5525

5

D D

VGA_ON<15,18,46,55>

+1.5VSDGPU

C C

B B

+3VSDGPU

C301OPT@

12

L13

OPT@ L13

OPT@

BLM18PG331SN1D_2P

1U_0402_6.3V6K

440 mA

12

C292OPT@

C234

12

OPT@

0.1U_0402_16V4Z

4.7U_0603_6.3V6M

7900mA

12

C116OPT@

4.7U_0603_6.3V6M

12

C224

12

OPT@

0.1U_0402_16V4Z

C204

C114OPT@

OPT@

1U_0402_6.3V6K

4.7U_0603_6.3V6M

+IFPC_PLLVDD

C265

OPT@

0.1U_0402_16V4Z

Under GPU

+1.05VSDGPU

12

C300OPT@

A A

L11

OPT@ L11

OPT@

BLM18BB221SN1D_2P

1U_0402_6.3V6K

12

570 mA

12

C274OPT@

4.7U_0603_6.3V6M

Under GPU

+IFPC_IOVDD

12

C235OPT@

C230OPT@

0.1U_0402_16V4Z

12

C118

OPT@

1U_0402_6.3V6K

12

C193OPT@

0.1U_0402_16V4Z

under GPU

4

0.1U_0603_25V7K

12

C117OPT@

0.1U_0402_16V4Z

under GPU

12

C183OPT@

0.1U_0402_16V4Z

OPT@

R219

1K_0402_5%

1 2

OPT@

C324

12

C132OPT@

0.1U_0402_16V4Z

12

C127OPT@

0.1U_0402_16V4Z

OPT@

R213

100K_0402_5%

12

C115OPT@

C231OPT@

0.1U_0402_16V4Z

C133OPT@

0.1U_0402_16V4Z

1 2

OPT@

C314

10U_0805_10V4Z

+3VALW

12

3

OPT@

2N7002DWH_SOT363-6

5

Q28B

4

0.1U_0402_16V4Z

R124OPT@10K_0402_5% R124OPT@10K_0402_5%

12

R121@1K_0402_1% R121@1K_0402_1%

12

R127OPT@10K_0402_5 % R127OPT@10K_0402_5%

12

+IFPC_PLLVDD

R133OPT@1K_0402_1% R133OPT@1K_0402_1%

12

+IFPC_IOVDD

+IFPC_PLLVDD

R164OPT@1K_0402_1% R 164OPT@1K_0402_1%

12

+IFPC_IOVDD

R453OPT@10K_0402_5 % R453OPT@10K_0402_5%

12

R454@1K_0402_1% R 454@1K_0402_1%

12

R130OPT@10K_0402_5 % R130OPT@10K_0402_5%

+3VS

12

OPT@

1 2

R212

3.3K_0402_5%

J23 J24

J29 AA27 AA29 AA31 AB27 AB29 AC27 AD27 AE27

AJ28

B18

E21 G17 G18 G22

G8 G9

H29

J14 J15 J16 J17 J20 J21 J22

N27

P27 R27

T27 U27 U29

V27

V29

V34

W27

Y27

AK9

AJ11

AG9

AG10

AJ9 AK7

AJ8

AC6 AB6

AK8

AJ6

AL1

AE7 AD7

R190

0_0805_5%

1 2

AO3413L_SOT23-3

3

U31E

GS@

U31E

GS@

N12P-GS-A1_BGA973

FBVDDQ_0 FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8 FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37

IFPAB_PLLVDD IFPAB_RSET

IFPA_IOVDD IFPB_IOVDD

IFPC_PLLVDD IFPC_RSET

IFPC_IOVDD

IFPD_PLLVDD IFPD_RSET

IFPD_IOVDD

IFPEF_PLLVDD IFPEF_RSET

IFPE_IOVDD IFPF_IOVDD

Part 5 of 7

3

@

Q22OPT@

1

DGS

2

3VSdelay_gate

OPT@

12

C319

0.1U_0603_25V7K

PEX_IOVDDQ_0 PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14 PEX_IOVDDQ_15 PEX_IOVDDQ_16 PEX_IOVDDQ_17 PEX_IOVDDQ_18 PEX_IOVDDQ_19 PEX_IOVDDQ_20 PEX_IOVDDQ_21 PEX_IOVDDQ_22 PEX_IOVDDQ_23 PEX_IOVDDQ_24

POWER

PEX_SVDD_3V3

PEX_SVDD_3V3_NC

MIOA_VDDQ_NC_0 MIOA_VDDQ_NC_1 MIOA_VDDQ_NC_2 MIOA_VDDQ_NC_3

MIOB_VDDQ_NC_0 MIOB_VDDQ_NC_1 MIOB_VDDQ_NC_2 MIOB_VDDQ_NC_3

+3VSDGPU

PEX_IOVDD_0 PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4

PEX_PLLVDD

VDD33_0 VDD33_1 VDD33_2 VDD33_3 VDD33_4

100mil(1.5A)

12

OPT@

C302

C302 10U_0805_10V4Z

10U_0805_10V4Z

AG11 AG12 AG13 AG15 AG16 AG17 AG18 AG22 AG23 AG24 AG25 AG26 AJ14 AJ15 AJ19 AJ21 AJ22 AJ24 AJ25 AJ27 AK18 AK20 AK23 AK26 AL16

AK16 AK17 AK21 AK24 AK27

AG14

AG19 F7

J10 J11 J12 J13 J9

P9 R9 T9 U9

AA9 AB9 W9 Y9

+PEX_PLLVDD

+PEX_SVDD_3V3

+VDD33

12

OPT@

R122

R122 10K_0402_5%

10K_0402_5%

OPT@

R203

R203 470_0603_5%

470_0603_5%

1 2

OPT@

6

Q28A

Q28A 2N7002DWH_SOT363-6

2N7002DWH_SOT363-6

3VSdelay_gate

2

1

2200mA

2200 mA

120mA

12

OPT@

R129

R129 10K_0402_5%

10K_0402_5%

2

12

C628OPT@

12

C629OPT@

12

C215OPT@

0.1U_0402_16V4Z

Under GPU

22U_0805_6.3V6M

12

C639OPT@

10U_0603_6.3V6M

12

C638OPT@

10U_0603_6.3V6M

12

Under GPU

12

Under GPU

12

C209OPT@

0.1U_0402_16V4Z

1

+1.05VSDGPU

12

C637OPT@

4.7U_0603_6.3V6M

12

C211OPT@

4.7U_0603_6.3V6M

12

C195OPT@

0.1U_0402_16V4Z

12

C177OPT@

0.1U_0402_16V4Z

C212OPT@

0.1U_0402_16V4Z

12

OPT@ L14

OPT@

R461

0_0603_5%

4.7U_0603_6.3V6M

C178OPT@

0.1U_0402_16V4Z

C196OPT@

0.1U_0402_16V4Z

L14

12

OPT@

R198

0_0603_5%

12

0_0603_5%

C140OPT@

C148OPT@

12

Under GPU

0.1U_0402_16V4Z

+1.05VSDGPU

Under GPU

0.1U_0402_16V4Z

+1.05VSDGPU

R473@

+3VSDGPU

12

C291OPT@

C648OPT@

C160OPT@

1U_0402_6.3V6K

C134OPT@

1U_0402_6.3V6K

12

4.7U_0603_6.3V6M

12

4.7U_0603_6.3V6M

12

C218OPT@

C144OPT@

1U_0402_6.3V6K

12

C205OPT@

1U_0402_6.3V6K

BLM18PG121SN1D_0603

C264OPT@

1U_0402_6.3V6K

C232OPT@

1U_0402_6.3V6K

12

C306OPT@

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

2

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

N11P POWER & GND 4/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1Custom

5526

5

4

3

2

1

D D

C C

B B

A A

5

GS@

B3

GND_0

B6

GND_1

B9

GND_2

B12

GND_3

B15

GND_4

B21

GND_5

B24

GND_6

B27

GND_7

B30

GND_8

B33

GND_9

C2

GND_10

C34

GND_11

E6

GND_12

E9

GND_13

E12

GND_14

E15

GND_15

E18

GND_16

E24

GND_17

E27

GND_18

E30

GND_19

F2

GND_20

F31

GND_21

F34

GND_22

F5

GND_23

J2

GND_24

J5

GND_25

J31

GND_26

J34

GND_27

K9

GND_28

L9

GND_29

M2

GND_30

M5

GND_31

M11

GND_32

M13

GND_33

M15

GND_34

M17

GND_35

M19

GND_36

M21

GND_37

M23

GND_38

M25

GND_39

M31

GND_40

M34

GND_41

N11

GND_42

N12

GND_43

N13

GND_44

N14

GND_45

N15

GND_46

N16

GND_47

N17

GND_48

N18

GND_49

N19

GND_50

N20

GND_51

N21

GND_52

N22

GND_53

N23

GND_54

N24

GND_55

N25

GND_56

P12

GND_57

P14

GND_58

P16

GND_59

P18

GND_60

P20

GND_61

P22

GND_62

P24

GND_63

R2

GND_64

R5

GND_65

R31

GND_66

R34

GND_67

T11

GND_68

T13

GND_69

T15

GND_70

T17

GND_71

T19

GND_72

T21

GND_73

T23

GND_74

T25

GND_75

U11

GND_76

U12

GND_77

U13

GND_78

U14

GND_79

U15

GND_80

U16

GND_81

U17

GND_82

U18

GND_83

U19

GND_84

U20

GND_85

U21

GND_86

U22

GND_87

U23

GND_88

U24

GND_89

U25

GND_90

V2

GND_91

V5

GND_92

V9

GND_93

V12

GND_94

V14

GND_95

V16

GND_96

N12P-GS-A1_BGA973

U31F

Part 6 of 7

GND

GND_97 GND_98

GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140 GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169 GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192

V18 V20 V22 V24 V31 Y11 Y13 Y15 Y17 Y19 Y21 Y23 Y25 AA2 AA5 AA11 AA12 AA13 AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA34 AB12 AB14 AB16 AB18 AB20 AB22 AB24 AC9 AD2 AD5 AD11 AD13 AD15 AD17 AD21 AD23 AD25 AD31 AD34 AE11 AE12 AE13 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AG2 AG5 AG31 AG34 AK2 AK5 AK14 AK31 AK34 AL6 AL9 AL12 AL15 AL18 AL21 AL24 AL27 AL30 AN2 AN34 AP3 AP6 AP9 AP12 AP15 AP18 AP21 AP24 AP27 AP30 AP33

+VGA_CORE

12

C145OPT@

C184OPT@

0.01U_0402_16V7K

12

C169

C191

OPT@

0.022U_0402_16V7K

12

C180OPT@

0.22U_0603_16V7K

C64

OPT@

470U_D2_2VM_R4.5M

Issued Date

12

C201OPT@

0.22U_0603_16V7K

C62OPT@

12

10U_0603_6.3V6M

3

12

+VGA_CORE

12

+

330U_D2_2V_Y

Change values from 330u*1 to 470u*2.

4

12

+

C564

C65

OPT@

470U_D2_2VM_R4.5M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.01U_0402_16V7K

0.022U_0402_16V7K

C202OPT@

12

0.22U_0603_16V7K

12

Under GPU

12

C190OPT@

0.01U_0402_16V7K

12

C137OPT@

0.022U_0402_16V7K

C203OPT@

1U_0603_10V4Z

12

C61OPT@

10U_0603_6.3V6M

C170OPT@

0.01U_0402_16V7K

C153OPT@

0.047U_0402_16V7K

C63OPT@

12

C147OPT@

0.01U_0402_16V7K

12

C192OPT@

0.047U_0402_16V7K

12

4.7U_0805_10V4Z

12

C154OPT@

C181OPT@

0.01U_0402_16V7K

12

C138OPT@

C152OPT@

0.1U_0402_16V4Z

0.047U_0402_16V7K

Put Under GPU

C68OPT@

C69OPT@

12

47U_0805_4V6

22U_0805_6.3V6M

Compal Secret Data

Deciphered Date

U31G

GS@

U31G

2011/09/282010/09/28

GS@

AB11

VDD_0

AB13

VDD_1

AB15

VDD_2

AB17

VDD_3

AB19

VDD_4

AB21

VDD_5

AB23

VDD_6

AB25

VDD_7

AC11

VDD_8

AC12

VDD_9

AC13

VDD_10

AC14

VDD_11

AC15

VDD_12

AC16

VDD_13

AC17

VDD_14

AC18

VDD_15

AC19

VDD_16

AC20

VDD_17

AC21

VDD_18

AC22

VDD_19

AC23

VDD_20

AC24

VDD_21

AC25

VDD_22

AD12

VDD_23

AD14

VDD_24

AD16

VDD_25

AD18

VDD_26

AD22

VDD_27

AD24

VDD_28

L11

VDD_29

L12

VDD_30

L13

VDD_31

L14

VDD_32

L15

VDD_33

L16

VDD_34

L17

VDD_35

L18

VDD_36

L19

VDD_37

L20

VDD_38

L21

VDD_39

L22

VDD_40

L23

VDD_41

L24

VDD_42

L25

VDD_43

M12

VDD_44

M14

VDD_45

M16

VDD_46

M18

VDD_47

M20

VDD_48

M22

VDD_49

M24

VDD_50

P11

VDD_51

P13

VDD_52

P15

VDD_53

P17

VDD_54

P19

VDD_55

N12P-GS-A1_BGA973

Part 7 of 7

Size Document Number Rev

Date: Sheet of

VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62 VDD_63 VDD_64 VDD_65 VDD_66 VDD_67 VDD_68 VDD_69 VDD_70 VDD_71 VDD_72 VDD_73 VDD_74 VDD_75 VDD_76 VDD_77 VDD_78 VDD_79 VDD_80 VDD_81 VDD_82 VDD_83 VDD_84 VDD_85 VDD_86 VDD_87 VDD_88 VDD_89

POWER

VDD_90 VDD_91 VDD_92 VDD_93 VDD_94 VDD_95 VDD_96 VDD_97 VDD_98

VDD_99 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

N11P POWER & GND 5/9

P4LS0 M/B LA-7241P Schematic

Friday, November 19, 2010

41.02A

12

C171OPT@

0.01U_0402_16V7K

12

C136OPT@

0.1U_0402_16V4Z

2

P21 P23 P25 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 T12 T14 T16 T18 T20 T22 T24 V11 V13 V15 V17 V19 V21 V23 V25 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y12 Y14 Y16 Y18 Y20 Y22 Y24

+VGA_CORE

1

0.1Custom

5527

5

4

3

2

1

VRAM DDR3 chips (1GB)

D D

64Mx16 DDR3 *8==>1GB

Mode E Address

CMD3

CMD8

CMD2

CMD21

CMD24

CMD23

CMD26

CMD7

CMD15

CMD13

CMD4

CMD18

CMD29

CMD27

CMD6

CMD17

CMD19

CMD22

CMD12

CMD28

CMD10

CMD25

CMD9

CMD1

CMD11

CMD0

CMD5

CMD16

CMD20

CMD14

CMD30

CMD31

10K_0402_5%R 60

10K_0402_5% 10K_0402_5%R 73

10K_0402_5%

OPT@

R66

R66 160_0402_1%

160_0402_1%

DQSA[7..0]

DQSA#[7..0]

DQMA[7..0]

MDA[63..0]

CMDA[30..0]

+MEM_VREF0

12

C525 OPT@

+MEM_VREF1

12

C48 OPT@

U28 X76@

+MEM_VREF0 +MEM_VREF1

0.1U_0402_10V6K

CLKA0 CLKA0 CLKA0# CLKA0#

DQSA2 DQSA1

DQMA2 DQMA1

DQSA#2 DQSA#1

12

OPT@

R391

243_0402_1%

U28 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

ZQ0 ZQ1

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

310mA

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

MDA17

E3

MDA18

F7

MDA16

F2

MDA23

F8

MDA22

H3

MDA20

H8

MDA19

G2

MDA21

H7

MDA14

D7

MDA11

C3

MDA12

C8

MDA10

C2

MDA13

A7

MDA8

A2

MDA15

B8

MDA9

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

243_0402_1%

OPT@

R82

12

CMDA7CMDA7 CMDA10CMDA10 CMDA24CMDA24 CMDA6CMDA6 CMDA22CMDA22 CMDA26CMDA26 CMDA5CMDA5 CMDA21CMDA21 CMDA8CMDA8 CMDA4CMDA4 CMDA25CMDA25 CMDA23CMDA23 CMDA9CMDA9 CMDA12CMDA12 CMDA14CMDA14 CMDA30CMDA30

CMDA29CMDA29 CMDA13CMDA13 CMDA27CMDA27

CMDA3CMDA3

CMDA0CMDA0 CMDA2CMDA2 CMDA11CMDA11 CMDA15CMDA15 CMDA28CMDA28

DQSA0 DQSA3

DQMA0 DQMA3

DQSA#0 DQSA#3

CMDA20CMDA20

U7 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

MDA0

E3

MDA4

F7

MDA1

F2

MDA7

F8

MDA3

H3

MDA6

H8

MDA2

G2

MDA5

H7

MDA29

D7

MDA26

C3

MDA31

C8

MDA24

C2

MDA30

A7

MDA25

A2

MDA27

B8

MDA28

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CMDA3 CMDA0 CMDA16 CMDA20 CMDA19

R401 OPT@ 10K_0402_5 %R401 OPT@ 10K_0402_5 %

1 2

R399 OPT@ 10K_0402_5 %R399 OPT@ 10K_0402_5 %

1 2

R60

OPT@

1 2

OPT@

R73

1 2

R403 OPT@ 10K_0402_5 %R403 OPT@ 10K_0402_5 %

1 2

DQSA[7..0]<24,29>

DQSA#[7..0]<24,29>

DQMA[7..0]<24,29>

MDA[63..0]<24,29>

CMDA[30..0]<24,29>

+1.5VSDGPU

OPT@

R393

240_0402_1%

C C

B B

CLKA0<24>

CLKA0#<24>

OPT@

R392

240_0402_1%

+1.5VSDGPU

OPT@

R64

240_0402_1%

OPT@

R65

240_0402_1%

12

Mode C Address

CMD0

0..31

CKE_L

CMD1

CMD2

CS0_L#

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CS1_L#

CMD24

CMD25

ODT_L

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

Command Bit Default Pull-down

ODTx 10k

CKEx

DDR3

RST 10k

CS* No Termination

32..63

A8

A7

A2

A11

A5

A0

CAS*

BA1

A9

A8

A6

A1

A9

A4

A12

CAS*

A3

A11

CS0_H#

BA0

BA2

A3

BA0

A15

BA1

CS1_H#

ODT_H

A4

A13

WE*

A1

A10

A12

RAS*

A6

A5

A14

A10

A2

WE*

A0

RAS*

A7

CKE_H

RST

A14 A13

A15

BA2

LOW HIGH

10k

+1.5VSDGPU +1.5VSDGPU

Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)

Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )

C54OPT@

C50OPT@

C49OPT@

0.1U_0402_16V4Z

Issued Date

C49OPT@

12

4.7U_0603_6.3V6M

3

12

A A

5

12

C521OPT@

C520OPT@

0.1U_0402_16V4Z

1000P_0402_50V7K

4

12

C524OPT@

C527OPT@

0.1U_0402_16V4Z

12

C519OPT@

C523OPT@

0.1U_0402_16V4Z

12

C522OPT@

0.1U_0402_16V4Z

12

C517OPT@

C526OPT@

0.1U_0402_16V4Z

C518OPT@

0.1U_0402_16V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C51OPT@

12

4.7U_0603_6.3V6M

2010/09/28 2011/09/28

C45OPT@

C52OPT@

12

4.7U_0603_6.3V6M

C54OPT@

C53OPT@

12

Compal Secret Data

4.7U_0603_6.3V6M

Deciphered Date

12

4.7U_0603_6.3V6M

C46OPT@

C47OPT@

12

4.7U_0603_6.3V6M

2

AMD :SA00003PF10 (S IC D3 64M16/800 23EY2387MB-12 PG-TFBGA 96P 1.5V)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N11P DDR3 6/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1

5528

5

4

3

2

1

VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB

D D

DQMA[7..0]<24,28>

CMDA[30..0]<24,28>

DQSA#[7..0]<24,28>

DQSA[7..0]<24,28>

MDA[63..0]<24,28>

+1.5VSDGPU

OPT@

R63

240_0402_1%

OPT@

R62

C C

B B

CLKA1<24>

CLKA1#<24>

240_0402_1%

12

OPT@

R68

R68 160_0402_1%

160_0402_1%

R62

+1.5VSDGPU

OPT@

R395

OPT@

R394

DQMA[7..0]

CMDA[30..0]

DQSA#[7..0]

DQSA[7..0]

MDA[63..0]

+MEM_VREF2

12

C41 OPT@

+MEM_VREF3

12

C533 OPT@

0.1U_0402_10V6K

+MEM_VREF2

CLKA1 CLKA1 CLKA1# CLKA1#

DQSA7 DQSA4

DQMA7 DQMA4

DQSA#7 DQSA#4

OPT@

R61

243_0402_1%

+1.5VSDGPU +1.5VSDGPU

U6 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

ZQ2 ZQ3

L8

ZQ/ZQ0

12

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ

310mA 310mA

VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

MDA63

E3

MDA57

F7

MDA62

F2

MDA61

F8

MDA59

H3

MDA56

H8

MDA60

G2

MDA58

H7

MDA33

D7

MDA38

C3

MDA32

C8

MDA37

C2

MDA35

A7

MDA36

A2

MDA34

B8

MDA39

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+MEM_VREF3

OPT@

R405

243_0402_1%

CMDA9CMDA9 CMDA24CMDA24 CMDA10CMDA10 CMDA13CMDA13 CMDA26CMDA26 CMDA22CMDA22 CMDA21CMDA21 CMDA5CMDA5 CMDA8CMDA8 CMDA23CMDA23 CMDA28CMDA28 CMDA4CMDA4 CMDA7CMDA7 CMDA14CMDA14 CMDA12CMDA12 CMDA27CMDA27

CMDA29CMDA29 CMDA6CMDA6 CMDA30CMDA30

CMDA16CMDA16

CMDA19CMDA19 CMDA18CMDA18 CMDA11CMDA11 CMDA15CMDA15 CMDA25CMDA25

DQSA5 DQSA6

DQMA5 DQMA6

DQSA#5 DQSA#6

CMDA20CMDA20

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

12

J1

L1

J9

L9

U27 X76@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

K4B1G1646E-HC12_FBGA96

MDA41

E3

MDA45

F7

MDA43

F2

MDA46

F8

MDA40

H3

MDA47

H8

MDA42

G2

MDA44

H7

MDA48

D7

MDA53

C3

MDA51

C8

MDA54

C2

MDA49

A7

MDA55

A2

MDA50

B8

MDA52

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Mode E Address

CMD3

CMD8

CMD2

CMD21

CMD24

CMD23

CMD26

CMD7

CMD15

CMD13

CMD4

CMD18

CMD29

CMD27

CMD6

CMD17

CMD19

CMD22

CMD12

CMD28

CMD10

CMD25

CMD9

CMD1

CMD11

CMD0

CMD5

CMD16

CMD20

CMD14

CMD30

CMD31

Mode C Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

0..31

32..63

CKE_L

A8

CS0_L#

A7

A2

A11

A5

A0

CAS*

BA1

A9

CS0_H#

BA0

BA2

A3

CS1_H#

ODT_H

A4

A13

WE*

A1

A10

A12

CS1_L#

RAS*

ODT_L

A6

CKE_H

RST

A14 A13

A15

LOW HIGH

A8

A6

A1

A9

A4

A12

CAS*

A3

A11

BA0

A15

BA1

A5

A14

A10

A2

WE*

A0

RAS*

A7

RST

BA2

C535OPT@

C529OPT@

C528OPT@

12

1U_0402_6.3V6K

A A

5

4

C537OPT@

C536OPT@

12

1U_0402_6.3V6K

C530OPT@

C531OPT@

C532OPT@

12

.1U_0402_16V7K

C532OPT@

12

.1U_0402_16V7K

C538OPT@

C534OPT@

12

.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C38OPT@

12

4.7U_0603_6.3V6M

C37OPT@

12

4.7U_0603_6.3V6M

C44OPT@

C40OPT@

12

4.7U_0603_6.3V6M

Compal Secret Data

Deciphered Date

C35OPT@

12

4.7U_0603_6.3V6M

C36OPT@

C42OPT@

C43OPT@

12

4.7U_0603_6.3V6M

2011/09/282010/09/28

2

C36OPT@

C39OPT@

12

4.7U_0603_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N11P DDR3 7/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

29 55

0.1

5

4

3

2

1

VRAM DDR3 chips (1GB)

D D

C C

B B

CLKC0<24>

CLKC0#<24>

64Mx16 DDR3 *8==>1GB

DQSC[7..0]<24,31>

DQSC#[7..0]<24,31>

DQMC[7..0]<24,31>

MDC[63..0]<24,31>

CMDC[30..0]<24,31>

+1.5VSDGPU

GS@

R428

240_0402_1%

GS@

R431

240_0402_1%

+1.5VSDGPU

GS@

R137

240_0402_1%

GS@

R132

240_0402_1%

12

GS@

R123

R123 160_0402_1%

160_0402_1%

DQSC[7..0]

DQSC#[7..0]

DQMC[7..0]

MDC[63..0]

CMDC[30..0]

+MEM_VREF4

12

+MEM_VREF5

12

C626 GS@

0.1U_0402_10V6K

C225 GS@

0.1U_0402_10V6K

U33 X76@

+MEM_VREF4

CLKC0 C LKC0 CLKC0# CLKC0#

DQSC2 DQSC1

DQMC2 DQMC1

DQSC#2 DQSC#1

ZQ4 ZQ5

12

GS@

R435

243_0402_1%

+1.5VSDGPU

U33 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

MDC21

E3

MDC17

F7

MDC16

F2

MDC19

F8

MDC18

H3

MDC20

H8

MDC23

G2

MDC22

H7

MDC13

D7

MDC10

C3

MDC14

C8

MDC9

C2

MDC15

A7

MDC8

A2

MDC12

B8

MDC11

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

GS@

R126

243_0402_1%

+MEM_VREF5

CMDC7CMDC7 CMDC10CMDC10 CMDC24CMDC24 CMDC6CMDC6 CMDC22CMDC22 CMDC26CMDC26 CMDC5CMDC5 CMDC21CMDC21 CMDC8CMDC8 CMDC4CMDC4 CMDC25CMDC25 CMDC23CMDC23 CMDC9CMDC9 CMDC12CMDC12 CMDC14CMDC14 CMDC30CMDC30

CMDC29CMDC29 CMDC13CMDC13 CMDC27CMDC27

CMDC3CMDC3

CMDC0CMDC0 CMDC2CMDC2 CMDC11CMDC11 CMDC15CMDC15 CMDC28CMDC28

DQSC0 DQSC3

DQMC0 DQMC3

DQSC#0 DQSC#3

CMDC20CMDC20

12

+1.5VSDGPU

U10 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

310mA

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

MDC3

E3

MDC7

F7

MDC1

F2

MDC4

F8

MDC2

H3

MDC6

H8

MDC0

G2

MDC5

H7

MDC30

D7

MDC25

C3

MDC31

C8

MDC24

C2

MDC29

A7

MDC27

A2

MDC28

B8

MDC26

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CMDC3 CMDC0 CMDC16 CMDC20 CMDC19

R427 GS@ 10K_0402_5%R427 GS@ 10K_0402_5%

1 2

R430 GS@ 10K_0402_5%R430 GS@ 10K_0402_5%

1 2

GS@

R114

1 2

R426

GS@

1 2

R111 GS@ 10K_0402_5%R111 GS@ 10K_0402_5%

1 2

Mode E Address

CMD3

CMD8

CMD2

CMD21

CMD24

CMD23

CMD26

CMD7

CMD15

CMD13

CMD4

CMD18

CMD29

CMD27

CMD6

CMD17

CMD19

CMD22

CMD12

CMD28

CMD10

CMD25

CMD9

CMD1

CMD11

CMD0

CMD5

CMD16

CMD20

CMD14

CMD30

CMD31

10K_0402_5%R 114

10K_0402_5% 10K_0402_5%R 426

10K_0402_5%

Mode C Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

0..31

CKE_L

A8

CS0_L#

A7

A2

A11

A5

A0

CAS*

BA1

A9

CMD11

CMD12

CMD13

CMD14

BA0

BA2

A3

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

A4

A13

WE*

A1

A10

A12

CS1_L#

RAS*

ODT_L

A6

CMD27

CMD28

CMD29

CMD30

Not Available

RST

A14 A13

A15

LOW HIGH

Command Bit Default Pull-down

ODTx

CKEx

DDR3

RST

CS* No Termination

10k

32..63

A8

A6

A1

A9

A4

A12

CAS*

A3

A11

CS0_H#

BA0

A15

BA1

CS1_H#

ODT_H

A5

A14

A10

A2

WE*

A0

RAS*

A7

CKE_H

RST

BA2

12

C633GS@

C632GS@

0.1U_0402_16V4Z

1000P_0402_50V7K

A A

5

4

12

C635GS@

0.1U_0402_16V4Z

12

C621GS@

C619GS@

C615GS@

0.1U_0402_16V4Z

C619GS@

0.1U_0402_16V4Z

12

C616GS@

0.1U_0402_16V4Z

12

C636GS@

C654GS@

0.1U_0402_16V4Z

C641GS@

0.1U_0402_16V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

C653GS@

4.7U_0603_6.3V6M

3

12

C645GS@

C241GS@

4.7U_0603_6.3V6M

2010/09/28 2011/09/28

12

C208GS@

4.7U_0603_6.3V6M

12

C199GS@

4.7U_0603_6.3V6M

Compal Secret Data

12

C651GS@

4.7U_0603_6.3V6M

Deciphered Date

12

C652GS@

C644GS@

C643GS@

4.7U_0603_6.3V6M

C644GS@

4.7U_0603_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

N11P DDR3 8/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1

5530

5

4

3

2

1

VRAM DDR3 chips (1GB)

64Mx16 DDR3 *8==>1GB

D D

DQMC[7..0]<24,30>

CMDC[30..0]<24,30>

DQSC#[7..0]<24,30>

DQSC[7..0]<24,30>

MDC[63..0]<24,30>

+1.5VSDGPU

GS@

R109

240_0402_1%

GS@

R105

C C

B B

CLKC1<24>

CLKC1#<24>

240_0402_1%

12

GS@

R98

R98 160_0402_1%

160_0402_1%

R105

+1.5VSDGPU

GS@

R416

GS@

R417

DQMC[7..0]

CMDC[30..0]

DQSC#[7..0]

DQSC[7..0]

MDC[63..0]

+MEM_VREF6

12

C107 GS@

0.1U_0402_10V6K

+MEM_VREF7

12

C589 GS@

0.1U_0402_10V6K

243_0402_1%

+1.5VSDGPU

U9 X76@

+MEM_VREF6

CLKC1 CLKC1 CLKC1# CLKC1#

DQSC7 DQSC4

DQMC7 DQMC4

DQSC#7 DQSC#4

12

GS@

R100

U9 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

ZQ6 ZQ7

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ

310mA 310mA

VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

MDC62

E3

MDC56

F7

MDC61

F2

MDC58

F8

MDC60

H3

MDC59

H8

MDC63

G2

MDC57

H7

MDC33

D7

MDC39

C3

MDC34

C8

MDC37

C2

MDC35

A7

MDC38

A2

MDC32

B8

MDC36

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+MEM_VREF7

GS@

R425

243_0402_1%

+1.5VSDGPU

CMDC9CMDC9 CMDC24CMDC24 CMDC10CMDC10 CMDC13CMDC13 CMDC26CMDC26 CMDC22CMDC22 CMDC21CMDC21 CMDC5CMDC5 CMDC8CMDC8 CMDC23CMDC23 CMDC28CMDC28 CMDC4CMDC4 CMDC7CMDC7 CMDC14CMDC14 CMDC12CMDC12 CMDC27CMDC27

CMDC29CMDC29 CMDC6CMDC6 CMDC30CMDC30

CMDC16CMDC16

CMDC19CMDC19 CMDC18CMDC18 CMDC11CMDC11 CMDC15CMDC15 CMDC25CMDC25

DQSC5 DQSC6

DQMC5 DQMC6

DQSC#5 DQSC#6

CMDC20CMDC20

12

U30 X76@

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4B1G1646E-HC12_FBGA96

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

MDC42

E3

MDC43

F7

MDC44

F2

MDC46

F8

MDC41

H3

MDC45

H8

MDC40

G2

MDC47

H7

MDC48

D7

MDC53

C3

MDC51

C8

MDC54

C2

MDC49

A7

MDC52

A2

MDC50

B8

MDC55

A3

+1.5VSDGPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSDGPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

Mode E Address

CMD3

CMD8

CMD2

CMD21

CMD24

CMD23

CMD26

CMD7

CMD15

CMD13

CMD4

CMD18

CMD29

CMD27

CMD6

CMD17

CMD19

CMD22

CMD12

CMD28

CMD10

CMD25

CMD9

CMD1

CMD11

CMD0

CMD5

CMD16

CMD20

CMD14

CMD30

CMD31

Mode C Address

CMD0

CMD1

CMD2

CMD3

CMD4

CMD5

CMD6

CMD7

CMD8

CMD9

CMD10

CMD11

CMD12

CMD13

CMD14

CMD15

CMD16

CMD17

CMD18

CMD19

CMD20

CMD21

CMD22

CMD23

CMD24

CMD25

CMD26

CMD27

CMD28

CMD29

CMD30

Not Available

0..31

32..63

CKE_L

A8

CS0_L#

A7

A2

A11

A5

A0

CAS*

BA1

A9

CS0_H#

BA0

BA2

A3

CS1_H#

ODT_H

A4

A13

WE*

A1

A10

A12

CS1_L#

RAS*

ODT_L

A6

CKE_H

RST

A14 A13

A15

LOW HIGH

A8

A6

A1

A9

A4

A12

CAS*

A3

A11

BA0

A15

BA1

A5

A14

A10

A2

WE*

A0

RAS*

A7

RST

BA2

12

A A

5

12

C601 GS@

1U_0402_6.3V6K

4

12

C84 GS@

C578 GS@

1U_0402_6.3V6K

12

C76 GS@

C75 GS@

1U_0402_6.3V6K

.1U_0402_16V7K

12

C73 GS@

.1U_0402_16V7K

12

C70 GS@

C599 GS@

C597 GS@

.1U_0402_16V7K

C70 GS@

C580 GS@

.1U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

C146 GS@

C131 GS@

4.7U_0603_6.3V6M

2010/09/28 2011/09/28

12

C185 GS@

C176 GS@

4.7U_0603_6.3V6M

Compal Secret Data

Deciphered Date

4.7U_0603_6.3V6M

12

C586 GS@

C602 GS@

4.7U_0603_6.3V6M

2

12

C609 GS@

4.7U_0603_6.3V6M

12

C607 GS@

C158 GS@

4.7U_0603_6.3V6M

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

N11P DDR3 9/9

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1

5531

5

D D

4

3

2

1

+3VS

R8 2.2K_0402_5%R8 2.2K_0402_5%

+LCDVDD

12

R1

300_0603_5%

13

D

Q2

2N7002E_SOT23-3

PCH_ENVDD<17>

C C

B B

PCH_ENVDD

100K_0402_5%

1 2

100K_0402_5%

DPST_PWM<17>

USB20_CMOS_N10 USB20_CMOS_P10

S

12

R4

R11

+3VS

PJUSB208H_SOT23-6@D2PJUSB208H_SOT23-6@

LCD POWER CIRCUIT

+3VALW

12

R3

R3 10K_0402_5%

10K_0402_5%

R2

R2 1K_0402_5%

1K_0402_5%

2

G

13

D

Q3

2

G

2N7002E_SOT23-3

G

2N7002E_SOT23-3

S

U3

1

OE#

2

3

D2

4

5

6

VCC

IN

OUT

GND

74AHC1G125GW_SOT353-5

3

I/O2

I/O3

2

REF1

REF2

1

I/O1

I/O4

12

0.047U_0402_16V7K

+3VS

5

INVTPWM

4

2

12

C1

C2

4.7U_0805_10V4Z

12

R12

R12 10K_0402_5%

10K_0402_5%

+3VS

3

S

G

D

1

12

W=60mils

12

C4

4.7U_0805_10V4Z

Q1

Q1 AO3413L_SOT23-3

AO3413L_SOT23-3

+LCDVDD

W=60mils

12

C475

0.1U_0402_16V4Z

BKOFF#<39,56>

1 2

R9 2.2K_0402_5%R9 2.2K_0402_5%

1 2

10P_0402_50V8J

C12 220P_0402_50V7KC 12 220P_0402_50V7K

C10 220P_0402_50V7KC 10 220P_0402_50V7K

C11 220P_0402_50V7KC 11 220P_0402_50V7K

+3VS

12

C7

0.1U_0402_16V4Z

+LCDVDD

12

C3

10U_0805_10V4Z

PCH_LCD_CLK

PCH_LCD_DATA

12

C473@

BKOFF#

1 2

R13

R13 100K_0402_5%

100K_0402_5%

12

DAC_BRIG

INVTPWM

BKOFF#

Place closed to JLVDS1

12

C474

0.1U_0402_16V4Z

12

C472@

10P_0402_50V8J

FB1<56> FB2<56> FB3<56> FB4<56>

+LCDVDD +3VS

+3VS

@

12

USB20_CMOS_P10 USB20_CMOS_N10

C9

C9 22P_0402_50V8J

22P_0402_50V8J

@

R15 0_0402_5%R15 0_0402_5%

USB20_P10<18> USB20_N10<18>

1 2

R14 0_0402_5%R14 0_0402_5%

1 2

C13

22P_0402_50V8J

LCD/LED PANEL Conn.

W=60mils

+LG_VOUT

DAC_BRIG<39> BKOFF#<39,56> INVTPWM<56>

PCH_LCD_DATA<17>

PCH_LCD_CLK<17>

DAC_BRIG BKOFF# INVTPWM

FB1 FB2 FB3 FB4

R5

1 2

0_0402_5%

PCH_TXCLK+ PCH_TXCLKPCH_TXOUT2+ PCH_TXOUT2-

PCH_TXOUT1+ PCH_TXOUT1-

PCH_TXOUT0+ PCH_TXOUT0PCH_LCD_DATA PCH_LCD_CLK

+3VS_CAMERA

PCH_TXCLK+<17>

PCH_TXCLK-<17>

PCH_TXOUT2+<17>

PCH_TXOUT2-<17>

PCH_TXOUT1+<17>

PCH_TXOUT1-<17>

PCH_TXOUT0+<17>

PCH_TXOUT0-<17>

JLVDS1

1

2

G1

3

G2

4

G3

5

G4

6

G5

7

G6

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

ACES_50203-04001-001

CONN@

41 42 43 44 45 46

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LVDS Connector

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

32 55

0.1

A

B

C

D

E

1 1

PJDLC05C_SOT23-3

UMA/Optimus

L31

L30

BLM18BA470SN1D_2P

10P_0402_50V8J

C558

BLM18BA470SN1D_2P

1 2

L28

BLM18BA470SN1D_2P

1 2

L26

BLM18BA470SN1D_2P

1 2

10P_0402_50V8J

12

C548

R388 10K_0402_5%R 388 10K_0402_5%

+CRT_VCC

1

5

U25

P

2

OE#

A

Y

G

74AHCT1G125GW_SOT353-5

3

22P_0402_50V8J

12

C567

C559

12

4

PCH_CRT_R<17>

PCH_CRT_G<17>

PCH_CRT_B<17>

2 2

3 3

PCH_CRT_R CRT_R_1

PCH_CRT_G CRT_G_1

PCH_CRT_B CRT_B_1

12

R398

R398 150_0402_1%

150_0402_1%

C512 0.1U_0402_16V 4ZC512 0.1U_0402_16V4Z

PCH_CRT_HSYNC<17>

PCH_CRT_HSYNC CRT_HSYNC_1

R397

150_0402_1%

1 2

12

R396

R396 150_0402_1%

150_0402_1%

PCH_CRT_VSYNC<17>

10P_0402_50V8J

12

C566

+CRT_VCC

1

5

U26

P

2

C515 0.1U_0402_16V4ZC515 0.1U_0402_16V4Z

4

OE#

A

Y

G

74AHCT1G125GW_SOT353-5

3

1 2

PCH_CRT_VSYNC CRT_VSYNC_1

L31

BLM18BA470SN1D_2P

1 2

L29

BLM18BA470SN1D_2P

1 2

L27

BLM18BA470SN1D_2P

1 2

22P_0402_50V8J

12

C549

ESD team Suggestion

2

3

D27

1

10P_0402_50V8J

C568

12

SM010012010 300ma 120ohm@100 mhz DCR 0.4

1 2

L25 MBC1608121YZF_0603L25 MBC1608121YZF_0603

1 2

L24 MBC1608121YZF_0603L24 MBC1608121YZF_0603

3

10P_0402_50V8J

C560

12

PCH_CRT_DATA<17>

PCH_CRT_CLK<17>

2

D26

PJDLC05C_SOT23-3

1

CRT_R_2

CRT_G_2

CRT_B_2

10P_0402_50V8J

C550

12

C539

10P_0402_50V8J

PCH DDC PU 2.2K on Page 17

+5VS

CRT_HSYNC_2

CRT_VSYNC_2

12

PCH_CRT_DATA

PCH_CRT_CLK

2

3

12

C514

C514 10P_0402_50V8J

10P_0402_50V8J

W=40mils

+R_CRT_VCC

D24

1

RB491D-YS_SOT23-3

0.1U_0402_16V4Z

12

C513

100P_0402_50V8J

C56

68P_0402_50V8J

G

S

Q5

Q5 2N7002E_SOT23-3

2N7002E_SOT23-3

F2

1.1A_6V_SMD1812P110TF

1 2

12

C511

T71 @T71 @

T72 @T72 @

12

C57

C57 68P_0402_50V8J

68P_0402_50V8J

+3VS

R75

4.7K_0402_5%

G

2

13

D

S

D

S

2

Q4

Q4 2N7002E_SOT23-3

2N7002E_SOT23-3

13

D

+CRT_VCC

W=40mils

CRT Connector

CRT11

CRT5

DSUB_12

DSUB_15

+CRT_VCC

12

R74

4.7K_0402_5%

DSUB_12

DSUB_15

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

C-H_13-12201513CP

CONN@

16

G

17

G

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

D

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

33 55

0.1

5

R404@

0_0603_5%

D D

+5VS

OPT1.0

C C

OPT1.1

B B

PCH_DPB_N0<17> PCH_DPB_P0<17> PCH_DPB_HPD <17>

PCH_DPB_N1<17> PCH_DPB_P1<17>

PCH_DPB_N2<17> PCH_DPB_P2<17>

PCH_DPB_N3<17> PCH_DPB_P3<17>

VGA_HDMI_TXD2-<25> VGA_HDMI_TXD2+< 25>

VGA_HDMI_TXD1-<25> VGA_HDMI_TXD1+< 25>

VGA_HDMI_TXD0-<25> VGA_HDMI_TXD0+< 25>

VGA_HDMI_TXC-<25> VGA_HDMI_TXC+<25>

1 2

D28

2

3

RB491D-YS_SOT23-3

+HDMI_5V

1

C283 OPT10@ .1U_0402_16V7KC283 OPT10@ .1U_0402_16V7K C282 OPT10@ .1U_0402_16V7KC282 OPT10@ .1U_0402_16V7K

C288 OPT10@ .1U_0402_16V7KC288 OPT10@ .1U_0402_16V7K C289 OPT10@ .1U_0402_16V7KC289 OPT10@ .1U_0402_16V7K

C286 OPT10@ .1U_0402_16V7KC286 OPT10@ .1U_0402_16V7K C287 OPT10@ .1U_0402_16V7KC287 OPT10@ .1U_0402_16V7K

C284 OPT10@ .1U_0402_16V7KC284 OPT10@ .1U_0402_16V7K C285 OPT10@ .1U_0402_16V7KC285 OPT10@ .1U_0402_16V7K

C267 OPT11@ .1U_0402_16V7KC26 7 OPT11@ .1U_0402_16V7K C266 OPT11@ .1U_0402_16V7KC26 6 OPT11@ .1U_0402_16V7K

C272 OPT11@ .1U_0402_16V7KC27 2 OPT11@ .1U_0402_16V7K C273 OPT11@ .1U_0402_16V7KC27 3 OPT11@ .1U_0402_16V7K

C270 OPT11@ .1U_0402_16V7KC27 0 OPT11@ .1U_0402_16V7K C271 OPT11@ .1U_0402_16V7KC27 1 OPT11@ .1U_0402_16V7K

C268 OPT11@ .1U_0402_16V7KC26 8 OPT11@ .1U_0402_16V7K C269 OPT11@ .1U_0402_16V7KC26 9 OPT11@ .1U_0402_16V7K

W=40mils

+HDMI_5V_OUT

F1

1 2

1.1A_6V_SMD1812P110TF

12 12

12

Pull high at VGA side

R183 OPT10@ 0_0402_5%R183 OPT10@ 0_0402_5%

SDVO_SCLK<17>

VGA_HDMI_SCLK<25>

SDVO_SDATA<17>

VGA_HDMI_SDATA<25>

1 2

R180 OPT11@ 0_0402_5%R180 OPT11@ 0_0402_5%

1 2

R184 OPT10@ 0_0402_5%R184 OPT10@ 0_0402_5%

1 2

R181 OPT11@ 0_0402_5%R181 OPT11@ 0_0402_5%

1 2

4

C72

0.1U_0402_16V4Z

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

D7

G

2

S

Q7

13

D

2N7002E_SOT23-3

D7

13

D

RB751V-40_SOD323-2

+3VS

G

2

S

Q8

Q8 2N7002E_SOT23-3

2N7002E_SOT23-3

Place closed to JHDMI1

NVIDA Recommand 10/08 OPT1.1

+HDMI_5V_OUT

D6

D6 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

R79

R80

2.2K_0402_5%

1 2

HDMI_SCLKHDMI_SCLK_R

HDMI_SDATAHDMI_SDATA_R

UMA/OPT1.0

HDMI_HPD

12

VGA_HDMI_DET<23>

1109 RF request

12

C66

C66 47P_0402_50V8J

47P_0402_50V8J

@

12

C67

C67 47P_0402_50V8J

47P_0402_50V8J

@

3

C71

12

OPT10@

R83

R83 100K_0402_5%

100K_0402_5%

OPT10@ C71

OPT10@

220P_0402_25V8J

NC7SZ08P5X_NL_SC70-5

+3VS

2

1 3

D

OPT11@ U29

OPT11@

12

R81

1M_0402_5%

G

OPT10@

S

Q9

Q9 2N7002E_SOT23-3

2N7002E_SOT23-3

+3VSDGPU

U29

4

Y

+HDMI_5V_OUT

OPT10@

5

3

OPT11@ C573

OPT11@

1 2

0.1U_0402_16V4Z

2

P

B

1

A

G

HDMI_HPD

HDMI_SDATA HDMI_SCLK

HDMI_R_CK-

HDMI_R_CK+ HDMI_R_D0-

HDMI_R_D0+ HDMI_R_D1-

HDMI_R_D1+ HDMI_R_D2-

HDMI_R_D2+

C573

G

2

S

Q44

Q44 2N7002E_SOT23-3

2N7002E_SOT23-3

HDMI connector

+3VSDGPU

R400OPT11@

12

1K_0402_5%

HDMI_HPD

13

D

DGPU_HPD_INT# <19>

OPT11@

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042GR019M23DZL

CONN@

2

GND GND GND GND

1

SM070001310 400ma 90ohm@100m hz DCR 0.3

HDMI_CLK+

L5

L5 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_CLK-

HDMI_TX0+

L4

L4 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX0-

HDMI_TX1+

L6

L6 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX1-

HDMI_TX2+

L7

L7 WCM-2012-900T_0805

WCM-2012-900T_0805

@

HDMI_TX2-

HDMI_TX2HDMI_TX2+

HDMI_TX1HDMI_TX1+

HDMI_TX0HDMI_TX0+

HDMI_CLKHDMI_CLK+

R96 0_0402_5%R96 0_0402_5%

1 2

1

4

R94 0_0402_5%R94 0_0402_5%

1 2

R92 0_0402_5%R92 0_0402_5%

1 2

1

4

R89 0_0402_5%R89 0_0402_5%

1 2

R99 0_0402_5%R99 0_0402_5%

1 2

1

4

R97 0_0402_5%R97 0_0402_5%

1 2

R104 0_0402_5%R104 0_0402_5%

1 2

1

4

R102 0_0402_5%R102 0_0402_5%

1 2

R423 680_0402_5%OPT10@R423 680_0402_5%OPT10@

1 2

R424 680_0402_5%OPT10@R424 680_0402_5%OPT10@

1 2

R421 680_0402_5%OPT10@R421 680_0402_5%OPT10@

1 2

R422 680_0402_5%OPT10@R422 680_0402_5%OPT10@

1 2

R412 680_0402_5%OPT10@R412 680_0402_5%OPT10@

1 2

R415 680_0402_5%OPT10@R415 680_0402_5%OPT10@

1 2

R418 680_0402_5%OPT10@R418 680_0402_5%OPT10@

1 2

R420 680_0402_5%OPT10@R420 680_0402_5%OPT10@

1 2

UMA 680_0402_5% DIS 499_0402_1%

2

3

2

3

2

3

2

3

+3VS

HDMI_GND

2

G

Q45

2N7002E_SOT23-3

HDMI_R_CK+

HDMI_R_CK-

HDMI_R_D0+

HDMI_R_D0-

HDMI_R_D1+

HDMI_R_D1-

HDMI_R_D2+

HDMI_R_D2-

13

D

S

DIS Option Component

2 1R 423 499_0 402_1%OPT11@2 1R423 499_0402_1%OPT11@ 2 1R 424 499_0 402_1%OPT11@2 1R424 499_0402_1%OPT11@

20 21 22 23

2 1R 421 499_0 402_1%OPT11@2 1R421 499_0402_1%OPT11@ 2 1R 422 499_0 402_1%OPT11@2 1R422 499_0402_1%OPT11@

2 1R 412 499_0 402_1%OPT11@2 1R412 499_0402_1%OPT11@ 2 1R 415 499_0 402_1%OPT11@2 1R415 499_0402_1%OPT11@

2 1R 418 499_0 402_1%OPT11@2 1R418 499_0402_1%OPT11@ 2 1R 420 499_0 402_1%OPT11@2 1R420 499_0402_1%OPT11@

+3VS

R195 OPT@ 2.2K_0402_1%R195 OPT@ 2.2K_0402_1%

A A

1 2

R196 OPT@ 2.2K_0402_1%R196 OPT@ 2.2K_0402_1%

1 2

5

SDVO_SCLK

SDVO_SDATA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/28 2011/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HDMI Conn

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

0.1Custom

5534

5

4

3

2

1

+5VS

R140

470K_0402_5%

+VSB

2

G

1 2

ODD_EN

1

D

Q14

Q14 SSM3K7002FU_SC70-3G

SSM3K7002FU_SC70-3

S

3

12

D D

ODD_EN#<19>

C C

R116@

0_0805_5%

1 2

6

C194

1U_0402_6.3V6K

C194

1U_0402_6.3V6K

2 1

LAN CONN.

+3V_LAN

PCH_PCIE_WAKE#<16,36,44>

EC_PME#<39>

R23

0_1206_5%

+3VALW

B B

LAN_CLKREQ#<15>

PLT_RST#<5,18,38,39,44>

PCIE_PRX_DTX_N1<15> PCIE_PRX_DTX_P1<15>

CLK_PCIE_LAN<15>

CLK_PCIE_LAN#<15>

PCIE_PTX_C_DRX_N1<15> PCIE_PTX_C_DRX_P1<15>

0_1206_5%

LAN WAKE#

1 2

R464 4.7K_0402_5%

R16 0_0402_5%@R16 0_0402_5%@

1 2

R17 0_0402_5%R17 0_0402_5%

1 2

+3V_LAN

12

+5VS_ODD

D

S

45

Q10

SI3456DDV-T1-GE3_TSOP6

G

3

R138

1.5M_0402_5%

R138

1.5M_0402_5%

1 2

JLAN1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

G1

22

G2

23

G3

24

G4

ACES_50406-02071-001

CONN@

12

C236

0.1U_0603_25V7K

LAN WAKE#PCH_PCIE_WAKE#

SATA HDD1 Conn.

CL 4.0 mm

JHDD1

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

G1

22

G2

23

G3

24

G4

R136

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0

+3VS

+5VS_HDD1

SATA_PTX_DRX_P0<14> SATA_PTX_DRX_N0<14>

SATA_PRX_DTX_N0<14> SATA_PRX_DTX_P0<14>

SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0

C665 0.01U_0402_16V7KC665 0 .01U_0402_16V7K

1 2

C661 0.01U_0402_16V7KC661 0 .01U_0402_16V7K

1 2

C656 0.01U_0402_16V7KC656 0 .01U_0402_16V7K

1 2

C655 0.01U_0402_16V7KC655 0 .01U_0402_16V7K

1 2

+5VS

0_0805_5%

1 2

HDD Pin Definition need check!!!

CONN@

ACES_50406-02071-001

CONN@

+3VS

12

C634

0.1U_0402_16V4Z

+5VS_HDD1

C242

10U_0805_10V4Z

C242

10U_0805_10V4Z

12

100mils

C238

1U_0402_6.3V4Z

C238

1U_0402_6.3V4Z

12

C237

0.1U_0402_16V4Z

C237

0.1U_0402_16V4Z

12

C239

1000P_0402_50V7K

C239

1000P_0402_50V7K

12

SATA ODD Conn.

JODD1

1

C663 0.01U_0402_16V7KC663 0.01U_0402_16V 7K

SATA_PTX_DRX_P2<14>

SATA_PTX_DRX_N2<14>

SATA_PRX_DTX_N2<14> SATA_PRX_DTX_P2<14>

ODD_DETECT#<19>

+5VS_ODD

ODD_DA#<18>

1 2

C660 0.01U_0402_16V7KC660 0.01U_0402_16V 7K

1 2

C662 0.01U_0402_16V7KC662 0.01U_0402_16V 7K

1 2

C657 0.01U_0402_16V7KC657 0.01U_0402_16V 7K

1 2

R139 0_0402_5%R139 0_0402_5%

1 2

R154 0_0402_5%R154 0_0402_5%

1 2

SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2

SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_P2

ODD_DETECT#_R +5VS_ODD

ODD_DA#_R

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND

GND13GND

SUYIN_127382FR013M278ZR

CONN@

+5VS_ODD

80mils

C189

1U_0402_6.3V4Z

C189

1U_0402_6.3V4Z

C217

10U_0805_10V4Z

C217

10U_0805_10V4Z

12

15 14

12

C216

1000P_0402_50V7K

C216

1000P_0402_50V7K

C188

0.1U_0402_16V4Z

C188

0.1U_0402_16V4Z

12

M/B side

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

HDD, ODD & LAN Connector

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

35 55

0.1

A

B

C

D

E

1 1

Power

+3VS

+3V

+1.5VS

For Wireless LAN

JMINI1

WAKE# RESERVED RESERVED CLKREQ# GND REFCLKREFCLK+ GND

RESERVED RESERVED GND PERn0 PERp0 GND GND PETn0 PETp0 GND RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED

GND

ACES_88915-5204

CONN@

4 mm High

12

C430

4.7U_0805_10V4Z

RESERVED RESERVED RESERVED RESERVED RESERVED

RESERVED

PERST#

+3.3Vaux

SMB_CLK

SMB_DATA

USB_D-

USB_D+

LED_WWAN #

LED_WLAN#

LED_WPAN#

BT_CTRL

BT_ON#

12

C432

+3VS +3VS_WLAN

R318

0_1206_5%

PCH_PCIE_WAKE#<16,35,44>

2 2

PCIE_PTX_C_DRX_N2<15> PCIE_PTX_C_DRX_P2<15>

E51TXD_P80DATA<39>

E51RXD_P80CLK<39>

3 3

MINI1_CLKREQ#<15>

PCIE_PRX_DTX_N2<15> PCIE_PRX_DTX_P2<15>

CLK_PCIE_MINI1#<15>

CLK_PCIE_MINI1<15>

100K_0402_5%

60mil

12

R529

SUSP#<39,46,52,53>

12

RB751V-40_SOD323-2

BT_ON#<19,37>

C432

4.7U_0805_10V4Z

R547@

0_0402_5%

1 2

R528

R528 0_0402_5%

0_0402_5%

E51TXD_P80DATA1_R

1 2

E51RXD_P80CLK_R

1 2

R527 0_0402_5%R527 0_0402_5%

R526

1K_0402_5%

D18

21

@

BT_ON#

+3VS_WLAN

12

BT_CTRL

2

G

12

C434

0.1U_0402_16V4Z

1 3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

53

13

D

Q38

2N7002E_SOT23-3

S

Mini Card Power Rating

Primary Power (mA)

Auxiliary Power (mA)

Peak Normal

3.3V

GND

1.5V

GND

+1.5V

GND

+1.5V

GND

+3.3V

GND

1000

330

500

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

12

750

250

375

C468

0.1U_0402_16V4Z

+1.5VS +3VS_WLA N

WL_OFF# PLT_RST_BUF#

MINI1_SMBCLK MINI1_SMBDATA

12

C467

0.1U_0402_16V4Z

R357 0_0402_5%R357 0_0402_5%

1 2

+3VS_WLAN

250 (wake enable)

5 (Not wake enable)

R525 0_0603_5%R525 0_0603_5%

R329 @ 0_0402_5%R329 @ 0_040 2_5% R330 @ 0_0402_5%R330 @ 0_040 2_5%

WLAN&BT Combo module circuits

BT on module

Enable Disable

H L

L H

Normal

1 2

1 2 1 2

12

R358

R358 100K_0402_5%

100K_0402_5%

+3VS_WLAN+3VS_WLAN +1.5VS

12

C469

0.1U_0402_16V4Z

(9~16mA)

WL_OFF# < 19> PLT_RST_BUF# <18>

+3VS

PCH_SMBCLK <15> PCH_SMBDATA <15>

USB20_N8 <18> USB20_P8 <18>

MINI1_LED# <39>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/28 2011/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

MINI CARD (WLAN & TV-Tuner)/USB/BT

0.1

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

36 55

0.1

A

B

C

D

E

+5VALW

1 1

12

C677

4.7U_0805_10V4Z

D11

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

D9

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

A

SYSON#

CH2

Vn

CH1

CH2

Vn

CH1

USB20_N0<18>

USB20_P0<18>

SYSON#<44,46>

2 2

+USB_VCCB

USB20_N1_R

USB20_N0_R

3 3

4 4

+USB_VCCB

USB20_N1<18>

USB20_P1<18>

3

2

1

3

2

1

U35

1

GND

2

VIN VIN3VOUT

4

EN

USB20_P1_R

USB20_P0_R

USB20_N0

USB20_P0

USB20_N1

USB20_P1

+USB_VCCB

8

VOUT

7

VOUT

6 5

FLG

EPAD

9

AP2301MPG-13_MSOP8

R235 0_0402_5%@R235 0_0402_5%@

1

4

R231 0_0402_5%

R226 0_0402_5%@R226 0_0402_5%@

1 2

L17

1

4

WCM2012F2S-120T04_0805

@

1 2

R221 0_0402_5%

R491

0_0402_5%

1 2

WCM2012F2S-120T04_0805

1

4

L19

@

1 2

2

3

C686

220U_6.3V_M

2

3

B

2

3

1

+

2

470P_0402_50V7K

USB_OC0# <18>

+USB_VCCB

470P_0402_50V7K

1

C721

2

JUSB4

+USB_VCCB

1 2 3 4 5 6 7 8

TOP_YUB2008-1R0021

CONN@

JUSB3

1 2 3 4 5 6 7 8

WONTE_91-90044-109

CONN@

USB20_N1_R USB20_P1_R

colayout this connector with JUSB2

+USB_VCCB

1

C703

2

JUSB2

1

USB20_N0_R USB20_P0_R

+USB_VCCB

VCC

2

D-

3

D+

4

GND

5

VCC

6

D-

7

D+

8

GND

TOP_YUB2008-1R0021

CONN@

JUSB1

1

VCC

2

D-

3

D+

4

GND

5

VCC

6

D-

7

D+

8

GND

WONTE_91-90044-109

CONN@

colayout this connector with JUSB1

0.1U_0402_16V4Z

BT_ON#

BT@

1 2

R588

10K_0402_5%R588

10K_0402_5%

0.1U_0402_16V4Z

VCC DD+ GND VCC DD+ GND

(Port 1)

GND GND GND GND

BT_ON#<19,36>

9 10 11 12

(Port 0)

9

GND

10

GND

11

GND

12

GND

9

GND

10

GND

11

GND

12

GND

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/28 2011/09/28

Compal Secret Data

Deciphered Date

+3VS+3VALW

BT@

C758

C757

BT@

1 2

2

G

1 2

3

S

Q54

BT@

D

AO3413L_SOT23-3

1

W=40mils

BT@

C734

4.7U_0805_10V4Z

C734

4.7U_0805_10V4Z

12

C759

BT@

1U_0603_10V4Z

BT@

C735

0.1U_0402_16V4Z

C735

0.1U_0402_16V4Z

2

G

12

R546

R546 300_0603_5%

300_0603_5%

BT@

13

D

Q53

2N7002E_SOT23-3

S

+BT_VCC

BT@

BT Conn.

(Port 13)

CONN@

ACES_87213-0400G

5

GND

6

GND

JBT1

D

+BT_VCC

1

2

3

4

Title

MINI CARD (WLAN & TV-Tuner)/USB/BT

Size Document Number Rev

Custom

P4LS0 M/B LA-7241P Schematic

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

USB20_P13 <18> USB20_N13 <18>

Compal Electronics, Inc.

37 55

E

37 55

0.1

A

B

C

D

E

Card Reader

1 1

+ODR_PWR

C329

0.1U_0402_10V7K

C329

0.1U_0402_10V7K

C330

10U_0603_6.3V6M

C330

12

1

2

2 2

3 3

1

2

Close to connector

10U_0603_6.3V6M

C332

0.1U_0402_10V7K

C332

0.1U_0402_10V7K

@

R223

100K_0402_5%@R223

100K_0402_5%

C334

0.1U_0402_10V7K

C334

0.1U_0402_10V7K

1

2

PCIE_PTX_C_DRX_P3<15>

PCIE_PTX_C_DRX_N3<15>

CLK_PCIE_CARD<15>

CLK_PCIE_CARD#<15>

PCIE_PRX_DTX_P3<15>

PCIE_PRX_DTX_N3<15>

+ODR_PWR

SP8_MSD4_XDD0 SP9_MSD0_XDD1 SP10_MSD2_XDD2 SP11_MSD6_XDD3 SP12_MSD3_XDD4 SP13_MSD7_XDD5 SP14_MSCLK_XDD6 SP15_SDWP_XDD7

SP4_SDD4_XDWE# SP7_MSD1_XDWP # SP6_MSD5_XDALE XD_CD# SP1_SDD7_XDRDY SP2_SDD6_XDRE# SP3_SDD5_XDCE# SP5_MSBS_XDCLE

+ODR_PWR

+3VS_CARD

C425

10U_0603_6.3V6M

C425

10U_0603_6.3V6M

1

2

@

1 2

C370 5P_0402_50V8C

PCIE_PTX_C_DRX_p3

PCIE_PTX_C_DRX_N3

CLK_PCIE_CARD

CLK_PCIE_CARD#

1 2

C420 4.7U_0603_6.3V6KC420 4.7U_0603_6.3V6K

1 2

C421 0.1U_0402_10V 7KC421 0.1U_0402_10V7K

1 2

C422 0.1U_0402_10V 7KC422 0.1U_0402_10V7K

1 2

C423 0.1U_0402_10V7KC423 0.1U_0402_10V7K

C387

0.1U_0402_10V7K

C387

0.1U_0402_10V7K

1

2

JREAD1

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM_NR

CONN@

20 mils

4.7U_0603_6.3V6K

@

C395

1

2

SD_D1_R SD_D1

R260 0_0402_5%R260 0_040 2_5%

SD_D0_R SD_D0

R253 0_0402_5%R253 0_040 2_5%

SD_CLK_R SD_CLK

R248 33_0402_1%R248 33_0402_1%

R241 0_0402_5%R241 0_040 2_5%

R238 0_0402_5%R238 0_040 2_5%

7 IN 1 CONN

20 mils

PCIE_PRX_C_DTX_P3PCIE_PRX_DTX_P3

PCIE_PRX_C_DTX_N3PCIE_PRX_DTX_N3

20 mils 40 mils 40 mils

0.1U_0402_10V7K

C383

1 2

+3VS +3VS_CA RD

XD_CD#

DV33_18

SP1_SDD7_XDRDY

SP2_SDD6_XDRE#

SP3_SDD5_XDCE#

SP4_SDD4_XDWE#

SD_CMDSD_CMD_R

SD_D3SD_D3_R

SD-VCC

MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

AV12

DV12

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

21 28

20 14 12 30 29 27 23 18 16 25 1

2

26 17 15 19 24 22 13

1 2

R342 0_0805_5%R342 0_0805_5%

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

AV12

6

HSOP

7

HSON

8

GND

9

DV12

Card1_3V3

3V3_IN

Card2_3V3

XD_CD#

DV33_18

GND

SP1

SP2

SP3

SP4

SD_D1

SD_D0

SD_CLK

SD_CMD

SD_D3

RTS5209-GR_LQFP48_7X7

+ODR_PWR

SD_CLK_R SD_D0_R SD_D1_R SD_D2_R

SD_D3_R SP4_SDD4_XDWE# SP3_SDD5_XDCE# SP2_SDD6_XDRE# SP1_SDD7_XDRDY

SD_CMD_R

SD_CD#

SP15_SDWP_XDD7

SP14_MSCLK_XDD6_R

SP9_MSD0_XDD1

SP7_MSD1_XDWP #

SP10_MSD2_XDD2

SP12_MSD3_XDD4

MS_INS#

SP5_MSBS_XDCLE

Modify R02, Add 0R between +3VS and +3VS_CARD

40 mils40 mils

U16

CLK_REQ#

PERST#

GPIO/EEDI

MS_INS#

SD_CD#

DV12_S

RREF

3V3_IN

EEDO

EECS

EESK

SP15

SP14

SP13

SP12

SP11

SP10

GND

SD_D2

10 mils

RREF

48

40 mils

47

CARD_CLKREQ#

46

PLT_RST#

45

44

43

42

5IN1_LED#

41

40

39

SP15_SDWP_XDD7

38

SP14_MSCLK_XDD6

37

SP13_MSD7_XDD5

36

SP12_MSD3_XDD4

35

SP11_MSD6_XDD3

34

SP10_MSD2_XDD2

33

SP9_MSD0_XDD1

32

SP9

SP8_MSD4_XDD0

31

SP8

SP7_MSD1_XDWP #

30

SP7

SP6_MSD5_XDALE

29

SP6

SP5_MSBS_XDCLE

28

SP5

27

26

SD_D2 SD_D2_R

25

R274 6.2K_0603_1%R274 6.2K_0603_1%

MS_INS#

SD_CD#

12

C424 0.1U_0402_10V7KC424 0.1U_0402_10V7K

CARD_CLKREQ# <15>

PLT_RST# <5,18,35,39,44>

5IN1_LED# <41>

1 2

R243 0_0402_5%R243 0_040 2_5%

20 mils

1 2

R234 0_0402_5%R234 0_040 2_5%

Reserve for EMI please close t o JREAD1

@

1 2

R222

33_0402_5%

Reserve for EMI please close to JREAD1

@

1 2

R224

33_0402_5%

@

12

C331

22P_0402_50V8J

@

1 2

C333

22P_0402_50V8J

+3VS_CARD

12

SP14_MSCLK_XDD6_R

2

1

1 2

C357 4.7U_0603_6.3V6KC357 4.7U_0603_6.3V6K

1 2

C356 0.1U_0402_10V7KC356 0.1U_0402_10V7K

5P_0402_50V8C

@

C365

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

D

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

Card Reader RTS5209

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

38

0.1

55

5

+3VLP

PLT_RST#<5,18,35,38,44>

D D

+3VALW_EC

C C

C14@

22P_0402_50V8J

12

R25 47K_0402_5%R25 47K_0402_5%

C16 0.1U_0402_16V4ZC16 0.1U_0402_16V4Z

12

10/1 ENE Recomm and

R29 47K_0402_5%R29 47K_0402_5%

1 2

R30 47K_0402_5%R30 47K_0402_5%

1 2

R19 10K_0402_5%R19 10K_0402_5%

1 2

R44 2.2K_0402_5%R44 2.2K_0402_5%

1 2

R43 2.2K_0402_5%R43 2.2K_0402_5%

1 2

C26@

22P_0402_50V8J

12

R42@

33_0402_5%

1 2

12

R20@

33_0402_5%

PLT_RST#

C764

@C764

@

0.1U_0402_16V4Z

CLK_PCI_LPC

12

EC_RST#

KSO1

KSO2

EC_SMI#

EC_SMB_DA1

EC_SMB_CK1

Reserve for EMI please close t o U44

+3VS

R45 2.2K_0402_5%R45 2.2K_0402_5%

1 2

R46 2.2K_0402_5%R46 2.2K_0402_5%

1 2

R18 10K_0402_5%R18 10K_0402_5%

1 2

B B

12

C20

15P_0402_50V8J

+3VALW_EC

A A

Ra

Rb

R36

R36 100K_0402_5%

100K_0402_5%

1 2

AD_BID0

12

R35

8.2K_0402_5%

1

X1

2

32.768KHZ_12.5PF_9H03200413

Board ID

Analog Board ID definition, Please see page 3.

12

C22

0.1U_0402_16V4Z

5

EC_XCLK0EC_XCLK1

OSC4OSC

NC3NC

EC_SMB_CK2

EC_SMB_DA2

EC_SCI#

12

C19

15P_0402_50V8J

+3VALW

KSI[0..7]<40>

KSO[0..17]<40>

SUSCLK< 16>

+3VALW_EC

Ra

Rb

1 2

PWR_SUSP_LED< 41>

USB_CHARGE_2A#<45>

USB_CHARGE_100mA<45>

E51TXD_P80DATA<36> E51RXD_P80CLK<36>

R40

R40 100K_0402_5%

100K_0402_5%

1 2

AD_PID0

12

R41

56K_0402_5%

4

R37

0_0805_5%

@

R38

0_0805_5%

C23

0.1U_0402_16V4Z

C23

0.1U_0402_16V4Z

C480

0.1U_0402_16V4Z

C480

0.1U_0402_16V4Z

12

KSI[0..7]

KSO[0..17]

1 2

R33

12

C25

0.1U_0402_16V4Z

4

GATEA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_LPC PLT_RST# EC_RST# EC_SCI# PWR_SUSP_LED

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

MINI1_LED# USB_CHARGE_2A# GPU_VID0 USB_CHARGE_100mA FAN_SPEED1 FAN_SPEED2 E51TXD_P80DATA E51RXD_P80CLK ON/OFF

NUM_LED#

@

GATEA20< 19>

SERIRQ<14>

LPC_FRAME#<14>

LPC_AD3<14> LPC_AD2<14> LPC_AD1<14> LPC_AD0<14>

CLK_PCI_LPC<18>

EC_SCI#<19>

EC_SMB_CK1<48,50> EC_SMB_DA1<48,50> EC_SMB_CK2<15,23> EC_SMB_DA2<15,23>

PM_SLP_S3#<16> PM_SLP_S5#<16>

EC_SMI#<19>

MINI1_LED#<36>

GPU_VID0<23,55>

FAN_SPEED1<45> FAN_SPEED2<45>

ON/OFF<40>

NUM_LED#

Project ID

Analog Project ID definition,

C479

0.1U_0402_16V4Z

C479

0.1U_0402_16V4Z

12

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

0_0402_5%R33

0_0402_5%

0.1U_0402_16V4Z

12

EC_XCLK1 EC_XCLK0

+3VALW_EC

C477

1000P_0402_50V7K

C477

1000P_0402_50V7K

C476

1 2

U4

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

3

L3

L3 FBMA-L11-160808-800LMT_0603

+3VALW_EC +EC_VCCA

C478

1000P_0402_50V7K

C478

1000P_0402_50V7K

LPC & MISC

FBMA-L11-160808-800LMT_0603

1 2

9

22

33

67

96

111

125

VCC

AVCC

INVT_PWM/PWM 1/GPIO0F

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

PS2 Interface

11

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

VR_ON/XCLK32K/GPIO57

GPO

GPIO

GPI

GND

AGND

GND

24

35

69

94

113

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

C24

0.1U_0402_16V4Z

ECAGND

21

AD4/GPIO42

DA3/GPIO3F

SPIDI/RD#

SPIDO/WR#

SPICS#

GPXO10 GPXO11

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L2

23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

12

2010/09/28

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

SELIO2#/AD5/GPIO43

IREF/DA2/GPIO3E

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C

PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

KB930QF A1 LQFP 128P

20mil

ECAGND

FBMA-L11-160808-800LMT_0603

BEEP# FANPWM ACOFF

BATT_TEMP

ADP_I AD_BID0 AD_PID0

DAC_BRIG

EN_FAN2 PCH_PWR_EN

EC_MUTE# GFX_CORE_PWRGD GPIO4C H_PROCHOT#_EC TP_CLK TP_DATA

GPU_VID1 65W/90W# HDA_SDO LID_SW#

FRD#_R FWR#_R

FSEL#_R

GPIO40

EC_PECI

USB_CHARGE_CB

BATT_AMB_LED# CAPS_LED# BATT_BLUE_LED# PWR_LED SYSON VR_ON EC_ACIN

PCH_RSMRST# LID_SW_OUT# EC_ON EC_PME# PCH_PWROK BKOFF# PWR_SAVE_LED# WLAN_LED# BATT_RED_LED#

PM_SLP_S4# ENBKL EAPD SA_PGOOD SUSP# PBTN_OUT# NV_PERFORMANCE

+V18R

12

C18

4.7U_0805_10V4Z

Compal Secret Data

2

BEEP# <42>EC_KBRST#<19> FANPWM <45> ACOFF <47>

C21 100P_0402_50V8JC21 100P_0402_50V8J

12

DAC_BRIG <32>

EN_FAN2 <45 > PCH_PWR_EN <46>

EC_MUTE# <42> GFX_CORE_PWRGD <54>

TP_CLK <40> TP_DATA <40>

GPU_VID1 <23,55>

65W/90W# <50>

HDA_SDO <14>

LID_SW# <41>

R28 0_0402_5%R28 0_0402_5%

1 2

R27 33_0402_5%R27 33_0402_5%

1 2

R26 33_0402_5%R26 33_0402_5%

1 2

R21 33_0402_5%R21 33_0402_5%

1 2

R39 43_0402_1%R39 43_0402_1%

1 2

USB_CHARGE_CB <45> BATT_AMB_LED# <41> CAPS_LED# BATT_BLUE_LED# <41> PWR_LED <41>

SYSON <44 ,46,51>

VR_ON <54>

PCH_RSMRST# <16>

LID_SW_OUT# <15>

EC_ON <40>

EC_PME# <35>

PCH_PWROK <16>

BKOFF# <32,56>

PWR_SAVE_LED#

WLAN_LED# <41>

BATT_RED_LED#

PM_SLP_S4# < 16>

ENBKL <17> EAPD <42>

SA_PGOOD <52> SUSP# <36,46,52,53> PBTN_OUT# <16> NV_PERFORMANCE <23>

Deciphered Date

2

ECAGND

BATT_TEMP <50>

ADP_I <48,50>

@ PAD

T1

FRD# FWR# SPI_CLKSPI_CLK_ R FSEL#

H_PECI < 5,19>

2011/09/28

1

+3VALW_EC

LID_SW#

GPIO4C

TP_CLK

TP_DATA

EC_MUTE#

BKOFF#

GPIO40

EC_ACIN

H_PROCHOT#_EC

12

R50

R50 100K_0402_5%

100K_0402_5%

VR_HOT#<54>

R31 100K_0402_5%R31 100K_0402_5%

R384 100K_0402_5%R384 100K_0402_5%

R48 4.7K_0402_5%R48 4.7K_0402_5%

R49 4.7K_0402_5%R49 4.7K_0402_5%

R47 @ 1 0K_0402_5%R47 @ 10K_0402_5%

R32 4.7K_0402_5%R32 4.7K_0402_5%

R385 10K_0402_5%R385 10K_0402_5%

R22 200K_0402_5%R22 200K_0402_5%

D3 CH751H-40PT_SOD323-2D3 CH751H-40PT_SOD323-2

C15 100P_0402_50V 8JC15 100P_0402_50V8J

U5

2

VR_HOT#

12

1 2

12

+3VS

1 2

5

C27 0.1U_0402_16V 4ZC27 0.1U_0402_16V4Z

P

4

Y

A

G3NC

SN74LVC1G06DCKR_SC70-5

1

R55

0_0402_5%

12

+5VS

+3VS

12

+3VALW_EC

ACIN <16,46,48>

H_PROCHOT# <5,50>

Latest design guide suggest change UE4 to 74LVC1G06.

+3VALW_EC

C5

0.1U_0402_16V4Z

SA00002C100 (S IC FL 1MB MX25L1005AMC-12G SOP 8P 3.3V)

SPI_CLK_R

SPI ROM

20mils

FSEL#

SPI_CLK

FWR#

R24@

22_0402_5%

8

3

7

1

6

5

12

Reserve for EMI please close t o U15

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

EC ENE-KB930

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

1

128KB

U1

VCC

W

HOLD

S

C

D

MX25L2005M2C-12G SOP 8P

12

4

VSS

2

Q

C17@

100P_0402_50V8J

1 2

39

FRD#

55

0.1

1

2

3

4

5

6

7

8

INT_KBD Conn.

A A

B B

SJM

JKB1

27

G1

28

G2

ACES_85201-26051

CONN@

(Left)

KSO0

1

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

KSO1

2

KSO2

3

KSO3

4

KSO4

5

KSO5

6

KSO6

7

KSO7

8

KSO8

9

KSO9

10

KSO10

11

KSO11

12

KSO12

13

KSO13

14

KSO14

15

KSO15

16

KSO16

17

KSO17

18

KSI0

19

KSI1

20

KSI2

21

KSI3

22

KSI4

23

KSI5

24

KSI6

25

KSI7

26

KSI[0..7]

KSO[0..17]

KSO7

C497 100P_0402_50V8JC497 100P_0402_50V8J

1 2

KSO6

C485 100P_0402_50V8JC485 100P_0402_50V8J

1 2

KSO5

C495 100P_0402_50V8JC495 100P_0402_50V8J

1 2

KSO4

C483 100P_0402_50V8JC483 100P_0402_50V8J

1 2

KSO3

C496 100P_0402_50V8JC496 100P_0402_50V8J

1 2

KSI4

C490 100P_0402_50V8JC490 100P_0402_50V8J

1 2

KSO2

C481 100P_0402_50V8JC481 100P_0402_50V8J

1 2

KSO1

C494 100P_0402_50V8JC494 100P_0402_50V8J

1 2

KSO0

C482 100P_0402_50V8JC482 100P_0402_50V8J

1 2

KSI5

C505 100P_0402_50V8JC505 100P_0402_50V8J

1 2

KSI6

C492 100P_0402_50V8JC492 100P_0402_50V8J

1 2

KSI7

C504 100P_0402_50V8JC504 100P_0402_50V8J

1 2

(Right)

KSI[0..7] <39>

KSO[0..17] <39>

KSO16

C506 100P_0402_50V8JC506 100P_0402_50V8J

KSO17

KSO15

KSO14

KSO13

KSO12

KSI0

KSO11

KSO10

KSI1

KSI2

KSO9

KSI3

KSO8

1 2

C493 100P_0402_50V8JC493 100P_0402_50V8J

1 2

C502 100P_0402_50V8JC502 100P_0402_50V8J

1 2

C487 100P_0402_50V8JC487 100P_0402_50V8J

1 2

C500 100P_0402_50V8JC500 100P_0402_50V8J

1 2

C488 100P_0402_50V8JC488 100P_0402_50V8J

1 2

C489 100P_0402_50V8JC489 100P_0402_50V8J

1 2

C498 100P_0402_50V8JC498 100P_0402_50V8J

1 2

C486 100P_0402_50V8JC486 100P_0402_50V8J

1 2

C501 100P_0402_50V8JC501 100P_0402_50V8J

1 2

C491 100P_0402_50V8JC491 100P_0402_50V8J

1 2

C499 100P_0402_50V8JC499 100P_0402_50V8J

1 2

C503 100P_0402_50V8JC503 100P_0402_50V8J

1 2

C484 100P_0402_50V8JC484 100P_0402_50V8J

1 2

Reset Button

+RTCVCC

R465

R465 1K_0402_5%

1K_0402_5%

1 2

D35

MAINPWON<49,50>

3V5V EN<49>

MAINPWON

3V5V EN

D35

3

2

BAV70W_SOT323-3

BI_GATE

1

2

G

R51

R51 0_0402_5%

0_0402_5%

1 2

13

D

Q58

Q58 2N7002E_SOT23-3

2N7002E_SOT23-3

S

@

SW4

1 2

SKPMAME010_2P

BI_GATE

12

R466

R466 100K_0402_5%

100K_0402_5%

BI<50>

12

C765

0.1U_0402_16V4Z

2

3

S

G

D

1

R273

R273 0_0402_5%

0_0402_5%

1 2

Q59

Q59 AO3413L_SOT23-3

AO3413L_SOT23-3

BI_RESET <41>

To TP/B Conn.

ON/OFF switch

SJM

JTP1

1 2 3 4

C C

TP_CLK TP_DATA

5 6

7

GND

8

GND

E-T_6905-E06N-00R

CONN@

12

1 2 3 4 5 6

12

C28@100P_0402_50V8J

C30@100P_0402_50V8J

1 2

R52 0_0402_5%R 52 0_0402_5%

@

1 2

R53 0_0402_5%

TP_CLK

TP_DATA

TP_CLK <39>

TP_DATA <39>

+3VS

+5VS

TP_CLK

TP_DATA

+5VS

12

C31

0.1U_0402_16V4Z

3

2

D4

D4 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

ON/OFFBTN#<41>

TOP Side

SW2

SMT1-05-A_4P

1

2

5

6

Bottom Side

SW3

SMT1-05-A_4P

1

2

5

6

3

4

3

4

Power Button

D5

EC_ON<39>

ON/OFFBTN#

10K_0402_5%

EC_ON

R78

1

D5

BAV70W_SOT323-3

1 2

2

G

+3VALW

1 2

2

3

13

R69

R69 100K_0402_5%

100K_0402_5%

51ON#

D

Q6

Q6 2N7002E_SOT23-3

2N7002E_SOT23-3

S

ON/OFF <39>

51ON# <47>

Test Only

D D

1

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

5

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

2011/09/282010/09/28

6

Title

Size Document Number Rev

Custom

P4LS0 M/B LA-7241P Schematic

Date: Sheet of

7

Compal Electronics, Inc.

I/O Port & K/B Connector/PWR OK

Wednesday, December 29, 2010

40 55

8

0.1

A

1 1

B

C

D

E

2

G

1 2

Q42B

5

G

6

Q42A

PWR_LED#

3

4

+3VALW

ON/OFFBTN#

LID_SW#

D

S

1

D

S

PWR_LED#

PWR_SUSP_LED#

DMN66D0LDW-7_SOT363-6

ON/OFFBTN# <40>

LID_SW# <39>

BI_RESET <40>

Battery LED Wireless LED(SJM)

Side View LED with Blue/Amber/Red Color

+3VALW

2 2

3 3

LED4

2

A

1

3

B

HT-210UD5-NB5_AMBER-BLUE

LED5

2

A

3

B

HT-210UD5-NB5_AMBER-BLUE

LED6

2

A

3

B

HT-210UD5-NB5_AMBER-BLUE

LED7

2

A

3

B

HT-210UD5-NB5_AMBER-BLUE

1 2

R377 100_0402_1%R377 100_0402_1%

1 2

R383 100_0402_1%R383 100_0402_1%

1 2

R374 100_0402_1%R374 100_0402_1%

1 2

R379 100_0402_1%R379 100_0402_1%

1 2

R375 100_0402_1%R375 100_0402_1%

1 2

R380 100_0402_1%R380 100_0402_1%

1 2

R376 100_0402_1%R376 100_0402_1%

1 2

R381 100_0402_1%R381 100_0402_1%

BATT_AMB_LED#

BATT_BLUE_LED#

BATT_AMB_LED#

BATT_BLUE_LED#

BATT_AMB_LED#

BATT_BLUE_LED#

BATT_AMB_LED#

BATT_BLUE_LED#

BATT_AMB_LED# <39>

BATT_BLUE_LED# <39>

+3VS

+3VALW

1 2

R371 100_0402_1%R371 100_0402_1%

R369

3.9K_0402_5%

1 2

2 1

HT-191UD5_AMBER

Power LED(SJM)

R378

2.2K_0402_5%

1 2

R370

3.9K_0402_5%

1 2

2 1

4 3

HDD LED

LED3

12

B

HT-191NB5_BLUE

LED2

LED1

B

A

HT-297UD5-CB5_AMBER-BLUE

MEDIA_LED#

A

WLAN_LED#

PWR_LED#

PWR_SUSP_LED#

4

Y

+3VS

5

3

WLAN_LED# <39>

+3VS

@

R372

R372 10K_0402_5%

U23

2

P

B

1

A

G

MC74VHC1G08DFT2G_SC70-5

10K_0402_5%

1 2

5IN1_LED# <38>

PCH_SATALED# <14>

PWR_SUSP_LED<39>

100K_0402_5%

PWR_LED<39>

100K_0402_5%

PWR/B

JPWR1

GND

ACES_88514-00601-071

GND

CONN@

R366

1 2 3 4 5 6

7 8

R367

1 2

4 4

LED Status

Power/SUS Battery 3G/WLAN

ON SUS ChargeFull WLAN3G

Blue Amber

A

Blue Amber Blue Amber

BlueTooth

B

ACIN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Compal Secret Data

Deciphered Date

2011/09/282010/09/28

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

LED

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

41 55

0.1

5

PD#

MONO_IN

1 2

R227 0_0805_5%R227 0_0805_5%

SM010014520 3000ma 220ohm@10 0mhz DCR 0.04

+5VAMP

0.1U_0402_16V4Z

12

+3VS

@R311

@

@Q35A

@

@Q35B

@

C625

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C672

C672

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C174

C174

1 2

0.1U_0402_16V4Z

C338

12

@

R306

R306 10K_0402_5%

10K_0402_5%

13

D

2

G

S

C258

1 2

12

0.1U_0402_16V4Z

R152

R152 10K_0402_5%

10K_0402_5%

12

C339

0.1U_0402_16V4Z

Q32

@

Q32

@

2N7002E_SOT23-3

L16

+5VS

D D

EC_MUTE#<39>

C C

BEEP#<39>

HDA_SPKR<14>

B B

0.1U_0402_16V4Z

A A

0.1U_0402_16V4Z

1 2

FBMA-L11-201209-221LMA30T_0805

@

L15

1 2

FBMA-L11-201209-221LMA30T_0805

R299 0_0402_5% R299 0_0402_5%

1 2

+3VS

2

HDA_RST_AUDIO#

C240

1 2

C646

1 2

C675

1 2

5

D12

CH751H-40PT_SOD323-2

D13

CH751H-40PT_SOD323-2

5

12

R311 100K_0402_5%

100K_0402_5%

61

Q35A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

3

Q35B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

12

4

U13

1

IN

OUT

2

GND

SHDN3BYP

G9191-475T1U_SOT23-5

@

(output = 300 mA)

EAPD active low 0=power down ex AMP 1=power up ex AMP

J1 JUMP_43X39@J1JUMP_43X39@

2

112

4

5

4

C323

0.01U_0402_16V7K

40mil60mil

1 2

MIC_PLUG#<43> HP_PLUG#<43>

+VDDA

@

+3VS

4.75V

MIC1_L<43>

MIC1_R<43>

MIC1_VREFO

R207 5.1K_0402_5%R207 5.1K_0402_5%

1 2

R208 10K_0402_1%R208 10K_0402_1% R209 39.2K_0402_1%R209 39.2K_0402_1%

R206 5.1K_0402_5%R206 5.1K_0402_5%

1 2

EAPD<39>

SPDIF_OUT<43>

AVEE

12

3

Modify R02 Add R834 between +3VS and +3VS_Codec. change power from +3VS to +3VS_CODEC.

+3VS_CODEC

1

C275

2

+3VS_CODEC

1

C659

2

1U_0603_10V4Z

+3VS_CODEC

1

C244

2

U12

HP_LEFT<43>

HP_RIGHT<43>

MIC1_L

MIC1_R

MONO_IN

12 12

1 2

12

C257

C256

10U_0805_10V4Z

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

HP_LEFT

HP_RIGHT

1 2

C243 1U _0603_10V4ZC243 1U_0603_10V4Z

1 2

C315 2.2U_0402_6.3V6MC315 2.2U_0402_6.3V6M

1 2

C316 2.2U_0402_6.3V6MC316 2.2U_0402_6.3V6M

PD#

R211 0_0402_5% R211 0_0402_5%

SENSE_A SENSE_B

R2050_0402_5% R2050_ 0402_5%

0.1U_0402_16V4Z

Issued Date

3

U12

25

26

27

28

33

34

41

42

22

23

35

36

37

13

12

44 43

47

48

24

49

2010/09/28 2011/09/28

C290

2

10U_0805_10V4Z

1

C664

2

0.1U_0402_16V4Z

1

C281

2

10U_0805_10V4Z

PORTA_L

PORTA_R

PORTD_L

PORTD_R

PORTE_L

PORTE_R

PORTF_L

PORTF_R

FLY_P

FLY_N

PORTC_L

PORTC_R

C_BIAS

PCBEEP

EXT_MUTE#

SENSE A SENSE B

GPIO0/EAPD#

SPDIFO

AVEE

EP_GND

1

C254

2

0.1U_0402_16V4Z

21

9

4

VDD_IO

VAUX_3.3

DVDD_3.3

Compal Secret Data

+3VS +3VS_CODEC

R834 0_0805_5%R834 0_0805_5%

1 2

15

31

LPWR5.0

AVDD_5V

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

PORTB_L

PORTB_R

SDATA_IN

SDATA_OUT

RESET#

BIT_CLK

DMIC_3/4

DMIC_CLK0

DMIC_1/2

GPIO1/SPK_MUTE#

GPIO2/SPDIF2

FILT_1.8

FILT_1.65

AVDD_3.3

Deciphered Date

18

29

AVDD_HP

CX20584-21Z_QFN48_7X7

1 2

R146

R146 0_1206_5%

0_1206_5%

+VDDA_R

1

2

20

RPWR5.0

CLASSDREF

B_BIAS

SYNC

2

40mils40mils

1

C674

2

10U_0805_10V4Z

1

C252

C245

C252

2

0.1U_0402_16V4Z

Please bypass caps very close to device.

SPKL+

L37

14

16

19

17

39

40

38

8

6

10

11

7

1

2

3

46 45

5

32

30

2

L37

FBMA-L11-201209-221LMA30T_0805

SPKL-

L38

FBMA-L11-201209-221LMA30T_0805

SPKR+

L35

FBMA-L11-201209-221LMA30T_0805

SPKR-

L36

FBMA-L11-201209-221LMA30T_0805

HDA_SDIN0_AUDIO

HDA_SDOUT_AUDIO

1 2

C313@

HDA_RST_AUDIO#

1 2

C277@

1 2

C298@ 22P_0402_5 0V8JC298@ 22P_040 2_50V8J

R210

@R210

@

PD#

1 2

0_0402_5%

FILT_1.8V

FILT_1.65V

LDO_OUT_3.3V

1

C670

2

0.1U_0402_16V4Z

1

C253

C247

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1 2

R191 33_0402_5%R191 33_0402_5%

1 2

22P_0402_50V8J

HDA_SYNC_AUDIO

22P_0402_50V8J

1 2

R21590.9_0402_1% R21590.9_0402_1%

FILT_1.8V

1

+VDDA

Layout Note:Path from +5VS to LPWR_5.0 RPWR_5.0 must be very low resistance (<0.01 ohms)

1

C246

2

10U_0805_10V4Z

40mils

C668

12

1000P_0402_50V7K

C669

12

1000P_0402_50V7K

C666

12

1000P_0402_50V7K

C667

12

1000P_0402_50V7K

HDA_SDIN0 <14>

HDA_SDOUT_AUDIO <14>

HDA_SYNC_AUDIO <14>

HDA_RST_AUDIO# <14>

R1990_0402_5% R1990 _0402_5%

HDA_BITCLK_AUDIO <14>

DMIC_DATA

12

R204

Title

Size Document Number Rev

Custom

P4LS0 M/B LA-7241P Schematic

Date: Sheet of

DMIC_CLK <43>

DMIC_DATA <43>

1

C318

C317

2

10K_0402_5%

10U_0805_10V4Z

AVDD_3.3 pin is output of internal LDO. Do NOT connect to external supply.

Compal Electronics, Inc.

HD Audio Codec CX20584

Thursday, December 23, 2010

0.1U_0402_16V4Z

SPKL+_L <43>

SPKL-_L <43>

SPKR+_L <43>

SPKR-_L <43>

FILT_1.65V

LDO_OUT_3.3V

1

Internal SPEAKER

12

C304

C303

1 2

0.1U_0402_16V4Z

12

C295

C305

10U_0805_10V4Z

42 55

1U_0402_6.3V4Z

0.1U_0402_16V4Z

0.1

A

1 1

B

C

D

E

Headphone Out/SPDIF

JHP1

2

3

6 4

1

5

7 3 8

2

SINGA_2SJ1558-011111

CONN@

MIC_PLUG#

HP_PLUG#

@

D30

D30 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

R142 39_0402_5%R142 39_0402_ 5%

HP_RIGHT<42>

HP_LEFT<42>

1

C229

330P_0402_50V7K

2 2

2

1 2

R143 39_0402_5%R143 39_0402_ 5%

1 2

HPOUT_L_2

HPOUT_R_2

1

C228

C228 330P_0402_50V7K

330P_0402_50V7K

2

1

Close to IC

HPOUT_R_1 HPOUT_R_2

HPOUT_L_1 HPOUT_L_2

HPOUT_L_2

HPOUT_R_2

3

D8

D8 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

MIC1_VREFO

1 2

L9 FBMA-L11-160808-700LMT_2PL9 FBMA-L11-160808-700LMT_2P

1 2

L10 FB MA-L11-160808-700LMT_2PL10 FBMA-L11-160808-700LMT_2P

+5VSPDIF

SPDIF_PLUG#

SPDIF_OUT<42>

10/04 Update CIS symbol.

SPKL+_L<42> SPKL-_L< 42> SPKR+_L<42> SPKR-_L<42>

Digital MIC CONN

DMIC_CLK<42>

DMIC_DATA<42>

SPKL+_L

SPKL-_L SPKR+_L SPKR-_L

D32

1 2

12

D32 CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1 2

12

R477

R477 3K_0402_5%

3K_0402_5%

MIC1_L_R

L34

L34 FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P

MIC1_R_R

L33

L33 FBMA-L11-160808-700LMT_2P

FBMA-L11-160808-700LMT_2P

1 2

1

<ESD>

12/7 Add C1107=@100pF(Avoid noise)

MIC JACK

JMIC1

MIC1_L_L

MIC1_R_L

MIC_PLUG#<42>

MIC_PLUG#

10/04 Check footprint ok Footprint:SINGA_2SJ-0960-D06_6P

1 2

3

4

5

6

SINGA_2SJ-A960-C01

CONN@

Q47

Q47 AO3413_SOT23-3

AO3413_SOT23-3

+5VSPDIF

D31

D29

D31

R475

3K_0402_5%

2

3

1

MIC1_L_LMIC1_L_L

MIC1_R_LMIC1_R_L

CH751H-40PT_SOD323-2

3 3

MIC1_L<42>

MIC1_R<42>

C631

220P_0402_50V7K

R478 100_0402_1%R478 100_0402_1%

1 2

R476 100_0402_1%R476 100_0402_1%

1 2

1

C630

220P_0402_50V7K

2

PJDLC05C_SOT23-3

R230 0_0603_5%R230 0_0603_5%

1 2

R236 0_0603_5%R236 0_0603_5%

1 2

R519 0_0603_5%R519 0_0603_5%

1 2

R514 0_0603_5%R514 0_0603_5%

1 2

PJDLC05C_SOT23-3

DMIC_CLK DMIC_CLK _R

R6

0_0603_5%

DMIC_DATA

@

C763

C763 1000P_0402_50V7K

1000P_0402_50V7K

@

C8100P_0402_50V8J

1 2

+5VAMP

S

D

1 3

0_0603_5%

12

R10

R671

R671 10K_0402_5%

10K_0402_5%

DMIC_CLK_R

1 2

G

2

DMIC_DATA_R

@

12

R217

R217 100K_0402_5%

100K_0402_5%

SPDIF_PLUG#

2

3

D10

1

2

3

1

+5VAMP

R216

R216 100K_0402_5%

100K_0402_5%

1 2 61

Q26A

2

2N7002DW-T/R7_SOT363-6

SPK_L+ SPK_LSPK_R+

SPK_R-

2

3

1

+3VS

MBK1608121YZF_0603

D1

@

PJDLC05C_SOT23-3

<EMI>

5

1000P_0402_50V7K

Int. Speaker Conn.

SJM

D33

D33 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

L1

1 2

+3VS_DMIC DMIC_CLK_R DMIC_DATA_R

3

Q26B

Q26B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

4

C6

12

HP_PLUG#

@

+3VS_DMIC

JSPK1

SPK_L+

1

SPK_L-

2

3

G1

4

G2

ACES_88266-02001

CONN@

Place D38 near JSPK1

JSPK2

SPK_R+

1 2

3 4

JDMIC1

1 2

5

3

G1

6

4

G2

CONN@

R7

@

12

10K_0402_5%

<EMI>

HP_PLUG# <42>

1 2

G1 G2

ACES_88266-02001

CONN@

DMIC_CLK

SPK_R-

Place D37 near JSPK2

1 2 3 4

ACES_88266-04001

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2010/09/28 2011/09/28

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Amplifier & Audio Jack

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

E

43 55

0.1

5

+1.5V+5VALW +1.05V_USB 3

1U_0603_10V6K

10U_0603_6.3V6M

C341

C342

12

+5VALW

Vout=0.8(1+10K/32.4K)

D D

1.042 ~ 1.0469 ~ 1.0519V Spec: 0.9975 ~ 1.05 ~ 1.1025

+1.5V to +1.05V Transfer

+5VALW

+1.5V

SYSON<39,46,51>

R233 5.1K_0402_1%R233 5.1K_0402_1%

SYSON

12

U15

6

VCNTL

5

VOUT

VIN

9

VOUT

VIN

8

EN

7

POK

GND

APL5930KAI-TRG_SO8

1

3 4

R275

1 2

2

FB

10K_0402_1%

12

R277

32.4K_0402_1%

+3VALW to +3V Transfer

+3VALW

SYSON#<37,46>

C C

Q50

SSM3K7002FU_SC70-3

USB30_CLKREQ#<15>

B B

A A

Q50

SMIB<19>

DMN66D0LDW-7_SOT363-6

100_0402_5%

Y1

1 2

24MHZ_12PF_X5H024000DC1H

12

C391

15P_0402_50V8J

U40

1

GND

2

VIN VIN3VOUT

4

EN

C766

C766 .1U_0402_16V7K

.1U_0402_16V7K

1 2

+3V_USB3

+3VS

G

S

R255

G

1 2

123

D

DMN66D0LDW-7_SOT363-6

+3V_USB3

2

6

Q69A

USB3_XT1

USB3_XT2

12

Place as close as possibile to U3.N14 and U3.M14

12

C371

15P_0402_50V8J

EPAD

9

R509

R509 10K_0402_5%

10K_0402_5%

CLKREQ_USB3

Pin compare table for support USB remote wakeup or not

CSEL(Pin P6)

Tied to GND

pull high to VDD33

5

Support USB remote wakeup Not support USB remote wakeup

AUXDET(Pin J2)

pull high 10k to VDD33

Tied to GND

+3V_USB3

8

VOUT

7

VOUT

6 5

FLG

AP2301MPG-13_MSOP8

PCIE_PRX_DTX_P4<15> PCIE_PRX_DTX_N4<15>

PCIE_PTX_C_DRX_P4<15> PCIE_PTX_C_DRX_N4<15>

+3V_USB3

3

Q69B

10K_0402_5%

1

@

4

R734

SMI

5

12

SMI#

CLK

Must use 24MHz crystal: mount Y1,R19,C40,C41

Can use either 48MHz or 24MHz When use 48MHz clock: mount R22,R25

C359 .1U_0402_16V 7KC359 .1U_0402_16V 7K

1 2

C364 .1U_0402_16V 7KC364 .1U_0402_16V 7K

1 2

PLT_RST#<5,18,35,38,39>

PCH_PCIE_WAKE#<16,35,36>

+3V_USB3

R280 10K_0402_5%R 280 10K_0402_5%

1SS355_SOD323-2

4

Close to U3.D7 Close to U3.P13

10U_0603_6.3V6M

C403

12

CLK_PCIE_USB30<15> CLK_PCIE_USB30#<15>

R239 0_0402_5%R239 0_0402_5%

1 2

R265 0_0402_5%R265 0_0402_5%

1 2

R251 10K_0402_1%R 251 10K_0402_1%

1 2

R257@ 100_0402_1%R257@ 100_0402_1%

1 2

R247 10K_0402_5%R 247 10K_0402_5%

1 2

R244 0_0402_5%

1 2

SMI#

R269 0_0402_5%

@

R269 0_0402_5%

@

1 2

2

112

D14

12

+3V_USB3

4

+3VA_USB3 +3VA_US B3

C690

.1U_0402_16V7K

C690

C719

.1U_0402_16V7K

C719

.1U_0402_16V7K

C698

0.01U_0402_16V7K

C698

0.01U_0402_16V7K

8P_0402_50V8D

@

C720

12

USB3_XT1 USB3_XT2

SMI_RSMI SMIB_R

C720

12

B2 B1

D2 D1

F2 F1

H2

K1 K2

J2 J1

H1

P4

P5

M2 N2 N1 M1

K13 K14

J13

C14

N14

M14

P6

A1 A2 A3 A4 A5 A7

A9 A11 A13 A14

B3

B4

B5

B7

B9 B11 B13 B14

C1 C2

C3 C10 C11

12

PCIE_PRX_C_DTX_P4 PCIE_PRX_C_DTX_N4

CLKREQ_USB3

SPI_CLK_USB

1U_0603_10V6K

SPI_CS_USB#

C404

USB_SO_SPI_SI USB_SI_SPI_SO

R282

0_0402_5%

R282

0_0402_5%

R281@0_0402_5%

1 2

P/N: SA000048H10 (S IC UPD720200AF1-DAP-A FBGA 176P USB3.0 )

.1U_0402_16V7K

C691

0.01U_0402_16V7K

C691

0.01U_0402_16V7K

8P_0402_50V8D

@

C689

12

+3V_USB3

U14

D10

F13

F14

VDD33

PECLKP PECLKN

PETXP PETXN

PERXP PERXN

PERSTB PEWAKEB PECREQB

AUXDET PSEL SMI SMIB

PONRSTB

SPISCK SPISCB SPISI SPISO

GND GND GND

GND

XT1 XT2

CSEL

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

PCI Express/ExpressCard select signal 1:others 0:Express Card or Mini card

GND

GNDD3GNDD4GND

C12

C13

D11

C689

12

+1.05V_USB3

L10

L13

L14

VDD33

GND

GNDE1GNDE2GND

GND

E13

E14

D12

D13

D14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.05VR+3V_USB3

C696 0.01U_0402_16V7KC696 0.01U_0402_16V7K

C722 0.01U_0402_16V7KC722 0.01U_0402_16V7K

C726 0.01U_0402_16V7KC726 0.01U_0402_16V7K

C708 .1U_0402_16V7KC708 .1U_0402_16V7K

12

7K for customer request, can use other kind of capacitor, like Y5V.

R278

0_0805_5%

1 2

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

C717 0.01U_0402_16V7KC717 0.01U_0402_16V7K

12

C712 0.01U_0402_16V7KC712 0.01U_0402_16V7K

12

+1.05VR

C715 0.01U_0402_16V7KC715 0.01U_0402_16V7K

C700 0.01U_0402_16V7KC700 0.01U_0402_16V7K

12

E11

E12

VDD10

Can be attach to EC, either.

As short as possible

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

GNDH6GND

GNDF4GNDF6GNDF7GNDF8GNDF9GND

F11

3

GND

F12

G9

G11

G12

2010/09/28

GNDH7GNDH8GNDH9GND

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

H12

G13

Compal Secret Data

C706 0.01U_0402_16V7KC706 0.01U_0402_16V7K

C697 0.01U_0402_16V7KC697 0.01U_0402_16V7K

12

H11

VDD10H3VDD10H4VDD10L5VDD10

GND

J11

J12

Deciphered Date

C710 0.01U_0402_16V7KC710 0.01U_0402_16V7K12C713 .1U_0402_16V7KC713 .1U_0402_16V7K

C695 0.01U_0402_16V7KC695 0.01U_0402_16V7K

12

+3VA_USB3

K11

K12

L8

D7

P13

VDD10

U3AVDO33

U3TXDP2

U3TXDN2

U2DM2

U2DP2

U3RXDP2

U3RXDN2

OCI2B OCI1B

PPON2 PPON1

U3TXDP1

U3TXDN1

U2DM1

U2DP1

U3RXDP1

U3RXDN1

RREF

GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GNDK3GNDK4GNDL1GNDL2GNDL3GND

L4

UPD720200AF1-DAP-A_FBGA176

2

C714 .1U_0402_16V7KC714 .1U_0402_16V7K

C711 .1U_0402_16V7KC711 .1U_0402_16V7K

12

+3V_USB3

L41

BLM18AG601SN1D_2P

1 2

10U_0805_6.3V6M

U2AVDD10

B6

A6 N8

P8 B8

A8

G14 H13

H14 J14

B10

A10 N10

P10 B12

A12

P12 N12

N11

D6

P14 P11 P9 P7 P2 P1 N13 N9 N7 N3 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 L12 L11 L7 L6

2

OCI2B OCI1B

U2DN1_L

U2DP1_L U3RXDP1_L

U3RXDN1_L

2011/09/28

R240 10K_0402_5%R 240 10K_0402_5% R494 10K_0402_5%R 494 10K_0402_5%

1 2

C360 .1U_0402_16V7KC360 .1U_0402_16V7K

1 2

C358 .1U_0402_16V7KC358 .1U_0402_16V7K

R283

1.6K_0402_1%

12

+3V_USB3 +3V_U SB3 +3V_USB3

1 2

+3VA_USB3

12

C727

+3V_USB3

1 2 1 2

OCI1B <45>

U3TXDP1_LU3TX_C_DP1

U3TXDN1_LU3T X_C_DN1

U3RXDP1_L <45>

U3RXDN1_L <45>

U3TXDP1_L <45>

U3TXDN1_L <45> U2DN1_L <45>

U2DP1_L <45>

R718.1 should close to N12

R486

10K_0402_5%

R486

10K_0402_5%

12

C687

C687 .1U_0402_16V7K

.1U_0402_16V7K

SPI_CLK_USB USB_SO_SPI_SI

Title

Size Document Number Rev

Date: Sheet of

10K_0402_5%

U37

8 7 6 5

USB3.0 PD720200

P4LS0 M/B LA-7241P Schematic

CS#

VCC

SO

NC SCLK

WP#

SI

GND

MX25L5121EMC-20G_SO8

Thursday, December 23, 2010

R508

1

R507@

47K_0402_5%

1 2

SPI_CS_USB#

1

USB_SI_SPI_SO

2 3 4

0.1Custom

44

1

44

0.1Custom

55

USB_CHARGE_CB<39>

From EC

+USB3_VCCA

USB Host Charger

R516

R516 10K_0402_5%

10K_0402_5%

1 2

U2DN1_L<44> U2DP1_L<44>

R292 0_0402_5%R292 0_0402_5%

1 2

VL

R595 0_0402_5%

1 2

@

C415

CB=0

CB=1 Connect DP/DM to TDP/TDM

U39

8

U2DN1_L SW_U2DN1_L

1

2

CB

7

TDM

6

TDP

5

VCC

MAX14566EETA+_TDFN-EP8_2X 2

0.1U_0402_16V4Z

CEN

GND GND

1 2

DM

SW_U2DP1_LU2DP1_L

3

DP

4 9

Auto detection charger identification active

+USB3_VCCA

150U_D_10VM_R40M

12

+

C716

For ESD request

10U_0805_6.3V6M

C707

1

@

C737

1 2

C737

2

U3RXDN1_L<44>

U3RXDP1_L<44>

U3TXDN1_L<44>

U3TXDP1_L<44>

U3RXDN1_L U3RXDN1

U3RXDP1_L U3RXDP1

U3TXDN1_L

U3TXDP1_L

SW_U2DP1_L

SW_U2DN1_L

L22

3 4

OCE2012120YZF_4P

L21

3 4

OCE2012120YZF_4P

L40

3

2

WCM2012F2S-900T04_0805

4

1

12

U3TXDN1

12

U3TXDP1

U2DP1

4

U2DN1

1

U3RXDN1 U3RXDN1

U3RXDP1 U3RXDP1

U3TXDN1 U3TXDN 1

U3TXDP1 U3TXDP1

+USB3_VCCA

470P_0402_50V7K

For EMI request

470P_0402_50V7K

10U_0805_6.3V6M

D15

@

1

2

4

5

3

8

YSCLAMP0524P_SLP2510P8-10-9

PJUSB208H_SOT23-6

10

9

8

9

7

65

6

D34

@ D34

@

I/O4

REF2

I/O3

REF1

1

I/O1

2

3

I/O2

6

5

4

U2DN1U2DP1

Stuff diodes to gate backflow from EC or PPON1.

USB_CHARGE_2A#<39>

C416

@C416

@

1U_0603_10V4Z

12

R286

@R286

@

USB_CHARGE_100MA<39>

1 2

10K_0402_5%

FAN1 Conn

+VCC_FAN1

12

+3VS

12

R386

R386 10K_0402_5%

10K_0402_5%

12

C507

C507 1000P_0402_50V7K

1000P_0402_50V7K

40mil

+VCC_FAN1

FANPWM<39>

FAN_SPEED1<39>

R387 0_0603_5%R387 0_0603_5%

C508

C508 10U_0805_10V4Z

10U_0805_10V4Z

1 2

C699

.1U_0402_16V7K

1 2

R485 10K_0402_5%R485 10K_0402_5%

1 2

VL

5

VIN

4

ON

TPS22945DCKR_SC70-5

100mA MAX

+5VS+5VS

12

D23@

1SS355_SOD323-2

1 2

C510

10U_0805_10V4Z

1 2

C509

1000P_0402_50V7K

1 2

E&T_3801-Q04N-01R

+5VALW

+USB3_VCCA

U17

@

VOUT

GND

OC

D25@

BAS16_SOT23-3

JFAN2

4

3

2

1

CONN@

U36

1

GND

2

VIN VIN3VOUT

4

EN

9

Oper Drain, Low Active

1

2

3

EN_FAN2<3 9>

+USB3_VCCA

8

VOUT

7

VOUT

6 5

FLG

EPAD

AP2301MPG-13_MSOP8

+VCC_FAN2

R331 300_0402_5%

W=60mils

R484

10K_0402_5%

1 2

12

FAN_SPEED2<39>

OCI1B

+5VS

1

C439

0.1U_0402_16V4Z

2

1 2 3 4

OCI1B <44>

FAN2 Conn

C398 10U _0805_10V4Z

1 2

U22

EN VIN VOUT VSET

APL5607KI-TRG_SO8

GND GND GND GND

+3VS

12

R327

R327 10K_0402_5%

10K_0402_5%

1

C441

C441 1000P_0402_50V7K

1000P_0402_50V7K

2

8 7 6 5

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

40mil

+VCC_FAN2

Issued Date

+5VS

12

D16

D16 1SS355_SOD323-2

1SS355_SOD323-2

@

1 2

10U_0805_10V4Z

1000P_0402_50V7K

D17

@

BAS16_SOT23-3

BAS16_SOT23-3 C431

C431

1 2

C435

1 2

JFAN1

1 2 3 4 5

ACES_50271-0030N-001

CONN@

1 2 3 G1 G2

H4

H21

H_6P0

H_3P0

@

1

H11

H6

H_4P2

@

1

FD2

@

1

FIDUCIAL_C40M80

Compal Secret Data

Deciphered Date

U3TXDP1

U3TXDN1 U2DN1

U2DP1 U3RXDP1 U3RXDN1

H16

H_3P0

@

1

H12

H_4P2

@

1

FD1

1

FIDUCIAL_C40M80

+USB3_VCCA

H20

H_3P0

@

H5

H_4P2

@

2011/09/282010/09/28

USB3.0 Connector

JUSB5

9

SSTX+

1

VBUS

8

SSTX-

2

D-

7 3 6 4 5

H9

H_3P0

@

1

@

1

FD4

1

FIDUCIAL_C40M80

GND D+ SSRX+ GND SSRX-

OCTEK_USB-09EAEB

CONN@

@

10

GND

11

GND

12

GND

13

GND

H2

H_3P0

@

1

H7

H13

H_4P0

@

1

FD3

@

1

FIDUCIAL_C40M80

Title

Size Document Number Rev

Custom

Date: Sheet of

For customer request

GND_Frame

1 2

R267 0_0603_5%R267 0_0603_5%

1 2

R356 0_0603_5%R356 0_0603_5%

1 2

C386

.1U_0402_16V7K

H19

H10

H_3P0

@

1

H14

H15

H18

H_3P2

H18

H_3P2

@

1

H_3P4

@

1

add 2 stand off

H17

H_3P2x3p7N

Compal Electronics, Inc.

FAN & Screw Hole

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

H8

H_3P0N

@

1

@

1

0.1

5545

A

B

C

D

E

+5VALW TO +5VS

+5VALW

Q23

Q23 SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8 7 6

C335

10U_0805_10V4Z

C335

10U_0805_10V4Z

12

1 1

20mil

+VSB

R194

R194 100K_0402_5%

100K_0402_5%

C384

10U_0805_10V4Z

C384

10U_0805_10V4Z

12

2 2

20mil

+VSB

DMN66D0LDW-7_SOT363-6

1211 EMI ADD 0.1U close PJ5

C361

10U_0805_10V4Z

C361

10U_0805_10V4Z

12

3 3

20mil

+0.75VS

12

R359

R359 22_0603_5%

22_0603_5%

4 4

13

D

2

G

Q41

S

2N7002E_SOT23-3

2009/08/14 CP_S3PowerReduction WhitePaper_Rev0.9

0.75VS speed up discharge

A

5

C340

10U_0805_10V4Z

C340

10U_0805_10V4Z

12

SUSP

+3VALW

C385

10U_0805_10V4Z

C385

10U_0805_10V4Z

R301

200K_0402_5%

SUSP

12

8 7 6 5

Q34B

4

10mil

5VS_GATE

6

Q18A

2

DMN66D0LDW-7_SOT363-6

1

Q33

Q33 SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

4

10mil

3VS_GATE

12

3

5

4

+1.5V to +1.5VS

+1.5V

8 7

C310

0.1U_0402_16V4Z

C310

0.1U_0402_16V4Z

C308

0.1U_0402_16V4Z

C308

0.1U_0402_16V4Z

C343

10U_0805_10V4Z

C343

10U_0805_10V4Z

12

+VSB

DMN66D0LDW-7_SOT363-6

ACIN<16,39,48>

SUSP SUSP

R218

R218 750K_0402_5%

750K_0402_5%

SUSP

+1.05VS_VCCP

R254

R254 470_0603_5%

470_0603_5%

1 2 13

D

Q30

S

2N7002E_SOT23-3

Q25B

G

6 5

12

5

ACIN

2

Q24

Q24 AO4430L_SO8

AO4430L_SO8

10mil

1 2 3

3

4

+5VS

12

C299

0.1U_0603_25V7K

+3VS

12

C427

0.1U_0603_25V7K

4

1.5VS_GATE

12

13

D

2

G

S

C278

10U_0805_10V4Z

C278

10U_0805_10V4Z

12

C437

10U_0805_10V4Z

C437

10U_0805_10V4Z

1 2 3

12

C320

R214@510K_0402_5%

0.1U_0603_25V7K

Q27

@

Q27

@

2N7002E_SOT23-3

+1.8VS

R232

R232 470_0603_5%

470_0603_5%

1 2 13

D

2

G

Q29

S

2N7002E_SOT23-3

C279

1U_0603_10V4Z

C279

1U_0603_10V4Z

R182

470_0603_5%

1 2

3

SUSP

5

Q18B

4

DMN66D0LDW-7_SOT363-6

C438

1U_0603_10V4Z

C438

1U_0603_10V4Z

12

+1.5VS

SUSP

R326

R326 470_0603_5%

470_0603_5%

1 2 6

2

Q34A

1

DMN66D0LDW-7_SOT363-6

C297

10U_0805_10V4Z

C297

10U_0805_10V4Z

12

DMN66D0LDW-7_SOT363-6

B

SUSP

C296

1U_0603_10V4Z

C296

1U_0603_10V4Z

Q25A

+1.5V

470_0603_5%

1 2 13

D

2N7002E_SOT23-3

S

@

1 2

6

1

R293@

2

G

Q31

R200

R200 470_0603_5%

470_0603_5%

SUSP

2

SYSON#

+3VALW TO +3VALW(PCH AUX Power)

C754

10U_0805_10V4Z

20mil

R581 200K_0402_5%R581 200K_0402_5%

+VSB

PCH_PWR_EN#

DMN66D0LDW-7_SOT363-6

Short J5 for PCH VCCSUS3.3

+3VALW

12

J2 @

112

JUMP_43X79

Q56

Q56 SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8 7 6 5

12

3

5

Q55B

4

10mil

2

3V_GATE

1 2 3

12

C756

0.1U_0603_25V7K

+1.05VS_VCCP to +1.05VSDGPU for GPU

+1.05VS_VCCP

Q13

Q13 AO4430L_SO8

AO4430L_SO8

8 7

12

OPT@

C249

10U_0805_10V4Z

20mil 10mil

+VSB

DMN66D0LDW-7_SOT363-6

R144OPT@

510K_0402_5%

VGA_ON#

Q12BOPT@

ACIN

6 5

OPT@

12

5

4

1.05VSDGPU_GATE

3

4

2

G

1 2 3

510K_0402_5%

12

@

R145

13

D

Q16

Q16 2N7002E_SOT23-3

2N7002E_SOT23-3

S

+1.05VSDGPU

12

C222

OPT@

0.1U_0603_25V7K

@

+1.5V to +1.5VSDGPU for GPU

OPT@

C640

10U_0805_10V4Z

20mil

+VSB

R147

R147 510K_0402_5%

510K_0402_5%

OPT@

DMN66D0LDW-7_SOT363-6

+1.5V

U32

U32 AO4430L_SO8

AO4430L_SO8

8 7 6 5

12

OPT@

4

10mil

1.5VSDGPU_GATE

12

3

@

4

2

G

Issued Date

@

C

VGA_ON#

5

Q11BOPT@

ACIN

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2 3

510K_0402_5%

12

R148

13

D

Q15

Q15 2N7002E_SOT23-3

2N7002E_SOT23-3

S

+1.5VSDGPU

12

C200

OPT@

0.1U_0603_25V7K

@

+3VALW_PCH

40mil

C761

10U_0805_10V4Z

C761

10U_0805_10V4Z

12

OPT@

C221

10U_0805_10V4Z

C221

10U_0805_10V4Z

12

OPT@

C620

10U_0805_10V4Z

C620

10U_0805_10V4Z

C760

1U_0603_10V4Z

C760

1U_0603_10V4Z

12

4A

12

OPT@

C223

1U_0603_10V4Z

C223

1U_0603_10V4Z

12

OPT@

C617

1U_0603_10V4Z

C617

1U_0603_10V4Z

Compal Secret Data

R592

470_0603_5%

1 2 6

PCH_PWR_EN#

2

Q55A

1

DMN66D0LDW-7_SOT363-6

R141

R141 470_0603_5%

470_0603_5%

OPT@

OPT@ 1 2 6

VGA_ON#

2

Q12AOPT@

1

DMN66D0LDW-7_SOT363-6

R118

470_0603_5%

OPT@

1 2

6

VGA_ON#

2

Q11A

OPT@

OPT@ 1

DMN66D0LDW-7_SOT363-6

Deciphered Date

100K_0402_5%

SUSP<5,53>

SUSP#<36,39,52,53>

10K_0402_5%

100K_0402_5%

SYSON#

SYSON

R551

SYSON#<37,44>

SYSON<39,44,51>

PCH_PWR_EN# <21> +5VALW

PCH_PWR_EN<39>

2009/08/17 add VGA_ON#

VGA_ON<15,18,26,55>

22K_0402_5%

Title

2011/09/282010/09/28

D

Title

Size Document Number Rev

Custom

Date: Sheet of

+5VALW

R544

R544 100K_0402_5%

100K_0402_5%

1 2

6

2

Q52A

12

R556

100K_0402_5%

PCH_PWR_EN#

R324

VGA_ON#

R197

OPT@

P4LS0 M/B LA-7241P Schematic

Thursday, December 23, 2010

Q52A

DMN66D0LDW-7_SOT363-6

1

R560

R560 100K_0402_5%

100K_0402_5%

1 2

SUSP

3

Q52B

Q52B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

5

12

4

+5VALW

R579

1 2

13

D

Q36

2

G

2N7002E_SOT23-3

G

12

2N7002E_SOT23-3

S

+5VALW

OPT@

R189

R189 100K_0402_5%

100K_0402_5%

1 2

13

D

Q21

OPT@

Q21

2

G

Compal Electronics, Inc.

OPT@

2N7002E_SOT23-3

S

DC Interface

E

0.1

5546

5

PJP1

1

2

3

D D

C C

4

5

6

ACES_88290-044G

2

BATT+

1

51ON#<40>

3

PD9

@PD9

@

PJSOT24CH_SOT23-3

PD2

LL4148_LL34-2

PR3

100K_0402_5%

PR4

22K_0402_5%

1 2

12

N1

12

PC5

0.22U_0603_25V7K

12

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

PJ26

@JUMP_43X39

112

TP0610K-T1-E3_SOT23-3

3

FBMA-L18-453215-900LMA90T_1812

12

2

PQ1

1

2

1 2

PC2

100P_0402_50V8J

PL1

PJ25

@JUMP_43X39

112

VIN

PD1

@

1 2

12

PR1

@

12

PC6

@

4

2

LL4148_LL34-2

68_1206_5%

0.1U_0603_25V7K

12

PC3

100P_0402_50V8J

12

PR2

68_1206_5%

@

68_1206_5%

@

VIN

12

VS

PC4

1000P_0402_50V7K

3

+3VALWP +3VALW

PC120

@

PC120

@

1000P_0402_50V7K

+5VALWP +5VALW

PC121

@

PC121

@

1000P_0402_50V7K

PC128

@

PC128

@

1000P_0402_50V7K

PC144

@

PC144

@

1000P_0402_50V7K

PC156

@

PC156

@

1000P_0402_50V7K

+1.5V

12

@ JUMP_43X118

12

@ JUMP_43X118

2

PJ1 @

2

112

JUMP_43X118

PJ3

2

112

@ JUMP_43X118

PJ5

2

112

PJ11

2

112

PJ13

2

112

1

+0.75VS

PC169

@

PC169

@

1000P_0402_50V7K

PC168

@

PC168

@

1000P_0402_50V7K

+1.8VS+1.8VSP

PC167

@

PC167

@

1000P_0402_50V7K

+VSBP

PC166

@

PC166

@

1000P_0402_50V7K

+1.05VS_VCCP+1.05VS_VCCPP

PC165

@

PC165

@

1000P_0402_50V7K

12

+VGA_CORE

12

+VGFX_CORE

12

PJ4

2

112

@ JUMP_43X118

PJ10

@JUMP_43X39

112

+VCCSA+VCCSAP

2

+VSB

PR5

0_0402_5%

PR11

560_0603_5%

1 2

0_0402_5%

1 2

560_0603_5%

1 2

PR12

+3VLP

+RTCBATT

+5VALW

PD3

12

PR8

1

3

Pre_chg

12

PR9

100K_0402_5%

PQ3

PQ3 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

LL4148_LL34-2

1

2

LL4148_LL34-2

PR6

VIN

ACOFF<39>

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

1K_1206_5%

1 2

0_0402_5%

PR15

4

PR6

PR7

PR10

PR13

PD20

2

12

3

BAS40CW_SOT323-3

PQ2

TP0610K-T1-E3_SOT23-3

3

100K_0402_5%

2

12

1

2

3

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

PR14

PR14 100K_0402_5%

100K_0402_5%

PQ4

PQ4 PDTC115EU_SOT323-3

PDTC115EU_SOT323-3

Issued Date

3

B+

2010/01/25

Compal Secret Data

Deciphered Date

2

2010/12/31

Compal Electronics, Inc.

Title

PWR DCIN / Pre-charge

Size Document Number Rev

Custom

LA-7221P

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

1

47

55

47

55

47

55

0.1

+CHGRTC

PBJ1 @

- +

B B

A A

ML1220T13RE

12

5

A

B

C

D

for reverse input protection

1

D

PQ5

2

G

SI1304BDL-T1-E3_SC70-3

S

PR16

1 2

1M_0402_5%

8 7 6 5

12

PC8

2200P_0402_50V 7K

3.3_1210 _5%

@

3.3_1210 _5%

@

3.3_1210 _5%

@

3.3_1210 _5%

@

1M_0402_5%

AO4466L_SO8

PQ6

4

VIN

12

PR26

12

PR27

12

PC20

@

1 1

2 2

3 3

PR17

1 2

3M_0402_5%

1 2 3

2.2U_080 5_25V6K

Vin Dectector

Min. Typ Max.

3

PJ6 @

2

112

JUMP_43X118

PL16 0.56UH_1127 AS-R56N_3.3A_3 0%PL16 0.56UH_ 1127AS-R56N_3 .3A_30%

1 2

12

PC119

10U_0805_25V6K

0.047U_0402_25V7 K

PC16

DH_CHG

18

HIDRV

12

PR25

BQ24725_BST

17

BTST

PC109

10U_0805_25V6K

0_0603_5%

12

PD6

PD6 RB751V-40_SOD323-2

RB751V-40_SOD323-2

PC19

1 2

1U_0603_25V6K

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

BATDRV

10

12

PR34

100K_0402_1%

SRN

12

PC10

PC11

10U_0805_25V6K

DH_CHG

DL_CHG

PR67

10_0603_5%

SRP

1 2

PR80

6.8_0603_5%

1 2

BQ24725_BATDRV

PR32

1 2

316K_0402_1%

PC29

0.01U_0402_25V7K

12

PC12

@

CSOP1

CSON1

+3VALW

12

0.1U_0402_25V6

CHG_B+

PC13

2200P_0402_50V 7K

5

4

5

4

12

PC28

BQ24725_BATDRV

PQ9

SIS412DN-T 1-GE3_POWE RPAK8-5

PL2

12

@

12

PL2

1 2

PR29

4.7_1206_5%

PC27

@

680P_0402_50V7 K

4.7UH +-20% FDSD0630-H-4R7M= P3 5.5A

123

BQ24725_LX CHG

PQ10

123

SIS412DN-T1-GE3_POWERPAK8-5

2.2U_0603_16V6K

1 2

PR21

4.12K_0603_1%

CSOP1

12

AO4466L_SO8

8 7 6 5

PR28

0.01_120 6_1%

1

2

PC23

0.1U_0402_25V6

PQ8

1 2 3

4

3

12

CSON1

12

PC25

0.1U_0402_25V6

@

12

PR20

PC14

PR20

0_0402_5%

0.01U_0402_50V7K

BATT+

12

PC22

PC21

10U_0805_25V6K

12

PC24

PC26

0.01U_0402_50V7K

2200P_0402_50V 7K

8 7 6 5

+3VALW

P2

0.02_251 2_1%

1

2

1 2

PC9

0.1U_0402_25V6

12

PC17

0.1U_0603_25V7K

BQ24725_CMSRC

BQ24725_ACDRV

PR30

1 2

10K_0402_1%

PR31

1 2

10K_0402_1%

PR33

VIN

1 2

255K_0402_1%

PR18

BQ24725_ACP

BQ24725_ACN

4

3

12

1U_0603_25V6K

21

Pre_chg

12

PR35

PC15

PC18

1 2

1

2

3

4

5

154K_0402_1%

12

VIN

2

3

PD5

PD5 BAS40CW_S OT323-3

BAS40CW_S OT323-3

1

0.1U_0402_25V6

PU1

PAD

ACN

ACP

CMSRC

ACDRV

ACOK

PD7

PD7 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

12

PR24

10_1206_1%

BQ24725_LX

19

20

VCC

PHASE

BQ24725RGRR_VQFN2 0_3P5X3P5

ACDET6IOUT7SDA8SCL9ILIM

P1 B+VIN

@

12

PR19

PC7

0_0402_5%

0.1U_0402_25V6

12

PR22

4.12K_0603_1%

PR23

1 2 3

4.12K_0603_1%

AO4466L_SO8

PQ7

4

ACIN<16,39,46>

H-->L 17.23V L--> H 17.63V

ILIM and external DPM

4 4

3.97A

12

PC30

PR36

0.1U_0402_25V6

66.5K_0402_1%

PC31

12

100P_0402_50V8 J

EC_SMB_CK1 <39,50 >

EC_SMB_DA1 <39,50 >

ADP_I <39,50>

Security Classification

2010/01/ 25

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS T HE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUST ODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2010/01/ 25

Compal Secret Data

Deciphered Date

C

2010/12/ 31

Compal Electronics, Inc.

Title

PWR DCIN / Pre-charge

Size Document Number Rev

Custom

LA-7221P

Date: Sheet of

Thursday, December 23 , 2010

Date: Sheet of

Thursday, December 23 , 2010

Date: Sheet of

Thursday, December 23 , 2010

D

48

55

0.1

5

4

3

2

1

2VREF_8205

D D

PR37

13K_040 2_1%

1 2

PR39

RT8205_B+

PL3

HCB4532 KF-800T90_181 2

B+

C C

B B

A A

1 2

PC33

VIN

0.1U_0603_25V7K

5

12

PC34

4.7U_0805_25V6-K

+3VALWP

LL4148_LL34-2

VS

12

PC36

PC35

4.7U_0805_25V6-K

PC44

220U_6.3 V_M

DMN66D0 LDW-7_SOT3 63-6

MAINPWON<40,50>

PD4

12

PR66

PR66 316K_04 02_1%

316K_04 02_1%

12

2200P_0402_50V7K

PL4

4.7UH +-20% FDSD0630-H-4R7M= P3 5.5A

1 2

PR45

@ PR45

D

S

PR50

PR50 0_0402_ 5%

0_0402_ 5%

12

@

4.7_1206_5%

PC45

@ PC45

@

680P_0402_50V7K

61

100K_04 02_1%

12

PR54

402K_0402_1%

1

+

2

PQ15A

VL

1M_0402 _1%

PR53

1 2

12

ENTRIP1

2

G

12

PC114

5

PQ11

4

SIS412DN-T 1-GE3_POWE RPAK8-5

123

5

4

123

PQ13

PQ13 SI7716ADN -T1-GE3_POW ERPAK8-5

SI7716ADN -T1-GE3_POW ERPAK8-5

5

G

PR51

12

13

PQ16

PQ16 PDTC115 EU_SOT323-3

PDTC115 EU_SOT323-3

2

4.7U_0603_6.3V6K

4

Typ: 175mA

PC41

4.7U_0805_10V6K

PD8

1 2

B+

RLZ5.1B_ LL34

ENTRIP2

34

D

PQ15B

DMN66D0 LDW-7_SOT3 63-6

S

+3VLP

12

PR43

1 2

0_0603_ 5%

PC42

0.1U_060 3_25V7K

3V5V EN<40>

PR48

499K_04 02_1%

1 2

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR47 0_0402_ 5%

0_0402_ 5%

12

PR49

100K_0402_1%

+3.3VALWP Ipeak=5.78A ; 1.2Ipeak=6.94A; Imax=4.05A f=375KHz, L=4.7UH Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-3)*(3/19)/(375KHz*4.7UH)=0.716A Vlimit=10*10^-6*110Kohm/10=0.11V Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A Iocp=7.06A~9.85AA (7.06A>6.94A -> ok) -DVT-

Issued Date

PR39

20K_040 2_1%

1 2

PR41

110K_04 02_1%

1 2

25

7

8

BST_3V

9

UG_3V

10

LX_3V

11

LG_3V

12

@PR47

@

12

PC48

1U_0603_10V6K

2VREF_8205

PU2

P PAD

VO2

VREG3

BOOT2

UGATE2

PHASE2

LGATE2

2010/07/ 13 2011/07/ 13

3

12

PC32

1U_0603_10V6K

ENTRIP2

5

6

FB2

ENTRIP2

VFB=2.0V

SKIPSEL

EN

14

13

RT8205_ B+

2

3

1

4

FB1

REF

TONSEL

15

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

12

PC49

12

4.7U_0805_10V6K

PC50

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

PR38

30K_040 2_1%

1 2

PR40

20K_040 2_1%

1 2

PR42

154K_04 02_1%

ENTRIP1

1 2

24

23

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

RT8205E GQW_W QFN24_4X4

VL

Typ: 175mA

PC37

4.7U_0805_25V6-K

PR44

0_0603_ 5%

1 2

RT8205_ B+

12

PC38

PC39

4.7U_0805_25V6-K

SPOK <50>

PC43

0.1U_060 3_25V7K

1 2

SI7716ADN -T1-GE3_POW ERPAK8-5

TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP) (2)SMPS2=375KHZ(+3VALWP)

+5VALWP Ipeak=7A ; 1.2Ipeak=8.4A; Imax=4.9A f=300KHz, L=4.7UH,Rentrip=154k ohm Rdson=15~18m ohm 1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A Vlimit=10*10^-6*154Kohm/10=0.15V Ilimit=0.15/(18m*1.2)~0.15/(15m)=7.13~10.26A Iocp=8.44~11.57A (8.44>8.4 -> OK)

2

12

PC40

0.1U_0603_25V7K

2200P_0402_50V7K

Title

Size Docu ment Number Rev

Custom

Date: Sheet of

5

PQ12

4

SIS412DN-T 1-GE3_POWE RPAK8-5

123

4.7UH +-20% FDSD0630-H-4R7M= P3 5.5A

PQ14

4.7UH +-20% FDSD0630-H-4R7M= P3 5.5A

5

4

123

12

PR46

@ PR46

@

12

PC47

@ PC47

@

PL5

1 2

4.7_1206_5%

680P_0402_50V7K

Compal Electronics, Inc.

3VALWP/5VALWP

LA-7221P

1

49 55Thursday, December 23 , 2010

1

+

2

+5VALWP

PC46 220U_6.3V_M

0.1

5

4

3

2

1

D D

C C

B B

ACES_50299-01001-001

10

9

8

EC_SMDA

7

EC_SMCA

6

TH

5

BI+

4

3

2

1

PJP2

PR69

100K_0402_1%

SPOK<49>

<40,41>

VMB

VL

1 2

PL6

FBMA-L18-453215-900LMA90T_1812

1 2

12

PC53

PC53 1000P_0402_50V7K

1000P_0402_50V7K

PR71

PR71 1K_0402_5%

1K_0402_5%

1 2

12

2

G

PC58

1U_0402_6.3V6K

<40,41>

BATT+

PC54

0.01U_0402_25V7K

B+

PR68

22K_0402_1%

1 2

1

D

PQ20

2N7002W-T/R7_SOT323-3G

2N7002W-T/R7_SOT323-3

S

3

PR55

PR55 100_0402_1%

100_0402_1%

1 2

12

EC_SMB_DA1 <39,48>

EC_SMB_CK1 <39,48>

+3VALW

PC52

0.1U_0603_25V7K

VL

12

PR57

PR57 1K_0402_5%

1K_0402_5%

100_0402_1%

6.49K_0402_1%

12

PR62

PR62 1K_0402_1%

1K_0402_1%

PR56

PR60

MAINPWON<40,49>

BATT_TEMP <39>

BI<40>

PQ19

TP0610K-T1-E3_SOT23-3

3

12

PR65

PC55

100K_0402_1%

0.22U_0603_25V7K

1

2

12

PC56

0.1U_0603_25V7K

+VSBP

+3VS

H_PROCHOT#<5,39>

@

PQ22

2N7002W-T/R7_SOT323-3@G

2N7002W-T/R7_SOT323-3

PQ22

PR75

@ PR75

@

0_0402_5%

1 2

13

D

2

G

S

100K_0402_1%

PR76

12

PH1 under CPU botten side :

CPU thermal protection at 92 degree C

Recovery at 72 degree C

PR58

10K_0402_1%

+3VALW

10K_0402_1%

8

7

6

5

@

PR64

47K_0402_1%

PH2

12

PR73

PR73 10K_0402_1%

10K_0402_1%

1 2

PR77

16.2K_0402_1%

PR77

65W@ PR77

65W@

28.7K_0402_1%

90W@PR77

90W@

PR61@

100K_0402_1%

VL

1 2

PR70

0_0402_5%

1 2

12

PC57

@ PC57

@

0.1U_0603_25V7K

PU4

1

VCC

TMSNS1

2

GND

RHYST1

3

OT1

TMSNS2

4

RHYST2

OT2

G718TM1U_SOT23-8

PU3

1

VCC

TMSNS1

2

GND

RHYST1

3

~OT1

TMSNS2

~OT24RHYST2

G718TM1U_SOT23-8

100K_0402_1%_NCP15WF104F03R C

@

100K_0402_1%_NCP15WF104F03R C

@

8

7

6

5

1 2

9.53K_0402_1%

12

65W@ PR79

65W@

5.62K_0402_1%

12

PR79

8.87K_0402_1%

12

PR63

PR79

90W@PR79

90W@

PR78

PR78 10K_0402_1%

10K_0402_1%

12

PR59

PR59 21K_0402_1%

21K_0402_1%

12

PH1

100K_0402_1%_NCP15WF104F03R C

12

@

PR72

7.15K_0402_1%

13

D

2

G

S

@

PQ21

PQ21 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

ADP_I <39,48>

65W/90W# <39>

For 65W adapter==>action 70W , Recovery 54W

A A

5

4

For 90W adapter==>action 97W , Recovery 75W

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/01/25

Compal Secret Data

Deciphered Date

2

2010/12/31

Compal Electronics, Inc.

Title

PWR-BATTERY CONN/OTP

Size Document Number Rev

Custom

LA-7221P

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

Date: Sheet of

Thursday, December 23, 2010

1

55

50

55

50

55

50

0.1

A

PR82

0_0402_5%

1 1

SYSON<39,44,46>

+5VALW

<Vo=1.5V> VFB=0.75V V=0.75*(1+10K/10K)=1.5V Fsw=298KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=19.53A, Imax=23.44A, Iocp=13.67A

2 2

Delta I=((19-1.5)*(1.5/19))/(L*Fsw)=4.63A =>1/2Delta I=2.315A choose Rcs=15K Iocpmax=((15K*11uA)/0.0045)+2.315A=35.65A Iocpmin=((15K*9uA)/(0.0056*1.3))+2.315A=23.06A Iocp=23.06A~35.65A

1 2

PR84

@ PR84

@

47K_0402_5%

PR86

100_0603_5%

1 2

4.7U_0603_6.3V6K

1 2

PC68

12

@

PC64

.1U_0402_16V7K

12

1 2

12

PR89

PR89 10K_0402_1%

10K_0402_1%

PR88

10K_0402_1%

B

PR81

267K_0402_1%

1 2

C

FBMA-L11-201209-121LM A50T_0805

1.5_8209_B+

786

5

PQ23

PR235

0_0603_5%

1 2

PR83

1

PU5

2

TON

3

VOUT

4

VDD

5

FB

6

PGOOD

14NC15

BOOT

UGATE

EN/DEM

PHASE

VFB=0.75V

VDDP

LGATE

GND7PGND

RT8209MGQW _WQFN14_3P5X3P5

8

13

12

11

CS

10

9

BST_1.5V

DH_1.5V

LX_1.5V

DL_1.5V

2.2_0603_5%

1 2

12

PR87

PR83

2.2_0603_5%

BST_1.5V-1

15K_0402_1%

PC63

0.1U_0603_25V7K

1 2

+5VALW

12

PC66

4.7U_0805_10V6K

PQ23

4

AO4406AL_SO8

123

578

PQ24

3 6

241

AO4456_SO8

12

PC59

PC60

0.1U_0603_25V7K

2200P_0402_50V7K

PL7

1UH_FDUE1040D-1R0M -P3_21.3A_20%

12

PR85

4.7_1206_5%

12

PC67

680P_0402_50V7K

PL7

1 2

FBMA-L11-201209-121LM A50T_0805

12

PC62

PC61

4.7U_0805_25V6-K

D

PL18

1 2

1

+

PC65

PC65 330U_D2E_2.5VM

330U_D2E_2.5VM

2

B+

+1.5V

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSE NT OF COMPAL ELECTRONICS, INC.

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

PWR-+1.5VP

LA-7221P

51 55Thursday, December 23, 2010

D

51 55Thursday, December 23, 2010

0.1

5

PJ17

+3VALW

D D

C C

B B

+3VALW

VCCPPWRGOOD<53>

2

112

JUMP_43X118@

SUSP#<36,39,46,53>

PJ18

2

112

JUMP_43X118@

PR99 100K_0402_5%PR 99 100K_0402_5%

PR92 510K_0402_5%PR 92 510K_0402_5%

12

PC76

PC76 22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

12

PC69

PC69 22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

1M_0402_5%

PR104

PR94

@ PR94

@

1M_0402_5%

1 2

EN_VCCSAP

12

PC79

EN_1.8V

12

PC73

PU7

10

PVIN

9

PVIN

8

SVIN

5

EN

0.1U_0402_10V7K

PU6

10

PVIN

9

PVIN

8

SVIN

5

EN

TP

11

0.1U_0402_10V7K

+3VS

PR103

1 2

0_0402_5%

10K_0402_5%

PR105

4

LX

PG

LX

FB

TP

NC

7

1

11

SY8033BDBC_DFN10_3X3

4

2

LX

PG

3

LX

6

FB

NC

7

1

SY8033BDBC_DFN10_3X3

SA_PGOOD < 39>

12

LX_VCCSAP

2

3

FB_VCCSAP

6

LX_1.8V

FB_1.8V

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

12

PR97

4.7_1206_5%

FB=0.6Volt

12

PC77

680P_0603_50V7K

PL8

2.2UH_MMD-06AH-2R2M-X2A_6A_20%

1 2

12

PL9

1 2

10K_0402_1%

PR90

4.7_1206_5%

FB=0.6Volt

PC74

680P_0603_50V7K

PC75

PR95

20K_0402_1%

10K_0402_1%

12

68P_0402_50V8J

PR91

PR93

1 2

3.4K_0402_1%

12

PR100

12

D

S

12

PC70

68P_0402_50V8J

PR101

PR101 0_0402_5%

0_0402_5%

1 2

12

PR108

20K_0402_1%

13

2

G

PQ27

PQ27 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

3

12

PC71

PR107

10_0402_5%

22U_0805_6.3VAM

12

PC72

22U_0805_6.3VAM

12

PR111

PR111 10K_0402_5%

10K_0402_5%

12

PC85

@ PC85

@

4700P_0402_25V7K

1.8VSP Ipeak=3.35A ; 1.2Ipeak=4.02 ;Imax=2.345A Vout=0.6*(1+(20K/10K))=1.8V

+1.8VSP

+VCCSAP

12

PC82

22U_0805_6.3VAM

+3VS

12

PC83

22U_0805_6.3VAM

@

PR109

PR109 10K_0402_5%

10K_0402_5%

PR112

@PR112

@

100K_0402_5%

12

PC84

PR102

22U_0805_6.3VAM

@

1 2

0_0402_5%

PQ28

PQ28 PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

1

2

3

12

PC78

22U_0805_6.3VAM

12

2

VSSSA_SENSE <9>

VCCSA_SENSE <9>

PR113 100K_0402_5%PR113 100K_0402_5%

12

@ PR114

@

10K_0402_5%

PR114

1

VCCSA_VID1 <9>

VID[0] VID[1 ] VCCSA Vout Require on 2011/ 2012 Required 0 0 0.9 V Yes/Yes 0 1 0.8 V Yes/Yes 1 1 0.75V No/Yes

A A

5

1 1 0.65V No/Yes

Note:Use VCCSA_SEL to switch H igh & Low Level for VID[1] (ie. VCCSA_SEL) due to the VID [0] is don't care for this setti ng.

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTR ONICS, INC. AND CONTAINS CONF IDENTIAL AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D

AND TRADE SECRET INFORMATI ON. THIS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETENT D IVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY C OMPAL ELECTRONICS, INC. NEITHER T HIS SHEET NOR THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2010/07/13 2011/07/13

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

PWR +VCCSAP

Size Document Number Rev

C

LA-7221P

Date: Sheet of

1

52 55Thursday, December 23, 2010

0.1

5

D D

100K_04 02_1%

12

1 2

1U_0402 _6.3V6K

12

4.7U_060 3_6.3V6K

12

SUSP<5,46>

C C

PR119

680K_04 02_5%

SUSP#<36,39,46,52>

B B

1 2

PQ46

2N7002W -T/R7_SOT32 3-3

PQ46

SUSP

+5VALW

4.7U_060 3_6.3V6K

47K_040 2_5%

13

D

2

G

S

PR124

100_060 3_5%

1 2

@P R120

@

PC100

PR120

4

PR116

PC89

PC95

PR126

4.02K_04 02_1%

1 2

PR127

10K_040 2_1%

+1.5V

2

G

12

PR118

267K_04 02_1%

1 2

4.7U_080 5_6.3V6K

13

D

2N7002W -T/R7_SOT32 3-3

TON

VOUT

VDD

FB

PGOOD

SUSP

1

EN/DEM

VFB=0.75V

GND7PGND

PR129

1 2

10K_040 2_1%

S

PQ29

PQ29 2N7002W -T/R7_SOT32 3-3

2N7002W -T/R7_SOT32 3-3

PU9

2

3

4

5

6

PC86

PQ30

2

G

14NC15

BOOT UGATE

PHASE

VDDP

LGATE

RT8209M GQW_W QFN14_3P5X3P 5

8

+3VALW

1 2

13

D

S

CS

PR115

1K_0402 _1%

PR117

1K_0402 _1%

BST_1.05 VS_VCCP

DH_1.05V S_VCCP

13

LX_1.05V S_VCCP

12

11

10

DL_1.05V S_VCCP

9

3

PU8

VIN1VCNTL

2

12

PC88

.1U_0402_16V7K

PR121

0_0603_ 5%

1 2

GND

3

VREF

4

VOUT

G2992F1 U_SO8

+0.75VS

12

PC90

PC90 10U_060 3_6.3V6M

10U_060 3_6.3V6M

PC96

0.1U_060 3_25V7K

1 2

NC

TP

6

5

7

8

9

AO4406A L_SO8

+5VALW

12

PC99

4.7U_080 5_10V6K

PR125

15K_0402_1%

4.7U_080 5_10V6K

AO4456_ SO8

PQ31

PQ32

2

12

PC87

PC87 1U_0603 _10V6K

1U_0603 _10V6K

1.05VS_5 1117_B+

5

4

578

3 6

10_0402 _5%

+3VALW

786

123

241

PR128

12

PC91

PC92

PC93

0.1U_0603_25V7K

4.7U_0805_25V6-K

PL10

0_0402_ 5%

4.7U_0805_25V6-K

12

PR123

2200P_0402_50V7K

1UH_FDU E1040D-1R0M-P3 _21.3A_20%

12

PR122

@P R122

@

4.7_1206 _5%

12

PC98

@P C98

@

680P_04 02_50V7K

VCCIO_SEN SE <8>VCCPPW RGOOD<5 2>

1

PJ19

2

112

JUMP_43 X118@

12

PC94

4.7U_0805_25V6-K

B+

+1.05VS_VCCPP

1

+

PC97

PC97 330U_2.5 V_M

330U_2.5 V_M

2

PR145

0_0402_ 5%

1 2

12

VSSIO_SEN SE <8>

PR130

@PR130

@

10K_040 2_1%

<Vo=1.05V> VFB=0.75V V=0.75*(1+4.02K/10K)=1.052V Fsw=298KHz

Cout ESR=15m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm. Ipeak=12.866A, Imax=9A, Iocp=15.439A Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.33A

A A

=>1/2Delta I=1.665A choose Rcs=15K Iocpmax=((15K*11uA)/0.0045)+1.665A=37.62A Iocpmin=((15K*9uA)/(0.0056*1.3))+1.665A=23.02A Iocp=23.02A~37.62A

5

4

1 2

Security Class ification

2010/07/ 13 2011/07/ 13

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/07/ 13 2011/07/ 13

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWR +1.05VS_VCCPP/+0.75VSP

Size Docu ment Number Rev

Custom

LA-7221P

Date: Sheet of

2

Date: Sheet of

53 55Thursday, December 23 , 2010

1

0.1

5

4

3

2

1

12

PR153

1K_0402_ 1%@

12

GFX@ PC112

GFX@

150P_0402_50V8J

D D

VR_HOT#<39>

C C

PH3

470KB_040 2_5%_ERTJ0EV474 JGFX@

B B

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A

2-ph: PR172=20.5K Vboot=0V, Iccmax=54A2-ph: PR172=20.5K Vboot=0V, Iccmax=54A 2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

2-ph: PR172=169K Vboot=1.1V, Iccmax=54A2-ph: PR172=169K Vboot=1.1V, Iccmax=54A

A A

+CPU_CORE Iocp=70A, IccMA X=53A Load line=1.9mo hm DCR=1.1mohm

PC116

330P_040 2_50V7K@

PR159

499_0402_1%@

1 2

VGATE<16>

12

PR133

27.4K_040 2_1%GFX@

1 2

12

PR131

3.83K_040 2_1%GFX@

150P_0402_50V8J

1 2

PR136

294K_040 2_1%

+3VS

1.91K_040 2_1%

PR156

1 2

PC122

47P_0402 _50V8J

NTCG

5

PC105

39P_0402_50V7KGFX@

12

GFX@ PR139

GFX@

475K_0402_1%

12

PC106

12

8.06K_0402_1%GFX@

8.06K_0402_1%GFX@ PR132

PR132

PR149

54.9_0402_1%

PH5

1 2

470KB_040 2_5%_ERTJ0EV474 J

1 2

12

PR139

+1.05VS_VCCP

1 2

12

PR161

27.4K_040 2_1%

PR158

3.83K_040 2_1%

12

PC112

GFX@ PC106

GFX@

1000P_0402_50V7K

VR_SVID_DAT<8>

VR_SVID_CLK<8>

12

+GFX_CORE Iocp=40A, IccMA X=24A Load line=3.9mo hm DCR=1.1mohm

330P_0402_50V7KGFX@

PR148

PR148 130_0402_1%

130_0402_1%

1 2

VR_SVID_ALRT#<8>

PR172

20.5K_040 2_1%

2.55K_0402_1%GFX@

422_0402_1%GFX@

12

PC104

1.91K_0402_1%GFX@

VR_ON<39>

12

PR163

8.06K_0402_1%

1 2

PR175

267K_040 2_1%

1 2

PC141

PC141 470P_0402_50V8J

470P_0402_50V8J

PR140

12

PR135

PR217

GFX_CORE_PWRGD<39>

SVID_SCLK

comp

12

PC137

12

2K_0402_1%@

1 2

12

+3VS

1 2

PR155

1 2

0_0402_5%

680P_040 2_50V7K

PR177

SVID_ALERT#

NTC

12

PC134

1000P_0402_50V7K

FB

4

PC129

1000P_04 02_50V7K

47P_0402 _50V8J

PC135

1 2

PU10

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

PR173

1 2

PR176

3.32K_0402_1%

PR179

+CPU_CORE

@ PC107

@

330P_0402_50V7K

GFX@ PC110

GFX@

0.01U_0402_50V7K

ISPG

37

38

39

40

41

FBG

PAD

RTNG

COMPG

ISUMPG

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

ISEN2

FB

comp

12

ISEN3

12

PC130 10 P_0402_50V8JPC130 10 P_0402_50V8J

0.22U_040 2_6.3V6K

887_0402_1%

12

PC142

330P_040 2_50V7K

@

1 2

10_0402_ 1%

<8>

VCCSENSE

12

1 2

ISNG

36

ISUMNG

ISEN1

12

PC133

0.22U_040 2_6.3V6K

VSUM-

PC143

PC107

PC110

NTCG

35

NTCG

PC136

0.01U_040 2_50V7K

12

GFX@ PR134

GFX@

10_0402_1%

GFX@ PR143

GFX@

10_0402_1%

UGATEG

BOOTG

LGATEG

PHASEG

31

32

33

34

BOOTG

LGATEG

PHASEG

UGATEG

BOOT2

UGATE2

PHASE2

LGATE2

PWM3

LGATE1

PHASE1

UGATE1

BOOT1

20

12

@

12

PR178

PC145 330P_0402_50 V7K@PC145 330P_0402_50 V7K

12

1.47K_040 2_1%

PR180

100_0402 _1%

@

2-ph: PR178=1.47K for ~70A OCP

2-ph: PR178=1.47K for ~70A OCP2-ph: PR178=1.47K for ~70A OCP

PR181

PR181 10_0402_1%

10_0402_1%

1 2

<8>

VSSSENSE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PR134

PR143

VCCP

12

3

12

30

29

28

27

26

25

24

23

22

21

+5VS

12

PC138

0.22U_040 2_10V6K

+VGFX_CORE

UGATEG

PR137

GFX@ PR137

GFX@

2.2_0603_5%

LGATEG

12

PC164

1U_0603_10V6K

12

PR160

1 2

0_0603_5%

PR165

2.2_0603_5%

0.22U_0603_10V7K

1 2

PR227

0_0603_5%

PR182

2.2_0603_5%

0.22U_0603_10V7K

Deciphered Date

1 2

PR221

0_0603_5%

PC108

GFX@ PC108

GFX@

0.22U_0603_10V7K

12

PR226

12

PC132

12

PC150

VCC_AXG_SENSE <9>

VSS_AXG_SENSE <9>

PHASEG

BOOTG

+5VS

PR218

0_0603_5%

0_0402_5%

CPU_B+

12

PR162

2.2_0603_5%

12

0.22U_0603_25V7K

0.22U_0603_25V7K PC123

PC123

UGATE2

PHASE2

BOOT2

VSUM+

12

PR174

12

11K_0402 _1%

12

2010/01/25 2009/04/28

LGATE2

PR167

2.61K_0402_1%

PH6

PH6 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

PC146

PC146 .1U_0402_16V7K

.1U_0402_16V7K

UGATE1

PHASE1

BOOT1

LGATE1

Compal Secret Data

1 2

12

BOOT2

UGATE2

PHASE2

LGATE2

LGATE1

PHASE1

UGATE1

BOOT1

PC139

PR164

PR164 1_0603_5%

1_0603_5%

PC131

1U_0603_ 10V6K

12

0.022U_04 02_16V7K

4

5

4

123

5

12

4

123

PC101

PQ33

1 2

GFX@ PC101

GFX@

GFX@ PQ33

GFX@

CSD17308Q 3

4.7U_0805 _25V6-K

12

PR138

4.7_1206 _5%

12

PQ34

PC113

GFX@ PQ34

GFX@

TPCA8057-H _PPAK56-8-5

680P_060 3_50V7K

+5VS

5

12

PQ35

PC124

PC125

CSD17308Q 3

4.7U_0805 _25V6-K

123

5

PQ36

123

TPCA8057-H _PPAK56-8-5

CPU_B+

5

PQ37

CSD17308Q 3

123

5

PQ38

123

TPCA8057-H _PPAK56-8-5

2

4.7U_0805 _25V6-K

12

PR166

4.7_1206 _5%

12

PC140

680P_060 3_50V7K

12

PC148

PC147

4.7U_0805 _25V6-K

12

PR183

4.7_1206 _5%

12

PC151

680P_060 3_50V7K

12

PC103

PC102

GFX@ PC103

GFX@

GFX@ PC102

GFX@

4.7U_0805 _25V6-K

PL12

GFX@ PL12

GFX@

0.36UH_PCMC104T-R36MN1R17_30A_20%

4

3

12

PR141

GFX@ PR141

GFX@

3.65K_0402_1%

GFX@ PH4

GFX@

PR144

GFX@ PR144

12

4.7U_0805 _25V6-K

GFX@

7.5K_0402_1%

1 2

ISPG

PC126

4.7U_0805 _25V6-K

VSUM+

ISEN2

VSUM-

12

VSUM+

ISEN1

VSUM-

Custom

10K_0402_1%_ERTJ0EG103FA

1 2

PR147

GFX@ PR147

GFX@

11K_0402_1%

1 2

PC117

GFX@ PC117

GFX@

.1U_0402_16V7K

1 2

PC118

0.047U_0402_16V4ZGFX@

12

PR152 0_0402_5%DISEN@ PR152 0_0402_5%DISEN@

HCB4532KF-800T90_1812

CPU_B+

12

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR169

3.65K_0402_1%

1 2

10K_0402_1%

PR168

1 2

PR170

1 2

1_0402_5%

12

PC149

4.7U_0805 _25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR185

3.65K_0402_1%

1 2

10K_0402_1%

PR184

1 2

1_0402_5%

PR186

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

CPU_CORE/GFX

GFX_B+

PR142

PC115

PR151

PR151 953_0402_1%GFX@

953_0402_1%GFX@

1

2

1

2

+VGFX_CORE

1

+

2

PL19

PR171

10K_0402_1%

1

2

12

GFX@ PR142

GFX@

1_0402_5%

PH4

GFX@ PC115

GFX@

.1U_0402_16V7K

1 2

12

ISNG

Connect to +5V can disable GFX portion

FBMA-L11-201209-121LMA50T_0805

PL11

1 2

1

+

PC127

2

68U_25V_M _R0.44

@

PL13

4

3

PL14

4

3

JM/SJM30

1

PC111

330U_X_2VM_R6MGFX@

GFX_B+

12

+CPU_CORE

ISEN1

12

+CPU_CORE

PR187

ISEN2

12

54 55Thursday, December 23, 2010

B+

0.1

5

PL20

FBMA-L11-322513-151LMA50T_1210

B+

1 2

PC152

VGA@ PC152

VGA@

10U_1206_25V6M

D D

PR194

VGA@ PR194

VGA@

10K_0402_1%

VGA_ON

C C

1 2

12

10U_1206_25V6M

+3VS

PR192

@PR192

@

10K_0402_5%

1 2

12

VGA@ PC159

VGA@

.1U_0402_16V7K

B+_CORE

PC153

VGA@ PC153

VGA@

PC159

12

VGA_PWROK

Vtrip range ==> 0.2V ~ 3V

VFB=0.7V V=0.7*(1+Rtop/Rbottom) Fsw=350KHz

B B

Cout ESR=12m ohm Rdson(max)=3.2 mohm Rdson(typ)=2.6 mohm. Ipeak=41.02A, Imax=28.714A, Iocp=43A Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=6.8A =>1/2Delta I=3.4A choose Rcs=75K Iocpmax=((75K*11uA)/0.0013)+3.4A=75.52A Iocpmin=((75K*9uA)/(0.0016*1.35))+3.4A=48.42A Iocp=48.42A~75.52A

GPU_VID1

P0(Cold)

A A

P0(Hot)

P8/P12

ES

5

GPU_VID0

0

1

0

1

NVIDIA/N12P-GS

1.0V

0.975V

0.825V

--------

4

+3VS

12

PR188

@ PR188

@

10K_0402_5%

PU11

VGA@PU11

PR190

VGA@ PR190

VGA@

75K_0402_1%

1 2

PR191

VGA@ PR191

VGA@

200K_0402_1%

Switch freq. (RF pin setting) 47K ==>450KHz 100K ==>390KHz 200K ==>350KHz (Currently setting) 470K ==>300KHz

VGA@

DMN66D0LDW-7_SOT363-6

VGA@

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

RT8237_SON10_3X3

VFB=0.6V

PR219

GS@ PR219

GS@

37.4K_0402_1%

PQ44A

VBST

DRVH

V5IN

DRVL

NVIDIA/N12P-GV1

BST_VCORE

10

DH_VCORE

9

SW_VCORE

8

SW

7

DL_VCORE

6

11

TP

12

61

D

2

G

S

12

DMN66D0LDW-7_SOT363-6

1.025V

1.0V

0.85V

0.925V----

4

VGA@ PR189

VGA@

0_0603_5%

1 2

VGA@

PC155

1 2

1U_0603_6.3V6M

PR189

+5VALW

3

VGA@ PC154

VGA@

0.1U_0603_25V7K

1 2

PC154

5

PQ39

4

PQ39

VGA@

CSD17308Q3

123

5

DL_VCORE

4

PQ40

VGA@ PQ40

VGA@

123

TPCA8057-H_PPAK56-8-5

2

0.36UH_VMPI1004AR-R36M-Z03_30A_20%VGA@

0.36UH_VMPI1004AR-R36M-Z03_30A_20%VGA@ PL15

PL15

3

4

5

12

PR193

VGA@ PR193

VGA@

4.7_1206_5%

PQ41

12

PC158

VGA@ PC158

VGA@

VGA@ PQ41

VGA@

680P_0603_50V7K

TPCA8057-H_PPAK56-8-5

680P_0603_50V7K

GS@ PR1 98

GS@

2.26K_0402_1%

123

TPCA8057-H Rds=2.6m/3.2m ohm

PR205

GS@ PR2 05

GS@

13.3K_0402_1%

PR205

GV@ PR20 5

+3VSDGPU

PR216

VGA@ PR216

VGA@

10K_0402_5%

PR222

VGA@ PR222

VGA@

10K_0402_5%

1 2

VGA@ PC163

VGA@

4700P_0402_25V7K

10K_0402_5%

VGA@

1 2

12

PC163

PR220

@ PR220

@

PQ44B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

34

D

S

AP

DMN66D0LDW-7_SOT363-6

5

G

GV@

10K_0402_1%

PQ43A

VGA@

PQ43A

VGA@

+3VSDGPU

PR223

@PR223

@

10K_0402_5%

PR225

VGA@ PR225

VGA@

10K_0402_5%

1 2

12

VGA@ PR224

VGA@

10K_0402_5%

2010/07/13 2011/07/13

VGA@

2200P_0402_25V7K

12

VGA@ PR208

2

G

VGA@

10K_0402_5%

1 2

12

VGA@ PC162

VGA@

4700P_0402_25V7K

61

D

S

GPU_VID2 <23>

PR224

VGA@

DMN66D0LDW-7_SOT363-6

Compal Secret Data

Deciphered Date

PR208

PC162

PR209

@ PR209

@

10K_0402_5%

PQ43B

VGA@ PR200

VGA@

10K_0402_1%

2

12

PC160

VGA@ PC160

12

PR200

DMN66D0LDW-7_SOT363-6

+3VSDGPU

PR207

VGA@ PR207

VGA@

10K_0402_5%

1 2

12

34

D

S

AP

2

1

12

VGA@ PR195

VGA@

0_0402_5%

PR198

GV@ PR198

GV@

2.15K_0402_1%

1 2

D

PQ42A

VGA@

PQ42A

VGA@

DMN66D0LDW-7_SOT363-6

VGA@ PR214

VGA@

10K_0402_5%

5

G

S

PQ42B

VGA@

PQ42B

VGA@

+3VSDGPU

PR214

12

Title

Size Document Number Rev

Custom

Date: Sheet of

PR195

PR196

VGA@ PR196

VGA@

10_0402_5%

12

PR198

1 2

61

1 2

12

GCORE_SEN

PR201

GS@ PR201

GS@

10.7K_0402_1%

PR201

GV@ PR201

GV@

8.66K_0402_1%

VGA@ PR203

VGA@

10K_0402_5%

1 2

2

G

12

PC161

VGA@ PC161

VGA@

4700P_0402_25V7K

PR211

VGA@ PR211

VGA@

34

D

S

@ PR213

@

10K_0402_5%

VGA@ PR215

VGA@

10K_0402_5%

5

G

PR213

GPU_VID0 <23,39>

PR215

Compal Electronics, Inc.

+VGA_COREP

JM/SJM30

1

ESR=10mohm

1

PC157

VGA@+PC157

VGA@

+

330U_D2E_2.5VM

2

VGAVCC_SENSE <25>

+3VSDGPU

PR202

VGA@ PR202

VGA@

10K_0402_5%

PR203

1 2

PR206

@PR206

@

10K_0402_5%

1 2

+3VSDGPU

PR210

VGA@ PR210

VGA@

10K_0402_5%

1 2

12

GPU_VID1 <23,39>

PR212

@ PR212

@

10K_0402_5%

1

+VGA_CORE

55 55Thursday, December 23, 2010

0.1

5

D D

PJ2 @

12

PR232

@

PC171

2.2U_1206_25V7K

2

JUMP_43X118

B+

12

PC170

0.1U_0603_25V7K

C C

10K_0402_1%

BKOFF#<32,39>

1 2

INVTPWM<32>

12

PC180

1000P_0402_50V7K

B B

1000P_0402_50V7K

112

4

PAD-OPEN 2x2m~D

@ PJP3

@

2 1

PQ45

P5103EMG_SOT23-3

PQ45

S

12

PC181

2.2U_0805_25V6K

PJP3

G

3

PR52

0_0805_5%

1 2

@

4.7UH_MMD-06AH-4R7M-V1_3A_20%

4.7UH_MMD-06AH-4R7M-V1_3A_20% PL17

PC179

12

PL17

1 2

1

REGOUT

2

EN

3

PGATE

4

VIN

5

MONITOR

6

PGND1

7

NC

SW

2 1

PD21

12

B160-13-F_SMA2

PR228

@ PR228

@

10_1206_1%

12

PC176

220P_0603_50V8J

@

23

29

PU12

TB62758FTG_VQON2 4_3P8X3P8

SW8VOUT10PGND2

NC9NC11OUT1

24TP25

GND26GND27GND28GND

FSET

AGND

12

13

22

COMP

PGND3

PWM

OUT6

OUT5

OUT4

OUT3

OUT2

14

1 2

510_0402_1%

PR230

1 2

ISET

91K_0402_1%

91K_0402_1% PR229

PR229

21

20

19

18

17

16

15

D

13

2

1U_0603_25V6K

+INVPWR_B+

2

0.1U_0603_50V7K

0.1U_0603_50V7K PC177

PC177

1 2

0.001U_0402_50V7M~D

0.001U_0402_50V7M~D PC178

@ PC178

@

1 2

11K_0402_1%

PR231

1 2

1

+LG_VOUT

12

PC173

PC172

2.2U_0805_25V6K

12

PC175

PC174

2.2U_0805_25V6K

0.1U_0805_50V7K

2.2U_0805_25V6K

FB4 <32>

FB3 <32>

FB2 <32>

FB1 <32>

+LG_VOUT

SW

10K_0402_1%

PR233

1 2

PR234

1 2

100K_0402_1%

A A

5

100K_0402_1%

4

3

+INVPWR_B+

Title

LED converter

Size Document Number Rev

Toshiba(TB62758FTG) _LS5796_ES1 X01

B

Toshiba(TB62758FTG) _LS5796_ES1 X01

B

Toshiba(TB62758FTG) _LS5796_ES1 X01

B

Date: Sheet of

2

56 56Thursday, December 23 , 2010

1

Compal LA-7241P P4LS0, ID47H, EasyNote NX69 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual