COMPAL LA-7204P Schematics

A

1 1

B

C

D

E

PWWHA

2 2

Delhi 10RG

LA-7204P SchematicREV 0.1

3 3

4 4

Intel Processor(Sandy Bridge) / PCH(Cougar Point)

2010-12-19 Rev 0.1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

153Thursday, January 13, 2011

E

A

of

A

B

C

D

E

Fan Control Circuit

page 5

PCI-Express 8X 2.5GHz

Intel CPU Sandy Bridge

1 1

rPGA-989

37.5mm*37.5mm

page 5,6,7,8,9,10

FDI X8

2.7GT/s

DMI X4

5GT/s

VGA Board(GDDR3)

CRT

2 2

790MHz

page 13,14,15,16,17,18

NVIDIA N12M-GE-S-B1 BGA 533P

page 20

LVDS Conn.

page 19

Intel PCH Cougar Point - M

FCBGA-989

25mm*25mm

page 21,22,23,24,25,26,27,28,29

RJ45

page 33

RTL8105E 10/100M

PCIe port 1

page 33

PCIe 1x

1.5V 5GT/s

HDMI Conn.

3 3

page 30

Memory BUS(DDRIII)

Dual Channel

1.5V DDRIII 1066/1333/1600 MT/s

USB Right/Left

USB port 0,1

USB

5V 480MHz

page 31,35

PCIeMini Card

USB

5V 480MHz

PCIe 1x

1.5V 5GT/s

SATA port 0

5V 6GHz(600MB/s)

SATA port 2

5V 3GHz(300MB/s)

WiMax PCIeMini Card

WLAN

SATA HDD

SATA ODD

200pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB port 9

page 32

PCIe port 9

page 32

SATA port 1

page 31

SATA port 4

page 31

Card Reader 2IN1 RTS5137

USB port 10

page 34

Int. Camera

page 11,12

USB port 11

page 19

LPC BUS

RTC CKT.

page 21

DC/DC Interface CKT.

page 41

Power Circuit DC/DC

4 4

page 42,43,44,45, 46,47,48,49,50

Power/B

page 40

A

SPI ROM (4MB)

page 21

B

Debug Port

page 39

Touch Pad

page 40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3.3V 33 MHz

ENE KB930

2010/09/03 2012/12/31

C

page 38

Int.KBD

page 39

Compal Secret Data

HD Audio

EC ROM (128KB)

page 39

Deciphered Date

3.3V 24MHz

MIC Conn

D

Int.

HDA Codec

ALC259-VB5-GR QFN 48P

page 36

SPK Conn

page 37page 37

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

HP Conn

page 37

SCHEMATICS,MB A7204

4019CU

E

of

253Thursday, January 13, 2011

of

253Thursday, January 13, 2011

of

253Thursday, January 13, 2011

A

B+

B

Ipeak=5A, Imax=3.5A, Iocp min=7.9A

C

DESIGN CURRENT 0.1A

DESIGN CURRENT 10A

+3VL +5VALW

D

E

SUSP#

SY8033BDBC

1 1

SUSP

N-CHANNEL

DESIGN CURRENT 1.8A

DESIGN CURRENT 5.5A

+1.8VS

+5VS

SI4800

Ipeak=5A, Imax=3.5A, Iocp min=7.7A

DESIGN CURRENT 6A

+3VALW

WOL_EN#

P-CHANNEL

AO-3413

VGA_ENVDD

P-CHANNEL

AO-3413

TPS51125ARGER

SUSP

N-CHANNEL

SI4800

SUSP or 0.75VR_EN#

G2992F1U

2 2

DESIGN CURRENT 330mA

DESIGN CURRENT 4.5A

DESIGN CURRENT 2A

DESIGN CURRENT 0.5A

+3V_LAN

+3VS

+LCD_VDD

+0.75VS

VR_ON

Ipeak=53A, Imax=36A, Iocp min=70A

DESIGN CURRENT 53A

+CPU_CORE

ISL95831CRZ-T

SUSP#

TPS51218DSCR

Ipeak=20A, Imax=14A, Iocp min=26A

DESIGN CURRENT 21A

+VGA_CORE

SUSP#

Ipeak=12.5A, Imax=8.75A, Iocp min=21.4A

TPS5117

DESIGN CURRENT 17A

+1.05VS_VCCP

VCCPPWRGD

3 3

TPS51117

SYSON

TPS51117RGYR

Ipeak=6A, Imax=4.2A, Iocp min=7.76A

Ipeak=16.5A, Imax=11.55A, Iocp min=21.03A

SUSP

N-CHANNEL

DESIGN CURRENT 6A

DESIGN CURRENT 20A

DESIGN CURRENT 2A

+VCCSA

+1.5V

+1.5V_CPU

FDS6676AS

SUSP

N-CHANNEL

DESIGN CURRENT 0.7A

+1.5VS

FDS6676AS

VGA_PWROK#

4 4

A

N-CHANNEL FDS6676AS

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DESIGN CURRENT 3A

2010/09/03 2012/12/31

C

+1.5V_MEM_GFX

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

353Thursday, January 13, 2011

E

A

of

A

B

C

D

E

Voltage Rails

1 1

State

power plane

( O MEANS ON X MEANS OFF )

+RTCVCC

B+

+3VL

+5VALW +3VALW +VSB

+1.5V

+5VS +3VS +1.8VS +1.5VS +1.05VS +0.75VS +CPU_CORE +GFX_CORE

BTO Option Table

Function

DIS only

description

S0

2 2

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

O O O O O O

O O O O O

X

O O O O O

X

O O O O

X X

O

XX X XX

OO OO

X

explain

BTO

Function

description

explain

BTO

DIS@

PCH

Q65R3@

MINI PCI-E SLOT

SLOT1

WIMAX

WIMAX@

HDMI

HDMI@

10/100M Giga

8105ELDO@ 8111E@

LAN

Camera & Mic

CAM@8105ESWR@

PCH SM Bus Address

3 3

Power

+3VS +3VS +3VS

Device

DDR SO-DIMM 0 DDR SO-DIMM 1 WLAN/WIMAX

EC SM Bus1 Address

Device Address Address

+3VL

4 4

A

HEX HEX

16 H

HEX

0001 0110 bSmart Battery

Address

1010 0000 bA0 H 1010 0100 bA4 H

PowerPower

+3VS

EC SM Bus2 Address

Device

96 H

B

1001 0110 bPCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

STATE

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

G3 LOW LOWLOW

2010/09/03 2012/12/31

C

SIGNAL

Compal Secret Data

SLP_S3#

HIGH HIGHHIGH

LOW

LOW LOW

Deciphered Date

SLP_S4# SLP_S5#

HIGH HIGHHIGH

HIGH

LOW LOWLOW

D

HIGH

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

453Thursday, January 13, 2011

of

E

of

A

@

1 1

C4871000P_0402_50V7K

12

C4881000P_0402_50V7K

12

PM_DRAM_PWRGD_R

H_PWRGOOD

H_SNB_IVB#<25>

B

T1 PADT1 PAD

T2 PADT2 PAD

H_SNB_IVB#

TP_SKTOCC#

H_CATERR#

JCPUB

PROC_SELECT#

C26

AN34

AL33

SNB_IVB#

SKTOCC#

CATERR#

C

BCLK

BCLK#

MISCTHERMALPWR MANAGEMENT

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

100 MHz

A28 A27

120 MHz

A16 A15

CLK_CPU_DMI CLK_CPU_DMI#

CLK_CPU_DPLL CLK_CPU_DPLL#

D

CLK_CPU_DMI <22> CLK_CPU_DMI# <22>

E

Stuff R41 and R42 if do not support eDP

+1.05VS_VCCP

CLK_CPU_DPLL# CLK_CPU_DPLL

R42 1K_0402_5%R42 1K_0402_5%

1 2

R41 1K_0402_5%R41 1K_0402_5%

1 2

R8

AK1 A5 A4

AP29 AP27

AR26 AR27 AP30

AR28 AP26

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

EN_DFAN1<38>

H_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_PRDY#_R XDP_PREQ#_R

XDP_TCK_R XDP_TMS_R XDP_TRST#_R

XDP_TDI_R XDP_TDO_R

XDP_DBRESET#_R

XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R

+FAN2

10mil

H_DRAMRST# <7>

R1437 140_0402_1%R1437 140_0402_1% R1438 25.5_0402_1%R1438 25.5_0402_1% R1439 200_0402_1%R1439 200_0402_1%

12 12 12

R1 0_0402_5%@R1 0_0402_5%@

1 2

R2 0_0402_5%@R2 0_0402_5%@

1 2

R4 0_0402_5%@R4 0_0402_5%@

1 2

R6 0_0402_5%@R6 0_0402_5%@

1 2

R7 0_0402_5%@R7 0_0402_5%@

1 2

R8 0_0402_5%@R8 0_0402_5%@

1 2

R10 0_0402_5%@R10 0_0402_5%@

1 2

R11 0_0402_5%@R11 0_0402_5%@

1 2

R12 0_0402_5%@R12 0_0402_5%@

1 2

R13 0_0402_5%@R13 0_0402_5%@

1 2

R15 0_0402_5%@R15 0_0402_5%@

1 2

R18 0_0402_5%@R18 0_0402_5%@

1 2

FAN Control Circuit (RPM and PWM)

+5VS

1A

U1

1

EN

2

VIN

3

VOUT

4

VSET

1

APL5607KI-TRG_SO8

C17

C17 10U_0805_10V6K

10U_0805_10V6K

2

FAN Control Circuit

+5VS

R1445

1A

1 2

0_0603_5%

2

C902

C902 10U_0805_10V6K

10U_0805_10V6K

1

D

FAN_SPEED1<38>

+FAN1

40 mil

DDR3 Compensation Signals Layout Note:Place these resistors near Processor

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRESET#

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3

10U_0805_10V6K

8

GND

7

GND

6

GND

5

GND

+5VS

C13

Routed as a single daisy chain

R36

1 2

1K_0402_5%

+FAN2

2

C15

C15 1000P_0402_50V7K

1000P_0402_50V7K @

@

1

+3VS

12

R1444

R1444 10K_0402_5%

10K_0402_5%

FANPWM<38>

+FAN1

1

C899

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

D85

1 2

1SS355_SOD323-2

BAS16_SOT23-3

D86

12

C900

C900 10U_0805_10V6K

10U_0805_10V6K

+3VS

XDP_DBRESET# <23>

1 2 3

4 5

ACES_85204-0300N

R24 10K_0402_5%@R24 10K_0402_5%@

12

FAN_SPEED1

1

C14

0.01U_0402_25V7K

0.01U_0402_25V7K @

@

2

FANPWM

ACES_85204-0400N

2

1

1000P_0402_50V7K

2

Close to Connector

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

553Thursday, January 13, 2011

E

of

JFAN2

1 2 3

GND GND

1 2 3 4

C901

JFAN

1 2 3 4

+3VS

@JFAN2

@

@JFAN

@

A

R450

H_PECI

H_PROCHOT#_R

56_0402_5%

H_THERMTRIP#

H_PECI<38>

H_PROCHOT#<38,43>

H_THERMTRIP#<26>

1 2

Remove R14(o ohm) for HW Review demand

+1.05VS_VCCP

R47 62_0402_5%R47 62_0402_5%

2 2

R51 10K_0402_5%R51 10K_0402_5%

PM_PWROK<23,38>

DRAMPWROK<23>

3 3

12

C93

0.1U_0402_16V4Z

R312

1 2

0_0402_5%

1 2

Buffered Reset to CPU

PLT_RST# <13,25,32,33,35,38,39>

U3

1

OE#

2

IN

3

GND

74AHC1G125GW_SOT353-5

4 4

VCC

OUT

5

4

A

H_PROCHOT#

H_PWRGOOD

12

U10

PS3@

74AHC1G09GW_TSSOP5

5

PS3@

1

P

B

2

A

R384

WPS3@

SUSP<9,32,41>

+3VS

0.1U_0402_16V4Z

1

C84

2

BUFO_CPU_RST# BUF_CPU_RST#

O

PS3@

G

3

0_0402_5%

+1.05VS_VCCP

PM_SYS_PWRGD_BUF

4

SUSP

12

R69

R69 75_0402_5%

75_0402_5%

R155

43_0402_1%

1 2

H_PM_SYNC<23>

H_PWRGOOD<26>

1 2

R454 130_0402_5%R454 130_0402_5%

+1.5V_CPU+3VALW

12

R339

R339 200_0402_5%

200_0402_5%

12

R340

R340 39_0402_5%

39_0402_5% @

@

13

D

Q5

Q5 2N7002_SOT23

2N7002_SOT23

2

G

@

G

@

S

PU/PD for JTAG signals

XDP_TMS_R XDP_TDI_R XDP_TDO XDP_TCK_R XDP_TRST#_R

XDP Connector

12

R209

R209 0_0402_5%

0_0402_5% @

@

B

H_PM_SYNC

H_PWRGOOD

PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF

BUF_CPU_RST#

R28 51_0402_5%R28 51_0402_5% R29 51_0402_5%R29 51_0402_5% R30 51_0402_5%R30 51_0402_5% R31 51_0402_5%R31 51_0402_5% R32 51_0402_5%R32 51_0402_5%

PBTN_OUT#<23,38>

CFG0<10>

VGATE<23,38,49>

CLK_CPU_ITP<22> CLK_CPU_ITP#<22> +1.05VS_VCCP

0.1U_0402_10V6K

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

Sandy Bridge_rPGA_Rev0p61 @

12 12 12 12 12

H_PWRGOOD XDP_CPU_HOOK0 PBTN_OUT# CFG0 VGATE

PLT_RST#

1

C8

C8 @

@

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.05VS_VCCP

R35 1K_0402_5%@R35 1K_0402_5%@

1 2

R152 0_0402_5%@R152 0_0402_5%@

1 2

R37 1K_0402_5%@R37 1K_0402_5%@

1 2

R451 0_0402_5%@R451 0_0402_5%@

1 2

@

1 2

R40 1K_0402_5%

Issued Date

XDP_PREQ# XDP_PRDY#

XDP_BPM#0 XDP_BPM#1

XDP_BPM#2 XDP_BPM#3

XDP_CPU_HOOK1 XDP_CPU_HOOK2 XDP_CPU_HOOK3 CLK_CPU_ITP CLK_CPU_ITP#

XDP_CPU_HOOK6 XDP_DBRESET#

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

XDP_TCK

2010/09/03 2012/12/31

C

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

DDR3

MISC

DDR3

MISC

PRDY# PREQ#

TCK TMS

TRST#

TDI

TDO

DBR#

BPM#[0]

JTAG & BPM

MOLEX 52435-2671

BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

JXDP

@

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

27 28

Compal Secret Data

Deciphered Date

A

B

C

D

E

+1.05VS_VCCP

R34

24.9_0402_1%

JCPUA

1 1

DMI_PTX_CRX_N0<23> DMI_PTX_CRX_N1<23> DMI_PTX_CRX_N2<23> DMI_PTX_CRX_N3<23>

DMI_PTX_CRX_P0<23> DMI_PTX_CRX_P1<23> DMI_PTX_CRX_P2<23> DMI_PTX_CRX_P3<23>

DMI_CTX_PRX_N0<23> DMI_CTX_PRX_N1<23> DMI_CTX_PRX_N2<23> DMI_CTX_PRX_N3<23>

DMI_CTX_PRX_P0<23> DMI_CTX_PRX_P1<23> DMI_CTX_PRX_P2<23> DMI_CTX_PRX_P3<23>

FDI_CTX_PRX_N0<23> FDI_CTX_PRX_N1<23> FDI_CTX_PRX_N2<23>

2 2

+1.05VS_VCCP

3 3

+1.05VS_VCCP

FDI_CTX_PRX_N3<23> FDI_CTX_PRX_N4<23> FDI_CTX_PRX_N5<23> FDI_CTX_PRX_N6<23> FDI_CTX_PRX_N7<23>

FDI_CTX_PRX_P0<23> FDI_CTX_PRX_P1<23> FDI_CTX_PRX_P2<23> FDI_CTX_PRX_P3<23> FDI_CTX_PRX_P4<23> FDI_CTX_PRX_P5<23> FDI_CTX_PRX_P6<23> FDI_CTX_PRX_P7<23>

FDI_FSYNC0<23> FDI_FSYNC1<23>

FDI_INT<23> FDI_LSYNC0<23>

FDI_LSYNC1<23>

R9 24.9_0402_1%R9 24.9_0402_1%

1 2

R33 10K_0402_5%

@

12

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

EDP_COMP

Reserve R33 for HW Review demand eDP_COMP signals should be

shorted near balls and routed with typical impedance <25m ohm

JCPUA

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

Sandy Bridge_rPGA_Rev0p61 @

DMI

Intel(R) FDI

eDP

PEG_ICOMPO

PEG_RCOMPO

PCI EXPRESS* - GRAPHICS

PEG_ICOMPI

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[10]

PEG_RX[11]

PEG_RX[12]

PEG_RX[13]

PEG_RX[14]

PEG_RX[15]

PEG_TX#[0]

PEG_TX#[1]

PEG_TX#[2]

PEG_TX#[3]

PEG_TX#[4]

PEG_TX#[5]

PEG_TX#[6]

PEG_TX#[7]

PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[10]

PEG_TX[11]

PEG_TX[12]

PEG_TX[13]

PEG_TX[14]

PEG_TX[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9]

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_N11 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_N15

PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_P15

PCIE_CTX_GRX_N8 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_P15

C29 .1U_0402_16V7KC29 .1U_0402_16V7K

1 2

C30 .1U_0402_16V7KC30 .1U_0402_16V7K

1 2

C31 .1U_0402_16V7KC31 .1U_0402_16V7K

1 2

C32 .1U_0402_16V7KC32 .1U_0402_16V7K

1 2

C33 .1U_0402_16V7KC33 .1U_0402_16V7K

1 2

C34 .1U_0402_16V7KC34 .1U_0402_16V7K

1 2

C35 .1U_0402_16V7KC35 .1U_0402_16V7K

1 2

C36 .1U_0402_16V7KC36 .1U_0402_16V7K

1 2

C45 .1U_0402_16V7KC45 .1U_0402_16V7K

1 2

C46 .1U_0402_16V7KC46 .1U_0402_16V7K

1 2

C47 .1U_0402_16V7KC47 .1U_0402_16V7K

1 2

C48 .1U_0402_16V7KC48 .1U_0402_16V7K

1 2

C49 .1U_0402_16V7KC49 .1U_0402_16V7K

1 2

C50 .1U_0402_16V7KC50 .1U_0402_16V7K

1 2

C51 .1U_0402_16V7KC51 .1U_0402_16V7K

1 2

C52 .1U_0402_16V7KC52 .1U_0402_16V7K

1 2

PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical

12

impedance = 43 m ohm (4 mils) PEG_ICOMPO signals should be routed with max length = 500 mils

- typical impedance = 14.5 m ohm (12 mils)

PCIE_GTX_C_CRX_N[8..15] <13>

PCIE_GTX_C_CRX_P[8..15] <13>

PCIE_CTX_C_GRX_N8

PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_N15

PCIE_CTX_C_GRX_P8

PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_P15

PCIE_CTX_C_GRX_N[8..15] <13>

PCIE_CTX_C_GRX_P[8..15] <13>

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

653Thursday, January 13, 2011

E

A

of

A

JCPUC

DDR_A_D[0..63]<11>

JCPUC

B

C

JCPUD

DDR_B_D[0..63]<12>

JCPUD

D

E

DDRA_CLK0

AB6

SA_CLK[0]

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5

1 1

2 2

3 3

DDR_A_BS0<11> DDR_A_BS1<11> DDR_A_BS2<11>

DDR_A_CAS#<11> DDR_A_RAS#<11>

DDR_A_WE#<11>

DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_CAS# DDR_A_RAS# DDR_A_WE#

F10

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AJ5 AJ6 AJ8

AK8

AJ9 AK9 AH8 AH9 AL9 AL8

AP11 AN11

AL12 AM12 AM11

AL11 AP12 AN12

AJ14 AH14

AL15 AK15

AL14 AK14

AJ15 AH15

AE10

AF10

AE8 AD9 AF9

C5 D5 D3 D2 D6 C6 C2 C3

F8

G9

F9

F7 G8 G7

K4

K5

K1

J1 J5 J4 J2

K2 M8

N8

N7 M9

N9 M7

V6

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0] SA_CS#[1] SA_CS#[2] SA_CS#[3]

SA_ODT[0]

SA_ODT[1] SA_ODT[2] SA_ODT[3]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

DDRA_CLK0#

AA6

DDRA_CKE0

V9

DDRA_CLK1 DDRB_CLK1

AA5

DDRA_CLK1# DDRB_CLK1#

AB5

DDRA_CKE1 DDRB_CKE1

V10

AB4 AA4 W9

AB3 AA3 W10

DDRA_SCS0# DDRB_SCS0#

AK3

DDRA_SCS1#

AL3 AG1 AH1

DDRA_ODT0 DDRB_ODT0

AH3

DDRA_ODT1

AG3 AG2 AH2

DDR_A_DQS#0

C4

DDR_A_DQS#1

G6

DDR_A_DQS#2

J3

DDR_A_DQS#3

M6

DDR_A_DQS#4

AL6

DDR_A_DQS#5

AM8

DDR_A_DQS#6

AR12

DDR_A_DQS#7

AM15

DDR_A_DQS0

D4

DDR_A_DQS1

F6

DDR_A_DQS2

K3

DDR_A_DQS3

N6

DDR_A_DQS4

AL5

DDR_A_DQS5

AM9

DDR_A_DQS6

AR11

DDR_A_DQS7

AM14

DDR_A_MA0

AD10

DDR_A_MA1

W1

DDR_A_MA2

W2

DDR_A_MA3

W7

DDR_A_MA4

V3

DDR_A_MA5

V2

DDR_A_MA6

W3

DDR_A_MA7

W6

DDR_A_MA8

V1

DDR_A_MA9

W5

DDR_A_MA10

AD8

DDR_A_MA11

V4

DDR_A_MA12

W4

DDR_A_MA13

AF8

DDR_A_MA14

V5

DDR_A_MA15

V7

DDRA_CLK0 <11> DDRB_CLK0 <12> DDRA_CLK0# <11> DDRA_CKE0 <11> DDRB_CKE0 <12>

DDRA_CLK1 <11> DDRA_CLK1# <11> DDRB_CLK1# <12> DDRA_CKE1 <11>

DDRA_SCS0# <11> DDRA_SCS1# <11> DDRB_SCS1# <12>

DDRA_ODT0 <11> DDRB_ODT0 <12> DDRA_ODT1 <11> DDRB_ODT1 <12>

DDR_A_DQS#[0..7] <11>

DDR_A_DQS[0..7] <11>

DDR_A_MA[0..15] <11>

DDR_B_BS0<12> DDR_B_BS1<12> DDR_B_BS2<12>

DDR_B_CAS#<12> DDR_B_RAS#<12>

DDR_B_WE#<12>

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_CAS# DDR_B_RAS# DDR_B_WE#

D10

K10

AM5 AM6 AR3

AP3 AN3 AN2 AN1

AP2

AP5 AN9

AT5

AT6

AP6 AN8 AR6 AR5 AR9

AJ11

AT8

AT9

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA9 AA7

AA10

AB8 AB9

J10

M5 N4 N2 N1 M4 N5 M2 M1

C9 A7

C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2

J7 J8

K9

J9

K8 K7

R6

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CLK[2]

SB_CLK#[2]

SB_CKE[2]

SB_CLK[3]

SB_CLK#[3]

SB_CKE[3]

SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3]

SB_ODT[0]

SB_ODT[1] SB_ODT[2] SB_ODT[3]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6]

DDR SYSTEM MEMORY B

SB_DQS[7]

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

DDRB_CLK0 DDRB_CLK0# DDRB_CKE0

DDRB_SCS1#

DDRB_ODT1

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8

DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDRB_CLK0# <12>

DDRB_CLK1 <12> DDRB_CKE1 <12>

DDRB_SCS0# <12>

DDR_B_DQS#[0..7] <12>

DDR_B_DQS[0..7] <12>

DDR_B_MA[0..15] <12>

Sandy Bridge_rPGA_Rev0p61 @

+1.5V

R466

R466 0_0402_5%WPS3@

0_0402_5%WPS3@

1 2

Q14

D

S

D

S

1 2

13

BSS138_NL_SOT23-3

G

PS3@

2

C140

1 2

0.047U_0402_25V6K

0.047U_0402_25V6K PS3@

PS3@

4 4

H_DRAMRST#<5>

R464

4.99K_0402_1%

PS3@

DRAMRST_CNTRL_PCH<22>

A

1 2

R463 0_0402_5%

DRAMRST_CNTRL

1K_0402_5%

DDR3_DRAMRST#_RH_DRAMRST#

12

R465

R467

PS3@

B

R467 1K_0402_5%

1K_0402_5%

1 2

SM_DRAMRST# <11,12>

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Sandy Bridge_rPGA_Rev0p61 @

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

753Thursday, January 13, 2011

E

A

of

A

B

C

D

E

+CPU_CORE

JCPUF

53A (SV 35W)

AG35

VCC1

AG34

VCC2

1 1

2 2

3 3

4 4

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Sandy Bridge_rPGA_Rev0p61 @

POWER

PEG AND DDR

CORE SUPPLY

VSS_SENSE_VCCIO

SENSE LINES SVID

A

8.5A

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE VSSIO_SENSE

22U_0805_6.3V6M

AH13 AH10

C146

AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11

C147

H14 H12 H11 G14 G13

22U_0805_6.3V6M

G12 F14 F13 F12 F11 E14 E12

Bottom Socket Cavity x 5

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

H_CPU_SVIDALRT#

AJ29

H_CPU_SVIDCLK

AJ30

H_CPU_SVIDDAT

AJ28

VCCSENSE_R

AJ35

VSSSENSE_R

AJ34

VCCIO_SENSE

B10 A10

R102

R102 0_0402_5%

0_0402_5%

1 2

22U_0805_6.3V6M

1

C144

C143

2

22U_0805_6.3V6M

1

C145

C163

@

2

22U_0805_6.3V6M

12

R70

R70 130_0402_5%

130_0402_5%

R65 0_0402_5%R65 0_0402_5%

1 2

R52 0_0402_5%R52 0_0402_5%

1 2

R105

R105 100_0402_1%

100_0402_1% @

@

1 2

+1.05VS_VCCP

Close to CPU

B

TOP Socket Cavity x 7

22U_0805_6.3V6M

1

2

1

2

R67 43_0402_1%R67 43_0402_1% R63 0_0402_5%R63 0_0402_5% R66 0_0402_5%R66 0_0402_5%

C137

C141

2

22U_0805_6.3V6M

1

C153

C160

@

2

22U_0805_6.3V6M

+1.05VS_VCCP+1.05VS_VCCP

1 2 1 2 1 2

VCCIO_SENSE <47>

1

C136

2

22U_0805_6.3V6M

1

C152

@

2

12

close to CPU

R68

R68 75_0402_5%

75_0402_5%

Pull high resistor on VR side

+CPU_CORE

R64

R64 100_0402_1%

100_0402_1%

1 2

12

R62

R62 100_0402_1%

100_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

22U_0805_6.3V6M

1

C135

C134

2

22U_0805_6.3V6M

1

C138

C139

@

2

22U_0805_6.3V6M

ESR 9mohm

330U_D2_2V_Y

VR_SVID_ALRT# <49> VR_SVID_CLK <49> VR_SVID_DAT <49>

Close to CPU

+1.05VS_VCCP

+1.05VS_VCCP Decoupling:

22U_0805_6.3V6M

1

C133

C142

2

22U_0805_6.3V6M

1

C132

@

2

22U_0805_6.3V6M

330U_D2_2V_Y

1

+

C12

@+C12

C10

2

@

C11

2

VCCSENSE <49> VSSSENSE <49>

2010/09/03 2012/12/31

C

2X 330U (6m ohm), 12X 22U

1

2

+CPU_CORE

10U_0805_10V6K

1

C101

C102

1

+

330U_D2_2V_Y

2

9/02 Add C898 3Pin Bulk Cap by Power Demand 9/02 Change C890, C891, C894 from SGA00005R00 to SGA00004X80 for Power demand

Compal Secret Data

Deciphered Date

2

10U_0805_10V6K

+CPU_CORE

C159

22U_0805_6.3V6M

+CPU_CORE

C158

22U_0805_6.3V6M

1

2

1

2

+CPU_CORE Decoupling: 4X 470U (4m ohm), 16X 22U, 10X 10U

Bottom Socket Cavity

10U_0805_10V6K

1

C103

2

10U_0805_10V6K

1

C104

2

1

C105

2

10U_0805_10V6K

1

C106

2

1

C107

2

10U_0805_10V6K

1

C108

2

Top Socket Edge

22U_0805_6.3V6M

1

C130

2

22U_0805_6.3V6M

1

C129

2

22U_0805_6.3V6M

1

C124

C123

2

22U_0805_6.3V6M

1

C122

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

C151

9/02 Remove C126, C131 by Power Demand

Top Socket Cavity

22U_0805_6.3V6M

1

C128

2

22U_0805_6.3V6M

1

C127

2

22U_0805_6.3V6M

1

C120

C118

2

22U_0805_6.3V6M

1

C119

2

22U_0805_6.3V6M

1

2

22U_0805_6.3V6M

C150

Bottom Socket Edge

+CPU_CORE

1

+

C2

330U_D2_2V_Y

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

2

Compal Electronics, Inc.

SCHEMATICS,MB A7204

1

C109

2

10U_0805_10V6K

22U_0805_6.3V6M

1

C125

C121

2

22U_0805_6.3V6M

1

C117

2

330U_D2_2V_Y

1

+

C5

2

330U_D2_2V_Y

4019CU

10U_0805_10V6K

1

C110

2

1

@

2

1

+

C7

2

E

1

C111

@

2

10U_0805_10V6K

1

+

C9

2

330U_D2_2V_Y

853Thursday, January 13, 2011

1

2

330U_D2_2V_Y

1

+

C3

2

of

A

JCPUG

AT24

VAXG1

AT23

VAXG2

AT21

R14

R14 0_0402_5%

0_0402_5%

1 1

2 2

1 2

AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18

AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24

AL23

AL21

AL20

AL18

AL17

AK24

AK23

AK21

AK20

AK18

AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

33A

VCCPLL Decoupling: 1X 330U (6m ohm), 1X 10U, 2x1U

+1.8VS

R76

10U_0805_10V6K

3 3

4 4

12

0_0805_5%

330U_B2_2.5VM_R15M

C185

C185 @

@

1

+

2

C186

+1.8VS_VCCPLL

1

C206

2

1U_0402_6.3V6K

1

C230

C230 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1.2A

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

Sandy Bridge_rPGA_Rev0p61 @

B

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

GRAPHICS

DDR3 -1.5V RAILS

SA RAIL

VCCSA_SENSE

VCCSA_VID0

1.8V RAIL

08/18 Reserve R119 to follow CRB 1.0

VAXG_SENSE

SM_VREF

5A

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

6A

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

FC_C22

VCCSA_VID1

C

AK35 AK34

+V_SM_VREF should have 20 mil trace width

+V_SM_VREF_CNT +V_SM_VREF

AL1

12

R486

C148

@

100K_0402_5%

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

10U_0805_10V6K

1

0.1U_0402_16V4Z

2

10U_0805_10V6K

C114

R111

0_0402_5%

12

2

@

@ AP2302GN-HF_SOT23-3

AP2302GN-HF_SOT23-3

1

RUN_ON_CPU1.5VS3

1

C115

2

10U_0805_10V6K

Q2

C116

3

Bottom Socket Cavity

10U_0805_10V6K

M27 M26 L26 J26 J25 J24 H26 H25

10U_0805_10V6K

C100

10U_0805_10V6K

1

2

C447

10U_0805_10V6K

1

C476

2

10U_0805_10V6K

C477

@

Bottom Socket Edge

VCCSA_SENSE

H23

C22 C24

VCCSA_VID0

R114

10K_0402_5%

1 2

0_0402_5% @

R119

1 2

R95

@

1 2

+1.5V_CPU Decoupling: 1X 330U (6m ohm), 6X 10U

+1.5V_CPU

1

+

C875

C875 330U_2.5V_M_R17

330U_2.5V_M_R17

ESR 17mohm

2

10U_0805_10V6K

1

C154

C149

2

10U_0805_10V6K

12

R252

R252 1K_0402_5%

1K_0402_5%

1

2

10U_0805_10V6K

1

C155

2

+VCCSA Decoupling: 1X 330U (6m ohm), 3X 10U

+VCCSA

VCCSA_SENSE

1 2

R253 0_0402_5%R253 0_0402_5%

1

+

C877

C877 330U_2.5V_M_R17

330U_2.5V_M_R17 @

@

2

VCCSA_SENSE <46>

VCCSAP_VID1 <46>

+1.5V_CPU +1.5V

PS3@

C213 0.1U_0402_16V4Z

1 2

PS3@

C212 0.1U_0402_16V4Z

1 2

PS3@

C211 0.1U_0402_16V4Z

1 2

PS3@

C210 0.1U_0402_16V4Z

1 2

SUSP

R122

1K_0402_5%

470_0805_5%

D

PJ32

2

112

@

JUMP_43X118

@

8/20 Add PJ32 for Cost down +1.5V to +1.5V_CPU

0

1

0

1

0

11

1

C179

@ C179

R449

5

@

1 2 34

@

Q46B

2N7002KDWH_SOT363-6

10U_0805_10V4K

2

0.1U_0402_25V6

C472

+1.5VS

+1.5V_CPU

1

@

2

+VCCSAVCCSA_VID0 VCCSA_VID1

0.90 V

0.80 V

0.75 V

0.65 V

PJ30

@PJ30

@

2

112

JUMP_43X118

JUMP_43X118 Q33

@Q33

@

1

S

D

2

S

D

3

S

D

4

G

D

FDS6676AS_SO8

RUN_ON_CPU1.5VS3

12

R420

R420 820K_0402_5%@

820K_0402_5%@

For Sandy Bridge

+1.5V+1.5V_CPU

8 7 6 5

1 2

220K_0402_5%

61

Q46A

@

2N7002KDWH_SOT363-6

2

E

R455

@R455

@

+VSB

SUSP

SUSP <5,32,41>

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

953Thursday, January 13, 2011

E

A

of

A

JCPUH

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13

VSS9

1 1

2 2

3 3

4 4

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30

VSS35

AN27

VSS36

AN25

VSS37

AN22

VSS38

AN19

VSS39

AN16

VSS40

AN13

VSS41

AN10

VSS42

AN7

VSS43

AN4

VSS44

AM29

VSS45

AM25

VSS46

AM22

VSS47

AM19

VSS48

AM16

VSS49

AM13

VSS50

AM10

VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56

AL34

VSS57

AL31

VSS58

AL28

VSS59

AL25

VSS60

AL22

VSS61

AL19

VSS62

AL16

VSS63

AL13

VSS64

AL10

VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68

AK33

VSS69

AK30

VSS70

AK27

VSS71

AK25

VSS72

AK22

VSS73

AK19

VSS74

AK16

VSS75

AK13

VSS76

AK10

VSS77

AK7

VSS78

AK4

VSS79

AJ25

VSS80

Sandy Bridge_rPGA_Rev0p61 @

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

B

JCPUI

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

Sandy Bridge_rPGA_Rev0p61 @

VSS

F22

VSS234

F19

VSS235

E30

VSS236

E27

VSS237

E24

VSS238

E21

VSS239

E18

VSS240

E15

VSS241

E13

VSS242

E10

VSS243

E9

VSS244

E8

VSS245

E7

VSS246

E6

VSS247

E5

VSS248

E4

VSS249

E3

VSS250

E2

VSS251

E1

VSS252

D35

VSS253

D32

VSS254

D29

VSS255

D26

VSS256

D20

VSS257

D17

VSS258

C34

VSS259

C31

VSS260

C28

VSS261

C27

VSS262

C25

VSS263

C23

VSS264

C10

VSS265

C1

VSS266

B22

VSS267

B19

VSS268

B17

VSS269

B15

VSS270

B13

VSS271

B11

VSS272

B9

VSS273

B8

VSS274

B7

VSS275

B5

VSS276

B3

VSS277

B2

VSS278

A35

VSS279

A32

VSS280

A29

VSS281

A26

VSS282

A23

VSS283

A20

VSS284

A3

VSS285

PEG DEFER TRAINING

CFG7

C

JCPUE

CFG0<5>

T5 PADT5 PAD T6 PADT6 PAD T7 PADT7 PAD T11 PADT11 PAD T12 PADT12 PAD T15 PADT15 PAD T18 PADT18 PAD T16 PADT16 PAD T19 PADT19 PAD T21 PADT21 PAD T20 PADT20 PAD T44 PADT44 PAD T45 PADT45 PAD T46 PADT46 PAD T47 PADT47 PAD T26 PADT26 PAD T27 PADT27 PAD

T22 PADT22 PAD T24 PADT24 PAD T25 PADT25 PAD T23 PADT23 PAD

R115

1K_0402_1%

1: (Default) PEG Train immediately following xxRESETB de assertion

12

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

CPU_RSVD6 CPU_RSVD7

12

R116

R116 1K_0402_1%

1K_0402_1%

CFG7

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

RSVD1

AH31

RSVD2

AJ33

RSVD3

AH33

RSVD4

AJ26

RSVD5

SA_DIMM_VREFDQ

B4

RSVD6

D1

RSVD7

SB_DIMM_VREFDQ

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

VCCIO_SEL

J15

RSVD27

Sandy Bridge_rPGA_Rev0p61 @

12

R258

R258 1K_0402_1%

1K_0402_1% @

@

D

RSVD28 RSVD29 RSVD30 RSVD31 RSVD32

RSVD33 RSVD34 RSVD35

RSVD37 RSVD38 RSVD39 RSVD40

RSVD41 RSVD42 RSVD43 RSVD44 RSVD45

RSVD46 RSVD47 RSVD48 RSVD49 RSVD50

RESERVED

RSVD51 RSVD52

RSVD53

RSVD54 RSVD55

RSVD56 RSVD57 RSVD58

0: PEG Wait for BIOS for training

KEY

L7 AG7 AE7 AK2 W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AH27

AN35 AM35

AT2 AT1 AR1

B1

E

CFG Straps for Processor

(CFG[17:0] internal pull high to VCCIO)

CFG2

PEG Static Lane Reversal

- CFG2 is for the 16x

*

1: Normal Operation;

CFG2

Lane # definition matches socket pin map definition

12

R254

R254 1K_0402_1%

1K_0402_1%

0:Lane Reversed

T28 PADT28 PAD

CLK_RES_ITP <22> CLK_RES_ITP# <22>

CFG4

Embedded Display Port Presence Strap

CFG4

CFG6 CFG5

1K_0402_1%

12

R255

R255 1K_0402_1%

1K_0402_1% @

@

1 : Disabled; No

*

Physical Display Port attached to mbedded Display Port

0 : Enabled; An external Display Port device is connected to the Embedded Display Port

12

R256

R257

R256 1K_0402_1%

1K_0402_1% @

@

PCIE Port Bifurcation Straps

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1

*

function 1 enabled ; function 2 disabled

CFG[6:5]

01: Reserved (Device 1 function 1 disabled ; function 2 enabled)

00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

10 53Thursday, January 13, 2011

E

A

of

A

+VREF_DQA

1

C156

C157

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

1 1

Close to JDDRL.1

DDR_A_BS2<7>

2 2

DDRA_CLK0<7> DDRA_CLK0#<7>

DDR_A_BS0<7>

DDR_A_WE#<7>

DDR_A_CAS#<7>

DDRA_SCS1#<7>

3 3

+3VS

C181

4 4

C181

2.2U_0603_6.3V6K

1 C182

C182

2

1

2

R90

R90 10K_0402_5%

10K_0402_5%

1

2

0.1U_0402_16V4Z

A

DDR_A_D0 DDR_A_D1

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_D26 DDR_A_D27

DDRA_CKE0

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 DDRA_CLK0

DDRA_CLK0# DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDRA_SCS1#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_D58 DDR_A_D59

1 2

+0.75VS

12

R91

R91 10K_0402_5%

10K_0402_5%

+1.5V

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

JDDRL

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS

CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

FOX_AS0A626-U2SN-7F_204P

FOX_AS0A626-U2SN-7F_204P @

@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

CKE1

CK1#

RAS#

ODT0 ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

EVENT#

BOSS1 BOSS2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

VDD CK1

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

VSS SDA

SCL VTT

A15 A14

A11

A7 A6

A4 A2

A0

S0#

NC

B

+1.5V

2

DDR_A_D4

4

DDR_A_D5

6 8

DDR_A_DQS#0

10

DDR_A_DQS0

12 14

DDR_A_D6

16

DDR_A_D7

18 20

DDR_A_D12

22

DDR_A_D13

24 26 28

SM_DRAMRST#

30 32

DDR_A_D14

34

DDR_A_D15

36 38

DDR_A_D20

40

DDR_A_D21

42 44 46 48

DDR_A_D22

50

DDR_A_D23

52 54

DDR_A_D28

56

DDR_A_D29

58 60

DDR_A_DQS#3

62

DDR_A_DQS3

64 66

DDR_A_D30

68

DDR_A_D31

70 72

DDRA_CKE1

74 76

DDR_A_MA15

78

DDR_A_MA14

80 82

DDR_A_MA11

84

DDR_A_MA7

86 88

DDR_A_MA6

90

DDR_A_MA4

92 94

DDR_A_MA2

96

DDR_A_MA0

98 100

DDRA_CLK1

102

DDRA_CLK1#

104 106

DDR_A_BS1

108

DDR_A_RAS#

110 112

DDRA_SCS0#

114

DDRA_ODT0

116 118

DDRA_ODT1

120 122 124

+VREF_CAA

126 128

DDR_A_D36

130

DDR_A_D37

132 134 136 138

DDR_A_D38

140

DDR_A_D39

142 144

DDR_A_D44

146

DDR_A_D45

148 150

DDR_A_DQS#5

152

DDR_A_DQS5

154 156

DDR_A_D46

158

DDR_A_D47

160 162

DDR_A_D52

164

DDR_A_D53

166 168 170 172

DDR_A_D54

174

DDR_A_D55

176 178

DDR_A_D60

180

DDR_A_D61

182 184

DDR_A_DQS#7

186

DDR_A_DQS7

188 190

DDR_A_D62

192

DDR_A_D63

194 196 198

PM_SMBDATA

200

PM_SMBCLK

202 204

+0.75VS

206 208

B

DDR3 SO-DIMM A Reverse Type

SM_DRAMRST# <7,12>

DDRA_CKE1 <7>DDRA_CKE0<7>

DDRA_CLK1 <7> DDRA_CLK1# <7>

DDR_A_BS1 <7> DDR_A_RAS# <7>

DDRA_SCS0# <7> DDRA_ODT0 <7>

DDRA_ODT1 <7>

1

C161

2.2U_0603_6.3V6K

close to JDDRL.126

PM_SMBDATA <12,22,32> PM_SMBCLK <12,22,32>

1

C162

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_A_DQS[0..7] <7> DDR_A_DQS#[0..7] <7> DDR_A_D[0..63] <7> DDR_A_MA[0..15] <7>

+VREF_DQA

+1.5V

12

R80

1K_0402_1%

12

R82

1K_0402_1%

Layout Note: Place near JDDRL

Change C218 to OSCON at DVT

+1.5V

@

+

C218 390U_2.5V_M_R10

1 2

C166 10U_0603_6.3V6MC166 10U_0603_6.3V6M

1 2

C168 10U_0603_6.3V6MC168 10U_0603_6.3V6M

1 2

C171 10U_0603_6.3V6MC171 10U_0603_6.3V6M

1 2

C174 10U_0603_6.3V6MC174 10U_0603_6.3V6M

1 2

C176 10U_0603_6.3V6MC176 10U_0603_6.3V6M

1 2

C178 10U_0603_6.3V6MC178 10U_0603_6.3V6M

1 2

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Layout Note: Place these 4 Caps near Command and Control signals of DIMMA

D

+1.5V

12

R79

1K_0402_1%

12

R81

1K_0402_1%

Layout Note: Place near JDDRL1.203 and 204

+1.5V +0.75VS

C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z

1 2

C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z

1 2

C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z

1 2

C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z

1 2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

E

C165 10U_0603_6.3V6MC165 10U_0603_6.3V6M

1 2

C169 1U_0402_6.3V6KC169 1U_0402_6.3V6K

12

C172 1U_0402_6.3V6KC172 1U_0402_6.3V6K

12

C175 1U_0402_6.3V6KC175 1U_0402_6.3V6K

12

C177 1U_0402_6.3V6KC177 1U_0402_6.3V6K

12

of

11 53Thursday, January 13, 2011

E

A

+VREF_DQB

1

C183

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

1 1

Close to JDDRH.1

DDRB_CKE0<7>

DDR_B_BS2<7>

2 2

DDRB_CLK0<7> DDRB_CLK0#<7>

DDR_B_WE#<7> DDR_B_CAS#<7>

DDRB_SCS1#<7>

3 3

+3VS

2.2U_0603_6.3V6K

4 4

C207

1

@

2

1

2

0.1U_0402_16V4Z

1

C184

0.1U_0402_16V4Z

0.1U_0402_16V4Z 2

R98

R98 10K_0402_5%

10K_0402_5%

R99

1 2

10K_0402_5%

C208

C208 @

@

DDR_B_D0 DDR_B_D1

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_D26 DDR_B_D27

DDRB_CKE0

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 DDRB_CLK0

DDRB_CLK0# DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDRB_SCS1#

DDR_B_D37 DDR_B_D36

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_D42 DDR_B_D43

DDR_B_D48 DDR_B_D49

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D54 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_D58 DDR_B_D59

1 2

A

+0.75VS

+1.5V

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71

73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203

205 207

JDDRH

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS DM0 VSS DQ2 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS DQ16 DQ17 VSS DQS2# DQS2 VSS DQ18 DQ19 VSS DQ24 DQ25 VSS DM3 VSS DQ26 DQ27 VSS

CKE0 VDD NC BA2 VDD A12/BC# A9 VDD A8 A5 VDD A3 A1 VDD CK0 CK0# VDD A10/AP BA0 VDD WE# CAS# VDD A13 S1# VDD TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT

GND1 GND2

FOX_AS0A626-UASN-7F_204P

FOX_AS0A626-UASN-7F_204P @

@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

CKE1

CK1#

RAS#

ODT0 ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

EVENT#

BOSS1 BOSS2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

VDD CK1

VDD BA1

VDD

VDD VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

VSS SDA

SCL VTT

A15 A14

A11

A7 A6

A4 A2

A0

S0#

NC

B

+1.5V

2

DDR_B_D4

4

DDR_B_D5

6 8

DDR_B_DQS#0

10

DDR_B_DQS0

12 14

DDR_B_D6

16

DDR_B_D7

18 20

DDR_B_D12

22

DDR_B_D13

24 26 28

SM_DRAMRST#

30 32

DDR_B_D14

34

DDR_B_D15

36 38

DDR_B_D20

40

DDR_B_D21

42 44 46 48

DDR_B_D22

50

DDR_B_D23

52 54

DDR_B_D28

56

DDR_B_D29

58 60

DDR_B_DQS#3

62

DDR_B_DQS3

64 66

DDR_B_D30

68

DDR_B_D31

70 72

DDRB_CKE1

74 76

DDR_B_MA15

78

DDR_B_MA14

80 82

DDR_B_MA11

84

DDR_B_MA7

86 88

DDR_B_MA6

90

DDR_B_MA4

92 94

DDR_B_MA2

96

DDR_B_MA0

98 100

DDRB_CLK1

102

DDRB_CLK1#

104 106

DDR_B_BS1

108

DDR_B_RAS#

110 112

DDRB_SCS0#

114

DDRB_ODT0

116 118

DDRB_ODT1

120 122 124

+VREF_CAB

126 128

DDR_B_D32

130

DDR_B_D33

132 134 136 138

DDR_B_D38

140

DDR_B_D39

142 144

DDR_B_D44

146

DDR_B_D45

148 150

DDR_B_DQS#5

152

DDR_B_DQS5

154 156

DDR_B_D46

158

DDR_B_D47

160 162

DDR_B_D52

164

DDR_B_D53

166 168 170 172

DDR_B_D50

174

DDR_B_D51

176 178

DDR_B_D60

180

DDR_B_D61

182 184

DDR_B_DQS#7

186

DDR_B_DQS7

188 190

DDR_B_D62

192

DDR_B_D63

194 196 198

PM_SMBDATA

200

PM_SMBCLK

202 204

+0.75VS

206 208

B

SM_DRAMRST# <7,11>

DDRB_CKE1 <7>

DDRB_CLK1 <7> DDRB_CLK1# <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>DDR_B_BS0<7>

DDRB_SCS0# <7> DDRB_ODT0 <7>

DDRB_ODT1 <7>

C187

Close to JDDRH.126

PM_SMBDATA <11,22,32> PM_SMBCLK <11,22,32>

Reverse Type DDR3 SO-DIMM B

+VREF_DQB

1

C188

0.1U_0402_16V4Z

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K 2

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

DDR_B_DQS#[0..7] <7> DDR_B_DQS[0..7] <7> DDR_B_D[0..63] <7> DDR_B_MA[0..15] <7>

+1.5V

12

R83

1K_0402_1%

12

R84

1K_0402_1%

+1.5V

12

R86

1K_0402_1%

12

R94

1K_0402_1%

Layout Note: Place near JDDRH

+1.5V

C192 10U_0603_6.3V6MC192 10U_0603_6.3V6M

1 2

C194 10U_0603_6.3V6MC194 10U_0603_6.3V6M

1 2

C197 10U_0603_6.3V6MC197 10U_0603_6.3V6M

1 2

C200 10U_0603_6.3V6MC200 10U_0603_6.3V6M

1 2

C202 10U_0603_6.3V6MC202 10U_0603_6.3V6M

1 2

C204 10U_0603_6.3V6MC204 10U_0603_6.3V6M

1 2

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Layout Note: Place these 4 Caps near Command and Control signals of DIMMB

D

C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z

1 2

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z

1 2

C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z

1 2

D

E

Layout Note: Place near JDDRH.203 and 204

+0.75VS+1.5V

C191 10U_0603_6.3V6MC191 10U_0603_6.3V6M

1 2

C195 1U_0402_6.3V6KC195 1U_0402_6.3V6K

12

C198 1U_0402_6.3V6KC198 1U_0402_6.3V6K

12

C201 1U_0402_6.3V6KC201 1U_0402_6.3V6K

12

C203 1U_0402_6.3V6KC203 1U_0402_6.3V6K

12

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

12 53Thursday, January 13, 2011

E

of

A

PCIE_CTX_C_GRX_P[8..15]<6> PCIE_CTX_C_GRX_N[8..15]<6> PCIE_GTX_C_CRX_P[8..15]<6> PCIE_GTX_C_CRX_N[8..15]<6>

1 1

2 2

PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_N11 PCIE_GTX_CRX_N11 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_P15

3 3

PCIE_GTX_C_CRX_N15

Differential signal

PLT_RST#<5,25,32,33,35,38,39>

4 4

PCIE_CTX_C_GRX_P[8..15] PCIE_CTX_C_GRX_N[8..15] PCIE_GTX_C_CRX_P[8..15] PCIE_GTX_C_CRX_N[8..15]

CV18 .1U_0402_16V7KCV18 .1U_0402_16V7K CV19 .1U_0402_16V7KCV19 .1U_0402_16V7K CV20 .1U_0402_16V7KCV20 .1U_0402_16V7K CV21 .1U_0402_16V7KCV21 .1U_0402_16V7K CV22 .1U_0402_16V7KCV22 .1U_0402_16V7K CV23 .1U_0402_16V7KCV23 .1U_0402_16V7K CV24 .1U_0402_16V7KCV24 .1U_0402_16V7K CV25 .1U_0402_16V7KCV25 .1U_0402_16V7K CV26 .1U_0402_16V7KCV26 .1U_0402_16V7K CV27 .1U_0402_16V7KCV27 .1U_0402_16V7K CV28 .1U_0402_16V7KCV28 .1U_0402_16V7K CV29 .1U_0402_16V7KCV29 .1U_0402_16V7K CV30 .1U_0402_16V7KCV30 .1U_0402_16V7K CV31 .1U_0402_16V7KCV31 .1U_0402_16V7K CV32 .1U_0402_16V7KCV32 .1U_0402_16V7K CV33 .1U_0402_16V7KCV33 .1U_0402_16V7K

+3VS

12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12

CLK_PCIE_VGA<22>

CLK_PCIE_VGA#<22>

1 2

RV13 200_0402_1%@RV13 200_0402_1%@

RV15 2.49K_0402_1%RV15 2.49K_0402_1%

1 2

RV18 0_0402_5%RV18 0_0402_5%

1 2

RV21 10K_0402_5%RV21 10K_0402_5%

PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8 PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15

PCIE_GTX_CRX_P8 PCIE_GTX_CRX_N8 PCIE_GTX_CRX_P9 PCIE_GTX_CRX_N9 PCIE_GTX_CRX_P10 PCIE_GTX_CRX_N10 PCIE_GTX_CRX_P11

PCIE_GTX_CRX_P12 PCIE_GTX_CRX_N12 PCIE_GTX_CRX_P13 PCIE_GTX_CRX_N13 PCIE_GTX_CRX_P14 PCIE_GTX_CRX_N14 PCIE_GTX_CRX_P15 PCIE_GTX_CRX_N15

PEX_TSTCLK_OUT PEX_TSTCLK_OUT# XTALSSIN

12

CLK_REQ#

R39 0_0402_5%

@

1 2

R405

10_0402_5%

@

10P_0402_50V8J

C88

B

UV1A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AF10

PEX_TSTCLK_OUT

AE10

PEX_TSTCLK_OUT_N

AG10

PEX_TERMP

AD9

PEX_RST_N

AE9

PEX_CLKREQ_N

N12M-GE-S-B1 BGA 533P

CLK_27MCLK_27M_IN

12

1

@

2

Part 1 of 5

CLK_27M <22>

Near GPU

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11

GPIO

GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_VREF DACA_RSET

DACB_HSYNC

DACB_VSYNC

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_VREF DACB_RSET

PCI EXPRESS

JTAG_TCK

JTAG_TDI JTAG_TDO JTAG_TMS

JTAG_TRST_N

TEST

TESTMODE

I2CA_SCL

I2CA_SDA

I2CB_SCL

I2CB_SDA

I2CC_SCL

I2CC_SDA

I2C DACADACB

GPIO20 GPIO21

I2CS_SCL

I2CS_SDA

XTAL_SSIN

XTAL_OUTBUFF

XTAL_OUT

XTAL_IN

CLK

N1 G1 C1 M2 M3 K3 K2 J2 C2 M1 D2 D1 J3 J1 K1 F3 G3 G2 F1 F2

AD2 AD1

AE2 AD3 AE3

AF1 AE1

U6 U4

T5 R4 T4

R6 V6

AF3 AG4 AE4 AF4 AG3

AD25

R1 T3

R2 R3

A2 B1

A3 A4

T1 T2

D11 E9 E10 D10

I2CB_SCL I2CB_SDA

C

VGA_PWM VGA_ENVDD VGA_ENBKL GPU_VID0 GPU_VID1

GPU_GPIO8 GPU_GPIO9

GPU_GPIO12

TV8@TV8@

DACA_VREF DACA_RSET

GPU_JTAG_TCK GPU_JTAG_TDI GPU_JTAG_TDO GPU_JTAG_TMS GPU_JTAG_TRST#

GPU_TESTMODE

I2CH_SCL I2CH_SDA

GPU_SMBCLK GPU_SMBDAT

XTALOUTBUFF NV_CLK_27M_OUT CLK_27M_IN

CLK_27M_IN

27MHZ_16PF_X5H027000FG1H

1

CV34

2

18P_0402_50V8J

VGA_PWM <19> VGA_ENVDD <19> VGA_ENBKL <38> GPU_VID0 <50> GPU_VID1 <50>

HDMI_HPD <26,30>

VGA_CRT_HSYNC <20> VGA_CRT_VSYNC <20>

VGA_CRT_R <20>

VGA_CRT_B <20>

VGA_CRT_G <20>

CV13 0.1U_0402_16V4ZCV13 0.1U_0402_16V4Z

1 2

RV6 124_0402_1%RV6 124_0402_1%

TV1@TV1@ TV2@TV2@ TV3@TV3@ TV4@TV4@

1 2

RV9 1K_0402_1%RV9 1K_0402_1%

VGA_CRT_CLK <20>

VGA_CRT_DATA <20>

LCD_EDID_CLK <19>

LCD_EDID_DATA <19>

1 2

RV12 10K_0402_5%RV12 10K_0402_5%

1 2

RV16 10K_0402_5%RV16 10K_0402_5%

YV1

1 2

1

CV35

2

FERMI Changed

NV_CLK_27M_OUT

18P_0402_50V8J

2.2K_0402_5%

GPU_SMBCLK

GPU_SMBDAT

D

VGA_CRT_CLK VGA_CRT_DATA I2CH_SCL I2CH_SDA I2CB_SCL I2CB_SDA GPU_GPIO8 GPU_GPIO9 GPU_GPIO12 LCD_EDID_CLK LCD_EDID_DATA

VGA_PWM VGA_ENBKL

HDMI_HPD

VGA_CRT_R VGA_CRT_G VGA_CRT_B

GPU_TESTMODE

+3VS

RV22

1 2

R25 100K_0402_5%

Close to GPU

RV3 150_0402_1%RV3 150_0402_1%

1 2

RV4 150_0402_1%RV4 150_0402_1%

1 2

RV5 150_0402_1%RV5 150_0402_1%

+3VS

RV25

2.2K_0402_5%

QV1A

1 2

12

RV7

@ RV7

@ 10K_0402_5%

10K_0402_5%

12

RV8

RV8 10K_0402_5%

10K_0402_5%

+3VS

2

2N7002KDWH_SOT363-6

61

2N7002KDWH_SOT363-6

5

1 2 1 2

1 2 1 2 1 2 1 2

1 2 1 2

@

QV1B

34

+3VS

RV234.7K_0402_5% RV234.7K_0402_5%

12

RV244.7K_0402_5% RV244.7K_0402_5%

12

RV10010K_0402_5% @RV10010K_0402_5% @

12

RV10110K_0402_5% @ RV10110K_0402_5% @

12

RV272.2K_0402_5% RV272.2K_0402_5% RV282.2K_0402_5% RV282.2K_0402_5% RV10210K_0402_5% RV10210K_0402_5%

12

RV2610K_0402_5% RV2610K_0402_5% RV2910K_0402_5% RV2910K_0402_5% RV142.2K_0402_5% RV142.2K_0402_5% RV172.2K_0402_5% RV172.2K_0402_5%

RV1010K_0402_5% RV1010K_0402_5% RV1110K_0402_5% RV1110K_0402_5%

EC_SMB_CK2 <22,38>

EC_SMB_DA2 <22,38>

E

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

13 53Thursday, January 13, 2011

E

A

of

A

UV1C

LCD_TXCLK+<19> LCD_TXCLK-<19>

LCD_TXOUT0+<19>

LCD_TXOUT0-<19>

LCD_TXOUT1+<19>

LCD_TXOUT1-<19>

LCD_TXOUT2+<19>

@

RV50

1 2

34.8K_0402_1%

RV56

34.8K_0402_1%

1 2

VGA_HDMI_CLK<30> VGA_HDMI_DATA<30>

VGA_HDMI_TX2+<30>

VGA_HDMI_TX2-<30>

VGA_HDMI_TX1+<30>

VGA_HDMI_TX1-<30>

VGA_HDMI_TX0+<30>

VGA_HDMI_TX0-<30>

VGA_HDMI_CLK+<30>

VGA_HDMI_CLK-<30>

HDMI@

1 2

HDMI@

1 2

LCD_TXOUT2-<19>

RV51

15K_0402_1%

1 2

RV57

@

4.99K_0402_1%

1 2

RV97

@

10K_0402_1%

1 2

RV41

4.99K_0402_1%

1 2

VGA_HDMI_CLK

VGA_HDMI_DATA

RV98

@

10K_0402_1%

RV99

20K_0402_1%

1 2

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

1 2

VGA_HDMI_CLK VGA_HDMI_DATA VGA_HDMI_TX2+ VGA_HDMI_TX2VGA_HDMI_TX1+ VGA_HDMI_TX1VGA_HDMI_TX0+ VGA_HDMI_TX0VGA_HDMI_CLK+ VGA_HDMI_CLK-

+3VS

1 1

RV49

1 2

45.3K_0402_1%

RV55

@

4.99K_0402_1%

1 2

2 2

+3VS

RV119 4.7K_0402_5%

3 3

RV120 4.7K_0402_5%

AC4

IFPA_TXC

AD4

IFPA_TXC_N

V5

IFPA_TXD0

V4

IFPA_TXD0_N

AA5

IFPA_TXD1

AA4

IFPA_TXD1_N

W4

IFPA_TXD2

Y4

IFPA_TXD2_N

AB4

IFPA_TXD3

AB5

IFPA_TXD3_N

AB3

IFPB_TXC

AB2

IFPB_TXC_N

W1

IFPB_TXD4

V1

IFPB_TXD4_N

W3

IFPB_TXD5

W2

IFPB_TXD5_N

AA2

IFPB_TXD6

AA3

IFPB_TXD6_N

AB1

IFPB_TXD7

AA1

IFPB_TXD7_N

G4

IFPC_AUX_I2CW_SCL

G5

IFPC_AUX_I2CW_SDA_N

P4

IFPC_L0

N4

IFPC_L0_N

M5

IFPC_L1

M4

IFPC_L1_N

L4

IFPC_L2

K4

IFPC_L2_N

H4

IFPC_L3

J4

IFPC_L3_N

D3

IFPD_AUX_I2CX_SCL

D4

IFPD_AUX_I2CX_SDA_N

F5

IFPD_L0

F4

IFPD_L0_N

E4

IFPD_L1

D5

IFPD_L1_N

C3

IFPD_L2

C4

IFPD_L2_N

B3

IFPD_L3

B4

IFPD_L3_N

F7

IFPE_AUX_I2CY_SCL

G6

IFPE_AUX_I2CY_SDA_N

D6

IFPE_L0

C6

IFPE_L0_N

A6

IFPE_L1

A7

IFPE_L1_N

B6

IFPE_L2

B7

IFPE_L2_N

E6

IFPE_L3

E7

IFPE_L3_N

N12M-GE-S-B1 BGA 533P

Physical Strapping pin

ROM_SO FB_0_BAR_SIZE ROM_SCLK ROM_SI STRAP2

+3VS

STRAP1 STRAP0

B

Part 3 of 5

MULTI_STRAP_REF2_GND

LVDS / TMDS

Power Rail

+3VS +3VS +3VS +3VS +3VS +3VS

PGOOD

NCDBG

DBG_DATA1 DBG_DATA2 DBG_DATA3 DBG_DATA4

STRAP0 STRAP1 STRAP2

BUFRST_N

THERMDN

THERMDP

STRAP4

GENERAL STRAPSERIAL

STRAP3

ROM_CS_N

ROM_SCLK

ROM_SI

ROM_SO

IFPAB_RSET

IFPC_RSET IFPD_RSET

IFPE_RSET

Logical Strapping Bit3

XCLK_417 PCI_DEVID[4]

PCI_DEVID[3] 3GIO_PADCFG[3] USER[3]

C15

NC

D15

NC

J5

T6 W6 Y6 AA6 N3

C7 B9 A9

N5

D8 D9

N2 F9

B10 C9 A10 C10

AB6 R5 M6 F8

1 2

RV1 10K_0402_1%@RV1 10K_0402_1%@

GB1B-64 : PGOOD

1 2

RV2 40.2_0402_1%RV2 40.2_0402_1%

GB1B-64 : MULTI_STRAP_REF2_GND

STRAP0 STRAP1 STRAP2

STRAP4 STRAP3

ROM_SCLK_GPU ROM_SI_GPU ROM_SO_GPU

1 2

RV32 1K_0402_1%@RV32 1K_0402_1%@

1 2

RV45 1K_0402_1%@RV45 1K_0402_1%@

1 2

RV47 1K_0402_1%@RV47 1K_0402_1%@

1 2

RV48 1K_0402_1%@RV48 1K_0402_1%@

C

Fermi changed

Logical Strapping Bit2

SUB_VENDOR

Logical Strapping Bit1

SLOT_CLK_CFG RAMCFG[1]RAMCFG[3] RAMCFG[2]

UV1E

B2

GND

B5

GND

B8

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B26

GND

E2

GND

E5

GND

E8

GND

E11

GND

E17

GND

E20

GND

E23

GND

E26

GND

H2

GND

H5

GND

J11

GND

J14

GND

J17

GND

K9

GND

K19

GND

L2

GND

L5

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

P2

GND

P5

GND

P9

GND

P19

GND

P23

GND

P26

GND

T12

GND

T13

GND

W16

GND_SENSE

E14

GND_SENSE

N12M-GE-S-B1 BGA 533P

Logical Strapping Bit0

VGA_DEVICESMB_ALT_ADDR

PEX_PLLEN_TERM RAMCFG[0] PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2] 3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2] USER[0]USER[1]USER[2]

D

Part 5 of 5

GND

FB_CAL_PU_GND

FB_CAL_TERM_GND MULTI_STRAP_REF0_GND MULTI_STRAP_REF1_GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

U2 U5 U11 U12 U13 U14 U15 U16 U17 U23 U26 V9 V19 W11 W14 W17 Y2 Y5 Y23 Y26 AC2 AC5 AC6 AC8 AC11 AC14 AC17 AC20 AC23 AC26 AF2 AF5 AF8 AF11 AF14 AF17 AF20 AF23 AF26 T16 T15 T14 F6

1 2

A15

RV42 40.2_0402_1%RV42 40.2_0402_1%

1 2

B16

RV43 60.4_0402_1%RV43 60.4_0402_1%

1 2

F11

RV44 40.2K_0402_1%RV44 40.2K_0402_1%

1 2

F10

RV46 40.2K_0402_1%RV46 40.2K_0402_1%

E

Resistor Values

RV52

@

15K_0402_1%

1 2

RV53

RV54

@

1 2

4.99K_0402_1%

1 2

4.99K_0402_1%

4.99K_0402_1% ROM_SCLK_GPU

ROM_SI_GPU ROM_SO_GPU

5K 10K 15K 20K 25K 30K

@

15K_0402_1%

4 4

1 2

X76

1 2

10K_0402_1%

1 2

A

RV60

RV59

RV58

15K_0402_1%

@

35K 45K

B

Pull-up to +3VS

1000 1001 1010 1011 1100 1101 1110 1111

Pull-down to Gnd

0000 0001 0010 0011 0100 0101 0110

Hynix (800MHZ) 64M16 H5TQ1G63DFR-12C SA0000324C0

Samsung (800MHZ) 64MX16 K4W1G1646G-BC12 SA00004HS00

512MB(64Mx16)

1GB (128Mx16)

512MB(64Mx16)

1GB (128Mx16)

0111

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

0010

0110

0011

0111

RV59 PD 15K

RV59 PD 34.8K (SD034348280)

RV59 PD 20K (SD034200280)

RV59 PD 45.3K (SD034453280)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

(SD034150280)

4019CU

14 53Thursday, January 13, 2011

of

E

of

A

.1U_0402_16V7K

CV40

CV161

+VGA_CORE

1

+

C876

2

.1U_0402_16V7K

CV50

1

2

0.022U_0402_25V7K

1

CV44

2

@

CV164

.1U_0402_16V7K

CV41

1

2

1U_0402_6.3V6K

1

CV58

2

NV DG for VDD Cap:

0.01uF 10% X7R x6

0.047uF 10% X7R x3

0.1uF 10% X7R x1

4.7uF 10% X5R x1 For GB1b-64 add:

4.7u X5R x1

1 1

1

2

.1U_0402_16V7K

CV49

CV162

330U_2.5V_M_R17

1

2

0.022U_0402_25V7K

1

2

under GPU

+3VS

2 2

+1.8VS

3 3

220R 100MHZ

LV11 PBY160808T-221Y-N_2PLV11 PBY160808T-221Y-N_2P

12

4.7U_0603_6.3V6K

1

2

CV175

220R 100MHZ

LV1

PBY160808T-221Y-N_2P

1 2

285mA

+IFPAB_IOVDD

1U_0402_6.3V6K

.1U_0402_16V7K

1

CV172

2

+3.3V_RUN_VDD33

+3VS

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CV80

CV80

1

2

.1U_0402_16V7K

CV166

1

2

4.7U_0603_6.3V6K

1

2

CV174

1U_0402_6.3V6K

1

CV74

2

.1U_0402_16V7K

CV81

1

2

CV75

22U_0603_6.3V6M

1

2

.1U_0402_16V7K

CV51

1

2

1

2

0.022U_0402_25V7K

.1U_0402_16V7K

1

CV68

2

CV59

B

CV163

1

2

+VGA_CORE

22U_0603_6.3V6M

1

2

1U_0402_6.3V6K

CV42

1

2

1

CV60

2

0.022U_0402_25V7K

.1U_0402_16V7K

CV76

1U_0402_6.3V6K

1

2

1

2

0.022U_0402_25V7K

.1U_0402_16V7K

1

CV69

120mA

2

120mA

+IFPAB_IOVDD

+IFPAB_PLLVDD

CV43

12

RV20

RV20 10K_0402_5%

10K_0402_5%

UV1D

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

A12

VDD33

B12

VDD33

C12

VDD33

D12

VDD33

E12

VDD33

F12

VDD33

AG9

PEX_SVDD_3V3

V3

IFPA_IOVDD

V2

IFPB_IOVDD

J6

IFPCD_IOVDD

H6

IFPE_IOVDD

AD5

IFPAB_PLLVDD

P6

IFPC_PLLVDD

N6

IFPD_PLLVDD

D7

IFPE_PLLVDD

N12M-GE-S-B1 BGA 533P

Part 4 of 5

POWER

2A

FB_CAL_PD_VDDQ

C

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD FB_PLLAVDD FB_PLLAVDD FB_DLLAVDD

DACA_VDD DACB_VDD

VDD_SENSE VDD_SENSE

A13

2.97A

B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19 L19 L23 L26 M19 N22 U22 Y22

AG6 AF6 AE6 AD6 AC13 AC7 AB17 AB16 AB13 AB9 AB8 AB7

AG7 AF7 AE7 AD8 AD7 AC9

+PEX_PLLVDD

AF9

+PLLVDD

K6 L6 K5 R19

100mA

AC19 T19

100mA

+DACA_VDD

AG2

1 2

W5

RV63 10K_0402_1%RV63 10K_0402_1%

+1.5V_MEM_VDDQ

B15 W15 E15

route as 50ohm

D

ClosetoPin C1747tobeclosetotheGPU

0.01U_0402_25V7K

CV53

0.01U_0402_25V7K

1

2

1

2

0.047U_0402_25V6K

.1U_0402_16V7K

1

2

.1U_0402_16V7K

1

2

0.01U_0402_25V7K

0.01U_0402_25V7K CV38

CV38

1

2

1

CV52

2

0.047U_0402_25V6K

.1U_0402_16V7K

CV61

1

2

PLACECLOSETOBALL PLACENEARGPU

.1U_0402_16V7K

CV70

1

2

0.01U_0402_25V7K

CV45

CV62

CV71

CV54

CV46

1

2

1

2

0.047U_0402_25V6K

1U_0402_6.3V6K

CV63

1

2

1U_0402_6.3V6K

CV72

1

2

1

@

2

1

2

1

2

1U_0402_6.3V6K

CV47

1U_0402_6.3V6K

CV64

1U_0402_6.3V6K

CV73

1

2

1

2

1

2

120mA

PLACENEARGPU

12

20 mil

CV82

+1.5V_MEM_GFX

1U_0402_6.3V6K

1

2

add for GB1b-64

120mA

+PEX_PLLVDD

.1U_0402_16V7K

1

2

+FB_AVDD

VDD_SENSE <50>

RV65 40.2_0402_1%RV65 40.2_0402_1%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CV48

CV48

1

@

2

4.7U_0603_6.3V6K

CV65

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CV77

CV77

1

2

10U_0603_6.3V6M

1

CV83

2

add for GB1b-64

CV90

1

2

E

10U_0603_6.3V6M

+1.5V_MEM_GFX

CV39

N10M SPEC FBVDDQ TYP. 1.8V.

+1.5V_MEM_GFX

+1.05VS_VCCP

22U_0805_6.3V6M

10U_0603_6.3V6M

CV67

1

2

10U_0603_6.3V6M

1

2

.1U_0402_16V7K

1

2

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CV93

CV93

1

2

CV67

CV79

CV165

SBK160808T-300Y-N_2P

SBK160808T-121Y-N_2P

CV66

+1.05VS_VCCP

22U_0805_6.3V6M

CV78

1U_0402_6.3V6K

CV92

LV2

+1.05VS_VCCP

LV4

12

+1.05VS_VCCP

12

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CV91

CV91

1

2

+1.05VS_VCCP

4 4

LV10

SBK160808T-121Y-N_2P

12

285mA

+IFPAB_PLLVDD

4.7U_0603_6.3V6K

1U_0402_6.3V6K

1

CV171

CV168

2

add for GB1b-64

CV168

2

.1U_0402_16V7K

1

2

CV167

1

2

LV3

SBK160808T-300Y-N_2P

22U_0603_6.3V6M

CV84

12

150mA,10mil

.1U_0402_16V7K

CV87

1

2

.1U_0402_16V7K

CV88

1

2

+PLLVDD

CV179

.1U_0402_16V7K

CV180

1

2

10U_0603_6.3V6M

CV181

1

2

120mA

+DACA_VDD

1U_0402_6.3V6K

1

2

add for GB1b-64

.1U_0402_16V7K

CV107

1

2

CV109

.1U_0402_16V7K

CV110

1

2

1

2

300ohm 100MHz ESR0.25ohm

.1U_0402_16V7K

CV108

CV112

1

2

MMZ1608D301BT_2P

4.7U_0603_6.3V6K

1

2

LV7

1 2

CV113

+3VS+1.05VS_VCCP

4.7U_0603_6.3V6K

CV114

1

2

add for GB1b-64

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

15 53Thursday, January 13, 2011

E

A

of

A

B

C

D

E

FBAD[0..63] FBA_CMD[0..30] DQMA#[0..7] DQSA_RN[0..7]

1 1

2 2

3 3

DQSA_WP[0..7]

12

+1.5V_MEM_GFX

1.1K_0402_1%

12

10K_0402_5%

RV66

10K_0402_5%

RV68

10K_0402_5%

RV71

10K_0402_5%

RV72

10K_0402_5%

RV75

RV77

FBAD[0..63] <17,18> FBA_CMD[0..30] <17,18> DQMA#[0..7] <17,18> DQSA_RN[0..7] <17,18> DQSA_WP[0..7] <17,18>

FBA_CMD3

CKE_1

FBA_CMD19

ODT_2

FBA_CMD0

ODT_1

FBA_CMD16

CKE_2

FBA_CMD20

RST

FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63

UV1B

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

N12M-GE-S-B1 BGA 533P

Part 2 of 5

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0

FBA_DQM1

FBA_DQM2

FBA_DQM3

FBA_DQM4

FBA_DQM5

FBA_DQM6

FBA_DQM7

FBA_DQS_RN0

MEMORY INTERFACE

FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0_N

FBA_CLK1_N

FBA_DEBUG

FB_VREF

FBA_CLK0

FBA_CLK1

G24 F27 F25 F26 G26 G27 G25 J25 J24 H24 H22 J26 G22 G23 J22 J27 M24 L24 J23 K23 K22 M23 K24 M27 N27 M26 K26 K27 K25 M25 L22

C26 B19 D19 D23 T24 AA23 AB27 T26

D25 A18 E18 B24 R22 Y24 AA27 R27

C25 A19 E19 A24 T22 AA24 AA26 T27

A16 F24

F23 N24

N23 M22

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

DQSA_RN0 DQSA_RN1 DQSA_RN2 DQSA_RN3 DQSA_RN4 DQSA_RN5 DQSA_RN6 DQSA_RN7

DQSA_WP0 DQSA_WP1 DQSA_WP2 DQSA_WP3 DQSA_WP4 DQSA_WP5 DQSA_WP6 DQSA_WP7

+FB_VREF

1 2

RV76 10K_0402_5%RV76 10K_0402_5%

Mode E - Mirror Mode Mapping

TV6PAD~D @TV6PAD~D @

TV5PAD~D @TV5PAD~D @

CLKA0 <17> CLKA0# <17>

CLKA1 <18> CLKA1# <18>

+1.5V_MEM_GFX

Address

CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14

CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30

DATA Bus

0..31 ODT_L CS1#_L CS0#_L CKE_L

A9 A6 A3 A0 A8 A12 A1 RAS# A13 BA1 A14 CAS#CMD15

RST A7 A4 A11 A2 A10 A5 BA2 WE# BA0 A15

32..63

A11 A7 BA1 A12 A8 A0 A2 RAS# A14 A3 A13 CAS#

CKE_H CS1#_H CS0#_H ODT_H

RST

A6

A5

A9

A1

WE#

A4

A15

A10

BA0

BA2

16mil

+FB_VREF

1.1K_0402_1%

4 4

1.1K_0402_1% @

@

0.01U_0402_25V7K

12

RV78

1

CV128

2

A

B

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

16 53Thursday, January 13, 2011

E

of

A

B

C

D

E

Memory Partition A - Lower 32 bits

16mil

+FBA_VREF0

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14

FBA_CMD29 FBA_CMD13 FBA_CMD27

FBA_CMD3

FBA_CMD0 FBA_CMD2 FBA_CMD11 FBA_CMD11 FBA_CMD15 FBA_CMD28

DQSA_WP0 DQSA_WP2

DQMA#0 DQMA#2

DQSA_RN0 DQSA_RN2

FBA_CMD20

243_0402_1%

12

RV82

1U_0402_6.3V6K

CV2

1U_0402_6.3V6K

1

2

1

CV130

CV131

2

12

RV81

RV81 243_0402_1%

243_0402_1%

+1.5V_MEM_GFX

1.1K_0402_1%

12

RV80

1.1K_0402_1%

1.1K_0402_1% RV79

RV79

12

CLKA0

CLKA0#

+FBA_VREF0

0.01U_0402_25V7K

0.01U_0402_25V7K CV129

CV129

1

2

CLKA0<16> CLKA0#<16>

1U_0402_6.3V6K

1

CV1

2

+1.5V_MEM_GFX

1

2

1 1

2 2

3 3

UV4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

.1U_0402_16V7K

1

CV133

CV132

2

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

.1U_0402_16V7K

1

CV134

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

.1U_0402_16V7K

1

CV135

2

FBAD1

E3

FBAD6

F7

FBAD0

F2

FBAD7

F8

FBAD3

H3

FBAD5

H8

FBAD2

G2

FBAD4

H7

FBAD17

D7

FBAD21

C3

FBAD19

C8

FBAD20

C2

FBAD18

A7

FBAD22

A2

FBAD16

B8

FBAD23

A3

+1.5V_MEM_GFX +1.5V_MEM_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

.1U_0402_16V7K

CV136

16mil

Group2

1U_0402_6.3V6K

1

CV3

2

12

243_0402_1%

RV83

+1.5V_MEM_GFX

1U_0402_6.3V6K

1

CV4

2

+FBA_VREF0

FBA_CMD7 FBA_CMD10 FBA_CMD24 FBA_CMD6 FBA_CMD22 FBA_CMD26 FBA_CMD5 FBA_CMD21 FBA_CMD8 FBA_CMD4 FBA_CMD25 FBA_CMD23 FBA_CMD9 FBA_CMD12 FBA_CMD14 FBA_CMD30FBA_CMD30

FBA_CMD29 FBA_CMD13 FBA_CMD27

CLKA0 CLKA0# FBA_CMD3

FBA_CMD0 FBA_CMD2

FBA_CMD15 FBA_CMD28

DQSA_WP3 DQSA_WP1

DQMA#3 DQMA#1

DQSA_RN3 DQSA_RN1

FBA_CMD20

1U_0402_6.3V6K

1

CV137

2

CV138

.1U_0402_16V7K

CV139

1

2

UV3

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

.1U_0402_16V7K

CV140

CV141

1

2

CV141

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

.1U_0402_16V7K

CV142

1

2

FBAD30

E3

FBAD24

F7

FBAD31

F2

FBAD28

F8

FBAD29

H3

FBAD26

H8

FBAD25

G2

FBAD27

H7

FBAD14

D7

FBAD10

C3

FBAD15

C8

FBAD11

C2

FBAD12

A7

FBAD8

A2

FBAD13

B8

FBAD9

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

CV143

Group3Group0

Group1

Mode E - Mirror Mode Mapping

FBA_CMD[0..30] FBAD[0..63] DQMA#[0..7] DQSA_RN[0..7] DQSA_WP[0..7]

Address

CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14

CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30

0..31 ODT_L CS1#_L CS0#_L CKE_L

A9 A6 A3 A0 A8 A12 A1 RAS# A13 BA1 A14 CAS#CMD15

RST A7 A4 A11 A2 A10 A5 BA2 WE# BA0 A15

FBA_CMD[0..30] <16,18> FBAD[0..63] <16,18> DQMA#[0..7] <16,18> DQSA_RN[0..7] <16,18> DQSA_WP[0..7] <16,18>

DATA Bus

32..63

A11 A7 BA1 A12 A8 A0 A2 RAS# A14 A3 A13 CAS#

CKE_H CS1#_H CS0#_H ODT_H

RST

A6

A5

A9

A1

WE#

A4

A15

A10

BA0

BA2

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

17 53Thursday, January 13, 2011

E

A

of

A

B

Memory Partition A - Upper 32 bits

C

D

E

1U_0402_6.3V6K

1

CV7

2

16mil

1U_0402_6.3V6K

1

CV8

2

12

243_0402_1%

RV88

1U_0402_6.3V6K

1

CV152

2

+FBA_VREF1

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12 FBA_CMD27

FBA_CMD29 FBA_CMD6 FBA_CMD30

CLKA1 CLKA1# FBA_CMD16

FBA_CMD19 FBA_CMD18

FBA_CMD15 FBA_CMD25

DQSA_WP7 DQSA_WP6

DQMA#7 DQMA#6

DQSA_RN7 DQSA_RN6

FBA_CMD20

1U_0402_6.3V6K

1

CV153

2

.1U_0402_16V7K

CV154

1

2

UV6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

.1U_0402_16V7K

CV155

CV156

1

2

CV156

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

.1U_0402_16V7K

CV157

1

2

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

+1.5V_MEM_GFX

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

.1U_0402_16V7K

CV158

1

2

FBAD61 FBAD57 FBAD58 FBAD60 FBAD56 FBAD62 FBAD59 FBAD63

FBAD51 FBAD52 FBAD49 FBAD53 FBAD48 FBAD54 FBAD50 FBAD55

Group7

FBAD[0..63] FBA_CMD[0..30] DQMA#[0..7] DQSA_RN[0..7] DQSA_WP[0..7]

FBAD[0..63] <16,17> FBA_CMD[0..30] <16,17> DQMA#[0..7] <16,17> DQSA_RN[0..7] <16,17> DQSA_WP[0..7] <16,17>

Group6

Mode E - Mirror Mode Mapping

Address

CMD0 CMD1 CMD2 CMD3 CMD4 CMD5 CMD6 CMD7 CMD8 CMD9 CMD10 CMD11 CMD12 CMD13 CMD14

CMD16 CMD17 CMD18 CMD19 CMD20 CMD21 CMD22 CMD23 CMD24 CMD25 CMD26 CMD27 CMD28 CMD29 CMD30

DATA Bus

0..31 ODT_L CS1#_L CS0#_L CKE_L

A9 A6 A3 A0 A8 A12 A1 RAS# A13 BA1 A14 CAS#CMD15

RST A7 A4 A11 A2 A10 A5 BA2 WE# BA0 A15

32..63

CS1#_H CS0#_H ODT_H

A11 A7 BA1 A12 A8 A0 A2 RAS# A14 A3 A13 CAS# CKE_H

RST A6 A5 A9 A1 WE# A4 A15 A10 BA0 BA2

16mil

+FBA_VREF1

1 1

+1.5V_MEM_GFX

1.1K_0402_1%

1.1K_0402_1% RV84

RV84

12

+FBA_VREF1

1.1K_0402_1%

0.01U_0402_25V7K

12

RV85

CV144

1

2

CLKA1<16> CLKA1#<16>

2 2

CLKA1

12

RV86

RV86 243_0402_1%

243_0402_1%

CLKA1#

12

3 3

1U_0402_6.3V6K

1

CV5

2

FBA_CMD9 FBA_CMD24 FBA_CMD10 FBA_CMD13 FBA_CMD26 FBA_CMD22 FBA_CMD21 FBA_CMD5 FBA_CMD8 FBA_CMD23 FBA_CMD28 FBA_CMD4 FBA_CMD7 FBA_CMD14 FBA_CMD12 FBA_CMD27

FBA_CMD29 FBA_CMD6 FBA_CMD30

FBA_CMD16

FBA_CMD19 FBA_CMD18 FBA_CMD11 FBA_CMD11 FBA_CMD15 FBA_CMD25

DQSA_WP4 DQSA_WP5

DQMA#4 DQMA#5

DQSA_RN4 DQSA_RN5

FBA_CMD20

243_0402_1%

RV87

+1.5V_MEM_GFX +1.5V_MEM_GFX

1U_0402_6.3V6K

1

CV6

2

1

CV145

2

M8

H1 N3

P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M7

M2

N8

M3

J7 K7 K9

K1 L2

J3 K3 L3

F3 C7

E7 D3

G3

B7

T2 L8

J1 L1

J9 L9

1U_0402_6.3V6K

1

CV146

2

UV5

.1U_0402_16V7K

CV148

1

2

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

2

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

.1U_0402_16V7K

CV147

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

.1U_0402_16V7K

CV149

1

2

FBAD35 FBAD32 FBAD38 FBAD33 FBAD37 FBAD34 FBAD39 FBAD36

FBAD42 FBAD46 FBAD40 FBAD45 FBAD44 FBAD43 FBAD41 FBAD47

+1.5V_MEM_GFX

.1U_0402_16V7K

CV150

1

2

CV151

Group4

Group5

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

18 53Thursday, January 13, 2011

E

A

of

A

1 1

USB20_P11<25>

USB20_N11<25>

Reserve for EMI request

@

1 2

R78 0_0402_5%

R78 0_0402_5% L55

1

4

WCM-2012-900T_0805

@

1 2

R96 0_0402_5%

8/20 Swap USB20_P11 and USB20_N11 for layout request

2 2

LCD/PANEL BD. Conn.

Pin13 GND for EMI , But Cable is NC

JLVDS

@JLVDS

@

1

31

G1

32

G2

33

G3

34

G4

3 3

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

ACES_88341-3001

CAM@L55

CAM@

B

2

3

USB20_N11_R USB20_P11_R

INT_MIC_CLK INT_MIC_DATA +LCD_VDD_R

LCD_EDID_CLK LCD_EDID_DATA

VGA_D_PWM BKOFF#_R

USB20_P11_R

USB20_N11_R

0.1U_0402_16V4Z

LCD_TXOUT0+ <14>

LCD_TXOUT1+ <14>

LCD_TXOUT2+ <14>

CAM@

+3VS_LVDS_CAM

12

C225

LCD_EDID_CLK <13>

LCD_EDID_DATA <13>

LCD_TXOUT0- <14>

LCD_TXOUT1- <14>

LCD_TXOUT2- <14>

LCD_TXCLK- <14>

LCD_TXCLK+ <14>

68P_0402_50V8J

150_0603_5%

2N7002KDWH_SOT363-6

VGA_ENVDD<13>

W=20mils

CAM@

INT_MIC_CLK <36>

INT_MIC_DATA <36>

For EMI

@

C231

680P_0402_50V7K

R120

1 2

D2

1 2

RB751V40_SC76-2

RB751V40_SC76-2 D1

D1

1 2

RB751V40_SC76-2

1 2

R113 10K_0402_5%R113 10K_0402_5%

+LCD_INV

Rated Current MAX:600mA

1

2

1

C235

0.1U_0402_25V6

2

C234

C

12

R107

12

R3880_0603_5%

D84

2 3

PACDN042Y3R_SOT23-3

1

2

47K_0402_5%

FBMA-L11-201209-221LMA30T_0805

100K_0402_5%

61

Q1A

2

R112

R112 100K_0402_5%

100K_0402_5%

1 2

+3VS

@D84

@

1

C232

0.1U_0402_16V4Z

2

VGA_PWM <13>

BKOFF# <38>

+3VS

R108

5

12

+3VS+LCD_VDD

12

R109

1 2

47K_0402_5%

34

0.01U_0402_25V7K

Q1B

Q1B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

B+

L2

C228

0.1U_0402_16V7K

0.1U_0402_16V7K LCDPWR_GATE

C229

+LCD_VDD_R

W=80mils

2

1 1

2

L15

0_0805_5%

1

C226

0.1U_0402_16V4Z

2

G

2

1.5A

12

D

+3VS

S

Q17

Q17 AO3413_SOT23

AO3413_SOT23

D

1 3

+LCD_VDD

1

C227

4.7U_0805_10V4Z

2

W=80mils

1

C233

0.1U_0402_16V4Z

2

E

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

19 53Thursday, January 13, 2011

E

A

of

A

B

C

D

E

1

D3

DAN217_SC59

1 2 1 2 1 2

1

2

2.2P_0402_50V8C

2

5

P

A2Y

G

3

C241

1

1 1

VGA_CRT_R<13> VGA_CRT_G<13> VGA_CRT_B<13>

R138

R139

R140

12

150_0402_1%

2 2

C244 0.1U_0402_16V4ZC244 0.1U_0402_16V4Z

VGA_CRT_HSYNC<13>

SN74AHCT1G125GW_SOT353-5

VGA_CRT_VSYNC<13>

C238

150_0402_1%

+CRT_VCC

1 2

1

C239

2

2.2P_0402_50V8C

1

5

P

A2Y

G

3

L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402 L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402 L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402

1

C240

2

2.2P_0402_50V8C

4

OE#

+CRT_VCC

U6

SN74AHCT1G125GW_SOT353-5

1

@D3

@

D4

DAN217_SC59

3

2

1

C242

2

2.2P_0402_50V8C

R141 10K_0402_5%R141 10K_0402_5%

4

OE#

U7

D5

@D4

@

DAN217_SC59

2

3

1

2

2.2P_0402_50V8C

12

D_CRT_HSYNC

D_CRT_VSYNC

1

C243

@D5

@

3

+3VS

1

2

2.2P_0402_50V8C

1 2

L6 10_0402_5%L6 10_0402_5%

1 2

L7 10_0402_5%L7 10_0402_5%

CRT_R_L CRT_G_L

CRT_B_L

C246

C246 @

@

If=1A

D6

2 3

+CRT_VCC

HSYNC

VSYNC

1

2

10P_0402_50V8J

1

RB491D_SOT23-3

CRT_R_L CRT_DDC_DAT

CRT_G_L HSYNC

CRT_B_L VSYNC

CRT_DDC_CLK

F1

21

1.1A_6V_MINISMDC110F-2

T76 PADT76 PAD

T77 PADT77 PAD

+5VS +CRT_VCC_R +CRT_VCC

1

C245

C245 @

@

2

10P_0402_50V8J

40 mils

C237

0.1U_0402_16V4Z

0.1U_0402_16V4Z @

@

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

ALLTO_C10532-11505-L_15P-T

JCRT

6 11 1 7 12 2 8 13 3 9 14 4 10 15 5

1

2

@JCRT

@

16

G

17

G

CRT CONNECTOR

3 3

+CRT_VCC

+3VS

R159

@

R159

4.7K_0402_5%

1 2

1

C283

C283 470P_0402_50V8J

470P_0402_50V8J

2

@

CRT_DDC_CLK

CRT_DDC_DAT

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

E

of

20 53Thursday, January 13, 2011

of

20 53Thursday, January 13, 2011

of

20 53Thursday, January 13, 2011

A

R153

4.7K_0402_5%

2

Q205A

VGA_CRT_CLK<13>

VGA_CRT_DATA<13>

1

C282

33P_0402_50V8K

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

@

2010/09/03 2012/12/31

C

5

Q205B

1

C285

C285 33P_0402_50V8K

33P_0402_50V8K

2

@

61

2N7002KDWH_SOT363-6

34

2N7002KDWH_SOT363-6

470P_0402_50V8J

Compal Secret Data

Deciphered Date

C284

A

CMOS Setting, near DDR Door

+RTCVCC

R292

1 2

20K_0402_5%

PCH_RTCRST#

1U_0402_6.3V6K

iME Setting.

1 2

PCH_SRTCRST#

1U_0402_6.3V6K

R293

R293 20K_0402_5%

1 1

20K_0402_5%

C247

C248

JCOMS @JCOMS @

1 2

12

JME @JME @

1 2

12

Integrated SUS 1.05V VRM Enable

PCH_INTVRMEN

+RTCVCC

R117

R117 R118

R118

+3VS

R276 1K_0402_5%

+3VALW

R560 10K_0402_5%R560 10K_0402_5%

2 2

High - Enable Internal VRs (must be always pulled high)

1 2 1 2

@

1 2

1M_0402_5%

1M_0402_5% 330K_0402_5%

330K_0402_5%

SM_INTRUDER# PCH_INTVRMEN

PCH_SPKR

CR_CPPE#

PCH_SPK High = Enabled (No Reboot) Low = Disabled (Default)

HDA_SDO

ME debug mode, this signal has a weak internal pull down Low = Disable (default)

*

High = Enable (flash descriptor security overide)

HDA_SYNC

This signal has a weak internal pull down

*

H=>On Die PLL is supplied by 1.5V L=>On Die PLL is supplied by 1.8V Need to pull high for Huron River platform

+3VALW

3 3

AZ_SYNC_HD<36>

1 2

R156 33_0402_5%R156 33_0402_5%

1 2

R125 1M_0402_5%R125 1M_0402_5%

4M Byte

U13 PCH_SPICS# PCH_SPIDO

4 4

U13

1

CS#

2

DO

HOLD#

3

WP#

4

GND

W25Q32BVSSIG_SO8

VCC

CLK

DI

8 7 6 5

AZ_SYNC_R

PCH_SPICLK PCH_SPIDI

R284 1K_0402_5%R284 1K_0402_5%

S

BSS138_NL_SOT23-3

1 2

R285 0_0402_5%

+3VS

1

2

AZ_SYNC

12

+5VS

G

2

Q21

13

D

@

C494

0.1U_0402_16V4Z

Socket: SP07000F500/SP07000H900 Please close to U2 PCH

8/30 Change U13 from SA000021A00 to SA00003IN00 due to EOL of SA000021A00

A

B

12

C216 15P_0402_50V8JC216 15P_0402_50V8J Y3

Y3

2

OSC

NC

3

OSC

NC

32.768KHZ_12.5PF_Q13MC14610002

AZ_BITCLK_HD<36>

PCH_SPKR<36>

AZ_RST_HD#<36>

AZ_SDIN0_HD<36>

+3VALW

AZ_SDOUT_HD<36>

PWRME_CTRL#<38>

12

C205 15P_0402_50V8JC205 15P_0402_50V8J

1 4

R286 33_0402_5%R286 33_0402_5%

1 2

R142 33_0402_5%R142 33_0402_5%

1 2

@

R273 1K_0402_5%

R273 1K_0402_5% R289 33_0402_5%R289 33_0402_5%

1 2

R580 0_0402_5%R580 0_0402_5%

1 2

12

R291

10M_0402_5%

12

8/30 Change PWRME_CTRL# to HDA_SDO by PCH EDS

T37 PADT37 PAD T38 PADT38 PAD T39 PADT39 PAD

RTC schematic for non-chargeable

+RTCVCC

1

C486

0.1U_0402_16V4Z

R397

10_0402_5%

@

C86

10P_0402_50V8J

B

@

PCH_SPICLK

12

1

2

0.1U_0402_16V4Z

0812 -> Add R277 for RTC reserve charge

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

2

C

PCH_RTCX1 PCH_RTCX2 PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

AZ_BITCLKAZ_BITCLK AZ_SYNC PCH_SPKR AZ_RST#AZ_RST#

AZ_SDIN0_HD

AZ_SDOUT

CR_CPPE#

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_SPICLK PCH_SPICS#

PCH_SPIDI PCH_SPIDO

D13

1

BAV70W_SOT323-3

LOTES_AAA-BAT-054-K01

C

D

U2A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN# / GPIO33

N32

HDA_DOCK_RST# / GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

for EMI

3 2

R277 1K_0402_5%R277 1K_0402_5%

2010/09/03 2012/12/31

SPI_MISO

COUGARPOINT_FCBGA989~D Q65R3@

+RTCBATT

+3VL

12

JRTC

@ JRTC

@

Compal Secret Data

RTCIHDA

JTAG

SPI

1

+

-

2

Deciphered Date

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA 6G

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED# SATA0GP / GPIO21 SATA1GP / GPIO19

D

C38 A38 B37 C37

D36 E36

K36 V5

SATA_PRX_C_DTX_N0

AM3

SATA_PRX_C_DTX_P0

AM1

SATA_PTX_DRX_N0

AP7

SATA_PTX_DRX_P0

AP5 AM10

AM8 AP11 AP10

SATA_PRX_C_DTX_N2

AD7

SATA_PRX_C_DTX_P2

AD5

SATA_PTX_DRX_N2

AH5

SATA_PTX_DRX_P2

AH4 AB8

AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11 Y10

AB12 AB13

RBIAS_SATA3

AH1

SATA_LED#

P3

CR_WAKE#

V14

PCH_GPIO19

P1

12

E

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SERIRQ

SATAICOMP

SATA3_COMP

1 2

R279 37.4_0402_1%R279 37.4_0402_1%

1 2

R280 49.9_0402_1%R280 49.9_0402_1%

1 2

R281 750_0402_1%R281 750_0402_1%

LPC_AD0 <38,39> LPC_AD1 <38,39> LPC_AD2 <38,39> LPC_AD3 <38,39>

LPC_FRAME# <38,39>

SERIRQ <38,39>

SATA_PRX_C_DTX_N0 <31> SATA_PRX_C_DTX_P0 <31> SATA_PTX_DRX_N0 <31> SATA_PTX_DRX_P0 <31>

SATA_PRX_C_DTX_N2 <31> SATA_PRX_C_DTX_P2 <31> SATA_PTX_DRX_N2 <31> SATA_PTX_DRX_P2 <31>

SERIRQ

SATA_LED#

CR_WAKE#

PCH_GPIO19

PCH_GPIO19 <25>

R336 10K_0402_5%R336 10K_0402_5%

R334 10K_0402_5%R334 10K_0402_5%

R335 10K_0402_5%R335 10K_0402_5%

+1.05VS_VCC_SATA

+1.05VS_SATA3

ODD

R136 10K_0402_5%R136 10K_0402_5%

1 2

BOOT BIOS Strap Bit 0

+3VALW +3VALW+3VALW

R363

R363 200_0402_5%

200_0402_5%

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

R306

R306 100_0402_1%

100_0402_1%

1 2

R355 51_0402_1%R355 51_0402_1%

Title

Size Document Number Rev

Custom

Date: Sheet

12

R330

R330 200_0402_5%

200_0402_5%

12

R295

R295 100_0402_1%

100_0402_1%

PCH_JTAG_TCK

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

R278

R278 200_0402_5%

200_0402_5%

1 2

R301

R301 100_0402_1%

100_0402_1%

1 2

E

HDD

12

21 53Thursday, January 13, 2011

+3VS

A

of

A

PCIE_PRX_C_LANTX_N1<33> PCIE_PRX_C_LANTX_P1<33>

1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2

R584 10K_0402_5%@R584 10K_0402_5%@

1 2

R564 10K_0402_5%@R564 10K_0402_5%@

1 2

PCIE_PTX_C_LANRX_N1<33> PCIE_PTX_C_LANRX_P1<33>

PCIE_PRX_WLANTX_N2<32> PCIE_PRX_WLANTX_P2<32> PCIE_PTX_C_WLANRX_N2<32> PCIE_PTX_C_WLANRX_P2<32>

CLKREQ_JET# CLKREQ_WLAN#

PCIE_PRX_C_USBTX_N6<35> PCIE_PRX_C_USBTX_P6<35> PCIE_PTX_C_USBRX_N6<35> PCIE_PTX_C_USBRX_P6<35>

CLKREQ_LAN#

PCH_GPIO26

CLKREQ_CR#

CLKREQ_USB30#

PANEL_SEL PASSWORD_CLEAR#

LAN

WLAN

1 1

+3VS

R287 10K_0402_5%R287 10K_0402_5% R338 10K_0402_5%R338 10K_0402_5%

USB30

+3VALW

R343 10K_0402_5%R343 10K_0402_5% R344 10K_0402_5%R344 10K_0402_5% R345 10K_0402_5%R345 10K_0402_5%

2 2

R346 10K_0402_5%R346 10K_0402_5% R348 10K_0402_5%R348 10K_0402_5% R351 10K_0402_5%R351 10K_0402_5%

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

C501 0.1U_0402_16V7KC501 0.1U_0402_16V7K C502 0.1U_0402_16V7KC502 0.1U_0402_16V7K

C519 0.1U_0402_16V7KC519 0.1U_0402_16V7K

1 2

C869 0.1U_0402_16V7KC869 0.1U_0402_16V7K

1 2

LAN

PANEL_SEL LVDS_SEL

WLAN

12 12

CLK_LAN#<33> CLK_LAN<33>

CLKREQ_LAN#<33>

CLK_WLAN#<32> CLK_WLAN<32>

CLKREQ_WLAN#<32>

LVDS_SEL

Channel

3 3

PANEL_SEL

Channel LVDS

4 4

HL

Single (Default)

HL

CLK_RES_ITP#<10> CLK_RES_ITP<10>

CLK_CPU_ITP#<5> CLK_CPU_ITP<5>

Dual

USB30

CLKREQ_USB30#<35>

EDP

+3VALW

R347 10K_0402_5%R347 10K_0402_5%

1 2

R233 0_0402_5%@R233 0_0402_5%@ R282 0_0402_5%@R282 0_0402_5%@

R352 0_0402_5%R352 0_0402_5% R353 0_0402_5%R353 0_0402_5%

12 12

CLK_USB30#<35> CLK_USB30<35>

Please place under DDR SODIMM. 10/25

12

JPW@JPW

@

B

PCIE_PRX_C_LANTX_N1 PCIE_PRX_C_LANTX_P1 PCIE_PTX_LANRX_N1 PCIE_PTX_LANRX_P1

PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 PCIE_PTX_WLANRX_P2

PCIE_PRX_C_USBTX_N6 PCIE_PRX_C_USBTX_P6 PCIE_PTX_USBRX_N6 PCIE_PTX_USBRX_P6

CLK_LAN# CLK_LAN

CLKREQ_LAN#

CLK_WLAN# CLK_WLAN

CLKREQ_WLAN#

CLKREQ_JET#

CLKREQ_CR#

PCH_GPIO26

CLK_USB30# CLK_USB30

CLKREQ_USB30#

PASSWORD_CLEAR#

LVDS_SEL

PANEL_SEL CLK_BCLK_ITP#

CLK_BCLK_ITP

C

U2B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AK13

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

COUGARPOINT_FCBGA989~D Q65R3@

PCI-E*

CLOCKS

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_DMI2_N CLKIN_DMI2_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

EC_LID_OUT#

E12

PCH_SMBCLK

H14

PCH_SMBDATA

C9

DRAMRST_CNTRL_PCH

A12

PCH_SMLCLK0

C8

PCH_SMLDATA0

G12

PCH_GPIO74

C13

PCH_SMLCLK1

E14

PCH_SMLDATA1

M16

M7

Control Link only for support Intel IAMT.

T11

P10

CLK_REQ_VGA#

M10

CLK_PCIE_VGA#

AB37

CLK_PCIE_VGA

AB38

CLK_CPU_DMI#

AV22

CLK_CPU_DMI

AU22

CLK_DPLL#

AM12

CLK_DPLL

AM13

PCH_CLK_DMI#

BF18

PCH_CLK_DMI

BE18

CLKIN_GND1#

BJ30

CLKIN_GND1

BG30

CLK_DOT#

G24

CLK_DOT

E24

CLK_SATA#

AK7

CLK_SATA

AK5

CLK_14M_PCH

K45

CLK_PCILOOP

H45

PCH_X1

V47

PCH_X2

V49

Y47

K43 F47 H47 K49

XCLK_RCOMP

CLK_FLEX0 PCH_48MCLK CLK_FLEX2 CLK_FLEX3

1 2

R354 90.9_0402_1%R354 90.9_0402_1%

1 2

22_0402_5%

R38 0_0402_5%

DRAMRST_CNTRL_PCH<7>

R578

@R578

@

1 2

22_0402_5%

R576

T31 PADT31 PAD

@

1 2

EC_LID_OUT# <38>

CLK_PCIE_VGA# <13> CLK_PCIE_VGA <13>

CLK_CPU_DMI# <5> CLK_CPU_DMI <5>

T13 PADT13 PAD T14 PADT14 PAD

From Clock Gen.

CLK_PCILOOP <25>

CLK_27M

Near PCH

D

R232 2.2K_0402_5%R232 2.2K_0402_5%

+3VALW +3VS

PCH_SMBDATA

PCH_SMBCLK

1 2

120 MHz for eDP

12

R260 2.2K_0402_5%R260 2.2K_0402_5%

12

2N7002KDWH_SOT363-6

R364 2.2K_0402_5%R364 2.2K_0402_5%

12

R385 2.2K_0402_5%R385 2.2K_0402_5%

12

PCH_SMLDATA1

PCH_SMLCLK1

EC_LID_OUT# DRAMRST_CNTRL_PCH PCH_GPIO74 PCH_SMLCLK0 PCH_SMLDATA0

R23

CLK_REQ_VGA#

10K_0402_5%

PCH_CLK_DMI# PCH_CLK_DMI

CLKIN_GND1# CLKIN_GND1

CLK_DOT# CLK_DOT

CLK_SATA# CLK_SATA

CLK_14M_PCH

Q3B

3 4

2

2N7002KDWH_SOT363-6

Q3A

6 1

Q3A

3 4

2

Q4A

6 1

2N7002KDWH_SOT363-6

R123 10K_0402_5%R123 10K_0402_5% R228 1K_0402_5%R228 1K_0402_5% R234 10K_0402_5%R234 10K_0402_5% R238 10K_0402_5%R238 10K_0402_5% R239 10K_0402_5%R239 10K_0402_5% R251 10K_0402_5%@R251 10K_0402_5%@

R242 10K_0402_5%R242 10K_0402_5% R243 10K_0402_5%R243 10K_0402_5%

R244 10K_0402_5%R244 10K_0402_5% R245 10K_0402_5%R245 10K_0402_5%

R246 10K_0402_5%R246 10K_0402_5% R247 10K_0402_5%R247 10K_0402_5%

R248 10K_0402_5%R248 10K_0402_5% R249 10K_0402_5%R249 10K_0402_5%

R250 10K_0402_5%R250 10K_0402_5%

Q4B

E

R400 4.7K_0402_5%R400 4.7K_0402_5%

5

R386 4.7K_0402_5%R386 4.7K_0402_5%

5

2N7002KDWH_SOT363-6

1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2

1 2

For EMI

@

12

C474 22P_0402_50V8J

12

Y2

1

2

+1.05VS_VCCDIFFCLKN

48MCLK_USB30 <35> 48MCLK_CR <34>

CLK_27M <13>

CLK_PCILOOP

C506

27P_0402_50V8J

@

12

R417 10_0402_5%

R365 1M_0402_5%R365 1M_0402_5%

PCH_X1 PCH_X2

1 2

25MHZ_20PF_7A25000012

1

2

PM_SMBDATA <11,12,32>

PM_SMBCLK <11,12,32>

+3VS+3VALW

EC_SMB_DA2 <13,38>

EC_SMB_CK2 <13,38>

+3VALW

C507

C507 27P_0402_50V8J

27P_0402_50V8J

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

22 53Thursday, January 13, 2011

E

A

of

A

+3VALW

1 1

2 2

VGATE<5,38,49>

PM_PWROK<5,38>

Stuff R137 if EC does not want to involve in the handshake mechanism for the DeepSX state entry and exit

3 3

PS3@

R316 200_0402_5%

R316 200_0402_5% R218 10K_0402_5%R218 10K_0402_5% R220 10K_0402_5%R220 10K_0402_5% R221 10K_0402_5%R221 10K_0402_5%

R127 10K_0402_5%R127 10K_0402_5% R128 10K_0402_5%R128 10K_0402_5% R129 10K_0402_5%R129 10K_0402_5%

12 12 12 12

12 12 12

0.1U_0402_16V4Z

1 2

C250

PM_PWROK

PCH_SUSPWRDN_RSUSACK#

@

12

R137 0_0402_5%

DRAMPWROK

PCH_SUSPWRDN_R

RI# PCH_LOW_BAT#

PCH_RSMRST# PM_PWROK SYS_PWROK

0_0402_5%

R259

@R259

@

1 2

+3VS

5

U12

1

P

IN1

2

IN2

G

SN74AHC1G08DCKR_SC70-5

3

+1.05VS_PCH

8/30 Reserve R259 For cost down plan

XDP_DBRESET#<5>

4

O

DRAMPWROK<5>

PCH_RSMRST#<38>

PCH_SUSPWRDN<38>

PBTN_OUT#<5,38>

ACIN<38,44>

1 2

R469 330K_0402_5%R469 330K_0402_5%

+3VALW

B

T34PAD T34PAD

1 2

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_PTX_CRX_N0 DMI_PTX_CRX_N1 DMI_PTX_CRX_N2 DMI_PTX_CRX_N3

DMI_PTX_CRX_P0 DMI_PTX_CRX_P1 DMI_PTX_CRX_P2 DMI_PTX_CRX_P3

DMI_COMP

RBIAS_CPY

SUSACK#

XDP_DBRESET#

SYS_PWROK

DRAMPWROK

PCH_RSMRST#

PCH_SUSPWRDN_R

PBTN_OUT#

PCH_ACIN

PCH_LOW_BAT#

RI#

DMI_CTX_PRX_N0<6> DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N2<6> DMI_CTX_PRX_N3<6>

DMI_CTX_PRX_P0<6> DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6> DMI_CTX_PRX_P3<6>

DMI_PTX_CRX_N0<6> DMI_PTX_CRX_N1<6> DMI_PTX_CRX_N2<6> DMI_PTX_CRX_N3<6>

DMI_PTX_CRX_P0<6> DMI_PTX_CRX_P1<6> DMI_PTX_CRX_P2<6> DMI_PTX_CRX_P3<6>

1 2

R130 49.9_0402_1%R130 49.9_0402_1%

1 2

R160 750_0402_1%R160 750_0402_1%

PM_PWROK PM_PWROK_R

1 2

R216 0_0402_5%R216 0_0402_5%

R320 0_0402_5%R320 0_0402_5%

D12

RB751V40_SC76-2

C

U2C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN# / SUS_PWR_DN_ACK / GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT_FCBGA989~D Q65R3@

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

D

FDI_CTX_PRX_N0

BJ14

FDI_CTX_PRX_N1

AY14

FDI_CTX_PRX_N2

BE14

FDI_CTX_PRX_N3

BH13

FDI_CTX_PRX_N4

BC12

FDI_CTX_PRX_N5

BJ12

FDI_CTX_PRX_N6

BG10

FDI_CTX_PRX_N7

BG9

FDI_CTX_PRX_P0

BG14

FDI_CTX_PRX_P1

BB14

FDI_CTX_PRX_P2

BF14

FDI_CTX_PRX_P3

BG13

FDI_CTX_PRX_P4

BE12

FDI_CTX_PRX_P5

BG12

FDI_CTX_PRX_P6

BJ10

FDI_CTX_PRX_P7

BH9

FDI_INT

AW16

FDI_FSYNC0

AV12

FDI_FSYNC1

BC10

FDI_LSYNC0

AV14

FDI_LSYNC1

BB10

DSWVREN

A18

PCH_DPWROK DSWVREN

E22

EC_SWI#

B9

PM_GPIO32

N3

SUS_STAT#

G8

N14

PM_SLP_S5#

D10

PM_SLP_S4#

H4

PM_SLP_S3#

F4

PM_SLP_A#

G10

PM_SLP_SUS#

G16

H_PM_SYNC

AP14

PCH_GPIO29 PCH_GPIO29

K14

FDI_CTX_PRX_N0 <6> FDI_CTX_PRX_N1 <6> FDI_CTX_PRX_N2 <6> FDI_CTX_PRX_N3 <6> FDI_CTX_PRX_N4 <6> FDI_CTX_PRX_N5 <6> FDI_CTX_PRX_N6 <6> FDI_CTX_PRX_N7 <6>

FDI_CTX_PRX_P0 <6> FDI_CTX_PRX_P1 <6> FDI_CTX_PRX_P2 <6> FDI_CTX_PRX_P3 <6> FDI_CTX_PRX_P4 <6> FDI_CTX_PRX_P5 <6> FDI_CTX_PRX_P6 <6> FDI_CTX_PRX_P7 <6>

FDI_INT <6> FDI_FSYNC0 <6> FDI_FSYNC1 <6> FDI_LSYNC0 <6> FDI_LSYNC1 <6>

EC_SWI# <33,35>

T17 PADT17 PAD

32.768 KHz

CLK_EC <38>

PM_SLP_S5# <38>

PM_SLP_S4# <38>

PM_SLP_S3# <38>

T35 PADT35 PAD

T58 PADT58 PAD

H_PM_SYNC <5>

*

E

1 2

R222 0_0402_5%R222 0_0402_5%

PCH_RSMRST#PCH_DPWROK

Stuff R222 if do not support DeepSX state

+RTCVCC

R224 330K_0402_5%R224 330K_0402_5% R225 330K_0402_5%@R225 330K_0402_5%@

12 12

DSWVREN must be always pulled high to +RTCVCC DSWVREN - Internal Deep Sleep 1.05V regulator

：

Enable

H

：

Disable

L

+3VS

PM_GPIO32

8/18 Change Net name from PM_CLKRUN# to PCH_GPIO32 by HW Review demand

EC_SWI#

R313 8.2K_0402_5%R313 8.2K_0402_5%

1 2

R319 10K_0402_5%R319 10K_0402_5%

1 2

R563 10K_0402_5%@R563 10K_0402_5%@

1 2

+3VALW

H_PM_SYNC

C898 220P_0402_50V7K

1 2

@

9/1 Reserve C894 for ESD requset

D16

RB751V40_SC76-2

D14

POK<43,45>

4 4

A

1 2

RB751V40_SC76-2

12

PCH_RSMRST#PM_PWROK PCH_RSMRST#

B

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

23 53Thursday, January 13, 2011

E

of

A

1 1

R219 2.37K_0402_1%R219 2.37K_0402_1%

+3VS

LCTL_CLK

12

R471 2.2K_0402_5%R471 2.2K_0402_5%

LCTL_DATA

12

R472 2.2K_0402_5%R472 2.2K_0402_5%

2 2

3 3

1 2

B

LCTL_CLK LCTL_DATA

LVDS_IBG

T40 PADT40 PAD

CRT_IREF

12

R311 1K_0402_0.5%R311 1K_0402_0.5%

C

U2D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGARPOINT_FCBGA989~D Q65R3@

LVDS

CRT

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_CTRLDATA

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLDATA

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

DDPB_AUXN

DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49

100K_0402_5%

AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

1 2

R473 100K_0402_5%R473 100K_0402_5%

R524 100K_0402_5%R524 100K_0402_5%

D

R1433

12

E

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

24 53Thursday, January 13, 2011

E

A

of

A

+3VS

RP1

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP2

1 1

RP2

8.2K_0804_8P4R_5%

8.2K_0804_8P4R_5% RP3

RP3

8.2K_0804_8P4R_5%

1 2

R321 8.2K_0402_5%R321 8.2K_0402_5%

1 2

R322 8.2K_0402_5%R322 8.2K_0402_5%

PCI_PIRQC#

18

PCH_GPIO4

27

PCH_GPIO2

36

PCI_PIRQA#

45

8/23 PIN swap for layout request

PCH_GPIO52

18

PCH_GPIO53

27

PCH_GPIO54

36

RF_OFF#

45

PCH_GPIO50

18

PCI_PIRQB#

27

ODD_DA#

36

WL_OFF#

45

PCH_GPIO5 PCI_PIRQD#

Boot BIOS Strap

RF_OFF#

2 2

0 0 1 11

PCH_GPIO19 Boot BIOS Loaction

0 1 0

LPC

Reserved

PCI SPI

RF_OFF#

R5371K_0402_5% @ R5371K_0402_5% @

12

PCH_GPIO19

R5381K_0402_5% @ R5381K_0402_5% @

12

*

PCH_GPIO19 <21>

A16 Swap Override Strap

WL_OFF#

3 3

Low= A16 swap override Enable High= A16 swap override Disable

*

WL_OFF#

R5361K_0402_5% @ R5361K_0402_5% @

12

CLK_PCI_EC<38> CLK_PCILOOP<22> CLK_PCI_DDR<39>

WL_OFF#<32>

ODD_DA#<31>

PLT_RST#<5,13,32,33,35,38,39>

1 2 1 2 1 2

T32 PADT32 PAD

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

PCH_GPIO50 PCH_GPIO52 PCH_GPIO54

RF_OFF# PCH_GPIO53 WL_OFF#

PCH_GPIO2 ODD_DA# PCH_GPIO4 PCH_GPIO5

PCI_PME# PLT_RST#

R52522_0402_5% R52522_0402_5% R52622_0402_5% R52622_0402_5% R52722_0402_5% R52722_0402_5%

B

CLK_EC_R CLK_PCH CLK_SIO

U2E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

RSVD

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

TP25

BC30

TP26

BE32

TP27

BJ32

TP28

BC28

TP29

BE30

TP30

BF32

TP31

BG32

TP32

AV26

TP33

BB26

TP34

AU28

TP35

AY30

TP36

AU26

TP37

AY26

TP38

AV28

TP39

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT_FCBGA989~D Q65R3@

RSVD

PCI

NV_DQ10 / NV_IO10

NVRAM

NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

EHCI 1

EHCI 2

USB

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9

NV_ALE NV_CLE

DF_TVS

NV_RCOMP

NV_RB#

NV_RE#_WRB0 NV_RE#_WRB1

NV_WE#_CK0 NV_WE#_CK1

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

C

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AY1

AV10 AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_CLE

USB20_N0 USB20_P0 USB20_N1 USB20_P1

USB20_N0 <31> USB20_P0 <31> USB20_N1 <31> USB20_P1 <31>

USB-Right USB-LEFT

USB port6 and port7 are disabled on HM65

USB20_N9 <32>

USB20_N10 USB20_P10 USB20_N11 USB20_P11

USBBIAS

Within 500 mils

USB_OC#0 USB_OC#1 USB_OC#2 SLP_CHG_M3 SLP_CHG_M4 USB_OC#5 USB_OC#6 USB_OC#7

USB20_P9 <32>

USB20_N10 <34>

USB20_P10 <34>

USB20_N11 <19> USB20_P11 <19>

1 2

R535 22.6_0402_1%R535 22.6_0402_1%

USB_OC#0 <31,35,38>

WiMax Card Reader Int. Camera

D

USB-LEFT

DMI & FDI Termination Voltage

NV_CLE

8/18 Change R324 From 1K to 2.2K by Intel check list demand

Set to VCC when HIGH Set to VSS when LOW

R323 1K_0402_5%R323 1K_0402_5%

H_SNB_IVB#

+1.8VS

12

C895 220P_0402_50V7K

1 2

@

9/1 Reserve C895 for ESD requset

RP4 SLP_CHG_M4 USB_OC#0 SLP_CHG_M3 USB_OC#6

8/23 PIN swap for layout request

USB_OC#1 USB_OC#2 USB_OC#5 USB_OC#7

RP4

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

RP5

4 5 3 6 2 7 1 8

10K_0804_8P4R_5%

R324

2.2K_0402_5%

+3VALW

E

H_SNB_IVB# <5>

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

25 53Thursday, January 13, 2011

E

A

of

A

B

C

D

E

+3VALW

USB30_SMI# EC_SMI# PCH_GPIO12 PCH_GPIO28 PCH_GPIO57

BT_ON# HDMI_HPD PCH_GPIO1 BT_DET# OPTIMUS_EN# ODD_DETECT# PCH_GPIO6 PCH_GPIO16 EC_SCI# CIR_EN# ISDBT_DET PCH_GPIO49 PCH_GPIO17

USB30_SMI# PCH_GPIO37 PCH_GPIO27

ISDBT_DET

PCH_GPIO28

1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

@

1 2

R325 1K_0402_5%@R325 1K_0402_5%@

1 2

12

12 12 12

R390 1K_0402_5%R390 1K_0402_5% R558 10K_0402_5%R558 10K_0402_5%

1 1

2 2

3 3

R556 10K_0402_5%R556 10K_0402_5% R557 10K_0402_5%R557 10K_0402_5% R549 10K_0402_5%R549 10K_0402_5%

+3VS

R567 10K_0402_5%R567 10K_0402_5% R539 10K_0402_5%@R539 10K_0402_5%@ R540 10K_0402_5%R540 10K_0402_5% R542 10K_0402_5%R542 10K_0402_5% R554 10K_0402_5%R554 10K_0402_5%

R545 200K_0402_5%R545 200K_0402_5% R546 10K_0402_5%R546 10K_0402_5% R577 10K_0402_5%R577 10K_0402_5% R550 10K_0402_5%R550 10K_0402_5% R551 100K_0402_5%R551 100K_0402_5% R552 10K_0402_5%@R552 10K_0402_5%@ R553 10K_0402_5%R553 10K_0402_5% R555 10K_0402_5%R555 10K_0402_5%

R437 10K_0402_5%

R437 10K_0402_5% R547 10K_0402_5%R547 10K_0402_5% R402 10K_0402_5%R402 10K_0402_5%

R328 47K_0402_5%R328 47K_0402_5%

GPIO28 On-Die PLL Voltage Regulator

H: Enable

*

L: Disable

HDMI_HPD<13,30>

EC_SCI#<38> EC_SMI#<38>

USB30_SMI#<35>

BT_ON#<32>

T74 PADT74 PAD

ODD_DETECT#<31>

HDMI_HPD PCH_GPIO1 PCH_GPIO6 EC_SCI# EC_SMI# PCH_GPIO12 USB30_SMI#

PCH_GPIO16

PCH_GPIO17 BT_DET#

PCH_GPIO27 PCH_GPIO28

BT_ON#

PCH_GPIO35

ODD_DETECT#

PCH_GPIO37 OPTIMUS_EN# CIR_EN# ISDBT_DET PCH_GPIO49 PCH_GPIO57

U2F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT_FCBGA989~D Q65R3@

GPIO

NCTF

CPU/MISC

TACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

NC_1 NC_2 NC_3 NC_4 NC_5

VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32

C40 B41 C41 A40

P4 AU16 P5 AY11 AY10 T14

AH8 AK11 AH10 AK10 P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

ODD_EN#

PCH_WL_BT_LED LOGO_LED MAXIC_SELECT

GATEA20

KB_RST# H_PWRGOOD PCH_THRMTRIP#

ODD_EN# <41>

T75PAD T75PAD

1 2

R416 390_0402_5%R416 390_0402_5%

This signal has weak internal pull-up, can't be pulled low

GATEA20 <38>

KB_RST# <38> H_PWRGOOD <5> H_THERMTRIP# <5>

ODD_EN# GATEA20 KB_RST# LOGO_LED PCH_WL_BT_LED

8/18 Remove PCH PECI by HW Review demand

H_THERMTRIP#

H_PWRGOOD

C896 220P_0402_50V7K

1 2

@

C897 220P_0402_50V7K

1 2

@

9/1 Reserve C896, C897 for ESD requset

1 2

R106 10K_0402_5%R106 10K_0402_5%

1 2

R548 10K_0402_5%R548 10K_0402_5%

1 2

R559 10K_0402_5%R559 10K_0402_5%

1 2

R436 10K_0402_5%R436 10K_0402_5%

1 2

R110 10K_0402_5%R110 10K_0402_5%

+3VS

GPIO8 Integrated Clock Chip Enable (Removed)

H: Disable L: Enable

*

R326 1K_0402_5%@R326 1K_0402_5%@

1 2

4 4

Integrated clock enable functionality is achieved by soft-strap The current default is clock enable

A

EC_SMI#

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

26 53Thursday, January 13, 2011

E

A

of

A

B

C

D

E

12

+1.5VS

R480

0_0805_5%

1 2

+3VS

+1.05VS_VCCP

PCH Power Rail Table

Voltage Rail

V_PROC_IO

V5REF

V5REF_SUS

VCC3_3

VCCADAC

VCCADPLLA

VCCADPLLB

VCCCORE

VCCDMI

Voltage

1.05

5

3.3

1.05

1.05VCCIO 2.925

1.05VCCASW 1.01

3.3VCCSPI 0.02

3.3VCCDSW 0.002

1.8 0.19VCCDFTERM

3.3VCCRTC 6 uA

3.3VCCSUS3_3

3.3 / 1.5VCCSusHDA

VCCVRM 1.5 0.16

1.05VCCCLKDMI

VCCSSC 1.05

VCCDIFFCLKN 1.05

VCCALVDS 3.3

1.8VCCTX_LVDS 0.06

S0 Iccmax Current (A)

0.001

0.266

0.001

0.08

1.3

0.042

0.97

0.01

0.02

0.095

0.055

0.001

POWER

+1.05VS_VCCP

PJ31

@PJ31

@

2

112

JUMP_43X118

1 1

2 2

3 3

JUMP_43X118

10U_0603_6.3V6M

+1.05VS_PCH

C277

10U_0603_6.3V6M

1

C274

2

1

C273

2

1U_0402_6.3V6K

1

C269

2

1U_0402_6.3V6K

1

C279

2

+3VS

1U_0402_6.3V6K

1

C275

2

C510

1U_0402_6.3V6K

1

2

+1.05VS_PCH

+VCCP_VCCDMI

+1.05VS_PCH +VCCA_DAC

1

C289

2

1U_0402_6.3V6K

+1.05VS_PCH

T30 PADT30 PAD

1

C511

C511 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C290

0.1U_0402_10V7K

0.1U_0402_10V7K +VCCAFDI_VRM

T36 PADT36 PAD

U2G

1300mA

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3]

AP16

VCCVRM[2]

BG6

VCCFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

COUGARPOINT_FCBGA989~D Q65R3@

POWER

2925mA

CRTLVDS

1mA

VCC CORE

60mA

DMI

20mA

VCCIO

VCCDFTERM

190mA

NAND / SPI HVCMOS

FDI

VCCADAC

1mA

VSSADAC

VCCALVDS VSSALVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCIO[1]

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

20mA

U48

U47

AK36 AK37

AM37 AM38 AP36 AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

0.01U_0402_25V7K

+VCCA_LVDS

+VCCTX_LVDS

1

C272

0.1U_0402_10V7K

2

+VCCAFDI_VRM

+VCCP_VCCDMI

+1.05VS_VCC_DMI

1

C278

0.1U_0402_10V7K

2

1

C281

C281 1U_0402_6.3V6K

1U_0402_6.3V6K

2

C512

R27

R27 0_0402_5%

0_0402_5%

1 2

+VCCP_VCCDMI

1

C270

C270 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

0.1U_0402_10V7K

0.1U_0402_10V7K C288

C288

R26 0_0402_5%R26 0_0402_5%

1 2

+3VS

R477

0_0805_5%

1 2

+1.8VS

1

2

+VCCAFDI_VRM

+1.05VS_PCH

1

2

L12

BLM18PG181SN1D_0603

C286

C286 10U_0603_6.3V6M

10U_0603_6.3V6M

R474

0_0603_5%

1 2

1

C276

C276 1U_0402_6.3V6K

1U_0402_6.3V6K

2

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

27 53Thursday, January 13, 2011

E

A

of

A

"@" Avoid leakage

+3VS

L18

1 1

+1.05VS_PCH

2 2

+1.05VS_PCH

3 3

4 4

1 2

10UH_LB2012T100MR_20%

+1.05VS_PCH

+RTCVCC

C327

1U_0402_6.3V6K

1 2

BLM18PG181SN1D_0603

1 2

BLM18PG181SN1D_0603

R522

12

0_0603_5%

R485

0_0603_5%

R521

0_0603_5%

12

@R521

@

12

0.1U_0402_10V7K

1

C330

2

1

2

1

2

L13

L14

C337

C337 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_VCCDIFFCLKN

C320

C320 1U_0402_6.3V6K

1U_0402_6.3V6K

1

C316

C316 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS_VCC_CLKF33

1

C301

C301 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C287

C295

C295 1U_0402_6.3V6K

1U_0402_6.3V6K

2

10U_0603_6.3V6M

+VCCDIFFCLK

+1.05VM_VCCSUS

+RTCVCC

1

C336

0.1U_0402_10V7K

2

1

C310

C310 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_VCCADPLLA

+1.05VS_VCCADPLLB

1

2

+1.05VS_VCCDIFFCLKN

1

C291

2

10U_0603_6.3V6M

+1.05VS_VCCP

1

C298

C298 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+1.05VS_PCH

1U_0402_6.3V6K

R511

1 2

0_0603_5%

4.7U_0603_6.3V6K

B

+1.05VS_PCH

C323

1U_0402_6.3V6K

0.1U_0402_10V7K

C318

0.1U_0402_10V7K

1

C322

C325

2

+3VALW

@

C305

12

0.1U_0402_10V7K

+1.05VS_PCH

C311

22U_0805_6.3V6M

1U_0402_6.3V6K

1

C294

2

1

C334

2

1

2

0.1U_0402_10V7K

0.1U_0402_10V7K C299

C299

2

1

C303

0.1U_0402_10V7K

2

1

C324

0.1U_0402_10V7K

2

+PCH_VCCDSW

+3VS_VCC_CLKF33

+VCCSUS

1

C300

C300 1U_0402_6.3V6K

1U_0402_6.3V6K @

@

2

1

C312

C312 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C308

1U_0402_6.3V6K

2

+VCCRTCEXT

+VCCAFDI_VRM

+1.05VS_VCCADPLLA +1.05VS_VCCADPLLB

+VCCDIFFCLK

+1.05VS_VCCDIFFCLKN

+VCCSST

+1.05VM_VCCSUS

+V_CPU_IO

+RTCVCC

T42 PADT42 PAD

T41 PADT41 PAD

C

POWER

1mA

POWER

3mA

119mA

1010mA

1mA

Clock and Miscellaneous

PCI/GPIO/LPCMISC

80mA 80mA

55mA

95mA

CPURTC

SATA USB

10mA

HDA

U2J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCIO[8]

AF34

VCCIO[9]

AG34

VCCIO[11]

AG33

VCCIO[10]

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

COUGARPOINT_FCBGA989~D Q65R3@

VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33]

VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

1mA

VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5]

VCC3_3[1] VCC3_3[8] VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12] VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2] VCCIO[3] VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14 AK1

AF11

AC16 AC17 AD17

T21

V21

T19

P32

1

2

1

2

+1.05VS_PCH

+PCH_V5REF_SUS

+VCCA_USBSUS

+PCH_V5REF_RUN

1 2

C306

0.1U_0402_10V7K

1

2

+1.05VS_SATA3

T43PAD T43PAD

+VCCAFDI_VRM

+1.05VS_VCC_SATA

+VCCME_22

+VCCME_23

+VCCME_21

1

C307

0.1U_0402_16V4Z

2

D

+1.05VS_PCH

C328

C328 1U_0402_6.3V6K

1U_0402_6.3V6K

+3VALW

C321

0.1U_0402_10V7K

+3VALW

1

C293

C293 1U_0402_6.3V6K

1U_0402_6.3V6K

2

+3VS

C297

0.1U_0402_10V7K

+1.05VS_VCC_SATA

1

C331

C331 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

+3VALW

1

C332

0.1U_0402_10V7K

2

@

C335 1U_0402_6.3V6K

1 2

+3VALW

+3VS

1

C313

0.1U_0402_10V7K

2

+1.05VS_SATA3

0_0805_5%

1

2

0_0805_5%

C329

C329 1U_0402_6.3V6K

1U_0402_6.3V6K

+1.05VS_PCH

R491

12

0_0805_5%

R5090_0402_5% R5090_0402_5%

R5170_0402_5% R5170_0402_5%

R5200_0402_5% R5200_0402_5%

+1.05VS_PCH

100_0402_5%

R516

+5VALW +3VALW

R512

+5VS +3VS

R490

+1.05VS_PCH

12

D8

D8 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_SUS

1

C326

0.1U_0603_25V7K

2

D7

D7 RB751V40_SC76-2

RB751V40_SC76-2

1 2

+PCH_V5REF_RUN

1

C304

C304 1U_0603_10V6K

1U_0603_10V6K

2

E

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

28 53Thursday, January 13, 2011

E

A

of

A

U2I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

1 1

2 2

3 3

4 4

B39

BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5 BE22 BE26 BE40

BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3

BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D12

D16

D18

D22

D24

D26

D30

D32

D34

D38

D42

E18

E26

G18

G20

G26

G28

G36

G48

H12

H18

H22

H24

H26

H30

H32

H34

VSS[170]

B7

VSS[171]

F45

VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228]

D3

VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240]

D8

VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257]

F3

VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]

H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28

B

U2H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT_FCBGA989~D Q65R3@

C

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

D

E

COUGARPOINT_FCBGA989~D Q65R3@

A

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

29 53Thursday, January 13, 2011

E

A

of

5

D D

4

3

2

1

+3VS

R452

0_0402_5%

HDMI@

C C

VGA_HDMI_CLK+<14> VGA_HDMI_CLK-<14> VGA_HDMI_TX0+<14> VGA_HDMI_TX0-<14> VGA_HDMI_TX1+<14> VGA_HDMI_TX1-<14> VGA_HDMI_TX2+<14> VGA_HDMI_TX2-<14>

B B

A A

For DISCRETE

CV296 0.1U_0402_16V7K HDMI@CV296 0.1U_0402_16V7K HDMI@

1 2

CV293 0.1U_0402_16V7K HDMI@CV293 0.1U_0402_16V7K HDMI@

1 2

CV294 0.1U_0402_16V7K HDMI@CV294 0.1U_0402_16V7K HDMI@

1 2

CV297 0.1U_0402_16V7K HDMI@CV297 0.1U_0402_16V7K HDMI@

1 2

CV299 0.1U_0402_16V7K HDMI@CV299 0.1U_0402_16V7K HDMI@

1 2

CV298 0.1U_0402_16V7K HDMI@CV298 0.1U_0402_16V7K HDMI@

1 2

CV295 0.1U_0402_16V7K HDMI@CV295 0.1U_0402_16V7K HDMI@

1 2

CV300 0.1U_0402_16V7K HDMI@CV300 0.1U_0402_16V7K HDMI@

1 2

5

VGA_DVI_TXC+ VGA_DVI_TXCVGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1+

VGA_DVI_TXD1VGA_DVI_TXD2+ VGA_DVI_TXD2-

HDMI@

VGA_HDMI_CLK<14>

VGA_HDMI_DATA<14>

VGA_DVI_TXC-

VGA_DVI_TXC+

VGA_DVI_TXD0+

VGA_DVI_TXD0-

VGA_DVI_TXD1-

VGA_DVI_TXD1+

VGA_DVI_TXD2+

VGA_DVI_TXD2-

4

@

1 2

R157 0_0402_5%

L8

1

4

OCE2012120YZF

@

1 2

R173 0_0402_5%

@

1 2

R175 0_0402_5%

L9

1

4

OCE2012120YZF

@

1 2

R180 0_0402_5%

@

1 2

R182 0_0402_5%

L10

1

4

OCE2012120YZF

@

1 2

R183 0_0402_5%

@

1 2

R187 0_0402_5%

L11

1

4

OCE2012120YZF

@

1 2

R188 0_0402_5%

HDMI@L8

HDMI@

HDMI@L9

HDMI@

HDMI@L10

HDMI@

HDMI@L11

HDMI@

HDMI_R_CK-

2

3

HDMI_R_CK+

HDMI_R_D0+

2

3

HDMI_R_D0-

HDMI_R_D1-

2

3

HDMI_R_D1+

HDMI_R_D2+

2

3

HDMI_R_D2-

12

R391 0_0402_5%

HDMI@

12

R401 0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

HDMI@

2

3 1

SGD

BSH111_SOT23-3

HDMI@

1 2

2

3 1

SGD

BSH111_SOT23-3

Q19

HDMI_R_CK+ HDMI_R_CKHDMI_R_D1HDMI_R_D1+ HDMI_R_D0+

HDMI_R_D0HDMI_R_D2-

HDMI_R_D2+

+HDMI_5V_OUT

0.1U_0402_16V4Z

12

R185

R184

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

Q18

HDMI@

1 2

R195 499_0402_1%

HDMI@

1 2

R197 499_0402_1%

HDMI@

1 2

R198 499_0402_1%

HDMI@

1 2

R202 499_0402_1%

HDMI@

1 2

R201 499_0402_1%

HDMI@

1 2

R203 499_0402_1%

HDMI@

1 2

R205 499_0402_1%

HDMI@

1 2

R206 499_0402_1%

2010/09/03 2012/12/31

R185

2.2K_0402_5%

2.2K_0402_5% HDMI@

HDMI@

HDMI_SCLK

HDMI_SDATA

+5VS

Compal Secret Data

13

D

2

G

S

Deciphered Date

Q24

Q24 2N7002_SOT23-3

2N7002_SOT23-3 HDMI@

HDMI@

2

+3VS +3VS

+5VS

2

C264

C264 HDMI@

HDMI@

HDMI_HPD_R

PMEG2010AEH_SOD123

1

@

R570

R570 100K_0402_5%

100K_0402_5%

HDMI@

D53

2 1

+HDMI_5V_OUT

5

P

A2Y

G

3

12

+HDMI_5V_OUT_F

HDMI@

HDMI@ R145

R145

1 2

1K_0402_5%

1

U9

OE#

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5 HDMI@

HDMI@

CH751H-40PT_SOD323-2

R403 0_0402_5%

100K_0402_5%

HDMI_HPD_R

4

HDMI@

R571

2.2K_0402_5%

D55

@D55

@

21

12

HDMI@

F2

2 1

1.1A_6V_MINISMDC110F-2

1.1A_6V_MINISMDC110F-2 HDMI@

HDMI@

R186

HDMI@

12

1

2

HDMI_HPD_CHDMI_HPD_U

2

C265

0.1U_0402_16V4Z

0.1U_0402_16V4Z HDMI@

HDMI@

1

1 2

HDMI_HPD <13,26>

+HDMI_5V_OUT+5VS

C259

C259 HDMI@

HDMI@

0.1U_0402_16V4Z

HDMI Connector

HDMI_HPD_C

HDMI_SDATA HDMI_SCLK

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Title

Size Document Number Rev

Date: Sheet

JHDMI

19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

TAITW_PDVBR9-19FLBS4NN4N1

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

HP_DET +5V DDC/CEC_GND SDA SCL Reserved CEC CKCK_shield CK+ D0D0_shield D0+ D1D1_shield D1+ D2D2_shield D2+

1

GND GND GND GND

@JHDMI

@

20 21 22 23

of

30 53Thursday, January 13, 2011

of

30 53Thursday, January 13, 2011

of

30 53Thursday, January 13, 2011

A

SATA HDD Conn SATA ODD Conn

+5VS

1

2

1 1

JHDD

2 2

24

GND

23

GND

SANTA_191201-1@

Place closely JHDD SATA CONN.

1.2A

1

C357

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

C357

0.1U_0402_16V4Z

2

SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0

C356

C356 10U_0603_6.3V6M

10U_0603_6.3V6M

GND

A+

A-

GND

B-

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

1

C358

0.1U_0402_16V4Z

2

Close to JHDD

C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K

1 2

C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K

1 2

C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K

1 2

C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K

1 2

+3VS

+5VS

1

2

B

C359

0.1U_0402_16V4Z

SATA_PTX_DRX_P0 <21> SATA_PTX_DRX_N0 <21>

SATA_PRX_C_DTX_N0 <21>

SATA_PRX_C_DTX_P0 <21>

JODD

15

GND

14

GND

SANTA_206401-1_RV

USB Conn

USB_EN#<35,38>

+5VALW

1 2

R161 100K_0402_5%R161 100K_0402_5%

C

GND

GND GND

+5V +5V

MD

@JODD

@

A+

AB-

B+

DP

USB_EN#

1 2 3 4 5 6 7

ODD_DETECT#_R

8 9 10 11 12 13

SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_N2

SATA_PRX_DTX_N2 SATA_PRX_DTX_P2

R561 0_0402_5%R561 0_0402_5%

1 2

+5VS_ODD

ODD_DA#_R

1 2

R562 0_0402_5%R562 0_0402_5%

2.5A

U14

1

GND

VOUT

2

VOUT

VIN VIN3VOUT

4

FLG

EN

RT9715BGS_SO8

Close to JODD

C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K

1 2

C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K

1 2

C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K

1 2

C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K

1 2

W=60mils

+USB_VCCA+5VALW

8

C361 1000P_0402_50V7KC361 1000P_0402_50V7K

7 6 5

1

C362

4.7U_0805_10V4Z

2

@

D

ODD_DETECT# <26>

ODD_DA# <25>

For EMI

12

USB_OC#0 <25,35,38>

SATA_PTX_DRX_P2 <21> SATA_PTX_DRX_N2 <21>

SATA_PRX_C_DTX_N2 <21>

SATA_PRX_C_DTX_P2 <21>

+5VS_ODD

1.1A

1

C352

C352 10U_0603_6.3V6M

10U_0603_6.3V6M

2

E

SW2

SMT1-05-A_4P

5

6

3 4

ODD_DA#_R

1 2

Place components closely ODD CONN.

1

C353

C353 10U_0603_6.3V6M

10U_0603_6.3V6M

2

1

C354

C354 @

@

1U_0402_6.3V6K

2

1

C355

0.1U_0402_16V4Z

2

1

C360

2

0.1U_0402_16V4Z

W=60mils

+USB_VCCA

C87

0.1U_0402_16V4Z

12

1

4

12

C87

12

+

220U_6.3V_M

220U_6.3V_M C62

C62

@

12

USB20_P0_R USB20_N0_R

B

For EMI

JUSBB

@JUSBB

@

1

2

3

4

5

G7

66G8

P-TWO_161021-06021_6P-T

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

0_0402_5%

12

R842

@

WCM-2012-900T_0805

7 8

USB20_N1<25> USB20_P1<25>

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

WCM-2012-900T_0805

2

3

L86

R838 0_0402_5%

@

Deciphered Date

1

4

12

1

4

1000P_0402_50V7K

PJDLC05_SOT23-3

D

3 3

@

R843 0_0402_5%

R843 0_0402_5% WCM-2012-900T_0805

WCM-2012-900T_0805

USB20_P0<25>

USB20_N0<25>

4 4

A

2

3

L87

@

R839 0_0402_5%

C85

220U_6.3V_M

C60

C61

USB20_N1_R USB20_P1_R

D62

+USB_VCCA

12

+

12

@D62

@

W=60mils

JUSB2

@JUSB2

@

1

VCC

2

D-

3

D+

4

2

3

1

Size Document Number Rev

Date: Sheet

Title

GND

ALLTOP C107L8-10405-L

5

GND

6

GND

7

GND

8

GND

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

31 53Thursday, January 13, 2011

E

of

A

B

C

D

E

Half PCIe Mini Card-WLAN/ WiMax

2

112

R1443

0_0402_5%

1 2

+3V_WLAN

R16

R16 0_0402_5%

0_0402_5%

1 2 1 2

0_0402_5%

0_0402_5% R17

R17

PJ27 JUMP_43X79@PJ27 JUMP_43X79@

+3VS

PJ26 JUMP_43X79@PJ26 JUMP_43X79@

1 1

2 2

Short PJ27 for Wimax Short PJ26 for WLAN

CLKREQ_WLAN#<22>

CLK_WLAN#<22> CLK_WLAN<22>

PCIE_PRX_WLANTX_N2<22> PCIE_PRX_WLANTX_P2<22>

PCIE_PTX_C_WLANRX_N2<22> PCIE_PTX_C_WLANRX_P2<22>

WLAN/ WiFi

E51_TXD<38>

E51_RXD<38>

Debug card using

BT_CTRL_RBT_CTRL

E51_RXD_R

+3V_WLAN+3VALW

JWLAN

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

GND1

FOX_AS0B226-S40N-7F

GND2

@JWLAN

@

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

+3V_WLAN

CM1

0.01U_0402_25V7K

CM7

0.01U_0402_25V7K

+3V_WLAN

+1.5VS

8/30 Add R1443 for WLAN Mini PCIE Card Pin5

40 mils

0.1U_0402_16V4Z

1

CM2

2

4.7U_0805_10V4Z

+1.5VS

0.1U_0402_16V4Z

1

CM8

2

4.7U_0805_10V4Z

BT_CTRL E51_RXD_R

For isolate Intel Rainbow Peak and Compal Debug Card.

WLAN_OFF# PLT_RST#

For SED

1

12

C253

47P_0402_50V8J

2

C253 @

@

CM3

For SED

1

12

C254

47P_0402_50V8J

2

R327

1 2

1K_0402_5%

C254 @

@

WiMax

CM9

PLT_RST# <5,13,25,33,35,38,39>

PM_SMBCLK <11,12,22> PM_SMBDATA <11,12,22>

USB20_N9 <25> USB20_P9 <25>

WLAN&BT Combo module circuits

BT on module

Enable Disable

BT_CRTL

BT_ON#

**If +3V_WLAN is +3VS, please remove D24

BT_ON#<26>

WLAN_OFF#

5

+3VS

2

1 3

D

@

1 2

R565 10K_0402_5%

HL

LH

BT_CTRL

3

2N7002DW-T/R7_SOT363-6

Q50B

4

SUSP<5,9,41>

G

S

Q362N7002_SOT23-3

BT on module

61

Q50A

Q50A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

WL_OFF# <25>

Add level shift circuit for WL_OFF# to avoide leakage from WLAN to PCH

+3V_WLAN

3 3

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

32 53Thursday, January 13, 2011

E

A

of

A

CL1 0.1U_0402_16V7KCL1 0.1U_0402_16V7K

PCIE_PRX_C_LANTX_P1<22> PCIE_PRX_C_LANTX_N1<22>

1 1

+3V_LAN

RL24 10K_0402_5%@RL24 10K_0402_5%@ RL25 10K_0402_5%@RL25 10K_0402_5%@

12 12

RTL8105E

Pin14

+3VS

Pin15 Pin38

12

1K_0402_5%

1K_0402_5% RL6

RL6 @

@

ISOLATE#

RL7

2 2

15K_0402_5%

NC NC 10K ohm PD 1K ohm Pull-high

1 2

RL433 0_0402_5%RL433 0_0402_5%

WOL_EN

For P/N and footprint Please place them to ISPD page

UL1

8105E-VL 10/100M

8105E-VL 10/100M 8105ELDO@

8105ELDO@

CLKREQ_LAN# EC_SWI#

RTL8111E

Sx Enable Wake up

LOW

UL1

8105E-VL 10/100M

8105E-VL 10/100M 8105ESWR@

8105ESWR@

NC

1 2

CL2 0.1U_0402_16V7KCL2 0.1U_0402_16V7K

1 2

PCIE_PTX_C_LANRX_P1<22> PCIE_PTX_C_LANRX_N1<22>

CLKREQ_LAN#<22>

+3V_LAN

WOL_EN <38,41>

Sx Disable Wake up

HIGH

+3V_LAN

220U_6.3V_M_R16

CLKREQ_LAN#

PLT_RST#<5,13,25,32,35,38,39>

CLK_LAN<22> CLK_LAN#<22>

EC_SWI#<23,35>

RL21 10K_0402_5%8111E@RL21 10K_0402_5%8111E@ RL22 1K_0402_5%RL22 1K_0402_5%

1 2

+LAN_VDDREG

S0

HIGH

1

+

CL683

@

2

FOR EMI ISN TEST DEMAND.

RL5 2.49K_0402_1%RL5 2.49K_0402_1%

1

2

8/30 Add UL3 at DVT

UL3

8105ELDO@UL3

8105ELDO@

3 3

LAN_MDI3LAN_MDI3+

LAN_MDI2LAN_MDI2+

LAN_MDI1LAN_MDI1+

LAN_MDI0-

4 4

Place CL34, CL35 colse to LAN chip

LAN_MDI0+

@

@ CL35

CL35

0.1U_0402_25V4K

A

1

2

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

1

CL34

0.1U_0402_25V4K

2

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

X'FORM_ LFE8456E

UL4

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+ TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

SUPERWORLD_SWG150401

SUPERWORLD_SWG150401 8111E@

8111E@

B

PCIE_PRX_LANTX_P1 PCIE_PRX_LANTX_N1 PCIE_PTX_C_LANRX_P1

PCIE_PTX_C_LANRX_N1

12

RL19 0_0402_5%RL19 0_0402_5%

PLT_RST# CLK_LAN

CLK_LAN#

LAN_X1 LAN_X2

EC_SWI# ISOLATE#

12

ENSWREG

1 2

CL684

CL684 10U_0805_10V6K

10U_0805_10V6K

RJ45_MIDI0+

16

TX+

RX+

MCT1 MX1+

MX1-

MCT2 MX2+

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

TX-

RJ45_MIDI0-

15 14

CT

13

NC

12

NC

11

CT

RJ45_MIDI1+

10

RJ45_MIDI1-

9

24 23 22

21 20 19

18 17 16

15 14 13

B

UL1

22

HSOP

23

HSON

17

HSIP

18

HSIN

16

CLKREQB

25

PERSTB

19

REFCLK_P

20

REFCLK_N

43

CKXTAL1

44

CKXTAL2

28

LANWAKEB

26

ISOLATEB

14

NC/SMBCLK

15

NC/SMBDATA

38

GPO/SMBALERT

33

ENSWREG

34

VDDREG

35

VDDREG

46

RSET

24

GND

49

PGND

RTL8111E-GR_QFN48_6X6

RTL8111E-GR_QFN48_6X6 8111E@

8111E@

YL1

1 2

25MHZ_20PF_7A25000012

1

CL26

CL26 27P_0402_50V8J

27P_0402_50V8J

2

CL39 1000P_0402_50V7K

8111E@

CL40 1000P_0402_50V7K

8111E@

CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K

CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K

LED3/EEDO

LED1/EESK

LED0

EECS/SCL

EEDI/SDA

MDIP0 MDIN0 MDIP1 MDIN1

NC/MDIP2

NC/MDIN2

NC/MDIP3

NC/MDIN3

DVDD10 DVDD10 DVDD10

DVDD33 DVDD33

AVDD33 AVDD33 AVDD33 AVDD33

EVDD10 AVDD10

AVDD10 AVDD10 AVDD10

REGOUT

LAN_X2LAN_X1

31 37 40

RL2 10K_0402_5%RL2 10K_0402_5%

30

RL1 10K_0402_5%RL1 10K_0402_5%

32

LAN_MDI0+

1

LAN_MDI0-

2

LAN_MDI1+

4

LAN_MDI1-

5

LAN_MDI2+

7

LAN_MDI2-

8

LAN_MDI3+

10

LAN_MDI3-

11

13 29 41

27 39

12 42 47 48

21 3

6 9 45

36

1

CL27

CL27 27P_0402_50V8J

27P_0402_50V8J

2

+LAN_VDD10

+3V_LAN

+LAN_EVDD10 +LAN_VDD10

+LAN_REGOUT

60 mils

C

12 12

LL1

8111E@LL1

+LAN_REGOUT

2.2UH +-5% NLC252018T-2R2J-N

Layout Note: LL1 must be within 200mil to Pin36, CL13,CL9 must be within 200mil to LL1

LL1

2.2UH +-5% NLC252018T-2R2J-N

2.2UH +-5% NLC252018T-2R2J-N 8105ESWR@

8105ESWR@

8111E@

1 2

4.7U_0603_6.3V6K

1 2

LL2 0_0603_5%LL2 0_0603_5%

1U_0402_6.3V6K

CL13

8111E@

CL13

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8105ESWR@

8105ESWR@

1

CL18

2

Close to Pin 21

+3V_LAN

1 2

LL3 0_0603_5%8111E@ LL3 0_0603_5%8111E@

CL28

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8111E@

8111E@

LL3

LL3 0_0603_5%

0_0603_5% 8105ESWR@

8105ESWR@

CL28

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K 8105ESWR@

8105ESWR@ RL23

1

2

+LAN_EVDD10+LAN_VDD10

+LAN_VDDREG

1

2

D

+LAN_VDD10

1

CL9

0.1U_0402_16V4Z

2

8111E@

1

CL17

0.1U_0402_16V4Z

2

1

CL29

0.1U_0402_16V4Z

2

8111E@

CL29

0.1U_0402_16V4Z

0.1U_0402_16V4Z 8105ESWR@

8105ESWR@

CL9

0.1U_0402_16V4Z

0.1U_0402_16V4Z 8105ESWR@

8105ESWR@

LAN Conn.

JLAN

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI1-

RJ45_MIDI2RJ45_MIDI2+ RJ45_MIDI1+

RJ45_MIDI0RJ45_MIDI0+

8111E@

1 2

12

RL11 75_0402_1%

8111E@

1 2

12

RL12 75_0402_1%

1 2

12

RL13 75_0402_1%RL13 75_0402_1%

12

1 2

RL15 75_0402_1%RL15 75_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

RJ45_MIDI3-

RJ45_MIDI3+

RJ45_MIDI2-

RJ45_MIDI2+

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

C

RJ45_GND LANGND

CL36 1000P_1808_3KV7KCL36 1000P_1808_3KV7K

2010/09/03 2012/12/31

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

SANTA_130451-D

SANTA_130451-D @

@

8/30 Reserve DL1 and DL2 for ESD request

1 2

Compal Secret Data

Deciphered Date

1

CL37

CL37 220P_0402_50V6K

220P_0402_50V6K

2

AZC199-02SPR7G_SOT23-3

SHLD1 SHLD2

AZC199-02SPR7G_SOT23-3

1

CL38

CL38 @

@

4.7U_0603_6.3V6K

2

D

E

+3V_LAN

+LAN_VDD10

1

DL1

1

@

223

9 10

3

@

223

1

DL2

1

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

CL3 to CL6 close to Pin 27,39,47,48 CL7 to CL8 close to Pin 12,42

CL3 0.1U_0402_16V4ZCL3 0.1U_0402_16V4Z CL4 0.1U_0402_16V4ZCL4 0.1U_0402_16V4Z CL5 0.1U_0402_16V4ZCL5 0.1U_0402_16V4Z CL6 0.1U_0402_16V4ZCL6 0.1U_0402_16V4Z CL7 0.1U_0402_16V4Z8111E@ CL7 0.1U_0402_16V4Z8111E@ CL8 0.1U_0402_16V4Z8111E@ CL8 0.1U_0402_16V4Z8111E@

CL19 0.1U_0402_16V4ZCL19 0.1U_0402_16V4Z CL20 0.1U_0402_16V4ZCL20 0.1U_0402_16V4Z CL21 0.1U_0402_16V4ZCL21 0.1U_0402_16V4Z CL22 0.1U_0402_16V4Z8111E@ CL22 0.1U_0402_16V4Z8111E@ CL23 0.1U_0402_16V4Z8111E@ CL23 0.1U_0402_16V4Z8111E@ CL24 0.1U_0402_16V4Z8111E@ CL24 0.1U_0402_16V4Z8111E@ CL25 0.1U_0402_16V4Z8111E@ CL25 0.1U_0402_16V4Z8111E@

+3V_LAN

ENSWREG

RTL8105E-VC RTL8111E-VB PWM Mode

RL4

0 ohm (Pull High)

NC 0 ohm

RL23

4019CU

1 2 1 2 1 2 1 2 1 2 1 2

CL19, CL20,CL21 close to pin 13,29,45, respectively CL22 close to pin 3, respectively CL23,CL24,CL25 close to pin 6,9,41, respectively

1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

RL4

RL4 0_0402_5%

0_0402_5% 8111E@

8111E@

12

RL23 0_0402_5%

0_0402_5% 8105ELDO@

8105ELDO@

RL4

RL4 0_0402_5%

0_0402_5% 8105ESWR@

8105ESWR@

RTL8105E-VC

LDO Mode

NC

(Pull Down)

33 53Thursday, January 13, 2011

E

A

of

A

B

C

D

E

GPIO0

CLK_IN

XD_D7

SP14 SP13 SP12 SP11 SP10

SP9 SP8 SP7 SP6

For EMI request

48MCLK_CR

0620 --> remove CR_LED#

17

48MCLK_CR

24 23 22

SD_DATA2_MS_DATA5

21

MS_DATA1_SD_DATA3

20 19

SDCMD

18 16

MS_DATA2_SDCLKSD_DATA1

15 14

SDCD#

13

RC6 10_0402_5%@ RC6 10_0402_5%@

1 2

CC10 10P_0402_50V8J@ CC10 10P_0402_50V8J@

1 2

48MCLK_CR <22>USB20_P10<25>

< 48MHz >

0620 --> remove CARD-RADER LED

1 1

1 2

CC2 100P_0402_50V8J@CC2 100P_0402_50V8J@

RC2

6.19K_0402_1%

12

USB20_N10<25>

2 2

12 12

+3VS

+VCC_3IN1

1

CC7 1U_0402_6.3V6KCC7 1U_0402_6.3V6K

2

RC10_0402_5% RC10_0402_5% RC30_0402_5% RC30_0402_5%

SDWP_MSCLK

SD_DATA0

USB20_N10_R USB20_P10_R

+V1_8

1 2

3 4

5 6

7 8

9 10 11 12

UC1

REFE DM

DP 3V3_IN

CARD_3V3 V18

XD_CD# SP1

SP2 SP3 SP4 SP5

EPAD

RTS5137-GR_QFN24_4X4

25

0715 --> change P/N to RTS5137 (SA000043500)

< 2 in 1 Card Reader >

0624 --> change CARDREADER conn.

JREAD

@JREAD

@

MS_DATA1_SD_DATA3

1

D3

SDCMD

2

CMD

3

VSS1

VDD

CLK

VSS2

4

MS_DATA2_SDCLK

5 6

SD_DATA0

7

D0

SD_DATA1

8

D1

SD_DATA2_MS_DATA5

9

D2

SDWP_MSCLK

10

WP

CD

SDCD#

11

1

CC6

0.1U_0402_16V4Z

2

+VCC_3IN1

1

CC5

CC5 1U_0402_6.3V6K

1U_0402_6.3V6K

2

3 3

TAITW_PSDAT3-09GLAS1N14N

GND1 GND2 GND3 GND4

12 13 14 15

For EMI request

MS_DATA2_SDCLK

SDWP_MSCLK

4 4

A

B

RC4 10_0402_5%@ RC4 10_0402_5%@

RC5 10_0402_5%@ RC5 10_0402_5%@

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CC8 10P_0402_50V8J@CC8 10P_0402_50V8J@

1 2

CC9 10P_0402_50V8J@CC9 10P_0402_50V8J@

1 2

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

34 53Thursday, January 13, 2011

E

A

of

5

USB30@

USB30_POK

RT1

+1.5V to +1.05V Transfer

+5VALW+1.5V+5VALW +1.5V +1.05V

10U_0603_6.3V6M

1U_0603_10V6K

CT2

CT1

1

USB30_POK

USB30@

2

USB30@

Vout=0.8(1+10K/32.4K)

1.042 ~ 1.0469 ~ 1.0519V

D D

Spec: 0.9975 ~ 1.05 ~ 1.1025

+3V

+3VALW to +3V Transfer

CT20 0.01U_0402_25V7K

CT21 0.1U_0402_16V7K

2

1

USB30@

CT14 0.1U_0402_16V7K

CT15 0.01U_0402_25V7K

1

2

USB30@

2

G

QT2 2N7002_SOT23-3

2

USB30@CT25

USB30@

1

CT23 0.01U_0402_25V7K

CT22 0.01U_0402_25V7K

1

2

1

USB30@

2

1

SYSON<38,48>

+3V +3VA

USB30@

LT3

1 2

BLM18AG601SN1D_2P

C C

CT25

10U_0603_6.3V6M

+1.05V

CT16 0.1U_0402_16V7K

CT18 0.1U_0402_16V7K

CT17 0.01U_0402_25V7K

CT19 0.01U_0402_25V7K

1

2

1

USB30@

+3V

CT10 0.01U_0402_25V7K

CT11 0.01U_0402_25V7K

2

1

USB30@

CT13 0.01U_0402_25V7K

CT12 0.01U_0402_25V7K

2

1

USB30@

B B

USB30@

UT2

USB30@UT2

USB30@

5

VIN

VOUT

9

VOUT

VIN

6

VCNTL

7

POK

8

EN

GND

APL5930KAI-TRG_SO8

+3VALW

RT37

RT37 100K_0402_5%USB30@

100K_0402_5%USB30@

1 2

13

D

S

USB30@

PCIE_PRX_C_USBTX_P6<22> PCIE_PRX_C_USBTX_N6<22>

PCIE_PTX_C_USBRX_P6<22> PCIE_PTX_C_USBRX_N6<22>

UPD720200A: SMIB Low active

CT24 0.01U_0402_25V7K

2

USB30_SMI#_IC

1

CT41

0.1U_0402_16V7K

USB30@

1 2

RT38 47K_0402_5%

CT43

0.01U_0402_25V7K

+3V & +1.05V has power sequence timing:

0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms

CLK_USB30<22> CLK_USB30#<22>

PLT_RST#<5,13,25,32,33,38,39> EC_SWI#<23,33>

CLKREQ_USB30#<22>

For UPD720200: SMI high active

13

D

Q57

2

G

@

2N7002_SOT23-3

S

24MHZ_12PF_X5H024000DC1H

RT30

0_0402_5%@RT30

0_0402_5%

@

1 2

USB30@

+5VALW

3 4

2

FB

1

2 USB30@

USB30@

1

2

USB30@

1

+3V

1 2

USB30@

USB30@ 1 2

12P_0402_50V8J

1

CT37

2

48MCLK_USB30<22>

1 2

4.7K_0402_5%

1A

12

10K_0402_1%

RT3

32.4K_0402_1%

USB30@

+3VALW

CT42

0.1U_0402_16V4Z

S

G

QT1

2

AO3413_SOT23

D

1 3

USB30@

CT29

CT29 CT30

CT30

USB30@

RT12 0_0402_5%

+3V +3V

RT39 10K_0402_5%

1SS355TE-17_SOD323-2

USB30_SMI_R

@

@ RT21 0_0402_5%

RT21 0_0402_5%

USB30_SMI#_R

@

@ RT40 0_0402_5%

RT40 0_0402_5%

12 RT26

RT26 100_0402_5%

100_0402_5% USB30@

USB30@

YT1

12P_0402_50V8J

1

CT38

2

USB30@

12

RT2

USB30@

+3V

0.1U_0402_16V7K

12

0.1U_0402_16V7K

12

1 2

USB30@

USB30@ RT15 10K_0402_5%USB30@RT15 10K_0402_5%USB30@ RT16 100_0402_1%@RT16 100_0402_1%@ RT17 10K_0402_5%USB30@RT17 10K_0402_5%USB30@

RT180_0402_5%

1 2

USB30@

1 2

USB30@

1

221

DT3

USB30@

0_0402_5%

RT31

1 2

@

USB30@

1

2

USB30_WAKE#

1 2 1 2 1 2

USB30_SMI_R USB30_SMI#_RUSB30_SMI#_IC

1

2

Close to U102.D7 Close to U102.P13

10U_0603_6.3V6M

0.1U_0402_16V7K

CT3

CT4

PCIE_PRX_USBTX_P6 PCIE_PRX_USBTX_N6

SPI_CLK_USB

1U_0603_10V6K

SPI_CS_USB#

CT44

SPI_SI_USB SPI_SO_USB

CLK_48M_USB

USB30@

0_0402_5%

1 2

@

RT28

RT29

+3V

Place as close as possibile to UU102.N14 and UU102.M14

9/2 Change CT25 from SE093106K80 (10uF_0805) to SE000005T80 (10uF_0603) by sourcer demand

RT32

47K_0402_5%

USB30@

+3V

1 2

12

RT33

RT33 10K_0402_5%

10K_0402_5% USB30@

USB30@

UT4

1

CS#

2

SO

3

WP#

4

GND

MX25L5121EMC-20G SOP 8P

USB30@

5

35mA

VCC

HOLD#

SCLK

SI

8 7 6 5

1 2

USB30@

USB30@ RT35 10K_0402_5%

RT35 10K_0402_5%

SPI_CLK_USB_R

CT39

1 2

USB30@

0.1U_0402_16V7K

SPI_SI_USB

RT36

1 2

0_0402_5%

USB30@

A A

SPI_CS_USB# SPI_SO_USB

4

+3VA +3VA

8P_0402_50V8D

CT6

@

1

2

CT5

0.01U_0402_25V7K

USB30@

Follow Vendor recommend.

+3V +1.05V

UT1

D10

F13

USB30@

0_0402_5%

SPI_CLK_USB

Close to UU37.6

SPI_CLK_USBSPI_CLK_USB_R

F14

VDD33

B2

PECLKP

B1

PECLKN

D2

PETXP

D1

PETXN

F2

PERXP

F1

PERXN

H2

PERSTB

K1

PEWAKEB

K2

PECREQB

J2

AUXDET

J1

PSEL

H1

SMI

P4

SMIB

P5

PONRSTB

M2

SPISCK

N2

SPISCB

N1

SPISI

M1

SPISO

K13

GND

K14

GND

J13

GND

C14

GND

N14

XT1

M14

XT2

P6

CSEL

CSEL=0：24MHz XTAL CSEL=1

A1

GND

A2

GND

A3

GND

A4

GND

A5

GND

A7

GND

A9

GND

A11

GND

A13

GND

A14

GND

B3

GND

B4

GND

B5

GND

B7

GND

B9

GND

B11

GND

B13

GND

B14

GND

C1

GND

C2

GND

C3

GND

C10

GND

C11

GND

GNDD3GNDD4GND

C12

C13

RT34

1 2

0_0402_5%

0_0402_5% @

@

4

1

0.1U_0402_16V7K

0.1U_0402_16V7K CT7

CT7

2

0.01U_0402_25V7K

USB30@

L10

VDD33F3VDD33G3VDD33G4VDD33L9VDD33

+3V:200mA +1.05V:800mA

：

48MHz Clock

GND

GNDE1GNDE2GND

D11

D12

D13

D14

2

CT40

0.1U_0402_16V7K

1

@

8P_0402_50V8D

CT9

@

1

2

CT8

USB30@

L13

L14

VDD33

VDD33N4VDD33N5VDD33N6VDD33P3VDD10C4VDD10C5VDD10C6VDD10C7VDD10D5VDD10C8VDD10C9VDD10D8VDD10D9VDD10E3VDD10E4VDD10

GND

E13

E14

GNDF4GNDF6GNDF7GNDF8GNDF9GND

F11

GNDG1GNDG2GNDG6GNDG7GNDG8GND

GND

F12

3

@ RT4

@

1 2

0_0402_5%

LT1

USB30@LT1

USB30@

4

1

WCM-2012-121T_0805

E11

E12

VDD10

VDD10H3VDD10H4VDD10L5VDD10

GNDJ3GNDJ4GNDJ6GNDJ7GNDJ8GNDJ9GND

GND

J11

J12

UPD720200AF1-DAP-A

3

WCM-2012-121T_0805

1 2

0_0402_5%@

+3VA

H11

K11

K12

L8

D7

VDD10

U3AVDO33 U3TXDP2 U3TXDN2

U2DM2

U2DP2

U3RXDP2 U3RXDN2

PPON2

PPON1

U3TXDP1 U3TXDN1

U2DM1

U2DP1

U3RXDP1 U3RXDN1

U2AVSS U2PVSS U3AVSS

GNDK3GNDK4GNDL1GNDL2GNDL3GND

L4

U3RXDN1_R U3RXDN1_R_L

GND

GNDH6GND

GND

GNDH7GNDH8GNDH9GND

G9

H12

G13

G11

G12

2

U3RXDP1_R_LU3RXDP1_R

RT4

3

2

RT6

P13

U2AVDD10

B6 A6

N8 P8

B8 A8

OCI2#

G14

OCI2B

OCL1#

H13

OCI1B

H14

USB30PWRON

J14

U3TX_C_DP1

B10

U3TX_C_DN1

A10

U2D_DN1

N10

U2D_DP1

P10

U3RXDP1_R

B12

U3RXDN1_R

A12

RT22 1.6K_0402_1%

P12

RREF

N12 N11 D6

P14

GND

P11

GND

P9

GND

P7

GND

P2

GND

P1

GND

N13

GND

N9

GND

N7

GND

N3

GND

M13

GND

M12

GND

M11

GND

M10

GND

M9

GND

M8

GND

M7

GND

M6

GND

M5

GND

M4

GND

M3

GND

L12

GND

L11

GND

L7

GND

L6

GND

RT13 10K_0402_5%

1 2

USB30@

CT32 0.1U_0402_16V7K

1 2

CT33 0.1U_0402_16V7K

1 2

USB30@

1 2

USB30@

@ RT5

@

1 2

WCM-2012-121T_0805

4

1

LT2

U3TXDN1 U3TXDN1_L

U2D_DN1

U2D_DP1

LT2

1 2

RT9 0_0402_5% USB30@RT9 0_0402_5% USB30@

1 2

LT4

1

4

WCM-2012-900T_0805@

1 2

RT10 0_0402_5% USB30@RT10 0_0402_5% USB30@

+3V

U3TXDP1 U3TXDN1

RT5

0_0402_5%

3

2

USB30@

RT7

0_0402_5%@

2

3

U3TXDP1_LU3TXDP1

3

2

USB20_DN1_L

USB20_DP1_L

+USB_VCCA

+3V

USB30_SMI#_IC

OCL1#

+3V

2010/09/17 Add Level shift to avoid +3V leakage from +3VALW_PCH

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

1

JUSB30

U3TXDP1_L U3TXDN1_L

USB20_DP1_L USB20_DN1_L

U3RXDP1_R_L U3RXDN1_R_L

U3TXDN1_L U3TXDP1_L U3RXDN1_R_L U3RXDP1_R_L

10K_0402_5%

10K_0402_5% RT43

RT43

12

USB30@

2N7002DW-T/R7_SOT363-6

10K_0402_5%

10K_0402_5% RT44

RT44

12

USB30@

Size Document Number Rev

Custom

Date: Sheet

JUSB30

9

SSTX+

1

VBUS

8

SSTX-

3

D+

7

GND

2

D-

6

SSRX+

4

GND

5

SSRX-

SANTA_371394-3

SANTA_371394-3 @

@

RT11

0_0402_5%

USB30@

2N7002DW-T/R7_SOT363-6

Title

USB_EN#USB30PWRON

1 2

DT2

1

R-

2

R+

3

T-

4

T+

LXES4XBAA6-027_MSOP8

@

+3V

5

QT3B

3

4

2

QT3A

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

GND GND GND GND

VCC GND

USB30@

61

D-

D+

1

10 11 12 13

0_0603_5%

RT41

8 7 6 5

W=80mils

USB_GND

12

0_0603_5%

0_0603_5% RT42

RT42

USB30@

USB_EN# <31,38>

+USB_VCCA

USB20_DN1_L USB20_DP1_L

USB30_SMI# <26>

USB_OC#0 <25,31,38>

35 53Thursday, January 13, 2011

USB30@

CT45 .1U_0402_16V7K

2

1

A

of

A

Codec

1

2

1

2

EC_MUTE#

+DVDD_IO

+3VS_DVDD

35 mA

23 24

14 15

21 22

16 17

2 3

4

11

12

13 18 36 35 31 43

42 49

7

1

9

DVDD

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

GPIO0/DMIC_DATA GPIO1/DMIC_CLK

PD#

RESET#

PCBEEP

SENSE A SENSE B CBP CBN MIC1_VREFO_L PVSS2

PVSS1 DVSS2 DVSS1

ALC259-GR_QFN48_7X7

0.1U_0402_16V4Z

1

2

1

2

EC_MUTE#<38>

AZ_RST_HD#<21>

0.1U_0402_16V4Z

CA1

CA2

CA2 10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V4Z

CA7

CA8

CA8 10U_0603_6.3V6M

10U_0603_6.3V6M

CA234.7U_0805_10V4Z CA234.7U_0805_10V4Z

12 12

CA294.7U_0805_10V4Z CA294.7U_0805_10V4Z

MONO_IN

SENSE_A

1 2

CA15

2.2U_0603_6.3V6K

DGND

1 2

+3VS

RA19 0_0603_5%RA19 0_0603_5%

@

1 2

+1.5VS

1 1

RA20 0_0603_5%

place close to chip

RA1

+3VS

Ext. Mic

2 2

EC_MUTE#

4.7K_0402_5%

EC control EC_MUTE# behavior: High-state / low-state

3 3

MIC1_R_L<37> MIC1_R_R<37>

Int. Mic

INT_MIC_DATA<19> INT_MIC_CLK<19>

27P_0402_50V8J @

12

RA45

CA47 0.1U_0603_50V7KCA47 0.1U_0603_50V7K

1 2

CA48 0.1U_0603_50V7KCA48 0.1U_0603_50V7K

1 2

CA49 0.1U_0603_50V7KCA49 0.1U_0603_50V7K

1 2

CA50 0.1U_0603_50V7KCA50 0.1U_0603_50V7K

1 2

RA18 0_0603_5%RA18 0_0603_5%

RA18 CLOSE TO ALC259

12

0_0603_1%

INT_MIC_DATA INT_MIC_CLK

CA83

CA12 100P_0402_50V8JCA12 100P_0402_50V8J

1

2

1 2

+MIC1_VREFO_L

RA46

RA46 FBMA-10-100505-301T

FBMA-10-100505-301T

B

+PVDD1

+AVDD

46

AVDD125AVDD2

PVDD139PVDD2

SPK_OUT_L+ SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L

HP_OUT_R

SYNC BCLK

SDATA_OUT

SDATA_IN

EAPD

SPDIFO

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

LDO_CAP

VREF

JDREF

CPVEE

AVSS1 AVSS2

600 mA

68 mA

38

UA1

40 41

45 44

32 33

10 6

5 8

47 48 20

29 30

28 27 19 34 26

37

0.1U_0402_16V4Z

1

CA57

2

10U_0603_6.3V6M

1

CA3

CA4

2

10U_0603_6.3V6M

RA4 75_0402_1%RA4 75_0402_1% RA5 75_0402_1%RA5 75_0402_1%

AZ_SDIN0_HD_R

AC_VREF AC_JDREF

RA9 20K_0402_1%RA9 20K_0402_1%

1 2

CA14 2.2U_0603_6.3V6KCA14 2.2U_0603_6.3V6K

AGND

1 2

0_0603_5%

1

C56

2

10U_0603_6.3V6M

0.1U_0402_16V4Z

1

CA5

2

0.1U_0402_16V4Z

SPKL+ <37> SPKL- <37>

SPKR+ <37> SPKR- <37>

RA6 33_0402_5%RA6 33_0402_5%

+MIC1_VREFO_R

12

RA2

CA6

0.1U_0402_16V4Z

0.1U_0402_16V4Z CA44

CA44

RA3

1 2

0_0603_5%

1

place close to chip

2

12

0.1U_0402_16V4Z

AZ_SDIN0_HD <21>

CA28 10U_0603_6.3V6MCA28 10U_0603_6.3V6M

1 2

1

CA17

2

1

2

HP_L <37> HP_R <37>

AZ_SYNC_HD <21>

AZ_BITCLK_HD <21>

AZ_SDOUT_HD <21>

place close to chip

C

+5VS

1

CA43

2

10U_0603_6.3V6M

+5VS

1

C16

C16 10U_0603_6.3V6M

10U_0603_6.3V6M

2

@

Beep sound

AZ_BITCLK_HD

+3VS

close to Audio Codec(UA1) for EMI

R235

4.7K_0402_5% @

4.7K_0402_5% @ AZ_RST_HD#

D

EC Beep

EC_BEEP#<38>

PCI Beep

PCH_SPKR<21>

place close to chip

@

1 2

R746 10_0402_5%

AZ_SYNC_HD

1 2

+MIC1_VREFO_R +MIC1_VREFO_L

1

@

C37

C37 1U_0402_6.3V6K

1U_0402_6.3V6K

2

1 2

CA80 22P_0402_50V8J

1 2

CA81 22P_0402_50V8J

1 2

CA82 22P_0402_50V8J

place close to chip

@

1

@

@ CA36

CA36 1U_0402_6.3V6K

1U_0402_6.3V6K

2

RA7

1 2

47K_0402_5%

RA8

1 2

47K_0402_5%

RA12

4.7K_0402_5%

12

E

CA13

1 2

0.1U_0402_16V4Z

1

CA18

CA18 100P_0402_50V8J

100P_0402_50V8J

2

MONO_IN

Sense Pin Impedance

39.2K

SENSE A

4 4

20K 10K

5.1K

39.2K 20K 10K

A

Codec Signals

PORT-I (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17)SENSE B PORT-H (PIN 20)

Function

Headphone out Ext. MIC

Int. MIC

place close to chip

MIC_SENSE<37>

NBA_PLUG<37>

B

RA10 20K_0402_1%RA10 20K_0402_1%

RA21 39.2K_0402_1%RA21 39.2K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

SENSE_A

Compal Secret Data

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

SCHEMATICS,MB A7204 4019CU

4019CU

Thursday, January 13, 2011

E

of

36 53

of

36 53

of

36 53

A

B

C

D

E

Speaker Connector

placement near Audio Codec UA1

RA30

1 1

2 2

SPKR+<36>

SPKR-<36>

SPKL+<36>

SPKL-<36>

SPKR+

SPKR-

SPKL+

SPKL-

RA30

0_0603_5%

RA34

0_0603_5%

RA35

0_0603_5%

RA36

0_0603_5%

12

CA25

CA26

12

CA19

CA20

12

@

12

@

1

470P_0402_50V8J

2 1

470P_0402_50V8J

2

1

470P_0402_50V8J

2 1

470P_0402_50V8J

2

1

CA27

CA27 1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

1

CA24

CA24 1U_0402_6.3V6K

1U_0402_6.3V6K

2

@

SPK_R1

SPK_R2

SPK_L1

SPK_L2

Ext. Mic

RA31

1K_0402_5%

RA22

12 12

MIC1_R_L<36>

MIC1_R_R<36>

RA32 2.2K_0402_5%RA32 2.2K_0402_5%

RA33 2.2K_0402_5%RA33 2.2K_0402_5%

12

+MIC1_VREFO_L

MIC1_L

MIC1_R

+MIC1_VREFO_R

HeadPhone/LINE Out JACK

JLINE

5

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

FOX_JA63331-B39S4-7F @

@

GND

GND GND

GND 8

8 7

7

10 9 8

SPK_L1 SPK_L2 SPK_R1 SPK_R2

DA4 PJDLC05_SOT23-3@DA4 PJDLC05_SOT23-3@

1

DA5 PJDLC05_SOT23-3@DA5 PJDLC05_SOT23-3@

1

3 2

JSPK

1

2

3

4

ACES_85204-0400N

ACES_85204-0400N @

@

NBA_PLUG<36>

HP_R<36> HP_L<36>

LA6

1 2

KC FBM-L11-160808-121LMT 0603

KC FBM-L11-160808-121LMT 0603 LA7

LA7

1 2

KC FBM-L11-160808-121LMT 0603

1

DA6 PJDLC05_SOT23-3

PJDLC05_SOT23-3

HP_R_L HP_L_L

3 2

@DA6

@

CA45

100P_0402_50V8J

CA46

100P_0402_50V8J

1

CA11

@CA11

@

2

0.1U_0402_16V4Z

For EMI

3 3

Ext.MIC/LINE IN JACK

JEXMIC

5

4

MIC_SENSE<36>

LA8

1 2

KC FBM-L11-160808-121LMT 0603

MIC1_L

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

KC FBM-L11-160808-121LMT 0603 LA9

LA9

1 2

KC FBM-L11-160808-121LMT 0603

Compal Secret Data

MIC1_L_RMIC1_R MIC1_L_L

1

DA7

@DA7

@

PJDLC05_SOT23-3

Deciphered Date

3 2

CA41

100P_0402_50V8J

CA42

1

CA21

2

0.1U_0402_16V4Z

For EMI

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

4

3

6 7

6

2

1

FOX_JA63331-B39S4-7F

FOX_JA63331-B39S4-7F @

@

37 53

E

10

GND

9

GND

8

8 7

7

A

of

A

0.1U_0402_16V4Z

1

C436

0.1U_0402_16V4Z

For EMI

CLK_PCI_EC

12

R377

10_0402_5%

1 1

+3VL +3VS

2 2

10_0402_5%

@

C443

22P_0402_50V8J

+3VL

@

R378

R378 47K_0402_5%

47K_0402_5%

12

C444 0.1U_0402_16V4ZC444 0.1U_0402_16V4Z

RP7

1 8 2 7 3 6 4 5

2.2K_0804_8P4R_5%

@

1 2

C819 1U_0402_6.3V6K

1 2

R3 100K_0402_5%R3 100K_0402_5%

1 2

C820 180P_0402_50V8J

@

1

2

ECRST#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PLT_RST# PLT_RST#

SUSP#

0.1U_0402_16V4Z

KSI[0..7]<39>

KSO[0..17]<39>

2

Close to EC

3 3

+3VALW

C818

@C818

@

12

5

0.1U_0402_16V4Z

U44

1

PM_SLP_S5#<23> PM_SLP_S4#<23>

R739 0_0402_5%930@R739 0_0402_5%930@

R760 0_0402_5%9012@R760 0_0402_5%9012@

R761 0_0402_5%9012@R761 0_0402_5%9012@

4 4

ON/OFFBTN#<40>

1 2

R349 100K_0402_5%R349 100K_0402_5%

IN1

2

IN2

ON/OFFBTN#

R740 0_0402_5%930@R740 0_0402_5%930@

R741 0_0402_5%9012@R741 0_0402_5%9012@

A

3

P

SLP_S5#SLP_S5#

4

O

G

@

SN74AHC1G08DCKR_SC70-5

12

ACIN_R

12

E51_TXD

ON/OFFBTN#_R

12

ON/OFFBTN#_RR

12

CLK_EC<23>

2

GATEA20<26>

KB_RST#<26>

SERIRQ<21,39>

LPC_FRAME#<21,39>

LPC_AD3<21,39> LPC_AD2<21,39> LPC_AD1<21,39> LPC_AD0<21,39>

CLK_PCI_EC<25>

PLT_RST#<5,13,25,32,33,35,39>

EC_SCI#<26>

KSI[0..7] KSO[0..17]

EC_SMB_CK1<43> EC_SMB_DA1<43> EC_SMB_CK2<13,22> EC_SMB_DA2<13,22>

PM_SLP_S3#<23>

EC_SMI#<26>

PCH_SUSPWRDN<23>

FAN_SPEED1<5>

E51_TXD<32>

E51_RXD<32>

PWR_LED#<40>

NUM_LED#<39>

R766 0_0402_5%

C437

B

0.1U_0402_16V4Z

1

C438

2

0.1U_0402_16V4Z

GATEA20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST# ECRST# EC_SCI#

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# SLP_S5# EC_SMI#

VGATE_RR USB_OC#0_RR PCH_SUSPWRDN

FAN_SPEED1 E51_TXD

E51_RXD ON/OFFBTN#_R PWR_LED# NUM_LED#

930@

CLK_EC_R

12

R20

100K_0402_5%

930@

B

1

C439

2

1000P_0402_50V7K

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6

KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9

KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

12

2

C440

1

U19

1

GATEA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LPC_FRAME#/LFRAME#

5

LPC_AD3/LAD3

7

LPC_AD2/LAD2

8

LPC_AD1/LAD1

10

LPC_AD0/LAD0

12

CLK_PCI_EC/PCICLK

13

PCIRST#/GPIO05

37

EC_RST#/ECRST#

20

EC_SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

EC_SMB_CK1/SCL0/GPIO44

78

EC_SMB_DA1/SDA0/GPIO45

79

EC_SMB_CK2/SCL1/GPIO46

80

EC_SMB_DA2/SDA1/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

GPIO0A

17

GPIO0B

18

GPIO0C

19

SUS_PWR_DN_ACK/GPIO0D

25

INVT_PWM/PWM2/GPIO11

28

FAN_SPEED1/FANFB0/GPIO14

29

FANFB1/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

SUSP_LED#/GPIO19

36

NUM_LED#/GPIO1A

122

XCLK1

123

XCLK0

1

C1

C1 20P_0402_50V8J

20P_0402_50V8J 930@

930@

2

+3VL

C441

C441 1000P_0402_50V7K

1000P_0402_50V7K

9

22

33

96

111

VCC

PWM Output

LPC & MISC

DA Output

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SPI Device I/F

SPI Flash ROM

GPIO

SM Bus

GPIO

GND

11

24

35

94

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

+3VL_R

R763 0_0402_5%R763 0_0402_5%

+3VL

125

67

VCC

AVCC

PWM0/GPIO0F

BEEP#/PWM1/GPIO10

FANPWM0/GPIO12

ACOFF/FANPWM1/GPIO13

BATT_TEMP/AD0/GPI38

BATT_OVP/AD1/GPI39

ADP_I/AD2/GPI3A

AD Input

DAC_BRIG/DA0/GPO3C

EN_DFAN1/DA1/GPO3D

IREF/DA2/GPO3E

EC_MUTE#/PSCLK1/GPIO4A

USB_EN#/PSDAT1/GPIO4B

CAP_INT#/PSCLK2/GPIO4C

PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXIOA00

WOL_EN/SDICLK/GPXIOA01

ME_EN/SDIMOSI/GPXIOA02

LID_SW#/GPXIOD00

SPIDO/MOSI

SPICLK/GPIO58

H_PECI/GPIO41

FSTCHG/GPIO50

BATT_CHG_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

PWR_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXIOA03 EC_LID_OUT#/GPXIOA04

EC_ON/GPXIOA05

EC_SWI#/GPXIOA06

ICH_PWROK/GPXIOA07

BKOFF#/GPXIOA08

GPO

RF_OFF#/GPXIOA09

PM_SLP_S4#/GPXIOD01

ENBKL/GPXIOD02

EAPD/GPXIOD03

EC_THERM#/GPXIOD04

SUSP#/GPXIOD05

PBTN_OUT#/GPXIOD06

EC_PME#/GPXIOD07

AGND

GND

KB930QF-A1_LQFP128_14X14

69

2010/09/03 2012/12/31

C

GND

GPI

113

12

C442

1 2

0.1U_0402_16V4Z

AD3/GPI3B AD4/GPI42 AD5/GPI43

DA3/GPO3F

SPIDI/MISO

SPICS#

GPIO40

GPXIOA10 GPXIOA11

V18R

930@

SUSP# VR_ON

21

EC_BEEP#

23

FANPWM

26

ACOFF

27

BATT_TEMPA

63 64

ADP_I

65

ADP_V

66 75 76

68

EN_DFAN1

70

IREF

71

CHGVADJ

72

EC_MUTE#

83

USB_EN#

84 85

H_PROCHOT#_EC_R

86

TP_CLK

87

TP_DATA

88

VGATE_R

97

WOL_EN

98

PWRME_CTRL#

99

LID_SW#_R

109

EC_SI_SPI_SO

119

EC_SO_SPI_SI

120

SPI_CLK_R

126

SPI_CS#

128

PM_PWROK_RR

73

EC_PECI

74

FSTCHG

89

BATT_FULL_LED#

90

CAPS_LED#

91

BATT_CHG_LOW_LED#

92 93

SYSON

95

VR_ON

121

ACIN_R

127

PCH_RSMRST#

100

EC_LID_OUT#

101

EC_ON_R

102 103

PM_PWROK_R

104

BKOFF#

105

VGA_ENBKL_RR

106 107

SA_PGOOD

108

ACIN_RR

110

VGA_ENBKL_R

112

ON/OFFBTN#_RR

114

LID_SW#_RR

115

SUSP#

116

PBTN_OUT#

117

USB_OC#0_R

118

+EC_V18R

124

R423 10K_0402_5%R423 10K_0402_5% R462 10K_0402_5%R462 10K_0402_5%

Compal Secret Data

Deciphered Date

EC_BEEP# <36>

FANPWM <5>

ACOFF <44>

BATT_TEMPA <43> ADP_I <43,44>

ADP_V <44>

EN_DFAN1 <5> IREF <44>

CHGVADJ <44>

EC_MUTE# <36>

USB_EN# <31,35>

TP_DATA <40>

WOL_EN <33,41>

PWRME_CTRL# <21>

R19

930@R19

930@

12

33_0402_5%

1 2

R461 43_0402_1%930@R461 43_0402_1%930@

1 2

BATT_FULL_LED# <40> CAPS_LED# <39>

SYSON <35,48> VR_ON <49>

PCH_RSMRST# <23> EC_LID_OUT# <22>

BKOFF# <19>

SA_PGOOD <46>

SUSP# <41,47,48,50> PBTN_OUT# <5,23>

C448

4.7U_0805_10V4Z

12 12

TP_CLK <40>

C19

FSTCHG <44>

D

EC_SI_SPI_SO <39> EC_SO_SPI_SI <39> SPI_CLK <39> SPI_CS# <39>

930@

33P_0402_50V8J

BATT_CHG_LOW_LED# <40>

R762 0_0402_5%@R762 0_0402_5%@

D

R737

0_0402_5%

VR_HOT#<49>

H_PROCHOT#_EC

12

2

G

BATT_TEMPA ACIN_D

H_PROCHOT#_EC_R

VGATE_R VGATE_RR

LID_SW#_R LID_SW#_RR

PH1 voltage compare function

R764 0_0402_5%@R764 0_0402_5%@

12

H_PECI <5>

support 51ON#

12

U19

KB930QF-A1_LQFP128_14X14

KB930QF-A1_LQFP128_14X14 9012@

9012@

VS

PH1+

EC_ON_R

VGA_ENBKL_RR

VGA_ENBKL_R

+3VL

R755 0_0402_5%930@R755 0_0402_5%930@

ACIN_RR

R765 0_0402_5%9012@R765 0_0402_5%9012@

USB_OC#0_RR

USB_OC#0_R

PM_PWROK_RR

PM_PWROK_R

Title

Size Document Number Rev

Thursday, January 13, 2011

Date: Sheet

E

H_PROCHOT# <5,43>

1 2 1 2

TP_CLK TP_DATA SYSON

ACIN_DACIN_R

930@R759

930@

12

C518

C518 47P_0402_50V8J

47P_0402_50V8J

H_PROCHOT#_EC

12

VGATE

12 12

LID_SW#

12 12

1 2

R379 4.7K_0402_5%R379 4.7K_0402_5%

1 2

R381 4.7K_0402_5%R381 4.7K_0402_5%

1 2

R5 4.7K_0402_5%R5 4.7K_0402_5%

EC_ON

12

EC_ON

12

D21

12

RB751V40_SC76-2

0_0402_5%

12

USB_OC#0

12

H_PECI

12

H_PROCHOT#_EC

12

E

R758 10K_0402_5%

1 2

VGATE <5,23,49>

LID_SW# <39>

38 53

13

D

Q41

2N7002_SOT23

S

C445 100P_0402_50V8JC445 100P_0402_50V8J C446 100P_0402_50V8JC446 100P_0402_50V8J

R744 0_0402_5%930@R744 0_0402_5%930@

R742 0_0402_5%930@R742 0_0402_5%930@ R743 0_0402_5%9012@R743 0_0402_5%9012@

R749 0_0402_5%930@R749 0_0402_5%930@ R748 0_0402_5%9012@R748 0_0402_5%9012@

R750 0_0402_5%930@R750 0_0402_5%930@

R753 0_0402_5%9012@R753 0_0402_5%9012@

R751 0_0402_5%930@R751 0_0402_5%930@

R752 0_0402_5%9012@R752 0_0402_5%9012@

R341 330K_0402_5%R341 330K_0402_5%

1 2

12

R759

R756 0_0402_5%9012@R756 0_0402_5%9012@

R757 43_0402_1%930@R757 43_0402_1%930@

R754 0_0402_5%9012@R754 0_0402_5%9012@

R745 0_0402_5%930@R745 0_0402_5%930@

R747 0_0402_5%9012@R747 0_0402_5%9012@

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

@

EC_ON <40>

VGA_ENBKL <13>

ACIN <23,44>

USB_OC#0 <25,31,35>

PM_PWROK <5,23>

of

+3VS

+5VS

A

SPI Flash (256KB)

+3VL

20mils

1

C451

930@C451

930@

0.1U_0402_16V4Z

1 1

SPI_CLK<38>

EC_SO_SPI_SI<38>

2

SPI_CS# SPI_CLK EC_SO_SPI_SI EC_SI_SPI_SO

SPI_CLK

8/30 Change U22 From SA00003GK00 to SA00003GM10 due to EOL of SA00003GK00 9/03 Change U22 change to SA00003FL10

U22

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

W25X10BVSNIG_SO8

R394

1 2

10_0402_5%

@

For EMI

930@U22

930@

4

VSS

2

Q

1 2

C454 10P_0402_50V8J

@

B

EC_SI_SPI_SO <38>

+3V_LID

1

C453

0.1U_0402_16V4Z

2

Lid SW

U21

U21 APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

GND

1

10P_0402_50V8J

3

VDD2VOUT

C452

C

1 2

R21 0_0402_5%@ R21 0_0402_5%@

1 2

R22 0_0402_5%R22 0_0402_5%

12

R383

R383 47K_0402_5%

47K_0402_5%

1

2

D

+3VALW +3VL

LID_SW# <38>SPI_CS#<38>

LPC Debug Port

SERIRQ<21,38>

R392 0_0402_5%R392 0_0402_5%

LPC_AD3<21,38>

LPC_AD1<21,38>

LPC_FRAME#<21,38>

Place the PAD under DDR DIMM.

+3VS

H7

1 2

7

8

9

10

DEBUG_PAD

@H7

@

56

4

3

2

1

R393

R393 22_0402_5%

22_0402_5% @

@

1 2 2

C457

C457 22P_0402_50V8J

22P_0402_50V8J

1

@

E

PLT_RST# <5,13,25,32,33,35,38>

LPC_AD2 <21,38>

LPC_AD0 <21,38>

CLK_PCI_DDR <25>

For EMI

KEYBOARD CONN.

Noticed: KB Connector Pin Definition

2 2

Reversed with KB Membrane Pin Definition

For EMI

KSI[0..7]

KSO[0..17]

JKB

34 33 32 31 30 29 28 27 26 25 24

3 3

23 22 21 20 19 18 17 16 15 14 13 12 11 10

9 8 7 6 5 4 3 2 1

ACES_88170-3400

@

4 4

KSI[0..7] <38>

KSO[0..17] <38>

JKB34 KSO16

KSO17

KSO2 KSO1 KSO0 KSO4 KSO3 KSO5 KSO14 KSO6 KSO7 KSO13 KSO8 KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 JKB4

CAPS_LED# NUM_LED#

1 2

R372 300_0402_5%R372 300_0402_5%

12

R376 300_0402_5%R376 300_0402_5%

A

+3VS

CAPS_LED# <38> NUM_LED# <38>

KSO16 KSO17 KSO2 KSO1 KSO0 KSO4 KSO3 KSO5

KSO14

KSO6 KSO7

KSO13

KSO8

KSO9 KSO10 KSO11 KSO12 KSO15 KSI7 KSI2 KSI3 KSI4 KSI0 KSI5 KSI6 KSI1 CAPS_LED# NUM_LED#

Close to JKB

1 2

C401 100P_0402_50V8JC401 100P_0402_50V8J

1 2

C402 100P_0402_50V8JC402 100P_0402_50V8J

1 2

C404 100P_0402_50V8JC404 100P_0402_50V8J

1 2

C405 100P_0402_50V8JC405 100P_0402_50V8J

1 2

C406 100P_0402_50V8JC406 100P_0402_50V8J

1 2

C407 100P_0402_50V8JC407 100P_0402_50V8J

1 2

C408 100P_0402_50V8JC408 100P_0402_50V8J

1 2

C409 100P_0402_50V8JC409 100P_0402_50V8J

1 2

C410 100P_0402_50V8JC410 100P_0402_50V8J

1 2

C411 100P_0402_50V8JC411 100P_0402_50V8J

1 2

C412 100P_0402_50V8JC412 100P_0402_50V8J

1 2

C413 100P_0402_50V8JC413 100P_0402_50V8J

1 2

C415 100P_0402_50V8JC415 100P_0402_50V8J

1 2

C416 100P_0402_50V8JC416 100P_0402_50V8J

1 2

C417 100P_0402_50V8JC417 100P_0402_50V8J

1 2

C418 100P_0402_50V8JC418 100P_0402_50V8J

1 2

C419 100P_0402_50V8JC419 100P_0402_50V8J

1 2

C420 100P_0402_50V8JC420 100P_0402_50V8J

1 2

C421 100P_0402_50V8JC421 100P_0402_50V8J

1 2

C422 100P_0402_50V8JC422 100P_0402_50V8J

1 2

C423 100P_0402_50V8JC423 100P_0402_50V8J

1 2

C424 100P_0402_50V8JC424 100P_0402_50V8J

1 2

C425 100P_0402_50V8JC425 100P_0402_50V8J

1 2

C427 100P_0402_50V8JC427 100P_0402_50V8J

1 2

C429 100P_0402_50V8JC429 100P_0402_50V8J

1 2

C431 100P_0402_50V8JC431 100P_0402_50V8J

1 2

C433 100P_0402_50V8JC433 100P_0402_50V8J

1 2

C435 100P_0402_50V8JC435 100P_0402_50V8J

B

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

E

of

39 53

of

39 53

of

39 53

A

3

For EMI request

4

+3VL

R395

R395 100K_0402_5%

100K_0402_5%

1 2

ON/OFFBTN#

1

C458

0.1U_0402_25V6

0.1U_0402_25V6 @

@

2

ON/OFFBTN# <38>

Power Button

For debug

TOP side

1 1

BTM side

1 2

SW3

SMT1-05-A_4P

5

6

B

13

D

R396

930@

2

G

S

1 2

EC_ON<38>

10K_0402_5%

PWR/B to MB Conn.

JPOWER

@JPOWER

@

1

2

3

4

5

G1

6

G2

ACES_85201-0405N

Q7

Q7 2N7002_SOT23-3

2N7002_SOT23-3 930@

930@

ON/OFFBTN#

2

3

D83

@D83

@

AZ5125-02S.R7G_SOT23-3

1

51_ON# <42>

C

D

E

TP Button/Conn.

SW_L

SW_R

2

3

1

For EMI request

LEFT

RIGHT

D20

@D20

@

AZ5125-02S.R7G_SOT23-3

SW1

SW4

5

6

5

6

3 4

SMT1-05_4P

3 4

SMT1-05_4P

JTOUCH

@JTOUCH

@

+5VS TP_CLK<38> TP_DATA<38>

SW_L SW_R

2

1

D19

AZ5125-02S.R7G_SOT23-3

3

@D19

@

1

2

3

4

5

P-TWO_161021-06021_6P-T

5 66G8

7

G7

8

0816->change JTOUCH connector

1 2

For ESD

2 2

POWER/SUSPEND LED

+5VALW

1 2

R398 510_0402_5%R398 510_0402_5%

Vf=1.9V~2.4V If=5mA

D22

2 1

YG

HT-110UYG5_YELLOW GREEN

3

PWR_LED# <38>

Screw Hole

H5

1

H1

1

H_3P0

H_3P0 @

@

H_2P7x3P2N

H_2P7x3P2N @

@

H6

1

H_3P0

H_3P0 @

@

H26

1

H_2P7N

H_2P7N @

@

H8

1

H_3P0

H_3P0 @

@

H9

1

H_3P0

H_3P0 @

@

H17

1

H10

1

H_1P0N

H_1P0N @

@

H_3P0

H_3P0 @

@

H11

H14

1

H_3P0

H_3P0 @

@

H_3P0

H_3P0 @

@

H12

1

H_3P0

H_3P0 @

@

H13

1

H_3P0

H_3P0 @

@

BATT CHARGE/FULL LED

Vf=1.8V~2.0V If=5mA(max)

3 3

+5VALW

D25

2

A

1

3

YG

ZZZ

YG

PJP1

HT-210UD5-UYG5_AMBER-YEL GRN

1 2

R399 510_0402_5%R399 510_0402_5%

1 2

R404 510_0402_5%R404 510_0402_5%

45@PJP1

45@

BATT_CHG_LOW_LED# <38>

BATT_FULL_LED# <38>

ISPD

H20

H22

1

H_4P2

H_4P2 @

@

H_4P2x4P7

H_4P2x4P7 @

@

H21

H23

1

H_4P2x4P7

H_4P2x4P7 @

@

H_4P7

H_4P7 @

@

For Codec AGND Dummy 3G

PJP1

CPU

PCB LA-7201P

4 4

PJP1

MDC

H2

1

MINI CARD

H18

1

H_2P9x3P9

H_2P9x3P9 @

@

H19

H_3P3

@

1

H3

H_2P9x3P9

H_2P9x3P9 @

@

1

PCB Fedical Mark PAD

FD2@FD2

FD1@FD1

@

1

SB

H15

H4

H_2P9

H_2P9 @

@

1

FD3@FD3

@

1

FD4@FD4

H_5P0N

H_5P0N @

@

1

H16

1

H_5P0N

H_5P0N @

@

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

E

of

40 53

of

40 53

of

40 53

A

R406

R406 OLS@

OLS@

5

C18

C18 @

@

+3VALW

1 2 34

2N7002KDWH_SOT363-6OLS@

1

2

+3VS

470_0805_5%

Q10B

+3VALW TO +3VS +5VALW TO +5VS

+3VALW +3VS

Q29

OLS@Q29

OLS@

8 7 6

1 1

5

SI4800BDY_SO8

1

C465

2

4.7U_0805_10V4Z

1

S

D

2

S

D

3

S

D

4

G

D

1

C466

C466 OLS@

OLS@

2

0.022U_0402_25V7K

Vgs=10V,Id=9A,Rds=18.5mohm

1

C459

1U_0402_6.3V6K

2

12

R412

R412 330K_0402_5%

330K_0402_5% OLS@

OLS@ 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

for EMI

0.1U_0402_10V6K

1

C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z

2

R409

1 2

47K_0402_5%

61

OLS@

OLS@ Q10A

Q10A

+VSB

SUSP

OLS@

2

B

+5VALW

8 7 6 5

SI4800BDY_SO8

1

C467

2

4.7U_0805_10V4Z

Q30

C

Vgs=10V,Id=9A,Rds=18.5mohm

+5VS

2

C822

C822 @

@

1

0.1U_0402_16V4Z

+5VS

Vgs=10V,Id=14.5A,Rds=6mohm

For EMI

2

C821

C821 @

@

1

0.1U_0402_16V4Z

4.7U_0805_10V4Z

OLS@Q30

OLS@

1

S

D

2

S

D

3

S

D

4

G

D

1

C468

C468 OLS@

OLS@

2

0.01U_0402_25V7K

1

2

12

R413

R413 200K_0402_5%

200K_0402_5% @

@

2N7002KDWH_SOT363-6

4.7U_0805_10V4Z C462

C462

C461

C461 1U_0402_6.3V6K

1U_0402_6.3V6K

OLS@

OLS@ R410

R410

1 2

47K_0402_5%

61

OLS@

OLS@ Q11A

Q11A

2

1

2

R407

R407 OLS@

OLS@

470_0805_5%

+VSB

SUSP SUSP

1 2 34

Q11B

OLS@ Q11B

OLS@

2N7002KDWH_SOT363-6

5

470_0805_5%

+1.5V

8 7 6 5

FDS6676AS_SO8

1

C469

2

4.7U_0805_10V4Z

D

+1.5V to +1.5VS

+1.5VS

1 2 3 4

C470

1

2

0.1U_0402_25V6

1

C463

C463 1U_0402_6.3V6K

1U_0402_6.3V6K

2

12

R414

R414 820K_0402_5%

820K_0402_5%

2N7002KDWH_SOT363-6

Q31

D D D D

WPS3@Q31

WPS3@

S S S G

4.7U_0805_10V4Z

C464

R411

1 2

220K_0402_5%

61

Q12A

2

E

Q31

FDS6676AS_SO8

1

2

+VSB

R408

5

FDS6676AS_SO8 PS3@

PS3@

470_0805_5%

1 2 34

Q12B

Q12B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

Each 250pF on CAP_MOS1 (2) will make

+5VALW

Slew Rate(uS/V) increase of 100uS/V

NLS@

U46

1

MOS1_D

2

ON_MOS1

3

5_VDD

4

ON_MOS2

MOS2_D5MOS2_S

SLG59M232VTR_TDFN14-10_3X2

1

@

C499

2

0.01U_0402_25V7K

NLS@

MOS1_S

CAP_MOS1

GND

CAP_MOS2

GND

10

9

8

7

6

11

0.1U_0402_16V4Z

1

2

1

C252

NLS@

2

120P_0402_50V4Z

Vgs=10V,Id=14.5A,Rds=6mohm

1

2

12

R430

R430 820K_0402_5%

820K_0402_5%

2N7002KDWH_SOT363-6

VGA_PWROK<50>

1

C481

4.7U_0805_10V4Z

2

R431

1 2

220K_0402_5%

61

Q13A

2

+VSB

VGA_PWROK#

13

D

2

G

S

R429

5

R146

1 2

100K_0402_5%

Q188

Q188 2N7002_SOT23-3

2N7002_SOT23-3

1 2 34

+3VS+5VS

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C249

C249

C236

@

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z C255

C255

@

2

ODD_EN#<26>

470_0805_5%

Q13B

Q13B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

+5VALW

+5VS TO +5VS_ODD

+3VS

5

Q53B

3

4

2N7002DW-T/R7_SOT363-6

SUSP<5,9,32>

SUSP#<38,47,48,50>

SUSP

2

G

+5VS

+5VALW

R441

R441 10K_0402_5%

10K_0402_5%

1 2

47K_0402_5%

R422

R422 100K_0402_5%

100K_0402_5%

1 2

13

D

Q6

Q6 2N7002_SOT23-3

2N7002_SOT23-3

S

NLS@

@

+5VALW

SUSP#<38,47,48,50>

+1.5V

Q43

8

D

7

D

6

D

5

D

FDS6676AS_SO8

1

C480

2

4.7U_0805_10V4Z

SUSP#<38,47,48,50>

1 2

47K_0402_5%

1

2

NLS@

R419

47K_0402_5%

+3VALW

1

NLS@

0.01U_0402_25V7K

2

C500

12

R415

0.01U_0402_25V7K

C496

+1.5V to +1.5V_MEM_GFX

+1.5V_MEM_GFX

C484

1

S

2

S

3

S

4

G

1U_0402_6.3V6K

1

C489

2

0.1U_0402_25V6

+1.8VS

R470

R470 470_0805_5%

470_0805_5%

1 2

13

D

Q190

2 2

S

SUSP

2

G

2N7002_SOT23-3

For S3 CPU Power Saving

PS3@

0.75VR_EN

2

VCCPPWRGD<46,47>

1 2

R158 100K_0402_5%

SUSP

+3VALW

R425

R425 100K_0402_5%

100K_0402_5%

PS3@

1 2 34

Q44B

Q44B 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

5

PS3@

61

PS3@

Q44A

Q44A 2N7002KDWH_SOT363-6

2N7002KDWH_SOT363-6

0.75VR_EN#

+3VALW TO +3V_LAN

3 3

WOL_EN<33,38>

+3VALW

12

RL148

RL148 100K_0402_5%

100K_0402_5% @

@

RL434

@RL434

@

1 2

47K_0402_5%

2

CL485

CL485 @

@

0.1U_0402_16V7K

1

AO3413_SOT23

2

@

@ CL484

CL484

0.01U_0402_25V7K

1

4.7U_0805_10V4Z

+3VALW

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

QL52

@

QL52

@

2

CL685

G

@

2

1

D

1 3

1

2

PJ33

PJ33 JUMP_43X79

JUMP_43X79

@

2

1

+3V_LAN

CL686

CL686 1U_0402_6.3V6K

1U_0402_6.3V6K

+3V_LAN rising time (10%~90%) need > 1ms and <100ms.

4 4

R440

+5VS_ODD

R457

470_0805_5%

1 2 61

Q53A

2

2N7002DW-T/R7_SOT363-6

2

C471

0.1U_0402_16V7K

1

2

AO3413_SOT23

C217

0.01U_0402_25V7K

1

C679

4.7U_0805_10V4Z

+0.75VS

R421

22_0805_5%

1 2

13

D

Q189

2N7002_SOT23-3

S

ODD_EN#

+5VS

Vgs=-4.5V,Id=3A,Rds<97mohm

2

S

Q45

G

2

1 3

1

2

@

SUSP

2

G

D

PJ28

2

JUMP_43X79

JUMP_43X79 @

@

1

+1.05VS_VCCP

1 2

13

2

G

+5VS_ODD

1

C680

C680 1U_0402_6.3V6K

1U_0402_6.3V6K

2

R468

R468 470_0805_5%

470_0805_5%

D

Q60

Q60 2N7002_SOT23-3

2N7002_SOT23-3

S

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

E

of

41 53

of

41 53

of

41 53

A

PL1

SMB3025500YA_2P

12

PC2

100P_0402_50V8J

TP0610K-T1-E3_SOT23-3

N1

@

SMB3025500YA_2P

1 2

@

PQ4

2

68_1206_5%

13

PF1

@

PJP1

1

+

2

+

1 1

SINGA_2DW-0005-B03

2 2

3

-

4

-

DC_IN_S1

BATT+

51_ON#<40>

21

10A_125V_451010MRL

@

PD4

12

RLS4148_LL34-2

100K_0402_1%

@

PR11

1 2 22K_0402_1%

22K_0402_1%

PR10

DC_IN_S2

12

PC1

1000P_0402_50V7K

12

@

12

PC6

0.22U_0603_25V7K

@

PR8

B

12

PC3

1000P_0402_50V7K

VIN

PD3

RLS4148_LL34-2

1 2

12

PC5

0.1U_0603_25V7K

@PD3

@

12

PR9 68_1206_5%

68_1206_5%

@

VIN

@PR9

@

12

PC4

VS

100P_0402_50V8J

C

1 2 @

@

PR1

1K_1206_5%

@

PD1

VIN

100K_0402_1%

VL

EN0<45> ACON<44>

100K_0402_1%

@

PD2

PD2 RB715F_SOT323-3

RB715F_SOT323-3

2 3

1000P_0402_50V7K

RLS4148_LL34-2

@

PR4

1 2

1

@

PC16

12

LM393DG_SO8

12

LM393DG_SO8

1K_1206_5%

N3

1 2 @

@

1K_1206_5%

1 2

1K_1206_5%

@ PR5

@

2.2M_0402_5%

N1

8

@

PU2B

P

+

7

O

-

G

4

@

PC13

1000P_0402_50V7K

N1

8

PU2A

P

+

1

O

-

G

4

@

PR2

@

PR5

PR3

5 6

12

3 2

12

PR6

12

34K_0402_1%

34K_0402_1% PR7

@PR7

@

<44>

66.5K_0402_1%

SSM3K7002FU_SC70-3

12

@

6251VREF

@

PQ1

12

PR36

PR36 150K_0402_1%

150K_0402_1%

13

D

S

@

2

G

D

12

PR38

PR38 511K_0402_1%

511K_0402_1%

12

PR35

PR35 255K_0402_1%

255K_0402_1%

@

47K_0402_1%

13

PQ2

PQ2 DTC115EUA_SC70-3

DTC115EUA_SC70-3

@

2

PR39

@

B+

12

PC14

PC14 1000P_0402_50V7K

1000P_0402_50V7K

12

+5VALWP

@

PACIN <44>

@

PJ332

2

JUMP_43X118

PJ352

@ PJ352

@

2

JUMP_43X118

PJ182

@ PJ182

@

2

JUMP_43X118

PJ452

@ PJ452

@

2

112

JUMP_43X118

112

+3VALW

+5VALW

+1.8VS+1.8VSP

+VCCSA+VCCSAP

@

PJ152

2

112

JUMP_43X118

@

PJ153

+1.5VP

(16A,640mils ,Via NO.= 32)

+1.05VS_VCCPP +1.05VS_VCCP

2

JUMP_43X118

PJ402

@ PJ402

@

2

JUMP_43X118

PJ403

@ PJ403

@

2

JUMP_43X118

112

+1.5V

(17A,680mils ,Via NO.=34)

PJ602

@

2

112

JUMP_43X118

+VGA_COREP

(33A,1320mils ,Via NO.=66) OCP=40A

JUMP_43X118

PJ603

@ PJ603

@

2

JUMP_43X118

112

+VGA_CORE

ACIN

Precharge detector Min. typ. Max.

H-->L 14.42V 14.74V 15.23V

+0.75VS

+3VALWP

(5A,200mils ,Via NO.= 10) OCP=8.6A

+5VALWP

(5A,200mils ,Via NO.= 10) OCP=7.9A

(1.65A,70mils ,Via NO.= 4) OCP=4.2A

PJ333

@ PJ333

@

+3VLP +3VL

(100mA,40mils ,Via NO.= 2)

3 3

+VSBP +VSB

2

JUMP_43X39

PJ72

@

2

JUMP_43X39

112

(120mA,40mils ,Via NO.= 1)

PJ76

@ PJ76

@

+0.75VSP

(1A,40mils ,Via NO.= 2)

2

JUMP_43X79

112

(6A,240mils ,Via NO.= 12)

4 4

L-->H 15.39V 15.88V 16.39V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

D

of

42 53

of

42 53

of

42 53

A

B

C

D

1 1

@

PJP2

1

2

3

4

5

5 GND GND GND GND

6

7

8

9

10 11 12 13

SUYIN_200045MR009G171ZR

2 2

3 3

EC_SMCA

PR20

100_0402_1%

BATT_S1

BATT_P4 BATT_P5 EC_SMDA

1 2

1

2

VL

PR25

100K_0402_1%

POK<23,45>

1 2

.1U_0402_16V7K

PD5

PJSOT24C_SOT23-3

3

PR21

PR21 100_0402_1%

100_0402_1%

1 2

PR26

1 2

0_0402_5%

PC12

@ PC12

@

PF2

21

15A_65V_451015MRL

12

PR14

PR14 1K_0402_1%

1K_0402_1%

PD6

PJSOT24C_SOT23-3

2 3

12

PR19

1K_0402_1%

B+

13

D

2

G

S

12

1

PR16

6.49K_0402_1%

12

PR24

1 2

22K_0402_1%

PQ6

PQ6 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

12

PR23

100K_0402_1%

VMB

12

PC15

@ PC15

@

.1U_0402_16V7K

TP0610K-T1-E3_SOT23-3

12

PC10

@

0.22U_0603_25V7K

+3VL

BATT_TEMPA <38>

EC_SMB_DA1 <38>

EC_SMB_CK1 <38>

PJ334

@ PJ334

@

2

112

JUMP_43X39

PQ5

2

SMB3025500YA_2P

1 2

12

PC7

1000P_0402_50V7K

13

PL2

12

PC11

@PC11

@

0.1U_0603_25V7K

12

PC8

0.01U_0402_25V7K

+VSBP

BATT+

VL

0.1U_0603_25V7K

VS_ON<45>

H_PROCHOT#<5,38>

SSM3K7002FU_SC70-3

PH1 under CPU botten side :

CPU thermal protection at 95 degree C Recovery at 56 degree C

12

PR15

12

@

PC9

PU1

1

VCC

2

GND

3

OT1

4

OT2

@

G718TM1U_SOT23-8

12

13

D

@

PQ7

S

PR29

@

10K_0402_1%

2

G

TMSNS1 RHYST1 TMSNS2 RHYST2

8 7 6 5

+3VS

Adapter Throttle Watt

65W_UMA

75W_DIS

71.25W

85.5W

75W_QCore 85.5W

PR15

19.6K_0402_1%

1 2

@

PR28

33K_0402_1%

Recovery Watt

62.4W

72W

@

PR18

8.66K_0402_1%

ADP_I <38,44>

12

PR22

4.64K_0402_1%

12

PR27

PR27 100K_0402_1%

100K_0402_1%

12

PH1

PH1 100K_0402_1%_NCP15WF104F03RC

100K_0402_1%_NCP15WF104F03RC

Throttle Point Recovery Point

1.48V

1.78V

1.308V

1.5V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2012/12/312009/09/03

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

D

43 53Thursday, January 13, 2011

A

of

A

PQ204

PQ203

AO4407AL_SO8

VIN

1 1

12

PR210

47K_0402_1%

DTA144EUA_SC70-3

2

61

D

2

G

PQ212A

S

2 2

S

DMN66D0LDW-7_SOT363-6

PACIN<42>

ACON<42>

ACOFF<38>

8 7

5

PQ210

2

13

1 3

PQ211

PQ211 DTC115EUA_SC70-3

DTC115EUA_SC70-3

DMN66D0LDW-7_SOT363-6

PR211

22K_0402_5%

PACIN

1 2

PQ213

DTC115EUA_SC70-3

ACOFF

4

2

P2 P3

1 2 36

12

PQ212B

5

G

13

12

PR212

PR212 200K_0402_1%

200K_0402_1%

PC210

0.1U_0603_25V7K

12

PR213

PR213 150K_0402_1%

150K_0402_1%

34

D

S

1 2 3 6

PQ204

AO4409L_SO8

8 7

5

4

PC211

PC211 5600P_0402_25V7K

5600P_0402_25V7K

1 2

PR216

10K_0402_1%

PC214

1 2

.1U_0402_16V7K

12

10K_0402_1%

100K_0402_1%

PR218

1 2 10K_0402_1%

10K_0402_1%

PC215

1 2

6251VREF 6251aclim

12

PC216

0.01U_0402_25V7K

FSTCHG<38>

0.01U_0402_25V7K

ADP_I<38,43>

IREF<38>

0.01U_0402_25V7K

PR220

154K_0402_1%

PR221

120K_0402_1%

PR215

0.02_1206_1%

1 2

ACSETIN

12

PR217

PC213

1 2

6800P_0402_25V7K

6251VREF<42>

PR222

1 2

24K_0402_1%

20K_0402_1%

B

@

PC207

B+

4 3

12

PC208

10U_1206_25V6M

@

12

PC209

10U_1206_25V6M

PL210

1 2

1.2UH_1231AS-H-1R2N=P3_2.9A_30%

VIN

LDO 5.075V

6251VDD

RB751V-40_SOD323-2

12

PC212

2.2U_0603_6.3V6K

PU200

12

PR219

1 2

100_0402_1%

PR223

12

1

VDD

2

ACSET

6251_EN CSON

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

6251VREF

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

PD201

1 2 12

PR227

10_1206_5%

DCIN

24

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

ISL6251AHAZ-T_QSOP24

23

22

21

20

19

18

17

16

15

14

13

LX_CHG

DH_CHG

BST_CHG

6251VDDP

DL_CHG

0.1U_0603_25V7K

1 2

12

PR226

PR226 191K_0402_1%

191K_0402_1%

ACSETIN

12

1.26V

PR228

14.3K_0402_1%

PC217

1000P_0402_25V8J

PC218

12

ACPRN

PR229 20_0402_5%PR229 20_0402_5%

1 2

PC219

0.047U_0402_16V7K

0.047U_0402_16V7K 1 2

1 2

PR230

20_0402_5% PR231 20_0402_5%PR231 20_0402_5% PC220

PC220

0.1U_0603_25V7K

20_0402_5%

12

1 2

PR232 2_0402_5%PR232 2_0402_5%

PR205

1 2

2.2_0603_1%

BST_CHGA

12

PR233 4.7_0603_5%PR233 4.7_0603_5%

PC221

4.7U_0603_6.3V6M

1 2

CSIN CSIP

PC205

12

0.1U_0603_25V7K

PD202

PD202 RB751V-40_SOD323-2

RB751V-40_SOD323-2

1 2

6251VDD

C

12

PC231

4.7U_0805_25V6-K

CSOP

12

PC232

PC233

4.7U_0805_25V6-K

PQ202

AO4466L_SO8

CHG_B+

12

4.7U_0805_25V6-K

6

578

4

6

578

4

PQ215

DTC115EUA_SC70-3

123

PQ215

PQ201

PQ201 AO4466L_SO8

AO4466L_SO8

PL202

10UH_MSCDRI-104A-100M-E_4.6A_20%

1 2

12

PR206

4.7_1206_5%

12

PC206

680P_0603_50V7K

PR237

10K_0402_1%

1 2 13

PQ208 AO4407AL_SO8PQ208 AO4407AL_SO8 1 2 3 6

4

PD9

1 2

1SS355_SOD323-2

PD10

1 2

2

1SS355_SOD323-2

PR235

CHGCHG

1 2

0.02_1206_1%

D

8 7

5

PR236

1 2

47K_0402_1%

ACOFF

PR290

1 2

200K_0402_1%

12

PC222

0.1U_0402_25V6

PACIN

PQ216

SSM3K7002FU_SC70-3

4 3

12

PC202

10U_1206_25V6M

VIN

13

D

2

G

S

12

PC203

10U_1206_25V6M

VIN

@

PC204

10U_1206_25V6M

BATT+

12

PR224

3 3

CHGVADJ<38>

CC=0.25A~3A IREF=1.016*Icharge IREF=0.254V~3.048V VCHLIM need over 95mV

CHGVADJ=(Vcell-4)*9.445

Vcell 4V

4.2V

4 4

4.35V

CHGVADJ

0V

1.882V

3.2935V

CP mode

Iada=0~3.42A(65W) CP= 92%*Iada; CP=3.147A Vaclim=1.08V(65W) PR222=75k PR223=20k PR215=0.02 Iada=0~3.947A(75W) CP= 92%*Iada; CP=3.63A Vaclim=0.736V(75W) PR222=24k PR223=20k PR215=0.02

A

1 2

15.4K_0402_1%

B

PR225

31.6K_0402_1%

1 2

6251VDD

PR241

10K_0402_1%

1 2

PQ214

PQ214 DTC115EUA_SC70-3

DTC115EUA_SC70-3

12

PR243

PR243 20K_0402_1%

20K_0402_1%

ACIN <23,38>

PACIN

ACPRN

PR240

100K_0402_1%

12

PR242

PR242 10K_0402_1%

10K_0402_1%

13

2

Vin Detector

18.089V

High

17.44V

Low

1.26 / 14.3 * 205.3 = 18.089V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

C

VIN

12

PR246

309K_0402_1%

12

PR248

47K_0402_1%

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

PR247

10K_0402_1%

10K_0402_1% 1 2

12

PC223

.1U_0402_16V7K

SCHEMATICS,MB A7204

4019CU

D

ADP_V <38>

44 53Thursday, January 13, 2011

A

of

5

4

3

2

1

2VREF_8205

D D

PL331

330U_6.3V_M

VS

RT8205_B+

12

PC360

10U_1206_25V6M

PC332

12

PC368

@

10U_1206_25V6M

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

1 2

1

+

2

DMN66D0LDW-7_SOT363-6

VL

PR373

1 2

0_0402_1%

@

PR371

1 2

100K_0402_1%

PL332

PR336

4.7_1206_5%

PC336

680P_0603_50V7K

100K_0402_1%

PR372

@

12

PQ360A

PR370

12

42.2K_0402_1%

12

@

6

578

PQ331

AO4466L_SO8

4

PC370

123

786

123

61

D

S

12

2.2U_0603_16V6K

0.1U_0603_25V7K

5

PQ332

4

AO4712L_SO8

ENTRIP1 ENTRIP2

2

G

13

2

12

PC361

PC335

1 2

499K_0402_1%

B+

34

D

5

G

S

PQ361

PQ361 DTC115EUA_SC70-3

DTC115EUA_SC70-3

+3VLP

4.7U_0805_10V6K

PR335

1 2

0_0603_5%

EN0<42>

PR360

1 2

12

PC362

1U_0402_6.3V6K

PQ360B

PQ360B DMN66D0LDW-7_SOT363-6

DMN66D0LDW-7_SOT363-6

HCB2012KF-121T50_0805

PC367

@

1 2

12

B+

1U_0805_25V7

C C

+3VALWP

Ipeak=5A Imax=3.5A F=305KHz

B B

Total Capacitor 150uF

VS_ON<43>

A A

BST_3V UG_3V LX_3V

LG_3V

1U_0603_10V6K

PR362

13K_0402_1%

1 2

PR363

20K_0402_1%

1 2

PR337

150K_0402_1%

1 2

PU330

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

PR361

100K_0402_5%

2VREF_8205

12

PC363

ENTRIP2

6

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

13

RT8205_B+

3

4

VREF

TONSEL

VIN16GND

15

12

PR364

30K_0402_1%

1 2

PR365

19.1K_0402_1%

1 2

ENTRIP1

PR357

150K_0402_1%

1 2

1

2

VFB1

ENTRIP1

VO1

PGOOD

VBST1

DRVH1

LL1

DRVL1

VCLK18VREG5

TPS51125ARGER_QFN24_4X4

17

12

PC364

4.7U_0805_10V6K

PC365

0.1U_0603_25V7K

RT8205_B+

12

PC366

10U_1206_25V6M

6

578

PQ351

PQ352

AO4712L_SO8

4

AO4466L_SO8

123

PL352

4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%

786

5

4

12

PR356

4.7_1206_5%

12

123

PL352

1 2

PC356

PC356 680P_0603_50V7K

680P_0603_50V7K

+5VALWP

1

+

PC352

330U_6.3V_M

PC352

330U_6.3V_M

2

24 23 22 21 20 19

BST_5V UG_5V LX_5V LG_5V

PR355

1 2

0_0603_5%

POK <23,43>

PC355

0.1U_0603_25V7K

1 2

VL

Ipeak=5A Imax=3.5A F=245KHz Total Capacitor 150uF

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Thursday, January 13, 2011

Date: Sheet

2

Date: Sheet

SCHEMATICS,MB A7204

4019CU

1

of

45 53

of

45 53

of

45 53

A

5

D D

C C

PL451

HCB2012KF-121T50_0805

+5VALW

VCCPPWRGD<41,47>

B B

12

1 2

PC496

1U_0805_25V7K

12

PC462

PC462 22U_0805_6.3VAM

22U_0805_6.3VAM

1 2

PR460 100K_0402_5%PR460 100K_0402_5%

PR461

1M_0402_5%

4

+3VS

PR471

10K_0402_5%

1 2

PR472

0_0402_5%

PU450

4

10

LX

PVIN

PG

9

LX

PVIN

8

SVIN

5

EN

TP

11

FB

NC

7

1

SY8035BDBC_DFN10_3X3

EN_VCCSAP

12

PC499

1 2

0.1U_0402_10V7K

12

2 3

6

FB=0.6Volt

SA_PGOOD <38>

LX_VCCSAP

FB_VCCSAP

1.8U_D104C-919AS-1R8N_9.5A_30%

1.8U_D104C-919AS-1R8N_9.5A_30% 1 2

12

PR480

12

PC468

PL452

PC467

4.7_1206_5%

4.7_1206_5% 68P_0402_50V8J

68P_0402_50V8J

680P_0603_50V7K

10K_0402_1%

12

PR479

3

PR465

3.4K_0402_1%

12

PR463

PR463 0_0402_5%

0_0402_5%

1 2

12

PR464

1 2

10_0402_5%

12

PR481

20K_0402_1%

13

D

2

G

S

PQ453

PQ453 2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3

12

PC497

22U_0805_6.3VAM

VCCSA_SENSE <9>

PR469

PR469 10K_0402_5%

10K_0402_5%

12

PC470

.1U_0402_16V7K

12

PC495

22U_0805_6.3VAM

+3VS

12

2

12

PC491

@

22U_0805_6.3VAM

PR468

PR468 10K_0402_5%

10K_0402_5%

PR470

@ PR470

@ 100K_0402_5%

100K_0402_5%

PC492

22U_0805_6.3VAM

+VCCSAP

PQ454

PQ454 PMBT2222A_SOT23-3

PMBT2222A_SOT23-3

1

2

3

PR473

100K_0402_5%

12

@ PR482

@ 10K_0402_5%

10K_0402_5%

PR482

1

VCCSAP_VID1 <9>

VID[0] VID[1] VCCSA Vout Require on 2011/ 2012 Required 0 0 0.9 V Yes/Yes 0 1 0.8 V Yes/Yes 1 1 0.75V No/Yes

A A

5

1 1 0.65V No/Yes

Note:Use VCCSA_SEL to switch High & Low Level for VID[1] (ie. VCCSA_SEL) due to the VID[0] is don't care for this setting.

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2010/09/03 2012/12/31

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

SCHEMATICS,MB A7204

Size Document Number Rev

C

Date: Sheet

4019CU

46 53Thursday, January 13, 2011

of

1

of

A

5

D D

4

3

2

1

PC476

0.1U_0402_25V6

12

@

B+

PC469

0.1U_0402_25V6

12

PL401

HCB4532KF-800T90_1812

12

1 2

HCB4532KF-800T90_1812

1 2

12

PC415

PC475

@

1

+

2

PR421

10_0402_5%

@

0.1U_0402_25V6

PC402

PC402 330U_6.3V_M

330U_6.3V_M

4.7U_0805_25V6-K

PR420

0_0402_5%

12

PC473

PC472

@

0.1U_0402_25V6

PC472

@

0.1U_0402_25V6

PC474

+1.05VS_VCCPP

Ipeak=12.5A Imax=8.75A F=305KHz Total Capacitor 990uF

12

VCCIO_SENSE <8>

12

@

PC471

0.1U_0402_25V6

12

@

C C

PR414

255K_0402_1%

1 2

PR410

0_0402_5%

SUSP#<38,41,48,50>

PR411

100_0603_1%

+5VALW

B B

1 2

4.7U_0603_6.3V6K

PC411

1 2

12

4.02K_0402_1%

1 2

12

PR413

10K_0402_1%

PR412

12

PC410

@

.1U_0402_16V7K

VCCPPWRGD<41,46>

2 3 4 5 6

1 2

@PR416

@

10K_0402_1%

1 2

PU400

TON OUT VCC FB PGOOD

PR415

10K_0402_1%

PR416

15

1

TP

EN_SKIP

VFB=0.75V

AGND7PGND

+3VS

14

BST

TPS5117_TQFN14_3P5X3P5

8

DH

LX ILIM VDD

DL

BST_1.05VS_VCCP

DH_1.05VS_VCCP

13

LX_1.05VS_VCCP

12 11 10 9

DL_1.05VS_VCCP

PR407

1 2

11K_0402_1%

PR405

3.3_0603_1%

1 2

PC405

0.1U_0603_25V7K

1 2

+5VALW

1 2

PC412

4.7U_0805_10V6K

PR510

2.2_0603_1%

12

PQ402

1.05VS_B+

12

5

PQ401

PC416

AON6428L_DFN8-5

123

5

123

PC416

4

AON6788_DFN8-5

12

PC414

PC413

4.7U_0805_25V6-K

PL402

PR406

PC406

680P_0603_50V7K

4.7U_0805_25V6-K

10U_1206_25V6M

1UH_FDUE1040D-1R0M-P3_21.3A_20%

12

4.7_1206_5%

12

A A

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

SCHEMATICS,MB A7204

4019CU

47 53Thursday, January 13, 2011

of

1

of

A

PL151

HCB2012KF-121T50_0805

B+

1 1

2 2

1 2

12

PC165

+1.5VP

1.5V_B+

12

PC163

4.7U_0805_25V6-K

680P_0402_50V7K

12

PC166

PC164

10U_1206_25V6M

4.7U_0805_25V6-K

@

PL152

PC152

PC152 330U_6.3V_M

330U_6.3V_M

SYSON<35,38>

1 2

0_0402_5%

0_0402_5% 1 2

1.8UH_SIL104R-1R8PF_9.5A_30%

1

+

2

PR160

12

PR156

4.7_1206_5%@

12

PC156

680P_0603_50V7K

@

4

PQ152

4

12

PC160

0.1U_0402_16V7K

@

5

123

5

123

PQ151

AON6428L_DFN8-5

AON6788_DFN8-5

+5VALWP

DL_1.5V

B

LX_1.5V

PR152

5.1_0603_5%

5.1_0603_5% 1 2

PC155

1U_0603_10V6K

SUSP#<38,41,47,50>

0_0603_5%

1 2

DH_1.5V

PR154

5.1K_0402_1%

5.1K_0402_1% 1 2

PR153

0_0402_5%

1 2

1U_0603_10V6K

PR151

PC153

0.1U_0603_25V7K

PC157

C

12

PR157

PR157 1M_0402_1%

1M_0402_1%

12

BOOT

UGATE

PHASE

LGATE

PGND

CS

VDD

PGOOD

S5

S3

TON

VDDP

15

+5VALWP

22

21

20

19

18

16

14

13

11

10

7

NC

VLDOIN

VTT

VTTGND

VTTSNS

GND

MODE

VTTREF

DEM

VDDQ

FB

NC

Thermal pad

17

25

RT8207GQW_WQFN24_4X4

23

24

1

2

3

4

5

6

8

9

PU150

+1.5VP

+5VALWP

+1.5VP

PC159

22U_0603_6.3V6M

0.033U_0402_16V7

PC158

12

PC161

PC161 10U_0603_6.3V6M

10U_0603_6.3V6M

0.75Vref

+0.75VSP

D

+3VALW +5VALW

1

PJ1811

JUMP_43X39@

3 3

SUSP#<38,41,47,50>

4 4

A

JUMP_43X39@

4.7U_0805_25V6-K

PR1811

0_0402_5%

1 2

PC1821

1

2

12

@ PC1851

@

0.47U_0402_6.3V6K

PC1851

12

PC1811

1U_0603_10V6K

PU1801

6

VCNTL

5

VIN

9

VIN

8

EN

7

POK

3

VOUT

4

VOUT

2

FB

GND

APL5930KAI-TRG_SO8

1

B

Ipeak=1.65A ILIM = 4A F=1MHz

12

PR1821

3K_0402_1%

PR1831

2.4K_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC1831

0.01U_0402_25V7K

12

+1.8VSP

PC1841

22U_0805_6.3V6M

Compal Secret Data

Deciphered Date

C

20012/12/312010/09/03

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

48 53Thursday, January 13, 2011

D

48 53Thursday, January 13, 2011

of

A

5

D D

4

3

2

1

+1.05VS_VCCPP

PC560

@PC560

@

.1U_0402_16V7K

PR537

54.9_0402_1%

1 2

PR599

499_0402_1%@

VR_HOT#<38>

C C

+3VS

1 2

1.91K_0402_1%

PR504

VGATE<5,23,38>

47P_0402_50V8J

2-ph: PR172=20.5K Vboot=0V, Iccmax=54 2-ph: PR172=169K Vboot=1.1V, Iccmax=54

B B

A A

+CPU_CORE Iocp=72A, IccMAX=53A Load line=1.9mohm DCR=1.1mohm

5

VR_SVID_DAT<8>

VR_SVID_CLK<8>

1 2

12

PC537

470KB_0402_5%_ERTJ0EV474J

+GFX_CORE Iocp=40A, IccMAX=24A Load line=3.9mohm DCR=1.1mohm

12

1 2

PH502

12

PR544

3.83K_0402_1%

A

1 2

PR545

27.4K_0402_1%

PR538

PR538 130_0402_1%

130_0402_1%

1 2

VR_SVID_ALRT#<8>

VR_ON<38>

12

PR513

1 2

20.5K_0402_1%

SVID_SCLK

PR512

8.06K_0402_1%

comp

12

PR524

267K_0402_1%

2K_0402_1%

1 2

PC510

PC510 470P_0402_50V8J

470P_0402_50V8J

SVID_ALERT#

PR540

1 2

0_0402_5%

PC509

680P_0402_50V7K

PR518

NTC

4

12

PC504

1000P_0402_50V7K

12

PC507

47P_0402_50V8J

PC508

1000P_0402_50V7K

1 2

FB

1 2

2.21K_0402_1%

+CPU_CORE

PU500

PR517

1

VWG

2

PGOODG

3

SDA

4

ALERT#

5

SCLK

6

VR_ON

7

PGOOD

8

VR_HOT#

9

NTC

10

VW

PR514

887_0402_1%

1 2

PR519

41

PAD

1 2

10_0402_1%

40

COMPG

comp

PC540 10P_0402_50V8JPC540 10P_0402_50V8J

ISNG

35

38

37

36

39

FBG

RTNG

ISUMPG

ISUMNG

ISL95835HRTZ-T_TQFN40_5X5

COMP11FB12ISEN3/ FB213ISEN214ISEN115RTN16ISUMN17ISUMP18VDD19VIN

FB

ISEN1

ISEN2

12

ISEN3

12

PC562

0.22U_0402_6.3V6K

VSUM-

12

PC546

@

<8>

PC545 330P_0402_50V7K

VCCSENSE

32

33

34

NTCG

BOOTG

PHASEG

UGATEG

12

PC544

12

PC552

@

330P_0402_50V7K

12

PR555

@

100_0402_1%

2-ph: PR517=1K for ~71A OCP

PR520

0.01U_0402_50V7K

0.01U_0402_50V7K 10_0402_1%

10_0402_1%

1 2

VSSSENSE

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

31

LGATEG

20

PR554

<8>

BOOT2

UGATE2

PHASE2 LGATE2

VCCP

PWM3 LGATE1 PHASE1

UGATE1

BOOT1

12

1K_0402_1%

PC550

3

BOOT2

30

UGATE2

29

PHASE2

28

LGATE2

27 26 25

LGATE1

24

PHASE1

23

UGATE1

22

BOOT1

21

+5VS

1 2 12

12

PC551

0.22U_0402_10V6K

CPU_B+

12

PC549

0.22U_0603_25V7K

PR558

PR558 1_0603_5%

1_0603_5%

PC548

1U_0603_10V6K

12

PR556

12

11K_0402_1%

0.033U_0402_16V7K

12

2010/09/03 2012/12/31

+5VS

12

PR562

0_0603_5%

12

PC554

1U_0603_10V6K

PR511

0_0402_5%

PR559

2.2_0603_5%

UGATE2

1 2

PR508

2.2_0603_1%

PHASE2

3.3_0603_1%

BOOT2

VSUM+

PR557

2.61K_0402_1%

PH503

PH503 10K_0402_1%_ERTJ0EG103FA

10K_0402_1%_ERTJ0EG103FA

VSUM-

PC553

PC553 .1U_0402_16V7K

.1U_0402_16V7K

LGATE2

UGATE1

PHASE1

3.3_0603_1%

BOOT1

LGATE1

Compal Secret Data

0.22U_0603_10V7K

12

PR515

12

PC515

1 2

PR509

2.2_0603_1%

PR525

12

PC525

Deciphered Date

ISNG

+5VALW

5

12

PC581

PC582

PC580

4

5

12

4

5

4

5

12

4

2

PC580

PQ505

4.7U_0805_25V6-K

AON6428L_DFN8-5

123

PQ508

AON6788_DFN8-5

123

CPU_B+

PQ503

AON6428L_DFN8-5

123

PQ504

123

AON6788_DFN8-5

PC582

4.7U_0805_25V6-K

12

PR516

4.7_1206_5%

12

VSUM+

PC516

ISEN2

680P_0603_50V7K

VSUM- ISEN1

12

PC583

PC584

4.7U_0805_25V6-K

12

PR526

4.7_1206_5%

VSUM+

12

ISEN1

PC526

VSUM-

680P_0603_50V7K

Title

Size Document Number Rev

Custom

Date: Sheet

12

@

PR576

0_0402_5%

CPU_B+

12

PR580

3.65K_0402_1%

1 2

PR582

10K_0402_1%

1 2

1_0402_5%

1 2

12

PC585

4.7U_0805_25V6-K

PR591

3.65K_0402_1%

1 2

10K_0402_1%

PR592

1 2

1_0402_5%

PR593

1 2

PR576

PR583

PC568

+

100U_25V_M

Connect to +5V can disable GFX portion

PL503

0.36UH_PCMC104T-R36MN1R17_30A_20%

PL503

4 3

1

+

PC569

PC566

2

@

100U_25V_M

PL504

0.36UH_PCMC104T-R36MN1R17_30A_20%

4 3

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

Thursday, January 13, 2011

1 2

PL501

HCB4532KF-800T90_1812

1

+CPU_CORE

2

PR581

10K_0402_1%

1

+CPU_CORE

2

PR590

10K_0402_1%

49

1

B+

12

ISEN2

12

A

53

of

5

4

3

2

1

PL601

3.3_0603_1%

1 2

0_0603_5%

PC628

2.2U_0603_6.3V6K

1 2

B+_VCORE

PR605

PR626

12

PC620

10U_1206_25VAK

0.1U_0603_25V7K

1 2

+5VALW

PR641

20K_0402_1%

12

PC621

10U_1206_25VAK

4.7U_0805_25V6-K

PR607

1 2

2.2_0603_1%

PC605

12

PC622

5

PQ601

Ipeak=20A Imax=14A F=300kHZ

4

AON6428L_DFN8-5

123

0.56U_PCMC104T-R56MN_25A_20%

5

PQ602

4

20K_0402_1%

1 2

13

D

PQ606

S

@

SSM3K7002FU_SC70-3

PQ602

123

@

PR640

+3VS

12

100K_0402_1%

2

G

12

AON6788_DFN8-5

@

PC634

@

12

PR642

@

1 2

.1U_0402_16V7K

PR606

4.7_1206_5%

PC606

680P_0603_50V7K

20K_0402_1%

1 2

13

D

SSM3K7002FU_SC70-3

S

@

@ 3K_0402_1%

3K_0402_1%

1 2

PR644

22K_0402_1%

G

2

PR643

1 2

PR633

PQ605

PL602

+3VS

PR632

4.3K_0402_1%

12

100K_0402_1%

12

PC633

.1U_0402_16V7K

GPU_VID1 <13>

1 2

PR634

Output capacitor=660uF

1

+

PR630

0_0402_5%

1 2

12

PC635

@

1000P_0402_50V7K

3K_0402_1%

1 2

PR636

@

1 2

22K_0402_1%

PR635

+

2

PR631

10_0402_5%

1 2

12

PC632

@

1000P_0402_50V7K

GPU_VID0 <13>

PC602

330U_6.3V_M

+VGA_COREP

VDD_SENSE<15>

1 2

B+

HCB4532KF-800T90_1812

D D

PR620

1.5K_0402_1%

VGA_PWROK<41>

PR624

120K_0402_1%

12

1 2

PC623

.1U_0402_16V7K

PR625

PR622 20K_0402_1%PR622 20K_0402_1%

SUSP#<38,41,47,48>

C C

PR625 = 470Kohm => FSW = 300KHZ PR625 = 200Kohm => FSW = 350KHZ PR625 = 100Kohm => FSW = 390KHZ PR625 = 47Kohm => FSW = 400KHZ

B B

1 2

12

470K_0402_1%

VCORE_VDD

PR621

3K_0402_1%

1 2

1

PGOOD

2

TRIP

3

EN

4

VFB

5

RF

RT8237

PU600

VBST

DRVH

V5IN

DRVL

DH_VCORE

BST_VCORE

10 9

LX_VCORE

8

SW

VCORE_VDD

7

DL_VCORE

6 11

TP

VFB(0.7)=Vout*Rbottom/(Rtop+Rbottom)

Pstate

P8/P12

P0

P0(cold)

A A

GPU_VID0 GPU_VID1 N12M-GE

0

1

0

1

x x

x

0.85V

1V

PR632=4.3K PR633=20K

PR641=20K

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

1

A

50 53Thursday, January 13, 2011

of

A

B

C

D

E

NO DATE PAGE MODIFICATION LIST PURPOSE

----------------------------------------------------------------------------------------------------------------------------------------

P36-P45 Release2010/04/201

1 1

2 2

3 3

4 4

Security Classification

2010/09/03 2012/12/31

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

E

A

of

51 53Thursday, January 13, 2011

of

51 53Thursday, January 13, 2011

of

51 53Thursday, January 13, 2011

5

4

3

2

1

HW PIR (Product Improve Record)

PWWHA LA-7201P SCHEMATIC CHANGE LIST REVISION CHANGE: 0.1 TO 0.2 GERBER-OUT DATE: 2010/10/29 NO DATE PAGE MODIFICATION LIST PURPOSE

---------------------------------------------------------------------------------------------------------------------

D D

1 10/29 17 SWAP FBA_CMD2 and FBA_CMD11 Schematic error 2 10/29 18 SWAP FBA_CMD18 and FBA_CMD11 Schematic error 3 10/29 21 Chane +3V_SPI to +3VS Schematic error 4 10/29 22 Add R23 for CLK_REQ_VGA# Reserve pull down for clock request

REVISION CHANGE: 0.2 TO 0.3 GERBER-OUT DATE: 2010/11/11 NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------1 11/03 25,31 Add USB20_N9 & USB20_P9 Support Wimax 2 11/03 32 Co-Lay Giga LAN Giga LAN support 3 11/22 22 Add R584 & R564 for Panel select For HW common design 4 11/22 5 change D86 (SC100001M00) For HW common design 5 11/22 5 cancel D85 @ For HW common design 6 11/24 32 LAN 8105E-VC update to 8105E-VL For HW common design

C C

REVISION CHANGE: 0.3 TO 0.4 GERBER-OUT DATE: 2010/12/29 NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------1 11/22 22 Add R584 & R564 for Panel select For HW common design 2 11/22 5 change D86 (SC100001M00) For HW common design 3 11/22 5 cancel D85 @ For HW common design 4 11/24 32 LAN 8105E-VC update to 8105E-VL For HW common design 5 11/29 32 Add WOL_EN output pin For HW common design 6 12/03 28,23 D7,D8,D12,D14,D16,D21 Change material For HW common design 7 12/03 21 SC1N202U010 (CHENMKO) change use SC600000B00 For HW common design 8 12/03 21 change U13 and follow UMA schematics (45@) For HW common design 9 12/03 19 R103 change use D1(SCS00002G00) For HW common design 10 12/03 13 net VGA_BL_PWM change to VGA_PWM and Add D2 For HW common design 11 12/03 39 Add +5VS TO +5VS_ODD schematics for ODD For PRD request 12 12/03 36 Add R349(100K)pull down for E51_TXD For HW common design

B B

13 12/07 30 JODD Pin8 add ODD_DETECT# For PRD request 14 12/07 30 JODD Pin11 add ODD_DA# For PRD request 15 12/07 30 Change +5VS to +5VS_ODD For PRD request 16 12/14 15 +VGA_CORE add 330u (C876) For HW common design 17 12/18 30 Add SW2 For test Zero power ODD 18 12/18 8 Add C3 To increase number of +CPU_CORE CAP 19 12/18 36 Add R739 to connect PM_SLP_S4# with SLP_S5# For HW common design 20 12/18 5 Add FAN RPM circuit For FAN BTO 21 12/19 30 Add USB3.0 function For USB3.0 BTO 22 12/19 30 Cancel USB2.0(JUSB2) For PRD request 23 12/19 27 Add HDMI function For PRD request 24 12/23 19 change LVDS connectorFor PUR request 25 12/24 41 Add U46 For Low Switch 26 12/24 28 Cancel R541,C514,C513,C256,L1 For HW common design 27 12/24 13 Add circuit for PCH to GPU 27Mhz For HW test 28 12/29 38 Change EC Schematic 29 12/29 33 Change UL3 material For HW common design

A A

30 12/29 17,18 Change UV3,UV4,UV5,UV6 material For NVidia require 31 12/29 21 Change U2 material For PJE require 32 12/29 2 Modify Block Diagram Update

5

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A7204

4019CU

52 53Thursday, January 13, 2011

1

A

of

5

4

3

2

1

HW PIR (Product Improve Record)

REVISION CHANGE: 0.3 TO 0.4 GERBER-OUT DATE: 2011/01/04 NO DATE PAGE MODIFICATION LIST PURPOSE

--------------------------------------------------------------------------------------------------------------------1 01/04 41 Change C252 0.1u to 120p Update HW design 2 01/04 19 Change C120 10K to 47K Update HW design 3 01/04 5 Change U10,R312,C93 to PS3@ Update HW design 4 01/04 7 Change Q14,R463,C140,R465 to PS3@ Update HW design 5 01/04 9 Change C213,C212,C211,C210 to PS3@ Update HW design 6 01/04 23 Change R316 to PS3@ Update HW design

D D

C C

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2010/09/03 2012/12/31

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

SCHEMATICS,MB A7204

4019CU

1

A

of

53 53Thursday, January 13, 2011

of

53 53Thursday, January 13, 2011

of

53 53Thursday, January 13, 2011

COMPAL LA-7204P Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual