Compal LA-6852P PBU01, NB500, NB505 Schematic

A
1 1
B
C
D
E
Compal Confidential
2 2
Couger-Brazos
PBU01 LA-6852P Schematics Document
AMD APU Ontario-FT1 + FCH Hudson-M1
2012-2-20
3 3
REV:1.A
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
137Monday, February 20, 2012
137Monday, February 20, 2012
137Monday, February 20, 2012
E
D
D
D
of
of
of
A
Compal confidential
File Name : LA-6852P
B
C
D
E
1 1
APU PCI-E bus
RTL8105E 10/100M
page 19
LVDS Conn.
page 10
HDMI Conn.
page 11
WWAN
USB x1
page 18
AMD Ontario APU
FT1 BGA 413-Ball 19mm x 19mm
page 5,6,7,8
x4 UMI Gen. 1
2.5GT/s per lane
Memory BUS(DDRIII)
Single Channel
1.5V DDRIII 1066
USB2.0x6
204pin DDRIII-SO-DIMM X1
BANK 0, 1, 2, 3
USB PORT 2.0 x1(Left)
USB PORT 2.0 x2(Right)
Int. Camera
page 9
page 23
page 23
page 10
Daughter board
LAN
2 2
10/100M conn
page 19 page 20
Hudson M1
BGA 605-Ball 23mm x 23mm
AZALIA bus
page 12,13,14,15,16
SATA port 0
SPI ROM
page 14
LPC BUS
RTS5137
WLAN&BT
APU PCI-E x1
page 18
Realtek ALC269
page 21
Card Reader
2 in 1
SPK
Audio Jack
page 20
page 22
page 22
EC
3 3
ENE KBC926 E0
page 26
SATA HDD CONN
page 17
Int.KBD
page 24
RTC CKT.
page 12
PWR BTN/B LS-6851P
Touch Pad
page 25
SPI ROM
page 24
TP&Lid switch/B
Power On/Off CKT.
page 25
DC/DC Interface CKT.
4 4
page 27
LS-6852P USB/B
LS-6853P LED/B
Daughter board
LS-6854P
Power Circuit DC/DC
page 30 31 32 33 34 35 36 37
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
E
of
of
of
237Monday, February 20, 2012
237Monday, February 20, 2012
237Monday, February 20, 2012
D
D
D
A
Voltage Rails
O MEANS ON X MEANS OFF
B
C
Symbol Note :
D
DAZ P/N
ZZZ1
ZZZ1
E
: means Digital Ground : means Analog Ground
LA-6852P
1 1
State
power plane
+3VL +5VL
+RTCVCC
+1.1VALW
+1.5V+5VALW
+5VSB+ +3VS+3VALW +1.8VS +1.5VS +1.1VS +1.0VS +0.75VS +APU_CORE +APU_VDDNB
@ : means just reserve , no build
LA-6852P
1.2G APU P/N 1.2G APU P/N 1G APU P/N
U1
U1
1.2G APU R3
1.2G APU R3
1G2R3@
1G2R3@
U1
U1
1.2G APU R1
1.2G APU R1
1G2R1@
1G2R1@
U1
U1
1G APU R1
1G APU R1
1GR1@
1GR1@
S0
2 2
S1
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
O O O O O
X
FCH SM Bus0 Address
Power
3 3
+3VS
Device
DDR SO-DIMM 0
HEX Address
1010 0000 bA0 H
EC SM Bus1 Address
Device Address Address
+3VL
4 4
HEX HEX
16 H
0001 011X bSmart Battery
O O O O
X
O
XX X
XX X
FCH SM Bus1 Address
EC SM Bus2 Address
PowerPower
Device
OO OO
X
X
HEX AddressDevicePower
BTO (Build-To-Order) Option Table
Function
Description
BTO
Sleep&Charger
Support No Support
CHG@
non-CHG@
SMBUS Control Table
CPU THERMAL SENSOR
V
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2 LCD_EDID_CLK LCD_EDID_DATA HDMICLK HDMIDAT FCH_SMCLK0 FCH_SMDAT0 FCH_SMCLK1 FCH_SMDAT1
SOURCE
KB926
KB926
APU FT1
APU FT1
FCH M1
FCH M1
BATT
08/05 update pin define
Sleep&Music
Support No Support
ALC269@ ALC259@
SODIMM 0
CLK GEN
V
WLAN WWAN
V
LCD DDC ROM
V
HDMI DDC ROM
V
APU
V
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/10/06 2009/10/06
2008/10/06 2009/10/06
2008/10/06 2009/10/06
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
E
D
D
D
of
of
of
337Monday, February 20, 2012
337Monday, February 20, 2012
337Monday, February 20, 2012
5
4
3
2
1
B+
DESIGN CURRENT 0.1A DESIGN CURRENT 0.1A DESIGN CURRENT 3.18A
+3VL +5VL +5VALW
SUSP
D D
N-CHANNEL SI4800BDY
DESIGN CURRENT 3.11A
+5VS
SUSP#
UP6182CQAG
SY8033BDBC
DESIGN CURRENT 2.15A
DESIGN CURRENT 0.632A
+1.8VS
+3VALW
SUSP
N-CHANNEL SI4800BDY
C C
ENVDD
P-CHANNEL
AP_2301
DESIGN CURRENT 4.777A
DESIGN CURRENT 1.0A
+3VS
+LCD_VDD
WOL_EN#
P-CHANNEL
AP-2301
DESIGN CURRENT 500mA
+3V_LAN
POK
G5603RU1U
SUSP
N-CHANNEL IRF8113PBF
DESIGN CURRENT 0.377A
DESIGN CURRENT 3.832A
+1.1VALW
+1.1VS
SUSP
APL5916KAI
B B
VR_ON
ISL6265
DESIGN CURRENT 5.7A
DESIGN CURRENT 11A
DESIGN CURRENT 10A
+1.05VS
+APU_CORE
+APU_VDDNB
SYSON
G5603RU1U
SUSP
N-CHANNEL SI4800BDY
DESIGN CURRENT 4A
DESIGN CURRENT 1A
+1.5V
+1.5VS
SUSP
LDO
A A
5
UP7711U8
4
DESIGN CURRENT 0.5A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+0.75VS
2008/10/31 2009/10/31
2008/10/31 2009/10/31
2008/10/31 2009/10/31
3
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
1
of
437Monday, February 20, 2012
of
437Monday, February 20, 2012
of
437Monday, February 20, 2012
D
D
D
A
1 1
PCIE_PTX_C_IRX_P019 PCIE_PTX_C_IRX_N019
PCIE_PTX_C_IRX_P118
PCIE_PTX_C_IRX_P218
+1.05VS
DVT +1.0VS-->+1.05VS
2 2
B
U1A
U1A
AA6
P_GPP_RXP0
Y6
P_GPP_RXN0
AB4
P_GPP_RXP1
AC4
P_GPP_RXN1
AA1
P_GPP_RXP2
AA2
P_GPP_RXN2
Y4
P_GPP_RXP3
Y3
R1
R1
1 2
2K_0402_1%
2K_0402_1%
UMI_RX0P12 UMI_RX0N12
UMI_RX1P12 UMI_RX1N12
UMI_RX2P12 UMI_RX2N12
UMI_RX3P12 UMI_RX3N12
P_GPP_RXN3
Y14
P_ZVDD_10
AA12
P_UMI_RXP0
Y12
P_UMI_RXN0
AA10
P_UMI_RXP1
Y10
P_UMI_RXN1
AB10
P_UMI_RXP2
AC10
P_UMI_RXN2
AC7
P_UMI_RXP3
AB7
P_UMI_RXN3
ONTARIO-FT1_BGA_413P-T
ONTARIO-FT1_BGA_413P-T
1GR3@
1GR3@
P_GPP_TXP0 P_GPP_TXN0
P_GPP_TXP1 P_GPP_TXN1
P_GPP_TXP2 P_GPP_TXN2
P_GPP_TXP3
PCIE I/F
PCIE I/F
P_GPP_TXN3
UMI I/F
UMI I/F
P_ZVSS
P_UMI_TXP0 P_UMI_TXN0
P_UMI_TXP1 P_UMI_TXN1
P_UMI_TXP2 P_UMI_TXN2
P_UMI_TXP3 P_UMI_TXN3
C
AB6 AC6
AB3 AC3
Y1 Y2
V3 V4
AA14
AB12 AC12
AC11 AB11
AA8 Y8
AB8 AC8
PCIE_ITX_PRX_P0 PCIE_ITX_PRX_N0
PCIE_ITX_PRX_P1 PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P2 PCIE_ITX_PRX_N2
R2
R2
1 2
1.27K_0402_1%
1.27K_0402_1%
UMI_TX0P_C UMI_TX0N_C
UMI_TX1P_C UMI_TX1N_C
UMI_TX2P_C UMI_TX2N_C
UMI_TX3P_C UMI_TX3N_C
C1420.1U_0402_16V7K C1420.1U_0402_16V7K
12
C1430.1U_0402_16V7K C1430.1U_0402_16V7K
12
C2830.1U_0402_16V7K C2830.1U_0402_16V7K
12
C2840.1U_0402_16V7K C2840.1U_0402_16V7K
12
C1360.1U_0402_16V7K C1360.1U_0402_16V7K
12
C1370.1U_0402_16V7K C1370.1U_0402_16V7K
12
C2 0.1U_0402_16V7KC2 0.1U_0402_16V7K
1 2
C1 0.1U_0402_16V7KC1 0.1U_0402_16V7K
1 2
C4 0.1U_0402_16V7KC4 0.1U_0402_16V7K
1 2
C3 0.1U_0402_16V7KC3 0.1U_0402_16V7K
1 2
C5 0.1U_0402_16V7KC5 0.1U_0402_16V7K
1 2
C6 0.1U_0402_16V7KC6 0.1U_0402_16V7K
1 2
C8 0.1U_0402_16V7KC8 0.1U_0402_16V7K
1 2
C7 0.1U_0402_16V7KC7 0.1U_0402_16V7K
1 2
D
PCIE_ITX_C_PRX_P0 19 PCIE_ITX_C_PRX_N0 19
PCIE_ITX_C_PRX_P1 18 PCIE_ITX_C_PRX_N1 18PCIE_PTX_C_IRX_N118
PCIE_ITX_C_PRX_P2 18 PCIE_ITX_C_PRX_N2 18PCIE_PTX_C_IRX_N218
UMI_TX0P 12 UMI_TX0N 12
UMI_TX1P 12 UMI_TX1N 12
UMI_TX2P 12 UMI_TX2N 12
UMI_TX3P 12 UMI_TX3N 12
E
LAN WWAN WLAN
R280
R280 10K_0402_5%
10K_0402_5%
+5VS
10U_0805_10V6K
10U_0805_10V6K
+3VS
12
R3
R3 10K_0402_5%
10K_0402_5%
2
C9
C9
1
@
@
6 5
4 3 2 1
2
C314
C314
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CONN@
CONN@ E&T_3806-F04N-02R
E&T_3806-F04N-02R
GND2 GND1
4 3 2 1
JFAN1
JFAN1
+5VS
12
@
@
FAN_SPEED126
3 3
EC_PWM_FAN26
R281 0_0603_5%R281 0_0603_5%
1
@
@
C305
C305 68P_0402_50V8J
68P_0402_50V8J
2
12
EC_PWM_FAN_R
9/6 add C314 for RF
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/04/14 2009/04/14
2008/04/14 2009/04/14
2008/04/14 2009/04/14
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
537Monday, February 20, 2012
537Monday, February 20, 2012
537Monday, February 20, 2012
E
D
D
D
of
of
of
1
A A
DDR_A_MA09 DDR_A_MA19 DDR_A_MA29 DDR_A_MA39 DDR_A_MA49 DDR_A_MA59 DDR_A_MA69 DDR_A_MA79 DDR_A_MA89 DDR_A_MA99 DDR_A_MA109 DDR_A_MA119 DDR_A_MA129 DDR_A_MA139 DDR_A_MA149 DDR_A_MA159
DDR_A_BS#09 DDR_A_BS#19 DDR_A_BS#29
DDR_A_DM09 DDR_A_DM19 DDR_A_DM29 DDR_A_DM39 DDR_A_DM49 DDR_A_DM59 DDR_A_DM69
B B
+1.5V
R4 1K_0402_5%R4 1K_0402_5%
1 2
C C
MA_EVENT_L
DDR_A_DM79
DDR_A_DQS#09 DDR_A_DQS#19 DDR_A_DQS#29 DDR_A_DQS#39 DDR_A_DQS#49 DDR_A_DQS#59 DDR_A_DQS#69 DDR_A_DQS#79
DDR_RST#9 MA_EVENT_L9
DDR_CKE0_DIMMA9 DDR_CKE1_DIMMA9
DDR_A_ODT09 DDR_A_ODT19
DDR_CS0_DIMMA#9 DDR_CS1_DIMMA#9
DDR_A_RAS#9 DDR_A_CAS#9 DDR_A_WE#9
2
U1E DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS09 DDR_A_DQS19 DDR_A_DQS29 DDR_A_DQS39 DDR_A_DQS49 DDR_A_DQS59 DDR_A_DQS69 DDR_A_DQS79
DDR_A_CLK09
DDR_A_CLK#09
DDR_A_CLK19
DDR_A_CLK#19
DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1
DDR_RST# MA_EVENT_L
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_ODT0 DDR_A_ODT1
DDR_CS0_DIMMA# DDR_CS1_DIMMA#
DDR_A_RAS# DDR_A_CAS# DDR_A_WE#
U1E
R17
M_ADD0
H19
M_ADD1
J17
M_ADD2
H18
M_ADD3
H17
M_ADD4
G17
M_ADD5
H15
M_ADD6
G18
M_ADD7
F19
M_ADD8
E19
M_ADD9
T19
M_ADD10
F17
M_ADD11
E18
M_ADD12
W17
M_ADD13
E16
M_ADD14
G15
M_ADD15
R18
M_BANK0
T18
M_BANK1
F16
M_BANK2
D15
M_DM0
B19
M_DM1
D21
M_DM2
H22
M_DM3
P23
M_DM4
V23
M_DM5
AB20
M_DM6
AA16
M_DM7
A16
M_DQS_H0
B16
M_DQS_L0
B20
M_DQS_H1
A20
M_DQS_L1
E23
M_DQS_H2
E22
M_DQS_L2
J22
M_DQS_H3
J23
M_DQS_L3
R22
M_DQS_H4
P22
M_DQS_L4
W22
M_DQS_H5
V22
M_DQS_L5
AC20
M_DQS_H6
AC21
M_DQS_L6
AB16
M_DQS_H7
AC16
M_DQS_L7
M17
M_CLK_H0
M16
M_CLK_L0
M19
M_CLK_H1
M18
M_CLK_L1
N18
M_CLK_H2
N19
M_CLK_L2
L18
M_CLK_H3
L17
M_CLK_L3
L23
M_RESET_L
N17
M_EVENT_L
F15
M_CKE0
E15
M_CKE1
W19
M0_ODT0
V15
M0_ODT1
U19
M1_ODT0
W15
M1_ODT1
T17
M0_CS_L0
W16
M0_CS_L1
U17
M1_CS_L0
V16
M1_CS_L1
U18
M_RAS_L
V19
M_CAS_L
V17
M_WE_L
ONTARIO-FT1_BGA_413P-T
ONTARIO-FT1_BGA_413P-T
1GR3@
1GR3@
DDR SYSTEM MEMORY
DDR SYSTEM MEMORY
M_ZVDDIO_MEM_S
M_DATA0 M_DATA1 M_DATA2 M_DATA3 M_DATA4 M_DATA5 M_DATA6 M_DATA7
M_DATA8
M_DATA9 M_DATA10 M_DATA11 M_DATA12 M_DATA13 M_DATA14 M_DATA15
M_DATA16 M_DATA17 M_DATA18 M_DATA19 M_DATA20 M_DATA21 M_DATA22 M_DATA23
M_DATA24 M_DATA25 M_DATA26 M_DATA27 M_DATA28 M_DATA29 M_DATA30 M_DATA31
M_DATA32 M_DATA33 M_DATA34 M_DATA35 M_DATA36 M_DATA37 M_DATA38 M_DATA39
M_DATA40 M_DATA41 M_DATA42 M_DATA43 M_DATA44 M_DATA45 M_DATA46 M_DATA47
M_DATA48 M_DATA49 M_DATA50 M_DATA51 M_DATA52 M_DATA53 M_DATA54 M_DATA55
M_DATA56 M_DATA57 M_DATA58 M_DATA59 M_DATA60 M_DATA61 M_DATA62 M_DATA63
M_VREF
3
DDR_A_D0
B14
DDR_A_D1
A15
DDR_A_D2
A17
DDR_A_D3
D18
DDR_A_D4
A14
DDR_A_D5
C14
DDR_A_D6
C16
DDR_A_D7
D16
DDR_A_D8
C18
DDR_A_D9
A19
DDR_A_D10
B21
DDR_A_D11
D20
DDR_A_D12
A18
DDR_A_D13
B18
DDR_A_D14
A21
DDR_A_D15
C20
DDR_A_D16
C23
DDR_A_D17
D23
DDR_A_D18
F23
DDR_A_D19
F22
DDR_A_D20
C22
DDR_A_D21
D22
DDR_A_D22
F20
DDR_A_D23
F21
DDR_A_D24
H21
DDR_A_D25
H23
DDR_A_D26
K22
DDR_A_D27
K21
DDR_A_D28
G23
DDR_A_D29
H20
DDR_A_D30
K20
DDR_A_D31
K23
DDR_A_D32
N23
DDR_A_D33
P21
DDR_A_D34
T20
DDR_A_D35
T23
DDR_A_D36
M20
DDR_A_D37
P20
DDR_A_D38
R23
DDR_A_D39
T22
DDR_A_D40
V20
DDR_A_D41
V21
DDR_A_D42
Y23
DDR_A_D43
Y22
DDR_A_D44
T21
DDR_A_D45
U23
DDR_A_D46
W23
DDR_A_D47
Y21
DDR_A_D48
Y20
DDR_A_D49
AB22
DDR_A_D50
AC19
DDR_A_D51
AA18
DDR_A_D52
AA23
DDR_A_D53
AA20
DDR_A_D54
AB19
DDR_A_D55
Y18
DDR_A_D56
AC17
DDR_A_D57
Y16
DDR_A_D58
AB14
DDR_A_D59
AC14
DDR_A_D60
AC18
DDR_A_D61
AB18
DDR_A_D62
AB15
DDR_A_D63
AC15
M23
R6 39.2_0402_1%R6 39.2_0402_1%
1 2
M22
DDR_A_D0 9 DDR_A_D1 9 DDR_A_D2 9 DDR_A_D3 9 DDR_A_D4 9 DDR_A_D5 9 DDR_A_D6 9 DDR_A_D7 9
DDR_A_D8 9 DDR_A_D9 9 DDR_A_D10 9 DDR_A_D11 9 DDR_A_D12 9 DDR_A_D13 9 DDR_A_D14 9 DDR_A_D15 9
DDR_A_D16 9 DDR_A_D17 9 DDR_A_D18 9 DDR_A_D19 9 DDR_A_D20 9 DDR_A_D21 9 DDR_A_D22 9 DDR_A_D23 9
DDR_A_D24 9 DDR_A_D25 9 DDR_A_D26 9 DDR_A_D27 9 DDR_A_D28 9 DDR_A_D29 9 DDR_A_D30 9 DDR_A_D31 9
DDR_A_D32 9 DDR_A_D33 9 DDR_A_D34 9 DDR_A_D35 9 DDR_A_D36 9 DDR_A_D37 9 DDR_A_D38 9 DDR_A_D39 9
DDR_A_D40 9 DDR_A_D41 9 DDR_A_D42 9 DDR_A_D43 9 DDR_A_D44 9 DDR_A_D45 9 DDR_A_D46 9 DDR_A_D47 9
DDR_A_D48 9 DDR_A_D49 9 DDR_A_D50 9 DDR_A_D51 9 DDR_A_D52 9 DDR_A_D53 9 DDR_A_D54 9 DDR_A_D55 9
DDR_A_D56 9 DDR_A_D57 9 DDR_A_D58 9 DDR_A_D59 9 DDR_A_D60 9 DDR_A_D61 9 DDR_A_D62 9 DDR_A_D63 9
+1.5V
C13
C13
1000P_0402_50V7K
1000P_0402_50V7K
1
2
+MEM_VREF
1
C14
C14
0.1U_0402_16V7K
0.1U_0402_16V7K
2
4
+1.5V
R5
R5 1K_0402_1%
1K_0402_1%
1 2
R7
R7 1K_0402_1%
1K_0402_1%
1 2
5
Close to CPU within
L
1"
D D
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/02/10 2011/02/10
2010/02/10 2011/02/10
2010/02/10 2011/02/10
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
5
of
of
of
637Monday, February 20, 2012
637Monday, February 20, 2012
637Monday, February 20, 2012
D
D
D
5
+1.8VS
R21 300_0402_5%R21 300_0402_5%
D D
R10 1K_0402_5%R10 1K_0402_5% R23 1K_0402_5%R23 1K_0402_5% R24 300_0402_5%
R24 300_0402_5% R22 300_0402_5%R22 300_0402_5% R26 510_0402_1%R26 510_0402_1% R25 1K_0402_5%R25 1K_0402_5%
+3VS
R16 1K_0402_5%R16 1K_0402_5%
R17 1K_0402_5%R17 1K_0402_5% R19 1K_0402_5%R19 1K_0402_5% R31 1K_0402_5%R31 1K_0402_5%
H_PROCHOT#12
C C
1 2 1 2
1 2 1 2
1 2
1 2 1 2 1 2
12
12 12
APU_DBREQ# APU_SVC APU_SVD LDT_RST# H_PWRGD TEST_25_L TEST36
APU_ALERT#_R
APU_PROCHOT# APU_SIC APU_SID
R34 0_0402_5%R34 0_0402_5%
1 2
APU_PROCHOT#
APU_ALERT#14
10/12 add PAD T30/T31 for PVT
TP25 TP26 Close to U1
+3VS
12
R317
R317 10K_0402_5%
10K_0402_5%
R41
R41
1K_0402_5%
1K_0402_5%
APU_THERMTRIP#
B B
1 2
B
B
2
Q28
Q28
E
E
3 1
C
C
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
1 2
R318 0_0402_5%@R318 0_0402_5%@
L
APU_VDDNB_RUN_FB_H37
APU_VDD0_RUN_FB_H37
APU_VDD0_RUN_FB_L37 APU_VDDNB_RUN_FB_L37
H_THERMTRIP# 13
PVT:Add R317 R318 and Q28 for AMD command
4
HDMI_TXD2+11 HDMI_TXD2-11
HDMI_TXD1+11 HDMI_TXD1-11
HDMI_TXD0+11 HDMI_TXD0-11
HDMI_CLK0+11 HDMI_CLK0-11
LCD_TXOUT2+10
LCD_TXOUT2-10
LCD_TXOUT1+10
LCD_TXOUT1-10
LCD_TXOUT0+10
LCD_TXOUT0-10
LCD_TXCLK+10
LCD_TXCLK-10
APU_CLK12 APU_CLK#12
DISP_CLK12 DISP_CLK#12
APU_SVC37
APU_SVD37
LDT_RST#12 H_PWRGD12,37
R14 0_0402_5%R14 0_0402_5%
1 2
T30PADT30PAD
T26PADT26PAD T25PADT25PAD
T31PADT31PAD
T13PADT13PAD
R302 0_0402_5%R302 0_0402_5%
1 2
R303 0_0402_5%R303 0_0402_5%
1 2
HDMI_TXD2+ HDMI_TXD2-
HDMI_TXD1+ HDMI_TXD1-
HDMI_TXD0+ HDMI_TXD0-
HDMI_CLK0+ HDMI_CLK0-
APU_SVC APU_SVD
APU_SIC APU_SID
LDT_RST# H_PWRGD
APU_PROCHOT# APU_THERMTRIP# APU_ALERT#_R
APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#
U1B
U1B
A8
TDP1_TXP0
B8
TDP1_TXN0
B9
TDP1_TXP1
A9
TDP1_TXN1
D10
TDP1_TXP2
C10
TDP1_TXN2
A10
TDP1_TXP3
B10
TDP1_TXN3
B5
LTDP0_TXP0
A5
LTDP0_TXN0
D6
LTDP0_TXP1
C6
LTDP0_TXN1
A6
LTDP0_TXP2
B6
LTDP0_TXN2
D8
LTDP0_TXP3
C8
LTDP0_TXN3
V2
CLKIN_H
V1
CLKIN_L
D2
DISP_CLKIN_H
D1
DISP_CLKIN_L
J1
SVC
J2
SVD
P3
SIC
P4
SID
T3
RESET_L
T4
PWROK
U1
PROCHOT_L
U2
THERMTRIP_L
T2
ALERT_L
N2
TDI
N1
TDO
P1
TCK
P2
TMS
M4
TRST_L
M3
DBRDY
M1
DBREQ_L
F4
VDDCR_NB_SENSE
G1
VDDCR_CPU_SENSE
F3
VDDIO_MEM_S_SENSE
F1
VSS_SENSE
B4
RSVD_1
W11
RSVD_2
V5
RSVD_3
ONTARIO-FT1_BGA_413P-T
ONTARIO-FT1_BGA_413P-T 1GR3@
1GR3@
3
DISPLAYPORT 1
DISPLAYPORT 1
DISPLAYPORT 0
DISPLAYPORT 0
CLK
CLK
SER
SER
JTAG CTRL
JTAG CTRL
DP MISC
DP MISC
VGA DAC
VGA DAC
TEST
TEST
DP_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL
TDP1_AUXP TDP1_AUXN
TDP1_HPD
LTDP0_AUXP LTDP0_AUXN
LTDP0_HPD
DAC_RED
DAC_REDB
DAC_GREEN
DAC_GREENB
DAC_BLUE
DAC_BLUEB DAC_HSYNC
DAC_VSYNC
DAC_SCL
DAC_SDA
DAC_ZVSS
TEST4 TEST5
TEST6 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19
TEST25_H
TEST25_L
TEST28_H
TEST28_L
TEST31
TEST33_H
TEST33_L
TEST34_H
TEST34_L
TEST35 TEST36 TEST37
TEST38
DMAACTIVE_L
R20 150_0402_1%R20 150_0402_1%
H3
1 2
G2 H2 H1
HDMICLK
B2
HDMIDAT
C2 C1
LCD_EDID_CLK
A3
LCD_EDID_DATA
B3
R12 100K_0402_5%R12 100K_0402_5%
D3
1 2
C12 D13 A12 B12 A13 B13
E1 E2
F2 D4
D12 R1
R2 R6 T5 E4 K4 L1 L2 M2 K1 K2 L5 M5 M21 J18 J19 U15 T15 H4 N5 R5
K3 T1
TEST15
TEST_18 TEST_19 TEST25_H TEST_25_L TEST28_H TEST28_L TEST31 TEST33_H TEST33_L TEST34_H TEST34_L TEST35 TEST36 TEST37
PVT:change HPD PD to PU, R12 @-->SMT
R30 499_0402_1%R30 499_0402_1%
1 2
PADT3PAD PADT4PAD
PADT5PAD PADT6PAD
PADT7PAD
PADT9PAD PADT8PAD PAD
PAD
PAD
PAD PAD
PAD
PAD
PAD
R40 1K_0402_5%R40 1K_0402_5%
1 2
2
1 2
100K_0402_5%
100K_0402_5%
HDMICLK 11
HDMIDAT 11
HPD 11
LCD_EDID_CLK 10 LCD_EDID_DATA 10
+5VS
T3 T4
T5
R32 1K_0402_5%@R32 1K_0402_5%@
1 2 T6 T7
R33 1K_0402_5%R33 1K_0402_5%
1 2
R35 1K_0402_5%R35 1K_0402_5%
1 2
R36 510_0402_1%R36 510_0402_1%
1 2 T9
T8 T10
T10
C15 0.1U_0402_16V4ZC15 0.1U_0402_16V4Z
1 2
C16 0.1U_0402_16V4ZC16 0.1U_0402_16V4Z
1 2
T11
T11 T12
T12
T14
T14
R39 1K_0402_5%@R39 1K_0402_5%@
R283 1K_0402_5%R283 1K_0402_5%
+1.8VS
R301
R301
R37 51_0402_1%R37 51_0402_1% R38 51_0402_1%R38 51_0402_1%
1 2
1 2
ALLOW_STOP# 12
UMA_ENBKL 26 UMA_ENVDD 10 GMCH_INVT_PWM 10
PVT:Reduce some 0ohm on LVDS control
1 2 1 2
+1.8VS
1
TEST35 for HDMI function
TEST35 0
Disable
1
Enable
*
DEFAULT
+3VS
12
R49
R49 10K_0402_5%
10K_0402_5% @
@
2
@
@
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
@
@
A A
4
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
EC_SMB_DAAPU_SID
61
Q2A
Q2A
1 2
R58 0_0402_5%R58 0_0402_5%
5
EC_SMB_CKAPU_SIC
3
Q2B
Q2B
1 2
R61 0_0402_5%R61 0_0402_5%
5
2N7002DW-T/R7
Vgs(th): min 1.0V
@
@
1 2
R56 0_0402_5%
R56 0_0402_5%
1 2
R57 0_0402_5%R57 0_0402_5%
@
@
1 2
R59 0_0402_5%
R59 0_0402_5%
1 2
R60 0_0402_5%R60 0_0402_5%
Typ 1.6V Max 2.0V
FCH_SID EC_SMB_DA2
FCH_SIC
EC_SMB_CK2
FCH_SID 13 EC_SMB_DA2 26
FCH_SIC 13 EC_SMB_CK2 26
4
T0 FCH
TO EC
T0 FCH
TO EC
9/2 remove R305~R309 for ESD request
APU_TRST# APU_TCK APU_TMS APU_TDI
R44 1K_0402_5%R44 1K_0402_5% R45 1K_0402_5%R45 1K_0402_5% R46 1K_0402_5%R46 1K_0402_5% R47 1K_0402_5%R47 1K_0402_5%
12 12 12 12
+1.8VS
10/12 remove HDT conn for PVT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
of
of
of
737Monday, February 20, 2012
737Monday, February 20, 2012
737Monday, February 20, 2012
1
D
D
D
A
U1C
U1C
1
2
M11 M12 M13
W18
10U_0805_10V6K
10U_0805_10V6K
C42
C42
1
C53
C53
2
1
+
+
C70
C70
2
G6 G8 H5 H7
M6 M8 N7 R8
E11 E13
F12 G11 G13
H9 H12 K11 K13 L10 L12 L14
N10 N12 N14 P11 P13
G16 G19 E17
J16 L16 L19 N16 R16 R19
U16
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
E5
VDDCR_CPU_1
E6
VDDCR_CPU_2
F5
VDDCR_CPU_3
F7
VDDCR_CPU_4 VDDCR_CPU_5 VDDCR_CPU_6 VDDCR_CPU_7 VDDCR_CPU_8
J6
VDDCR_CPU_9
J8
VDDCR_CPU_10
L7
VDDCR_CPU_11 VDDCR_CPU_12 VDDCR_CPU_13 VDDCR_CPU_14 VDDCR_CPU_15
E8
VDDCR_NB_1 VDDCR_NB_2 VDDCR_NB_3
F9
VDDCR_NB_4 VDDCR_NB_5 VDDCR_NB_6 VDDCR_NB_7 VDDCR_NB_8 VDDCR_NB_9 VDDCR_NB_10 VDDCR_NB_11 VDDCR_NB_12 VDDCR_NB_13 VDDCR_NB_14 VDDCR_NB_15 VDDCR_NB_16 VDDCR_NB_17 VDDCR_NB_18 VDDCR_NB_19 VDDCR_NB_20 VDDCR_NB_21 VDDCR_NB_22
VDDIO_MEM_S_1 VDDIO_MEM_S_2 VDDIO_MEM_S_3 VDDIO_MEM_S_4 VDDIO_MEM_S_5 VDDIO_MEM_S_6 VDDIO_MEM_S_7 VDDIO_MEM_S_8 VDDIO_MEM_S_9 VDDIO_MEM_S_10 VDDIO_MEM_S_11
ONTARIO-FT1_BGA_413P-T
ONTARIO-FT1_BGA_413P-T 1GR3@
1GR3@
1
C43
C43
10U_0805_10V6K
10U_0805_10V6K
2
1
C54
C54
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 1
C71
C71
2
+APU_CORE
4500mA
1 1
+APU_VDDNB
8000mA
2 2
+1.5V
2000mA
+APU_CORE
10U_0805_10V6K
10U_0805_10V6K
1
1
C41
C39
C39
C40
10U_0805_10V6K
10U_0805_10V6K
3 3
0.1U_0402_16V7K
0.1U_0402_16V7K
330U_SX_2VY~D
330U_SX_2VY~D
C40
2
+APU_CORE
1
C51
C51
0.1U_0402_16V7K
0.1U_0402_16V7K
2
+APU_CORE +APU_CORE
1
+
+
C68
C68
330U_SX_2VY~D
330U_SX_2VY~D
2
10U_0805_10V6K
10U_0805_10V6K
2
1
C52
C52
2
C69
C69
@
@
C41
0.1U_0402_16V7K
0.1U_0402_16V7K
1
+
+
330U_SX_2VY~D
330U_SX_2VY~D
2
TSense/PLL/DP/PCIE/IO
TSense/PLL/DP/PCIE/IO
CPU CORE
CPU CORE
DAC
DAC
VDD_18_DAC
GPU AND NB CORE
GPU AND NB CORE
POWER
POWER
PCIE/IO/DDR3 Phy
PCIE/IO/DDR3 Phy
DDR3
DDR3
10U_0805_10V6K
10U_0805_10V6K
1
C44
C44
2
C55
C55
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C73
C73
C72
C72
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
VDD_18_1 VDD_18_2 VDD_18_3 VDD_18_4 VDD_18_5 VDD_18_6 VDD_18_7
DIS PLL
DIS PLL
VDDPL_10
VDD_10_1 VDD_10_2 VDD_10_3 VDD_10_4
DP Phy/IO
DP Phy/IO
1
2
VDD_33
1
2
1
2
B
U8 W8 U6 U9 W6 T7 V7
150mA
W9
1U_0402_6.3V4Z
1U_0402_6.3V4Z
U11
0.1U_0402_16V7K
0.1U_0402_16V7K
U13 W13 V12 T12
0.1U_0402_16V7K
0.1U_0402_16V7K
A4
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C45
C45
10U_0805_10V6K
10U_0805_10V6K
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C74
C74
2
2000mA
0.1U_0402_16V7K
0.1U_0402_16V7K
C21
C21
1
C23
C23
2
200mA
C25
C25
2500mA
C30
C30
500mA
1
C286
C286
2
10U_0805_10V6K
10U_0805_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0805_10V6K
10U_0805_10V6K
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS_DAC
1
2
C19
C19
C18
C18
2
L2
L2
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C24
C24
10U_0805_10V6K
10U_0805_10V6K 2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C26
C26
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
1
C28
C28
C29
C29
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+3VS
1
C34
C34 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+APU_VDDNB
1
C46
C46
10U_0805_10V6K
10U_0805_10V6K
2
+APU_VDDNB
1
C60
C60
1U_0402_6.3V4Z
1U_0402_6.3V4Z 2
+1.5V
1
C78
C78
10U_0805_10V6K
10U_0805_10V6K
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C20
C20
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS
+1.05VS_VDDPL
1
C27
C27 10U_0805_10V6K
10U_0805_10V6K
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C31
C31
2
L
1
C47
C47
2
1
C61
C61
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
C79
C79
2
+1.8VS_VDD
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C17
C17
2
2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
10U_0805_10V6K
10U_0805_10V6K
2
Close to U1.A4 pin
C48
C48
10U_0805_10V6K
10U_0805_10V6K
1
C62
C62
2
C80
C80
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
C22
C22
2 10U_0805_10V6K
10U_0805_10V6K
L3
L3
1 2
+1.05VS_VDD
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
1
C33
C33
C32
C32
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
C49
C49
10U_0805_10V6K
10U_0805_10V6K
C63
C63
1
C81
C81
1U_0402_6.3V4Z
1U_0402_6.3V4Z 2
10U_0805_10V6K
10U_0805_10V6K
1
2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z 2
1
2
+1.8VS
L1
L1
1
+
+
2
9/6 +1.0VS change to +1.05VS
+1.05VS
L4
L4
1 2
C50
C50
10U_0805_10V6K
10U_0805_10V6K
1
C285
C285
0.1U_0402_16V7K
0.1U_0402_16V7K 2
C82
C82
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C289
C289 220U_B2_2.5VM_R25M
220U_B2_2.5VM_R25M
1
+
+
C288
C288 220U_B2_2.5VM_R25M
220U_B2_2.5VM_R25M
2
1
C66
C66
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C64
C64
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C83
C83
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
D
+1.8VS_VDD
1
2
Pre MP:Reserved J2 for DDR3 issue
@ J2
@
2
JUMP_43X118
JUMP_43X118
+APU_CORE +APU_VDDNB
1
C35
C35 180P_0402_50V8J
180P_0402_50V8J
2
C67
C67
1
2
1
C89
C89 180P_0402_50V8J
180P_0402_50V8J
2
1
2
330U_SX_2VY~D
330U_SX_2VY~D
1
0.1U_0402_16V7K
0.1U_0402_16V7K
2
C65
C65
1
2
C291
C291
68P_0402_50V8J
68P_0402_50V8J
J2
112
1
C36
C36 180P_0402_50V8J
180P_0402_50V8J
2
+APU_VDDNB
1
+
+
C287
C287
2
1
C56
C56 180P_0402_50V8J
180P_0402_50V8J
2
1
2
+1.5V
1
C57
C57 180P_0402_50V8J
180P_0402_50V8J
2
A7
B7 B11 B17 B22
C4 D5 D7
D9 D11 D14 B15 D17 D19
E7
E9 E12 E20
F8 F11 F13
G4 G5 G7
G9 G12 G20 G22
H6 H11 H13
J4 J5 J7
J20 K10 K14
L4 L6
L8 L11 L13 L20 L22
M7 N4 N6 N8
N11
C37
C37 180P_0402_50V8J
180P_0402_50V8J
1
2
+1.8VS_VDD +1.8VS_DAC
1
C75
C75 180P_0402_50V8J
180P_0402_50V8J
2
U1D
U1D
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49
ONTARIO-FT1_BGA_413P-T
ONTARIO-FT1_BGA_413P-T 1GR3@
1GR3@
C38
C38 180P_0402_50V8J
180P_0402_50V8J
GND
GND
1
2
1
C76
C76 180P_0402_50V8J
180P_0402_50V8J
2
1
C84
C84 180P_0402_50V8J
180P_0402_50V8J
2
E
VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97
VSSBG_DAC
C58
C58
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.05VS_VDDPL
N13 N20 N22 P10 P14 R4 R7 R20 T6 T9 T11 T13 U4 U5 U7 U12 U20 U22 V8 V9 V11 V13 W1 W2 W4 W5 W7 W12 W20 Y5 Y7 Y9 Y11 Y13 Y15 Y17 Y19 AA4 AA22 AB2 AB5 AB9 AB13 AB17 AB21 AC5 AC9 AC13 A11
+1.5V
1
C59
C59
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C77
C77 180P_0402_50V8J
180P_0402_50V8J
2
+3VS+1.05VS_VDD
1
C85
C85
0.1U_0402_16V7K
0.1U_0402_16V7K
2
PVT:Phase in DVT SMT memo
+APU_CORE +APU_VDDNB
1
4 4
1
C294
C294
C293
C293
2
2
68P_0402_50V8J
68P_0402_50V8J
2200P_0402_50V8K
2200P_0402_50V8K
A
1
1
C295
C295
C296
C296
2
2
68P_0402_50V8J
68P_0402_50V8J
2200P_0402_50V8K
2200P_0402_50V8K
B
0.1U_0402_16V7K
0.1U_0402_16V7K
+1.5V
C86
C86
1
C87
C87
0.1U_0402_16V7K
0.1U_0402_16V7K 2
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
C88
C88
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
C316
C316 120P_0402_50V8
120P_0402_50V8
2
9/7 add C316~C320 in DDR for EMI request
1
C317
C317 120P_0402_50V8
120P_0402_50V8
2
2008/04/14 2009/04/14
2008/04/14 2009/04/14
2008/04/14 2009/04/14
1
C318
C318 120P_0402_50V8
120P_0402_50V8
2
Deciphered Date
Deciphered Date
Deciphered Date
1
C319
C319 120P_0402_50V8
120P_0402_50V8
2
+1.5V
D
1
C320
C320 120P_0402_50V8
120P_0402_50V8
2
10/13 add C330~C331 in DDR for EMI request at PVT
1
C330
C330 120P_0402_50V8
120P_0402_50V8
2
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
C331
C331 120P_0402_50V8
120P_0402_50V8
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
1
C332
C332 120P_0402_50V8
120P_0402_50V8
2
401990
401990
401990
of
of
of
837Monday, February 20, 2012
837Monday, February 20, 2012
837Monday, February 20, 2012
E
D
D
D
5
+1.5V
+VREF_DQ
1
C90
C90
2
D D
DDR_A_DQS#16 DDR_A_DQS16
DDR_A_DQS#26 DDR_A_DQS26
DDR_CKE0_DIMMA6
C C
B B
A A
69.8_0402_1%
69.8_0402_1% R322
R322
+3VS
12
@
@
DDR_CS1_DIMMA#6
DDR_A_DQS#46 DDR_A_DQS46
DDR_A_DQS#66 DDR_A_DQS66
C110
C110
1
C91
C91
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_BS#26
DDR_A_CLK06 DDR_A_CLK#06
DDR_A_BS#06
DDR_A_WE#6
DDR_A_CAS#6
1
1
C111
C111
2
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1000P_0402_50V7K
1000P_0402_50V7K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D0 DDR_A_D1
DDR_A_DM0 DDR_A_D2
DDR_A_D3 DDR_A_D8
DDR_A_D9
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3 DDR_A_D26
DDR_A_D27
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDR_A_MA10
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7 DDR_A_D58
DDR_A_D59
R66 10K_0402_5%R66 10K_0402_5%
1 2
12
R67
R67 10K_0402_5%
10K_0402_5%
4
JDIMM1
JDIMM1
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1 DQS129RESET# VSS1131VSS12
33
DQ10
35
DQ11 VSS1337VSS14
39
DQ16
41
DQ17 VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25 VSS2261DQS#3
63
DM3 VSS2365VSS24
67
DQ26
69
DQ27 VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
VSS27
129
DQ32
131
DQ33
133
VSS29
135
DQS#4
137
DQS4
139
VSS32
141
DQ34
143
DQ35
145
VSS34
147
DQ40
149
DQ41
151
VSS36
153
DM5
155
VSS37
157
DQ42
159
DQ43
161
VSS39
163
DQ48
165
DQ49
167
VSS41
169
DQS#6
171
DQS6
173
VSS44
175
DQ50
177
DQ51
179
VSS46
181
DQ56
183
DQ57
185
VSS48
187
DM7
189
VSS49
191
DQ58
193
DQ59
195
VSS51
197
SA0
199
VDDSPD
201
SA1
203
VTT1
205
G1
FOX_AS0A626-U4RN-7F
FOX_AS0A626-U4RN-7F CONN@
CONN@
DQ4 DQ5
VSS3
DQS#0
DQS0 VSS6
DQ6
DQ7 VSS8 DQ12 DQ13
VSS10
DM1
DQ14 DQ15
DQ20 DQ21
DM2
VSS17
DQ22 DQ23
VSS19
DQ28 DQ29
VSS21
DQS3 DQ30
DQ31
CKE1 VDD2
VDD4
VDD6
VDD8
VDD10
CK1 CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36 DQ37
VSS30
DM4
VSS31
DQ38 DQ39
VSS33
DQ44 DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46 DQ47
VSS40
DQ52 DQ53
VSS42
DM6
VSS43
DQ54 DQ55
VSS45
DQ60 DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62 DQ63
VSS52
EVENT#
SDA
SCL
VTT2
3
+1.5V
2
DDR_A_D4
4
DDR_A_D5
6 8 10 12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26
DDR_A_DM1
28 30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44
DDR_A_DM2
46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60 62 64 66
DDR_A_D30
68
DDR_A_D31
70 72
DDR_A_DQS#0 6 DDR_A_DQS0 6
DDR_RST# 6
DDR_A_DQS#3 6 DDR_A_DQS3 6
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
10/7 add R322, R323 in DDR_CKE0/1 for PVT
74 76
DDR_A_MA15
78
A15 A14
A11
A7 A6
A4 A2
A0
BA1
S0#
G2
DDR_A_MA14
80 82
DDR_A_MA11
84
DDR_A_MA7
86 88
DDR_A_MA6
90
DDR_A_MA4
92 94
DDR_A_MA2
96
DDR_A_MA0
98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45
DDR_A_D46 DDR_A_D47
DDR_A_D52 DDR_A_D53
DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D60
DDR_A_D61
DDR_A_D62 DDR_A_D63
MA_EVENT_L
+0.75VS
DDR_A_CLK1 6 DDR_A_CLK#1 6
DDR_A_BS#1 6 DDR_A_RAS# 6
DDR_CS0_DIMMA# 6 DDR_A_ODT0 6
DDR_A_ODT1 6
1
C104
C104
2
DDR_A_DQS#5 6 DDR_A_DQS5 6
DDR_A_DQS#7 6 DDR_A_DQS7 6
MA_EVENT_L 6
FCH_SMDAT0 13 FCH_SMCLK0 13
12
69.8_0402_1%
69.8_0402_1% R323
R323
@
@
1000P_0402_50V7K
1000P_0402_50V7K
DDR_CKE1_DIMMA 6
+VREF_CA
1
C105
C105
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DIMM_A REV H:4mm
+1.5V
2
C92
C92
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
DDR_A_D[0..63] 6
DDR_A_MA[0..15] 6
DDR_A_DM[0..7] 6
2
C93
C93
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+VREF_DQ
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
C94
C94
C95
1
+0.75VS
2
C106
C106
1
C95
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
Place near JDIMM1
+1.5V
2
C96
C96
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
C107
C107
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R62
R62 1K_0402_1%
1K_0402_1%
1 2
R64
R64 1K_0402_1%
1K_0402_1%
1 2
+VREF_CA
10/13 change C98~C101 0.1uF to 120PF for PVT
120P_0402_50V8
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
C97
C97
1
1
C108
C108
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
C98
C98
1
120P_0402_50V8
120P_0402_50V8
120P_0402_50V8
2
C99
C99
1
+1.5V
1
+1.5V
R63
R63 1K_0402_1%
1K_0402_1%
1 2
R65
R65 1K_0402_1%
1K_0402_1%
1 2
2
C100
C100
1
120P_0402_50V8
120P_0402_50V8
1
+
+
C109
C109 220U_B2_2.5VM_R25M
220U_B2_2.5VM_R25M
2
120P_0402_50V8
120P_0402_50V8
2
C101
C101
1
<Address: A0>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2005/10/11 2009/06/11
2005/10/11 2009/06/11
2005/10/11 2009/06/11
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal ElectronicsInc
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
1
D
D
D
of
of
of
937Monday, February 20, 2012
937Monday, February 20, 2012
937Monday, February 20, 2012
A
B
C
D
E
+LCD_VDD
1 1
Q3A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
UMA_ENVDD7
2 2
+LCD_VDD
B+
3 3
1
C297
C297
2
68P_0402_50V8J
68P_0402_50V8J
2200P_0402_50V8K
2200P_0402_50V8K
C117
C117
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
1
2
1 2
R71 0_0402_5%R71 0_0402_5%
R73 0_0805_5%R73 0_0805_5%
+3VS
C118
C118
BKOFF#26
1
2
L5
L5
68P_0402_50V8J
68P_0402_50V8J
0.1U_0402_25V4K
0.1U_0402_25V4K
Q3A
ENVDD
R72
R72
100K_0402_5%
100K_0402_5%
12
1
@
@
C116
C116
2
1000P_0402_50V7K
1000P_0402_50V7K
1
C119
C119
2
9/6 Add C119-->SMT for RF request
R82 0_0402_5%
R82 0_0402_5%
USB20_N513
USB20_P513
4 4
USB20_N5
USB20_P5
4
1
WCM-2012-900T_0805
WCM-2012-900T_0805
R83 0_0402_5%
R83 0_0402_5%
+3VS
12
61
+3VS
1 2
L6
L6
4
1
1 2
12
R68
R68 150_0603_5%
150_0603_5%
R76 0.1U_0402_16V7KR76 0.1U_0402_16V7K
BKOFF#
INT_MIC_CLK21 INT_MIC_DATA21
@
@
@
@
R69
R69 100K_0402_5%
100K_0402_5%
2
5
12
1 2
R80 0_0603_5%R80 0_0603_5%
1 2
3
Q3B
Q3B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
4
12
LCD_EDID_CLK7
LCD_EDID_DATA7 LCD_TXOUT0-7 LCD_TXOUT0+7
LCD_TXOUT1-7 LCD_TXOUT1+7 LCD_TXOUT2-7 LCD_TXOUT2+7
LCD_TXCLK-7 LCD_TXCLK+7
1 2
R77 22_0402_5%R77 22_0402_5%
1 2
USB20_N5_R
3
3
USB20_P5_R
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
R70
R70
47K_0402_5%
47K_0402_5%
C3102200P_0402_50V8K @C3102200P_0402_50V8K @
INT_MIC_CLK INT_MIC_DATA
2
C112
C112
1
2
C113
C113
0.01U_0402_25V7K
0.01U_0402_25V7K
1
+LCDVDD_R
LCD_EDID_CLK LCD_EDID_DATA LCD_TXOUT0­LCD_TXOUT0+
LCD_TXOUT1­LCD_TXOUT1+ LCD_TXOUT2­LCD_TXOUT2+
LCD_TXCLK­LCD_TXCLK+
INVT_PWM BKOFF#_R
+LCD_INV
+3VS_USB USB20_N5_R USB20_P5_R
3
1
+3VS
W= 40 mils
S
S
G
G
Q25
Q25
2
AP2301_SOT23
AP2301_SOT23
D
D
1 3
Inrush current = 0A
1
C114
C114 @
@
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
2
D1
D1 PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
+LCD_VDD
W= 40 mils
1
C115
C115
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
< LVDS Connector >
JLVDS1
JLVDS1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
I-PEX_20143-030E-20F~D
I-PEX_20143-030E-20F~D CONN@
CONN@
MGND4 MGND3
MGND2 MGND1
34 33
32 31
R74, R75 change to 2.2K-->for PVT +3VS change to +5VS
+5VS
EC_INVT_PWM26
GMCH_INVT_PWM7
10/12 add C322--C329 for PVT RF request
LCD_TXOUT0­LCD_TXOUT0+ LCD_TXOUT1­LCD_TXOUT1+ LCD_TXOUT2­LCD_TXOUT2+ LCD_TXCLK­LCD_TXCLK+
C322 18P_0402_50V8JC322 18P_0402_50V8J
1 2
C323 18P_0402_50V8JC323 18P_0402_50V8J
1 2
C324 18P_0402_50V8JC324 18P_0402_50V8J
1 2
C325 18P_0402_50V8JC325 18P_0402_50V8J
1 2
C326 18P_0402_50V8JC326 18P_0402_50V8J
1 2
C327 18P_0402_50V8JC327 18P_0402_50V8J
1 2
C328 18P_0402_50V8JC328 18P_0402_50V8J
1 2
C329 18P_0402_50V8JC329 18P_0402_50V8J
1 2
1 2
R74 2.2K_0402_5%R74 2.2K_0402_5%
1 2
R75 2.2K_0402_5%R75 2.2K_0402_5%
EC_INVT_PWM INVT_PWM
GMCH_INVT_PWM
LCD_EDID_CLK LCD_EDID_DATA
@
@
1 2
R78 0_0402_5%
R78 0_0402_5%
1 2
R79 0_0402_5%R79 0_0402_5%
12
R81
R81 10K_0402_5%
10K_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2008/04/14 2009/04/14
2008/04/14 2009/04/14
2008/04/14 2009/04/14
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
10 37Monday, February 20, 2012
10 37Monday, February 20, 2012
10 37Monday, February 20, 2012
E
D
D
D
of
of
of
5
4
3
2
1
HDMI_CLK-
D D
C124 0.1U_0402_16V7KC124 0.1U_0402_16V7K
HDMI_TXD0+7
HDMI_TXD0-7
HDMI_TXD1+7
HDMI_TXD1-7
HDMI_TXD2+7 HDMI_TXD2-7 HDMI_CLK0+7 HDMI_CLK0-7
C C
HDMIDAT7
HDMICLK7
B B
1 2
C121 0.1U_0402_16V7KC121 0.1U_0402_16V7K
1 2
C125 0.1U_0402_16V7KC125 0.1U_0402_16V7K
1 2
C126 0.1U_0402_16V7KC126 0.1U_0402_16V7K
1 2
C122 0.1U_0402_16V7KC122 0.1U_0402_16V7K
1 2
C128 0.1U_0402_16V7KC128 0.1U_0402_16V7K
1 2
C127 0.1U_0402_16V7KC127 0.1U_0402_16V7K
1 2
C123 0.1U_0402_16V7KC123 0.1U_0402_16V7K
1 2
HPD
HDMI_TX0+
HDMI_TX0-
HDMI_TX1+
HDMI_TX1-
HDMI_TX2+
HDMI_TX2-
HDMI_CLK+
HDMI_CLK-
R106
R106 100K_0402_5%
100K_0402_5%
1 2
+HDMI_5V_OUT
R94
R94
2K_0402_1%
2K_0402_1%
12
12
R95
R95 2K_0402_1%
2K_0402_1%
HDMIDAT
HDMICLK
HPD 7
HDMI_TX0-
HDMI_TX0+
HDMI_TX1- HDMI_R_D1-
HDMI_TX1+
HDMI_TX2-
HDMI_TX2+
@
@
L7
L7
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
@
@ @
@
L8
L8
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
@
@ @
@
L9
L9
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
@
@ @
@
L10
L10
1
1
4
4
WCM-2012-900T_0805
WCM-2012-900T_0805
@
@
1 2
R84 0_0402_5%
R84 0_0402_5%
2
2
3
3
1 2
R85 0_0402_5%
R85 0_0402_5%
1 2
R86 0_0402_5%
R86 0_0402_5%
2
2
3
3
1 2
R87 0_0402_5%
R87 0_0402_5%
1 2
R88 0_0402_5%
R88 0_0402_5%
2
2
3
3
1 2
R89 0_0402_5%
R89 0_0402_5%
1 2
R90 0_0402_5%
R90 0_0402_5%
2
2
3
3
1 2
R91 0_0402_5%
R91 0_0402_5%
HDMI_CLK+ HDMI_CLK-
HDMI_TX0-
HDMI_TX0+
HDMI_TX1-
HDMI_TX1+
HDMI_TX2+
HDMI_TX2-
1 2
R96 499_0402_1%R96 499_0402_1%
1 2
R97 499_0402_1%R97 499_0402_1%
1 2
R98 499_0402_1%R98 499_0402_1%
1 2
R99 499_0402_1%R99 499_0402_1%
1 2
R100 499_0402_1%R100 499_0402_1%
1 2
R101 499_0402_1%R101 499_0402_1%
1 2
R102 499_0402_1%R102 499_0402_1%
1 2
R104 499_0402_1%R104 499_0402_1%
HDMI_R_CK-
HDMI_R_CK+HDMI_CLK+
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D1+
HDMI_R_D2-
HDMI_R_D2+
+3VS
2
G
G
Q10
Q10
2N7002_SOT23-3
2N7002_SOT23-3
9/1 PN change to SB00000EN00
13
D
D
S
S
9/1 PN change to SCS00004000
D2
D2
2 1
RB161M-20_SOD123-2
RB161M-20_SOD123-2
+HDMI_5V_OUT
F1
+5VS_HDMI
F1
2 1
1.1A_6V_MINISMDC110F-2
1.1A_6V_MINISMDC110F-2
< HDMI Connector >
JHDMI1
HPD
HDMIDAT HDMICLK
HDMI_R_CK­HDMI_R_CK+
HDMI_R_D0­HDMI_R_D0+
HDMI_R_D1­HDMI_R_D1+
HDMI_R_D2­HDMI_R_D2+
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11 10
9 8 7 6 5 4 3 2 1
GND
CK_shield
GND
CK+
GND
D0-
GND D0_shield D0+ D1­D1_shield D1+ D2­D2_shield D2+
SUYIN_100042GR019M23BZR_19P-T
SUYIN_100042GR019M23BZR_19P-T CONN@
CONN@
1
C120
C120
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
20 21 22 23
+HDMI_5V_OUT+5VS
PVT :Follow AMD MDG 1.02, HPD pull low 100K_0603-->100K_R0402
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2008/10/06 2010/03/12
2008/10/06 2010/03/12
2008/10/06 2010/03/12
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
1
D
D
D
of
of
of
11 37Monday, February 20, 2012
11 37Monday, February 20, 2012
11 37Monday, February 20, 2012
A
150P_0402_50V8J
150P_0402_50V8J
C131
C131
1 2
A_RST#
UMI_RX0P5 UMI_RX0N5 UMI_RX1P5 UMI_RX1N5 UMI_RX2P5 UMI_RX2N5
UMI_RX3P5
CLK_PCIE_MCARD118 CLK_PCIE_MCARD1#18
CLK_PCIE_MCARD218 CLK_PCIE_MCARD2#18
CLK_PCIE_LAN19 CLK_PCIE_LAN#19
+3VALW
@
@
5
@ U5
@
P
B A
G
3
1 2
12
12
UMI_RX3N5
UMI_TX0P5 UMI_TX0N5 UMI_TX1P5 UMI_TX1N5 UMI_TX2P5 UMI_TX2N5 UMI_TX3P5 UMI_TX3N5
+PCIE_VDDR
DISP_CLK7 DISP_CLK#7
APU_CLK7 APU_CLK#7
U5
PLT_RST#
4
Y
12
25M_CLK_X1
12
R127
R127
Y2
Y2
1M_0402_5%
1M_0402_5%
25M_CLK_X2
1 1
2 2
WWAN WLAN LAN
3 3
A_RST#
1 2
4 4
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R121
R121
8.2K_0402_5%
8.2K_0402_5% @
@
C147
C147
12
2 1
NC7SZ08P5X_NL_SC70-5
NC7SZ08P5X_NL_SC70-5
R123 0_0402_5%R123 0_0402_5%
C150
C150 22P_0402_50V8J
22P_0402_50V8J
25MHZ_20PF_7A25000012
25MHZ_20PF_7A25000012
C151 22P_0402_50V8JC151 22P_0402_50V8J
R107 33_0402_5%R107 33_0402_5%
C133 0.1U_0402_16V7KC133 0.1U_0402_16V7K
1 2
C132 0.1U_0402_16V7KC132 0.1U_0402_16V7K
1 2
C138 0.1U_0402_16V7KC138 0.1U_0402_16V7K
1 2
C134 0.1U_0402_16V7KC134 0.1U_0402_16V7K
1 2
C139 0.1U_0402_16V7KC139 0.1U_0402_16V7K
1 2
C135 0.1U_0402_16V7KC135 0.1U_0402_16V7K
1 2
C140 0.1U_0402_16V7KC140 0.1U_0402_16V7K
1 2
C141 0.1U_0402_16V7KC141 0.1U_0402_16V7K
1 2
R108 590_0402_1%R108 590_0402_1% R109 2K_0402_1%R109 2K_0402_1%
R111 0_0402_5%R111 0_0402_5%
1 2
R112 0_0402_5%R112 0_0402_5%
1 2
R114 0_0402_5%R114 0_0402_5%
1 2
R115 0_0402_5%R115 0_0402_5%
1 2
R262 0_0402_5%R262 0_0402_5%
1 2
R263 0_0402_5%R263 0_0402_5%
1 2
R117 0_0402_5%R117 0_0402_5%
1 2
R116 0_0402_5%R116 0_0402_5%
1 2
R118 0_0402_5%R118 0_0402_5%
1 2
R119 0_0402_5%R119 0_0402_5%
1 2
U5, C147 SMT-->@ for DVT R123 @-->SMT
PLT_RST# 18,19,26
XTLI20
12
12 12
B
T15
T15 PAD
PAD
UMI_RX0P_C UMI_RX0N_C UMI_RX1P_C UMI_RX1N_C UMI_RX2P_C UMI_RX2N_C UMI_RX3P_C UMI_RX3N_C
DISP_CLK_R DISP_CLK#_R
APU_CLK_R APU_CLK#_R
CLK_PCIE_MCARD1_R CLK_PCIE_MCARD1#_R
CLK_PCIE_MCARD2_R CLK_PCIE_MCARD2#_R
CLK_PCIE_LAN_R CLK_PCIE_LAN#_R
CLK_48M_CR
12
RC1922_0402_5% RC1922_0402_5%
25M_CLK_X1
25M_CLK_X2
U22E
U22E
P1
PCIE_RST_L
L1
A_RST_L
AD26
UMI_TX0P
AD27
UMI_TX0N
AC28
UMI_TX1P
AC29
UMI_TX1N
AB29
UMI_TX2P
AB28
UMI_TX2N
AB26
UMI_TX3P
AB27
UMI_TX3N
AE24
UMI_RX0P
AE23
UMI_RX0N
AD25
UMI_RX1P
AD24
UMI_RX1N
AC24
UMI_RX2P
AC25
UMI_RX2N
AB25
UMI_RX3P
AB24
UMI_RX3N
AD29
PCIE_CALRP
AD28
PCIE_CALRN
AA28
GPP_TX0P
AA29
GPP_TX0N
Y29
GPP_TX1P
Y28
GPP_TX1N
Y26
GPP_TX2P
Y27
GPP_TX2N
W28
GPP_TX3P
W29
GPP_TX3N
AA22
GPP_RX0P
Y21
GPP_RX0N
AA25
GPP_RX1P
AA24
GPP_RX1N
W23
GPP_RX2P
V24
GPP_RX2N
W24
GPP_RX3P
W25
GPP_RX3N
M23
PCIE_RCLKP/NB_LNK_CLKP
P23
PCIE_RCLKN/NB_LNK_CLKN
U29
NB_DISP_CLKP
U28
NB_DISP_CLKN
T26
NB_HT_CLKP
T27
NB_HT_CLKN
V21
CPU_HT_CLKP
T21
CPU_HT_CLKN
V23
SLT_GFX_CLKP
T23
SLT_GFX_CLKN
L29
GPP_CLK0P
L28
GPP_CLK0N
N29
GPP_CLK1P
N28
GPP_CLK1N
M29
GPP_CLK2P
M28
GPP_CLK2N
T25
GPP_CLK3P
V25
GPP_CLK3N
L24
GPP_CLK4P
L23
GPP_CLK4N
P25
GPP_CLK5P
M25
GPP_CLK5N
P29
GPP_CLK6P
P28
GPP_CLK6N
N26
GPP_CLK7P
N27
GPP_CLK7N
T29
GPP_CLK8P
T28
GPP_CLK8N
L25
14M_25M_48M_OSC
L26
25M_X1
L27
25M_X2
HUDSON-M1_BGA_605P-T
HUDSON-M1_BGA_605P-T
C
PCI CLKS
PCI CLKS
PCICLK4/14M_OSC/GPO39
PCI EXPRESS I/F
PCI EXPRESS I/F
PCI I/F
PCI I/F
REQ2_L/CLK_REQ8_L/GPIO41 REQ3_L/CLK_REQ5_L/GPIO42
GNT3_L/CLK_REQ7_L/GPIO46
CLOCK GENERATOR
CLOCK GENERATOR
LPC
LPC
LDRQ1_L/CLK_REQ6_L/GPIO49
CPU
CPU
ALLOW_LDTSTP/DMA_ACTIVE_L
RTC
RTC
PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38
PCIRST_L
AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8
AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31
CBE0_L CBE1_L CBE2_L CBE3_L
FRAME_L
DEVSEL_L
IRDY_L
TRDY_L STOP_L
PERR_L SERR_L REQ0_L
REQ1_L/GPIO40
GNT0_L GNT1_L/GPO44 GNT2_L/GPO45
CLKRUN_L
LOCK_L
INTE_L/GPIO32 INTF_L/GPIO33
INTG_L/GPIO34
INTH_L/GPIO35
LPCCLK0 LPCCLK1
LAD0 LAD1 LAD2 LAD3
LFRAME_L
LDRQ0_L
SERIRQ/GPIO48
PROCHOT_L
LDT_PG
LDT_STP_L LDT_RST_L
32K_X1 32K_X2
RTCCLK
INTRUDER_ALERT_L
VDDBT_RTC_G
PAR
W2 W1 W3 W4 Y1
V2
AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4 AC12 AD12 AJ5 AH6 AB12 AB11 AD7
AJ6 AG6 AG4 AJ4
H24 H25 J27 J26 H29 H28 G28 J25 AA18 AB19
G21 H21 K19 G22 J24
C1 C2 D2
B2 B1
PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4
T16
T16
PAD
PAD
PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29
PAD
PAD
PAD
PAD
CLK_PCI_EC1 LPC_AD0
LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#
ALLOW_STOP# H_PROCHOT# H_PWRGD
LDT_RST#
FCH_32KHI FCH_32KHO
1
C149
C149
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PCI_AD23 16 PCI_AD24 16 PCI_AD25 16 PCI_AD26 16 PCI_AD27 16 PCI_AD28 16 PCI_AD29 16
T17
T17
T18
T18
FCH_CLKRUN
RTC_CLK 26
+FCH_VBAT +RTCVCC_R
C148
C148
1U_0402_6.3V4Z
1U_0402_6.3V4Z
LPC_AD0 18,26 LPC_AD1 18,26 LPC_AD2 18,26 LPC_AD3 18,26 LPC_FRAME# 18,26
SERIRQ 26
R125
R125
1 2
120_0402_5%
120_0402_5%
1
2
1 2
ALLOW_STOP# 7 H_PROCHOT# 7
LDT_RST# 7
D
PCI_CLK1 16 PCI_CLK2 16 PCI_CLK3 16 PCI_CLK4 16
@ R282
@
10K_0402_5%
10K_0402_5%
H_PWRGD 7,37
1 2
120_0402_5%
120_0402_5%
2
J1
2
1
1
H_PWRGD
R282
9/6 add C313 for RF
2
C313
C313
@
@
22P_0402_50V8J
22P_0402_50V8J
1
9/1 PN change to SC1N202U010
+RTCVCC
R124
R124
JUMP_43X39@J1JUMP_43X39@
12
R325
1K_0402_5% @
1K_0402_5% @
D3
D3
1
CHN202UPT_SC70-3
CHN202UPT_SC70-3
R325
R324
R324
S
S
C144 22P_0402_50V8JC144 22P_0402_50V8J
Y1
Y1
3 2
32.768KHZ_12.5PF_Q13MC14610002
32.768KHZ_12.5PF_Q13MC14610002 C145 22P_0402_50V8JC145 22P_0402_50V8J
R120 22_0402_5%R120 22_0402_5%
1 2
LPC_CLK1 16
+3VL
2
3
+1.8VS+3VS
10/14 add R324/R325 for PVT
12 1K_0402_5%
1K_0402_5%
R110
R110
10K_0402_5%
10K_0402_5%
G
G
2
Q11
Q11
13
D
D
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
12
4
OSC
NC
1
OSC
NC
12
C146 22P-->10P for DVT
2
C146
C146
1
R126
R126
1 2
1K_0402_5%
1K_0402_5%
+3VS
12
12
10P_0402_50V8J
10P_0402_50V8J
+RTCBATT+RTCBATT_R
E
H_PWRGD_L 37
FCH_32KHI
R113
R113 20M_0402_5%
20M_0402_5%
FCH_32KHO
1 2
ACES_85205-0200N
ACES_85205-0200N
CLK_PCI_EC 16,18,26
JRTC1
JRTC1
3
1
GND
4
2
GND
CONN@
CONN@
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2007/5/18 2009/06/11
2007/5/18 2009/06/11
2007/5/18 2009/06/11
C
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMTIC A6852
SCHEMTIC A6852
SCHEMTIC A6852
401990
401990
401990
E
D
D
D
of
of
of
12 37Monday, February 20, 2012
12 37Monday, February 20, 2012
12 37Monday, February 20, 2012
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