COMPAL LA-6161P Schematics

A

1 1

B

C

D

E

Compal Confidential

Schematics Document

2 2

INTEL Auburndale BGA with IBEX core logic

Fossil 2.0 UMA

3 3

LA-6161P

2010-05-24

REV:1.0

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

141Friday, October 29, 2010

E

D

of

A

Compal Confidential

File Name : LA-6161P

B

C

Fossil 2.0 UMA

D

XDP Conn.

Page 4

E

Accelerometer

LIS302DLTR

DDR3-SO-DIMM X 1DDR3 1066/1333MHz 1.5V

Mobile

1 1

Single Channel

BANK 2, 3

Arrandale CPU

Page 9

Fan Control

Page 22

Page 4

BGA 1288pins

LVDS

Display port

Page 18

Page 17

DDI_D

FDI

Page 4,5,6,7,8

DMI X4

BT(SoftBreeze) Conn USB x 1

page 26

CRT

Page 19

2 2

WWAN +SIM Card

USB*1

Page 22

USB2.0

PCI-E BUS

10/100/1000 LAN RTL8151DH-GR

Page 21

3 3

RJ45 CONN

Page 21

WLAN Card

PCIE*1

Page 22

DDI

USB2.0

Intel Ibex Peak M

Azalia

1071pins

25mm*27mm

SATA0

Page 11,12,13,14,15,16

ONFI Interface

USB conn x 3(For I/O)

page 24

CardReader Controller

RealTek RTS5159

USB x1(Camara)

FPR conn x1

Audio CKT

IDT 92HD80

Page 18

Page 19

Page 23

daughter board

SD/MMC Slot

sub/B Page 3

daughter board

Audio Jack

sub/B Page 2

SPI BUS

RTC CKT.

Page 11

Power OK CKT.

4 4

Power On/Off CKT.

DC/DC Interface CKT.

Page 29

Page 25

Page 30

LED

LED Board

Page 20

A

Touch Pad CONN.

Page 25

SPI ROM 4MB

MX25L6445EM2I-10G

B

Page 27

SMSC KBC 1098

page 28

Int.KBD

Page 25

SPI BUS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

D

Page 19

CK505

Clock Generator SLG8SP585VTR

Page 11

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

E

of

241Friday, October 29, 2010

D

SATA HDD Connector

A

Voltage Rails

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

1 1

( O MEANS ON X MEANS OFF )

+RTCVCC

power plane

O O O O O O

+B +3VL +0.75V

O O O O O

X

+5VALW +3VALW

O O O O

X XX X

+1.5V

O

XX X

+5VS +3VS

+1.5VS

+VCCP

+CPU_CORE

+1.05VS +1.8VS

OO OO

X

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build ULV@ : means just install for ULV CPU

CONN@ : means ME part.

Layout Notes

L

07/24 update

: Question Area Mark.(Wait check)

Install below 45 level BOM structure for ver. 0.1

45@ : means just put it in the BOM of 45 level.

Install below 43 level BOM structure for ver. 0.1

DEBUG@ : means just build when PCIE port 80 CARD function enable.

Remove before MP

SMBUS Control Table

SOURCE

SMB_EC_CK1 SMB_EC_DA1

SMBCLK SMBDATA

SML0CLK SML0DATA

SML1CLK SML1DATA

SMSC1098

Calpella

BATT

V

X X X

THERMAL

SODIMM CLK CHIP

XDP G-SENSOR

X

XX

VV

X

XX

MINI CARD

X

VV

X

XX

DOCK

X

V

X X

SENSOR

NIC

XX X

V

X

X X

V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

X

V

X

V

Compal Secret Data

2008/09/15 2009/09/03

A

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

D

of

341Friday, October 29, 2010

Layout rule：10mil width trace length < 0.5", spacing 20mil

A A

H_PECI<14>

to power; PU to VCCP at power side also

H_PROCHOT#<37>

H_THERMTRIP#<14>

H_CPURST#

H_PM_SYNC<13>

H_CPUPWRGD

H_CPUPWRGD<14>

B B

PM_DRAM_PWRGD<13>

from power

VTTPWRGOOD<29>

BUF_PLT_RST#<14>

C C

PM_PWRBTN#_R

1

R220_0402_1% R220_0402_1%

1 2

R520_0402_1% R520_0402_1%

1 2

R749.9_0402_1% R749.9_0402_1%

1 2

R949.9_0402_1% R949.9_0402_1%

1 2

T48PAD T48PAD

R14

1 2

0_0402_5%

R15

1 2

0_0402_5%

R17

1 2

0_0402_5%

R18

@ R18

@

1 2

0_0402_5%

R19

1 2

0_0402_5%

R21

1 2

0_0402_5%

R22

1 2

0_0402_5%

R26

1 2

0_0402_5%

R32

1 2

0_0402_5%@

1 2

1.5K_0402_1%

750_0402_1%

@

1 2

R20 1K_0402_5%

H_COMP3 H_COMP2 H_COMP1 H_COMP0

TP_SKTOCC#

H_CATERR#

H_PECI_ISO

H_PROCHOT#_D

H_THERMTRIP#_R

H_CPURST#_R H_PM_SYNC_R

SYS_AGENT_PWROK

VCCPWRGOOD_0

VDDPWRGOOD_R

H_PWRGD_XDP_RH_PWRGD_XDP

PLT_RST#_R

R33

12

R35

+VCCP

U1B

AD71

COMP3

AC70

COMP2

AD69

COMP1

AE66

COMP0

M71

PROC_DETECT

N61

CATERR#

N19

PECI

N67

PROCHOT#

N17

THERMTRIP#

N70

RESET_OBS#

M17

PM_SYNC

AM7

VCCPWRGOOD_1

Y67

VCCPWRGOOD_0

AM5

SM_DRAMPWROK

H15

VTTPWRGOOD

Y70

TAPPWRGOOD

G3

RSTIN#

INTEL_AUBURNDALE_1288

2nd Source : SV - i5-540M CPU : 2.53G (K0)

SV - i5-450M CPU : 2.4G (K0) SV - i3-350M CPU : 2.26G (K0) SV- i3-370M CPU : 2.4G (K0) ULV -U3400 CPU : 1.06G (K0)

Misc

Thermal Power Management

Intel S3 power reduction circuit for Calpella. 11/09

VDDPWRGOOD_R

1 2

R12 1.5K_0402_1%R12 1.5K_0402_1%

1 2

R13 750_0402_1%R13 750_0402_1%

2

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

Clocks

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

DDR3

Misc

DDR3

Misc

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6]

JTAG & MBP

BPM#[7]

VCCP_1.5VSPWRGD <29>

3

CLK_CPU_BCLK

AK7

CLK_CPU_BCLK#

AK8

CLK_CPU_XDP

K71

CLK_CPU_XDP#

J70

CLK_EXP

L21

CLK_EXP#

J21 Y2

W4

SM_DRAMRST#

BJ12

SM_RCOMP0

BV33

SM_RCOMP1

BP39

SM_RCOMP2

BV40

PM_EXTTS#0

AV66

PM_EXTTS#1

AV64

XDP_PRDY#

U71

XDP_PREQ#

U69

XDP_TCK

T67

TCK

XDP_TMS

N65

TMS

XDP_TRST#

P69

XDP_TDI

T69

TDI

XDP_TDO

T71

TDO

XDP_TDI_M

P71 T70

XDP_DBRESET#

W71

XDP_BPM#0

J69

XDP_BPM#1

J67

XDP_BPM#2

J62

XDP_BPM#3

K65

XDP_BPM#4

K62

XDP_BPM#5

J64

XDP_BPM#6

K69

XDP_BPM#7

M69

R16

1 2

R1493 0_0402_5%@R1493 0_0402_5%@ R1494 0_0402_5%@R1494 0_0402_5%@

0.1U_0402_16V4Z

CLK_CPU_BCLK <14> CLK_CPU_BCLK# <14>

CLK_EXP <12> CLK_EXP# <12>

CLK_DP <12> CLK_DP# <12>

T49 PADT49 PAD

0_0402_5%

PM_EXTTS#1_R <9>

1 2 1 2

reserve for ESD, Compal SI 1/19

ESD request to add

+VCCP

1

C1

2

@

CFG12<5> CFG13<5> CFG14<5> CFG15<5>

from DDR

XDP_PREQ#_R XDP_PRDY#_R

XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3

XDP_BPM#4 XDP_BPM#5

XDP_BPM#6 XDP_BPM#7

H_CPUPWRGD

PM_PWRBTN#_R<13>

H_PWRGD_XDP

Add test points

Intel S3 power reduction circuit for Calpella. 11/09

XDP_PREQ#_R

CFG17<5> CFG16<5>

1 2 1 2

R36

1 2

1K_0402_5%

R37

1 2

0_0402_5%

XDP_PRDY#_R

XDP_BPM#4_R

R430_0402_5% R430_0402_5%

XDP_BPM#5_R

R480_0402_5% R480_0402_5%

XDP_BPM#6_R

R400_0402_5% R400_0402_5%

XDP_BPM#7_R

R410_0402_5% R410_0402_5%

H_CPUPWRGD_R PM_PWRBTN#_R

T112PAD T112PAD T113PAD T113PAD

XDP_TCK

R23 0_0402_5%R23 0_0402_5%

1 2

R24 0_0402_5%@R24 0_0402_5%@

1 2

R25 0_0402_5%R25 0_0402_5%

1 2

R27 0_0402_5%@R27 0_0402_5%@

1 2

R28 0_0402_5%R28 0_0402_5%

1 2

R29 0_0402_5%@R29 0_0402_5%@

1 2

R30 0_0402_5%R30 0_0402_5%

1 2

R31 0_0402_5%@R31 0_0402_5%@

1 2

SM_DRAMRST#

R1092

R1092 100K_0402_5%@

100K_0402_5%@

R46 0_0402_5%

1 2

12

2

CPU XDP Connector

JP4

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59

SAMTE_BSH-030-01-L-D-A CONN@

4

R1093

@

61

Q52A

2N7002DW-7-F_SOT363-6

C6 470P_0402_50V7KC6 470P_0402_50V7K

1 2

GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16

1K_0402_5%

ITPCLK#/HOOK5 RESET#/HOOK6

12

OBSDATA_C0 OBSDATA_C1

OBSDATA_C2 OBSDATA_C3

OBSDATA_D0 OBSDATA_D1

OBSDATA_D2 OBSDATA_D3

ITPCLK/HOOK4

VCC_OBS_CD DBR#/HOOK7

+1.5V

DRAMRST# <9>

PCH_DDR_RST <14>

2

GND1

4

OBSFN_C0

6

OBSFN_C1

8

GND3

10 12 14

GND5

16 18 20

GND7

22

OBSFN_D0

24

OBSFN_D1

26

GND9

28 30 32

GND11

34 36 38

GND13

40 42 44 46 48 50

GND15

52

TD0

54

TRST#

56

TDI

58

TMS

60

GND17

CLK_CPU_XDP CLK_CPU_XDP#

XDP_RST#_R XDP_DBRESET#_R

XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

XDP_RST#_R

CFG8 <5> CFG9 <5>

CFG0 <5> CFG1 <5>

CFG2 <5> CFG3 <5>

CFG10 <5> CFG11 <5>

CFG4 <5> CFG5 <5>

CFG6 <5> CFG7 <5>

+VCCP

1K_0402_5%@

R38

1 2 1 2

R39 0_0402_5%R39 0_0402_5%

@

1 2

R42 0_0402_5%

PLT_RST#

H_CPURST# XDP_DBRESET#

5

+3VS

R34

R34 1K_0402_5%

1K_0402_5%

1 2

PLT_RST# <14,21,22,27>

XDP_DBRESET# <13>

PWM Fan Control circuit

+5VS

DDR3 Compensation Signals

SM_RCOMP0 SM_RCOMP1 H_CATERR# SM_RCOMP2

D D

1 2

R52 100_0402_1%R52 100_0402_1%

1 2

R56 24.9_0402_1%R56 24.9_0402_1%

1 2

R58 130_0402_1%R58 130_0402_1%

Layout Note:Please these resistors near Processor

1

Processor Pullups

R44 49.9_0402_1%R44 49.9_0402_1%

H_PROCHOT#_D H_CPURST#_R

1 2 1 2

R45 68_0402_5%R45 68_0402_5%

1 2

R47 68_0402_5%@R47 68_0402_5%@

+VCCP

DDR Pullups

PM_EXTTS#0

R1

PM_EXTTS#1

R3

0112 Remove uninstall parts

XDP_TRST#

Close to XDP

XDP_TDO

2

10K_0402_5%

1 2 1 2

10K_0402_5% 10K_0402_5%

10K_0402_5%

1 2

R59 51_0402_5%R59 51_0402_5%

1 2

R10 51_0402_5%R10 51_0402_5%

This shall place near XDP

+VCCP

R896

R896 10K_0402_5%

10K_0402_5%

1 2

Compal Secret Data

FAN_PWM

FAN_PWM<28>

+VCCP

Q26

H_PROCHOT#

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PMBT3904_SOT23

+3VS

CBE

123

2008/09/15 2009/09/03

1

INB

2

INA

Deciphered Date

4

+3VS

5

U50

P

4

O

G

TC7SH00FUF_SSOP5

3

R891 0_0402_5%R891 0_0402_5%

12

for RF

C1316

@C1316

@

C3

1 2

0.1U_0402_10V6K@C30.1U_0402_10V6K@ JFAN1

JFAN1

1

2

4

2

G1

3

5

3

G2

ACES_85204-03001

1

2

47P_0402_50V8J

ACES_85204-03001

CONN@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

D

441Friday, October 29, 2010

D

of

1

U1A

DMI_CRX_PTX_N0<13> DMI_CRX_PTX_N1<13> DMI_CRX_PTX_N2<13> DMI_CRX_PTX_N3<13>

DMI_CRX_PTX_P0<13>

A A

B B

C C

DMI_CRX_PTX_P1<13> DMI_CRX_PTX_P2<13> DMI_CRX_PTX_P3<13>

DMI_CTX_PRX_N0<13> DMI_CTX_PRX_N1<13> DMI_CTX_PRX_N2<13> DMI_CTX_PRX_N3<13>

DMI_CTX_PRX_P0<13> DMI_CTX_PRX_P1<13> DMI_CTX_PRX_P2<13> DMI_CTX_PRX_P3<13>

FDI_CTX_PRX_N0<13> FDI_CTX_PRX_N1<13> FDI_CTX_PRX_N2<13> FDI_CTX_PRX_N3<13> FDI_CTX_PRX_N4<13> FDI_CTX_PRX_N5<13> FDI_CTX_PRX_N6<13> FDI_CTX_PRX_N7<13>

FDI_CTX_PRX_P0<13> FDI_CTX_PRX_P1<13> FDI_CTX_PRX_P2<13> FDI_CTX_PRX_P3<13> FDI_CTX_PRX_P4<13> FDI_CTX_PRX_P5<13> FDI_CTX_PRX_P6<13> FDI_CTX_PRX_P7<13>

FDI_FSYNC0<13> FDI_FSYNC1<13>

FDI_INT<13> FDI_LSYNC0<13>

FDI_LSYNC1<13>

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT FDI_LSYNC0

FDI_LSYNC1

F7

DMI_RX#[0]

J8

DMI_RX#[1]

K8

DMI_RX#[2]

J4

DMI_RX#[3]

F9

DMI_RX[0]

J6

DMI_RX[1]

K9

DMI_RX[2]

J2

DMI_RX[3]

H17

DMI_TX#[0]

K15

DMI_TX#[1]

J13

DMI_TX#[2]

F10

DMI_TX#[3]

G17

DMI_TX[0]

M15

DMI_TX[1]

G13

DMI_TX[2]

J11

DMI_TX[3]

L2

FDI_TX#[0]

N7

FDI_TX#[1]

M4

FDI_TX#[2]

P1

FDI_TX#[3]

N10

FDI_TX#[4]

R7

FDI_TX#[5]

U7

FDI_TX#[6]

W8

FDI_TX#[7]

K1

FDI_TX[0]

N5

FDI_TX[1]

N2

FDI_TX[2]

R2

FDI_TX[3]

N9

FDI_TX[4]

R8

FDI_TX[5]

U6

FDI_TX[6]

W10

FDI_TX[7]

AC7

FDI_FSYNC[0]

AC9

FDI_FSYNC[1]

AB5

FDI_INT

AA1

FDI_LSYNC[0]

AB2

FDI_LSYNC[1]

INTEL_AUBURNDALE_1288

PEG_RCOMPO

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PEG_ICOMPI

PEG_ICOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B12 A13 D12 B11

G40 G38 H34 P34 G28 H25 H24 D29 B26 D26 B23 D22 A20 D19 A17 B14

F40 J38 G34 M34 J28 G25 K24 B28 A27 B25 A24 B21 B19 B18 B16 D15

N40 L38 M32 D40 A38 G32 B33 B35 L30 A31 B32 L28 N26 M24 G21 J20

L40 N38 N32 B39 B37 H32 A34 D36 J30 B30 D33 N28 M25 N24 F21 L20

EXP_ICOMPI

EXP_RBIAS

2

49.9_0402_1%

1 2

750_0402_1%

3

R64

R65

CFG0<4> CFG1<4> CFG2<4> CFG3<4> CFG4<4> CFG5<4> CFG6<4> CFG7<4> CFG8<4> CFG9<4> CFG10<4> CFG11<4> CFG12<4> CFG13<4> CFG14<4> CFG15<4> CFG16<4> CFG17<4>

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

AV71

AW70

AY69 BB69

4

U1E

AL4

CFG[0]

AM2

CFG[1]

AK1

CFG[2]

AK2

CFG[3]

AK4

CFG[4]

AJ2

CFG[5]

AT2

CFG[6]

AG7

CFG[7]

AF4

CFG[8]

AG2

CFG[9]

AH1

CFG[10]

AC2

CFG[11]

AC4

CFG[12]

AE2

CFG[13]

AD1

CFG[14]

AF8

CFG[15]

AF6

CFG[16]

AB7

CFG[17]

AU1

RSVD_TP[0]

T4

RSVD15

T2

RSVD16

U1

RSVD17

V2

RSVD18 RSVD19

RSVD20 RSVD21

RSVD22

D8

RSVD23

B7

RSVD24

A10

RSVD26

B9

RSVD27

C5

RSVD_NCTF[7]

A6

RSVD_NCTF[8]

E3

RSVD_NCTF[6]

F1

RSVD_NCTF[5]

INTEL_AUBURNDALE_1288

RSVD_NCTF[3] RSVD_NCTF[4]

RSVD_NCTF[2] RSVD_NCTF[1]

RSVD_TP[2] RSVD_TP[1]

RESERVED

DC_TEST_BV71 DC_TEST_BV69 DC_TEST_BV68

DC_TEST_BV5 DC_TEST_BV3

DC_TEST_BV1 DC_TEST_BT71 DC_TEST_BT69

DC_TEST_BT3

DC_TEST_BT1 DC_TEST_BR71

DC_TEST_BR1

DC_TEST_E71

DC_TEST_E1 DC_TEST_C71 DC_TEST_C69

DC_TEST_C3 DC_TEST_A71 DC_TEST_A69 DC_TEST_A68

DC_TEST_A5

RSVD32 RSVD33

RSVD34 RSVD35

RSVD36 RSVD37

RSVD38 RSVD39

RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD54 RSVD55 RSVD56 RSVD57 RSVD58

RSVD62 RSVD63

RSVD64 RSVD65

W66 W64

AC69 AC71

AA71 AA69

R66 R64

BT5 BR5

BV6 BV8

AV69 AK71 AN69 AP66 AH66 AK66 AR71 AM66 AK69 AU71 AT70 AR69 AU69 AT67

AP2 AN7

AV4 AU2

BE69 BE71

BV71 BV69 BV68 BV5 BV3 BV1 BT71 BT69 BT3 BT1 BR71 BR1 E71 E1 C71 C69 C3 A71 A69 A68 A5

T116 PADT116 PAD T117 PADT117 PAD

T118 PADT118 PAD T119 PADT119 PAD

T120 PADT120 PAD

T51 PADT51 PADT50PAD T50PAD T52 PADT52 PAD

5

VSS_NCTF2_R <8> VSS_NCTF6_R <8>

VSS_NCTF1_R <8> VSS_NCTF7_R <8>

CFG Straps for PROCESSOR

CFG0

R68 3.01K_0402_1%@R68 3.01K_0402_1%@

1 2

PCI-Express Configuration Select

1: Single PEG 0: Bifurcation enabled

CFG0

Not applicable for Clarksfield Processor

CFG3

R69 3.01K_0402_1%@R69 3.01K_0402_1%@

1 2

CFG3-PCI Express Static Lane Reversal

1: Normal Operation

CFG3

0: Lane Numbers Reversed

15 -> 0, 14 ->1, .....

CFG4

R70 3.01K_0402_1%R70 3.01K_0402_1%

D D

ES1 sample need negative voltage ES2 sample contact to GND

1 2

CFG4-Display Port Presence

1: Disabled; No Physical Display Port attached to Embedded Display Port

CFG4

0: Enabled; An external Display Port device is connected to the Embedded Display Port

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

541Friday, October 29, 2010

of

D

1

U1C

A A

B B

C C

DDR_A_D[0..63]<9>

DDR_A_BS0<9> DDR_A_BS1<9> DDR_A_BS2<9>

DDR_A_CAS#<9> DDR_A_RAS#<9> DDR_A_WE#<9>

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

BF11 BE11

BH13

BN11 BG17

BK15 BG15

BH17 BK17 BN20 BN17 BK25 BH25 BJ20 BH21 BG24 BG25 BJ40

BM43

BF47

BF48 BN40 BH43 BN44 BN47 BN48 BN51 BH53

BJ55 BH48

BJ48 BM53 BN55

BF55 BN57 BN65

BJ61

BF57

BJ57 BK64 BK61

BJ63

BF64 BB64 BB66

BJ66

BF65 AY64 BC70

BT38

BH38

BF21

BK43

BL38

BF38

AT8

SA_DQ[0]

AT6

SA_DQ[1]

BB5

SA_DQ[2]

BB9

SA_DQ[3]

AV7

SA_DQ[4]

AV6

SA_DQ[5]

BE6

SA_DQ[6]

BE8

SA_DQ[7] SA_DQ[8] SA_DQ[9]

BK5

SA_DQ[10] SA_DQ[11]

BF9

SA_DQ[12]

BF6

SA_DQ[13]

BK7

SA_DQ[14]

BN8

SA_DQ[15] SA_DQ[16]

BN9

SA_DQ[17] SA_DQ[18] SA_DQ[19]

BK9

SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

SA_CK[0]

SA_CK#[0]

SA_CKE[0]

SA_CK[1]

SA_CK#[1]

SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4]

DDR SYSTEM MEMORY A

SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

BM34 BP35 BF20

BK36 BH36 BK24

BH40 BJ47

BF43 BL47

BB10 BJ10 BM15 BN24 BG44 BG53 BN62 BH59

AY5 BJ7 BN13 BL21 BH44 BK51 BP58 BE62

AY7 BJ5 BL13 BN21 BK44 BH51 BM60 BE64

BT36 BP33 BV36 BG34 BG32 BN32 BK32 BJ30 BN30 BF28 BH34 BH30 BJ28 BF40 BN28 BN25

2

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

M_CLK_DDR0 <9> M_CLK_DDR#0 <9> DDR_CKE0_DIMMA <9>

M_CLK_DDR1 <9> M_CLK_DDR#1 <9> DDR_CKE1_DIMMA <9>

DDR_CS0_DIMMA# <9> DDR_CS1_DIMMA# <9>

M_ODT0 <9> M_ODT1 <9>

DDR_A_DM[0..7] <9>

DDR_A_DQS#[0..7] <9>

DDR_A_DQS[0..7] <9>

DDR_A_MA[0..15] <9>

3

U1D

BA2

SB_DQ[0]

AW2

SB_DQ[1]

BD1

SB_DQ[2]

BE4

SB_DQ[3]

AY1

SB_DQ[4]

BC2

SB_DQ[5]

BF2

SB_DQ[6]

BH2

SB_DQ[7]

BG4

SB_DQ[8]

BG1

SB_DQ[9]

BR6

SB_DQ[10]

BR8

SB_DQ[11]

BJ4

SB_DQ[12]

BK2

SB_DQ[13]

BU9

SB_DQ[14]

BV10

SB_DQ[15]

BR10

SB_DQ[16]

BT12

SB_DQ[17]

BT15

SB_DQ[18]

BV15

SB_DQ[19]

BV12

SB_DQ[20]

BP12

SB_DQ[21]

BV17

SB_DQ[22]

BU16

SB_DQ[23]

BP15

SB_DQ[24]

BU19

SB_DQ[25]

BV22

SB_DQ[26]

BT22

SB_DQ[27]

BP19

SB_DQ[28]

BV19

SB_DQ[29]

BV20

SB_DQ[30]

BT20

SB_DQ[31]

BT48

SB_DQ[32]

BV48

SB_DQ[33]

BV50

SB_DQ[34]

BP49

SB_DQ[35]

BT47

SB_DQ[36]

BV52

SB_DQ[37]

BV54

SB_DQ[38]

BT54

SB_DQ[39]

BP53

SB_DQ[40]

BU53

SB_DQ[41]

BT59

SB_DQ[42]

BT57

SB_DQ[43]

BP56

SB_DQ[44]

BT55

SB_DQ[45]

BU60

SB_DQ[46]

BV59

SB_DQ[47]

BV61

SB_DQ[48]

BP60

SB_DQ[49]

BR66

SB_DQ[50]

BR64

SB_DQ[51]

BR62

SB_DQ[52]

BT61

SB_DQ[53]

BN68

SB_DQ[54]

BL69

SB_DQ[55]

BJ71

SB_DQ[56]

BF70

SB_DQ[57]

BG71

SB_DQ[58]

BC67

SB_DQ[59]

BK70

SB_DQ[60]

BK67

SB_DQ[61]

BD71

SB_DQ[62]

BD69

SB_DQ[63]

BV43

SB_BS[0]

BV41

SB_BS[1]

BV24

SB_BS[2]

BU46

SB_CAS#

BT40

SB_RAS#

BT41

SB_WE#

4

BU33

SB_CK[0]

BV34

SB_CK#[0]

BT26

SB_CKE[0]

BV38

SB_CK[1]

BU39

SB_CK#[1]

BT24

SB_CKE[1]

BP46

SB_CS#[0]

BT43

SB_CS#[1]

BV45

SB_ODT[0]

BU49

SB_ODT[1]

BB4

SB_DM[0]

BL4

SB_DM[1]

BT13

SB_DM[2]

BP22

SB_DM[3]

BV47

SB_DM[4]

BV57

SB_DM[5]

BU65

SB_DM[6]

BF67

SB_DM[7]

BE2

SB_DQS#[0]

BM3

SB_DQS#[1]

BU12

SB_DQS#[2]

BT19

SB_DQS#[3]

BT52

SB_DQS#[4]

BV55

SB_DQS#[5]

BU63

SB_DQS#[6]

BG69

SB_DQS#[7]

BD4

SB_DQS[0]

BN4

SB_DQS[1]

BV13

SB_DQS[2]

BT17

SB_DQS[3]

BT50

SB_DQS[4]

BU56

SB_DQS[5]

BV62

SB_DQS[6]

BJ69

SB_DQS[7]

BT34

SB_MA[0]

BP30

SB_MA[1]

DDR SYSTEM MEMORY - B

SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

BV29 BU30 BV31 BT33 BT31 BP26 BV27 BT27 BU42 BU26 BT29 BT45 BV26 BU23

5

INTEL_AUBURNDALE_1288

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/03

INTEL_AUBURNDALE_1288

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Custom Date: Sheet

Date: Sheet

4

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

D

641Friday, October 29, 2010

D

of

1

330U_D2_2.5VM_R6M

1U_0402_6.3V6K

C1313

C16

1

C1312

+

2

A A

B B

C32

C C

D D

+GFX_CORE

C1325

1

@

2

for RF

+GFX_CORE

12P_0402_50V8J

C1319

1

@

2

+VCCP

47P_0402_50V8J

C51

1

@

2

for RF

12P_0402_50V8J

C1326

1

@

2

C1320

1

@

2

C52

1

@

2

1

2

1U_0402_6.3V6K

C212

1

2

1U_0402_6.3V6K

C216

1

2

1U_0402_6.3V6K

C220

1

2

+VCCP

10U_0805_6.3V6M

C28

1

2

+VCAP2

1U_0402_6.3V6K

C33

1

2

10U_0805_6.3V6M

C59

1

2

12P_0402_50V8J

C1322

C1321

1

@

2

47P_0402_50V8J

C53

1

@

2

C16

1

2

1U_0402_6.3V6K

C179

1

2

1U_0402_6.3V6K

C215

1

2

1U_0402_6.3V6K

C219

1

2

10U_0805_6.3V6M

C29

1

2

1U_0402_6.3V6K

C34

1

2

10U_0805_6.3V6M

C60

1

2

12P_0402_50V8J

1

@

2

47P_0402_50V8J

C54

1

@

2

22U_0805_6.3V6M

1U_0402_6.3V6K

C18

C17

1

2

1U_0402_6.3V6K

1U_0402_6.3V6KZ

C214

C213

1

2

1U_0402_6.3V6K

C218

C217

1

2

1U_0402_6.3V6K

C380

C221

1

2

10U_0805_6.3V6M

C30

1

2

1U_0402_6.3V6K

C35

1

2

+VCCP

10U_0805_6.3V6M

C61

1

2

+CPU_CORE

C55

1

@

2

+CPU_CORE

1U_0402_6.3V6K

C615

C616

1

2

1

+GFX_CORE

22U_0805_6.3V6M

C19

1

2

10U_0805_6.3V6M

C31

1

2

1U_0402_6.3V6K

C36

1

2

10U_0805_6.3V6M

C62

1

2

for RF

C56

47P_0402_50V8J

1

@

2

1U_0402_6.3V6K

C623

1

2

U1G

AN32

VAXG1

AN30

VAXG2

AN28

VAXG3

AN26

VAXG4

AN24

VAXG5

AN23

VAXG6

AN21

VAXG7

AN19

VAXG8

AL32

VAXG9

AL30

VAXG10

AL28

VAXG11

AL26

VAXG12

AL24

VAXG13

AL23

VAXG14

AL21

VAXG15

AL19

VAXG16

AK14

VAXG17

AK12

VAXG18

AJ10

VAXG19

AH14

VAXG20

AH12

VAXG21

AF28

VAXG22

AF26

VAXG23

AF24

VAXG24

AF23

VAXG25

AF21

VAXG26

AF19

VAXG27

AF17

VAXG28

AF15

VAXG29

AF14

VAXG30

AD28

VAXG31

AD26

VAXG32

AD24

VAXG33

AD23

VAXG34

AD21

VAXG35

AD19

VAXG36

AD17

VAXG37

W21

VTT1_1

W19

VTT1_2

U21

VTT1_3

U19

VTT1_4

U17

VTT1_5

U15

VTT1_6

U14

VTT1_7

U12

VTT1_8

R21

VTT1_9

R19

VTT1_10

R17

VTT1_11

AK62

VCAP2_1

AK60

VCAP2_2

AK59

VCAP2_3

AH60

VCAP2_4

AH59

VCAP2_5

AF60

VCAP2_6

AF59

VCAP2_7

AD60

VCAP2_8

AD59

VCAP2_9

AB60

VCAP2_10

AB59

VCAP2_11

AA60

VCAP2_12

AA59

VCAP2_13

W60

VCAP2_14

W59

VCAP2_15

U60

VCAP2_16

U59

VCAP2_17

R60

VCAP2_18

R59

VCAP2_19

INTEL_AUBURNDALE_1288

47P_0402_50V8J

C57

47P_0402_50V8J

C57

47P_0402_50V8J

1

@

2

1U_0402_6.3V6K

C643

C617

1

2

C58

47P_0402_50V8J

C58

47P_0402_50V8J

1

@

2

1U_0402_6.3V6K

C645

1

2

Follow SCH check list

GRAPHICS

PEG & DMI

POWER

+CPU_CORE

1U_0402_6.3V6K

C381

1U_0402_6.3V6K

C644

C646

1

2

SENSE

LINES

SENSE

LINES

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1U_0402_6.3V6K

C382

1

2

C647

1

2

VAXG_SENSE

VSSAXG_SENSE

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36

VTT0_DDR VTT0_DDR[1] VTT0_DDR[2] VTT0_DDR[3] VTT0_DDR[4] VTT0_DDR[5] VTT0_DDR[6] VTT0_DDR[7] VTT0_DDR[8] VTT0_DDR[9]

VTT1_12 VTT1_13 VTT1_14 VTT1_15 VTT1_16 VTT1_17 VTT1_18 VTT1_19 VTT1_20 VTT1_21

1U_0402_6.3V6K

C533

1

2

1U_0402_6.3V6K

C649

1

2

AF12 AF10

AF71 AG67 AG70 AH71 AN71 AM67 AM70

AH69 AL71 AL69

BU40 BU35 BU28 BN38 BM25 BL30 BJ38 BH32 BH28 BG43 BF16 BF15 BD35 BD33 BD32 BD30 BD28 BD26 BD24 BD23 BD21 BD19 BD17 BD15 BB35 BB33 BB32 BB30 BB28 BB26 BB24 BB23 BB21 BB19 BB17 BB15

AW32 AW30 AW28 AW26 AW24 AW23 AW21 AW19 AW17 AW15

AD15 AD14 AD12 AB12 AA12 W17 W15 W14 W12 R15

1U_0402_6.3V6K

C534

1

2

1U_0402_6.3V6K

C650

1

2

1 2

R700 4.7K_0402_5%R700 4.7K_0402_5%

VCC_AXG_SENSE VSS_AXG_SENSE

GFXVR_VID_0 <39> GFXVR_VID_1 <39> GFXVR_VID_2 <39> GFXVR_VID_3 <39> GFXVR_VID_4 <39> GFXVR_VID_5 <39> GFXVR_VID_6 <39>

R705 4.7K_0402_5%@R705 4.7K_0402_5%@

1 2

GFXVR_EN <39>

GFX_DPRSLPVR

R1478 0_0402_5%R1478 0_0402_5%

1U_0402_6.3V6K

C20

1

2

330U_B2_2.5VM_R15M

C25

1

+

@

2

1U_0402_6.3V6K

C42

1

2

10U_0805_6.3V6M

C46

1

2

1U_0402_6.3V6K

C383

C613

1

2

1U_0402_6.3V6K

C652

C648

1

2

GFXVR_EN

12

1U_0402_6.3V6K

C21

1

2

22U_0805_6.3V6M

C26

1

2

+VTT_DDR

1U_0402_6.3V6K

C43

1

2

10U_0805_6.3V6M

C47

1

2

1U_0402_6.3V6K

C614

C612

1

2

1U_0402_6.3V6K

C653

1

2

VCC_AXG_SENSE <39> VSS_AXG_SENSE <39>

+VCCP

GFXVR_IMON <39>

+1.5VS_CPU_VDDQ

1U_0402_6.3V6K

C22

C23

1

2

22U_0805_6.3V6M

C27

+VCCP

1U_0402_6.3V6K

C44

1

2

+VCCP

10U_0805_6.3V6M

C48

C49

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

C651

1

2

3

1 2

VCC_1 VCC_2 VCC_3 VCC_4 VCC_5 VCC_6 VCC_7 VCC_8 VCC_9 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59 VCC_60 VCC_61 VCC_62 VCC_63 VCC_64 VCC_65 VCC_66 VCC_67 VCC_68 VCC_69 VCC_70 VCC_71 VCC_72 VCC_73 VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79 VCC_80 VCC_81 VCC_82 VCC_83 VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89

1U_0402_6.3V6K

1

C68

2

R1483 4.7K_0402_5%@R1483 4.7K_0402_5%@

1 2

R1484 4.7K_0402_5% @ R1484 4.7K_0402_5% @

POWER

CPU CORE SUPPLY

add 7pcs Caps to follow Design guide add 7pcs Caps to follow Design guide

1U_0402_6.3V6K

1

C71

C69

1U_0402_6.3V6K

C71

C70

2

1U_0402_6.3V6K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

GFX_DPRSLPVR

+CPU_CORE

AF57 AF55 AF53 AF51 AF50 AF48 AF46 AF44 AF42 AF41 AD55 AD51 AD48 AD44 AD41 AB55 AB51 AB48 AB44

12/05 HP

AB41 AA55 AA51 AA48 AA44

1U_0402_6.3V6K

AA41

C24

W55 W51 W48 W44 W41 U55 U51 U48 U44 U41 R55 R51 R48 R44 R41

P60 N55 N51 N48 N44 N42 M60 M51 M44

L55

K60

K51

K44

J55

12

H60

L31

H51 H44

0_0805_5%

G60 G55 G51 G44

F55

E60

E57

E53

E50

E46

E42 D59 D57 D55 D54 D52 D50 D48 D47 D45

1

D43

B60

B56

2

B53

B49

B46

B42

A57

A54

A50

A47

A43

+VCAP0 +VCAP1

+VCCP

VCAP0_1 VCAP0_2 VCAP0_3 VCAP0_4 VCAP0_5 VCAP0_6 VCAP0_7 VCAP0_8

VCAP0_9 VCAP0_10 VCAP0_11 VCAP0_12 VCAP0_13 VCAP0_14 VCAP0_15 VCAP0_16 VCAP0_17 VCAP0_18 VCAP0_19 VCAP0_20 VCAP0_21 VCAP0_22 VCAP0_23 VCAP0_24 VCAP0_25 VCAP0_26 VCAP0_27

VCAP1_1

VCAP1_2

VCAP1_3

VCAP1_4

VCAP1_5

VCAP1_6

VCAP1_7

VCAP1_8

VCAP1_9 VCAP1_10 VCAP1_11 VCAP1_12 VCAP1_13 VCAP1_14 VCAP1_15 VCAP1_16 VCAP1_17 VCAP1_18 VCAP1_19 VCAP1_20 VCAP1_21 VCAP1_22 VCAP1_23 VCAP1_24 VCAP1_25 VCAP1_26 VCAP1_27

INTEL_AUBURNDALE_1288

1U_0402_6.3V6K

1

C72

C93

2

1U_0402_6.3V6K

U1H

+VCAP0

BD55 BD51 BD48 BB55 BB51 BB48 AY57 AY53 AY50 AW57 AW53 AW50 AU55 AU51 AU48 AR55 AR51 AR48

PROC_DPRSLPVR<37>

AN57 AN53 AN50 AL57 AL53 AL50 AK57 AK53 AK50

VCCSENSE<37> VSSSENSE<37>

VCCSENSE VSSSENSE

1U_0402_6.3V6K

1

C92

2

1U_0402_6.3V6K

Compal Secret Data

R1481 0_0402_5%R1481 0_0402_5%

Close to CPU

1U_0402_6.3V6K

C140

Deciphered Date

+VCAP1

BD44 BD41 BD37 BB44 BB41 BB37 AY46 AY42 AY39 AW46 AW42 AW39 AU44 AU41 AU37 AR44 AR41 AR37 AN46 AN42 AN39 AL46 AL42 AL39 AK46 AK42 AK39

1U_0402_6.3V6K

1

C113

C114

C94

2

1U_0402_6.3V6K

2008/09/15 2009/09/03

4

PSI#<37>

H_VID[0..6]<37>

T135

T135 PAD

PAD

R72

0_0402_5%

IMVP_IMON<37>

VCCSENSE VSSSENSE

VTT_SENSE<34>

12

1 2

R75 100_0402_1%R75 100_0402_1%

1 2

R76 100_0402_1%R76 100_0402_1%

+1.8VS

+1.5VS_CPU_VDDQ

L32

0_0805_5%

1U_0402_6.3V6K

1

2

C115

1U_0402_6.3V6K

C63

4

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

H_VTTVID1

PM_DPRSLPVR_R

12

0_0402_5%

R73

R74 0_0402_5%R74 0_0402_5%

VSS_SENSE_VTT

+CPU_CORE

22U_0805_6.3V6M

1

C374.7U_0603_6.3V6K C374.7U_0603_6.3V6K

C38

2

+VDDQ_CK

12

1

C50

2

1U_0402_6.3V6K

1

C64

2

1U_0402_6.3V6K

F68 A61

D61 D62 A62 B63 D64 D66

AN1

F66

A41

12

F64

12

F63

N13 R12

W39 W37

U37 R39 R37

BB14 BB12

1

2

U1F

PSI# VID[0]

VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VTT_SELECT[1] PROC_DPRSLPVR

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE VSS_SENSE_VTT

VCCPLL1 VCCPLL2 VCCPLL3 VCCPLL4 VCCPLL5

VDDQ_CK[1] VDDQ_CK[2]

INTEL_AUBURNDALE_1288

VTT0_72 VTT0_73

1U_0402_6.3V6K

1

C66

C65

2

1U_0402_6.3V6K

5

+VCCP

AW14

VTT0_11

AW12

VTT0_12

AU60

VTT0_13

AU59

VTT0_14

AU12

VTT0_15

AR60

VTT0_16

AR59

VTT0_17

AR12

VTT0_18

AN60

VTT0_19

AN59

VTT0_20

AN35

VTT0_21

AN33

VTT0_22

AN17

VTT0_23

AN15

VTT0_24

AN14

VTT0_25

AN12

VTT0_26

AM10

VTT0_27

AL60

VTT0_28

AL59

VTT0_29

AL17

VTT0_30

AL15

VTT0_31

AL14

VTT0_32

AL12

VTT0_33

AK35

VTT0_34

1

2

VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42

VTT0_10 VTT0_43 VTT0_44 VTT0_45 VTT0_46 VTT0_47 VTT0_48 VTT0_49 VTT0_50 VTT0_51 VTT0_52 VTT0_53 VTT0_54 VTT0_55 VTT0_56 VTT0_57 VTT0_58 VTT0_59 VTT0_60 VTT0_61 VTT0_62 VTT0_63 VTT0_64 VTT0_65 VTT0_66 VTT0_67 VTT0_68 VTT0_69 VTT0_70 VTT0_71 VTT0_72 VTT0_73

C87

5

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9

+VCCP

1U_0402_6.3V6K

1

C85

2

1U_0402_6.3V6K

AK33 AF39 AF37 AF35 AF33 AF32 AF30 AD39 BF60 BF59 BD60 BD59 BB60 BB59 AY60 AW60 AW35 AW33 AD37 AD35 AD33 AD32 AD30 W35 W33 W32 W30 W28 W26 W24 W23 U35 U33 U32 U30 U28 U26 U24 U23 R35 R33 R32 R30 R28 R26 R24 R23 AY10 AN9

1

2

VTT0_72 VTT0_73

C91

741Friday, October 29, 2010

1U_0402_6.3V6K

1

C90

2

of

SENSE LINESCPU VIDS

1.1V RAIL POWER

1.8V

POWER

R77 0_0402_5%R77 0_0402_5%

1 2

R78 0_0402_5%R78 0_0402_5%

1 2

1U_0402_6.3V6K

1

C67

2

Title

Size Document Number Rev

Custom

Date: Sheet

1U_0402_6.3V6K

1

2

1

C89

C86

1U_0402_6.3V6K

401860

C88

2

1U_0402_6.3V6K

Compal Electronics, Inc.

SCHEMATICS, MB A6161

D

1

2

3

4

5

U1I

BU62

VSS1

BU58

VSS2

BU55

VSS3

BU51

VSS4

BU48

VSS5

BU44

VSS6

BU37

VSS7

BU32

A A

B B

C C

D D

VSS8

BU25

VSS9

BU21

VSS10

BU18

VSS11

BU14

VSS12

BU11

VSS13

BU7

VSS14

BP42

VSS15

BN64

VSS16

BN6

VSS17

BM70

VSS18

BM51

VSS19

BM44

VSS20

BM32

VSS21

BM24

VSS22

BM17

VSS23

BL57

VSS24

BL55

VSS25

BL48

VSS26

BL40

VSS27

BL28

VSS28

BL20

VSS29

BK63

VSS30

BK60

VSS31

BK53

VSS32

BK34

VSS33

BK10

VSS34

BJ64

VSS35

BJ21

VSS36

BJ9

VSS37

BJ1

VSS38

BH70

VSS39

BH57

VSS40

BH55

VSS41

BH47

VSS42

BH24

VSS43

BH20

VSS44

BH15

VSS45

BG51

VSS46

BG36

VSS47

BF62

VSS48

BF30

VSS49

BF13

VSS50

BF8

VSS51

BE70

VSS52

BE65

VSS53

BE9

VSS54

BE1

VSS55

BD57

VSS56

BD53

VSS57

BD50

VSS58

BD46

VSS59

BD42

VSS60

BD39

VSS61

BD14

VSS62

BB71

VSS63

BB62

VSS64

BB57

VSS65

BB53

VSS66

BB50

VSS67

BB46

VSS68

BB42

VSS69

BB39

VSS70

BB7

VSS71

BB1

VSS72

BA70

VSS73

AY71

VSS74

AY66

VSS75

AY62

VSS76

AY59

VSS77

AY55

VSS78

AY51

VSS79

AY48

VSS80

AR42

VSS140

AR39

VSS141

AR35

VSS142

AR33

VSS143

AR32

VSS144

AR30

VSS145

AR28

VSS146

AR26

VSS147

AR24

VSS148

AR23

VSS149

AR21

VSS150

AR19

VSS151

AR17

VSS152

AR15

VSS153

AR14

VSS154

AR4

VSS155

AR1

VSS156

AP70

VSS157

AP64

VSS158

AN62

VSS159

AN55

VSS160

AY44

VSS81

AY41

VSS82

AY37

VSS83

AY35

VSS84

AY33

VSS85

AY32

VSS86

AY30

VSS87

AY28

VSS88

AY26

VSS89

INTEL_AUBURNDALE_1288

VSS

1

VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220

AY24 AY23 AY21 AY19 AY17 AY15 AY14 AY12 AY8 AY4 AW67 AW62 AW59 AW55 AW51 AW48 AW44 AW41 AW37 AV9 AV1 AU70 AU62 AU57 AU53 AU50 AU46 AU42 AU39 AU35 AU33 AU32 AU30 AU28 AU26 AU24 AU23 AU21 AU19 AU17 AU15 AU14 AU4 AT64 AT10 AR62 AR57 AR53 AR50 AR46 AN51 AN48 AN44 AN41 AN37 AN5 AN4 AM64 AM8 AL62 AL55 AL51 AL48 AL44 AL41 AL37 AL35 AL33 AL1 AK70 AK64 AK55 AK51 AK48 AK44 AK41 AK37 AK32 AK30 AK28 AK26 AK24 AK23 AK21 AK19 AK17 AK15 AJ70 AH62 AH57 AH55 BV66 BV64 BT68 BR69 BR68 BR3 BN71 BN1 BL71 BL1 R14 H71 F71 E69 E68 A66 A64 E5 C68

U1J

AH53

VSS202

AH51

VSS203

AH50

VSS204

AH48

VSS205

AH46

VSS206

AH44

VSS207

AH42

VSS208

AH41

VSS209

AH39

VSS210

AH37

VSS211

AH35

VSS212

AH33

VSS213

AH32

VSS214

AH30

VSS215

AH28

VSS216

AH26

VSS217

AH24

VSS218

AH23

VSS219

AH21

VSS220

AH19

VSS221

AH17

VSS222

AH15

VSS223

AH4

VSS224

AG64

VSS225

AG9

VSS226

AG6

VSS227

AF69

VSS228

AF62

VSS229

AF1

VSS230

AE70

VSS231

AE64

VSS232

AD62

VSS233

AD57

VSS234

AD53

VSS235

AD50

VSS236

AD46

VSS237

AD42

VSS238

AD4

VSS239

AC67

VSS240

AC64

VSS241

AC10

VSS242

AC5

VSS243

AC1

VSS244

AB70

VSS245

AB62

VSS246

AB57

VSS247

AB53

VSS248

AB50

VSS249

AB46

VSS250

AB42

VSS251

AB39

VSS252

AB37

VSS253

AB35

VSS254

AB33

VSS255

AB32

VSS256

AB30

VSS257

AB28

VSS258

AB26

VSS259

AB24

VSS260

AB23

VSS261

AB21

VSS262

AB19

VSS263

AB17

VSS264

AB15

VSS265

AB14

VSS266

AB9

VSS267

AA66

VSS268

AA64

VSS269

AA62

VSS270

AA57

VSS271

AA53

VSS272

AA50

VSS273

AA46

VSS274

AA42

VSS275

AA39

VSS276

AA37

VSS277

AA35

VSS278

AA33

VSS279

AA32

VSS280

AA30

VSS281

AA28

VSS282

AA26

VSS283

AA24

VSS284

AA23

VSS285

AA21

VSS286

AA19

VSS287

F20

VSS374

F4

VSS375

E37

VSS376

E33

VSS377

E30

VSS378

E16

VSS379

E12

VSS380

D41

VSS381

D38

VSS382

D34

VSS383

D31

VSS384

D27

VSS385

D24

VSS386

D20

VSS387

D17

VSS388

D13

VSS389

D10

VSS390

D6

VSS391

B65

VSS392

B40

VSS415

INTEL_AUBURNDALE_1288

VSS

2

VSS404 VSS405 VSS406 VSS407 VSS408 VSS409 VSS410 VSS411 VSS412 VSS413 VSS393 VSS394 VSS395 VSS396 VSS397 VSS398 VSS399 VSS400 VSS401 VSS402 VSS403 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS301 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS312 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS323 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS334 VSS335 VSS336 VSS337 VSS338 VSS339 VSS340 VSS341 VSS342 VSS343 VSS344 VSS345 VSS346 VSS347 VSS348 VSS349 VSS350 VSS351 VSS352 VSS353 VSS354 VSS355 VSS356 VSS357 VSS358 VSS359 VSS360 VSS361 VSS362 VSS363 VSS364 VSS365 VSS366 VSS367 VSS368 VSS369 VSS370 VSS371 VSS372 VSS373

A40 A36 A33 A29 A26 A22 A19 A15 A12 A8 B62 B58 B55 B51 B48 B44 A59 A55 A52 A48 A45 AA17 AA15 AA14 AA4 W69 W62 W57 W53 W50 W46 W42 W6 W1 V70 U64 U62 U57 U53 U50 U46 U42 U39 U9 U4 T1 R70 R62 R57 R53 R50 R46 R42 R5 P4 N63 N57 N53 N50 N46 N30 N21 N15 M53 M42 M36 M1 L70 L57 L48 L47 L13 K64 K53 K43 K36 K34 K32 K25 K17 K11 K6 K4 J65 J57 J48 J47 J40 J9 H53 H43 H36 H1 G70 G57 G53 G48 G47 G43 G30 G24 G20 G15 F61 F48 F47 F28

+VCCP

1U_0402_6.3V6K

Add to follow design guide

1U_0402_6.3V6K

1

C189

C142

2

1U_0402_6.3V6K

1

C303

C304

2

1U_0402_6.3V6K

1

C510

2

1U_0402_6.3V6K

1

C619

2

1U_0402_6.3V6K

1

C509

2

1U_0402_6.3V6K

1

C618

2

1U_0402_6.3V6K

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1U_0402_6.3V6K

1

C191

2

1U_0402_6.3V6K

1

C302

2

1U_0402_6.3V6K

1

C508

2

1

C515

2

Issued Date

1U_0402_6.3V6K

1

C141

C190

2

1U_0402_6.3V6K

1

C306

C192

2

1U_0402_6.3V6K

1

C307

C512

2

1U_0402_6.3V6K

1

C513

2

1U_0402_6.3V6K

CPU CORE

+CPU_CORE

1

C201

2

1U_0402_6.3V6K

1

C305

2

1U_0402_6.3V6K

1

C511

2

1U_0402_6.3V6K

1

C628

C636

2

22U_0805_6.3V6M

C73

1

2

Inside cavity

330U_D2_2.5VM_R6M

C95

1

+

2

22U_0805_6.3V6M

C101

1

2

BGA Ball Cracking Prevention and Detection

VSS_NCTF1_R<5>

VSS_NCTF6_R<5> VSS_NCTF7_R<5>

Compal Secret Data

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

4

22U_0805_6.3V6M

C74

1

ULV@C74

ULV@

2

330U_D2_2.5VM_R6M

C96

1

+

ULV@

2

22U_0805_6.3V6M

C75

C76

1

2

330U_D2_2.5VM_R6M

C97

C98

1

+

2

22U_0805_6.3V6M

C77

1

2

22U_0805_6.3V6M

C78

1

2

22U_0805_6.3V6M

C79

1

2

Under cavity

22U_0805_6.3V6M

C102

C103

1

ULV@C102

ULV@

2

22U_0805_6.3V6M

C104

1

2

22U_0805_6.3V6M

C105

1

2

22U_0805_6.3V6M

C106

1

ULV@C106

ULV@

2

22U_0805_6.3V6M

C107

1

2

22U_0805_6.3V6M

1

2

Under cavity

+3VS

12

R80

CRACK_BGA

100K_0402_5%

3

Q3B

5

2N7002DW-T/R7_SOT363-6

4

+3VS +3VS

12

CRACK_BGA

R81

R81 100K_0402_5%

100K_0402_5%

61

Q4A

Q4A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

VSS_NCTF2_R<5>

Title

SCHEMATICS, MB A6161

Size Document Number Rev

Custom

401860

Date: Sheet

22U_0805_6.3V6M

C81

C80

1

2

22U_0805_6.3V6M

C109

C108

1

2

+3VS

12

R79

R79 100K_0402_5%

100K_0402_5%

61

Q3A

Q3A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

12

CRACK_BGA

R82

R82 100K_0402_5%

100K_0402_5%

3

Q4B

Q4B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

Compal Electronics, Inc.

5

22U_0805_6.3V6M

C82

1

ULV@C82

ULV@

2

C110

22U_0805_6.3V6M

C83

1

ULV@C83

ULV@

2

CRACK_BGA <16,28>

841Friday, October 29, 2010

22U_0805_6.3V6M

C84

1

ULV@C84

ULV@

2

of

D

1

2

3

4

5

DDR3 SO-DIMM A

+V_DDR_CPU_REF

0.1U_0402_16V4Z

2.2U_0805_16V4Z

C111

C112

1

2

A A

B B

C C

D D

C112

1

2

DDR_CKE0_DIMMA<6>

DDR_A_BS2<6>

M_CLK_DDR0<6> M_CLK_DDR#0<6>

DDR_A_BS0<6> DDR_A_WE#<6>

DDR_A_CAS#<6>

DDR_CS1_DIMMA#<6>

+3VS

1

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M C136

C136

1

2

DDR_A_D2 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D9

DDR_A_D11 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D8

DDR_A_D10 DDR_A_D17

DDR_A_D20 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D16

DDR_A_D23 DDR_A_D24

DDR_A_D31 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 M_CLK_DDR0

M_CLK_DDR#0 DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDR_CS1_DIMMA#

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D44 DDR_A_D45

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D50

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D54

DDR_A_D51 DDR_A_D56

DDR_A_D61 DDR_A_DM7 DDR_A_D62

DDR_A_D58

1 2

10K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z C137

C137

+1.5V +1.5V

3A@1.5V

JDIMM1

1

VREF_DQ

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DM0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

DQ16

41

DQ17

43

VSS

45

DQS2#

47

DQS2

49

VSS

51

DQ18

53

DQ19

55

VSS

57

DQ24

59

DQ25

61

VSS

63

DM3

65

VSS

67

DQ26

69

DQ27

71

VSS

73

CKE0

75

VDD

77

NC

79

BA2

81

VDD

83

A12/BC#

85

A9

87

VDD

89

A8

91

A5

93

VDD

95

A3

97

A1

99

VDD

101

CK0

103

CK0#

105

VDD

107

A10/AP

109

BA0

111

VDD

113

WE#

115

CAS#

117

VDD

119

A13

121

S1#

123

VDD

125

TEST

127

VSS

129

DQ32

131

DQ33

133

VSS

135

DQS4#

137

DQS4

139

VSS

141

DQ34

143

DQ35

145

VSS

147

DQ40

149

DQ41

151

VSS

153

DM5

155

VSS

157

DQ42

159

DQ43

161

VSS

163

DQ48

165

DQ49

167

VSS

169

DQS6#

171

DQS6

173

VSS

175

DQ50

177

DQ51

179

VSS

181

DQ56

183

DQ57

185

VSS

187

DM7

189

VSS

191

DQ58

193

R95

1 2

10K_0402_5%

R96

DQ59

195

VSS

197

SA0

199

VDDSPD

201

SA1

203

VTT

205

GND1

207

GND2

FOX_AS0A626-U4SN-7F~D

CONN@

DQS0#

DQS0

DQ12 DQ13

RESET#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3#

DQS3 DQ30

DQ31

CKE1

CK1#

RAS#

ODT0 ODT1

VREF_CA

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5#

DQS5 DQ46

DQ47 DQ52

DQ53

DQ54 DQ55

DQ60 DQ61

DQS7#

DQS7 DQ62

DQ63

EVENT#

BOSS1 BOSS2

2

VSS DQ4 DQ5 VSS

VSS DQ6 DQ7 VSS

VSS DM1

VSS

VSS DM2 VSS

VSS

VDD

A15 A14

VDD

A11

A7

VDD

A6 A4

VDD

A2

A0 VDD CK1

VDD BA1

VDD

S0#

VDD

NC VDD

VSS

VSS DM4 VSS

VSS

VSS DM6 VSS

VSS

VSS SDA

SCL VTT

4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206 208

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D4 DDR_A_D3

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DRAMRST#

DDR_A_D14 DDR_A_D15

DDR_A_D19 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D18 DDR_A_D25

DDR_A_D28 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D29

DDR_A_D30

DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_MA0 M_CLK_DDR1

M_CLK_DDR#1 DDR_A_BS1

DDR_A_RAS# DDR_CS0_DIMMA#

M_ODT0 M_ODT1

DDR_A_D36 DDR_A_D38

DDR_A_DM4 DDR_A_D37

DDR_A_D39 DDR_A_D41

DDR_A_D40 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D55

DDR_A_D53 DDR_A_DM6 DDR_A_D52

DDR_A_D48 DDR_A_D60

DDR_A_D57 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D59

DDR_A_D63 PM_EXTTS#1_R

SMB_DATA_S3 SMB_CLK_S3

0.65A@0.75V

2

+0.75VS

DRAMRST# <4>

DDR_CKE1_DIMMA <6>

M_CLK_DDR1 <6> M_CLK_DDR#1 <6>

DDR_A_BS1 <6> DDR_A_RAS# <6>

DDR_CS0_DIMMA# <6> M_ODT0 <6>

M_ODT1 <6>

2.2U_0805_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z C117

C117

C116

1

2

PM_EXTTS#1_R <4> SMB_DATA_S3 <10,12,22>

SMB_CLK_S3 <10,12,22>

DDR_A_D[0..63]<6> DDR_A_DM[0..7]<6> DDR_A_DQS[0..7]<6> DDR_A_DQS#[0..7]<6> DDR_A_MA[0..15]<6>

R94 0_0402_5%R94 0_0402_5%

1 2

+V_DDR_CPU_REF+VREF_CA

SMB_DATA_S3 SMB_CLK_S3

+1.5V

12

R83

1K_0402_1%

+V_DDR_CPU_REF

12

R86

1K_0402_1%

+3VS

@

0.1U_0402_16V4Z

@

R1495

R1495 10K_0402_5%

10K_0402_5%

U59

@ U59

@

1 2

1

SDA

2

SCL

3

T_CRIT_A

4

GND

NS_LM77CIMMX_3_MSOP8P

reserve for memory thermal sensor, HP.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

8

+VS

7

A0

6

A1

5

INT

2008/09/15 2009/09/03

0.1U_0402_16V4Z

1

2

PM_EXTTS#1_R

+3VS

C1338

@ R1496

@

1 2

@ R1497

@

1 2

Compal Secret Data

Deciphered Date

0_0402_5%

4

R1496

R1497

Layout Note: Place near JDIMM1

open

+1.5V

10U_0603_6.3V6M

C125

1

2

C132

1U_0402_6.3V6K

C132

1U_0402_6.3V6K

1

2

5

10U_0603_6.3V6M

1

2

C133

1U_0402_6.3V6K

1

2

C126

C134

1

2

10U_0603_6.3V6M

C121

C122

1

2

C122

1

2

Layout Note: Place near JDIMB1

1

2

Title

Size Document Number Rev

Custom

401860

Date: Sheet

10U_0603_6.3V6M

C124

C123

1

2

+0.75VS

10U_0603_6.3V6M

C131

1U_0402_6.3V6K

C131

1U_0402_6.3V6K

C1315

C1314

1

2

Compal Electronics, Inc.

SCHEMATICS, MB A6161

330U_B2_2.5VM_R15M

1

+

2

1U_0402_6.3V6K

C135

1

2

941Friday, October 29, 2010

of

C118

10U_0805_6.3V6M

D

1

A A

2

3

4

5

SCL SDA

VDD_REF

XTAL_IN

XTAL_OUT

VSS_REF

VDD_CPU

CPU_0

CPU_0#

VSS_CPU

CPU_1

CPU_1#

VDD_SRC

0.1U_0402_16V4Z

0.1U_0402_16V4Z C168

C168

C167

1

2

+3VS_CK505

32 31 30 29 28 27 26 25

24 23 22 21 20 19 18 17

1

2

SMB_CLK_S3 SMB_DATA_S3 REF_0/CPU_SEL

CLK_XTAL_IN CLK_XTAL_OUT

CK_PWRGD

R_CLK_BUF_BCLK CLK_BUF_BCLK R_CLK_BUF_BCLK#

+3VS_CK505_G +3VS +1.5VS

1 2

R143 0_0603_5%@R143 0_0603_5%@

1 2

R120 0_0603_5%R120 0_0603_5%

10U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z C164

C164

C169

1

2

R107 33_0402_5%R107 33_0402_5%

R110 0_0402_5%R110 0_0402_5% R112 0_0402_5%R112 0_0402_5%

+1.05VS_CK505 +3VS_CK505_G

install R120 for low power CLKGENEMI request, Compal SI, 1/19

1 2

1 2 1 2

1

2

CLK_14M_PCH

C163

10P_0402_50V8C@

CLK_BUF_BCLK#

SMB_CLK_S3 <9,12,22> SMB_DATA_S3 <9,12,22> CLK_14M_PCH <12>

CLK_BUF_BCLK <12> CLK_BUF_BCLK# <12>

CK_PWRGD

33P_0402_50V8J

C177

1 2

10K_0402_5%

61

Y114.318MHZ 16PF 7A14300083 Y114.318MHZ 16PF 7A14300083

2

1

R115

+3VS_CK505

Q7A

2

2N7002DW-7-F_SOT363-6

CLK_XTAL_OUT CLK_XTAL_IN

12

2

C178

33P_0402_50V8J

1

CLK_EN# <37>

+3VS_CK505_G

CLK_BUF_DOT96<12> CLK_BUF_DOT96#<12>

CLK_BUF_CKSSCD<12> CLK_BUF_CKSSCD#<12>

CLK_DMI<12> CLK_DMI#<12>

B B

CLK_BUF_DOT96 CLK_BUF_DOT96#

CLK_BUF_CKSSCD CLK_BUF_CKSSCD#

CLK_DMI CLK_DMI#

CPU_1PIN 30 CPU_0

(Default)

0 133MHz

1

+1.05VS_CK505+1.05VS

1 2

R118 0_0603_5%R118 0_0603_5%

C C

1

2

133MHz

100MHz 100MHz

Close to U6

10U_0805_10V4Z

C171

1

2

C172

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C173

C173

0.1U_0402_16V4Z

0.1U_0402_16V4Z C174

C174

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z C175

C175

1

2

+1.05VS

R1465 10K_0402_5%@R1465 10K_0402_5%@

R1466 10K_0402_5%R1466 10K_0402_5%

CPU_STOP#

47P_0402_50V8J

C176

R106 0_0402_5%R106 0_0402_5%

1 2

R108 0_0402_5%R108 0_0402_5%

1 2

+3VS_CK505

R109 0_0402_5%R109 0_0402_5%

1 2

R111 0_0402_5%R111 0_0402_5%

1 2

R113 0_0402_5%R113 0_0402_5%

1 2

R114 0_0402_5%R114 0_0402_5%

1 2

+1.05VS_CK505

1 2

10K_0402_5%

R116

L_CLK_BUF_DOT96 L_CLK_BUF_DOT96#

L_CLK_BUF_CKSSCD L_CLK_BUF_CKSSCD#

L_CLK_DMI L_CLK_DMI#

CPU_STOP#

REF_0/CPU_SEL

+3VS_CK505

FBMA-L11-160808-301LMA20T_0603~D

U6

1

VDD_DOT

2

VSS_DOT

3

DOT_96

4

DOT_96#

5

VDD_27

6

27MHZ

7

27MHZ_SS

8

VSS_27

9

VSS_SATA

10

SRC_1/SATA

11

SRC_1#/SATA#

12

VSS_SRC

13

SRC_2

14

SRC_2#

15

VDD_SRC_IO

16

CPU_STOP#

SLG8LV595VTR_QFN_32P_5X5

2nd Source : IDT ICS9LVS3197BKLFT MLF 32P REALTEK RTM890N-632-VB-GRT QFN 32P

R117

1 2

+3VS_CK505

+3VS

47P_0402_50V8J

C170

1

2

TGND

33

0.1U_0402_16V4Z

0.1U_0402_16V4Z C165

C165

1

2

REF_0/CPU_SEL

CKPWRGD/PD#

VDD_CPU_IO

Close to U6

0.1U_0402_16V4Z

0.1U_0402_16V4Z C166

C166

1

2

Close to U2 within 500mil

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

of

10 41Friday, October 29, 2010

of

10 41Friday, October 29, 2010

of

10 41Friday, October 29, 2010

D

1

PCH_RTCX1

1 2

R123 10M_0402_5%R123 10M_0402_5%

18P_0402_50V8J

1

C181

1 2

Y2

OSC4OSC

NC3NC

2

HDA_BIT_CLK_CODEC

HDA_SDOUT_CODEC

A A

2

@

C186 47P_0402_50V8J

@

C188 47P_0402_50V8J

for RF

B B

C C

1 2

R176 51_0402_5%R176 51_0402_5%

PCH_RTCX2

32.768KHZ_12.5PF_Q13MC14610002

1

C182

C182 18P_0402_50V8J

18P_0402_50V8J

2

for i-AMT setting. 11/20 HP

PCH_JTAG_TCK

+RTCVCC

HDA_BIT_CLK_CODEC<23> HDA_SYNC_CODEC<23> SB_SPKR<23> HDA_RST#_CODEC<23>

HDA_SDIN0<23>

HDA_SDOUT_CODEC<23>

1U_0603_10V4Z

1 2

R126 20K_0402_1%R126 20K_0402_1%

1 2

R127 20K_0402_1%R127 20K_0402_1%

1U_0603_10V4Z

KBC_SPI_CS0#_R<28> KBC_SPI_CS1#_R<28>

R158

@ R158

@

200_0402_5%

1 2

PCH_JTAG_TDI

12

R167

@ R167

@

100_0402_1%

C180

1

12

2

1

12

C183

2

R130 33_0402_5%R130 33_0402_5%

1 2

R132 33_0402_5%R132 33_0402_5%

1 2

R134 33_0402_5%R134 33_0402_5%

1 2

R137 33_0402_5%R137 33_0402_5%

1 2

+3VALW

11/20 HP

KBC_SPI_CLK_R<28>

KBC_SPI_SI_R<28>

+RTCVCC +3VS

CLRP1

SHORT PADS@

CLRP2

SHORT PADS@

1 2

R1457 1K_0402_5%R1457 1K_0402_5% R1461 100K_0402_5%R1461 100K_0402_5%

1 2

T147PAD T147PAD T148PAD T148PAD T149PAD T149PAD T150PAD T150PAD T121PAD T121PAD

1 2

R144 0_0402_5%R144 0_0402_5%

1 2

R148 0_0402_5%R148 0_0402_5%

KBC_SPI_SO<28>

12

R157

200_0402_5%@

PCH_JTAG_TDO

12

R166

100_0402_1%@

Pre-Production Units Production

Ref.PCH Pin

ES1 AllES2

R157

PCH_JTAG_TDO

D D

PCH_JTAG_TDI

PCH_JTAG_TMS

PCH_JTAG_TCK

1

R166

R158

R167

R156

R165

R176

Unstuff

200 ohm

100ohm

200 ohm

51 ohm 5%

200 ohm

100ohm

200 ohm

100ohm

200 ohm

100ohm

Unstuff

Unstuff100ohm

51 ohm 5%51 ohm 5%

2

1 2

R121 1M_0402_5%R121 1M_0402_5%

1 2

R124 330K_0402_5%R124 330K_0402_5%

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST# PCH_SRTCRST# SM_INTRUDER# PCH_INTVRMEN

HDA_BIT_CLK HDA_SYNC SB_SPKR HDA_RST#

HDA_SDIN0

HDA_SDOUT

PCH_GPIO33AQUAWHITE_BATLED

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

KBC_SPI_CS0# KBC_SPI_CS1#

+3VALW+3VALW+3VALW

12

R156

@ R156

@

200_0402_5%

PCH_JTAG_TMS

12

R165

@ R165

@

100_0402_1%

2

B13 D13

C14 D17 A16 A14

A30 D29

P1

C30

G30 F30 E32 F32

B29

H32 J30

M3 K3 K1

J2 J4

BA2 AV3 AY3

AY1 AV1

IBEXPEAK-M_FCBGA1071

SM_INTRUDER# SIRQ

U7A

RTCX1 RTCX2

RTCRST# SRTCRST# INTRUDER# INTVRMEN

HDA_BCLK HDA_SYNC SPKR HDA_RST#

HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33 HDA_DOCK_RST# / GPIO13

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_RST#

SPI_CLK SPI_CS0# SPI_CS1#

SPI_MOSI SPI_MISO

R122 10K_0402_5%R122 10K_0402_5%

1 2

R125 10K_0402_5%@R125 10K_0402_5%@

RTCIHDA

SPI JTAG

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP / GPIO21 SATA1GP / GPIO19

12

LDRQ0#

SERIRQ

D33 B33 C32 A32

C34 A34

F34 AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16 AF15

T3

Y9 V1

3

SB_SPKRPCH_INTVRMEN

R1460 10K_0402_5%R1460 10K_0402_5%

GPIO23 SIRQ

SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0

SATAICOMPIPCH_TRST#

R145 10K_0402_5%R145 10K_0402_5%

1 2

GPIO21 HDD_HALTLED

3

12

1 2

R142 37.4_0402_1%R142 37.4_0402_1%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC_LAD0 <27,28> LPC_LAD1 <27,28> LPC_LAD2 <27,28> LPC_LAD3 <27,28>

LPC_LFRAME# <27,28>

+3VS

SIRQ <27,28>

SATA_PRX_DTX_N0 <19> SATA_PRX_DTX_P0 <19> SATA_PTX_DRX_N0 <19> SATA_PTX_DRX_P0 <19>

+1.05VS

+3VS

SATA_LED# <20>

HDD_HALTLED <20>

4

11/20 HP

+RTCVCC +VREG_51125

R234 0_0402_5%R234 0_0402_5%

1 2

1

C210

C210 1U_0603_10V4Z

1U_0603_10V4Z

2

+3VS

R147

R147 10K_0402_5%

10K_0402_5%

1 2

GPIO21

iAMT setting

Compal Secret Data

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

4

D36

1

CHN202UPT_SC-70

AQUAWHITE_BATLED#<25,28>

5

JBATT1

R261

3 2

R261 1K_0402_5%

1K_0402_5%

RTC1 RTC2

1 2

W=20mils

L

for i-AMT setting. 11/20 HP

R1459

330K_0402_5% @

1 2

2

+-

+3VS

R1458

@ R1458

@

10K_0402_5%

1 2

AQUAWHITE_BATLED

61

Q86A

Q86A 2N7002DWH 2N SOT363-6

2N7002DWH 2N SOT363-6

1

+

LOTES_AAA-BAT-019-K01_2P

CONN@

GPIO33 iAMT Enable /Disable

Hi

Enable (Default)

DisableLo

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

11 41Friday, October 29, 2010

2

-

D

of

1

A A

change from poert2 to port4. 11/20 HP

PCIE_PRX_DTX_N4<22> PCIE_PRX_DTX_P4<22>

WLAN

GLAN

WWAN

B B

11/21 HP

12/05 HP

WWAN

C C

WLAN

PCIE_PTX_C_DRX_N4<22> PCIE_PTX_C_DRX_P4<22>

PCIE_PRX_DTX_N6<21> PCIE_PRX_DTX_P6<21> PCIE_PTX_C_DRX_N6<21> PCIE_PTX_C_DRX_P6<21>

PCIE_PRX_DTX_N7<22> PCIE_PRX_DTX_P7<22> PCIE_PTX_C_DRX_N7<22> PCIE_PTX_C_DRX_P7<22>

+3VS

CLK_PCIE_MCARD2#<22> CLK_PCIE_MCARD2<22>

CLKREQ_WWAN#<22>

CLK_PCIE_MCARD#<22> CLK_PCIE_MCARD<22>

CLKREQ_WLAN#<22>

C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z

1 2

C194 0.1U_0402_16V4ZC194 0.1U_0402_16V4Z

1 2

C197 0.1U_0402_16V4ZC197 0.1U_0402_16V4Z

1 2

C198 0.1U_0402_16V4ZC198 0.1U_0402_16V4Z

1 2

C1301 0.1U_0402_16V4ZC1301 0.1U_0402_16V4Z

1 2

C1302 0.1U_0402_16V4ZC1302 0.1U_0402_16V4Z

1 2

+3VALW

R200 10K_0402_5%R200 10K_0402_5%

R202 10K_0402_5%R202 10K_0402_5%

+3VS

R205 10K_0402_5%R205 10K_0402_5%

1 2

R1479 0_0402_5%R1479 0_0402_5%

1 2

R1480 0_0402_5%R1480 0_0402_5%

1 2

R208 0_0402_5%R208 0_0402_5%

1 2

R209 0_0402_5%R209 0_0402_5%

1 2

+3VALW

R213 10K_0402_5%R213 10K_0402_5%

R701 10K_0402_5%R701 10K_0402_5%

1 2

PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4

PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 PCIE_PTX_DRX_N6 PCIE_PTX_DRX_P6

PCIE_PRX_DTX_N7 PCIE_PRX_DTX_P7 PCIE_PTX_DRX_N7 PCIE_PTX_DRX_P7

CLK_PCIE_MCARD2#_R CLK_PCIE_MCARD2_R

CLK_PCIE_MCARD#_R CLK_PCIE_MCARD_R

2

U7B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IBEXPEAK-M_FCBGA1071

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ# / GPIO47

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

B9 H14 C8

J14 C6 G8

M14 E10 G12

T13 T11 T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

LID_SW_PCH# SMBCLK SMBDATA

SML0ALERT# SML0CLK SML0DATA

SML1ALERT# SML1CLK SML1DATA

R1462 10K_0402_5%R1462 10K_0402_5%

1 2

R_CLK_EXP#

R195 0_0402_5%R195 0_0402_5%

R_CLK_EXP

R196 0_0402_5%R196 0_0402_5%

R_CLK_DP#

R197 0_0402_5%R197 0_0402_5%

R_CLK_DP

R198 0_0402_5%R198 0_0402_5%

XTAL25_IN XTAL25_OUT

XCLK_RCOMP

R211 90.9_0402_1%R211 90.9_0402_1%

3

1 2 1 2

1 2

T55 PADT55 PAD

T56 PADT56 PAD

T139 PADT139 PAD

T140 PADT140 PAD

11/20 HP

CLK_DMI# <10> CLK_DMI <10>

CLK_BUF_BCLK# <10> CLK_BUF_BCLK <10>

CLK_BUF_DOT96# <10> CLK_BUF_DOT96 <10>

CLK_BUF_CKSSCD# <10> CLK_BUF_CKSSCD <10>

CLK_14M_PCH <10>

CLK_PCI_FB <14>

CLK_EXP# <4> CLK_EXP <4>

CLK_DP# <4> CLK_DP <4>

+1.05VS

4

R183 10K_0402_5%R183 10K_0402_5%

SMB_DATA_S3

SMBCLK

SMBDATA SMB_DATA_S3

SML1CLK

SML1DATA

1 2

R185 10K_0402_5%R185 10K_0402_5%

1 2

Q8A

2N7002DW-T/R7_SOT363-6

6 1

+3VS

2 5

3

2N7002DW-T/R7_SOT363-6

Q8B

Q2A

2N7002DW-T/R7_SOT363-6

+3VALW

4

2N7002DW-T/R7_SOT363-6

XTAL25_IN XTAL25_OUT

SMB_CLK_S3

4

R263

1 2

61

0_0402_5%

2 5

R264

1 2

3

0_0402_5%

Q2B

1 2

R210 1M_0402_5%R210 1M_0402_5%

1 2

25MHZ_20PF_7A25000012

C199

1

18P_0402_50V8J

2

SMBCLKSMB_CLK_S3

+3VS

SMBDATA SML0CLK SML0DATA SML1CLK SML1DATA SML0ALERT#

SML1ALERT#

LID_SW_PCH#

SMB_CLK_S3 <9,10,22>

SMB_DATA_S3 <9,10,22>

CAP_CLK <28>

CAP_DAT <28>

Y3

C200

1

18P_0402_50V8J

2

1 2

R184 2.2K_0402_5%R184 2.2K_0402_5%

1 2

R186 2.2K_0402_5%R186 2.2K_0402_5%

1 2

R187 2.2K_0402_5%R187 2.2K_0402_5%

1 2

R188 2.2K_0402_5%R188 2.2K_0402_5%

1 2

R189 2.2K_0402_5%R189 2.2K_0402_5%

1 2

R191 2.2K_0402_5%R191 2.2K_0402_5%

R192 10K_0402_5%R192 10K_0402_5%

1 2

R194 10K_0402_5%R194 10K_0402_5%

1 2

R199 10K_0402_5%R199 10K_0402_5%

1 2

+3VL

5.1K_0402_5%

R695

1 2

R694

1 2

5.1K_0402_5%

5

+3VALW

CAP_CLK CAP_DAT

D D

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

4

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

5

12 41Friday, October 29, 2010

of

D

5

U7C

DMI_CTX_PRX_N0<5> DMI_CTX_PRX_N1<5> DMI_CTX_PRX_N2<5> DMI_CTX_PRX_N3<5>

DMI_CTX_PRX_P0<5> DMI_CTX_PRX_P1<5> DMI_CTX_PRX_P2<5>

D D

PGD_IN<28,37>

C C

11/20 HP

DMI_CTX_PRX_P3<5> DMI_CRX_PTX_N0<5>

DMI_CRX_PTX_N1<5> DMI_CRX_PTX_N2<5> DMI_CRX_PTX_N3<5>

DMI_CRX_PTX_P0<5> DMI_CRX_PTX_P1<5> DMI_CRX_PTX_P2<5> DMI_CRX_PTX_P3<5>

+1.05VS

1 2

R220 49.9_0402_1%R220 49.9_0402_1%

XDP_DBRESET#<4>

VGATE<37>

R408 1K_0402_5%R408 1K_0402_5%

1 2

PM_DRAM_PWRGD<4> RPGOOD<33>

PM_RSMRST#<28>

+3VALW

SUS_PWR_ACK<28> PM_PWRBTN#_R<4>

ON/OFFBTN#<25,28>

AC_PRESENT<28>

DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3

DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3

DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3

DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3

DMI_IRCOMP

SYS_RST#

1 2

R223 0_0402_5%R223 0_0402_5%

VGATE

1 2

PM_DRAM_PWRGD

1 2 1 2

1 2

M_PWROK

AUXPWROK

10K_0402_5%

LOW_BAT_R

IBEX_R#

1 2

R224 0_0402_5%R224 0_0402_5%

R225 10K_0402_5%R225 10K_0402_5%

R228 0_0402_5%R228 0_0402_5%

R229 10K_0402_5%R229 10K_0402_5% R1467

R1467

R231 0_0402_5%R231 0_0402_5%

U7C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IBEXPEAK-M_FCBGA1071

4

FDI_CTX_PRX_N0

BA18

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

System Power Management

PMSYNCH

SLP_LAN#

TP23

BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7

FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

PCIE_WAKE#

PM_CLKRUN#

SUS_CLK

SLP_S5#

SLP_LAN#

FDI_CTX_PRX_N0 <5> FDI_CTX_PRX_N1 <5> FDI_CTX_PRX_N2 <5> FDI_CTX_PRX_N3 <5> FDI_CTX_PRX_N4 <5> FDI_CTX_PRX_N5 <5> FDI_CTX_PRX_N6 <5> FDI_CTX_PRX_N7 <5>

FDI_CTX_PRX_P0 <5> FDI_CTX_PRX_P1 <5> FDI_CTX_PRX_P2 <5> FDI_CTX_PRX_P3 <5> FDI_CTX_PRX_P4 <5> FDI_CTX_PRX_P5 <5> FDI_CTX_PRX_P6 <5> FDI_CTX_PRX_P7 <5>

FDI_INT <5> FDI_FSYNC0 <5> FDI_FSYNC1 <5> FDI_LSYNC0 <5> FDI_LSYNC1 <5>

PCIE_WAKE# <21,22>

PM_CLKRUN# <28>

T144 PADT144 PAD

T58 PADT58 PAD

SLP_S4# <30,36>

SLP_S3# <21,23,28,29,30,32,34,35>

H_PM_SYNC <4>

3

ENABLT<18> ENAVDD<18>

INV_PWM<18>

DDC2_CLK<18>

+3VS

DDC2_DATA<18>

1 2 1 2

R773 2.37K_0402_1%R773 2.37K_0402_1%

1 2

Close PCH and mini space 20mil

LVDS_ACLKN<18> LVDS_ACLKP<18>

LVDS_A0N<18> LVDS_A1N<18> LVDS_A2N<18>

LVDS_A0P<18> LVDS_A1P<18> LVDS_A2P<18>

3VDDCCL<19> 3VDDCDA<19>

M_BLUE M_GREEN M_RED

delete R84, R66,R67 11/20 HP

3VDDCCL 3VDDCDA

CRT_HSYNC CRT_VSYNC

1K_0402_0.5%

M_BLUE<19> M_GREEN<19> M_RED<19>

CRT_HSYNC<19> CRT_VSYNC<19>

DDC2_CLK DDC2_DATA

R771 10K_0402_5%R771 10K_0402_5% R772 10K_0402_5%R772 10K_0402_5%

T57PAD T57PAD

DAC_IREF

R232

U7D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M_FCBGA1071

2

SDVO_INTN

SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN

DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_AUXN

DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

R226

2.2K_0402_5%

R226

2.2K_0402_5%

R227

2.2K_0402_5%

R227

2.2K_0402_5%

DPD_AUX# DPD_AUX

DPD_TXN0 DPD_TXP0 DPD_TXN1 DPD_TXP1 DPD_TXN2 DPD_TXP2 DPD_TXN3 DPD_TXP3

DPD_HPD

R235 100K_0402_5%R235 100K_0402_5%

1 2

1

SDVO

Display Port B

Display Port C

+3VS

DPD_CTRLCLK <17>

DPD_CTRLDATA <17>

DPD_AUX# <17> DPD_AUX <17> DPD_HPD <17>

DPD_TXN0 <17> DPD_TXP0 <17> DPD_TXN1 <17> DPD_TXP1 <17> DPD_TXN2 <17> DPD_TXP2 <17> DPD_TXN3 <17> DPD_TXP3 <17>

VGATE

B B

A A

5

PM_CLKRUN#

SYS_RST# LOW_BAT_R SLP_LAN# IBEX_R# PCIE_WAKE# AC_PRESENT

1 2

R237 10K_0402_5%R237 10K_0402_5%

1 2

R238 10K_0402_5%@R238 10K_0402_5%@

1 2

R239 10K_0402_5%R239 10K_0402_5%

1 2

R241 10K_0402_5%@R241 10K_0402_5%@

1 2

R243 10K_0402_5%R243 10K_0402_5%

1 2

R245 1K_0402_5%R245 1K_0402_5%

1 2

R246 10K_0402_5%R246 10K_0402_5%

+3VS

+3VALW

SLP_S3# SLP_S4# SLP_S5#

1 2

R236 10K_0402_5%R236 10K_0402_5%

1 2

R240 10K_0402_5%@R240 10K_0402_5%@

1 2

R242 10K_0402_5%@R242 10K_0402_5%@

1 2

R244 10K_0402_5%@R244 10K_0402_5%@

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/09/15 2009/09/03

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS, MB A6161

401860

1

13 41Friday, October 29, 2010

of

D