COMPAL LA-6132P Schematics

COMPAL CONFIDENTIAL

MODEL NAME :

1 1

PCB NO : BOM P/N :

LA-6132P ( DA80000I500) DAZ0DD00200 43185331L01 (K325)

NLM01

43185331L02 (K125) 43185331L03 (V105)

M10 Andros

AMD ASB2/ RS880M / SB820M

2 2

2010-05-11

REV : 1.0(A00)

@ : Nopop Component

3 3

WWAN@: WWAN function NONWWAN@: NON WWAN function CONN@: Connector only

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-6132P

145Tuesday, May 11, 2010

1.0

Thermal Sensor

EMC1402 x 2

1 1

2 2

(CPU/NB)

Page 8/13 Page 16 Page 18

GPP PCIE0

LAN Atheros AR8132

RJ45 conn.

Page 20

DC/DC

3 3

(Power Control)

Clock Generator

Page 20

Page 30

SB820M Internal CKG

LVDS conn.

HDMI conn.

CRT conn.

Mini Card

WLAN WWAN

Power Button

Spread Spectrum

ECS2P8211

Page 27

Page 22

Page 24

GPP PCIE1 GPP PCIE2

LVDS

TMDS

VGA

PCI Express

Mini Card

Page 28 Page 28

Sub/B

LPC BUS

AMD ASB2

K325 / 2C / 1.3G / 2M K125 / 1C / 1.7G / 1M

Page 6,7,8,9

Hyper Transport Link

HT3 16x16 1.0GHz up to 1.6GHz

AMD-RS880M

BGA 528

Page 12,13,14,15

A-Link Express

4 x PCIE

AMD-SB820M

BGA 605

Page 16,17,18,19

DDR3 BUS

SidePort

USB2.0

DDR3-SO-DIMM X2

DDR3 64x16Mb 128MB LFB

USB port2

USB port0,1

USB port4

USB port5

USB port6

USB port8

USB port9

Page 10, 11

Dual Channel DDRIII 800MHz

Page 14

USB conn.

USB conn. x 2

Sub/B & Page 23

Mini Card WLAN

Mini Card WWAN

Bluetooth conn.

CardBus Realtek RTS5138

Camera

Page 33

Page 28

Page 21

Page 27

SIM conn.

Page 28

3 in 1 conn.

Page 21

Power Circuit

+3VALW / +5VALW +1.1VALW +0.75VS +1.5V +1.8V +2.5VDDA / +CPU_VDDR +CPU_CORE / +VDDNB +NB_CORE

Page 36~43

4 4

BATT IN &OTP

Page 33

DC IN & DECTOR

Page 34

CHARGER

Page 35

ENE KB926

T/P conn.

Page 31

Page 26

AZ-Audio I/F

Int. KBD

Page 26

SPI ROM

Page 31

CODEC Realtek ALC259

Sub/B

Audio Jack x 2

Digital MIC

Sub/B

Camera side

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

Block Diagram LA-6132P

LA-6132P

245Monday, May 03, 2010

1.0

SB820M

POWER STATES

State

D D

S0 (Full ON) / M0

S3 (Suspend to RAM) / M1

S4 (Suspend to DISK) / M1 ON ON ONOFF

S5 (SOFT OFF) / M1 ON ON ONOFFLOW LOW HIGHLOW

S3 (Suspend to RAM) / M-OFF

S4 (Suspend to DISK) / M-OFF

S5 (SOFT OFF) / M-OFF

Signal

SLP

S3#

S4#

HIGH HIGH HIGH

HIGH

LOW HIGH HIGH HIGH ON ON ON ONOFF

LOW

LOW HIGH HIGHLOW

LOW

LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF

LOW LOW LOW LOW ON OFF OFF OFF OFF

LOW LOW LOW LOW LOW ON OFF OFF OFF OFF

SLP S5#

HIGH

S4 STATE#

SLP M#

HIGH

ALWAYS PLANE

M PLANE

SUS

RUN

PLANE

ON ON ON

OFF

CLOCKS

USB PORT#

0 1 2 3 4 5 6 7

DESTINATION USB (Right) USB (Right) USB (Left)

None

MINI CARD - WLAN MINI CARD - WWAN Bloetooth

None

Card Reader8

C C

PM TABLE

State

power plane

B+ +5VALW +3VALW +1.1VALW

+1.5V

+5VS +3VS +1.8VS +1.5VS +1.1VS +0.75VS +2.5VDDA +CPU_VDDR +NB_CORE +CPU_CORE +VDDNB

11 12 13

Camera

None10 None None None

RS880M

B B

S5 S4/AC

S5 S4/AC don't exist

ON ON

OFF

OFFOFF

OFFON

OFF

PCIE Lane 1 Lane 2 Lane 3 Lane 4 Lane 5

DESTINATION 10 / 100 LAN MINI CARD - WLAN MINI CARD - WWAN None None

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Index and Config.

LA-6132P

345Monday, May 03, 2010

1.0

ADAPTER

EN_INVPWR

INVPWR_B+SI3457

(QV6)

D D

VR_ON

ISL6265

+CPU_CORE

(PU14)

BATTERY

+PWR_SRC

+VDDNB

CHARGER

TPS51427

(PU2)

MAINPWON

C C

TPS51218

(PU15)

TPS2062

(UI13)

+5VALW

TPS2062

(UI14)

TPS2062

(UI15)

NTMS4920

(QZ3)

TPS51218

(PU10)

TPS51218

(PU7)

+3VALW

NTMS4920

(QZ8)

SI3456DY

(QZ11)

APL5912

(PU11)

SUSP#

B B

+NB_CORE

A A

USB_EN#

+USB_VCCA

+5V_ESAUSB

USB_PWR_EN#

USB_EN#

+USB_SIDE _PWR

CAM_ON/OFF#

SUSP

+5VS

SI2301 (QO4)

+5VS_CAM

SYSON

+1.5V

SI4634DY

(QZ12)

SUSP

+1.5VS

APL5912

(PU12)

SUSP#

+CPU_VDDR

(0.9V)

APL5331

(PU8)

SUSP

+0.75VS

POK

+1.1VALW

SI4634DY

(QZ15)

SUSP

+1.1VS

SUSP

+3VS

APL5508

(PU13)

+2.5VDDA

EN_WOL#

+3V_LAN

AO3413

(QV8)

ENVDD LCD_VCC_TEST_EN

+LCD_VDD

SUSP#

+1.8VS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Power Rail

Power Rail LA-6132P

LA-6132P

445Monday, May 03, 2010

1.0

D D

AN4

ASB2

AN5

CPU_SIC CPU_SID

2.2K

+1.5V

+3VS

MMBT3904 MMBT3904

UT5 @

(CPU_Thermal)

SMBUS Address [TBD]

2.2K

AD22

MEM_SMBCLK

AE22

C C

MEM_SMBDATA

10K

+3VALW

10K

SB_SMB_CLK1

SB 820M

SB_SMB_DAT1

10K

+3VALW

10K

D25

SB_SMB_CLK2

F23

SB_SMB_DAT2

+1.5V

202 200

8 7

JDIMMA

JDIMMB

UT7 (NB_Thermal)

SMBUS Address [TBD]

B26

SB_SMB_CLK3

F26

B B

SB_SMB_DAT3

0R @ 0R @

4.7K

EC_SMB_CK1

EC_SMB_DA1

KB 926

EC_SMB_CK2

EC_SMB_DA2

A A

100R 100R

2.2K @

+5VALW

PJBATT

(BattERy conn)

+3VALW +3VS

2.2K

SMBUS Address [TBD]

0R @ 0R @

WWAN_SMB_CK_R WWAN_SMB_DA_R

LAN_SMB_CK_R LAN_SMB_DA_R

30 32

JWLAN1

JWWAN1

UL10 (LAN)

SMBUS Address [TBD]

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

SMBus Topology

LA-6132P

545Monday, May 03, 2010

1.0

D D

C C

B B

UU1A

K325@

UU1A

K325@

H_CADIP0<12> H_CADIN0<12> H_CADIP1<12> H_CADIN1<12> H_CADIP2<12> H_CADIN2<12> H_CADIP3<12> H_CADIN3<12> H_CADIP4<12> H_CADIN4<12> H_CADIP5<12> H_CADIN5<12> H_CADIP6<12> H_CADIN6<12> H_CADIP7<12> H_CADIN7<12> H_CADIP8<12> H_CADIN8<12> H_CADIP9<12> H_CADIN9<12> H_CADIP10<12> H_CADIN10<12> H_CADIP11<12> H_CADIN11<12> H_CADIP12<12> H_CADIN12<12> H_CADIP13<12> H_CADIN13<12> H_CADIP14<12> H_CADIN14<12> H_CADIP15<12> H_CADIN15<12>

H_CLKIP0<12> H_CLKIN0<12> H_CLKIP1<12> H_CLKIN1<12>

H_CTLIP0<12> H_CTLIN0<12> H_CTLIP1<12> H_CTLIN1<12>

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP0 H_CLKIN0 H_CLKIP1 H_CLKIN1

H_CTLIP0 H_CTLIN0 H_CTLIP1 H_CTLIN1

H2 H1 K2 K1 K3

K4 M2 M1

J6 J5 L6

L5 P6 P5 R7 R6 U6 U5

W7 W6

M3 M4 M8 M7

V2 V1 Y6 Y5

ASB2_BGA812

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12

HT LINK

L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

H_CADOP0

AK1

H_CADON0

AK2

H_CADOP1

AF4

H_CADON1

AF3

H_CADOP2

AF1

H_CADON2

AF2

H_CADOP3

AD4

H_CADON3

AD3

H_CADOP4

AB4

H_CADON4

AB3

H_CADOP5

AB1

H_CADON5

AB2

H_CADOP6

H_CADON6

H_CADOP7

H_CADON7

H_CADOP8

AH1

H_CADON8

AH2

H_CADOP9

AK3

H_CADON9

AK4

H_CADOP10

AH3

H_CADON10

AH4

H_CADOP11

AE9

H_CADON11

AE8

H_CADOP12

AE6

H_CADON12

AE5

H_CADOP13

AC7

H_CADON13

AC6

H_CADOP14

AB9

H_CADON14

AB8

H_CADOP15

AB6

H_CADON15

AB5

H_CLKOP0

AD1

H_CLKON0

AD2

H_CLKOP1

AF6

H_CLKON1

AF5

H_CTLOP0

H_CTLON0

H_CTLOP1

H_CTLON1

H_CADOP0 <12> H_CADON0 <12> H_CADOP1 <12> H_CADON1 <12> H_CADOP2 <12> H_CADON2 <12> H_CADOP3 <12> H_CADON3 <12> H_CADOP4 <12> H_CADON4 <12> H_CADOP5 <12> H_CADON5 <12> H_CADOP6 <12> H_CADON6 <12> H_CADOP7 <12> H_CADON7 <12> H_CADOP8 <12> H_CADON8 <12> H_CADOP9 <12> H_CADON9 <12> H_CADOP10 <12> H_CADON10 <12> H_CADOP11 <12> H_CADON11 <12> H_CADOP12 <12> H_CADON12 <12> H_CADOP13 <12> H_CADON13 <12> H_CADOP14 <12> H_CADON14 <12> H_CADOP15 <12> H_CADON15 <12>

H_CLKOP0 <12> H_CLKON0 <12> H_CLKOP1 <12> H_CLKON1 <12>

H_CTLOP0 <12> H_CTLON0 <12> H_CTLOP1 <12> H_CTLON1 <12>

UU1

V105@UU1

K125@UU1

K125@

ASB2_BGA812

V105@UU1

ASB2_BGA812

SA00003RI0L SA00003TL0L

V105 PART NO. need apply again

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ASB2 HT I/F & FAN

LA-6132P

645Tuesday, May 04, 2010

1.0

UU1B

K325@

UU1B

K325@

DDR_A_MA0<10> DDR_A_MA1<10> DDR_A_MA2<10> DDR_A_MA3<10> DDR_A_MA4<10> DDR_A_MA5<10> DDR_A_MA6<10>

D D

C C

B B

A A

DDR_A_MA7<10> DDR_A_MA8<10> DDR_A_MA9<10> DDR_A_MA10<10> DDR_A_MA11<10> DDR_A_MA12<10> DDR_A_MA13<10> DDR_A_MA14<10> DDR_A_MA15<10>

DDR_A_BS0<10> DDR_A_BS1<10> DDR_A_BS2<10>

DDR_A_DQS0<10> DDR_A_DQS#0<10> DDR_A_DQS1<10> DDR_A_DQS#1<10> DDR_A_DQS2<10> DDR_A_DQS#2<10> DDR_A_DQS3<10> DDR_A_DQS#3<10> DDR_A_DQS4<10> DDR_A_DQS#4<10> DDR_A_DQS5<10> DDR_A_DQS#5<10> DDR_A_DQS6<10> DDR_A_DQS#6<10> DDR_A_DQS7<10> DDR_A_DQS#7<10>

M_CLK_DDR1<10> M_CLK_DDR#1<10> M_CLK_DDR0<10> M_CLK_DDR#0<10>

DDR_CKE0_DIMMA<10> DDR_CKE1_DIMMA<10>

M_ODT0<10> M_ODT1<10>

DDR_CS0_DIMMA#<10> DDR_CS1_DIMMA#<10>

DDR_A_RAS#<10> DDR_A_CAS#<10> DDR_A_WE#<10>

DDR_A_RST#<10>

DDR_A_EVENT#<10>

CPU_MEMHOT#<18>

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS0 DDR_A_BS1 DDR_A_BS2

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

M_CLK_DDR1 M_CLK_DDR#1 M_CLK_DDR0 M_CLK_DDR#0

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

M_ODT0 M_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_RST# DDR_A_EVENT#

AC26

W29

AB29

Y30

U27

V30 U28 R27 R26

P27

AC28

T30

P28

AG28

M29

P30

AE28 AC29

R29

H27 H29

L29

L28

F29 G29

J29

K30

E12

F12 G17 H17

E25

F25

E28

F28

AG26 AH26 AH22 AG22 AG15 AH15

AJ11

AK12

J27 J26

E20

E19 D18

F19

P26 M26 W27 W26

AB27 AB26

Y28

Y27

AH17 AG17 AK18

AJ17

M28 M30

AG29

AJ30

AF27

AJ29

AF29 AH30 AE29 AH29

AC27 AF30 AE27

L27 M32

RU64

2.2K_0402_5%

QU6

MMBT3904_NL_SOT23-3

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_CHECK0 MA_CHECK1 MA_CHECK2 MA_CHECK3 MA_CHECK4 MA_CHECK5 MA_CHECK6 MA_CHECK7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 MA_DQS_H8 MA_DQS_L8

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3 MA_CLK_H4 MA_CLK_L4 MA_CLK_H5 MA_CLK_L5 MA_CLK_H6 MA_CLK_L6 MA_CLK_H7 MA_CLK_L7

MA_CKE0 MA_CKE1

MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_RAS_L MA_CAS_L MA_WE_L

MA_RESET_L FREE|MA_EVENT_L

ASB2_BGA812

+1.5V +1.5V

DDRIII CHANNEL A

RU65

2.2K_0402_5%

QU7

MMBT3904_NL_SOT23-3

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 MA_DM8

RU66

2.2K_0402_5%

MMBT3904_NL_SOT23-3

QU8

+3VS

F11 E11 E14 E15 H12 G12 H14 H15 E17 D16 F22 D20 F15 G15 G20 G22 G23 D22 G26 F26 E22 H22 D24 H25 H26 F27 E29 F30 E26 D26 G28 D28 AJ28 AJ26 AG25 AJ25 AK30 AH27 AF25 AF23 AG23 AJ23 AF20 AF19 AK24 AF22 AJ20 AG20 AG19 AF17 AG14 AF14 AK20 AH19 AF15 AK14 AH12 AG12 AF12 AF11 AJ14 AJ12 AH11 AG11

G14 H19 E23 E27 AJ27 AK22 AK16 AL12 H30

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_EVENT#

DDR_B_EVENT#

SB_MEMHOT#

Processor DDR3 Memory Interface

DDR_A_D0 <10> DDR_A_D1 <10> DDR_A_D2 <10> DDR_A_D3 <10> DDR_A_D4 <10> DDR_A_D5 <10> DDR_A_D6 <10> DDR_A_D7 <10> DDR_A_D8 <10> DDR_A_D9 <10> DDR_A_D10 <10> DDR_A_D11 <10> DDR_A_D12 <10> DDR_A_D13 <10> DDR_A_D14 <10> DDR_A_D15 <10> DDR_A_D16 <10> DDR_A_D17 <10> DDR_A_D18 <10> DDR_A_D19 <10> DDR_A_D20 <10> DDR_A_D21 <10> DDR_A_D22 <10> DDR_A_D23 <10> DDR_A_D24 <10> DDR_A_D25 <10> DDR_A_D26 <10> DDR_A_D27 <10> DDR_A_D28 <10> DDR_A_D29 <10> DDR_A_D30 <10> DDR_A_D31 <10> DDR_A_D32 <10> DDR_A_D33 <10> DDR_A_D34 <10> DDR_A_D35 <10> DDR_A_D36 <10> DDR_A_D37 <10> DDR_A_D38 <10> DDR_A_D39 <10> DDR_A_D40 <10> DDR_A_D41 <10> DDR_A_D42 <10> DDR_A_D43 <10> DDR_A_D44 <10> DDR_A_D45 <10> DDR_A_D46 <10> DDR_A_D47 <10> DDR_A_D48 <10> DDR_A_D49 <10> DDR_A_D50 <10> DDR_A_D51 <10> DDR_A_D52 <10> DDR_A_D53 <10> DDR_A_D54 <10> DDR_A_D55 <10> DDR_A_D56 <10> DDR_A_D57 <10> DDR_A_D58 <10> DDR_A_D59 <10> DDR_A_D60 <10> DDR_A_D61 <10> DDR_A_D62 <10> DDR_A_D63 <10>

DDR_A_DM0 <10> DDR_A_DM1 <10> DDR_A_DM2 <10> DDR_A_DM3 <10> DDR_A_DM4 <10> DDR_A_DM5 <10> DDR_A_DM6 <10> DDR_A_DM7 <10>

DDR_A_EVENT# DDR_B_EVENT#

SB_MEMHOT#

RU1 1K_0402_5%RU1 1K_0402_5% RU2 1K_0402_5%RU2 1K_0402_5%

RU68 2.2K_0402_5%RU68 2.2K_0402_5%

DDR_A_EVENT# <10>

DDR_B_EVENT# <11>

SB_MEMHOT# <16>

12 12

+1.5V

+3VS

UU1C

K325@

UU1C

K325@

DDR_B_MA0<11> DDR_B_MA1<11> DDR_B_MA2<11> DDR_B_MA3<11> DDR_B_MA4<11> DDR_B_MA5<11> DDR_B_MA6<11> DDR_B_MA7<11> DDR_B_MA8<11> DDR_B_MA9<11> DDR_B_MA10<11> DDR_B_MA11<11> DDR_B_MA12<11> DDR_B_MA13<11> DDR_B_MA14<11> DDR_B_MA15<11>

DDR_B_BS0<11> DDR_B_BS1<11> DDR_B_BS2<11>

DDR_B_DQS0<11> DDR_B_DQS#0<11> DDR_B_DQS1<11> DDR_B_DQS#1<11> DDR_B_DQS2<11> DDR_B_DQS#2<11> DDR_B_DQS3<11> DDR_B_DQS#3<11> DDR_B_DQS4<11> DDR_B_DQS#4<11> DDR_B_DQS5<11> DDR_B_DQS#5<11> DDR_B_DQS6<11> DDR_B_DQS#6<11> DDR_B_DQS7<11> DDR_B_DQS#7<11>

M_CLK_DDR3<11> M_CLK_DDR#3<11> M_CLK_DDR2<11> M_CLK_DDR#2<11>

DDR_CKE2_DIMMB<11> DDR_CKE3_DIMMB<11>

M_ODT2<11> M_ODT3<11>

DDR_CS2_DIMMB#<11> DDR_CS3_DIMMB#<11>

DDR_B_RAS#<11> DDR_B_CAS#<11> DDR_B_WE#<11>

DDR_B_RST#<11>

DDR_B_EVENT#<11>

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS0 DDR_B_BS1 DDR_B_BS2

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

M_CLK_DDR3 M_CLK_DDR#3 M_CLK_DDR2 M_CLK_DDR#2

DDR_CKE2_DIMMB DDR_CKE3_DIMMB

M_ODT2 M_ODT3

DDR_CS2_DIMMB# DDR_CS3_DIMMB#

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_B_RST# DDR_B_EVENT#

AC33

W33

AD32

AJ33

AE33 AD33

AN30 AM30 AN26 AM26

AL20 AM20 AM14 AN14

AD31 AD30 AB31 AB30 AB33 AB32 AA32 AA33 AN21 AM21 AN22 AM22

AH33 AK32 AH31 AK31

AF31

AJ32 AF33 AK33

AF32 AH32 AG33

M33

Y32 Y33 Y31

V31 V33 U33 V32 T33

T31 T32

P31 P33

R33

G33 H31 K32 L33 F32 G32 K31 K33

B16 A15 A21 B20 B28 A28 D33 D32

J33

H32

A22 A23 C22 B22

P32 N33

L32

ASB2_BGA812

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_CHECK0 MB_CHECK1 MB_CHECK2 MB_CHECK3 MB_CHECK4 MB_CHECK5 MB_CHECK6 MB_CHECK7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MB_DQS_H8 MB_DQS_L8

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 MB_CLK_H2 MB_CLK_L2 MB_CLK_H3 MB_CLK_L3 MB_CLK_H4 MB_CLK_L4 MB_CLK_H5 MB_CLK_L5 MB_CLK_H6 MB_CLK_L6 MB_CLK_H7 MB_CLK_L7

MB_CKE0 MB_CKE1

MB0_ODT0 MB0_ODT1 MB1_ODT0 MB1_ODT1

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 MB1_CS_L1

MB_RAS_L MB_CAS_L MB_WE_L

MB_RESET_L FREE|MB_EVENT_L

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35

DDRIII CHANNEL B

MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 MB_DM8

A14 C14 A17 B18 A13 B14 A16 C16 A19 C20 C24 A25 A18 C18 B24 A24 C26 A27 A30 B30 A26 B26 A29 C30 B32 C32 F31 F33 A31 B31 D31 E33 AM32 AM31 AN29 AK28 AL33 AL32 AL30 AM29 AM28 AN27 AN25 AL24 AL28 AN28 AL26 AM25 AN23 AL22 AN18 AM18 AN24 AM24 AN19 AL18 AN16 AM16 AM12 AN12 AN17 AL16 AL14 AN13

D14 A20 C28 C33 AN31 AK26 AN20 AN15 H33

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_D0 <11> DDR_B_D1 <11> DDR_B_D2 <11> DDR_B_D3 <11> DDR_B_D4 <11> DDR_B_D5 <11> DDR_B_D6 <11> DDR_B_D7 <11> DDR_B_D8 <11> DDR_B_D9 <11> DDR_B_D10 <11> DDR_B_D11 <11> DDR_B_D12 <11> DDR_B_D13 <11> DDR_B_D14 <11> DDR_B_D15 <11> DDR_B_D16 <11> DDR_B_D17 <11> DDR_B_D18 <11> DDR_B_D19 <11> DDR_B_D20 <11> DDR_B_D21 <11> DDR_B_D22 <11> DDR_B_D23 <11> DDR_B_D24 <11> DDR_B_D25 <11> DDR_B_D26 <11> DDR_B_D27 <11> DDR_B_D28 <11> DDR_B_D29 <11> DDR_B_D30 <11> DDR_B_D31 <11> DDR_B_D32 <11> DDR_B_D33 <11> DDR_B_D34 <11> DDR_B_D35 <11> DDR_B_D36 <11> DDR_B_D37 <11> DDR_B_D38 <11> DDR_B_D39 <11> DDR_B_D40 <11> DDR_B_D41 <11> DDR_B_D42 <11> DDR_B_D43 <11> DDR_B_D44 <11> DDR_B_D45 <11> DDR_B_D46 <11> DDR_B_D47 <11> DDR_B_D48 <11> DDR_B_D49 <11> DDR_B_D50 <11> DDR_B_D51 <11> DDR_B_D52 <11> DDR_B_D53 <11> DDR_B_D54 <11> DDR_B_D55 <11> DDR_B_D56 <11> DDR_B_D57 <11> DDR_B_D58 <11> DDR_B_D59 <11> DDR_B_D60 <11> DDR_B_D61 <11> DDR_B_D62 <11> DDR_B_D63 <11>

DDR_B_DM0 <11> DDR_B_DM1 <11> DDR_B_DM2 <11> DDR_B_DM3 <11> DDR_B_DM4 <11> DDR_B_DM5 <11> DDR_B_DM6 <11> DDR_B_DM7 <11>

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

ASB2 DDRIII MEMORY I/F

LA-6132P

745Tuesday, May 04, 2010

1.0

+1.1VS

+1.5V

+CPU_VDDR

D D

CPU_ALERT#

C C

B B

A A

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

+1.5V

RU6

+1.5V

RU14

CPU_SID

+1.5V

RU22

CPU_SIC

RU60

1 2

VGATE<26,42>

0_0402_5%

CPU_PWRGD<16>

LDT_STOP#<13,16>

LDT_RST#<16>

Layout : Resistor placed close to CPU, trace reference to GND, keep spacing 15mil to other signal.

+1.5V

1 2

RU57 10_0402_5%@ RU57 10_0402_5%@

1 2

RU58 10_0402_5%@ RU58 10_0402_5%@

1 2

RU59 10_0402_5%@ RU59 10_0402_5%@

+1.5V

RU4

2.2K_0402_5%

1K_0402_5%

QU2

@ QU2

3 1

MMBT3904_NL_SOT23-3

+1.5V

RU15

2.2K_0402_5%

1K_0402_5%

DU1 CH751H-40PT_SOD323-2DU1 CH751H-40PT_SOD323-2

1K_0402_5%

DU2 CH751H-40PT_SOD323-2DU2 CH751H-40PT_SOD323-2

RU50220_0402_5%~D

2.2K_0402_5%

QU4

3 1

MMBT3904_NL_SOT23-3

2 1

+1.5V

RU20

2.2K_0402_5%

QU5

3 1

MMBT3904_NL_SOT23-3

2 1

+1.5VS

@RU60

RU28

RU28 300_0402_5%~D

300_0402_5%~D

+1.5VS

RU36

RU36 300_0402_5%~D

300_0402_5%~D

+1.5VS

RU46

RU46 300_0402_5%~D

300_0402_5%~D

RU53220_0402_5%~D

RU54300_0402_5%~D RU54300_0402_5%~D

RU51220_0402_5%~D

RU52220_0402_5%~D

+3VS

RU7

SMB_ALERT#

CPU_PWRGD

LDT_STOP#

LDT_RST#

RU55300_0402_5%~D

CPU_VLDT_SENSE CPU_VDDIO_FB_H CPU_VDDR_SENSE

4.7K_0402_5%

+2.5VDDA

SMB_ALERT# <13,18,26>

EC_SMB_DA2

1 2

FBM_L11_201209_300L_0805

150U_B2_6.3VM_R45M

EC is PU to 3VALW

EC_SMB_CK2

CPU_SVC_R CPU_SVC CPU_SVD_R

HDT Connector

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

+1.5V

LU1

CU1

CLK_HT_CPU_P<16>

CLK_HT_CPU_N<16>

EC_SMB_DA2 <20,26,28>

EC_SMB_CK2 <20,26,28>

TU21TU21 TU22TU22 TU23TU23

CPU_VDD0_RUN_FB_L CPU_VDD0_RUN_FB_H CPU_VDDNB_RUN_FB_H

Place close to CPU

RU44

1 2

0_0402_5%

RU45

1 2

0_0402_5%

RU47

1 2

0_0402_5%

VID Override Circuit

SB_PWRGD<13,18,26>

LDT_RST#

JPTU1 CONN@

2423 26

SAMTEC_ASP-68200-07

LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

CU3

CU2

4.7U_0603_6.3V6K

1 2

CU5

169_0402_1%~D

1 2

CU6 3900P_0402_50V7K~DCU6 3900P_0402_50V7K~D

+1.5VS

RU38

RU39

1K_0402_5%

+3VALW

SB_PWRGD

2 1

HDT_RST#

CU4

0.22U_0603_10V7K~D

0.22U_0603_10V7K~D 3900P_0402_50V7K~D

3900P_0402_50V7K~D

RU5

SB_SMB_CLK3<18>

SB_SMB_DAT3<18>

TSI to SB SMBUS3

PLACE THEM CLOSE TO CPU WITHIN 1"

RU40

2.2K_0402_5%

1K_0402_5%

CPU_PWRGD_SVID_REGCPU_PWRGD

Close to LDT_RST# trace

UU6

NC7SZ08P5X_NL_SC70-5

+CPU_VDDA

3300P_0402_50V7K~D

CPU_VDD0_RUN_FB_L<42> CPU_VDD0_RUN_FB_H<42>

CPU_VDDNB_RUN_FB_H<42>

CU72 0.1U_0402_16V7K

TU4TU4 TU5TU5

TU8TU8 TU9TU9 TU11TU11 TU12TU12

CPU_SVD

HDT_RST#

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

CPU_PWRGD LDT_STOP# LDT_RST#

CPU_SIC

RU90_0402_5%@RU90_0402_5%

1 2

CPU_SID

RU120_0402_5%@RU120_0402_5%

1 2

CPU_ALERT#

CPU_TDI CPU_TRST# CPU_TCK CPU_TMS CPU_DBREQ#

CPU_VDD0_RUN_FB_L CPU_VLDT_SENSE CPU_VDD0_RUN_FB_H CPU_VDDNB_RUN_FB_H CPU_VDDIO_FB_H CPU_VDDR_SENSE

+CPU_M_VREF

RU21 39.2_0402_1%RU21 39.2_0402_1%

1 2

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_TEST9_ANALOGIN

CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0

CPU_TEST7_ANALOG_T CPU_TEST6_DIECRACKMON CPU_TEST3 CPU_TEST2

CPU_SVC <42> CPU_SVD <42> CPU_PWRGD_SVID_REG <42>

+1.5V

RU49

RU56

UU1D

K325@

UU1D

K325@

VDDA_1

VDDA_2

CLKIN_H

CLKIN_L

D10

PWROK

LDTSTOP_L

RESET_L

AN4

SIC

AN5

SID

AM2

RSVD_SA0

AN3

ALERT_L

AM8

TDI

AL8

TRST_L

AK8

TCK

AN8

TMS

DBREQ_L

VSS_SENSE

VLDT_SENSE

VDD_SENSE

VDDNB_SENSE

VDDIO_SENSE

VDDR_SENSE

A11 AM9 AN9

AH7

A9 B9 A5 B6

F8 C8 D9

AK5 AJ7

M_VREF M_ZN_H M_ZN_L

BYPASSCLK_H BYPASSCLK_L PLLTEST0 PLLTEST1

ANALOGIN

BP3 BP2 BP1 BP0

ANALOG_T DIECRACKMON GATE0 DRAIN0

ASB2_BGA812

M_ZP M_ZN

LAYOUT:PLACE CLOSE TO CPU

CU7

1 2

1K_0402_1%~D

CU8

1 2

1K_0402_1%~D

0.1U_0402_16V7K

CU9

0.01U_0402_16V7K

+CPU_M_VREF

RSVD|CORE_TYPE

MISC

THERMTRIP_L

PROCHOT_L

CPU_PRESENT_L

FBCLKOUT_H

FBCLKOUT_L

SCANSHIFTEN

PLLCHRZ_H

SINGLECHAIN

ANALOGOUT

1000P_0402_50V7K

SVC SVD

THERMDC THERMDA

TDO

DBRDY

RSVD3

HTREF1 HTREF0

SCANCLK1

TSTUPD

SCANEN

SCANCLK2

PLLCHRZ_L

BURNIN_L

DIG_T

M_TEST

CT1

+1.5V +1.5V

RU62

1K_0402_5%

CPU_CORE_TYPE

M31

CPU_SVC_R

CPU_SVD_R

THERMDC_CPU

AL6

THERMDA_CPU

AM5

CPU_THERMTRIP#_R

AK6

CPU_PROCHOT#_R

AN6

CPU_TDO

AN7

CPU_DBRDY

RSVD3

AM6

CPU_PRESENT_L

AJ9

CPU_HTREF1

V10

CPU_HTREF0

CPU_TEST29_H_FBCLKOUT_P

B10

CPU_TEST29_L_FBCLKOUT_N

A10

CPU_TEST24_SCANCLK1

AK7

CPU_TEST23_TSTUPD

AG8

CPU_TEST22_SCANSHIFTEN

AK9

CPU_TEST21_SCANEN

AH9

CPU_TEST20_SCANCLK2

AM7

CPU_TEST28_H_PLLCHRZ_P

G11

CPU_TEST28_L_PLLCHRZ_N

H11

CPU_TEST27_SINGLECHAIN

AJ8

CPU_TEST26_BURNIN_L

AM4

CPU_TEST10_ANALOGOUT

CPU_TEST8_DIG_T

AG9

+3VS

THERMDA_CPU

2200P_0402_50V7K

THERMDC_CPU SMB_ALERT#

0.1U_0402_16V7K

THERM#

+3VS

THERM# CPU_PROCHOT#

RT2

1 2

0_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

RU63

RU63 1K_0402_5%

1K_0402_5%

SB_SMB_CLK3 SB_SMB_DAT3

CT2

@ CT2

RT1

1 2

10K_0402_5%

@RT2

RU10

1 2 1 2

RU23

@RT1

CPU_PROCHOT#_R

1 2

RU67 0_0402_5%RU67 0_0402_5%

10K_0402_5%

QU1

H_THERMTRIP# <18>

CPU_PROCHOT#

RU61 1K_0402_5%RU61 1K_0402_5%

1 2

place them to CPU within 1.5"

RU24 510_0402_1%RU24 510_0402_1%

1 2

RU25 1K_0402_5%RU25 1K_0402_5%

1 2

RU26 1K_0402_5%RU26 1K_0402_5%

1 2

RU27 300_0402_5%~D@RU27 300_0402_5%~D@

1 2

RU29 510_0402_1%RU29 510_0402_1%

1 2

RU30 1K_0402_5%RU30 1K_0402_5%

1 2

RU31 1K_0402_5%RU31 1K_0402_5%

1 2

RU32 1K_0402_5%RU32 1K_0402_5%

1 2

RU33 1K_0402_5%RU33 1K_0402_5%

1 2

RU34 1K_0402_5%RU34 1K_0402_5%

1 2

RU35 300_0402_5%~D@RU35 300_0402_5%~D@

1 2

RU37 300_0402_5%~D@RU37 300_0402_5%~D@

1 2

RU41 1K_0402_5%RU41 1K_0402_5%

1 2

RU42 1K_0402_5%RU42 1K_0402_5%

1 2

RU43 0_0402_5%RU43 0_0402_5%

1 2

RU48 300_0402_5%~D@RU48 300_0402_5%~D@

1 2

EC_SMB_CK2

EC_SMB_DA2

7 6 5

CPU_PROCHOT# <16>

+1.5V

+1.1VS

EC_SMB_CK2 <20,26,28> EC_SMB_DA2 <20,26,28>

SMB_ALERT# <13,18,26>

TU1TU1

+1.5V

RU11

1K_0402_5%

300_0402_5%~D

1 2

RU13 0_0402_5%RU13 0_0402_5%

TU2TU2

CPU_PRESENT_L

TU3TU3

RU1844.2_0402_1%~D RU1844.2_0402_1%~D RU1944.2_0402_1%~D RU1944.2_0402_1%~D

1 2

80.6_0402_1%~D

TU6TU6 TU7TU7

TU10TU10

1 2 3 4

EMC1402-1-ACZL-TR_MSOP8

VLDT

+1.1VS

route as differential as short as possible testpoint under package

CPU_TEST25_H_BYPASSCLK_H CPU_TEST26_BURNIN_L

CPU_TEST27_SINGLECHAIN

CPU_TEST25_L_BYPASSCLK_L CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST23_TSTUPD CPU_TEST22_SCANSHIFTEN

CPU_TEST15_BP1 CPU_TEST14_BP0

CPU_TEST18_PLLTEST1 CPU_TEST19_PLLTEST0

CPU_TEST9_ANALOGIN

CPU_TEST10_ANALOGOUT

UT5

@UT5

VDD DP DN THERM#

SB_PROCHOT#<17>

+1.5V

RU3

1 2 2

3 1

MMBT3904_NL_SOT23-3

SMCLK

SMDATA

ALERT#

GND

SMBus Address: 1001110X (b)

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

ASB2 CTRL & EMC1402

LA-6132P

845Tuesday, May 04, 2010

VLDT

1.0

CPU BOTTOMSIDE DECOUPLING

+CPU_CORE

CU10

CU11

+CPU_CORE

D D

CU18

C C

CU19

CU14

330U_X_2VM_R6M

+CPU_CORE

CU23

+1.5V

CU30

+1.5V

CU38

22U_0805_6.3V6M~D

CU24

22U_0805_6.3V6M~D

CU31

22U_0805_6.3V6M~D

CU39

22U_0805_6.3V6M~D

CU15

22U_0805_6.3V6M~D

CU25

22U_0805_6.3V6M~D

CU32

10U_0603_6.3V6M

CU40

10U_0603_6.3V6M

CU12

22U_0805_6.3V6M~D

CU26

22U_0805_6.3V6M~D

CU33

0.22U_0603_10V7K~D

CU41

0.22U_0603_10V7K~D

CU16

22U_0805_6.3V6M~D

CU27

22U_0805_6.3V6M~D

CU34

0.22U_0603_10V7K~D

CU42

0.22U_0603_10V7K~D

CU17

CU13

4.7U_0603_6.3V6K

0.22U_0603_10V7K~D

CU28

CU29

4.7U_0603_6.3V6K

0.22U_0603_10V7K~D

CU36

CU35

0.1U_0402_16V7K

0.22U_0603_10V7K~D

CU44

CU43

0.1U_0402_16V7K

0.22U_0603_10V7K~D

+VDDNB

180P_0402_50V8J~D

CU20

180P_0402_50V8J~D

CU37

0.01U_0402_16V7K

180P_0402_50V8J~D

CU21

22U_0805_6.3V6M~D

180P_0402_50V8J~D

CU22

22U_0805_6.3V6M~D

Place close to CPU

+CPU_VDDR

CU45

+1.1VS

CU51

B B

CU47

CU46

4.7U_0603_6.3V6K

CU52

CU53

10U_0603_6.3V6M

CU48

0.22U_0603_10V7K~D

CU54

10U_0603_6.3V6M

CU49

CU50

0.22U_0603_10V7K~D

Placement need check

CU56

CU55

0.22U_0603_10V7K~D

CU57

180P_0402_50V8J~D

+1.1VS

CU58

180P_0402_50V8J~D

CU60

CU59

4.7U_0603_6.3V6K

22U_0805_6.3V6M~D

CU61

4.7U_0603_6.3V6K

DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE

+1.5V

A A

CU63

CU62

Need discuss with AMD

4.7U_0603_6.3V6K

CU64

4.7U_0603_6.3V6K

CU65

4.7U_0603_6.3V6K

CU66

4.7U_0603_6.3V6K

CU67

0.22U_0603_10V7K~D

CU68

0.22U_0603_10V7K~D

CU69

CU70

180P_0402_50V8J~D

CU71

180P_0402_50V8J~D

+CPU_CORE

UU1E

K325@

UU1E

AA30 AB28 AE32 AC30 AC32 AE26 AE30 AF28 AG30 AG32 AD25 AA25 AC25

AB25

M10 M12

N11 N24

M27 U26

N32 U32 N30

R28 R30 R32 U29 U30 W28 W30 W32

N25 M25

D4 D5 D6 E5 E6 E7 F5 F6 F7 H7 H8

E4 J10 J12 J14 J18 J20 J21 J23

J9 K10 K12 K14 K18 K20 K21 K23

N4 L11 L13

L7 L9

N9 P15 P18

Y26

P29

Y29

V25 P25

K25 L25 T25 Y25

K325@

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12 VDD_13 VDD_14 VDD_15 VDD_16 VDD_17 VDD_18 VDD_19 VDD_20 VDD_21 VDD_22 VDD_23 VDD_24 VDD_25 VDD_26 VDD_27 VDD_28 VDD_29 VDD_30 VDD_31 VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43

ASB2_BGA812

UU1F

K325@

UU1F

K325@

VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 VDDIO_5 VDDIO_6 VDDIO_7 VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14 VDDIO_15 VDDIO_16 VDDIO_17 VDDIO_18 VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36 VDDIO_37 VDDIO_38

ASB2_BGA812

POWER1

POWER2

PROGEN_L

VDD_85 VDD_84 VDD_83 VDD_82 VDD_81 VDD_80 VDD_79 VDD_78 VDD_77 VDD_76 VDD_75 VDD_74 VDD_73 VDD_72 VDD_71 VDD_70 VDD_69 VDD_68 VDD_67 VDD_66 VDD_65 VDD_64 VDD_63 VDD_62 VDD_61 VDD_60 VDD_59 VDD_58 VDD_57 VDD_56 VDD_55 VDD_54 VDD_53 VDD_52 VDD_51 VDD_50 VDD_49 VDD_48 VDD_47 VDD_46 VDD_45 VDD_44

VLDT_A_1 VLDT_A_2 VLDT_A_3 VLDT_A_4 VLDT_B_1 VLDT_B_2 VLDT_B_3 VLDT_B_4

VDDR_1 VDDR_2 VDDR_3 VDDR_4 VDDR_5 VDDR_6 VDDR_7 VDDR_8

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 VDDNB_6

FREE_1 FREE_2 FREE_3 FREE_4 FREE_5 FREE_6 FREE_7 FREE_8 FREE_9

AE12 AD9 AE21 AD21 AD18 AD14 AD12 AD11 AC5 AE18 AC24 AC12 AC10 AB13 AB11 AE14 AA24 AA12 AA10 Y19 Y16 Y14 W5 W20 W18 W15 AE23 V24 V19 V16 V14 T20 T18 T15 T10 R5 R19 R16 R14 AC4 P24 P20

VLDT already check with AMD need 1.1V

+1.1VS

F1 F2

1.5A

F3 F4 AL1 AL2 AL3 AL4

+CPU_VDDR

A12 B12 C12

0.9V, 1.5A

D12 AK10 AL10 AM10 AN10

+VDDNB

0.9V,4A

A3 A4 B3 B4 C3 C4

+CPU_VDDR

B11

G7 B7 AH8 AJ6 B25 AM3 AN11 P9 P8

18A

+1.5V

N2 N22 N23

B13 B15 B17

M21

B19 B21 B23 B27 B29 B33

C10

P10 P14 P16 P19

P7 C31 D11 D13 D15

R1 D17 D19 D21 D23 D25 D27 R15 R18

R2 R20 D29 D30

E30 E32 F14 F17

T14 T16 F20 T19 T24

F23

G1 G19

G2 G25 G27 N10

UU1G

K325@

UU1G

K325@

VSS_1 VSS_28 VSS_29 VSS_30 VSS_2 VSS_3 VSS_4 VSS_27 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_12 VSS_13 VSS_14 VSS_15 VSS_36 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_37 VSS_38 VSS_39 VSS_40 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_115

ASB2_BGA812

GND1

VSS_45 VSS_44 VSS_43 VSS_42 VSS_26 VSS_25 VSS_41 VSS_24 VSS_23 VSS_22 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114

W19 W1 V20 V18 M11 L8 V15 L4 L30 L26 L24 L23 L22 L21 L2 L12 L10 L1 K9 M6 K24 K22 K16 M22 K13 M24 K11 M23 J7 W16 J4 W14 J32 J30 M13 J28 U8 J25 U4 J24 U7 U2 J2 J16 J13 J11 J1 H6 H5 H28 H23 H20 J22 M9 G4 G30 N12

DELL CONFIDENTIAL/PROPRIETARY

Title

Size Document Number Rev

Date: Sheet of

UU1H

K325@

UU1H

K325@

AM19

VSS_207

AF7

VSS_167

AF26

VSS_166

AE7

VSS_165

AF8

VSS_168

AF9

VSS_169

AG1

VSS_170

AG2

VSS_171

AG27

VSS_172

AG4

VSS_173

AG5

VSS_174

AG6

VSS_175

AG7

VSS_176

AE4

VSS_164

AE25

VSS_163

AE24

VSS_162

AE22

VSS_161

AE20

VSS_160

AE2

VSS_159

AE16

VSS_158

AE13

VSS_157

AH14

VSS_177

AE11

VSS_156

AE10

VSS_155

AE1

VSS_154

AD24

VSS_153

AD23

VSS_152

AD22

VSS_151

AH20

VSS_178

AH23

VSS_179

AH25

VSS_180

AH28

VSS_181

AD20

VSS_150

AD16

VSS_149

AD13

VSS_148

AD10

VSS_147

AC9

VSS_146

AC8

VSS_145

VSS_214

AC23

VSS_144

AH5

VSS_182

AJ1

VSS_183

AJ15

VSS_184

VSS_116

A32

VSS_213

VSS_117

Y10

VSS_118

Y15

VSS_119

Y18

VSS_120

AJ19

VSS_185

AJ2

VSS_186

AJ22

VSS_187

AJ4

VSS_188

Y20

VSS_121

Y24

VSS_122

AK11

VSS_189

AK13

VSS_190

VSS_123

AA1

VSS_124

AA11

VSS_125

ASB2_BGA812

Compal Electronics, Inc.

ASB2 PWR & GND

LA-6132P

GND2

VSS_191 VSS_192 VSS_193 VSS_194 VSS_126 VSS_127 VSS_128 VSS_195 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_196 VSS_197 VSS_198 VSS_199 VSS_200 VSS_201 VSS_202 VSS_203 VSS_137 VSS_138 VSS_205 VSS_206 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_208 VSS_209 VSS_210 VSS_211 VSS_212 VSS_215

AK15 AK17 AK19 AK21 AA2 AA22 AA23 AK23 AA4 AA9 AB10 AB12 AB21 AB22 AB23 AB24 AK25 AK27 AK29 AJ5 AH6 AL31 AM1 AM13 AB7 AC1 AM15 AM17 AC11 AC13 AC2 AC21 AC22 AM23 AM27 AM33 AN2 AN32 AM11

945Monday, May 03, 2010

1.0

DDR_A_MA0<7> DDR_A_MA1<7> DDR_A_MA2<7> DDR_A_MA3<7> DDR_A_MA4<7> DDR_A_MA5<7> DDR_A_MA6<7> DDR_A_MA7<7> DDR_A_MA8<7> DDR_A_MA9<7> DDR_A_MA10<7>

D D

C C

B B

A A

DDR_A_MA11<7> DDR_A_MA12<7> DDR_A_MA13<7> DDR_A_MA14<7> DDR_A_MA15<7>

DDR_A_DQS0<7> DDR_A_DQS#0<7> DDR_A_DQS1<7> DDR_A_DQS#1<7> DDR_A_DQS2<7> DDR_A_DQS#2<7> DDR_A_DQS3<7> DDR_A_DQS#3<7> DDR_A_DQS4<7> DDR_A_DQS#4<7> DDR_A_DQS5<7> DDR_A_DQS#5<7> DDR_A_DQS6<7> DDR_A_DQS#6<7> DDR_A_DQS7<7> DDR_A_DQS#7<7>

+0.75VS

CU73

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

Layout Note: Place near JDIMMA

+1.5V

0.1U_0402_16V7K

CD4

0.1U_0402_16V7K

CD42

CU75

0.22U_0603_10V7K~D

0.1U_0402_16V7K

CD5

0.1U_0402_16V7K

CD43

CU76

0.22U_0603_10V7K~D

0.1U_0402_16V7K

CD3

+1.5V

0.1U_0402_16V7K

CD41

Layout Note: Place near JDIMMA.203,204

CU74

0.22U_0603_10V7K~D

0.1U_0402_16V7K

CD6

0.1U_0402_16V7K

CD44

4.7U_0603_6.3V6K

CD52

0.22U_0603_10V7K~D

0.1U_0402_16V7K

CD38

0.1U_0402_16V7K

CD45

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CD53

CD53

0.1U_0402_16V7K

CD39

0.1U_0402_16V7K

0.1U_0402_16V7K CD47

CD47

CD46

10U_0603_6.3V6M

CD16

+1.5V

CD15

+1.5V

10U_0603_6.3V6M

+V_DDR_REF_DQ

330U_X_2VM_R6M

10U_0603_6.3V6M

CD48

2.2U_0603_6.3V6K

CD2

CD1

+3VS

1000P_0402_50V7K

0.01U_0402_16V7K

CD37

DDR_CKE0_DIMMA<7>

DDR_A_BS2<7>

M_CLK_DDR0<7> M_CLK_DDR#0<7>

DDR_A_BS0<7> DDR_A_WE#<7>

DDR_A_CAS#<7>

DDR_CS1_DIMMA#<7>

0.1U_0402_16V7K

2.2U_0603_6.3V6K

CD17

CD18

DDR_CKE0_DIMMA

DDR_CS1_DIMMA#

RD2 0_0402_5%RD2 0_0402_5% RD3 0_0402_5%RD3 0_0402_5%

+1.5V

DDR_A_D0 DDR_A_D1

DDR_A_DM0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11 DDR_A_D16

DDR_A_D17 DDR_A_DQS#2

DDR_A_DQS2 DDR_A_D18

DDR_A_D19 DDR_A_D24

DDR_A_D25 DDR_A_DM3 DDR_A_D26

DDR_A_D27

DDR_A_BS2 DDR_A_MA12

DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3

DDR_A_MA1 M_CLK_DDR0

M_CLK_DDR#0 DDR_A_MA10

DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D48

DDR_A_D49 DDR_A_DQS#6

DDR_A_DQS6 DDR_A_D50

DDR_A_D51 DDR_A_D56

DDR_A_D57 DDR_A_DM7 DDR_A_D58

DDR_A_D59

1 2 1 2

+0.75VS

JDIMMA

VREF_DQ1VSS1

VSS2

DQ0

DQ1

VSS4

DM0

VSS5

DQ2

DQ3

VSS7

DQ8

DQ9

VSS9

DQS#1 DQS129RESET# VSS1131VSS12

DQ10

DQ11 VSS1337VSS14

DQ16

DQ17 VSS1543VSS16

DQS#2

DQS2

VSS18

DQ18

DQ19

VSS20

DQ24

DQ25 VSS2261DQS#3

DM3 VSS2365VSS24

DQ26

DQ27 VSS2571VSS26

CKE0

VDD1

NC1

BA2

VDD3

A12/BC#

VDD5

VDD7

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

FOX_AS0A626-U4RN-7F

CONN@

VSS3

DQS#0

DQS0

VSS6

VSS8 DQ12 DQ13

VSS10

DQ14 DQ15

DQ20 DQ21

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3 DQ30

DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30 VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42 VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

VTT2

DQ4 DQ5

DQ6 DQ7

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA SCL

A15 A14

A11

A7 A6

A4 A2

S0#

+1.5V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72

74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_A_D4 DDR_A_D5

DDR_A_DQS#0 DDR_A_DQS0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1 DDR_A_RST#

DDR_A_D14 DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2 DDR_A_D22

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7

DDR_A_MA6 DDR_A_MA4

DDR_A_MA2 DDR_A_MA0

M_CLK_DDR1 M_CLK_DDR#1

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M_ODT1

DDR_A_D36 DDR_A_D37

DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D47 DDR_A_D52

DDR_A_D53 DDR_A_DM6 DDR_A_D54

DDR_A_D55 DDR_A_D60

DDR_A_D61 DDR_A_DQS#7

DDR_A_DQS7 DDR_A_D62

DDR_A_D63 DDR_A_EVENT#

MEM_SMBDATA MEM_SMBCLK

+0.75VS

DDR_A_RST# <7>

DDR_CKE1_DIMMA <7>

M_CLK_DDR1 <7>

M_CLK_DDR#1 <7>

DDR_A_BS1 <7>

DDR_A_RAS# <7>

DDR_CS0_DIMMA# <7>

M_ODT0 <7> M_ODT1 <7>

1000P_0402_50V7K

CD40

DDR_A_EVENT# <7> MEM_SMBDATA <11,13,18> MEM_SMBCLK <11,13,18>

0.01U_0402_16V7K

CD7

2.2U_0603_6.3V6K

CD8

SP07000J500

REVERSE TYPE

+1.5V +1.5V+V_DDR_REF_DQ +V_DDR_REF_CA

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

+V_DDR_REF_CA

RD1

RD1 1K_0402_5%

1K_0402_5%

RD7

RD7 1K_0402_5%

1K_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMM A

LA-6132P

RD6

RD6 1K_0402_5%

1K_0402_5%

RD8

RD8 1K_0402_5%

1K_0402_5%

DDR_A_D0 <7> DDR_A_D1 <7> DDR_A_D2 <7> DDR_A_D3 <7> DDR_A_D4 <7> DDR_A_D5 <7> DDR_A_D6 <7> DDR_A_D7 <7> DDR_A_D8 <7> DDR_A_D9 <7> DDR_A_D10 <7> DDR_A_D11 <7> DDR_A_D12 <7> DDR_A_D13 <7> DDR_A_D14 <7> DDR_A_D15 <7> DDR_A_D16 <7> DDR_A_D17 <7> DDR_A_D18 <7> DDR_A_D19 <7> DDR_A_D20 <7> DDR_A_D21 <7> DDR_A_D22 <7> DDR_A_D23 <7> DDR_A_D24 <7> DDR_A_D25 <7> DDR_A_D26 <7> DDR_A_D27 <7> DDR_A_D28 <7> DDR_A_D29 <7> DDR_A_D30 <7> DDR_A_D31 <7> DDR_A_D32 <7> DDR_A_D33 <7> DDR_A_D34 <7> DDR_A_D35 <7> DDR_A_D36 <7> DDR_A_D37 <7> DDR_A_D38 <7> DDR_A_D39 <7> DDR_A_D40 <7> DDR_A_D41 <7> DDR_A_D42 <7> DDR_A_D43 <7> DDR_A_D44 <7> DDR_A_D45 <7> DDR_A_D46 <7> DDR_A_D47 <7> DDR_A_D48 <7> DDR_A_D49 <7> DDR_A_D50 <7> DDR_A_D51 <7> DDR_A_D52 <7> DDR_A_D53 <7> DDR_A_D54 <7> DDR_A_D55 <7> DDR_A_D56 <7> DDR_A_D57 <7> DDR_A_D58 <7> DDR_A_D59 <7> DDR_A_D60 <7> DDR_A_D61 <7> DDR_A_D62 <7> DDR_A_D63 <7>

DDR_A_DM0 <7> DDR_A_DM1 <7> DDR_A_DM2 <7> DDR_A_DM3 <7> DDR_A_DM4 <7> DDR_A_DM5 <7> DDR_A_DM6 <7> DDR_A_DM7 <7>

1.0

10 45Tuesday, May 04, 2010

1.0

DDR_B_MA0<7> DDR_B_MA1<7> DDR_B_MA2<7> DDR_B_MA3<7> DDR_B_MA4<7> DDR_B_MA5<7> DDR_B_MA6<7> DDR_B_MA7<7> DDR_B_MA8<7> DDR_B_MA9<7> DDR_B_MA10<7> DDR_B_MA11<7> DDR_B_MA12<7>

D D

C C

B B

A A

DDR_B_MA13<7> DDR_B_MA14<7> DDR_B_MA15<7>

DDR_B_DQS0<7> DDR_B_DQS#0<7> DDR_B_DQS1<7> DDR_B_DQS#1<7> DDR_B_DQS2<7> DDR_B_DQS#2<7> DDR_B_DQS3<7> DDR_B_DQS#3<7> DDR_B_DQS4<7> DDR_B_DQS#4<7> DDR_B_DQS5<7> DDR_B_DQS#5<7> DDR_B_DQS6<7> DDR_B_DQS#6<7> DDR_B_DQS7<7> DDR_B_DQS#7<7>

+1.5V

0.1U_0402_16V7K

CD21

+1.5V

0.1U_0402_16V7K

CD59

Layout Note: Place near JDIMMB.203,204

+0.75VS

CU77

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

0.1U_0402_16V7K

CD22

CD23

0.1U_0402_16V7K

CD60

CD61

CU79

CU78

0.22U_0603_10V7K~D

Layout Note: Place near JDIMMB

0.1U_0402_16V7K

CD24

0.1U_0402_16V7K

CD62

CD68

CU80

0.22U_0603_10V7K~D

0.1U_0402_16V7K

CD56

CD57

0.1U_0402_16V7K

CD63

CD64

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K CD69

CD69

+1.5V

10U_0603_6.3V6M

CD27

10U_0603_6.3V6M

CD29

CD33

+V_DDR_REF_DQ

330U_X_2VM_R6M

10U_0603_6.3V6M

CD28

2.2U_0603_6.3V6K

CD19

+3VS

1 2

RD4 4.7K_0402_5%RD4 4.7K_0402_5%

0.01U_0402_16V7K

CD20

DDR_CKE2_DIMMB<7>

DDR_CS3_DIMMB#<7>

0_0402_5%

1000P_0402_50V7K

CD55

DDR_B_BS2<7>

M_CLK_DDR2<7> M_CLK_DDR#2<7>

DDR_B_BS0<7> DDR_B_WE#<7>

DDR_B_CAS#<7>

+3VS

RD5

0.1U_0402_16V7K

CD35

+1.5V +1.5V

DDR_B_D0 DDR_B_D1

DDR_B_DM0 DDR_B_D2

DDR_B_D3 DDR_B_D8

DDR_B_D9 DDR_B_DQS#1

DDR_B_DQS1 DDR_B_D10

DDR_B_D11 DDR_B_D16

DDR_B_D17 DDR_B_DQS#2

DDR_B_DQS2 DDR_B_D18

DDR_B_D19 DDR_B_D24

DDR_B_D25 DDR_B_DM3 DDR_B_D26

DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2 DDR_B_MA12

DDR_B_MA9 DDR_B_MA8

DDR_B_MA5 DDR_B_MA3

DDR_B_MA1 M_CLK_DDR2

M_CLK_DDR#2 DDR_B_MA10

DDR_B_BS0 DDR_B_WE#

DDR_B_CAS# DDR_B_MA13

DDR_CS3_DIMMB#

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D48

DDR_B_D49 DDR_B_DQS#6

DDR_B_DQS6 DDR_B_D50

DDR_B_D51 DDR_B_D56

DDR_B_D57 DDR_B_DM7 DDR_B_D58

DDR_B_D59

+0.75VS

2.2U_0603_6.3V6K

CD36

JDIMMB

VREF_DQ1VSS1

VSS2

DQ0

DQ1

VSS4

DM0

VSS5

DQ2

DQ3

VSS7

DQ8

DQ9

VSS9

DQS#1 DQS129RESET# VSS1131VSS12

DQ10

DQ11 VSS1337VSS14

DQ16

DQ17 VSS1543VSS16

DQS#2

DQS2

VSS18

DQ18

DQ19

VSS20

DQ24

DQ25 VSS2261DQS#3

DM3 VSS2365VSS24

DQ26

DQ27 VSS2571VSS26

CKE0

VDD1

NC1

BA2

VDD3

A12/BC#

VDD5

VDD7

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

FOX_AS0A626-U8RN-7F

CONN@

DC020811210

REVERSE TYPE

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6 DQ7

VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3 DQ30

DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA SCL

VTT2

DDR_B_D4

DDR_B_D5

6 8

DDR_B_DQS#0

DDR_B_DQS0

12 14

DDR_B_D6

DDR_B_D7

18 20

DDR_B_D12

DDR_B_D13

24 26

DDR_B_DM1

DDR_B_RST#

30 32

DDR_B_D14

DDR_B_D15

36 38

DDR_B_D20

DDR_B_D21

42 44

DDR_B_DM2

46 48

DDR_B_D22

DDR_B_D23

52 54

DDR_B_D28

DDR_B_D29

58 60

DDR_B_DQS#3

DDR_B_DQS3

64 66

DDR_B_D30

DDR_B_D31

70 72

DDR_CKE3_DIMMB

74 76

DDR_B_MA15

A15 A14

A11

A7 A6

A4 A2

S0#

80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204

206

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6

DDR_B_MA4 DDR_B_MA2

DDR_B_MA0 M_CLK_DDR3

M_CLK_DDR#3 DDR_B_BS1

DDR_B_RAS# DDR_CS2_DIMMB#

M_ODT2 M_ODT3

DDR_B_D36 DDR_B_D37

DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D47 DDR_B_D52

DDR_B_D53 DDR_B_DM6 DDR_B_D54

DDR_B_D55 DDR_B_D60

DDR_B_D61 DDR_B_DQS#7

DDR_B_DQS7 DDR_B_D62

DDR_B_D63 DDR_B_EVENT#

MEM_SMBDATA MEM_SMBCLK

+0.75VS

DDR_B_RST# <7>

DDR_CKE3_DIMMB <7>

M_CLK_DDR3 <7>

M_CLK_DDR#3 <7>

DDR_B_BS1 <7> DDR_B_RAS# <7>

DDR_CS2_DIMMB# <7>

M_ODT2 <7> M_ODT3 <7>

1000P_0402_50V7K

0.01U_0402_16V7K

CD58

CD25

DDR_B_EVENT# <7>

MEM_SMBDATA <10,13,18> MEM_SMBCLK <10,13,18>

2.2U_0603_6.3V6K

CD26

+V_DDR_REF_CA

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_D0 <7> DDR_B_D1 <7> DDR_B_D2 <7> DDR_B_D3 <7> DDR_B_D4 <7> DDR_B_D5 <7> DDR_B_D6 <7> DDR_B_D7 <7> DDR_B_D8 <7> DDR_B_D9 <7> DDR_B_D10 <7> DDR_B_D11 <7> DDR_B_D12 <7> DDR_B_D13 <7> DDR_B_D14 <7> DDR_B_D15 <7> DDR_B_D16 <7> DDR_B_D17 <7> DDR_B_D18 <7> DDR_B_D19 <7> DDR_B_D20 <7> DDR_B_D21 <7> DDR_B_D22 <7> DDR_B_D23 <7> DDR_B_D24 <7> DDR_B_D25 <7> DDR_B_D26 <7> DDR_B_D27 <7> DDR_B_D28 <7> DDR_B_D29 <7> DDR_B_D30 <7> DDR_B_D31 <7> DDR_B_D32 <7> DDR_B_D33 <7> DDR_B_D34 <7> DDR_B_D35 <7> DDR_B_D36 <7> DDR_B_D37 <7> DDR_B_D38 <7> DDR_B_D39 <7> DDR_B_D40 <7> DDR_B_D41 <7> DDR_B_D42 <7> DDR_B_D43 <7> DDR_B_D44 <7> DDR_B_D45 <7> DDR_B_D46 <7> DDR_B_D47 <7> DDR_B_D48 <7> DDR_B_D49 <7> DDR_B_D50 <7> DDR_B_D51 <7> DDR_B_D52 <7> DDR_B_D53 <7> DDR_B_D54 <7> DDR_B_D55 <7> DDR_B_D56 <7> DDR_B_D57 <7> DDR_B_D58 <7> DDR_B_D59 <7> DDR_B_D60 <7> DDR_B_D61 <7> DDR_B_D62 <7> DDR_B_D63 <7>

DDR_B_DM0 <7> DDR_B_DM1 <7> DDR_B_DM2 <7> DDR_B_DM3 <7> DDR_B_DM4 <7> DDR_B_DM5 <7> DDR_B_DM6 <7> DDR_B_DM7 <7>

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

DDRIII DIMM B

DDRIII DIMM B LA-6132P

LA-6132P

11 45Tuesday, May 04, 2010

1.0

UN2B

GFX_RX0P

GFX_RX0N

GFX_RX1P

GFX_RX1N

GFX_RX2P

GFX_RX2N

D D

PCIE_NRX_LANTX_P0<20> PCIE_NTX_LANRX_P0 <20> PCIE_NRX_LANTX_N0<20>

PCIE_NRX_WLANTX_P1<28> PCIE_NRX_WWANTX_P2<28>

C C

B B

PCIE_NRX_WWANTX_N2<28>

PCIE_NRX_STX_P0<16> PCIE_NRX_STX_N0<16> PCIE_NRX_STX_P1<16> PCIE_NRX_STX_N1<16> PCIE_NRX_STX_P2<16> PCIE_NRX_STX_N2<16> PCIE_NRX_STX_P3<16> PCIE_NRX_STX_N3<16>

PCIE_NRX_LANTX_P0 PCIE_NRX_LANTX_N0 PCIE_NRX_WLANTX_P1 PCIE_NRX_WLANTX_N1 PCIE_NRX_WWANTX_P2 PCIE_NRX_WWANTX_N2

PCIE_NRX_STX_P0 PCIE_NRX_STX_N0 PCIE_NRX_STX_P1 PCIE_NRX_STX_N1 PCIE_NRX_STX_P2 PCIE_NRX_STX_N2 PCIE_NRX_STX_P3 PCIE_NRX_STX_N3

GFX_RX3P

GFX_RX3N

GFX_RX4P

GFX_RX4N

GFX_RX5P

GFX_RX5N

GFX_RX6P

GFX_RX6N

GFX_RX7P

GFX_RX7N

GFX_RX8P

GFX_RX8N

GFX_RX9P

GFX_RX9N

GFX_RX10P

GFX_RX10N

GFX_RX11P

GFX_RX11N

GFX_RX12P

GFX_RX12N

GFX_RX13P

GFX_RX13N

GFX_RX14P

GFX_RX14N

GFX_RX15P

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

GPP_RX3P

GPP_RX3N

GPP_RX4P

GPP_RX4N

GPP_RX5P

GPP_RX5N

AA8

SB_RX0P

SB_RX0N

AA7

SB_RX1P

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

SB_RX3P

SB_RX3N

RS880M_FCBGA528

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0P

GFX_TX0N

GFX_TX1P

GFX_TX1N

GFX_TX2P

GFX_TX2N

GFX_TX3P

GFX_TX3N

GFX_TX4P

GFX_TX4N

GFX_TX5P

GFX_TX5N

GFX_TX6P

GFX_TX6N

GFX_TX7P

GFX_TX7N

GFX_TX8P

GFX_TX8N

GFX_TX9P

GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

HDMI_TXD2P_C

HDMI_TXD2N_C

HDMI_TXD1P_C

HDMI_TXD1N_C

HDMI_TXD0P_C

HDMI_TXD0N_C

HDMI_CLKP_C

HDMI_CLKN_C

D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

PCIE_NTX_LANRX_P0_C

AC1

PCIE_NTX_LANRX_N0_C

AC2

PCIE_NTX_WLANRX_P1_C

AB4

PCIE_NTX_WLANRX_N1_C

AB3

PCIE_NTX_WWANRX_P2_C

AA2

PCIE_NTX_WWANRX_N2_C

AA1 Y1 Y2 Y4 Y3 V1 V2

PCIE_NTX_SRX_P0_C

AD7

PCIE_NTX_SRX_N0_C

AE7

PCIE_NTX_SRX_P1_C

AE6

PCIE_NTX_SRX_N1_C

AD6

PCIE_NTX_SRX_P2_C

AB6

PCIE_NTX_SRX_N2_C

AC6

PCIE_NTX_SRX_P3_C

AD5

PCIE_NTX_SRX_N3_C

AE5

PCE_PCAL

AC8

PCE_NCAL

AB8

CN1 0.1U_0402_16V7KCN1 0.1U_0402_16V7K CN2 0.1U_0402_16V7KCN2 0.1U_0402_16V7K CN3 0.1U_0402_16V7KCN3 0.1U_0402_16V7K CN4 0.1U_0402_16V7KCN4 0.1U_0402_16V7K CN5 0.1U_0402_16V7KCN5 0.1U_0402_16V7K CN6 0.1U_0402_16V7KCN6 0.1U_0402_16V7K CN7 0.1U_0402_16V7KCN7 0.1U_0402_16V7K CN8 0.1U_0402_16V7KCN8 0.1U_0402_16V7K

RN1 1.27K_0402_1%~DRN1 1.27K_0402_1%~D

1 2

RN2

1 2

Place < 100mils from pin AC8 and AB8

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

CN9 0.1U_0402_16V7KCN9 0.1U_0402_16V7K

1 2

CN10 0.1U_0402_16V7KCN10 0.1U_0402_16V7K

1 2

CN11 0.1U_0402_16V7KCN11 0.1U_0402_16V7K

1 2

CN12 0.1U_0402_16V7KCN12 0.1U_0402_16V7K

1 2

CN13 0.1U_0402_16V7KCN13 0.1U_0402_16V7K

1 2

CN14 0.1U_0402_16V7KCN14 0.1U_0402_16V7K

1 2

CN15 0.1U_0402_16V7KCN15 0.1U_0402_16V7K

1 2

CN16 0.1U_0402_16V7KCN16 0.1U_0402_16V7K

1 2

CN20 0.1U_0402_16V7KCN20 0.1U_0402_16V7K

1 2

CN17 0.1U_0402_16V7KCN17 0.1U_0402_16V7K

1 2

CN18 0.1U_0402_16V7KCN18 0.1U_0402_16V7K

1 2

CN21 0.1U_0402_16V7KCN21 0.1U_0402_16V7K

1 2

CN22 0.1U_0402_16V7KCN22 0.1U_0402_16V7K

1 2

CN19 0.1U_0402_16V7KCN19 0.1U_0402_16V7K

1 2

2K_0402_1%~D

+1.1VS

HDMI_TXD2P HDMI_TXD2N HDMI_TXD1P HDMI_TXD1N HDMI_TXD0P HDMI_TXD0N HDMI_CLKP HDMI_CLKN

HDMI_TXD2P <22> HDMI_TXD2N <22> HDMI_TXD1P <22> HDMI_TXD1N <22> HDMI_TXD0P <22> HDMI_TXD0N <22> HDMI_CLKP <22> HDMI_CLKN <22>

HDMI

PCIE_NTX_LANRX_P0 PCIE_NTX_LANRX_N0 PCIE_NTX_WLANRX_P1 PCIE_NTX_WLANRX_N1 PCIE_NTX_WWANRX_P2 PCIE_NTX_WWANRX_N2

PCIE_NTX_SRX_P0 <16> PCIE_NTX_SRX_N0 <16> PCIE_NTX_SRX_P1 <16> PCIE_NTX_SRX_N1 <16> PCIE_NTX_SRX_P2 <16> PCIE_NTX_SRX_N2 <16> PCIE_NTX_SRX_P3 <16> PCIE_NTX_SRX_N3 <16>

PCIE_NTX_LANRX_N0 <20> PCIE_NTX_WLANRX_P1 <28> PCIE_NTX_WLANRX_N1 <28>PCIE_NRX_WLANTX_N1<28> PCIE_NTX_WWANRX_P2 <28> PCIE_NTX_WWANRX_N2 <28>

UN2A

H_CADOP0<6> H_CADON0<6> H_CADOP1<6> H_CADON1<6> H_CADOP2<6> H_CADON2<6> H_CADOP3<6> H_CADON3<6> H_CADOP4<6> H_CADON4<6> H_CADOP5<6> H_CADON5<6> H_CADOP6<6> H_CADON6<6> H_CADOP7<6> H_CADON7<6>

H_CADOP8<6> H_CADON8<6> H_CADOP9<6> H_CADON9<6> H_CADOP10<6> H_CADON10<6> H_CADOP11<6> H_CADON11<6> H_CADOP12<6> H_CADON12<6> H_CADOP13<6> H_CADON13<6> H_CADOP14<6> H_CADON14<6> H_CADOP15<6> H_CADON15<6>

H_CLKOP0<6> H_CLKON0<6> H_CLKOP1<6> H_CLKON1<6>

H_CTLOP0<6> H_CTLON0<6> H_CTLOP1<6> H_CTLON1<6>

RN3 301_0402_1%~DRN3 301_0402_1%~D

1 2

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1

HT_RXCALP HT_RXCALN

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

UN2A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS880M_FCBGA528

HT_TXCALP HT_TXCALN

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

PART 1 OF 6

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7

H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP0

H_CLKIN0

H_CLKIP1

H_CLKIN1

H_CTLIP0 H_CTLIN0 H_CTLIP1 H_CTLIN1

HT_TXCALP

HT_TXCALN

H_CADIP0 <6> H_CADIN0 <6> H_CADIP1 <6> H_CADIN1 <6> H_CADIP2 <6> H_CADIN2 <6> H_CADIP3 <6> H_CADIN3 <6> H_CADIP4 <6> H_CADIN4 <6> H_CADIP5 <6> H_CADIN5 <6> H_CADIP6 <6> H_CADIN6 <6> H_CADIP7 <6> H_CADIN7 <6>

H_CADIP8 <6> H_CADIN8 <6> H_CADIP9 <6> H_CADIN9 <6> H_CADIP10 <6> H_CADIN10 <6> H_CADIP11 <6> H_CADIN11 <6> H_CADIP12 <6> H_CADIN12 <6> H_CADIP13 <6> H_CADIN13 <6> H_CADIP14 <6> H_CADIN14 <6> H_CADIP15 <6> H_CADIN15 <6>

H_CLKIP0 <6> H_CLKIN0 <6> H_CLKIP1 <6> H_CLKIN1 <6>

H_CTLIP0 <6> H_CTLIN0 <6> H_CTLIP1 <6> H_CTLIN1 <6>

RN4 301_0402_1%~DRN4 301_0402_1%~D

1 2

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

RS880M HT / PCIE / HDMI

LA-6132P

12 45Tuesday, May 04, 2010

1.0

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. 1 Disable 0 Enable

+3VS +3VS

RN5

RN5 3K_0402_5%~D

3K_0402_5%~D

D D

VGA_CRT_VSYNC

RN55

RN55 3K_0402_5%~D

3K_0402_5%~D

+1.1VS

LN3

1 2

MBK1608221YZF_2P_0603

+1.8VS

C C

B B

A A

1 2

BLM18EG221SN1D_2P_0603

+1.8VS

1 2

BLM18EG221SN1D_2P_0603

+1.8VS

1 2

BLM18EG221SN1D_2P_0603

15mil

LN6

15mil

LN7

15mil

LN8

15mil

LDT_STOP#<8,16>

RS880M: Enables Side port memory

Enables Memory SIDE PORT 1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

RN6

@RN6

3K_0402_5%~D

VGA_CRT_HSYNC

RN9

RN9 3K_0402_5%~D

3K_0402_5%~D

1.1V 65mA

+NB_PLLVDD

CN26

2.2U_0603_10V6K~D

1.8V 20mA

+NB_PLLVDD18

CN30

2.2U_0603_10V6K~D

1.8V 120mA

+NB_PCIEPLL

CN31

2.2U_0603_10V6K~D

1.8V 20mA

+NB_HTPLL

CN33

2.2U_0603_10V6K~D

+3VS

RN23

RN26

ALLOW_LDTSTOP<16>

+1.8VS

RN56

@ RN56

300_0402_5%~D

LDT_STOP#

Need CIS symbol

Check List: R=140 ohm

1 2

RN10 140_0402_1%~DRN10 140_0402_1%~D

1 2

RN11 150_0402_1%RN11 150_0402_1%

1 2

RN12 150_0402_1%RN12 150_0402_1%

NB_PWRGD_SB<18>

RN54

4.7K_0402_5%

0.1U_0402_16V7K

NC7SZ08P5X_NL_SC70-5

4.7K_0402_5%

1 2

CN90

RN37 0_0402_5%

1 2

CLK_NB_GFX_CLK_P CLK_NB_GFX_CLK_N

RN53

LDDC_CLK_MCH

LDDC_DATA_MCH

+3VS

LN1

BLM18EG221SN1D_2P_0603

1 2

+1.8VS

BLM18EG221SN1D_2P_0603

1 2

VGA_CRT_R VGA_CRT_G VGA_CRT_B

RN14 0_0402_5%RN14 0_0402_5%

RN32

0_0402_5%

+1.8VS

UN5

+AVDD

RN7

+AVDDDI

1 2

0_0603_5%

LN2

+AVDDQ

CLK_HTREFCLK_P<16> CLK_HTREFCLK_N<16>

CLK_NB_REFCLK_P<16> CLK_NB_REFCLK_N<16>

CLK_SB_CLK_P<16> CLK_SB_CLK_N<16>

+1.8VS +3VS

RN30

1K_0402_1%~D

1 2

NB_ALLOW_LDTSTOP

RN36

2.2K_0402_5%

NB_LDTSTOP#

3.3V 110mA

CN23

2.2U_0603_10V6K~D

1.8V 20mA

CN24

0.1U_0402_16V7K

1.8V 4mA

CN25

2.2U_0603_10V6K~D

VGA_CRT_R<24> VGA_CRT_G<24> VGA_CRT_B<24>

VGA_CRT_HSYNC<24> VGA_CRT_VSYNC<24> VGA_DDC_CLK<24> VGA_DDC_DATA<24>

RN13 715_0402_1%RN13 715_0402_1%

1 2

LDDC_CLK_MCH<27> LDDC_DATA_MCH<27>

HDMICLK_UMA<22> HDMIDAT_UMA<22>

PLT_RST#<16,20,26,28>

CLK_NB_GFX_CLK_P CLK_NB_GFX_CLK_N

15mil

VGA_CRT_R VGA_CRT_G VGA_CRT_B

VGA_CRT_HSYNC VGA_CRT_VSYNC VGA_DDC_CLK VGA_DDC_DATA

DAC_RST

+NB_PLLVDD +NB_PLLVDD18

+NB_HTPLL +NB_PCIEPLL

PLT_RST# NB_PWRGD NB_LDTSTOP# NB_ALLOW_LDTSTOP

CLK_HTREFCLK_P CLK_HTREFCLK_N

CLK_NB_REFCLK_P CLK_NB_REFCLK_N

CLK_SB_CLK_P CLK_SB_CLK_N

LDDC_CLK_MCH

LDDC_DATA_MCH HDMICLK_UMA HDMIDAT_UMA

QN1

for NB_PWRGD glitch (panel flash issue)

AMD suggest

UN2C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

DAC_SCL(PCE_RCALRN)

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

VDDA18PCIEPLL1

VDDA18PCIEPLL2

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

GFX_REFCLKP

GFX_REFCLKN

GPP_REFCLKP

GPP_REFCLKN

GPPSB_REFCLKP(SB_REFCLKP)

GPPSB_REFCLKN(SB_REFCLKN)

I2C_CLK

I2C_DATA

DDC_CLK0/AUX0P(NC)

DDC_DATA0/AUX0N(NC)

DDC_CLK1/AUX1P(NC)

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

AUX_CAL(NC)

RS880M_FCBGA528

+1.8VS

RN28

300_0402_5%~D

NB_PWRGD

SB_PWRGD<8,18,26>

SB_PWRGD#

SSM3K7002FU_SC70-3

SB_PWRGD

10K_0402_5%

RN33

PART 3 OF 6

CRT/TVOUT

CLOCKs PLL PWR

MIS.

+3VS

RN29

RN29 10K_0402_5%

10K_0402_5%

1 2

TXOUT_L2N(DBG_GPIO0) TXOUT_L3N(DBG_GPIO2)

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

SUS_STAT#(PWM_GPIO5)

QN2

SSM3K7002FU_SC70-3

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L3P(NC)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

TMDS_HPD(NC)

HPD(NC)

THERMALDIODE_P THERMALDIODE_N

TESTMODE

CT3

DFT_GPIO1: LOAD_EEPROM_STRAPS

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

LVDS_A0+

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

D9 D10

D12 AE8

AD8 D13

LVDS_A0LVDS_A1+ LVDS_A1LVDS_A2+ LVDS_A2-

LVDS_ACLK+ LVDS_ACLK-

+LPVDD

+LVDDR18D

ENVDD NB_LCD_PWM ENBKL

SUS_STAT#_NB

1.8V 15mA

RN25

1.8K_0402_5%~D

LVDS_A0+ <27> LVDS_A0- <27> LVDS_A1+ <27> LVDS_A1- <27> LVDS_A2+ <27> LVDS_A2- <27>

LVDS_ACLK+ <27> LVDS_ACLK- <27>

1.8V 300mA

RN16

SUS_STAT#_NB

15mil

CN28

0.1U_0402_16V7K

RN18

RN17

4.7K_0402_5%

1 2

RN19 0_0402_5%RN19 0_0402_5% RN20 0_0402_5%RN20 0_0402_5%

RN21 0_0402_5%RN21 0_0402_5%

1 2

12 12

CN27

2.2U_0603_10V6K~D

4.7K_0402_5%

HDMI_HPD <22>

NB_THRMDA

NB_THRMDC

DN1

@ DN1

2 1

CH751H-40PT_SOD323-2

1 2

RN8 3K_0402_5%~D@RN8 3K_0402_5%~D@

BLM18EG221SN1D_2P_0603

1 2

BLM18EG221SN1D_2P_0603

1 2

CN29

4.7U_0603_6.3V6K

ENVDD <27> NB_LCD_PWM <27> ENBKL <27>

SUS_STAT# <18>

LN4

LN5

External Thermal Sensor EMC1402 for RS880M

UT7

NB_THRMDA

2200P_0402_50V7K

NB_THRMDC SMB_ALERT#

0.1U_0402_16V7K

THERM#_NB

+3VS

CT4

RT3

1 2

10K_0402_5%

UT7

VDD

THERM#

EMC1402-1-ACZL-TR_MSOP8

SMCLK

SMDATA

ALERT#

GND

8 7 6 5

MEM_SMBCLK MEM_SMBDATA

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

RS880M SYSTEM I/F

LA-6132P

PLT_RST# <16,20,26,28>

SCHOTTKY BARRIER DIODE

+1.8VS

MEM_SMBCLK <10,11,18>

MEM_SMBDATA <10,11,18>

SMB_ALERT# <8,18,26>

13 45Tuesday, May 04, 2010

1.0

UN4

+SPM_VREF1 +SPM_VREF2

SPM_A0

D D

RN38

100_0402_5%~D

C C

+1.5V_SPM_VDDQ

RN44 10K_0402_5%RN44 10K_0402_5%

SP_DDR3_RST#<18>

B B

1 2

SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_CLKP SPM_CLKN SPM_CKE

SPM_ODT SPM_CS# SPM_RAS# SPM_CAS# SPM_WE#

SPM_DQS_P0 SPM_DQS_P1

SPM_DM0 SPM_DM1

SPM_DQS_N0 SPM_DQS_N1

RN45

UN4

M8 H1

P7 P3

P2 R8 R2

T8 R3

L7 R7 N7

T7 M7

M2 N8 M3

F3 C7

E7 D3

243_0402_1%

K4W1G1646E-HC12_FBGA96

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

SPM_DQ0

SPM_DQ1

SPM_DQ2

SPM_DQ3

SPM_DQ4

SPM_DQ5

SPM_DQ6

SPM_DQ7

SPM_DQ8

SPM_DQ9

SPM_DQ10

SPM_DQ11

SPM_DQ12

SPM_DQ13

SPM_DQ14

SPM_DQ15

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5V_SPM_VDDQ

40.2_0402_1%~D

+1.5V_SPM_VDDQ +1.5V_SPM_VDDQ +1.5V_SPM_VDDQ

CN36

CN39

RN39

1 2 1 2

RN40

0.1U_0402_16V7K

UN2D

SPM_A0 SPM_A1 SPM_A2 SPM_A3 SPM_A4 SPM_A5 SPM_A6 SPM_A7 SPM_A8 SPM_A9 SPM_A10 SPM_A11 SPM_A12 SPM_A13

SPM_BA0 SPM_BA1 SPM_BA2

SPM_RAS# SPM_CAS# SPM_WE# SPM_CS# SPM_CKE SPM_ODT

SPM_CLKP SPM_CLKN

MEMCOMPP MEMCOMPN

RN41

1K_0402_1%~D

+SPM_VREF1 +SPM_VREF2 +SPM_VREF

RN46

1K_0402_1%~D

UN2D

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS880M_FCBGA528

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

CN37

CN40

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC)

MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC)

MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC)

RN42

0.1U_0402_16V7K

RN47

0.1U_0402_16V7K

1K_0402_1%~D

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

SPM_DQ0 SPM_DQ1 SPM_DQ2 SPM_DQ3 SPM_DQ4 SPM_DQ5 SPM_DQ6 SPM_DQ7 SPM_DQ8 SPM_DQ9 SPM_DQ10 SPM_DQ11 SPM_DQ12 SPM_DQ13 SPM_DQ14 SPM_DQ15

SPM_DQS_P0 SPM_DQS_N0 SPM_DQS_P1 SPM_DQS_N1

SPM_DM0 SPM_DM1

+VDD_MUX_IOPLLVDD

+SPM_VREF

CN38

0.1U_0402_16V7K

CN41

0.1U_0402_16V7K

BLM18EG221SN1D_2P_0603

CN34

2.2U_0603_10V6K~D

RN43

RN48

1.8V 15mA

LN10

1K_0402_1%~D

1.1V 26mA

BLM18EG221SN1D_2P_0603

+1.8V_IOPLLVDD

+1.1VS

LN9

CN35

2.2U_0603_10V6K~D

+1.8VS

SA00003570L

RN49

1 2

0_0805_5%

CN42

A A

CN44

CN43

0.1U_0402_16V7K

CN45

1U_0402_6.3V6K

CN46

1U_0402_6.3V6K

CN47

10U_0603_6.3V6M

0_0805_5%

10U_0603_6.3V6M

+1.5VS+1.5V_SPM_VDDQ

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

RS880M SidePort DDR III

LA-6132P

14 45Tuesday, May 04, 2010

1.0

+ 31 hidden pages