Clarion NAX963HD, QY-5000E-A Service Manual

Service information
Control no.: 06SI010-R
CLARION Europa GmbH, Hessenring 19-21, 64546 Morfelden-Walldorf, ++49 6105 / 977-0 Fx / 977-100 06SI010-R 10.11.06 Page 1 of 2
HDD access error message
1) Model outline:
NAX963HD
2) Description: The navigation shows “ACCESS ERROR” on the display, as shown below.
3) Solution Reset the NAX963HD navigation unit to the factory setting by following
the below mentioned procedure:
1) Press “Menu” on the main unit.
2) Select “Settings” on the touch screen
3) Press “Next”
4) Select “ Service option”
5) Select “Reset to Factory Settings”
6) Press “OK”, when asked for.
Service information
Control no.: 06SI010-R
CLARION Europa GmbH, Hessenring 19-21, 64546 Morfelden-Walldorf, ++49 6105 / 977-0 Fx / 977-100 06SI010-R 10.11.06 Page 2 of 2
Attention:
All user data on the hard drive will be lost and the factory settings will be installed again. After the installation of the factory settings, the NAX963HD will start up automatically. It may happen that the NAX963HD show this error message again. In this case, switch off the unit and restart it manually. Now the error message shall not be shown again.
In case the error message will not disappear, a hardware defect on the unit is detected and the unit has to be exchanged via CEF.
NAX963HD
- 1 -
Service Manual
Published by Service Dept.
Printed in Japan
Clarion Co., Ltd.
50 Kamitoda, Toda-shi, Saitama 335-8511 Japan Service Dept.: 5-66 Azuma , Kitamoto-shi, Saitama 364-0007 Japan Tel: +81-48-541-2335 / 2432 FAX: +81-48-541-2703
298-6375-00
AUG.2006
Model
HDD Navigation System
(QY-5000E-A)
SPECIFICATIONS
Navigation System
GPS receiving frequency:
1575.42 MHz, C/A Code Sensibility: -130 dBm or better Number of GPS channels:
15 channels
Voice synthesis: ADPCM,
Sampling frequency;11.025 kHz Power supply voltage: +14V Ground: Negative Current consumption: less than 3.0A Dimensions(mm): 205(W)x29.5(H)x169(D)
GPS aerial
Mode: Microstrip flat aerial Dimensions(mm): 30.4(W)x11.7(H)x35.5(D) Impedance: 50 ohm
NOTES
About the hard disk drive
* Data saved to the hard disk drive may get lost in case of
a breakdown, malfunction, or other trouble of this unit.
Importing Data via USB Port
* Data may be broken when using USB memories sticks
in the following situation: When disconnecting the USB memory stick or turning the power off during writing or reading data. When affected by static electricity or elec­tric noises.
* Music files (MP3, WMA, etc.) stored in the USB memory
stick cannot be played back. ("Data" : Including the stored locations and their data, route data, data stored in the Favourite & Frequent List, setting data set from the Setting menu, and data imported from the USB memory stick (Wallpapers, Safety Cam­era locations, etc.)
* The special equipment is necessary to replace IC103. * We cannot supply PWB with component parts in
principle. When a circuit on PWB has failure, please repair it by component parts base. Parts which are not mentioned in service manual are not supplied.
* Specifications and design are subject to change without
notice for further improvement.
This product is a lead free model. Lead free solder is used in PWB stamped LF mark. Please keep the following conditions when you repair.
1. Use lead free solder. * Koki's lead free solder S3X-55M 0.6mm
(CLARION Parts No.642-0231-01)
* Koki's lead free solder S3X-55M 1.0mm
(CLARION Parts No.642-0231-02)
2. Use a nitrogen solder system.
3. Do not use "General solder" and "Lead free solder" together.
NAX963HD
- 2 -
To engineers in charge of repair or inspection of our products.
Before repair or inspection, make sure to follow the instructions so that customers and Engineers in charge of repair or inspection can avoid suffering any risk or injury.
1. Use specified parts. The system uses parts with special safety features against fire and voltage. Use only parts with equivalent characteristics when replacing them. The use of unspecified parts shall be regarded as remodeling for which we shall not be liable. The onus of product liability (PL) shall not be our responsibility in cases where an accident or failure is as a result of unspecified parts being used.
2. Place the parts and wiring back in their original positions after replacement or re-wiring. For proper circuit construction, use of insulation tubes, bond­ing, gaps to PWB, etc, is involved. The wiring connection and routing to the PWB are specially planned using clamps to keep away from heated and high voltage parts. Ensure that they are placed back in their original positions after repair or inspec­tion. If extended damage is caused due to negligence during re­pair, the legal responsibility shall be with the repairing com­pany.
3. Check for safety after repair. Check that the screws, parts and wires are put back securely in their original position after repair. Ensure for safety reasons there is no possibility of secondary ploblems around the re­paired spots. If extended damage is caused due to negligence of repair, the legal responsibility shall be with the repairing company.
4. Caution in removal and making wiring connection to the parts for the automobile. Disconnect the battery terminal after turning the ignition key off. If wrong wiring connections are made with the battery con­nected, a short circuit and/or fire may occur. If extensive dam­age is caused due to negligence of repair, the legal responsi­bility shall be with the repairing company.
5. Cautions in soldering Please do not spread liquid flux in soldering. Please do not wash the soldering point after soldering.
6. Cautions in soldering for chip capacitors Please solder the chip capacitors after pre-heating for replace­ment because they are very weak to heat. Please do not heat the chip capacitors with a soldering iron directly.
7. Cautions in handling for chip parts. Do not reuse removed chips even when no abnormality is ob­served in their appearance. Always replace them with new ones. (The chip parts include resistors, capacitors, diodes, tran­sistors, etc). Please make an operation test after replacement.
8. Cautions in handling flexible PWB Before working with a soldering iron, make sure that the iron tip temperature is around 270 . Take care not to apply the iron tip repeatedly(more than three times)to the same patterns. Also take care not to apply the tip with force.
9. Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power to the unit.
COMPONENTS
QY-5000E-A
1. Main unit ----------- 1
2. RDS-TMC amtenna ZCA-412-310 1
3. Microphone for voice control 081-0034-00 1
4. GPS antenna 096-0147-00 1
5. Power supply lead 854-6451-50 1 (5A Fuse 120-0050-00 1)
6. RGB cable(2.5m) 855-2433-01 1
7. CeNET cable(2.5m) 855-3421-90 1
8. Accessory bag ----------- 1
8-1. Electro-tap(for speed sensor) 060-0018-00 2 8-2. Electro-tap 060-0305-00 1 8-3. Mounting bracket 300-7362-03 2 8-4. Cord holder 321-1026-01 10 8-5. Canoe clip 335-2515-00 4 8-6. Waterproof rubber 345-7473-00 1 8-7. Double-sided tape for fastening the antenna
347-6369-00 1
8-8. Inatallation bolt(M4x6) 714-4006-8B 4
1 2 3
4 5 6
7
8
8-1 8-2 8-3
8-4 8-5 8-6
8-7 8-8
NAX963HD
- 3 -
The provider of RDS-TMC is not automatically selected.
Error Message Cause Remedy
USB memory device
ACCESS ERROR The USB memory device cannot be accessed.
The USB memory is not connected correctly.
Connect the USB memory again.
The USB memory is not recognised.
Connect another USB memory.
Hard Disk Drive
TEMP ERROR Cannot operate correctly due to high temperature. Please wait until temperature becomes normal again.
The HDD cannot be accessed because the temperature in the vehicle is extremely high
Please wait until the temperature becomes appropriate.
TEMP ERROR Cannot operate correctly due to low temperature. Please wait until temperature becomes normal again.
The HDD cannot be accessed because the temperature in the vehicle is extremely low
Please wait until the temperature becomes appropriate.
ACCESS ERROR Malfunction occured in the HDD. Please consult your nearest dealer.
The HDD cannot be accessed. The sectors or clusters of the HDD may be damaged.
Problem Check point Remedy
Connection of power cable
Connection of RGB cable Output of RGB signal
Output level of RGB signal
Dot clock
Connect power cable properly.
Confirm the frequency of the dot clock. (TP534)
Connect RGB cable properly.
Connect microphone properly.
Connect GPS antenna properly.
Connect antenna properly. Change the installation position.
Separate from the antenna of the vehicle. (especially, glass antenna)
Connect internal wiring (ANT700,ANT701) properly.
Connect speed pulse cable properly.
Connection of CeNET cable
Connect CeNET cable properly.
Power supply circuit
Confirm the output voltage of the power properly. TP1000 HDD_5V TP1001 D_5V TP1003 D_3.3V TP1008 DDR_2.5V TP1004 VCC 1.22V
Confirm the output of RGB signal. TP1115 R TP1116 G TP1114 R
Confirm the output level of RGB signal. TP1115 R TP1116 G TP1114 R
Confirm collector voltage of Q803. 0V : MUTE-ON
3.3V : MUTE-OFF
Confirm IC800. pin9(SDTO):Data output according to voice input. pin10(LRCK):11.025KHz pin11(MCLK):8.46MHz pin12(SCLK):705KHz
Confirm collector voltage of Q801. 0V : MUTE-ON
3.3V : MUTE-OFF
Confirm audio wave form of TP801(AD_IN).
Confirm an output signal of TP1105(ECC).
Confirm the power supply voltage. TP2101 R_TU8V TP2113 TUNER3.2V
Confirm the oscillation of X2102(10MHz) and output power of TP2209 (BU5V).
Measure pin1(VOUT) of Gyro(IC702) with the tester. Confirm the voltage. At geostationary: about 2.5V When sets are rotatedand: voltage moves.
Confirm IC801. pin1(LRCK):11.025KHz pin18(MCLK):8.46MHz pin19(BCLK):705KHz pin20(DIN):Data input
Confirm an analog aoudio signal output of pin12 of IC801.
HDD
Insert HDD, and put protecting.
Adjust the volume properly.
The color of the screen is defective.
Guide voice doesn't sound.
Volume level of guide voice Clock and data input of DAC(IC801)
Output of DAC(IC801) MUTE setting
Connection of microphone
Connection of speed pulse
Connection of GPS antenna
Connection of antenna Setting position of window antenna
Noise source in car (PC,DC/AC converter)
Connection of internal wiring
Wave form of speed pulse
Input signal of ADC(IC800) Clock and data output of ADC(IC800)
Gyro sensor
Stop the equipment that generates the noise.
Tuner Pack
RDS/TMC microcomputer Selection of "TMC Provider screen".
Select "Automatic".
Power indicator doesn't light. (The power supply doesn't enter).
Screen is not displayed.
Map is not displayed.
The car position doesn't move.
GPS reception is defective.
RDS-TMC reception is defective.
Voice recognition is defective.
TROUBLESHOOTING
ERROR MESSAGES
NAX963HD
- 4 -
IC403
SRAM
512KB
IC200,IC201,
IC202,IC203
DDR-SDRAM
128MB(256Mbx4)
IC400
DISK ON CHIP
64MB
IC800
ADC
SENSOR
I/F
J1102 J1103 P701
(Connector for production)
IC700
ADC
BL700
GPS
Tuner Pack
J701
IC702
GYRO
SENSOR
J800
MIC
IC803
FILTER
R/G/B
IC401
BUS BUFER
16
64
16
16
IC501
FPGA
CSYNC
IC103
CPU
IC602
BUS
BUFFER
2.5inch 30GB HARD DISK DRIVE
16
SCIF5
SCIF0
USB Host
ATAPI
RGB
DDR I/FEX-BUS
SSI0
SSI1
CS0
EX_CS0
8
H-UDI
JTAG
IC801
DAC
Control
IR IN
(96MHz)
(32MHz)
IC1102,IC1103
RGB
BUFFER
GUIDE
SIG.
TTS/WAVE (GUIDE VOICE)
VOICE RECOGNITION
16
X101
OSC
48MHz
X100
OSC
14.31818MHz
EXTALDOTCLKIN USBCLKAUDIO_CLK
CLKOUT
(CKIO)
32MHz
- FPGA
- DOC
- DEBUG CN
CLKIN(CKIO)
From SH7770
32MHz
EX_CS2
IC909
MICOM
IC912
IE-BUS
DRIVER
X900
XTAL
10MHz
IC802,IC804
BUFFER
SCIF2
UART
J500(Unmounting)
DEBUG CONNECTOR for Development
X102
OSC
8.46MHz
IC2105
MICOM
RDS-
DEMODURATOR
IC2102
BL2101
RDS/TMC Tuner
C2B
X2102
XTAL
10MHz
X2101
XTAL
4.33MHz
UART
UART
UART
SCIF7
16
EX_CS4
EX_CS7
EX_CS1
From SH7770
32MHz
From SH7770
32MHz
IC908
EEPROM
1Kbit
Note
RDS-TMC PWB Block
Main PWB Block
J1100 J1101
Control signal
Other signal
Video signal
Audio signal
㪧㪸㫉㪸㫃㫃㪼㫃㩷BUS
㪪㪼㫉㫀㪸㫃㩷㪺㫆㫄㫄㫌㫅㫀㪺㪸㫋㫀㫆㫅
CSYNC
TP
IC505
PLL
(9.1101MHz10.085663MHz)
PDOUT4FSCEXCLK
SCIF4
ANT AMP
RDS-TMC
ANT
GPS
ANT
POWER
SUPPLY
BLOCK
Q1100,Q1101,IC1100,IC1101
SENSOR I/F:
PKB,BACK,ECC
B/U
12V
IC502
BUFFER
MIC CON.
CeNET
CONN.
CeNET
CONN.
To RDS
CONNECT.
HDD
CONNECT.
USB
CON.
BU12V, PKB/BACK/ECC
CONNECTOR
RGB
CONNECTOR
SERIAL
CONNECTOR
BLOCK DIAGRAM
Video/Audio/Control block
NAX963HD
- 5 -
Debug
Connector
Reset Block
IC103
CPU
SH Navi1
/RESET
/RESET_OUT
SRAM
FPGA
HDD
ADC
(AK5357)
IC904
Detector
R3112N211A
IC900
Detector
R3112N211A
IC901
Detector
R3112N211A
HDD_5V DET.
10K
3.9K
3.3K
D_5V
DET VOLT(high):4.81V
DET VOLT(Low):4.58V
0.033uF
100
DDR_2.5V DET.
D_3.3V DET.
DDR
2.5V
0.033uF
100
Disk On Chip
/BUSY
/RSTIN
D_3.3V
D_3.3V
D_3.3V
D_3.3V
D_3.3V
Delay:150ms
1000pF1000pF
/PERI _RESET
47K
D_3.3V
D_5V
1000pF
100
D_3.3V
IC909
SUB
Micon
/RESET
/CPU_RST
100
1000pF
100
10K
/IDE_RST
82
100
/RESET_OUT
/RESET_IN
D_3.3V
100
16K
39K
D_3.3V
0.033uF
100
/NAVI_RESET
100
1000pF
47K
D_3.3V
100
1000pF
SN74ALVC08
(2/4)
SN74ALVC08
(3/4)
SN74ALVC08
(4/4)
SN74ALVC08
47K
10K
10K
/BASE_RESET
/SH_RESET_OUT
/DOC_RST IN
/NAVI_RESET
/DOC_BUSY
1000pF
1000pF
Delay:150ms
Delay:150ms
DET VOLT(high):2.20V
DET VOLT(Low):2.10V
DET VOLT(high):3.11V
DET VOLT(Low):2.96V
Reset block
NAX963HD
- 6 -
Power Detect Block
Micro
Controller
B/U 12V
IC903
Detector
R3111N271A
ACC_DET
BU_9V_DET
ACC DET.
/SYS-ACC
B/U DET.
/P_OFF
NAVI_PON
/BU-DET
Power supply ON/OFF SW
on Mian PWB
Power-OFF signal
from SH
B/U-VOLT watch signal
to SH
SN74LVC2G32
TC7S32FU
SN74LVC1G08
47K
4.7K
56K
24.7K
47K10K
10K
0.1u
Q900
2SA1586
47K
100
100
B/U_3.3V
B/U_3.3V
B/U_3.3V
B/U_3.3V
D_3.3V
Power supply
(Power circuit block)
B/U
DET. VOLT(high):9.26V
DET. VOLT(Low):8.82V
1SS355
1000pF
100
S-TV
Ce-net
Connector
ACC
IC103
SH-Navi1
NMI
IC909
SUB
Micro
Controller
/SHUTDOWN
100
47K
Shout down signal
by compulsion from microcomputer
1000pF
/P_OFF_B
/NMI_MONI
/SHUTDOWN
/BU_DET
1000pF
NMI
100
D_3.3V
SN74ALVC08(1/4)
GPIO2A20/TX9
GPIO2A22/CSK9
/NAVI_MONI
10K
D_3.3V
10K
D_3.3V
Power detect block
NAX963HD
- 7 -
Power circuit block
Power Circuit Block
CAR
BATTERY
IC1002
B/U_5V
TDA3664
Max. permissible current:100mA
Max. permissible current:150mA
Max. permissible
current:3000mA
[D_3.3V] , [D_5V] ON/OFF SW by VCC_1.22V
*
Setting of timing for core power of [Navi core-FPGA] and I/O power.
*
[D_5V] ON/OFF SW for protection of [Navi core] and [FPGA].
IC1000
B/U_3.3V
LM2954
IC1005
VCC_1.22V
DDR_2.5V
TPS5120
IC1003
HDD_5V
LM3485
IC1001 A_9V
BA09CC0WFP
10k
3.9k
10k
2SD1306
2SA2096
4700uF x 2
100(1/4W) x6
RDS PWB
NAVI_P_ON
Detector
2.20V Release
2.10V Det.
Detector
4.81V Release
4.58V Det.
Detector
3.11V Release
2.96V Det.
1.22V
2.5V
IC1006 D_3.3V
BD00KA5WFP
Coin
Battery
DC/DC (200kHz)
DC/DC (100kHz)
Linear
Linear
Linear
IC1004 A_5V
BA05CC0WFP
Vref
Logic
SRAM
GPS
Receiver
SHNavi1 FPGA
SHNavi1 DDR
DDR
HDD
SHNavi1 FPGA
Audio
DAC/ADC
USB
Sub Micon
GPS
Receiver
Gyro
Analog
circuit
Audio
DAC/ADC
Mic
RGB
Encoder
Logic
Max. permissible
current:3000mA
Max. permissible
current:500mA
Max. permissible
current:1000mA
Max. permissible
current:1000mA
Max. permissible
current:3000mA
10k
470
10k
2SC4081
2SB1188
220
Power supply circuit ON/OFF
SW on Navi PWB
RDS/TMC
Tuner
8.5uA typ.
120uA max.
85mA typ.
95mA max.
GPS
Receiver
Tuner
Micon
RDS De-
Modulator
105mA max.
500mA max.
40mA max.
20mA max.
(DataSheet)
13.5mA max.
(DataSheet)
30mA max.
(DataSheet)
30mA max.
(DataSheet)
2.2u
15k
(F)
15k
(F)
Linear
Linear
NAX963HD
- 8 -
5A Fuse
(120-0050-00)
Main power supply (Yellow)
Speed sensor (Pink)
Reverse gear signal (Purple/white) Ground (Black)
NAX963HD
Front view
(inside of Escutcheon)
Rear view
VRX868RVD
GPS antenna (096-0147-00)
Microphone for voice control
(081-0034-00) RDS-TMC antenna (ZCP-412-310)
Power supply lead
(854-6451-50)
RGB cable (855-2433-01)
CeNET cable (855-3421-90)
Handbrake (Green)
Connectors
Example of connecting to the VRX868RVD
HDD
1
RDS-TMC antenna recept.
3
1
2
3 4
Mic.jack
6
GPS antenna recept.
8
5
7
8
6
Power supply connector
2468
1357
4
1 2 3 4 5 6 7 8
N.C. PARKING BRAKE N.C. SPEED SENSOR GROUND REVERSE SIG. BATTERY (+) N.C.
RGB connector
3
7
5
6
8
2
1
4
7
1 2 3 4 5 6 7 8
B C-SYNC R N.C. N.C. G N.C. N.C.
1234
USB connector
2
1 2 3 4
5V D­D+ GND
CeNET connector
11 12
78910 3456 1132
5
1 2 3 4 5 6 7 8
GND SYS B/U L-CH(+) EXT(+) EXT(-) GUS(+) R-CH(+) R-CH(-)
9
10
11 12 13
SYS ACC BUS(-) L-CH(-) ILLUMI. N.C.
WIRE CONNECTION
NAX963HD
- 9 -
EXPLANATION OF IC
051-3304-90 LP2954IMX Voltage Regulator
Terminal Description
pin 1: Power out : O : DC power voltage output. pin 2: Sense : IN : The voltage regulator may be pin-strapped
for 5V operation using its internal resistive divider by tying the Output and Sense pins together.
pin 3: Shut Down_ : IN : A logic-level signal will shut off the regu-
lator output when aLOW (<1.2V) is
applied to the Shutdown input. pin 4: Ground : - : Ground. pin 5: Error_ : O : Error flag output. pin 6: 5V-TAP : IN : The voltage regulator may be pin-strapped
for 5V operation using its internal resistive
divider by tying the Feedback pin and 5V-
Tap pins together. pin 7: Feed back : IN : Feed back voltage input. pin 8: INPUT : IN : Positive power supply input.
051-3356-90 BD00KA5WFP
Positive Voltage Regurator(Adjustable)
051-3377-90 LM3485MM Hysteretic PFET Buck Controller
General Description
The LM3485 is a high efficiency PFET switching regulator controller that can be used to quickly and easily develop a small, low cost, switching buck regulator for a wide range of applications.
The hysteretic control architecture provides for simple design without any control loop stability concerns using a wide variety of external components.
The PFET architecture also allows for low component count as well as ultra-low dropout, 100% duty cycle operation.
Another benefit is high efficiency operation at light loads without an increase in output ripple.
Current limit protection is provided by measuring the voltage across the PFET's RDS(ON), thus eliminating the need for a sense resistor.
The cycle-by-cycle current limit can be adjusted with a single resis­tor, ensuring safe operation over a range of output currents.
Terminal Description
pin 1: I SENSE : The current sense input pin. This pin should
be connected to Drain node of the external PFET.
pin 2: GND : Signal ground.
8 7 6 5
INPUT FEEDBACK 5V TAP ERROR_
1 2 3 4
OUTPUT
SENSE
SHUTDOWN_
GROUND
5.
4.
3.
2.
1.
Adjust Output N.C. Vcc On/Off (H=ON)
FinGround
R1
R2
Vc Vo
I SENSE
GND
NC
FB
1 2 3 4
V IN P GATE PWR GND ADJ
8 7 6 5
pin 3: NC : No connection. pin 4: FB : The feedback input. Connect the FB to a
resistor voltage divider between the output and GND for an adjustable output voltage.
pin 5: ADJ : Current limit threshold adjustment. It con-
nects to an internal 5.5uA current source. A resistor is connected between this pin and the input Power Supply. The voltage across this resistor is compared with the VDS of the external PFET to determine if an over-current
condition has occurred. pin 6: PWR GND : Power ground. pin 7: P GATE : Gate Drive output for the external PFET.
PGATE swings between VIN and VIN-5V. pin 8: V I N : Power supply input pin.
051-3380-90 TPS5120DBTRG4
Dual output, Two-phase synchronous buck DC/DC controller
Terminal Description
pin 1: INV 1 : IN : Inverting input of CH 1 error amplifier, skip
comparator, and OVP1/UVP1 comparator. pin 2 : F B 1 : O : Feedback output of CH 1 error amplifier. pin 3 : SOFT START 1 :I/O: Soft start pin for CH1. pin 4: PWM/SKIP :IN: PWM/SKIP mode select pin. pin 5: CT :I/O:External capacitor from CT to GND for
adjusting the triangle oscillator. pin 6 : 5V STBY : IN : 5V linear regulator output. pin 7: GND : - : Control ground. pin 8 : REF : O : 0.85V reference voltage output. pin 9 : STBY 1 : IN : Standby control for CH1. pin 10: STBY 2 : IN: Standby control for CH2. pin 11 : FLT :I/O: Fault latch timer pin. pin 12 : POWER GOOD : O : Power good open-drain output. pin 13: SOFT START 2 :I/O: Soft start pin for CH2. pin 14 : FB 2 : O : Feedback output of CH 2 error amplifier. pin 15: INV 2 : IN : Inverting input of CH 2 error amplifier, skip
comparator, and OVP2/UVP2 comparator. pin 16: LH 2 :I/O:Bootstrap capacitor connection for CH2
high-side gate drive. pin 17: OUT 2u : O : Gate drive output for CH2 high-side
switching FETs. pin 18: LL 2 :I/O: Bootstrap this pin for CH2 high-side gate
driving return and output current protec-
tion. Connect this pin to the junction of
the high-side FETs for a floating drive
configuration. pin 19: OUT 2d : O : Gate drive output for CH2 low side gate
drive. pin 20: OUT GND 2 : - : Ground for CH1 FET drivers. pin 21: REG 5V IN :IN : External 5V input. pin 22: Vref 5 : O : 5V internal regulator output. pin 23: TRIP 2 : IN : External resistor connection for CH2 out-
put current control. pin 24 : VCC : - : Supply voltage input. pin 25: TRIP 1 : IN : External resistor connection for CH1 out-
put current control. pin 26: OUT GND 1 : - : Ground for CH1 FET drivers. pin 27: OUT 1d : O : Gate drive output for CH1 low side gate
drive. pin 28: LL 1 :I/O: Bootstrap this pin for CH1 high-side gate
driving return and output current protec-
tion. Connect this pin to the junction of
the high-side FETs for a floating drive
configuration. pin 29: OUT 1u : O : Gate drive output for CH1 high-side
switching FETs. pin 30: LH 1 :I/O:Bootstrap capacitor connection for CH1
high-side gate drive.
NAX963HD
- 10 -
051-5344-90 NJM2267V-TE2 Dual Video Driver
051-5408-38 R3112N211A-TR-FA
Voltage Drop Detector 2.1V
Terminal description
pin 1: OUTPUT : N channel open drain output.
This terminal will output L, if the voltage of
VDD becomes lower than the setting voltage. pin 2: VDD : Positive supply voltage. pin 3: GND : Ground. pin 4: N.C. : Not in use. pin 5: C.T. : Delay time capacitor connection.
051-5418-28 R3111N271A-TR-FA
Precision Voltage Down Detector 2.7V
Terminal description
pin 1: OUTPUT : N channel open drain output.
This terminal will output L, if the voltage of
VDD becomes lower than the setting voltage. pin 2: VDD : Positive supply voltage, negative logic input. pin 3: GND : Ground. pin 4: NC : Not in use. pin 5: NC : Not in use.
051-6650-90 NB2305AT1HDR2G 3.3V Zero Delay Clock Buffer
Terminal Description
pin 1: REF : Input reference frequency, 5 V tolerant input. pin 2: CLK 2 : Buffered clock output. pin 3: CLK 1 : Buffered clock output. pin 4: GND : Ground. pin 5: CLK 3 : Buffered clock output. pin 6: VDD : 3.3 V supply. pin 7: CLK 4 : Buffered clock output. pin 8: CLK OUT : Buffered clock output, internal feedback on
this pin.
6dB
75ohm Driver
750
ohm
2.0k
ohm
2.2k ohm
1
4
3
6dB
75ohm Driver
750
ohm
2.0k
ohm
2.2k ohm
8
5
6
7 2
GNDVCC
1 2 3
54C.T.
N.C.
OUTPUT VDD GND
1 2 3
54N.C.
N.C.
OUTPUT VDD GND
CLK OUT
CLK 4
VDD
CLK 3
8
7
6
5
REF
CLK 2
CLK 1
GND
1
2
3
4
PLL
Bit CK IN 19
LR CK IN 1
DATA IN 20
Vref P 5
Vref N 6
V MID 8
Audio
Interface
Digital
Filters
DAC
Vout L P12 Vout L N11
DAC
Vout R P9 Vout R N10
A VDD 4
A GND 7
Serial data IN 14
LATCH IN 13
Serial CK IN 15
Control
Interface
Zero Flag L17 Zero Flag R16
Master Clock 18
D VDD2 D GND3
051-6834-00 XC3S50-4VQG100I-0985 FPGA
Terminal Description
pin 1: A20 : Address input. pin 2: A19 : Address input. pin 3: GND : Ground. pin 4: A18 : Address input. pin 5: A5 : Address input. pin 6: VCCO : 3.3V power supply for IC. pin 7: VCCAUX : 2.5V power supply for AUX. pin 8: A4 : Address input. pin 9: A3 : Address input. pin 10: GND :Ground. pin 11: A2 : Address input. pin 12: A1 : Address input.
051-6718-90 AK5357VT-E2 96kHz 24Bit ADC
Terminal Description
pin 1 : A IN R : IN: R channel audio signal input. pin 2 : A IN L : IN: L channel audio signal input. pin 3 : CK S 1 : IN: Clock Mode select. pin 4 : V COMMON : O : Common voltage output = A VDD/2 pin 5: A G ND : - : Analog ground. pin 6: A VDD : - : Positive voltage supply for analog section. pin 7 : D VDD : - : Positive voltage supply for digital section. pin 8: D G ND : - : Digital ground. pin 9 : SDO : O : Audio Serial data output. pin 10: LR CK I/O :I/O: Output channel clock. L output in Master
Mode at Power-down mode. pin 11 : MASTER CLK : IN : Master clock input. pin 12: S CLK :I/O: Audio Serial data clock input. L output in
Master Mode at Power-down mode. pin 13: PDN : IN : Power down & reset signal input.
L = Power-down mode. pin 14 : DIF : IN: Audio interface format.
H = 24bit I2S compatible
L = 24bit MSB justified pin 15 : CK S 2 : IN: Clock Mode select. pin 16 : CK S 0 : IN: Clock Mode select.
051-6731-90 WM8718SEDS/R
24 bit Differential Stereo DAC with Volume control
NAX963HD
- 11 -
pin 13: D15 : Data input/output. pin 14: D14 : Data input/output. pin 15: D13 : Data input/output. pin 16: D12 : Data input/output. pin 17: D11 : Data input/output. pin 18: VCCINT : 1.2V power supply for Core. pin 19: VCCO :3.3V power supply for IC. pin 20: GND :Ground. pin 21: D10 : Data input/output. pin 22: D9 : Data input/output. pin 23: D8 : Data input/output. pin 24: M1 : Configuration mode setting. pin 25: M0 : Configuration mode setting. pin 26: M2 : Configuration mode setting. pin 27: CS_B : For Configuration. pin 28: RDWR_B : Read/Write signal input. pin 29: GND :Ground. pin 30: D7 : Data input/output. pin 31: VCCO :3.3V power supply for IC. pin 32: D6 : Data input/output. pin 33: VCCAUX :2.5V power supply for AUX. pin 34: D5 : Data input/output. pin 35: D4 : Data input/output. pin 36: NC : Not in use. pin 37: NC : Not in use. pin 38: N_SH_RDY : Ready signal output for CPU. pin 39: CKIO : Clock input. pin 40: NC : Not in use. pin 41: GND :Ground. pin 42: INIT_B : For Configuration. pin 43: D3 : Data input/output. pin 44: D2 : Data input/output. pin 45: VCCINT : 1.2V power supply for Core. pin 46: VCCO :3.3V power supply for IC. pin 47: D1 : Data input/output. pin 48: D0 : Data input/output. pin 49: N_WE1 : Write enable input. pin 50: N_WE0 : Write enable input. pin 51: DONE : High output after configuration. pin 52: CCLK : Configuration clock input. pin 53: N_RD : Read signal input. pin 54: N_CS_FPGA : Chip select input. pin 55: NC : Not in use. pin 56: GND :Ground. pin 57: VCCO :3.3V power supply for IC. pin 58: VCCAUX :2.5V power supply for AUX. pin 59: NC : Not in use. pin 60: NC : Not in use. pin 61: NC : Not in use. pin 62: N_EIRQ1 : Interrupt signal output for CPU. pin 63: NC : Not in use. pin 64: NC : Not in use. pin 65: VOL_DATA : Data output to Audio-ADC. pin 66: GND :Ground. pin 67: VOL_CLK : Clock output to Audio-ADC. pin 68: VOL_CS :Chip select output to Audio-ADC. pin 69: VCCINT : 1.2V power supply for Core. pin 70: VCCO :3.3V power supply for IC. pin 71: EXTCONT : EXT-AUDIO ON/OFF signal for CeNET. pin 72: N_MUTE : Audio mute. pin 73: GND :Ground. pin 74: N_ILL : Illumination detect. pin 75: NC : Not in use. pin 76 : TDO : For JTAG. pin 77 : TCK : For JTAG. pin 78 : TMS : For JTAG. pin 79: GYRO_DATA : Data input from GYRO-ADC.
pin 80: ADC_CLK : Clock output to GYRO-ADC. pin 81: ADC_CS : Chip select output to GYRO-ADC. pin 82: GND :Ground. pin 83: VCCO :3.3V power supply for IC. pin 84: VCCAUX :2.5V power supply for AUX. pin 85: PKB : Parking signal input. pin 86: N_BACK : Back signal input. pin 87: NC : Not in use. pin 88: NC : Not in use. pin 89: NC : Not in use. pin 90: N_RESETI : Reset input. pin 91: SPEED_IN : Speed pulse input. pin 92: NC : Not in use. pin 93: VCCINT : 1.2V power supply for Core. pin 94: VCCO :3.3V power supply for IC. pin 95: GND :Ground. pin 96: A22 : Address input. pin 97: A21 : Address input. pin 98: HSWAP_EN : For Configuration. pin 99: PROG_B : For Configuration. pin100: TDI : For JTAG.
051-6921-90 TPS2041BDGNR
SINGLE, CURRENT-LIMITED, POWER-DISTRIBUTION SWITCH
OC_ ( pin 5 ): Overcurrent and overtemperature false re-
porting, active-low, open-drain output.
051-6923-08 ADCS7476AIMF 1 M SPS 12 bit ADC
051-7289-90 MC74HC4046ADT PLL
Terminal Description
pin 1: PC P OUT : Phase Comparator Pulse Output pin 2: PC 1 OUT : Phase Comparator 1 Output pin 3: COMP IN : Comparator Input pin 4: VCO OUT : VCO Output pin 5: INH : Inhibit Input pin 6: C 1 A : Capacitor C1 Connection A pin 7: C 1 B : Capacitor C1 Connection B pin 8: GND : Ground (0 V) VSS pin 9: VCO IN : VCO Input pin 10 : DEM OUT : Demodulator Output pin 11: R 1 : Resistor R1 Connection pin 12: R 2 : Resistor R2 Connection pin 13 : PC 2 OUT : Phase Comparator 2 Output pin 14: SIG IN : Signal Input pin 15 : PC 3 OUT : Phase Comparator 3 Output pin 16: VCC : Positive Supply Voltage
1
2
3
4
OUT
OUT
OUT
OC_
GND
IN
IN
EN_ ( L = Switch ON )
8
7
6
5
LOGIC
6
5
4
Chip Select input
Serial data output
Clock pulse input
1
2
3
VDD
GND
Analog signal input : Vin
NAX963HD
- 12 -
051-7529-90 SN74LVC541APW Octal Bus Buffer
Truth Table
Switch G 1 ( pin 1 ) G 2 ( pin 19 ) OFF H H OFF H L OFF L H ON L L
051-7534-90 SN74LVC1G97DCKR
Configurable Multiple-function Gate
Truth Table
Y IN 2 IN 1 IN 0 L L L L L L L H H L H L H L H H L H L L H H L H L H H L H H H H
051-7537-90 SN74LVC1G14DCKR
Single Schmitt-Trigger Inverter Gate
051-7539-90 SN74LVC3G34DCTR Triple Buffers
051-7503-78 SN74LVCHR16245AGR 8 x 2 Bus Transceiver
Truth Table
OE_ DIR SW 1 SW 2
L L ON OFF L H OFF ON H L OFF OFF H H OFF OFF
051-7505-08 SN74LV08APWR Quad 2-input AND Gate 051-7505-18 SN74ALVC08PWR Quad 2-input AND Gate
051-7520-08 SN74LVC1G04DCKR Single Inverter
051-7522-08 SN74LVC1G32DCKR Single 2-inputs OR Gate
051-7524-08 SN74LVC1G08DCK Single 2-inputs AND GATE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48
47 46 45 44 43 42 41 40 39 38 37
36 35 34 33 32 31 30 29 28 27 26 25
SW-1SW-2
Logic
SW-1SW-2
Logic
DIR 1
GND
VDD
GND
GND
GND
GND
GND
GND
GND
VDD VDD
VDD
OE 1_
OE 2_DIR 2
14
13
12
11
10
9
8
1
2
3
4
5
6
7
GND
VDD
1 2 3
54VCC
OUT
NC
IN
GND
1 2 3
54VCC
GND
1 2 3
54VCC
GND
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
GROUND
G1
VCC
G2
Logic
IN 2 VCC Y
6 5 4
IN 1
GND
IN 0
1 2 3
IN 0 3
IN 1 1
IN 2 6
Y4
1 2 3
N.C.
GND
54VCC
8
7
6
5
GND
VDD
1
2
3
4
Loading...
+ 30 hidden pages