Clarion DRZ9255-00 Service Manual

(DRZ9255)
Clarion Co., Ltd.
50 Kamitoda, Toda-shi, Saitama 335-8511 Japan Service Dept.: 5-66 Azuma , Kitamoto-shi, Saitama 364-0007 Japan Tel: +81-48-541-2335 / 2432 FAX: +81-48-541-2703
Published by Service Dept.
298-6163-00
Printed in Japan
Jun.2004 P
Service Manual
High-Fidelity AM/FM CD Player
Model
(PE-2628B-A / For U.S.A.)
Model
P O
W
B A
E
TT
R
ER
S
U
Y
P P
L
G
Y
R
O
U N
D
(PE-2628K-A / For other countries)
SPECIFICATIONS
FM tuner section
Frequency range: 87.9MHz to 107.9MHz(U.S.A.)
87.0MHz to 108.0MHz(OTHERS) Usable sensitivity: 9dBf 50dB quieting sensitivity: 15dBf Alternate channel selectivity:
70dB Stereo separation: 35dB (1kHz) Frequency response: 30Hz to 15kHz (+/-3dB)
AM tuner section
Frequency range: 530kHz to 1710kHz(U.S.A.)
531kHz to 1629kHz(OTHERS) Usable sensitivity: 25uV
CD player section
System: Compact disc digital audio system Usable discs: Compact disc Frequency response: 5Hz to 20kHz (+/-1dB) S/N ratio: 112dB (1kHz) Dynamic range: 100dB (1kHz) Distortion: 0.003%(20Hz to 20kHz)
Audio section
Bass control action: +/-12dB (50Hz) Treble control action: +/-12dB (10kHz) Line output level: Vol.0dB=4V
Vol.+6dB=8V(Max)
(CD 1kHz)
DSP/DAC
A/D conversion: 24-bit 64x oversampling
A/D converter D/A conversion: 96kHz/24-bit advanced segment
D/A converter
8x oversampling digital filter Blocked band attenuation:
-130 dB
Transmitted band attenuation:
+/-0.00001dB Sampling rate converter Input sampling rate: fs32k, fs44.1k, fs48k,fs96k Output sampling rate: fs48k, fs96k DSP: 24-bit audio DSP, 34-bit arithmetic
operation (overflow margin 4-bit)
General
Power supply voltage: 14.4V DC(10.8V to 15.6V allow-
able) negative ground Current consumption: Less than 5A Dimensions(mm) Source unit: 178(W)x50(H)x155(D) DC-DC converter: 163(W)x42(H)x98(D) Remote control unit: 52(W)x125(H)x12(D) Weight Source unit: 1.8kg DC-DC converter: 700g Remote control unit: 50g(including battery)
NOTES
* Use only compact discs bearing the or mark.Do
not play heart-shaped, octagonal, or other specially shaped compact discs. Some CDs recorded in CD-R/CD-RW mode may not be usable.
* We cannot supply PWB with component parts in principle.
When a circuit on PWB has failure, please repair it by component parts base. Parts which are not mentioned in service manual are not supplied.
* Specifications and design are subject to change without
notice for further improvement.
- 1 -
DRZ9255
HX-D2
COMPONENTS
PE-2628B-A,PE-2628K-A
1. Main unit ----------- 1
2. DC-DC converter EE-1236B-A 1
3. Rmote controller RCB-169-600 1
4. Battery(CR2025) ----------- 1
5. Strap 300-4976-00 1
6. Universal MTG-bracket 300-9035-01 1
7. Outer escutcheon 370-6116-00 1
8. 16-Pin extension lead(1.5m) 854-6428-00 1 (Fuse 3A 120-0030-00 1 )
9. Memory B/U lead(YEL:3.5m) 854-6423-01 1 (Fuse 10A 060-0057-56 1 )
CAUTIONS
Use of controls, adjustment or performance of procedures other than those specified herein, may result in hazardous radiation exposure. The COMPACT DISC player should not be adjusted or re­paired by anyone except properly qualified service person­nel.
10. Ground lead(BLK:1.5m) 854-6424-01 1
11. Parts bag for DC-DC converter ----------- 1 11-1. Mounting bracket 300-7362-02 2 11-2. Terminal cover 345-7403-00 1 11-3. Tapping screw 700-5016-89 4 11-4. Machine screw(M5x8) 714-4008-89 4 11-5. Plate nut 725-0216-00 4
12. Parts bag for source unit ----------- 1 12-1. Hook plate 330-8216-03 2 12-2. Lead holder 335-0833-03 1 12-3. Hexagonal screw(M5x8) 716-0496-01 1
MODEL
12V GROUND
AM 530 -1710kHz /FM 87.9 -107.9MHz
THIS DEVICE COMPLIES WITH PART 15 OF THE FCC RULES. OPERATION IS SUBJECT TO THE FOLLOWING TWO CONDITIONS: (1) THIS DEVICE MAY NOT CAUSE HARMFUL INTERFERENCE, AND (2) THIS DEVICE MUST ACCEPT ANY INTERFERENCE RECEIVED, INCLUDING INTERFERENCE THAT MAY CAUSE UNDESIRED OPERATION.
THIS PRODUCTION COMPLIES WITH DHHS RULES 21 CFR SUBCHAPTER J APPLICABLE AT DATE OF MANUFACTURE.
CLARION CO.,LTD. 50 KAMITODA,TODA-SHI,SAITAMA-KEN,JAPAN
MANUFACTURED:
To engineers in charge of repair or in­spection of our products.
Before repair or inspection, make sure to follow the instructions so that customers and Engineers in charge of repair or inspection can avoid suffering any risk or injury.
1. Use specified parts. The system uses parts with special safety features against fire and voltage. Use only parts with equivalent character­istics when replacing them. The use of unspecified parts shall be regarded as remod­eling for which we shall not be liable. The onus of product liability (PL) shall not be our responsibility in cases where an accident or failure is as a result of unspecified parts being used.
2. Place the parts and wiring back in their original positions after replacement or re-wiring. For proper circuit construction, use of insulation tubes, bonding, gaps to PWB, etc, is involved. The wiring connec­tion and routing to the PWB are specially planned using clamps to keep away from heated and high voltage parts. Ensure that they are placed back in their original positions after repair or inspection. If extended damage is caused due to negligence during repair, the legal responsibility shall be with the repairing company.
3. Check for safety after repair. Check that the screws, parts and wires are put back se­curely in their original position after repair. Ensure for safety reasons there is no possibility of secondary ploblems around the repaired spots. If extended damage is caused due to negligence of repair, the legal responsibility shall be with the repairing company.
DRZ9255
HX-D2
SERIAL No. PE-
Clarion Co.,Ltd. MADE IN
Bottom View of DRZ9255
4. Caution in removal and making wiring connection to the parts for the automobile. Disconnect the battery terminal after turning the ignition key off. If wrong wiring connections are made with the battery connected, a short circuit and/or fire may occur. If extensive damage is caused due to negligence of repair, the legal responsibility shall be with the repairing company.
5. Cautions regarding chips. Do not reuse removed chips even when no abnormality is observed in their appearance. Always replace them with new ones. (The chip parts include resistors, capacitors, diodes, transistors, etc). The negative pole of tantalum capacitors is highly susceptible to heat, so use special care when replacing them and check the operation afterwards.
6. Cautions in handling flexible PWB Before working with a soldering iron, make sure that the iron tip temperature is around 270
. Take care not to ap­ply the iron tip repeatedly(more than three times)to the same patterns. Also take care not to apply the tip with force.
7. Turn the unit OFF during disassembly and parts replace­ment. Recheck all work before you apply power to the unit.
8. Cautions in checking that the optical pickup lights up. The laser is focused on the disc reflection surface through the lens of the optical pickup. When checking that the la­ser optical diode lights up, keep your eyes more than 30cms away from the lens. Prolonged viewing of the laser within 30cms may damage your eyesight.
9. Cautions in handling the optical pickup The laser diode of the optical pickup can be damaged by electrostatic charge caused by your clothes and body. Make sure to avoid electrostatic charges on your clothes or body, or discharge static electricity before handling the optical pickup.
- 2 -
ERROR 2
ERROR 3
ERROR 2
ERROR 3
ERROR 6
ERROR 2
ERROR 3
ERROR 6
ERROR P
ERROR R
A CD is caught inside the CD deck and is not ejected.
A CD cannot be played due to scratches,etc.
A CD inside the CD changer is not loaded.
A CD inside the CD changer cannot be played due to scratches, etc.
A CD inside the CD changer cannot be played because it is loaded upside-down.
A DISC inside the DVD changer cannot be played.
A DISC cannot be played due to scratches,etc.
A DISC inside the DVD changer cannot be played because it is loaded upside-down.
Parental level error
Region code error
This is a failure of CD deck's mechanism.
Replace with a non-scratched,non-warped-disc.
This is a failure of CD changer's mechanism.
Replace with a non-scratched, non-warped disc.
Eject the disc then reload it properly.
This is a failure of DVD mechanism.
Retry or replace with a non-scratched, non-warped-disc.
Eject the disc then reload it properly.
Set the correct Parental level.
Eject the disc and replace correct region code disc.
CD
DVD changer
CD changer
Cause MeasureError Display
If an error display other than the ones described above appears, press the reset button.
Reset button
9-1. Laser diode
The laser diode terminals are shorted for transporta­tion in order to prevent electrostatic damage. After replacement, open the shorted circuit. When remov­ing the pickup from the mechanism, short the terminals by soldering them to prevent this damage.
9-2. Actuator
The actuator has a powerful magnetic circuit. If a
magnetic material is put close to it. Its character­istics will change. Ensure that no foreign sub­stances enter through the ventilation slots in the cover.
9-3. Cleaning the lens
Dust on the optical lens affects performance. To clean the lens, apply a small amount of isopropyl alcohol to lens paper and wipe the lens gently.
SYSTEM CHECK
The first time this unit is turned on after the wire connections are completed, it must be checked what equipment is con­nected. When the power is turned on,
SYSTEM CHK
and Push POWERappear in the display alternately, so press the [FUNC] button. The system check starts within the unit. When the system check is complete, press the [FUNC] button again.
ERROR DISPLAYS
If an error occurs, one of the following displays is displayed. Take the measures described below to eliminate the problem.
Digital wiring
When the optical digital cable is connected to or discon­nected from this set later, press the function button while holding down direct buttons [1] and [6] with the power OFF to perform a system check. Though pressing the reset button also performs a system check, the contents of memory will be erased completely in this case.
- 3 -
DRZ9255
HX-D2
WIRE CONNECTIONS
Red
White
Red
White
Black
Antenna input
AUX INPUT-1 Right
AUX INPUT-1 Left
AUX INPUT-2 Right
AUX INPUT-2 Left
To external unit
Source unit
Red
White
Red
White
Red
White
Red
White
HIGH Right
HIGH Left
MID/FRONT Right
MID/FRONT Left
LOW/REAR Right
LOW/REAR Left
Subwoofer Right
Subwoofer Left
To external amplifier
Digital input/output
Optical digital cable
16-Pin Connector Extension Lead 1.5m
Brown wire(phone mute lead)
Yellow wire(Bus power lead)
Fuse(3A)
Red wire(Power lead)
Blue/White wire(Amplifier turn-on lead)
Orange/White wire(Illumination lead)
Blue wire(Auto antenna lead)
Black
Connect directly to battery.
Accessory +12V
Connect to the car power supply terminal for illumination.
CeNET input
Connect to cellular phone mute lead.
Connect to remote turn-on lead of amplifier.
Connect it to the car supply terminal for the antenna.
CeNET cable
10-Pin Connector
DC-DC Converter
Fuse(5A)
Black wire(Ground lead)1.5m
Fuse(10A)
Yellow wire(Memory back-up lead)3.5m
Terminal Cover Place the terminal cover on the terminals to prevent a short circuit.
Terminal Cover
Connect to vehicle chassis ground.
Connect the terminal on the main power cord to the car battery(+) terminal.
BLOCK DIAGRAM
Audio line sction
CD Mechanism
DRZ9255
HX-D2
IC903
DIGITAL DIGITAL DIGITAL DIGITAL
Digital Interface Receiver
IC401
ANALOG ANALOG ANALOG
IC406
I/V Converter
IC915
Sampling
-rate Converter
IC407 IC410
Low-pass Filter
IC913
Digital Signal Processor
IC918 S-RAM
IC418 IC421
High-quality Electrical Volume
IC250 DC/DC Converter
- 4 -
+
-
15V
IC909 IC911
24bit D/A Converter
ANALOG
8ch Line-out
Hi
Mid
Low
Sub-woofer
System section
PHONE INT
DC/DC PWB
RCA LINEOUT
5V STB
Q603
INT
PHONE
MASTER
IC200
POWER SUPPLY
U-COM
2.1V
DET
DET
ILL+B
KEY ILL
S718
VOL
IC912
CLK IC
DRIVER
STB
3.3V
EXPANDER
SW PWB
ISOLAT
ISOLAT
5V STB
CD MECH
DIGITAL IN
- 5 -
DRZ9255
HX-D2
EXPLANATION OF IC
052-3393-00 M30622MEP-161GP System Controller
Terminal Description
pin 1: CD SBSY : IN : The sub Q data request command input
pin 2: TIME BASE : IN : Time base pulse input. pin 3: DSP RDY : IN: Ready signal input from the DSP IC. pin 4: NU : - : Not in use. pin 5: REMOCON : IN: Remote controller signal input terminal. pin 6: BYTE : IN : The data length selection(8bit/16bit). pin 7: CN VSS :IN : Connect to VSS. pin 8: INIT 1 : IN : Destination setting input. Refer Table 1. pin 9: INIT 2 : IN : Destination setting input. Refer Table 1. pin 10: RESET :IN : Reset signal input. pin 11: X out : O : Crystal connection. pin 12: VSS : - : Negative voltage supply. pin 13: X IN : IN : Crystal connection. pin 14: VCC : - : Positive voltage supply. pin 15: NU : - : Not in use. pin 16: ACC DET :IN : ACC detection signal input. pin 17: B U DET : IN : Backup detection signal input. pin 18: KEY INT : IN : Key interrupting signal input. pin 19: 27pinConnect :IN : Connect to pin 27. pin 20: VFD BLANK : O : Blank pulse output to the VFD driver. pin 21: BUS IN/out : O : The audio signal control for Ce-NET. pin 22: BEEP : O : Beep out. pin 23: E VOL CS : O : The chip select signal output to Electric
pin 24: E VOL SD : O : The serial data output to Electric Volume
pin 25 : E VOL SCLK : O : The serial clock output to Electric Volume
pin 26: CLK REF : O : Reference clock pulse output. pin 27 : IE BUS RX : IN : IE Bus serial data input. pin 28 : IE BUS TX : O : IE Bus serial data output. pin 29: EMULATOR TX : O : The serial data output to the emulator. pin 30: EMULATOR RX : IN : The serial data input from the emulator. pin 31: CONNECT G : - : Connect to the ground. pin 32: NU : - : Not in use. pin 33: VFD SO : O : The serial data output to the VFD driver. pin 34: NU : - : Not in use. pin 35: VFD CLK : O : The clock pulse output to the VFD driver. pin 36: VFD LAT : O : The latch strove signal output to the VFD
pin 37: JOG CW : IN : Jog key signal input. pin 38 : JOG CCW : IN: Jog key signal input. pin 39: CONNECT G : - : Connect to the ground. pin 40: CATS LED : O : CATS LED drive output. pin 41: KEY Set : O : Set signal output to the key scan IC. pin 42: KEY CHIP SEL : O : The chip select signal output to the key
pin 43: KEY CLK : O : The clock pulse output for the key scan IC. pin 44: CONNECT G : - : Connect to the ground. pin 45: KEY DI : IN : Key scan data input. pin 46: KEY DO : O : The serial data output to the Key scan IC. pin 47: LD MUTE : O : Muting signal output to the CD mechanism. pin 48: LD CONT : O : The laser diode control signal output. pin 49: CD TR A : IN : The photo sensor signal input from the CD
pin 50: CD TR B : IN : The photo sensor signal input from the CD
pin 51: CD CHK SW : IN: CD disc chucking signal input. pin 52: CD SSTOP : IN: At loading, detects the chucking. And next,
pin 53: CD RESET : O : The reset pulse output to the CD IC. pin 54: CD CCE : O : The chip enable signal output to the CD
pin 55: CD BU CK : O : CD IC clock pulse output. pin 56: CD BUS 3 :I/O: The data bus. pin 57: CD BUS 2 :I/O: The data bus. pin 58: CD BUS 1 :I/O: The data bus. pin 59: CD BUS 0 :I/O: The data bus.
from the CD IC.
Volume IC.
IC.
IC.
driver.
scan IC.
mechanism.
mechanism.
detects the inside limit of the pick up po­sition.
IC.
pin 60: VCC : - : Positive voltage supply. pin 61: CD 5V : O : 5V power supply ON signal output for CD. pin 62: VSS : - : Negative voltage supply. pin 63: REG CTRL : O : Power supply IC control signal output. pin 64: 5V REM : O : 5V power supply ON signal output. pin 65: PLL SI : IN : Serial data input from the PLL IC. pin 66: PLL SO : O : Serial data output to the PLL IC. pin 67: PLL SCK : O : The clock pulse output to the PLL IC. pin 68 : PLL CE : O : The chip enable signal output to the PLL
pin 69: ST SD : IN: At receiving the FM station, this port de-
pin 70: VFD DD ON : O : VFD DD converter ON signal output. pin 71: ILL DET : IN : Illumination ON signal input. pin 72: DIR ERF :IN : Unlock & Parity error flag input from the
pin 73: PHONE INT : IN : The telephone interrupt signal input. pin 74: AUTO ANT : O : Motor antenna control signal output. pin 75: AMP REM : O : Standby signal output to Audio power am-
pin 76: DIG In/Out sel : O : Digital input/output selection. pin 77: SYS MUTE : O : System muting signal output. pin 78: PRE MUTE : O : Pre-mute signal output. pin 79: SEL CLK : O : The serial clock output to the audio selec-
pin 80: SEL DATA : O : The serial data output to the audio selec-
pin 81: KEY ILL REM : O : Key illumination ON signal output. pin 82: DAC MC : O : Clock pulse output to the DAC. pin 83: DAC MD : O : Serial command data output to the DAC. pin 84: DAC MS : O : Chip select output to the DAC. pin 85: DIR PDN : O : The power down signal output to the DIR
pin 86: PCM DET : IN : Non-PCM detection signal input. pin 87 : DIR CDT O : O : The control data output to the DIR IC. pin 88: DIR CCLK : O : The control clock output to the DIR IC. pin 89: DIR CSN : O : The chip select output to the DIR IC. pin 90: DSP INIT RST : O : The reset signal output to DSP IC. pin 91: DSP RST : O : Reset pulse output to the DSP IC. pin 92: SYS ACC : O : ACC detect signal output. pin 93: DSP REQ : O : Request signal output to DSP IC. pin 94: A V SS : - : Negative voltage supply for analog section. pin 95: KEY AD : IN : Input terminal of A/D converter for Key
pin 96: Vref : - : Reference voltage. pin 97: A VCC : - : Positive voltage supply for the internal an-
pin 98: DSP SI : IN : Serial data input from the DSP IC. pin 99: DSP SO : O : Serial data output to the DSP IC. pin100: DSP SCK : O : The clock pulse output to DSP IC.
Table 1. Destination setting
INIT 1 ( pin 8 ) H H L INIT 2 ( pin 9 ) H L L
IC.
tects the stereo signal. At seeking or scan­ning, this port detects the station detection signal.
DIR IC.
plifier.
tor IC.
tor IC.
IC.
judgment.
alog section.
Japan Noth America Asia
DRZ9255
HX-D2
- 6 -
051-6705-00 AK7720A Audio DSP with 2ch ADC and 6ch DAC
Terminal Description
pin 1: LFLT :IN : The capacitor and the resistor connection
pin 2: A VSS : - : Analog ground. pin 3: A V DD : - : Positive supply voltage for the Analog sec-
pin 4: INIT RESET : IN : The initial reset input. pin 5: CODEC RESET : IN : The CODEC reset input. pin 6: DSP RESET : IN : DSP reset input. pin 7: S MUTE : IN : The soft muting command input. pin 8: B VSS : - : Ground for the bus interface section. pin 9: PLL : IN : Open or Connect to DVSS usually. pin 10: CKS : IN : The clock pulse selection. pin 11: S Data in A : IN : DSP serial data input. Open or connect to
pin 12: S Data in 1 : IN : DSP serial data input. pin 13: S Data in 2 : IN : DSP serial data input. pin 14: S Data out 1 : O : DSP serial data output. pin 15: S Data out 2 : O : DSP serial data output. pin 16: S Data out 3/AD: O : DSP/ADC serial data output. pin 17: S D OUT : O : The serial data output. pin 18:LR CK I/O :I/O: SMODE(pin20) = L : 1fs clock input.
pin 19: BIT CLK :I/O: SMODE(pin20) = L : 64fs clock input.
pin 20: S MODE : IN : Slave master selection. pin 21: Clock Out : O : Clock Out. pin 22: D VSS : - : Digital ground. pin 23: D VD D : - : Positive supply voltage for the digital sec-
pin 24: XT I : IN : Oscillation terminal. pin 25: XT O : O : Oscillation terminal. pin 26: JX : IN : External jumping signal input. pin 27 : RQ : IN: The request signal input from the master
pin 28: S CL K : IN : Sift clock input. pin 29: SI : IN : Serial data input. pin 30: SO : O : Serial data output. pin 31: Write Ready : O : Write ready flag output. pin 32: Data Ready : O : Data output ready flag output. pin 33:CAS :O :The column address strobe output to
pin 34: RAS : O : The row address strobe output to DRAM. pin 35: WRITE ENBL : O : The write enable signal output. pin 36: D VD D : - : Positive supply voltage for the digital sec-
pin 37: D VSS : - : Digital ground. pin 38: A 0 : O : Address signal output. pin 39: A 1 : O : Address signal output. pin 40: A 2 : O : Address signal output. pin 41: A 3 : O : Address signal output. pin 42: A 4 : O : Address signal output. pin 43: A 5 : O : Address signal output. pin 44: A 6 : O : Address signal output. pin 45: A 7 : O : Address signal output. pin 46: A 8 : O : Address signal output. pin 47: A 9 : O : Address signal output. pin 48: A 1 0 : O : Address output to the external DRAM. pin 49: A 1 1 : O : Address output to the external DRAM. pin 50: A 12 : O : Address signal output. pin 51: A 13 : O : Address signal output. pin 52: A 14 : O : Address signal output. pin 53: A 15 : O : Address signal output. pin 54: A 16 : O : Address signal output. pin 55: D VD D : - : Positive supply voltage for the digital sec-
pin 56: D VSS : - : Digital ground. pin 57: OUT ENABLE : O : The output enable command output. pin 58: I/O 0 :I/O: Data input/output. pin 59: I/O 1 :I/O: Data input/output. pin 60: I/O 2 :I/O: Data input/output.
terminal for PLL.
tion.
DVSS usually.
SMODE(pin20) = H : 1fs clock output.
SMODE(pin20) = H : 64fs clock output.
tion.
side.
DRAM.
tion.
tion.
- 7 -
pin 61: I/O 3 :I/O: Data input/output. pin 62: I/O 4 :I/O: Data input/output. pin 63: I/O 5 :I/O: Data input/output. pin 64: I/O 6 :I/O: Data input/output. pin 65: I/O 7 :I/O: Data input/output. pin 66: D VD D : - : Positive supply voltage for the digital sec-
pin 67: D VSS : - : Digital ground. pin 68: TEST : - : For the Test. pin 69: TEST : - : For the Test. pin 70: B VSS : - : Ground. pin 71: A OUT 3 R- : O : Inverted Right channel audio signal output
pin 72: A OUT 3 R+ : O : Non-inverted Right channel audio signal
pin 73: NU : - : Not in use. pin 74: A OUT 3 L- : O : Inverted Left channel audio signal output of
pin 75: A OUT 3 L+ : O : Non-inverted Left channel audio signal out-
pin 76: A OUT 2 R- : O : Inverted Right channel audio signal output
pin 77: A OUT 2 R+ : O : Non-inverted Right channel audio signal
pin 78: NU : - : Not in use. pin 79: A OUT 2 L- : O : Inverted Left channel audio signal output of
pin 80: A OUT 2 L+ : O : Non-inverted Left channel audio signal out-
pin 81: NU : - : Not in use. pin 82: A OUT 1 R- : O : Inverted Right channel audio signal output
pin 83: A OUT 1 R+ : O : Non-inverted Right channel audio signal
pin 84: NU : - : Not in use. pin 85: A OUT 1 L- : O : Inverted Left channel audio signal output of
pin 86: A OUT 1 L+ : O : Non-inverted Left channel audio signal out-
pin 87: Vr DAC Low : IN : The reference voltage input. pin 88: A VSS : - : Analog ground. pin 89: A VSS : - : Analog ground. pin 90: A VD D : - : Positive supply voltage for the Analog sec-
pin 91: Vr DAC High : IN : The reference voltage input. pin 92: NU : - : Not in use. pin 93: Vr ADC Low : IN : The reference voltage input. pin 94: A VSS : - : Analog ground. pin 95: A VD D : - : Positive supply voltage for the Analog sec-
pin 96: Vr ADC High : IN : The reference voltage input. pin 97: A IN R- : IN : Inverted Right channel audio signal input. pin 98: A IN R+ : IN: Non-inverted Right channel audio signal
pin 99: A IN L- : IN : Inverted Left channel audio signal input. pin100: A IN L+ : IN : Non-inverted Left channel audio signal in-
tion.
of DAC-3.
output of DAC-3.
DAC-3.
put of DAC-3.
of DAC-2.
output of DAC-2.
DAC-2.
put of DAC-2.
of DAC-1.
output of DAC-1.
DAC-1.
put of DAC-1.
tion.
tion.
input.
put.
DRZ9255
HX-D2
051-6399-00 TC94A15F CD IC
Terminal Description
pin 1: IPF OUT : O : IP flag output. pin 2: SB O K O : O : Sub code Q data CRCC OK signal output. pin 3: CLOCKIO :I/O: The clock pulse input/output for the sub
code reading. pin 4: VDD : - : Positive supply voltage. pin 5: VSS : - : Negative supply voltage. pin 6: DATA : O : DATA pin 7: SF S Y O : O : Playback frame synchronous signal output. pin 8: SB SY O : O : Sub code block synchronous signal output. pin 9: HSO : O : The play speed flag output. pin 10: UHSO : O : The play speed flag output. pin 11: AR SEL IN : IN : Fix to the high level. pin 12: AWRC : O : The control signal output for the active
wide range VCO. pin 13: P VDD : - : PLL positive supply voltage. pin 14: PDO : O : Phase difference signal output of EFM-
PLCK. pin 15: TMAX S : O : T max judgment output. pin 16: TMAX : O : T max judgment output. pin 17 : LPF N : IN : Inverted input of LPF for PLL. pin 18: LPF OUT : O : The output terminal for the Low Pass Fil-
ter. pin 19: P Vref : - : PLL reference voltage. pin 20: VCO FILTER : O : Loop filter for VCO. pin 21: VCO Ref : IN : VCO reference voltage input. pin 22 : DTC N : O : For the analog slicer. pin 23: DTC P : O : For the analog slicer. pin 24: PLL VSS : - : PLL ground. pin 25: SLCO : O : Output of internal DAC for data slice level
generation. pin 26: RF IN : IN : RF signal input. pin 27: RF R P : IN : RF ripple input. pin 28: RF EQ O UT : O : The output of the RF equalizer. pin 29: A VD D : - : Positive supply voltage for the Analog sec-
tion. pin 30: RES IN : - : For reference current setting. pin 31: Vref OUT : O : The reference voltage output. pin 32: VMDIR : O : The reference voltage output. pin 33: TESTR : O : The compensation terminal for RFEQO off-
set. pin 34: INVSEL : IN : MDI polarity selection. pin 35: AGCI :IN : The input terminal of RF AGC amplifier. pin 36: RF DCI : IN : The input terminal for RF peak detection. pin 37: RF O UT : O : RF signal output. pin 38: PN S EL : IN : The transistor type selection input for laser
diode driver. L=NPN, H=PNP. pin 39: E Q SET : O : The equalizer setting terminal. pin 40: RF VDD : - : RF power supply. pin 41: LDO : O : The laser diode drive output. pin 42: MDI : IN : Monitor photo diode signal input. pin 43: RF VSS : - : RF ground. pin 44: FNI 2 : IN : Main beam signal input. pin 45: FNI 1 : IN : Main beam signal input. pin 46: FPI 2 : IN : Main beam signal input. pin 47: FPI 1 : IN : Main beam signal input. pin 48: TPI : IN : Sub beam signal input. pin 49: TNI :IN : Sub beam signal input. pin 50: FTEO : O : For test. pin 51: RF ZI : IN : RF ripple zero cross signal input. pin 52: A VSS : - : Analog ground. pin 53: RF R P : O : RF ripple signal output. pin 54: RF D C : O : RF peak detection signal output. (hologram
suitable) pin 55: FEI : O : Focus error signal output. pin 56: SBAD : O : Sub beam add signal output. pin 57: TEI : O : Tracking error signal output. pin 58: TE Z IN : IN : Tracking error signal inpur for zero cross. pin 59: A VD D : - : Positive supply voltage for the Analog sec-
tion. pin 60: FOO : O : Focus equalizer output.
DRZ9255
HX-D2
pin 61: TRO : O : Tracking equalizer output. pin 62: Vref : O : Reference voltage output. pin 63: FMO :O : Field equalizer output / Speed error output. pin 64: DMO : O : Disk equalizer output. pin 65: IO2A :I/O: General input/output. pin 66: IO3A :I/O: General input/output. pin 67: MONIT : O : Internal DSP signal monitor. pin 68: FG IN : IN : FG input for the spindle CAV servo. pin 69: VSS : - : Negative supply voltage. pin 70: VDD : - : Positive supply voltage. pin 71: TESIN : IN : For test. pin 72: X V SS : - : Master clock analog ground. pin 73: X IN : IN : Crystal connection. pin 74: X O : O : Crystal connection. pin 75: X VDD : - : Clock power supply. pin 76: D VSS : - : Digital ground. pin 77: RO : O : Right channel data output for 1-bit DAC. pin 78: D VD D : - : Positive supply voltage for the digital sec-
tion. pin 79: D Vref : O : Digital reference voltage. pin 80: LO : O : Left channel data output for 1-bit DAC. pin 81: D VSS : - : Digital ground. pin 82: Z DET O : O : 1bit DAC zero flag output. pin 83: VSS : - : Negative supply voltage. pin 84: BUS 0 :I/O: CD IC Data input / output. pin 85: BUS 1 :I/O: CD IC Data input / output. pin 86: BUS 2 :I/O: CD IC Data input / output. pin 87: BUS 3 :I/O: CD IC Data input / output. pin 88: BU CK IN : IN : CD IC Data clock input. pin 89: CCEI : IN : Chip enable input. pin 90: RSTI :IN : Reset signal input. pin 91: VDD : - : Positive supply voltage. pin 92: EMPHI/FAO :I/O: Emphasis input for 1-bit DAC / Flag A
pin 93: BCKI/FBO :I/O:Bit clock input for 1-bit DAC / Flag B out-
output.
put. pin 94: AIN/FCO :I/O: Audio input for 1-bit DAC / Flag C output. pin 95: LRCKI/FDO :I/O:LR clock input for 1-bit DAC / Flag D out-
put. pin 96: EMPHO : O : Emphasis flag output. H=Emphasis ON. pin 97: B C K O : O : Bit clock output. pin 98: A OUT : O : Audio signal output. pin 99: LR CK O : O : LR clock output. pin100: D O UT : O : Serial data output.
051-6643-90 M66010GP 24-bit I/O Expander
Parallel Data Input/Output
323130292827262524232221201918
D 1
D 2
D 3
D 4
D 5
D 6
D 7
D 8
D 9
D 10
D 11
D 12
DODICLKCSVCC 123456789
Serial Data output
Serial Data input
SET
GND
Clock Pulse input
Chip Select input
Positive Supply
Set Signal input
Ground
D 24
D 23
D 22
D 21
10111213141516
Parallel
Data
Input/Output
D 20
D 13
D 19
D 14
D 18
D 15
D 17
17
D 16
GND
Ground
- 8 -
051-6373-18 AK4112BVF Digital Interface Receiver
Terminal Description
pin 1: D V DD : - : Positive voltage supply for the digital sec-
tion. pin 2: D VSS : - : Digital ground. pin 3: T VDD : - : Positive voltage supply for output-buffer. pin 4: VALIDITY : O : Validity flag output in the parallel mode.
: TX : O : Transmit channel (through data) output in
serial mode. pin 5: XT I : IN : Oscillation terminal. pin 6: XT O : O : Oscillation terminal. pin 7: PDN : IN : Power down & reset signal input. pin 8: RESIST : - : The resistor connection. pin 9: A VDD : - : Positive voltage supply for analog section. pin 10: A V SS : - : Negative voltage supply for analog section. pin 11: RX 1 : IN : The receiver channel 1 in serial mode. pin 12: DIF 0 : IN : The audio data format selection in parallel
mode, refer Table 1.
: RX 2 : IN : The receiver channel 2 in serial mode.
pin 13: DIF 1 : IN : The audio data format selection in parallel
mode, refer Table 1.
: RX 3 : IN : The receiver channel 3 in serial mode.
pin 14: DIF 2 : IN : The audio data format selection in parallel
mode, refer Table 1.
: RX 4 : IN : The receiver channel 4 in serial mode. pin 15: PCM DET : O : Non-PCM detect. L = Non detect. pin 16: PARA/SERI :IN : Parallel("H")/Serial("L") mode select input. pin 17: FS96 : O : 96kHz Sampling detect.
RX mode H : fs = 88.2kHz or more L : fs = 54kHz or less Xtal mode H : XFS96 = 1
L : XFS96 = 0 pin 18: ERF : O : Unlock & Parity error output. L = No error. pin 19: LR CK I/O :I/O: Left/Right clock. pin 20 : SDT O : O : The audio serial data output. pin 21: BI CK :I/O: Audio serial data clock. pin 22: D AUX : IN : Auxiliary audio serial data input. pin 23: MCK O 2 : O : Master clock output, refer Table 2. pin 24: MCK O 1 : O : Master clock output, refer Table 2. pin 25: OCK Sel 0 : IN : Output clock select in parallel mode.
refer Table 2.
: CSN : IN : Chip select input in serial mode.
pin 26: OCK Sel 1 : IN : Output clock select in parallel mode.
refer Table 2.
: C CLK : IN : Control clock input in serial mode.
pin 27: C M 1 : IN : Master clock operation select input in par-
allel mode, refer Table 3.
: CDTI :IN : Control data input in serial mode.
pin 28: C M 0 : IN : Master clock operation select input in par-
allel mode, refer Table 3.
: CDTO : O : Control data output in serial mode.
Table 1. Audio data format
DIF 2 DIF 1 DIF 0 D AUX SDT O LR CK BI CK
(pin 14) (pin 13) (pin 12) (pin 22) (pin 20) (pin 19) (pin 21)
0 0 0 Left Right
0 0 1 Left Right
0 1 0 Left Right
0 1 1 Left Right
1 0 0 Left Left
101
1 1 0 Left Left
111
24bit 16bit H/L 64fs
justified justified Output Output
24bit 18bit H/L 64fs
justified justified Output Output
24bit 20bit H/L 64fs
justified justified Output Output
24bit 24bit H/L 64fs
justified justified Output Output
24bit 24bit H/L 64fs
justified justified Output Output
24bit 24bit L/H 64fs
I2S I2S Output Output
24bit 24bit H/L 64-128fs
justified justified Intput Input
24bit 24bit H/L 64-128fs
I2S I2S Intput Input
Table 2. Master clock frequency select
OCK S 1 OCK S 0 MCK O 1 MCK O 2
(pin 26) (pin 25) (pin 24) (pin 23) X'tal fs(kHz)
0 0 256fs 256fs 256fs 44.1
0 1 256fs 128fs 256fs 44.1
1 0 512fs 256fs 512fs 44.1
1 1 - - Test Mode - -
Table 3. Clock operation mode select
CM 1 CM 0 Clock FS96 SDT O
(pin 27) (pin 28) UNLOCK PLL X'tal source (pin 17) (pin 20)
0 0 x ON OFF PLL RFS96 RX 0 1 x OFF ON X'tal XFS96 D AUX 1 0 0 ON O N PLL RFS96 RX 1 0 1 ON ON X'tal XFS96 D AUX 1 1 x ON ON X'tal XFS96 D AUX
32.0
48.0
96.0
32.0
48.0
96.0
32.0
48.0
- 9 -
DRZ9255
HX-D2
051-6708-90 AK4121VF Asynchronous Sample Rate Converter
Terminal Description
pin 1: FILT : O : PLL filter output. pin 2: A V SS : - : Negative voltage supply for analog section. pin 3: PDN : IN : Power down & reset signal input. pin 4: S MUTE : IN : The soft muting command input. pin 5 : DEM 0 : IN : De-emphasis Frequency Selection. pin 6 : DEM 1 : IN : De-emphasis Frequency Selection. pin 7: I L R CK : IN : Left/Right clock input for the input signal. pin 8: I BI C K : IN : Bit clock input for the input signal. pin 9: SDT I : IN : The serial data input. pin 10: I DIF 0 : IN : Input data format select. pin 11: I DIF 1 : IN : Input data format select. pin 12: I DIF 2 : IN : Input data format select. pin 13: C MODE 0 : IN : The clock mode select. pin 14: C MODE 1 : IN : The clock mode select. pin 15: C MODE 2 : IN : The clock mode select. pin 16: O DIF 0 : IN : Output data format select. pin 17: O DIF 1 : IN : Output data format select. pin 18 : SDT O : O : The audio serial data output. pin 19: O BI C K :I/O: Bit clock input/output for the output signal. pin 20: O L R CK :I/O: Left/Right clock input/output for the output
signal. pin 21: MASTER CLK : IN : Master clock input. pin 22: T VDD : - : Positive voltage supply for output-buffer. pin 23: D VSS : - : Digital ground. pin 24: VDD : - : Positive voltage supply.
Table 1. Master/Slave control
Cmode 2 Cmode 1 Cmode 0 Master CLK Master/Slave
(pin 15) (pin 14) (pin 13) (pin 21) (Output port)
L L L 256fso(fso to 96kHz) Master L L H 384fso(fso to 96kHz) Master L H L 512fso(fso to 48kHz) Master
L H H 768fso(fso to 48kHz) Master H L L Connect to DVSS Slave H H H Connect to DVSS Master(bypass mode)
051-6071-08 BA5825FP-E2 Quad Motor Drivers
Pre VCC
Bias
3-ch OP in-
3-ch OP out
SL OP in-
SL OP out
Loading in-
Control in
Power Ground
Power Vcc
4-ch drive out-
4-ch drive out+
3-ch drive out-
28272625242322
2.4V
2.4V
1234567
2-ch OP in-
2-ch OP out
1-ch OP in-
1-ch OP out
REG-Base
REG-FB
Pr-Ground
21201918171615
Level
Shift
Level
Shift
8
9
1011121314
Mute in
Power GND
Power Vcc
3-ch drive out+
Level
Shift
Level
Shift
1-ch drive out-
1-ch drive out+
2-ch drive out-
2-ch drive out+
Truth Table
MUTE CNT CH1,2,3 CH4 (pin 9) (pin 21) output output
H H MUTE OFF LD ON H L MUTE OFF SL ON L H MUTE ON LD ON L L MUTE ON MUTE ON
051-5036-90 PGA2310UA Stereo Volume Controller
Table 2. Input Audio data Formats
I DIF 2 I DIF 1 I DIF 0 SDT I format I BI CK (slave)
(pin 12) (pin 11) (pin 10) (pin 9) (pin 8)
L L L 16bit LSB Justified 32 or less L L H 20bit LSB Justified 40 or less L H L 20bit MSB Justified 40 or less L H H 20/16bit I2C compat. 32/40fs or less H L L 24bit LSB Justified 48 or less
Table 3. Output Audio data Formats
O DIF 1 O DIF 0 SDT O format O BI CK O BI CK (pin 17) (pin 16) (pin 18) (Slave) (Master)
L L 16bit LSB Justified 64fs 64fs L H 20bit LSB Justified 64fs 64fs H L 20/16bit MSB Justif. 32/40fs or less 64fs H H 20/16bit I2C compat. 32/40fs or less 64fs
Table 4. De-emphasis filter control
DEM 1 (pin 6) DEM 0 (pin 5) De-emphasis filter
L L 44.1kHz L H off
H L 48.0kHz
L H 32.0kHz
L IN
ZCEN
CS_
S Data I
D VDD
D GND
S CLK
S Data O
Mute In
1
2
3
Logic
Control
4
5
6
7
8
16
15
14
13
12
11
10
9
L A GND
L OUT
A V-
A V+
R OUT
R A GND
R IN
Terminal Description
pin 1: ZCEN : IN : Zero Cross Enable signal input. pin 2: CS IN : IN : The chip select command input. pin 3: S DATA IN : IN : The serial data input. pin 4: D VDD : - : Positive voltage supply for digital section. pin 5: D GND : - : Digital ground. pin 6: S CL K : IN : The serial clock input. pin 7: S DATA OUT : O : The serial data output. pin 8: MUTE IN : IN : Mute command input. pin 9: R A IN : IN : Right channel audio signal input. pin 10: R A GND : - : Right channel audio signal ground. pin 11: R A OUT : O : Right channel audio signal output. pin 12: A V+ : - : Positive voltage supply for analog section. pin 13: A V - : - : Negative voltage supply for analog section. pin 14: L A OUT : O : Left channel audio signal output. pin 15: L A GND : - : Left channel audio signal ground. pin 16: L A IN : IN : Left channel audio signal input.
DRZ9255
HX-D2
- 10 -
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