Cirrus Logic CS5331A User Manual

High
Pass
Filter

AINR

S/H

AGND

AINL

S/H

DAC

Serial Output Interface

Voltage Reference

Comparator

Comparator

LP Filter

LP Filter

VA+

SCLK

Digital Decimation

Filter

SDATA

MCLK

DAC

High
Pass
Filter

LRCK

8

5

6

423

1

7

Digital Decimation

Filter

CS5330A/31A

8-Pin, Stereo A/D Converter for Digital Audio

Features

 Single +5 V Power Supply
 18-Bit Resolution
 94 dB Dynamic Range
 Linear Phase Digital Anti-Alias Filtering

– 0.05 dB Passband Ripple
– 80 dB Stopband Rejection

 Low Power Dissipation: 150 mW

– Power-Down Mode for Portable

Applications

 Complete CMOS Stereo A/D System

– Delta-Sigma A/D Converters
– Digital Anti-Alias Filtering
– S/H Circuitry and Voltage Reference

 Adjustable System Sampling Rates including

32, 44.1, and 48 kHz

General Description

The CS5330A/31A is a complete stereo ana log-to- digi­tal converter that performs antialias filtering, sampling
and analog-to-digital conversion generating 18-bit val­ues for both left and right inputs in serial form. The
output sample rate can be infinitely adjusted between
2 kHz and 50 kHz.

The CS5330A/31A operates from a single +5 V supply
and requires only 150 mW for no rmal operation, making
it ideal for battery-powered applications.

The ADC uses delta-sigma modulation with 128X over­sampling, followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The linear-phase digital filter has a passband to

21.7 kHz, 0.05 dB passband ripple and >80 dB stop­band rejection. The device also contains a high-pass fil­ter to remove DC offsets.

The device is available in an 8-pin SOIC package in
both Commercial (

(-40° to +85° C)

page 16 for complete details.

-10° to +70° C) and Automotive grades

. Please refer to “Ordering Information” on

http://www.cirrus.com

Copyright  Cirrus Logic, Inc. 2011

(All Rights Reserved)

MAY '11

DS138F6

TABLE OF CONTENTS

1. PIN DESCRIPTIONS .................................... .... ... ... ... .... .......................................... ... ... ... ........ 3

2. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4

SPECIFIED OPERATING CONDITIONS................................................................................. 4

ABSOLUTE MAXIMUM RATINGS........................................................................................... 4

ANALOG INPUT CHARACTERISTICS.................................................................................... 5

DIGITAL CHARACTERISTICS............................... ... .... ... ... ... .... ... ... ... ... .... ... ... ... .... ... .............. 6

DIGITAL FILTER CHARACTERISTICS ........................................................ ... ... .... ... ... ........... 6

SWITCHING CHARACTERISTICS........................... .... ... .......................................... ... ... ... .... . 7

3. GENERAL DESCRIPTION ............................................................... ... ... .... ... ... ... .... ... ... ........... 9

3.1 System Design .................................................................................................................. 9

3.1.1 Master Clock ......................................................................................................... 9

3.1.2 Serial Data Interface ............................................................................................ 9

3.1.3 Master Mode ......................................................................................................... 9

3.1.4 Slave Mode ......................................................................................................... 10

3.1.5 CS5330A ............................................................................................................. 10

3.1.6 CS5331A ............................................................................................................. 10

3.1.7 Analog Connections ............................................................................................ 11

3.1.8 High-Pass Filter .................................................................................................. 11

3.1.9 Initialization and Power-Down ............................................................................. 11

3.1.10 Grounding and Power Supply Decoupling ..................... ................................... 12

3.1.11 Digital Filter ....... ... ... .... .......................................... ... ... ... ... .... ... ... ... .... ............... 13

4. PARAMETER DEFINITIONS .................................................................................................. 14

5. REFERENCES ........................................................................................................................ 15

6. PACKAGE DESCRIPTIONS .................................................................................................. 15

7. ORDERING INFORMATION . ... ... .... ... ... .......................................... ... ... .... ... ... ... .... ... ... ... ... ... 16

8. REVISION HISTORY .............................................................................................................. 16

CS5330A/31A

LIST OF FIGURES

Figure 1. Typical Connection Diagram......................................................................................... 8

Figure 2. Data Output Timing-CS5330A.............................. ... ... .... ... ... ... ... .... ... ... ... .... ... ... ... ... ... 10

Figure 3. Data Output Timing - CS5331A (I²S Compatible)....................................................... 10

Figure 4. CS5330A/31A Initialization and Power-Down Sequence............ .... ... ... ... .... ... ... ... ... ... 12

Figure 5. CS5330A/31A Digital Filter Stopband Rejection......................... .... ... ... ... .... ... ... ... ... ... 13

Figure 6. CS5330A/31A Digital Filter Transition Band............................................................... 13

Figure 7. CS5330A/31A Digital Filter Passband Ripple............................................................. 13

Figure 8. CS5330A/31A Digital Filter Transition Band............................................................... 13

LIST OF TABLES

Table 1. Common Clock Frequencies......................................................................................... 9

2 DS138F6

1. PIN DESCRIPTIONS

S

T

CS5330A/31A

Pin Name

SDATA

SCLK

LRCK

MCLK

AINR
AGND

VA+
AINL

ERIAL DATA OUTPUT
SERIAL DATA CLOCK

LEFT/RIGHT CLOCK

MASTER CLOCK

#

Pin Description
Audio Serial Data Output (Output) - Two’s complement MSB-first serial data is output on this

1

pin. A 47 k resistor on this pin will place the CS5330A/31A into Master Mode.
Serial Data Clock (Input/Output) - SCLK is an input clock at any fr equency from 32 x to 64x the

2

output word rate. SCLK can also be an output clock at 64x if in the Master Mode. Data is
clocked out on the falling edge of SCLK.

Left/Right Clock (Input/Output) - LRCK selects the lef t or right channel for output on SDATA.
The LRCK frequency must be at the output sample rate. LRCK is an output clock if in Master

3

Mode. Although the outputs of each channel are transmitted at dif feren t times, the two words in
an LRCK cycle represent simultaneously sampled analog inputs.

Master Clock Input (Input) - Source for the delta-sigma modulator sampling and digital filter

4

clock. Sample rates and digi tal filter characteristics scale to the MCLK frequency.
Analog Right Channel Input (Input) - Analog input for the right channel. Typically 4 Vpp for a

5

full-scale input signal.

6

Analog Ground (Input) - Analog ground reference.

7

Positive Analog Power (Input) - Positive analog supply (Nominally +5 V).
Analog Left Channel Input (Input) - Analog input for the left channel. Typically 4 Vpp for a full-

8

scale input signal.

SDATA

SCLK

LRCK

MCLK

81

AINL

72

VA+

63

AGND

54

AINR

LEFT ANALOG INPUT
ANALOG POWER
ANALOG GROUND
RIGHT ANALOG INPU

DS138F6 3

CS5330A/31A

2. CHARACTERISTICS AND SPECIFICATIONS

(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical
performance characteristics and spe cif icat ion s ar e de riv e d from measurements taken at nominal supply voltages
and T

= 25C.)

A

SPECIFIED OPERATING CONDITIONS

(AGND = 0V, all voltages with respect to ground)

Parameter Symbol Min Typ Max Unit

Analog Supply Voltage
Ambient Operating Temperature (Power Applied) KSZ

BSZ, DSZ

VA+ 4.75 5.0 5.25 V

T

A

-10

-40

-

+70

-

+85

°C
°C

ABSOLUTE MAXIMUM RATINGS

(AGND = 0V, all voltages with respect to ground.) (Note 1)

Parameter Symbol Min Typ Max Unit

Analog Supply Voltage
Input Current, Any Pin Except Supplies (Note 2)
Analog Input Voltage (Note 3)
Digital Input Voltage (Note 3)
Ambient Temperature (power applied)
Storag e Temperature

VA+ -0.3 - +6.0 V

lin - - ±10 mA

INA -0.7 - VA+0.7 V

V

IND -0.7 - VA+0.7 V

V

TA -55 - +125 °C

Tstg -65 - +150 °C

Notes:

1. Operation at or beyond the se limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.

2. Any pin except supplies. Transient current of up to +/- 100 mA on the analog input pins will not cause
SCR latch-up.

3. The maximum over/under voltage is limited by the input current.

4 DS138F6

CS5330A/31A

ANALOG INPUT CHARACTERISTICS

(-1 dBFS input sine wave, 997 Hz; Measurement Bandwidth is 10 Hz to 20 kHz unless otherwise specified; Logic
0 = 0V, Logic 1 = VD+)

CS5330A-BSZ

CS5330A/31A-KSZ

Parameter Symbol

Min Typ Max

Dynamic Performance
Dynamic Range

A-weighted

unweighted

88
86

Total Harmonic Distortion + Noise

(Note 4)

-1 dB

-20 dB

-60 dB

Total Harmonic Distortion -1 dB
Interchannel Phase Deviation
Interchannel Isolation (DC to 20 kHz)

THD+N

THD - 0.003 0.02 - 0.003 0.2 %

-

-

-

-0--0-Degree

-90--90-dB

DC Accuracy

Interchannel Gain Mismatch
Gain Error
Gain Drift
Offset Error (Note 5)

- 0.1 - - 0.1 - dB

--±10--±10%

- 150 - - 150 - ppm/°C

--0--0LSB

Analog Input

Full-scale Input Voltage
Input Impedance (Fs = 48 kHz)
Input Bias Voltage

VIN 3.6 4.0 4.4 3.6 4.0 4.4 Vpp
ZIN - 100 - - 100 - k

2.2 2.4 2.6 2.2 2.4 2.6 V

Power Supplies
Power Supply Current VA+

Power down

Power Dissipation Normal

Power down

Power Supply Rejection Ratio

IA+ -

-

-

-

PSRR - 50 - - 50 - dB

* Refer to Parameter Definitions at the end of this data sheet.

94
92

-84

-72

-32

30

100
150

0.5

-

-

75
66
26

42

1000

220

5.25

CS5331A-DSZ

Min Typ Max Unit

86
84

-

-

-

94
92

-84

-72

-32

75
66
26

-

-

dB
dB

dB
dB
dB



-

-

-

-

30

100
150

0.5

42

1000

220

5.25

mA

µA

mW
mW

4. Referenced to typical full-scale input voltage.

5. Internal highpass filter removes offset.

DS138F6 5