CIRRUS LOGIC CS4396 Service Manual
CS4396
24-Bit, 192 kHz D/A Converter for Digital Audio
Features
l 24 Bit Conversion
l Up to 192 kHz Sample Rates
l 120 dB Dynamic Range
l -100 dB THD+N
l Advanced Dynamic-Element Matching
l Low Clock Jitter Sensitivity
l Digital De-emphasis for 32 kHz, 44.1 kHz and
48 kHz
l External Reference Input
I
SCLK
LRCK
SDATA
SERIAL INTERFACE
AND FORMAT SELECT
Description
The CS4396 is a complete high performance 24-bit
48/96/192 kHz ste reo digital-to-analog conversio n system. The device includes a digital interpolation filter
followed by a oversampled multi-bit delta-sigma modulator which drives dynamic-element-matching (DEM)
selection logic. The out put from the DEM blo ck controls
the input to a multi-element switched capacitor DAC/lowpass filter, with fully-differential outputs. This multi-bit architecture feat ures signific antly lowe r out-of-ba nd noise
and jitter sensitivity than traditional 1-bit designs, and the
advanced DEM g uarantees low noise a nd distortion at
all signal levels.
ORDERING INFORMATION
CS4396-KS -10° to 70° C 28-pin Plastic SOIC
CDB4397 Evaluation Board
SOFT MUTE
DE-EMPHASIS
FILTER
INTERPOLATION
MCLK
CLOCK
DIVIDER
M4
(AD0/CS)
INTERPOLATION
HARDWARE MODE CONTROL
M3 M2
(AD1/CDIN) (SCL/CCLK)
Advance Product Information
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
FILTER
FILTER
(CONTROL PORT)
M1 M0
(SDA/CDOUT)
MULTI-BIT
∆Σ
MODULATOR
MULTI-BIT
∆Σ
MODULATOR
RESET MUTEC MUTE
DYNAMIC
ELEMENT
MATCHING
LOGIC
DYNAMIC
ELEMENT
MATCHING
LOGIC
FILT+
SWITCHED
CAPACITOR-DAC
AND FILTER
SWITCHED
CAPACITOR-DAC
AND FILTER
VOLTAGE REFERENCE
VREF CMOUTFILT-
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 1999
(All Rights Reserved)
AOUTL+
AOUTL-
AOUTR+
AOUTR-
JUL ‘99
DS288PP1
1
TABLE OF CONTENTS
1.0 CHARACTERISTICS/SPECIFICATIONS ..................................................................... 4
ANALOG CHARACTERISTICS................................................................................... 4
Dynamic Performance - Single Speed Mode - Fs equal to 48 kHz ...................... 4
Dynamic Performance - Double Speed Mode - Fs equal to 96 kHz .................... 4
Dynamic Performance - Quad-Speed Mode - Fs equal to 192 kHz ..................... 4
ANALOG CHARACTERISTICS................................................................................... 5
Power Supplies .................................................................................................... 5
Analog Output ...................................................................................................... 5
Combined Digital and On-chip Analog Filter Response - Single Speed Mode .... 6
Combined Digital and On-chip Analog Fi lte r Respon se - Double Spe ed Mod e ... 6
Combined Digital and On-chip Analog Filter Response - Quad-Speed Mode ..... 6
DIGITAL CHARACTERISTICS.................................................................................... 7
ABSOLUTE MAXIMUM RATINGS.............................................................................. 7
RECOMMENDED OPERATING CONDITIONS.......................................................... 7
SWITCHING CHARACTERISTICS ........................................................ ...... ....... ...... .. 8
SWITCHING CHARACTERISTICS - CONTROL PORT ............................................. 9
2C®
I
SPI Mode ........................................................................................................... 10
2.0 TYPICAL CONNECTION DIAGRAM .......................................................................... 11
3.0 REGISTER DESCRIPTION ........................................................................................ 12
3.1 Differential DC offset calibration ........................................................................ 12
3.2 Soft Mute ........................................................................................................... 12
3.3 Mode Select ....................................................................................................... 13
3.4 Power DowN ...................................................................................................... 13
4.0 PIN DESCRIPTION ..................................................................................................... 14
5.0 APPLICATIONS .......................................................................................................... 19
5.1 Recommended Power-up Sequence ................................................................. 19
6.0 CONTROL PORT INTERFACE .................................................................................. 20
6.1 SPI Mode ........................................................................................................... 20
2
6.2 I
C Mode ........................................................................................................... 20
6.2 Memory Address Pointer (MAP) ........................................................................ 20
7.0 PARAMETER DEFINITIONS ...................................................................................... 26
8.0 REFERENCES ............................................................................................................ 26
9.0 PACKAGE DIMENSIONS ........................................................................................... 27
CS4396
Mode ............................................................................................................ 9
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/
“The I2C-Bus Specification: Vers ion 2.0” Philips Semiconductors, December 1998.
http://www.semiconductors.philips.com
Preliminary product info rmation describes products which are in production, but for which full characteriza t i on da t a is not yet available. Advance produ ct i nfor mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reli able. However , the i nformati on is sub ject to change with out no tice and i s provi ded “AS IS” withou t warranty of
any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights
of third parties. This document i s the propert y of Cirru s Logic, Inc. and implie s no licen se under patent s, copyri ghts, trademarks, or tr ade secrets. No part of
this publication may be copied, reproduced , stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or
otherwise) without the pri or wri tt en consen t of Ci rrus Logic, Inc. Items from any Cirrus Logi c websi te or disk may be printed for use by the user. However, no
part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical,
photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture
or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing
in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
2 DS288PP1
TABLE OF FIGURES
CS4396
Figure 1. Serial Audio Input Timing ........................................................................... 8
Figure 2. I
Figure 3. SPI Control Port Timing ........................................................................... 10
Figure 4. Typical Connection Diagram - Hardware Mode (Control Port Mode) ....... 11
Figure 5. Control Port Timing, I
Figure 6. Control Port Timing, SPI mode ................................................................ 21
Figure 7. Single-speed Transition Band .................................................................. 23
Figure 8. Single-speed Stopband Rejection ............................................................ 23
Figure 9. Single-speed Transition Band .................................................................. 23
Figure 10.Single-speed Frequency Response ......................................................... 23
Figure 11.Double-speed Stopband .......................................................................... 23
Figure 12.Double-speed Transition Band ................................................................. 23
Figure 13.Double-speed Transition Band ................................................................. 23
Figure 14.Double-speed Frequency Response ........................................................ 23
Figure 15.Quad-speed Stopband Rejection ............................................................. 24
Figure 16.Quad-speed Transition Band ................................................................... 24
Figure 17.Quad-speed Transition Band ................................................................... 24
Figure 18.Quad-speed Frequency Response .......................................................... 24
Figure 19.De-Emphasis Curve ................................................................................. 24
Figure 20. Format 0, Left Justified ............................................................................ 25
Figure 21. Format 1, I
Figure 22. Format 2, Right Justified, 16-Bit Data ..................................................... 25
Figure 23.Format 3, Right Justified, 24-Bit Data ...................................................... 25
2
C Control Port Timing .............................................................................. 9
2
C Mode ................................................................. 21
2
S ............................. ...................................... ....................... 25
DS288PP1 3
1.0 CHARACTERISTICS/SPECIFICATIONS
CS4396
ANALOG CHARACTERISTICS (T
Full-Scale Output Sine Wave, 997 Hz; MCLK = 12.288 MHz; SCLK = 3.072 MHz, Measurement Bandwidth 10 Hz
to 20 kHz, unless otherwise specified. Test load R
Parameter Symbol Min T y p Max Unit
= 25 °C; Logic "1" = VD = 5 V; VA = 5V; Logic "0" = DGND;
A
= 1 kΩ, CL = 10 pF)
L
Dynamic Performance - Single Speed Mode - Fs equal to 48 kHz
Dynamic Range (Note 1)
24-Bit unweighted
A-Weighted
16-Bit unweighted
(Note 2) A-Weighted
Total Harmonic Distortion + Noise (Note 1)
24-Bit 0 dB
-20 dB
-60 dB
16-Bit 0 dB
(Note 2) -20 dB
-60 dB
THD+N
TBD
TBD
-
-
-
-
-
-
-
-
117
120
95
98
-100
-97
-57
-95
-75
-35
-
-
-
-
TBD
TBD
TBD
-
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Dynamic Performance - Double Speed Mode - Fs equal to 96 kHz
Dynamic Range (Note 1)
24-Bit unweighted
A-Weighted
40 kHz bandwidth unweighted
16-Bit unweighted
(Note 2) A-Weighted
Total Harmonic Distortion + Noise (Note 1)
24-Bit 0 dB
-20 dB
-60 dB
16-Bit 0 dB
(Note 2) -20 dB
-60 dB
THD+N
TBD
TBD
TBD
-
-
-
-
-
-
-
-
117
120
114
92
98
-100
-97
-57
-95
-75
-35
-
-
-
-
-
TBD
TBD
TBD
-
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Dynamic Performance - Quad-Speed Mode - Fs equal to 192 kHz
Dynamic Range (Note 1)
24-Bit unweighted
A-Weighted
40 kHz bandwidth unweighted
16-Bit unweighted
(Note 2) A-Weighted
Total Harmonic Distortion + Noise (Note 1)
24-Bit 0 dB
-20 dB
-60 dB
16-Bit 0 dB
(Note 2) -20 dB
-60 dB
THD+N
TBD
TBD
TBD
-
-
-
-
-
-
-
-
117
120
114
92
98
-100
-97
-57
-95
-75
-35
-
-
-
-
-
TBD
TBD
TBD
-
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Notes: 1. Triangular PDF dithered data.
2. Performance limited by 16-bit qu an ti za ti on noi se.
4 DS288PP1
ANALOG CHARACTERISTICS (Continued)
CS4396
Parameter Symbol VD = 3 V VD = 5 V
Power Supplies
Supply Current normal operation
VA = 5 V normal operation
power-down state
Power Dissipation normal operation
VA = 5 V power-down
Power Supply Rejection Ratio (1 kHz) (Note 3)
(120 Hz)
Parameter Symbol Min
Min Typ Max Min Typ Max
I
A
I
D
ID + I
A
PSRR -
-
20
-
TBD
-
60
--TBD
0.3
60
-
40
TBD
TBD
TBD---TBD
-
20
-
TBD
-
-
30
0.3
-
-
60
-
-
40
Typ Max
TBD
TBD
TBD-mW
Unit
mA
mA
-
-
-
µ
mW
dB
dB
Unit
Analog Output
Full Scale Differential Output Voltage TBD 1.4VREF TBD Vpp
Common Mode Voltage - 0.5VREF - VDC
A
Notes: 3. Valid with the recommended capacitor values on FILT+ and CMOUT as shown in Figure 1. Increasing
the capacitance will also increase the PSRR.
DS288PP1 5
CS4396
6 DS288PP1
CS4396
DIGITAL CHARACTERISTICS (T
= 25°C; VD = 3.0V - 5.25V)
A
Parameters Symbol Min Typ Max Units
High-Level Input Voltage VD = 5 V
VD = 3 V
Low-Level Input Voltage VD = 5 V
VD = 3 V
Input Leakage Current I
V
IH
V
IL
in
2.0
2.0
-
-
-
-
-
-
-
-
0.8
0.8
--±10µA
V
V
V
V
Input Capacitance - 8 - pF
Maximum MUTEC Drive Current - 3 - mA
ABSOLUTE MAXIMUM RATINGS (AGND = 0 V, all voltages with respect to ground.)
Parameter Symbol Min Max Unit
DC Power Supply: Positive Analog
Positive Digital
Reference Voltage
Input Current, Any Pin Except Supplies I
Digital Input Voltage V
Ambient Operating Temperature (power applied) T
Storage Temperature T
WARNING: Oper ati on at or be yond these limits may r es ul t in perm anent damage to the dev ice. No rm al operation
is not guaranteed at these extremes.
VA
VD
VREF
in
IND
A
stg
-0.3
-0.3
-0.3
6.0
6.0
VA
V
V
V
-±10mA
-0.3 (VD)+0.4 V
-55 125 °C
-65 150 °C
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Typ Max Unit
DC Power Supply: Positive Digital
Positive Analog
Reference Voltage
Specified Temperature Range T
VD
VA
VREF
(DGND = 0V; all voltages with respect to ground)
3.0
4.75
TBD
A
-10 - 70 °C
3.3
5.0
5.0
5.25
5.25
VA
V
V
V
DS288PP1 7
CS4396
SWITCHING CHARACTERISTICS (T
1 = VD = 5.25 to 3.0 Volts; C
=20pF)
L
= -10 to 70°C; Logic 0 = AGND = DGND; Logic
A
Parameter Symbol Min Typ Max Unit
Input Sample Rate (Single-speed mode)
(Double-speed mode)
(Quad-speed mode)
Fs
Fs
Fs
16
50
100
-
-
-
50
100
200
kHz
kHz
kHz
LRCK Duty Cycle 45 50 55 %
MCLK Frequency (Single-speed 256 Fs,
Double speed 128 Fs or Quad-speed 64 Fs)
MCLK Frequency (Single-speed 384 Fs,
Double speed 192 Fs or Quad-speed, 96 Fs
MCLK Frequency (Single-speed 512 Fs,
Double speed 256 Fs or Quad-speed, 128 Fs
MCLK Frequency (Single-speed 768 Fs,
Double speed 384 Fs or Quad-speed, 192 Fs
4.096
6.144
8.192
12.288
-12.8MHz
-19.2MHz
-25.6MHz
-38.4MHz
MCLK Duty Cycle 40 50 60 %
SCLK Frequency (Single-speed mode)
(Double-speed mode)
(Quad-speed mode)
SCLK rising to LRCK edge delay t
SCLK rising to LRCK edge setup time t
SDATA valid to SCLK rising setup time t
SCLK rising to SDATA hold time t
slrd
slrs
sdlrs
sdh
-
-
-
-
-
-
256×Fs
128×Fs
64×Fs
20 - - ns
20 - - ns
20 - - ns
20 - - ns
Hz
Hz
Hz
LRCK
t
sclkl
t
sdh
t
sclkh
SCLK
SDATA
t
slrd
t
sdlrs
t
slrs
Figure 1. Serial Audio Input Timing
8 DS288PP1
SWITCHING CHARACTERISTICS - CONTROL PORT
(TA = 25 °C; VD = 5.25 V to 3.0 Volts; Inputs: logic 0 = AGND, logic 1 = VD, CL = 30 pF)
Parameter Symbol Min Max Unit
I2C® Mode
SCL Clock Frequency f
RST
Rising Edge to Start t
Bus Free Time Between Transmissions t
Start Condition Hold Time (prior to first clock pulse) t
Clock Low time t
Clock High Time t
Setup Time for Repeated Start Condition t
SDA Hold Time from SCL Falling (Note 8) t
SDA Setup time to SCL Rising t
Rise Time of Both SDA and SCL Lines t
Fall Time of Both SDA and SCL Lines t
Setup Time for Stop Condition t
scl
irs
buf
hdst
low
high
sust
hdd
sud
r
f
susp
-100KHz
500 - ns
4.7 - µs
4.0 - µs
4.7 - µs
4.0 - µs
4.7 - µs
0-µs
250 - ns
-1µs
-300ns
4.7 - µs
CS4396
Notes: 8. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
RST
t
SDA
SCL
irs
Stop Start
t
buf
t
hdst
t
low
t
hdd
t
high
t
sud
Repeated
Start
t
t
sust
hdst
t
f
t
r
Figure 2. I2C Control Port Timing
Stop
t
susp
DS288PP1 9
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