Cirrus Logic CS4390-KS, CS4390-KP, CDB4390 Datasheet

CS4390

24-Bit, Stereo D/A Converter for Digital Audio

Features

24-Bit Conversion

115 dB Signal-to-Noise-Ratio (EIAJ)

Complete Stereo DAC System

— 128X Interpolation Filter — Delta-Sigma DAC — Analog Post Filter

106 dB Dynamic Range

Low Clock Jitter Sensitivity

Filtered Line-Level Outputs

— Linear Phase Filtering — Zero Phase Error Between Channels

Adjustable System Sampling Rates

— including 32 kHz, 44.1 kHz & 48 kHz

Digital De-emphasis for 32 kHz, 44.1 kHz, & 48 kHz

Pin-compatible with the CS4329

DIF0

LRCK SCLK

SDATA

7 9

DIF1

Serial Input

Interface

DIF2

DEM01DEM1

12 3 6

De-emphasis

Description

The CS4390 is a complete stereo digital-to-analog output system. In addit ion to the tr aditional D/A function, t he CS4390 includes a digital interpolation filter followed by an 128X oversampled delt a-sigma modulator. The modulator output controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for infin ite adjustment of sample rate between 1 and 50 kHz while maintaining linear phase response simply by changing the master clock frequency.

The CS4390 also includes an extremely flexible serial port utilizing mode select pins to support multiple interface formats.

The master clock can be either 256, 384, or 512 times the input sample rate, supporting various audio environments.

ORDERING INFORMATION

CS4390-KP -10° to 70° C 20-pin Plastic DIP CS4390-KS -10° to 70° C 20-pin Plastic SSOP CDB4390 Evaluation Board

VA VD

Voltage Reference

MUTE_L

Interpolator

AUTO_MUTE

Cirrus Logic, Inc. Crystal Semiconductor Products Division

P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.crystal.com

Interpolator

DGND

Delta-Sigma

Modulator

Delta-Sigma

Modulator

MCLK

DAC

AGND

Analog

Low-Pass

Filter

Analog

Low-Pass

Filter

MUTE_R

AOUTL+

AOUTL-

AOUTR+

AOUTR-

JUN ‘98

DS264F1

CS4390

ANALOG CHARACTERISTICS (T

48 kHz; Input Data = 24 Bits; SCLK = 3.072 MHz; MCLK = 12.288MHz; RL = 20kΩ differential; VD = VA = 5V; Logic "1" = VD; Logic "0" = DGND; Measurement Bandwidth is 10 Hz to 20kHz, unweighted unless otherwise specified.)

Parameter Symbol Min Typ Max Unit

Specified Temperature Operating Range T

= 25°C; Full-Scale Differential Output Sine wave, 997Hz; Fs =

-10 - 70 °C

Dynamic Performance

Dynamic Range 24-Bit (Note 1)

(A-Weighted)

20-Bit

(A-Weighted)

16-Bit

(A-Weighted)

Total Harmonic Distortion + Noise (Note 1) 24-Bit 0 dB

-20 dB

-60 dB

20-Bit 0 dB

-20 dB

-60 dB

16-Bit 0 dB

-20 dB

-60 dB Idle Channel Noise / Signal-to-Noise-Ratio (Note 2) - 115 - dBFS Interchannel Isolation (1 kHz) - -110 - dB

THD+N

101

-90

-78

-38

103 106 103 106

94 96

-98

-83

-43

-98

-83

-43

-93

-74

-34

dB dB dB dB dB dB

dB dB dB dB dB dB dB dB dB

Combined Digital and Analog Filter Characteristics

Frequency Response 10Hz to 20kHz (Note 3) - ±0.1 - dB Deviation from linear phase - ±0.5 - deg Passband: to -0.1dB corner (Note 3) 0 - 21.77 kHz Passband Ripple - - ±0.001 dB StopBand (Note 3) 26.23 - - kHz StopBand Attenuation (Note 3) 75 - - dB Group Delay (Note 4) - 25/Fs - s De-emphasis Error (referenced to 1kHz) Fs = 32kHz

Fs = 44.1kHz

Fs = 48kHz

+0.3/-0.3 +0.2/-0.4

+0.1/-0.45

dB dB dB

dc Accuracy

Interchannel Gain Mismatch - 0.1 - dB Gain Error - ±2 ±5 % Gain Drift - 200 - ppm/°C

Power Supplies

Power Supply Current: Normal Operation

Power-down

Power Dissipation Normal Operation

Power-down

Power Supply Rejection Ratio (1kHz) PSRR - 60 - dB

I I

IA+I

A D

30 12 42

500 210

2.5

225

mA mA mA

µA

mW mW

2 DS264F1

CS4390

ANALOG CHARACTERISTICS (CONTINUED)

Parameter Symbol Min Typ Max Unit

Analog Output

Differential Full Scale Output Voltage (Note 5) 1.90 2.0 2.10 Vrms Output Common Mode Voltage - 2.2 - V Differential Offset - 3 15 mV AC Load Resistance R Load Capacitance C

Notes:1.Triangular PDF Dithered Data

2.AUTO-MUTE

active. See parameter definitions

3.The passband and stopband edges scale with frequency. For input sample rates, Fs, other than 48kHz,

the passband edge is 0.4535×Fs and the stopband edge is 0.5465×Fs.

4.Group Delay for Fs=48kHz 25/48kHz=520µs

5.Specified for a fully differential output ±((AOUT+)-(AOUT-)). See Figure 12.

L L

4--k

- - 100 pf

Ω

SWITCHING CHARACTERISTICS (T

1=VD=VA=5.25 to 4.75 Volts; C

=20pF)

=-10 to 70°C; Logic 0 = AGND=DGND; Logic

Parameter Symbol Min Typ Max Unit

Input Sample Rate Fs 1 - 50 kHz MCLK Pulse Width High MCLK / LRCK = 512 10 - - ns MCLK Pulse Width Low MCLK / LRCK = 512 10 - - ns MCLK Pulse Width High MCLK / LRCK = 384 21 - - ns MCLK Pulse Width Low MCLK / LRCK = 384 21 - - ns MCLK Pulse Width High MCLK / LRCK = 256 31 - - ns MCLK Pulse Width Low MCLK / LRCK = 256 32 - - ns

External SCLK Mode

SCLK Pulse Width Low t SCLK Pulse Width High t SCLK Period t

SCLK rising to LRCK edge delay t SCLK rising to LRCK edge setup time t SDATA valid to SCLK rising setup time t SCLK rising to SDATA hold time t

sclkl

sclkh

sclkw

slrd

slrs

sdlrs

sdh

20--ns 20--ns

-------------------128Fs()

--ns

20--ns 20--ns 20--ns 20--ns

Internal SCLK Mode

SCLK Period SCLK / LRCK = 64 t

SDATA valid to SCLK rising setup time t

SCLK rising to SDATA hold time MCLK / LRCK = 256 or 512

SCLK rising to SDATA hold time MCLK / LRCK = 384 t

sclkw

sdlrs

sdh

----------------64Fs()

-------------------512Fs()

-------------------384Fs()

--ns

10+

15+

--ns

DS264F1 3

LRCK

SCLK

SDATA

slrs

slrd

sdlrs

sclkl

sdh

External Serial Mode Input Timing

CS4390

sclkh

LRCK

SDATA

*INTE R NA L S C LK

* The SCLK pin must be terminated to ground. The SCLK pulses shown are internal to the CS4390.

sdlrstsdh

Internal Serial Mode Input Timing

sclkw

4 DS264F1

CS4390

DIGITAL CHARACTERISTICS (T

Parameter Symbol Min Typ Max Unit

High-Level Input Voltage V Low-Level Input Voltage V Input Leakage Current V Digital Input Capacitance - 10 - pF

= 25°C; VD = 5 V ±5%)

IH IL

2.0 - - V

--0.8V

--±10.0µA

ABSOLUTE MAXIMUM RATINGS (AGND = 0 V, all voltages with respect to ground.)

Parameter Symbol Min Max Unit

DC Power Supply: Positive Analog

Positi ve D ig ital

|VA - VD| Input Current, Any Pin Except Supplies I Digital Input Voltage V Ambient Operating Temperature (power applied) T Storage Temperature T

WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation

is not guaranteed at these extremes.

RECOMMENDED OPERATING CONDITIONS

VA VD

IND

stg

(DGND = 0V; all voltages with respect to ground)

-0.3

0.0

-±10mA

-0.3 (VD)+0.4 V

-55 125 °C

-65 150 °C

6.0

0.4

V V V

Parameter Symbol Min Typ Max Unit

DC Power Supply: Positive Digital

Positi ve Analog

|VA - VD|

4.75

5.0

5.25

0.4

V V V

DS264F1 5

CS4390

Ω

1 µF

0.1 µF

1 µF

0.1 µF

+5V

Analog

Mode

Select

Audio

Data

Processor

External Clock

DIF0

DIF1

DIF2

LRCK

SCLK*

SDATA

DEM0

DEM1

MUTE_R

MUTE_L

AUTO_MUTE

MCLK

DGND

CS4390

AGND

AOUTL-

AOUTL+

AOUTR-

AOUTR+

Analog

Conditioning

Analog

Conditioning

* SCLK mus t be connec ted to D GND for operation in Internal SCLK Mode

Figure 1. Typical Connection Diagram

6 DS264F1

CS4390

GENERAL DESCRIPTION

The CS4390 is a com plete ste reo dig ital-t o-analo g

system including 128× digital interpolation, fourthorder delta-sigma digital-to-analog conversion, 128× oversampled one-bit delta-sigma modulator and analog filtering. This architecture provides a high insensitivity to clock jitter. The DAC converts digital data at a ny input sample rat e bet w een 1 and 50 kHz, including the standa rd audio rates of 48,

44.1 and 32 kHz. The primary purpose of using delta-sigma modula-

tion techni ques is to avo id the limi tations of laser trimmed resistive DAC architectures by using an inherently linear 1-bit DAC. The advantages of a 1bit DAC include: ideal differential linearity, no distortion mechanisms due to resistor matching errors and no linearity drift over time and temperature due to variations in resist or va lues.

Digital Interpolation Filter

The digital interpolation filter increases the sample rate by a factor of 4 and is followed by a 32× digital sample-and hold to effectivel y achieve a 128× interpolation filter. This filter eliminates images of the baseband audio s ignal w hich exi st at m ultiple s of the input sample rate, Fs. This allows for the selection of a less complex analog filter based on outof-band noise atte nuat ion requi reme nts rath er t han anti-image filtering. Following the interpolation filter, the resulting frequ ency spectrum ha s i ma g e s

of the input signa l at multiples of 128× the in put sample rate. These images are removed by the external analog filter.

Delta-Sigma Modulator

The interpola tion filter is fol lowed by a fo urth-order delta-sigm a modula tor whic h convert s the 24bit interpolation filter output into 1-bit data at 128× Fs.

Switched-Capacitor Filter

The delta-sigma modulator is followed by a digitalto-analog co nverter whi ch transl ates the 1-bi t data into a se ries of char ge packets. T he magnitud e of the charge in each packet is determined by sampling of a voltage reference onto a switched capacitor, where the polarity of each packet is controlled by the 1-b it signa l. Thi s techn ique greatl y reduce s the sensitivity to clock jitter and is a major improvement over earlier generations of 1-bit digitalto-analog converters where the magnitude of charge in the D-to-A process is determined by switching a curr ent reference for a period of time defined by the mast er c loc k.

The CS4390 incorporates a differential output to maximize the output level to minimize the amount of gain required in the output analog stage. The differential outp ut also allows for the can cellation of common mode errors in the di fferential to si ngledended conve rter.

Interpolator

DS264F1 7

Delta-Sigma

Modulator

DAC

Figure 2. Block Diagram

Analog

Low-Pass

Filter

AOUTL+

AOUTL-

+ 15 hidden pages