Cirrus Logic CS4360 User Manual
CS4360
24-Bit, 192 kHz 6-channel D/A Converter
Features
24-bit Conversion
102 dB Dynamic Range
-91 dB THD+N
Low Clock Jitter Sensitivity
Digital Volume Control with Soft Ramp
– 119 dB Attenuation
– 1-dB Step Size
– Zero Crossing Click-Free Transitions
ATAPI Mixing
Logic Levels Between 5.0 V and 1.8 V
+3.3 V or +5 V Analog Power Supply
116 mW with 3.3 V Supply
Popguard Technology® for Control of Clicks
and Pops
I
Description
The CS4360 is a complete 6-channel digital-to-analog
system including digital interpolation, fourth-order deltasigma digital-to-analog conversion, digital de-emphasis,
volume control, channel mixing and analog filtering. The
advantages of this architecture include: ideal differential
linearity, no distortion mechanisms due to resistor
matching errors, no linearity drift over time and temperature, and a high tolerance to clock jitter.
The CS4360 accepts data at audio sample rates from
4 kHz to 200 kHz, consumes very little power, and operates over a wide power supply range. These features are
ideal for cost-sensitive, multi-channel audio systems including DVD players, A/V receivers, set-top boxes,
digital TVs and VCRs, mini-component systems, and
mixing consoles.
ORDERING INFORMATION
CS4360-KZ -10 to 70 °C 28-pin TSSOP
CS4360-KZZ -10 to 70 °C Lead Free 28-pin TSSOP
CS4360-DZZ -40 to 85 °C Lead Free 28-pin TSSOP
CDB4360 Evaluation Board
RST
VLS
SCLK
LRCK
SD I N1
SD I N2
SD I N3
MCLK
2
÷
http://www.cirrus.com
DIF1/ SCL/CCLK
Serial Port
DIF0/SDA/CDIN M1/AD0/CS
Control Port
Interpolation Filter
Interpolation Filter
Interpolation Filter
VD
Copyright © Cirrus Logic, Inc. 2004
(All Rights Reserved)
VLC
M2
Volume C ontrolInterpolati on Filter Analog Filter AOUT A1
Mixer
Volume Control
Volume C ontrolInterpolation Filter Analog Filter AOUT A2
Mixer
Volume Control
Volume C ontrolInterpolation Filter Analog Filter AOUT A3
Mixer
Volu me Control
VA
GND
GND
MUTEC1 MUTEC2 MUTEC3
External
Mute Control
∆Σ
DAC
∆Σ
DAC
∆Σ
DAC
∆Σ
DAC
∆Σ
DAC
∆Σ
DAC
Analog Filter
Analog Filter
Analog Filter
AO UTB1
AO UTB2
AO UT B3
VQ
FILT+
DS517F2
JUL ‘04
1
TABLE OF CONTENTS
1. PIN DESCRIPTION ................................................................................................................... 5
2. TYPICAL CONNECTION DIAGRAM ...................................................................................... 7
3. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 8
SPECIFIED OPERATING CONDITIONS ................................................................................. 8
ABSOLUTE MAXIMUM RATINGS ........................................................................................... 8
ANALOG CHARACTERISTICS (CS4360-KZ/KZZ) .................................................................. 9
ANALOG CHARACTERISTICS (CS4360-DZZ) ..................................................................... 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE......................... 13
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE........................................... 16
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 17
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 18
DC ELECTRICAL CHARACTERISTICS.................................................................................19
DIGITAL INPUT CHARACTERISTICS ...................................................................................19
DIGITAL INTERFACE SPECIFICATIONS..............................................................................20
THERMAL CHARACTERISTICS AND SPECIFICATIONS ....................................................20
4. APPLICATIONS ...................................................................................................................... 21
4.1 Sample Rate Range/Operational Mode Select ................................................................ 21
4.1.1 Stand-alone Mode ............................................................................................... 21
4.1.2 Control Port Mode ............................................................................................... 21
4.2 System Clocking .............................................................................................................. 21
4.3 Digital Interface Format .................................................................................................... 22
4.3.1 Stand-alone Mode ............................................................................................... 22
4.3.2 Control Port Mode ..............................................................................................23
4.4 De-emphasis Control ....................................................................................................... 23
4.4.1 Stand-alone Mode ............................................................................................... 24
4.4.2 Control Port Mode ............................................................................................... 24
4.5 Recommended Power-up Sequence ............................................................................... 24
CS4360
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to http://www.cirrus.com/
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reli able. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advi sed to obtain the latest version of
relevant information to verify, before placing orders, that i nformation being relied on is current and complete. All products are sol d subject to the terms and conditions of sale supplied at the time of order acknowledgment, incl uding those pertaini ng to warranty, patent infringement, and l imitation of liability. No responsibility is assumed by Cirrus for the use of this information, includi ng use of this information as the basis for manufacture or sale of any i tems, or for infringement
of patents or other rights of third parties. This document is the property of Cirrus and by furni shing thi s information, Cirrus grants no license, express or implied
under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the
information contained herein and gives consent for copies to be made of the informati on only for use within your organization with respect to Cirrus integrated
circuits or other products of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes,
or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS") . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE I N AIRCRAFT SYSTEMS, MIL ITARY APPLI CATIONS, PRODUCTS SURGICA LLY IMPLANTED I NTO THE BODY, LI FE SUPPORT PRODUCTS
OR OTHER CRITICAL APPLICATIONS (INCLUDING MEDICAL DEVICES, AIRCRAFT SYSTEMS OR COMPONENTS AND PERSONAL OR AUTOMOTIVE
SAFETY OR SECURITY DEVICES). INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR PARTI CULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF
THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER
AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM
ANY AND ALL L IABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTI ON WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All oth er brand and product names i n this document may be trademarks or servi ce marks of their respective owners.
I²C is a registered trademark of Philips Semiconductor. Purchase of I²C Components of Cirrus Logic, Inc., or one of its sublicensed Associ ated Companies conveys a license under the Philips I²C Patent Rights to use those components in a standard I ²C system.
2 DS517F2
CS4360
4.5.1 Stand-alone Mode ............................................................................................... 24
4.5.2 Control Port Mode ............................................................................................... 24
4.6 Popguard
4.6.1 Power-up ............................................................................................................. 24
4.6.2 Power-down ........................................................................................................ 24
4.6.3 Discharge Time ................................................................................................... 25
4.7 Mute Control .................................................................................................................... 25
4.8 Grounding and Power Supply Arrangements .................................................................. 25
4.8.1 Capacitor Placement ........................................................................................... 25
4.8.2 Power Supply Sections ....................................................................................... 25
4.9 Control Port Interface ...................................................................................................... 25
4.9.1 Memory Address Pointer (MAP) ......................................................................... 26
4.9.2 I²C Mode ............................................................................................................. 26
4.9.3 SPI Mode ............................................................................................................ 27
5. REGISTER QUICK REFERENCE ......................................................................................... 29
6. REGISTER DESCRIPTIONS .................................................................................................. 30
6.1 Mode Control 1 (address 01h) ......................................................................................... 30
6.1.1 Auto-mute (AMUTE) Bit 7 ....................................................................................... 30
6.1.2 Digital Interface Format (DIF) Bit 4-6 ...................................................................... 30
6.1.3 De-emphasis Control (DEM) Bit 2-3........................................................................ 31
6.1.4 Functional Mode (FM) Bit 0-1.................................................................................. 31
6.2 Invert Signal (address 02h) ............................................................................................. 31
6.2.1 Invert Signal Polarity (INV_xx) Bit 0-5..................................................................... 31
6.3 Mixing Control Pair 1 (Channels A1 & B1) (address 03h)
Mixing Control Pair 2 (Channels A2 & B2) (address 04h)
Mixing Control Pair 3 (Channels A3 & B3) (address 05h)............................................. 31
6.3.1 ATAPI Channel Mixing and Muting (atapi) Bit 0-3................................................... 32
6.4 Volume Control (addresses 06h - 0Bh) ........................................................................... 33
6.4.1 MUTE (MUTE) Bit 7 ................................................................................................ 33
6.4.2 VOLUME CONTROL (xx_VOL) Bit 0-6................................................................... 33
6.5 Mode Control 2 (address 0Dh) ......................................................................................... 33
6.5.1 Soft Ramp and Zero Cross CONTROL (SZC) Bit 6-7............................................. 33
6.5.2 Control Port Enable (CPEN) Bit 5 ........................................................................... 34
6.5.3 Power Down (PDN) Bit 4......................................................................................... 34
6.5.4 Popguard® Transient Control (POPG) Bit 3 ........................................................... 34
6.5.5 Freeze Controls (FREEZE) Bit 2............................................................................. 35
6.5.6 Master Clock DIVIDE ENABLE (MCLKDIV) Bit 1 ................................................... 35
6.5.7 Single Volume Control (SNGLVOL) Bit 0................................................................ 35
6.6 Revision Register (Read Only) (address 0Dh) ................................................................ 35
6.6.1 Revision Indicator (REV) [Read Only] Bit 0-3 ......................................................... 35
®
Transient Control .......................................................................................... 24
4.9.1a INCR (Auto Map Increment) ................................................................ 26
4.9.1b MAP0-3 (Memory Address Pointer) ..................................................... 26
4.9.2a I²C Write ............................................................................................... 26
4.9.2b I²C Read ............................................................................................... 27
4.9.3a SPI Write .............................................................................................. 28
7. PARAMETER DEFINITIONS .................................................................................................. 36
Total Harmonic Distortion + Noise (THD+N) .......................................................................... 36
Dynamic Range...................................................................................................................... 36
Interchannel Isolation ............................................................................................................. 36
Interchannel Gain Mismatch ................................................................................................... 36
Gain Error............................................................................................................................... 36
Gain Drift ................................................................................................................................ 36
DS517F2 3
8. REFERENCES ........................................................................................................................ 36
9. PACKAGE DIMENSIONS ....................................................................................................... 37
LIST OF FIGURES
Figure 1. Typical Connection Diagram .......................................................................................... 7
Figure 2. Output Test Load ......................................................................................................... 10
Figure 3. Maximum Loading ........................................................................................................10
Figure 4. Single-speed Stopband Rejection ................................................................................ 14
Figure 5. Single-speed Transition Band ...................................................................................... 14
Figure 6. Single-speed Transition Band (Detail) ......................................................................... 14
Figure 7. Single-speed Passband Ripple .................................................................................... 14
Figure 8. Double-speed Stopband Rejection .............................................................................. 14
Figure 9. Double-speed Transition Band .....................................................................................14
Figure 10. Double-speed Transition Band (Detail) ........................................................................ 15
Figure 11. Double-speed Passband Ripple ................................................................................... 15
Figure 12. Serial Mode Input Timing .............................................................................................16
Figure 13. Control Port Timing - I²C Mode .................................................................................... 17
Figure 14. Control Port Timing - SPI Mode ...................................................................................18
Figure 15. Left Justified up to 24-Bit Data .....................................................................................23
Figure 16. I
Figure 17. Right Justified Data ...................................................................................................... 23
Figure 18. De-emphasis Curve .....................................................................................................23
Figure 19. I²C Write ....................................................................................................................... 27
Figure 20. I²C Read .......................................................................................................................27
Figure 21. SPI Write ...................................................................................................................... 28
Figure 22. ATAPI Block Diagram ..................................................................................................32
2
S, up to 24-Bit Data ................................................................................................... 23
CS4360
LIST OF TABLES
Table 1. CS4360 Stand-alone Operational Mode............................................................................. 21
Table 2. CS4360 Control Port Operational Mode............................................................................. 21
Table 3. Single-speed Mode Standard Frequencies ........................................................................ 21
Table 4. Double-speed Mode Standard Frequencies ....................................................................... 21
Table 5. Quad-speed Mode Standard Frequencies ......................................................................... 22
Table 6. Digital Interface Format - Stand-alone Mode...................................................................... 22
Table 7. Power Supply Control Sections ..........................................................................................25
Table 8. Digital Interface Formats - Control Port Mode....................................................................30
Table 9. ATAPI Decode.................................................................................................................... 32
Table 10. Example Digital Volume Settings ..................................................................................... 33
4 DS517F2
1. PIN DESCRIPTION
CS4360
VLS MUTEC1
SDIN1 AOUTA1
SDIN2 AOUTB1
SDIN3 MUTEC2
SCLK AOUTA2
LRCK AOUTB2
MCLK VA
VD GND
GND AOUTA3
RST
DIF1/SCL/CCLK MUTEC3
DIF0/SDA/CDIN VQ
M1/AD0/CS FILT+
VLC M2
1
2
3
4
5
6
7
821
9
10
11
12 17
13
14 15
CS4360
28
27
26
25
24
23
22
20
19
18
16
AOUTB3
DS517F2 5
Pin Name # Pin Description
VLS
SDIN1
SDIN2
SDIN3
SCLK
LRCK
MCLK
VD
GND
Serial Audio Interface Power (Input) - Positive power for the serial audio interface.
1
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
2
3
4
Serial Clock (Input) - Serial clock for the serial audio interface.
5
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial audio
6
data line.
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
7
8 Digital Power (Input) - Positive power supply for the digital section.
Ground (Input)
9
21
RST
VLC
FILT+
VQ
VA
AOUTB3
AOUTA3
AOUTB2
AOUTA2
AOUTB1
AOUTA1
MUTEC3
MUTEC2
MUTEC1
Control Port
Definitions
SCL/CCLK
SDA/CDIN
AD0/CS
Stand-Alone
Definitions
DIF1
DIF0
M1
M2
Reset (Input) - Powers down device and resets all internal resisters to their default settings.
10
Control Port Interface Power (Input) - Positive power for the control port interface.
14
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
16
17 Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
22 Analog Power (Input) - Positive power supply for the analog section.
Analog Outputs (Output) - The full scale analog line output level is specified in the Analog Char acter is-
19
tics and Specifications table.
20
23
24
26
27
Mute Control (Output) - Control signal for optional mute circuit.
18
25
28
Serial Control Port Clock (Input) - Serial clock for the control port interface.
11
12 Serial Control Data I/O (Input/Output) - Input/Output for I²C data. Input for SPI data.
Address Bit / Chip Select (Input) - Chip address bit in I²C Mode. Control signal used to select the chip
13
in SPI mode.
Digital Interface Format (Input) - Defines the required relationship between the Left Right Clock, Serial
11
Clock and Serial Audio Data.
12
13
Mode Selection (Input) - Determines the operational mode of the device.
15
CS4360
6 DS517F2
2. TYPICAL CONNECTION DIAGRAM
CS4360
+3.3 V to +5 V *
+1.8 V to +5 V *
Configuration
Digital
Audio
Source
µ C/
Mode
1 µF
0.1 µF
+
0.1 µF
7
MCLK
6
LRCK
5
SCLK
4
SDIN1
3
SDIN2
2
SDIN3
1
VLS
10
RST
11
DIF1/SCL/CCLK
12
DIF0/SDA/CDIN
13
M1/AD0/CS
15
M2
22
VA
CS4360
8
VD
AOUTA1
AOUTB1
MUTEC1
AOUTA2
AOUTB2
MUTEC2
AOUTA3
AOUTB3
0.1 µF
27
+
3.3 µF
26
+
3.3 µF
28
24
+
3.3 µF
23
+
3.3 µF
25
20
+
3.3 µF
19
+
3.3 µF
10 k
10 k
10 k
10 k
10 k
10 k
+
1 µF
560 Ω
Ω
560 Ω
Ω
560 Ω
Ω
560 Ω
Ω
560 Ω
Ω
560 Ω
Ω
+3.3 V to VA *
* All supplies can be tied together
C
OPTIONAL
MUTE
CIRCUIT
C
C
OPTIONAL
MUTE
CIRCUIT
C
C
OPTIONAL
MUTE
CIRCUIT
C
R
L
R
L
R
L
R
L
R
L
R
L
AOUTA1
AOUTB1
AOUTA2
AOUTB2
AOUTA3
AOUTB3
FILT+
VQ
18
16
17
0.1 µ
+
F
C =
3.3 µF
4πFs(R
R
+560
L
560)
L
F
3.3 µF
+
0.1 µ
+1.8 V to +5 V *
0.1 µF
14
VLC
GND
9
MUTEC3
GND
21
Figure 1. Typical Connection Diagram
DS517F2 7
CS4360
3. CHARACTERISTICS AND SPECIFICATIONS
Typical performance characteristics are derived from measurements taken at T
characteristics and specifications are guaranteed over the operating temperature and voltages.
SPECIFIED OPERATING CONDITIONS GND = 0 V; all voltages with respect to GND.
Parameters Symbol Min Typ Max Units
DC Power Supply
Analog 3.3 V Nominal
(Note 1) 5.0 V Nominal
Digital 2.5 V Nominal
(Note 1) 3.3 V Nominal
5.0 V Nominal
Serial Audio Interface 1.8 V Nominal
2.5 V Nominal
3.3 V Nominal
5.0 V Nominal
Control Port Interface 1.8 V Nominal
2.5 V Nominal
3.3 V Nominal
5.0 V Nominal
VA 3.0
VD 2.25
VLS 1.7
VLC 1.7
= 25°C. Min/Max performance
A
4.5
3.0
4.5
2.25
3.0
4.5
2.25
3.0
4.5
3.3
5
2.5
3.3
5
1.8
2.5
3.3
5
1.8
2.5
3.3
5
3.6
5.5
2.75
3.6
5.5
1.9
2.75
3.6
5.5
1.9
2.75
3.6
5.5
V
V
V
V
V
V
V
V
V
V
V
V
V
ABSOLUTE MAXIMUM RATINGS
GND = 0 V; all voltages with respect to GND. Operation beyond these limits may result in permanent damage to
the device. Normal operation is not guaranteed at these extremes.
Parameters Symbol Min Max Units
DC Power Supply Analog
Digital
Serial Audio Interface
Control Port Interface
Input Current
(Note 2) I
Digital Input Voltage Serial Audio Interface
Control Port Interface
Ambient Operating Temperature (power applied) T
Storage Temperature T
Notes: 1. Nominal VD supply must be less than or equal to the nominal VA supply.
2. Any pin except supplies.
VA
VD
VLS
VLC
V
IND_S
V
IND_C
in
stg
-0.3
-0.3
-0.3
-0.3
6.0
6.0
6.0
6.0
V
V
V
V
-±10mA
-0.3
-0.3
A
-55 125 °C
VLS+0.4
VLC+0.4
V
V
-65 150 °C
8 DS517F2
CS4360
ANALOG CHARACTERISTICS (CS4360-KZ/KZZ)
Test conditions (unless otherwise specified): Input test signal is a 997 Hz sine wave at 0 dBFS; measurement
bandwidth is 10 Hz to 20 kHz; test load R
Parameter
Single-Speed Mode Fs = 48 kHz
Dynamic Range
Total Harmonic Distortion + Noise
Double-Speed Mode Fs = 96 kHz
Dynamic Range
40 kHz Bandwidth A-Weighted
Total Harmonic Distortion + Noise
Quad-Speed Mode Fs = 192 kHz
Dynamic Range
40 kHz Bandwidth A-Weighted
Total Harmonic Distortion + Noise
=10kΩ, CL = 10 pF (see Figure 2). All supplies = VA = 5.0 V or 3.3 V.
L
5.0 V 3.3 V
Min Typ Max Min Typ Max Unit
(Note 3)
unweighted
A-Weighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
(Note 3)
unweighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
(Note 3)
unweighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
94
97
94
97
94
97
99
102
-
100
-
-91
-
-79
-
-39
99
102
-
100
-
-91
-
-79
-
-39
99
102
-
100
-
-91
-
-79
-
-39
-
-
-
-86
-
-
-
-
-
-86
-
-
-
-
-
-86
-
-
89
92
89
92
89
92
94
97
-
-
-
-
97
-91
-74
-34
94
97
-
-
-
-
97
-91
-74
-34
94
97
-
-
-
-
97
-91
-74
-34
-
-
-
-86
-
-
-
-
-
-86
-
-
-
-
-
-86
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Notes: 3. One-half LSB of triangular PDF dither is added to data.
DS517F2 9
CS4360
ANALOG CHARACTERISTICS (CS4360-KZ/KZZ) (Continued)
Parameters Symbol Min Typ Max Units
Dynamic Performance for All Modes
Interchannel Isolation (1 kHz) - 102 - dB
DC Accuracy
Interchannel Gain Mismatch ICGM - 0.1 - dB
Gain Drift - ±100 - ppm/°C
Analog Output Characteristics and Specifications
Full Scale Output Voltage 0.60•VA 0.66•VA 0.72•VA Vpp
Output Impedance Z
Minimum AC-Load Resistance
Maximum Load Capacitance
(Note 4) R
(Note 4) C
4. Refer to Figure 3.
.
out
L
L
125
- 100 - Ω
-3-kΩ
- 100 - pF
AGND
3.3 µF
AOUTx
+
Figure 2. Output Test Load
100
L
V
out
R
L
C
L
75
50
25
Capacitive Load -- C (pF)
2.5
51015
3
Safe Operating
Region
Resistive Load -- R (kΩ)
L
20
Figure 3. Maximum Loading
10 DS517F2
CS4360
ANALOG CHARACTERISTICS (CS4360-DZZ)
Test conditions (unless otherwise specified): Input test signal is a 997 Hz sine wave at 0 dBFS; measurement
bandwidth is 10 Hz to 20 kHz; test load R
Parameter
Single-speed Mode Fs = 48 kHz
Dynamic Range
Total Harmonic Distortion + Noise
Double-speed Mode Fs = 96 kHz
Dynamic Range
40 kHz Bandwidth A-Weighted
Total Harmonic Distortion + Noise
Quad-speed Mode Fs = 192 kHz
Dynamic Range
40 kHz Bandwidth A-Weighted
Total Harmonic Distortion + Noise
= 10 kΩ, CL = 10 pF (see Figure 2). All supplies = VA = 5.0 V and 3.3 V.
L
VA = 5.0 V VA = 3.3 V
Min Typ Max Min Typ Max Unit
(Note 3)
unweighted
A-Weighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
(Note 3)
unweighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
(Note 3)
unweighted
A-Weighted
(Note 3)
0 dB
-20 dB
-60 dB
89
92
89
92
89
92
99
102
-
100
-
-91
-
-79
-
-39
99
102
-
100
-
-91
-
-79
-
-39
99
102
-
100
-
-91
-
-79
-
-39
-
-
-
-84
-
-
-
-
-
-84
-
-
-
-
-
-84
-
-
89
92
89
92
89
92
94
97
-
-
-
-
97
-91
-74
-34
94
97
-
-
-
-
97
-91
-74
-34
94
97
-
-
-
-
97
-91
-74
-34
-
-
-
-84
-
-
-
-
-
-84
-
-
-
-
-
-84
-
-
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
DS517F2 11
CS4360
ANALOG CHARACTERISTICS (CS4360-DZZ) (Continued)
Parameters Symbol Min Typ Max Units
Dynamic Performance for All Modes
Interchannel Isolation (1 kHz) - 102 - dB
DC Accuracy
Interchannel Gain Mismatch ICGM - 0.1 - dB
Gain Drift - ±100 - ppm/°C
Analog Output Characteristics and Specifications
Full Scale Output Voltage 0.60•VA 0.66•VA 0.72•VA Vpp
Output Impedance Z
AC-load Resistance
Load Capacitance
(Note 4) R
(Note 4) C
out
L
L
- 100 - Ω
3--kΩ
--100pF
12 DS517F2
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