Cirrus Logic CS4349 User Manual

PCM

Serial

Interface

Serial Audio Input

Right
Channel
Output

Left
Channel
Output

Reset

3.3 V to 5 V

Register/

Hardware

Configuration

Hardware or I2C/
SPI Control Data

1.5 V to 5 V

Internal Voltage

Reference

and Regulation

Interpolation

Filter with

Volume
Control

Interpolation

Filter with

Volume

Control

Multibit 

Modulator

Multibit 

Modulator

Level Translator Level Translator

Amp

+

Filter

Amp

+

Filter

Left and
Right Mute
Controls

External

Mute

Control

DAC

DAC

3.3 V to 5 V

CS4349

192-kHz DAC with Volume Control and 1 Vrms @ 3.3 V

Features

 Advanced multibit delta–sigma architecture

 101 dB dynamic range

 -91 dB THD+N at 5.0 V

 -84 dB THD+N at 3.3 V

 24-bit conversion

 Supports audio sample rates up to 192 kHz

 Low-latency digital filtering

 Single-ended analog output architecture

 Automatic sample-rate range detection

 Popguard

®

technology for control of clicks and

pops

– Hardware Popguard disable for fast

startups

 Supports all standard serial audio formats

including time-division multiplexed (TDM)

 +3.3 V or +5.0 V analog supply

 +1.5 V to +5.0 V logic supplies for serial port

 +3.3 V to +5.0 V control port interface

Control Port Mode Features

 SPI™ and I²C

 ATAPI mixing

 Mute control for individual channels

 Digital volume control with soft ramp

– 127.5 dB attenuation

– 1/2 dB step size
– Zero-crossing click-free transitions

™

Modes

http://www.cirrus.com

Copyright  Cirrus Logic, Inc. 2013

(All Rights Reserved)

APR ‘13

DS782F2

CS4349

Description

The CS4349 is a complete stereo digital-to-analog system including digital interpolation, 5th-order multi-bit delta­sigma digital-to-analog conversion, digital de-emphasis, volume control, channel mixing, and analog filtering. The
advantages of this architecture include ideal linearity, no distortion mechanisms due to resistor matching errors, no
linearity drift over time and temperature, tolerance to clock jitter, and a minimal set of external components.

The CS4349 supports all standard digital audio interface formats, including TDM.

The CS4349 is available in a 24-pin TSSOP package in both Commercial (-40° to +85°C) and Automotive grades
(-40° to +105°C). The CDB4349 Customer Demonstration board is also available for device evaluation and imple­mentation suggestions. “Ordering Information” on page 39 provides complete ordering information.

These features are ideal for cost-sensitive, two-channel audio systems, including DVD players and recorders, set­top boxes, digital TVs, mini-component systems, musical instruments and automotive audio systems.

2 DS782F2

TABLE OF CONTENTS

1 PIN DESCRIPTION................................................................................................................................... 6

2 CHARACTERISTICS AND SPECIFICATIONS........................................................................................ 8

2.1 Recommended Operating Conditions ............................................................................................. 8

2.2 Absolute Maximum Ratings ............................................................................................................. 8

2.3 DAC Analog Characteristics - Commercial (-CZZ) .......................................................................... 9

2.4 DAC Analog Characteristics - Automotive (-DZZ) ......................................................................... 10

2.5 Combined Interpolation and On-Chip Analog Filter Response...................................................... 12

2.6 Switching Specifications - Serial Audio Interface...........................................................................13

2.7 Switching Characteristics - Control Port - I²C Format.................................................................... 14

2.8 Switching Characteristics - Control Port - SPI Format................................................................... 15

2.9 Digital Characteristics .................................................................................................................... 16

2.10 Power and Thermal Characteristics............................................................................................. 16

3 TYPICAL CONNECTION DIAGRAM ................................................................................................... 17

4 APPLICATIONS ..................................................................................................................................... 18

4.1 Sample Rate Range and Oversampling Mode Detect................................................................... 18

4.1.1 Sample Rate Auto-Detect .................................................................................................... 18

4.2 System Clocking ............................................................................................................................ 18

4.3 Digital Interface Format ................................................................................................................. 19

4.3.1 Time-Division Multiplex (TDM) Mode ................................................................................... 20

4.4 De-Emphasis ................................................................................................................................. 21

4.5 Mute Control .................................................................................................................................. 21

4.6 Recommended Power-Up Sequence ............................................................................................ 21

4.6.1 Stand-Alone Mode ............................................................................................................... 21

4.6.2 Control Port Mode ................................................................................................................ 22

4.7 Popguard Transient Control .......................................................................................................... 22

4.7.1 Power-Up ............................................................................................................................. 22

4.7.2 Power-Down......................................................................................................................... 22

4.7.3 Discharge Time .................................................................................................................... 22

4.8 Analog Output and Filtering ........................................................................................................... 23

4.9 Grounding and Power Supply Arrangements ................................................................................ 23

4.9.1 Capacitor Placement............................................................................................................ 23

5 STAND-ALONE OPERATION................................................................................................................ 24

5.1 Serial Port Format Selection.......................................................................................................... 24

5.2 De-Emphasis Control .................................................................................................................... 24

5.3 Popguard Transient Control .......................................................................................................... 24

6 CONTROL PORT OPERATION ............................................................................................................. 25

6.1 MAP Auto Increment ..................................................................................................................... 25

6.2 I²C Mode........................................................................................................................................ 25

6.2.1 I²C Write ............................................................................................................................... 25

6.2.2 I²C Read............................................................................................................................... 25

6.3 SPI Mode....................................................................................................................................... 26

6.3.1 SPI Write .............................................................................................................................. 26

6.3.2 SPI Read.............................................................................................................................. 27

6.4 Memory Address Pointer (MAP) ................................................................................................... 27

6.4.1 INCR (Auto Map Increment Enable) .................................................................................... 27

6.4.2 MAP (Memory Address Pointer) .......................................................................................... 27

7 REGISTER QUICK REFERENCE .......................................................................................................... 28

8 REGISTER DESCRIPTION .................................................................................................................... 29

8.1 Device and Revision ID - Register 01h.......................................................................................... 29

8.2 Mode Control - Register 02h ......................................................................................................... 29

8.2.1 Digital Interface Format (DIF[2:0]) Bits 6-4 .......................................................................... 29

8.2.2 De-Emphasis Control (DEM[1:0]) Bits 3-2 ........................................................................... 30

CS4349

DS782F2 3

CS4349

8.2.3 Functional Mode (FM[1:0]) Bits 1-0...................................................................................... 30

8.3 Volume Mixing and Inversion Control - Register 03h .................................................................... 30

8.3.1 Channel A Volume = Channel B Volume (VOLB=A) Bit 7 ................................................... 30

8.3.2 Invert Signal Polarity (INVERT_A) Bit 6 ............................................................................... 30

8.3.3 Invert Signal Polarity (INVERT_B) Bit 5 ............................................................................... 31

8.3.4 ATAPI Channel Mixing and Muting (ATAPI[3:0]) Bits 3-0 .................................................... 31

8.4 Mute Control - Register 04h .......................................................................................................... 32

8.4.1 Auto-Mute (AMUTE) Bit 7 .................................................................................................... 32

8.4.2 AMUTEC = BMUTEC (MUTEC A=B) Bit 5 .......................................................................... 32

8.4.3 Channel A Mute (MUTE_A) Bit 4 & Channel B Mute (MUTE_B) Bit 3 ................................. 32

8.5 Channel A & B Volume Control - Register 05h & 06h ................................................................... 33

8.6 Ramp and Filter Control - Register 07h ......................................................................................... 33

8.6.1 Soft Ramp and Zero Cross Control (SZC[1:0]) Bits 7-6 ....................................................... 33

8.6.2 Soft Volume Ramp-Up After Error (RMP_UP) Bit 5 ............................................................. 34

8.6.3 Soft Ramp-Down Before Filter Mode Change (RMP_DN) Bit 4 ........................................... 34

8.6.4 Interpolation Filter Select (FILT_SEL) Bit 2.......................................................................... 34

8.7 Miscellaneous Control - Register 08h............................................................................................ 35

8.7.1 Power Down (PDN) Bit 7...................................................................................................... 35

8.7.2 Freeze Controls (FREEZE) Bit 5.......................................................................................... 35

8.7.3 Popguard Enable (POPG_EN) Bit 4 .................................................................................... 35

9 FILTER PLOTS ................................................................................................................................... 36

10 PARAMETER DEFINITIONS................................................................................................................ 37

11 PACKAGE DIMENSIONS .................................................................................................................... 38

12 THERMAL CHARACTERISTICS ......................................................................................................... 38

13 ORDERING INFORMATION ................................................................................................................ 39

14 REVISION HISTORY ........................................................................................................................... 39

4 DS782F2

LIST OF FIGURES

Figure 1. Output Test Load ........................................................................................................................ 11

Figure 2. Maximum Loading....................................................................................................................... 11

Figure 3. THD+N vs Output Amplitude for VA = 5.0 V ............................................................................... 11

Figure 4. THD+N vs Output Amplitude for VA = 3.3 V ............................................................................... 11

Figure 5. THD+N vs Output Amplitude for VA = 3.14 V ............................................................................. 11

Figure 6. Serial Port Timing, Non-TDM Mode............................................................................................ 14

Figure 7. Serial Port Timing, TDM Mode.................................................................................................... 14

Figure 8. Control Port Timing - I²C Format................................................................................................. 14

Figure 9. Control Port Timing - SPI Mode .................................................................................................. 15

Figure 10. Typical Connection Diagram..................................................................................................... 17

Figure 11. Left-Justified up to 24-Bit Data.................................................................................................. 19

Figure 12. I²S, up to 24-Bit Data ................................................................................................................ 19

Figure 13. Right-Justified Data................................................................................................................... 19

Figure 14. TDM Mode Connection Diagram .............................................................................................. 20

Figure 15. TDM Mode Timing .................................................................................................................... 20

Figure 16. De-Emphasis Curve.................................................................................................................. 21

Figure 17. Passive Single-Ended Output Filter .......................................................................................... 23

Figure 18. Control Port Timing, I²C Mode .................................................................................................. 26

Figure 19. Control Port Timing, SPI Mode ................................................................................................. 27

Figure 20. De-Emphasis Curve.................................................................................................................. 30

Figure 21. ATAPI Block Diagram ............................................................................................................... 31

Figure 22. Stopband Rejection (Fast), all Modes....................................................................................... 36

Figure 23. Stopband Rejection (Slow), all Modes ...................................................................................... 36

Figure 24. Single-Speed (Fast) Passband Detail....................................................................................... 36

Figure 25. Single-Speed (Slow) Passband Detail ...................................................................................... 36

Figure 26. Double-Speed (Fast) Passband Detail ..................................................................................... 36

Figure 27. Double-Speed (Slow) Passband Detail..................................................................................... 36

Figure 28. Quad-Speed (Fast) Passband Detail ........................................................................................ 37

Figure 29. Quad-Speed (Slow) Passband Detail ....................................................................................... 37

CS4349

LIST OF TABLES

Table 1. Pin Description ............................................................................................................................... 6

Table 2. Recommended Operating Conditions ............................................................................................ 8

Table 3. Absolute Maximum Ratings ........................................................................................................... 8

Table 4. DAC Analog Characteristics - Commercial (-CZZ).........................................................................9

Table 5. DAC Analog Characteristics - Automotive (-DZZ) ........................................................................ 10

Table 6. Combined Interpolation and On-Chip Analog Filter Response .................................................... 12

Table 7. Switching Specifications - Serial Audio Interface ......................................................................... 13

Table 8. Switching Characteristics - Control Port - I²C Format .................................................................. 14

Table 9. Switching Characteristics - Control Port - SPI Format ................................................................. 15

Table 10. Digital Characteristics ................................................................................................................ 16

Table 11. Power and Thermal Characteristics ........................................................................................... 16

Table 12. CS4349 Auto-Detect .................................................................................................................. 18

Table 13. Digital Interface Format - Stand-Alone Mode............................................................................. 24

Table 14. Digital Interface Formats ............................................................................................................ 29

Table 15. ATAPI Decode ........................................................................................................................... 31

Table 16. Example Digital Volume Settings ............................................................................................... 33

Table 17. Thermal Characteristics ............................................................................................................. 38

DS782F2 5

1 PIN DESCRIPTION

DIF2(AD1/CDOUT) RST

DEM(AD0/CS)TSTO

DIF0(SDA/CDIN) AOUTB

DIF1(SCL/CCLK) BMUTEC

VLC VQ

VD_FILT GND

GND VA

POPGUARD(TSTO) VBIAS

VLS AMUTEC

SCLK AOUTA

SDIN TSTO

LRCK TSTO

2

3

4

5

6

7

8

17

18

19

20

21

22

23

9

10

11

12

13

14

15

16

24

1

CS4349

Table 1. Pin Description

Pin Name

VLC 5 Control Interface Power (Input) - Positive power for the hardware/software control interface

VD_FILT 6 Regulator Voltage (Output) - Filter connection for internal voltage regulator

GND 7, 19 Ground (Input) - Ground reference

VLS 9 Serial Audio Interface Power (Input) - Positive power for the serial audio interface

SCLK 10 Serial Clock (Input) - Serial bit-clock for the serial audio interface

SDIN 11 Serial Audio Data Input (Input) - Input for two’s complement serial audio data

LRCK 12

TSTO 13 Test Output (Output) - This pin needs to be floating and not connected to any trace or plane.

TSTO

AOUTA
AOUTB

AMUTEC
BMUTEC

VBIAS 17 Positive Voltage Reference (Output) - Positive reference voltage for the internal DAC

VA 18 Analog Power (Input) - Positive power supply for the analog section

VQ 20 Quiescent Voltage (Output) - Filter connection for internal quiescent voltage

RST

6 DS782F2

#

Pin Description

Left/Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial

audio data line

14

Test Output (Output) - These pins need to be floating and not connected to any trace or plane.

23

1522Analog Outputs (Output) - The full-scale output level is specified in “DAC Analog Characteristics -

Commercial (-CZZ)” on page 9.

16

Mute Control (Output) - Control signals for optional mute circuit

21

Reset (Input) - When pulled low, device will power down and reset all internal registers to their default

24

settings.

Table 1. Pin Description

CS4349

Pin Name

Control Port Definitions

AD1/CDOUT 1 Address Bit 1 / Serial Control Data Out (I/O) - Chip address bit 1 in I²C Mode or data output in SPI Mode

AD0/CS

SDA/CDIN 3 Serial Control Data In (I/O) - Input/Output for I²C data. Input for SPI data

SCL/CCLK 4 Serial Control Port Clock (Input) - Serial clock for the control port interface

TSTO 8 Test Output (Output) - This pin needs to be floating and not connected to any trace or plane.

Stand-Alone Definitions

DIF0
DIF1
DIF2

DEM

POPGUARD

#

Pin Description

2 Address Bit 0 / Chip Select (Input) - Chip address bit 0 in I²C Mode or Chip Select in SPI Mode

3

Digital Interface Format (Input) - Defines the required relationship between the Left Right Clock, Serial

4

Clock, and Serial Audio Data

1

De-emphasis (Input) - Selects the standard 15 s/50 s digital de-emphasis filter response for

2

44.1 kHz sample rates

Popguard Enable (Input/Output) - At RST

8

Otherwise pull low to disable. After RST is released this pin becomes TSTO.

this pin is an input to enable Popguard when pulled high;

DS782F2 7

CS4349

2 CHARACTERISTICS AND SPECIFICATIONS

2.1 Recommended Operating Conditions

GND = 0 V; all voltages with respect to ground.

Table 2. Recommended Operating Conditions

Parameters Symbol Min Typ Max Units

DC Power Supply Analog power VA 4.75 5.0 5.25 V

VA 3.14 3.3 3.46 V

Serial Audio Interface power

Control Interface power

Ambient Operating Temperature (Power Applied)

Commercial (-CZZ) T

Automotive (-DZZ) T

2.2 Absolute Maximum Ratings

GND = 0 V; all voltages with respect to ground (Note 1).

Table 3. Absolute Maximum Ratings

Parameters Symbol Min Max Units

DC Power Supply Analog power VA -0.3 6.0 V

Serial Audio Interface power

Control Interface power
Input Current (Note 2) I
Digital Input Voltage Serial Audio Interface V
Control Interface V
Ambient Operating Temperature (power applied) T
Storage Temperature T

Notes: 1. Operation beyond these limits may result in permanent damage to the device.

Normal operation is not guaranteed at these extremes.

2. Any pin except supplies.

VLS 1.35 3.3 5.25 V

VLC 3.14 3.3 5.25 V

A

A

VLS -0.3 6.0 V

VLC -0.3 6.0 V

in

IN-LS

IN-LC

A

stg

-40 - +85 °C

-40 - +105 °C

-±10mA

-0.3 VLS+ 0.4 V

-0.3 VLC+ 0.4 V

-55 125 °C

-65 150 °C

8 DS782F2

CS4349

2.3 DAC Analog Characteristics - Commercial (-CZZ)

Test conditions (unless otherwise specified): VLS = VLC = 3.3 V; TA = 25° C; input test signal is a 997 Hz
sine wave;

typical connection diagram in Figure 10 and

bandwidth 10 Hz to 20 kHz.

VA = 5.0 V

Dynamic Range (Note 3) 24-bit A-Weighted

Total Harmonic Distortion + Noise (Note 3)

VA = 3.3 V

Dynamic Range (Note 3) 24-bit A-Weighted

Total Harmonic Distortion + Noise (Note 3)

VA = 5.0 to 3.3 V

Interchannel Isolation (1 kHz) - 100 - dB

DC Accuracy

Interchannel Gain Mismatch - 0.1 0.25 dB

Gain Drift - -400 - ppm/°C

Analog Output

Full Scale Output Voltage 2.70 2.78 2.97 Vpp

Quiescent Voltage V

Max DC Current draw from an AOUT pin I

Max Current draw from VQ I

Max AC-Load Resistance (Note 4) R

Max Load Capacitance (Note 4) C

Output Impedance Z

Valid with the recommended capacitor values on VFILT, VQ, and VBIAS and output circuit as shown in the

Figure 17; Fs = 48 kHz, 96 kHz, and 192 kHz; measurement

Table 4. DAC Analog Characteristics - Commercial (-CZZ)

Parameter Symbol Min Typ Max Unit

unweighted

16-bit A-Weighted

unweighted

24-bit 0 dB

-20 dB

-60 dB

16-bit 0 dB

-20 dB

-60 dB

unweighted

16-bit A-Weighted

unweighted

24-bit 0 dB

-2 dB

-20 dB

-60 dB

16-bit 0 dB

-20 dB

-60 dB

THD+N

THD+N

98
95

-

-

-

-

-

-

-

-

-

98
95

-

-

-

-

-

-

-

-

-

101

98
95
92

-91

-78

-38

-90

-72

-32

101

98
95
92

-86

-91

-78

-38

-83

-72

-32

-85

-35

-79

-35

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

dB
dB
dB
dB

dB
dB
dB
dB
dB
dB

dB
dB
dB
dB

dB
dB
dB
dB
dB
dB
dB

Q

OUTmax

Qmax

L

L

OUT

-0.5•VA-VDC

-10-A

- 100 - A

-3-k

- 100 - pF

- 100 - 

Notes: 3. One LSB of triangular PDF dither is added to data. See Figure 3, Figure 4, and Figure 5 for details on

THD+N performance.

4. R

and CL represent the minimum resistance and maximum capacitance required for the CS4349’s in-

L

ternal op-amp to remain stable. See Figure 1 and Figure 2 for more details.

DS782F2 9

CS4349

2.4 DAC Analog Characteristics - Automotive (-DZZ)

Test conditions (unless otherwise specified): VLS = 1.35 V to 5.25 V, VLC = 3.14 V to 5.25 V, TA = -40° C
to 85° C, input test signal is a 997 Hz sine wave;

VBIAS and output circuit as shown in the typical connection diagram in

96 kHz, and 192 kHz; measurement bandwidth 10 Hz to 20 kHz.

Table 5. DAC Analog Characteristics - Automotive (-DZZ)

Parameter Symbol Min Typ Max Unit

VA = 4.75 V to 5.25 V

Dynamic Range (Note 3) 24-bit A-Weighted

unweighted

16-bit A-Weighted

unweighted

Total Harmonic Distortion + Noise (Note 3)

24-bit 0 dB

-20 dB

-60 dB

16-bit 0 dB

-20 dB

-60 dB

VA = 3.14 V to 3.46 V

Dynamic Range (Note 3) 24-bit A-Weighted

unweighted

16-bit A-Weighted

unweighted

Total Harmonic Distortion + Noise (Note 3)

24-bit 0 dB

-2 dB

-20 dB

-60 dB

16-bit 0 dB

-20 dB

-60 dB

VA = 3.14 to 5.25 V

Interchannel Isolation (1 kHz) - 100 - dB

DC Accuracy

Interchannel Gain Mismatch - 0.1 0.25 dB

Gain Drift - -400 - ppm/°C

Analog Output

Full Scale Output Voltage 2.63 2.78 3.05 Vpp

Quiescent Voltage V

Max DC Current draw from an AOUT pin I

Max Current draw from VQ I

Max AC-Load Resistance (Note 4) R

Max Load Capacitance (Note 4) C

Output Impedance Z

Valid with the recommended capacitor values on VFILT, VQ, and

Figure 10 and Figure 17; Fs = 48 kHz,

THD+N

THD+N

95
92

-

-

-

-

-

-

-

-

95
91

-

-

-

-

-

-

-

-

-

101

98
95
92

-91

-78

-38

-90

-72

-32

101

98
95
92

-81

-91

-78

-38

-83

-72

-32

-

-

-

-

-85

-

-32

-

-

-

-

-

-

-

-50

-

-

-31

-

-

-

Q

OUTmax

Qmax

L

L

OUT

-0.5•VA-VDC

-10-A

-100-A

-3-k

-100-pF

-100-

dB
dB
dB
dB

dB
dB
dB
dB
dB
dB

dB
dB
dB
dB

dB
dB
dB
dB
dB
dB

10 DS782F2

CS4349

AOUTx +

3.3 µF

Analog
Output

+

GND

R

L

C

L

100

50

75

25

2.5

51015

Safe Operating

Region

Capacitive Load -- C (pF)

L

Resistive Load -- R (k)

L

125

3

20

Figure 1. Output Test Load Figure 2. Maximum Loading

CS4349

-3-2.5-2-1.5-1-0 .50

-100

-90

-80

-70

-60

-50

-40

-30

Output Amp litude(d B)

THD+N (dB)

TA = -40° C
TA = 25° C
TA = 85° C

-3-2.5-2-1.5-1-0.50

-100

-90

-80

-70

-60

-50

-40

-30

Output Amplitude(dB)

THD+N (dB)

TA = -40° C
TA = 25° C
TA = 85° C

Figure 3. THD+N vs Output Amplitude for VA = 5.0 V Figure 4. THD+N vs Output Amplitude for VA = 3.3 V

-3-2.5-2-1 .5-1-0.50

-100

-90

-80

-70

-60

-50

-40

-30

Output Amplitude(dB)

THD+N (dB)

TA = -40° C
TA = 25° C
TA = 85° C

Figure 5. THD+N vs Output Amplitude for VA = 3.14 V

Figures 3 through 5 show typical THD+N performance for CS4349 devices that exhibit the maximum full
scale output voltages as specified in the DAC Analog Characteristics tables (see page 9 and 10). With
decreasing VA, THD+N performance is increasingly affected by the full scale output voltage and
temperature, with higher full scale output voltage and lower temperatures corresponding to lower THD+N
performance.

DS782F2 11

CS4349

2.5 Combined Interpolation and On-Chip Analog Filter Response

The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired
sample rate by multiplying the given characteristic by Fs. Amplitude vs. Frequency plots of this data are
available in the “Filter Plots” on page 36.

Table 6. Combined Interpolation and On-Chip Analog Filter Response

Parameter Min Typ Max Unit

Fast Roll-Off

Passband (Note 5) -0.01 dB corner (Single Speed) 0 - .454 Fs

-0.1 dB corner (Double Speed) 0 - .42 Fs

-0.2 dB corner (Quad Speed) 0 - .27 Fs

-3 dB corner (All Speed Modes) 0 - .499 Fs

Frequency Response 10 Hz to 20 kHz Single Speed -0.01 - +0.01 dB

Double Speed, Quad Speed -0.02 - +0.02 dB

StopBand 0.547 - - Fs

Stop-Band Attenuation (Note 6) 102 - - dB

Total Group Delay (Fs = Output Sample Rate) TDM Slot 0 Channel B - 8.4/Fs - s

All Other Interface Formats and TDM Slots/Channels - 9.4/Fs - s

Intrachannel Phase Deviation - - ±0.56/Fs s

Inter-channel Phase Deviation - - 0 s

De-emphasis Error (Note 7) Fs = 32 kHz - - ±0.23 dB

(Relative to 1 kHz) Fs = 44.1 kHz - - ±0.14 dB

Fs = 48 kHz

Slow Roll-Off (Note 8)

Passband (Note 5) -0.01 dB corner (Single Speed) 0 - 0.417 Fs

-0.1 dB corner (Double Speed) 0 - .37 Fs

-0.2 dB corner (Quad Speed) 0 - .27 Fs

-3 dB corner (All Speed Modes) 0 - .499 Fs

Frequency Response 10 Hz to 20 kHz Single Speed -0.01 - +0.01 dB

Double Speed, Quad Speed -0.02 - +0.02 dB

StopBand .583 - - Fs

Stop-Band Attenuation (Note 6) 64 - - dB

Total Group Delay (Fs - Output Sample Rate) TDM Slot 0 Channel B - 5.5/Fs - s

All Other Interface Formats and TDM Slots/Channels - 6.5/Fs - s

Intrachannel Phase Deviation - - ±0.14/Fs s

Inter-channel Phase Deviation - - 0 s

De-emphasis Error (Note 7) Fs = 32 kHz - - ±0.23 dB

(Relative to 1 kHz) Fs = 44.1 kHz - - ±0.14 dB

Fs = 48 kHz

--±0.09dB

--±0.09dB

Notes: 5. Response is clock dependent.

6. The Measurement Bandwidth is from stopband to 3 Fs.

7. De-emphasis is available only in Single-Speed Mode; Only 44.1 kHz De-emphasis is available in Stand­Alone Mode.

8. Slow Roll-off interpolation filter is only available in Control Port Mode.

12 DS782F2