Cirrus Logic CS4298-KQ, CS4298-JQ Datasheet

CS4298

SoundFusion® Audio/Modem Codec ’97(AMC’97)

FEATURES

■ AC ‘97 2.0 compatible

■ 20-bit stereo output and 18-bit stereo input codec

with fixed 48 kHz sampling rat e

■ 20-bit output and 18-bit input dual modem AFE

with fixed 48 kHz s ampling rate

■ Dedicated ADC for handset or speakerphone

■ Four analog line-level stereo inputs for connec-

tion from LINE IN, CD, VIDEO, and AUX

■ High quality pseudo-differential CD input

■ Dual stereo line level output with independent 6-

bit volume control

■ 10 General Purpose I/O pins for Modem DAA

controls

■ IEC-958 Digital Output (S/PDIF)

■ Meets or exceed s M i cro soft's

audio performance requirements

■ CrystalClear™ 3D Stereo Enha ncement

PCM_OUT

MIC1

MIC2

LINE

CD

VIDEO

AUX

MIC SELECT

2

/

2

/

2

/

2

/

®

PC 98 and PC 99

MAIN D/A

CONVERTERS

VOL MUTE

DAC

VOL

+20dB

VOL

VOL

VOL

VOL

VOL

2

/

PCM OUT

PATH

MUTE

MUTE

MUTE

MUTE

MUTE

MUTE

STEREO TO

MONO MIXER

DESCRIPTION

The CS4298 is an AC ‘97 compatible Audio/Mo­dem Co dec des igned for P C mu ltim edia sy stem s.
Using the industry leading CrystalClear™ delta­sigma and mixed signal technology, the CS4298 is
ideal for PC 98-compliant desktop, notebook, and
entertain ment PCs, w here high-q uality audio an d
modem features are required.The CS4298 offers
four channels of D/A and A/D conversion along
with ana log mixing an d 3D proc essing. For m ulti­channel audio systems, the CS4298 can provide
four audio channels . For c ombined audio/mod em
systems , the C S42 98 can prov ide a mod em AFE ,
voice codec, and stereo audio c odec..

ORDERING INFORMATION

CS4298-KQ 64-pin TQFP 10x10x1.4mm
CS4298-JQ 64-pin TQFP 10x10x1.4mm

STEREO

INPUT
MIXER

3D

ΣΣ

STEREO
OUTPUT

MIXER

Σ

MAIN ADC GAIN

ADC

VOL MUTE ADC

INPUT

MUX

MASTER VOLUME

VOL

ALTERNATE VOLUME

VOL

2

/

OUTPUT
BUFFER

OUTPUT
BUFFER

2

/

LINE_OUT

2

/

ALT_LINE_OUT

SDATA_OUT

RESET#

Mode Control

SYNC

MRX+

MRX-

HRX+

HRX-

3

/

(loopback) MTX+

(loopback) MTX-

(loopback) HTX+

(loopback) HTX-

Vref

Vref

Preliminary Product Information

P.O. Box 17847, Austin, Texas 78760
[phone] FAX: [phone]
http://www.cirrus.com

SDATA_IN

AC-Link Interface

VOL

VOL

VOL

VOL

ADC DAC

ADC DAC

MRX-

MRX+

HRX+

HRX-

- +

Class AB

+ -

- +

Class AB

+ -

Dif out

Dif out

10

/

BIT_CLK
GPIO

MTX+

MTX-

HTX+

HTX-

This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.

Copyright  Cirrus Logic, Inc. 1999

(All Rights Reserved)

DS315PP2

AUG ‘99

1

TABLE OF CONTENTS

1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................5

AUDIO ANALOG CHARACTERISTICS......... ......... ................. ......... .......... ......... .....................5

ABSOLUTE MAXIMUM RATINGS...........................................................................................6

RECOMMENDED OPERATING CONDITIONS.......................................................................6

MIXER CHARACTERISTICS. ................. ......... .......... ......... ................. ......... .......... ..................6

MODEM CHARACTERISTICS.................................................................................................7

SERIAL PORT TIMING.............................................................................................................9

2. GENERAL DESCRIPTION .....................................................................................................12

2.1 Overview...................... ......... ................................. .......... ................................. ................12

2.2 Modes of Operation ..........................................................................................................12

2.2.1 Mode 0 ....................................................................................................................12

2.2.2 Mode 1 ....................................................................................................................12

2.2.3 Mode 2 ....................................................................................................................12

2.2.4 Mode 3 ....................................................................................................................12

3. DIGITAL SECTION .................................................................................................................13

3.1 AC-Link.......................... ......... .......... ................ .......... ......... ................. ......... ................. ..13

3.2 Control registers................................................................................................................13

4. ANALOG SECTION ................................................................................................................14

4.1 Audio Output Mixer...........................................................................................................14

4.2 Audio Input Mux................................................................................................................14

4.3 Audio Input Mixer..............................................................................................................14

4.4 Audio Volume Control.......................................................................................................14

5. AC ‘97 .....................................................................................................................................16

5.1 AC ‘97 Frame Definition ....................................................................................................16

5.2 AC-Link Serial Data Output Frame...................................................................................16

5.3 AC-Link AudioOutput Frame.............................................................................................17

5.3.1 Serial Data Output Slot Tags (Slot 0).............................................................................17

5.3.2 Register Address (Slot 1)...............................................................................................17

5.3.3 Register Write Data (Slot 2)...........................................................................................18

5.3.4 Playback Data (Slots 3-11)............................................................................................18

5.3.5 GPIO Data (Slot12)........................................................................................................18

5.4 AC-Link Audio Input Frame...............................................................................................18

5.4.1 Serial Data Input Slot Tag Bits (Slot 0) .........................................................................18

5.4.2 Read-Back Address Port (Slot 1). ..................................................................................19

5.4.3 Read-Back Data Port (Slot 2) ........................................................................................19

5.4.4 PCM Capture Data (Slot 3-11).......................................................................................19

5.4.5 GPIO Pin Status (Slot 12)..............................................................................................19

CS4298

Contacting Cirrus Logic Support

For a complete listing of Dir ect Sales, Distrib utor, and S ales Representative contacts, vi sit the Cirr us Logic w eb site at:

http://www.cirrus.com/corporate/contacts/

Preliminary product information describes products which are in production, but for whi ch full characterization data is not yet available. Advance product infor­mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided “AS IS” without warranty of any

kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third
parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publi­cation may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise)
without the prior written consent of Cirrus Logic, Inc . Items fro m any Cirrus Logic webbiest or disk may be printed for use by the user. However, no part of the
printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photo­graphic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or
sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in
this document may be trademarks or service marks of their respective owners which may be regi stered in some jurisdictions. A list of Cirrus Logic, Inc. trade­marks and service marks can be found at http://www.cirrus.com.

2 DS315PP2

CS4298

5.5 AC ’97 Reset Modes.........................................................................................................20

5.5.1 Cold AC ‘97 Reset................................................................................................... 20

5.5.2 Warm AC ’97 Reset ................................................................................................20

5.5.3 AC’97 Register Reset.............................................................................................20

5.6 AC-Link Protocol Violation - Loss of SYNC...................................................................... 20

6. REGISTER INTERFACE ........................................................................................................21

6.1 Register Descriptions .......................................................................................................23

6.1.1 Reset (Index 00h) ......................................................................................................... 23

6.1.2 Master Volume (Index 02h) .......................................................................................... 23

6.1.3 Alternate Volume (Index 04h) ....................................................................................... 24

6.1.4 Microphone Volume (Index 0Eh)................................................................................... 24

6.1.5 Stereo Analog Mixer Input Gain (Index’s 10h - 18h) ..................................................... 25

6.1.6 Input Mux Select (Index 1Ah) ........................................................................................ 25

6.1.7 Record Gain (Index 1Ch)............................................................................................... 26

6.1.8 Record Gain Microphone (Index 1Eh)...........................................................................26

6.1.9 General Purpose (Index 20h) ........................................................................................ 26

6.1.10 3D Control (Index 22h)................................................................................................ 26

6.1.11 Power Down Control/Status (Index 26h) .................................................. ....... ..... .......27

6.1.12 Extended Audio ID (Index 28h) ..................................................................................28

6.1.13 Extended Audio Status / Control (Index 2Ah) ............................................................. 28

6.1.14 PCM Front DAC Rate (Index 2Ch) ...........................................................................29

6.1.15 PCM Surround DAC Rate (Index 2Eh) .................................................. ..... .. ..... .......29

6.1.16 PCM LFE DAC Rate (Index 30h) .................................................. ....... .. ..... ....... ..... ..29

6.1.17 PCM LR ADC Rate (Index 32h)................................................................................... 29

6.1.18 PCM MIC ADC Rate (Index 34h)................................................ ..... .. ..... .. ....... ..... ..... ..29

6.1.19 Center LFE Volume (Index 36h)..................................................................................30

6.1.20 LR Surround Volume (Index 38h)................................................................................ 30

6.1.21 Extended Modem ID (Index 3Ch) ............................................................................... 30

6.1.22 Extended Modem ID (Index 3Eh) ............................................................................... 31

6.1.23 Line 1 DAC/ADC Rate (Index 40h)......................................................... ....... .. .......... ..31

6.1.24 Line 2 DAC/ADC Rate (Index 42h)......................................................... ....... .. .......... ..31

6.1.25 Handset DAC/ADC Rate (Index 44h) .......................................................................... 32

6.1.26 Line 1 DAC/ADC Level (Index 46h)................................................................. .......... ..32

6.1.27 Line 2 DAC/ADC Level (Index 48h)................................................................. .......... ..32

6.1.28 Handset DAC/ADC Level (Index 4Ah)......................................................................... 32

6.1.29 GPIO Pin Configuration (Index 4Ch)........................................................................... 33

6.1.30 GPIO Pin Polarity/Type Configuration (Index 4Eh) ..................................................... 33

6.1.31 GPIO Pin Sticky (Index 50h)........................................................................................ 33

6.1.32 GPIO Pin Wakeup Mask (Index 4Ch)......................................................................... 34

6.1.33 GPIO Pin Status (Index 54h)....................................................................................... 34

6.1.34 Misc. Modem AFE Status (Index 56h) ........................................................................ 34

6.1.35 AC Mode Control (Index 5Eh) ............................... ....... ....... .. ............ ..... ....... ....... .......35

6.1.36 S/PDIF Control (Index 68h) .........................................................................................35

6.1.37 Vendor ID1 (Index 7Ch)......................................................... .......... ....... ....... ............ ..36

6.1.38 Vendor ID2 (Index 7Eh)........................................... ....... ....... ................. ......... ............36

7. ANALOG HARDWARE DESCRIPTION ................................................................................. 37

7.1 Line-Level Inputs..............................................................................................................37

7.2 Microphone Level Inputs .................................................................................................. 38

7.3 Line Level Outputs............................................................................................................ 38

7.4 Consumer IEC-958 Digital Interface (S/PDIF)..................................................................39

7.5 Miscellaneous Analog Signals..........................................................................................39

7.6 Power Supplies................................................. .......... .. ....... ..... ....... ....... ..... ....... .. ............ 40

7.7 Hybrid Int er fa c e............. ......... ................. ......... .......... ................ .......... ......... ................... 41

DS315PP2 3

8. PIN DESCRIPTIONS ..............................................................................................................42

8.1 g2 ......................................... ......... .......... ................. ......... ................................. .......... ....43

8.2 Analog I/O Pins ................................................................................................................45

8.3 Filter and Reference Pins ................................................................................................46

8.4 Modem/Telephony ...........................................................................................................47

8.5 Power Supplies ................................................ .......... ....... .. ....... ..... ....... ....... ..... ....... .......48

9. PARAMETER AND TERM DEFINITIONS ..............................................................................49

10. REFERENCES ......................................................................................................................50

11. PACKAGE DIMENSIONS .....................................................................................................51

LIST OF FIGURES

Figure 1. Power Up Timing............................................................................................................10

Figure 2. Clocks ............................................................................................................................10

Figure 3. Codec Ready from Startup or Fault Condition...............................................................10

Figure 4. Data Setup and Hold ......................................................................................................11

Figure 5. PR4 Powerdown............................................................................................................11

Figure 6. Test Mode......................................................................................................................11

Figure 7. AC-link Connections.......................................................................................................13

Figure 8. Mixer Diagram................................................................................................................15

Figure 9. AC-link Input and Output Framing..................................................................................16

Figure 10. Line Inputs........................................................................................................ ............37

Figure 11. Differential CDROM In .................................................................................................37

Figure 12. PC ‘99 Microphone Pre-amplifier ....................................................... ............ ............ ..38

Figure 13. Headphones Driver ......................................................................................................39

Figure 14. IEC-958 Interface Examples........................................................................................40

Figure 15. Voltage Regulator ........................................................................................................ 40

Figure 16. Hybrid Circuit Secondary ............................ ..... ..... .. ..... .. ..... .. ..... ..... .. ..... .. ..... .. ..... ..... ..41

CS4298

LIST OF TABLES

Table 1. Mixer Registers ...............................................................................................................21

Table 2. Alternate Line-Out and Master Mono Attenuation...........................................................24

Table 3. Analog Mixer Input Gain Values......................................................................................24

Table 4. Stereo Volume Register Index ........................................................................................25

Table 5. Input Mux Selection.........................................................................................................25

Table 6. 6 Channel Volume Attenuation........................................................................................30

Table 7. GPIO Input/Output Configuration....................................................................................33

Table 8. Misc. Modem Configuration.............................................................................................34

Table 9. Slot Assignments............................................................................................................35

Table 10. Reg. 7Eh Defined Part ID’s...........................................................................................36

4 DS315PP2

CS4298

1. CHARACTERISTICS AND SPECIFICATIONS

AUDIO ANALOG CHARACTERISTICS (Standard test conditions unless otherwise noted:

T

Z
for ADC, 20-bit linear coding for DAC; Mixer registers set for unity gain.

= 25° C, AVdd = 5.0 V ±5%, DVdd = 3.3 V ±5%; 1 kHz Input Sine wave; Sample Frequency, Fs = 48 kHz;

ambient

=10 kΩ/680 pF load CDL = 18 pF load (Note 1); Measurement bandwidth is 20 Hz - 20 kHz, 18-bit linear coding

AL

Path

Parameter (Note 2)Symbol

(Note 3)

CS4298-KQ CS4298-JQ

UnitMin Typ Max Min Typ Max

Full Scale Analog Input Voltage
Line Inputs
Mic Inputs (20 dB=0)
Mic Inputs (20 dB=1)

A-D
A-D
A-D

0.91

0.91

0.091

1.00

1.00

0.10

-

0.91

-

0.91

-

0.091

1.00

1.00

0.10

-

V
V
V

RMS
RMS
RMS

-

-

Full Scale Output Voltage (Note 4)
Line and Alternate Line Outputs D-A 0.91 1. 0 1.13 0.91 1.0 1.13 V

RMS

Frequency Response
Analog Ac = ± 0.5 dB
DAC Ac = ± 0.5 dB
ADC Ac = ± 0.5 dB

FR A-A

D-A
A-D

20
20
20

-

-

-

20,000
20,000
20,000

20
20
20

-

-

-

20,000
20,000
20,000

Hz
Hz
Hz

Dynamic Range
Stereo Analog inputs to LINE_OUT
Mono Analog inputs to LINE_OUT
DAC Dynamic Range
ADC Dynamic Range

DR A-A

A-A
D-A
A-D

90
85
85
85

95
90
90
90

-

-

-

-

-

90

-

85

-

87

-

85

-

-

-

-

dB FS A
dB FS A
dB FS A
dB FS A

DAC SNR (-20 dB FS input w/
CCIR-RMS filter on output) SNR D-A - 63 - - - - dB

Total Harmonic Distortion + Noise
(-3 dB FS input signal):
Line/Alternate Line Output
DAC
ADC (all inputs except phone/mic)
ADC (phone/mic)

THD+N A-A

D-A
A-D
A-D

-

-94

-

-86

-

-87

-

-87

-80

-80

-80

-74

-

-

-

-

-

-74

dB FS A

-

-74

dB FS A

-

-74

dB FS A

-

-74

dB FS A

Power Supply Rejection Ratio
(1 kHz, 0.5 V

w/ 5 V DC offset)(Note 5) 40 60 - - 40 - dB

RMS

Interchannel Isolation 70 87 - - 87 - dB
Spurious Tone (Note 5) - -100 - - -100 - dB FS
Input Impedance (Note 5) 10 - - 10 - - kΩ
External Load Impedance 10 - - 10 - - kΩ
Output Impedance (Note 5) - 730 - - 730 - W
Input Capacitance (Note 5) - 5 - - 5 - pF
Vrefout 2.0 2.3 2.4 2.0 2.3 2.4 V

Notes: 1. Z

2. Parameter definitions are given in the

3. Path refers to the signal path used to generate this data. These paths are defined in the

4. Typical measured with Z

refers to the analog output pin loading and CDL refers to the digital output pin loading.

AL

Term Definition

section.

=47kΩ/680 pF load.

AL

Parameter and Term Definitions

section.

Parameter and

5. This specification is guaranteed by silicon characterization, it is not production tested.

DS315PP2 5

CS4298

ABSOLUTE MAXIMUM RATINGS (AVss1 = AVss2 = DVss1 = DVss2 = 0 V)

Parameter Min Typ Max Unit

Power Supplies +3.3 V Digital

+5 V Digital

Analog
Total Power Dissipation (Supplies, Inputs, Outputs) - - 750 m W
Input Current per Pin (Except Supply Pins) -10 - 10 mA
Output Current per Pin (Except Supply Pins) -15 - 15 mA
Analog Input voltage -0.3 - AVdd+

Digital Input voltage -0.3 - DVdd +

Ambient Temperature (Power Applied) -55 - 1 10 °C

Storage Temperature -65 - 150 °C

RECOMMENDED OPERATING CONDITIONS (AVss1 = AVss2 = DVss1 = DVss2 = 0 V)

Parameter Symbol Min Typ Max Unit

Power Supplies +3.3 V Digital

+5 V Digital

Analog

Operatin g C u r rent +3.3 V Digital

+5 V Digital

Analog
Operating Ambient Temperature 0 - 70 °C

DVdd1, DVdd2
DVdd1, DVdd2

AVdd1, AVdd2

DVdd1, DVdd2

DVdd1, DVdd2

AVdd1, AVdd2

-0.3

-0.3

-0.3

3.135

4.75

4.75

-

-

-

3.3
5
5

40
40
75

6.0

6.0

6.0

0.3

0.3

3.465

5.25

5.25
52

52

97.5

V
V
V

V

V

mA
mA
mA

V
V
V

MIXER CHARACTERISTICS (for CS4298-KQ only)

Parameter Min Typ Max Unit

Mixer Gain Range Span Line In, Aux, CD, Video, Mic1 Mic2,

Line Out, Alternate Line Out

Step Size All volume controls - 1.5 - dB

-

-

46.5

94.5

-

-

dB
dB

6 DS315PP2

CS4298

MODEM CHARACTERISTICS (Analog Transmitter Specifications: T

V; Sample Frequency, Fs = 48 kHz; Audio specifications for 20Hz - 5 kHz, actual digital filter may cutoff at 20 kHz,
600 Ω differential load where applicable)

Parameter Min Typical Max Units

= 0° to 70° C, AVdd = 5.0

ambient

Modem Analog Transmitter Characteristics

Resolution 20 bits
Dynamic Range (Note 5) 100 dB FS
Passband 20 5000 Hz
Passband Ripple ±0.125 dB1K
Total Harmonic Distortion 85 88 dB FS
Full Scale Peak to Peak Output Voltage (TX+ to TX-) TBD 5.6 TBD Volts
AC Output Impedance (TX+, TX-) (Note 5) 0.1 W
Load Impedance (per pin) (Note 5) 250 W
Power Supply Rejection (1kHz) (Note 5) 60 dB
Output Current (per pin) 7.4 mA
Offset (relative) (Note 5) 6 mV
Out of Band specifications (T

Sample Frequency, Fs = 48 kHz; measurement bandwidth
20 kHz - 1MHz, R

Total Out of Band energy (20 kHz - 1 MHz) (Note 5) -30 dBV
Highest 9kHz band (noise + tone) power (90 kHz - 2 MHz)

=600 Ω, CL=33nF) (Note 5) -40 dB FS

L

= 25° C, AVdd = 5 V;

ambient

-55 dBV

(Note 5, 6)

Modem Analog Receiver Characteristics

Resolution 18 bits
Dynamic Range Gain = 0 90 dB FS
Passband 20 5000 Hz
Passband Ripple ±0.125 dB1K
Total Harmonic Distortion Gain = 0 85 dB FS
Total Absolute Gain Accuracy -5 +5 %
Full Scale Peak to Peak Input Voltage (RX+ to RX-,

differential) Gain = 0 2.8 Volts
Input Impedance (per pin) (Note 5) 15 KΩ
Offset (relative) (Note 5) 6 mV
Power Supply Rejection (Note 5) 40 60 dB

Notes: 6. This is the FCC specification for Out-of-Band energy at the telephone jack interface. 9 kHz refers to the

bin size of an FFT performed over the entire range. The amount of noise plus tone power in each 8kHz
bin must be less than -55dBV.

DS315PP2 7

CS4298

DIGITAL CHARACTERISTICS (AVss = DVss = 0 V)

Parameter Symbol Min Typ Max Unit

DVdd = 3.3V

Low level input voltage V
High level input voltage V
High level output voltage V
Low level output voltage V

oh

ol

il

ih

2.15 V

3.0 3.25 V

0.03 .35 V

Input Leakage Current (AC-link inputs) -10 - 10 µA

Output Leakage Current (Tri-stated AC-link outputs) -10 - 10 µA
Output buffer drive current

BIT_CLK
SDATA_IN, EAPD
S/PDIF_OUT (Note 5)

24

4

12.5

DVdd = 5.0 V

Low level input voltage V
High level input voltage V
High level output voltage V
Low level output voltage V

oh

ol

il

ih

3.25 V

4.5 4.95 V

-0.03.35V
Input Leakage Current (AC-link inputs) -10 - 10 µA
Output Leakage Current (Tri-stated AC-link outputs) -10 - 10 µA
Output buffer drive current

BIT_CLK
SDATA_IN, EAPD
S/PDIF_OUT (Note 5)

24

4

12.5

0.8 V

mA
mA
mA

0.8 V

mA
mA
mA

8 DS315PP2

CS4298

SERIAL PORT TIMING

Parameter Symbol Min Typ Max Unit

RESET# Timing

Vdd stable to RESET# inactive T
RESET# active low pulse width T
RESET# inactive to BIT_CLK start-up delay T
1st SYNC active to CODEC READY set T

vdd2rst#

rst_low

rst2clk

sync2crd

Clocks

BIT_CLK frequency F
BIT_CLK period T

clk

clk_period

BIT_CLK output jitter (depends on XTAL_IN source) - - 750 ps
BIT_CLK high pulse width T
BIT_CLK low pulse width T
SYNC frequency F
SYNC period T
SYNC high pulse width T
SYNC low pulse width T

clk_high

clk_low

sync

sync_period

sync_high

sync_low

Data Setup and Hold

Output Propagation delay from rising edge of BIT_CLK T
Input setup time from falling edge of BIT _CLK T
Input hold time from falling edge of BIT_CLK T
Input Signal rise time T
Input Signal fall time T
Output Signal rise time (Note 5, 7) T
Output Signal fall time (Note 5, 7) T

co

isetup

ihold

irise

ifall

orise

ofall

Misc. Timing Parameters

End of Slot 2 to BIT_CLK, SDATA_IN low (PR4) T
SYNC pulse width (PR4) Warm Reset T
SYNC inactive (PR4) to BIT_CLK start-up delay T
Setup to trailing edge of RESET# (test mode) (Note 5) T
Rising edge of RESET# to Hi-Z delay (Note 5) T

s2_pdown

sync_pr4

sync2clk

setup2rst

off

Notes: 7. BIT_CLK measured with 47 Ω seri es termination and CL=50 pF.

5. ms

1.0 - - µs
25 120 - µs

-62.4-µs

- 12.288 - MHz

-81.4-ns

36 40 .7 45 ns
36 40.7 45 ns

-48-kHz

-20.8-µs

-1.3-µs

-19.5-µs

- 6 12 ns

10 - - ns

0--ns
2-6ns
2-6ns
246ns
246ns

-.341.0µs

1.1 - - µs

162.8 350 - ns
15 - - ns

- - 25 ns

DS315PP2 9

BIT_CLK

RESET#

Vdd

T

rst_low

T

vdd2rst#

Figure 1. Power Up Timing

T

rst2clk

CS4298

BIT_CLK

SYNC

CODEC_READY

BIT_CLK

T

orise

SYNC

T

irise

T

sync2crd

Figure 2. Clocks

T

clk_highTclk_low

T

sync_high

T

T

clk_period

T

ifall

T

sync_low

ifall

T

sync_period

Figure 3. Codec Ready from Startup or Fault Condition

10 DS315PP2

BIT_CLK

BIT_CLK

SDATA_IN

SDATA_OUT,
SYNC

Figure 4. Data Setup and Hold

Slot 1 Slot 2

CS4298

T

co

T

isetup

T

ihold

SDATA_OUT

SDATA_IN

SYNC

Write to 0x20 Data PR4 Don’t Care

T

s2_pdown

T

Figure 5. PR4 Powerdown

RESET#

T

setup2rst

SDATA_O U T,
SYNC

T

off

sync_pr4

T

sync2clk

SDATA_IN,
BIT_CLK

Hi-Z

Figure 6. Test Mode

DS315PP2 11

2. GENERAL DESCRIPTION

2.1 Overview

The CS4298 is a Mixed-Signal Audio/Modem Codec (AMC) based on the AC ‘97 1.0 Specification,
and the AC ‘97 2.0 Extensions. It is designed to be paired with a digital controller, typically located
on the PCI bus. The AMC Controller is responsible for all communications between the CS4298 and
the rest of the system. The CS4298 functions as an analog mixer, a stereo audio ADC, a st ereo audio
DAC, a dual modem AFE, and a control and digital stream interface to the AMC Controller. The
CS4298 contains three distinct functional sections: Digital, Analog Audio, and Analog Modem.

The Digital Section includes the AC-Link registers, power management support, SYNC detection
circuitry, and AC-Link serial port interface logic. The Analog Audio section includes the analog in­put multiplexor (mux), stereo output mixer, stereo ADCs, stereo DACs, and analog volume controls.
The Analog Modem section includes dual differential ADCs, dual differential DACs, analog loop­back logic, GPIO control and status, and power down and wake-up logic.

2.2 Modes of Operation

The CS4298 has four bas ic modes of operation. Each mode a llows varying functionality to meet a
wide variety of software and hardware configurations. On power up or system re set, the device re­verts to the basic configuration Mode 0. The audio ADC’s and DAC’s functionality remains fixed
for each mode, but the modem ADC’s and DAC’s functionality changes per each configuration.
From a system perspe ctive, the device can pr ovide standard audio with mode m, two line interface,
speakerphone, and four channel enhanced audio.

CS4298

2.2.1 Mode 0

This is the default operating mode for the CS4298. It supports the legacy AC ‘97 audio modes of op­eration including audio mixer, ADC’s, and DAC’s. The modem configuration supports a phone line
for modem ADC/DAC1 and a handset interface for modem ADC/DAC2.

2.2.2 Mode 1

This is the two phone line mode of operation. It is similar to mode 0 but the modem ADC/DAC2 is
interfaced to a second phone line in place of the handset.

2.2.3 Mode 2

This mode facilitates a full duplex speakerphone mode of operation. The ADC of modem
ADC/DAC2 is connected directly to the audio microphone in place of the handset or line 2 input.
This dedicated microphone capture path allows the host controller to implement echo cancellation
for hands free telephone operation. The modem DAC2 is not used in this mode.

2.2.4 Mode 3

Mode 3 is the four channel expansion mode. The modem ADC/DAC pairs are utilized for enhanced
audio functionality. The modem DAC’s are routed to the alternate line audio outputs pr oviding 2 ad­ditional audio channels. The modem ADC inputs may be connected to the output of the analog stereo
input mixer for enhanced audio ef f ect processing or enhanced digital doc king in a note book appli­cation.

12 DS315PP2

3. DIGITAL SECTION

3.1 AC-Link

All communication with the Codec is estab­lished with a 5-wire digital interface to the C on­troller chip as shown in Figure 7. All clocking
for the serial communication is synchronous to
the BIT_CLK signal. BIT_CLK is generated by
the primary Codec and is used to slave the Con­troller and any secondary Codecs, if applicable.
An AC-link audio frame is a sequence of 256 s e­rial bits organized into 13 groups referred to as

‘slots’. One frame consists of one 16-bit slot and
twelve 20-bit slots. During each audio frame,
data is passed bi-directionally between the Co­dec and the Controller. The input frame is driv­en from the Codec on the SDATA_IN line. The
output frame is driven from the Controller SDATA_OUT line. Both input and output frames contain
the same number of bits and are organized with the same ‘slot’ configuration. The input and output
frame have differing functions for each s lot. The Controller synchronizes the beginning of a frame
with the SYNC signal. In Figure 9 the pos ition of each bit location within the fram e is noted. The
first bit position in a new serial data frame is F0 and the last bit position in the serial data frame is
F255. When SYNC goes active (high) and is sampled active by the CS4298 (on the falling edge of
BIT_CLK), both devices are synchronized to a new serial data frame. The data on the SDATA_OUT
pin at this clock edge is the final bit of the previous frame’s s erial data. On the next rising e dge of
BIT_CLK, the first bit of Slot 0 is driven by the Controller on the SDATA_OUT pin. The CS4298
latches in this data, as the first bit of the frame, on the next falling edge of the BIT_CLK clock signal.
The Controller is also responsible for issuing reset via the RESET# signal. After being reset, the Co­dec is responsible for flagging the Controller that it is ready for operation after synchronizing its in­ternal functions. The AC-link signals may be referenced to either 5 Volts or 3.3 Volts. The CS4298
must use the same digital supply voltage as the Controller chip.

Digital AC’97

Controller

Figure 7. AC-link Connections

SYNC

BIT_CLK

SDATA_OUT

SDATA_ IN

RESET#

CS4298

CODEC

3.2 Control registers

All read accesses to the Codec are generated by requesting a register address (index number) in slot
1 of a SDATA_OUT frame. The f ollowing SDATA_IN frame will contain the regist er c ontent in its
slot 2. The write operation is i dentical with the index in s lot 1 and the wr ite data in slot 2. The AC ‘97

Frame Definition section details the function of each input and output frame. Individual register de­scriptions are found in the Register Interface section.

AC-97 Register Interface
The CS4298 implements the AC ’97 Registers in accordance with the AC ’97 2.0 Specification. See

the Register Interface section for details on the CS4298’s register set.

DS315PP2 13

4. ANALOG SECTION

Please refer to Figure 8, Mixer diagram, for a high-level graphical representation of the CS4298 an­alog mixer structure.

4.1 Audio Output Mixer

There are two output mixers on the CS4298. The stereo output mixer sums together the analog out­puts from the Input Mixer, 3D enhancement, and the PCM DAC output. The stereo output mix is sent
to the LINE_OUT and ALT_LINE_OUT output pins of the CS4298. When the device is set to Mode
3 or Mode 0-2 and the EAM in AC Mode Control (Index 5Eh) is set, the modem DAC outputs are
routed to ALT_LINE_OUT.

4.2 Audio Input Mux

The input multiplexor controls which analog input is sent to the ADCs. The output of the input mux
is converted to stereo 18-bit digital PCM data and sent to the AMC Controller chip in Slots 3 and 4
of the AC-Link SDATA_IN signal.

4.3 Audio Input Mixer

The input mixer is an analog mix of the analog input signals such as MIC, LINE_IN, etc., and the
PCM Audio DAC output. The output of the mixer is routed to the ADC Input Mux, Audio Output
Mixer, and may be routed to the Modem ADC input.

CS4298

4.4 Audio Volume Control

The volume control registers of the AC ’97 Register interface control analog input level to the input
mixer, the master volume level, and the alternate volume level. All analog volume controls imple­ment volume steps at nominally 1.5 dB per step. The analog inputs allow a mixing range of +12 dB
of signal gain to -34.5 dB of signal attenuation. The analog output volume controls allows from 0 dB
to -94.5 dB of attenuation.

14 DS315PP2

CS4298

MIC1

MIC2

LINE

VIDEO

AUX

SDATA_OUT

RESET#

SYNC

Mode Control

MRX+

MRX-

HRX+

HRX-

MAIN D/A

CONVERTERS

PCM_OUT

MIC SELECT

2

/

CD

2

/

2

/

2

/

DAC

+20dB

2

/

VOL MUTE

VOL

VOL

VOL

VOL

VOL

VOL

MUTE

MUTE

MUTE

MUTE

MUTE

MUTE

PCM OUT

PATH

STEREO

INPUT
MIXER

STEREO TO

MONO MIXER

3D

ΣΣ

STEREO
OUTPUT

MIXER

MASTER VOLUME

VOL

ALTERNATE VOLUME

VOL

OUTPUT

OUTPUT

2

/

BUFFER

BUFFER

2

/

2

/

LINE_OUT

ALT_LINE_OUT

Σ

MAIN ADC GAIN

3

/

(loopback) MTX+

(loopback) MTX-

Vref

(loopback) HTX+

(loopback) HTX-

Vref

VOL

VOL

VOL

VOL

AC-Link Interface

ADC DAC

ADC DAC

ADC

INPUT

MUX

MRX+

HRX+

VOL MUTE ADC

MRX-

HRX-

- +

Class AB

Dif out

+ -

- +

Class AB

Dif out

+ -

SDATA_IN

10

/

BIT_CLK
GPIO

MTX+

MTX-

HTX+

HTX-

Figure 8. Mixer Diagram

DS315PP2 15

5. AC ‘97

5.1 AC ‘97 Frame Definition

The AC Link is a bi-directional serial port with thirteen time-division multiplexed slots in each di­rection. The first slot is 16 bits long and termed the tag slot. Bits in the tag slot determine if the Codec
is ready and indicate which, if any, other slots contain valid data. Slots 1 through 11 are 20-bits long
and can contain audio data. Slot 12 contains data to be written and read from GPIO. The serial data

line is defined from the Controller’s perspective, NOT from the Audio Codec’s perspective.

5.2 AC-Link Serial Data Output Frame

In the serial data output frame, data is passed on the SDATA_OUT pin TO the CS4298 FROM the
Controller. Figure 9 illustrates the serial port timing.

20.8 µS

(48 kHz)

Tag Phase Data Phase

CS4298

SYNC

BIT_CLK

Bit Frame Position:

SDATA_OUT

Bit Frame Position:

SDATA_IN

12.288 MHz

81.4 nS

F0 F1 F2 F16F15F14F13F12

F255

Valid

Slot 1

X

Frame

F0 F1 F2 F16F15F14F13F12 F35 F56 F76F255 F36 F57

Codec

0

Ready

Valid

Slot 1

Valid

Slot 2

Valid

Slot 2

Valid

00

Slot 0 Slot 1 Slot 2 Slot 3 Slot 4 Slots 5-12

SCRA1 SCRA0

R/W 0 WD15

00000

F36 F57

F35

0

Figure 9. AC-link Input and Output Framing

F56

LP19 LP18 RP19

LC17 LC16 RC17RD15

F76

F97

X

F97

0

F255

X

F255

0

16 DS315PP2