Cirrus Logic CS3310 User Manual

Stereo Digital Volume Control

CS3310

Features

z Complete Digital Volume Control

— 2 Independent Channels
— Serial Control
— 0.5 dB Step Size

z Wide Adjustable Range

— -95.5 dB Attenuation
— +31.5 dB Gain

z Low Distortion & Noise

— 0.001% THD+N
— 116 dB Dynamic Range

z Noise Free Level Transitions
z Channel-to-Channel Crosstalk Better Than

110 dB

Description

The CS3310 is a complete stereo digital volume control
designed specifically for audio systems. It features a 16­bit serial interface that controls two independent, low­distortion audio channels.

The CS3310 includes an array of well-matched resistors
and a low noise active output stage that is capable of
driving a 600 Ω load. A total adjustable range of 127 dB,
in 0.5 dB steps, is achieved through 95.5 dB of attenua­tion and 31.5 dB of gain.

The simple 3-wire interface provides daisy-chaining of
multiple CS3310's for multi-channel audio systems.

The device operates from ±5 V supplies and has an in­put/output voltage range of ±3.75 V.

ORDERING INFORMATION

CS3310-KS 0° to 70° C 16-pin Plastic SOIC
CS3310-KSZ, Lead Free 0° to 70° C 16-pin Plastic SOIC

Cirrus Logic, Inc.

www.cirrus.com

AINL

AGNDL

AGNDR

AINR

16

MUX

15

10

MUX

9

12

VA+

+

-

8

8

Control

Register

8

-

+

13

VA-

Copyright © Cirrus Logic, Inc. 2005

4

VD+

(All Rights Reserved)

16

Serial to

Parallel

Register

8

5

DGND

14

8

1
2

3
7

6

11

AOUTL

MUTE

ZCEN
CS

SDATAI
SDATAO

SCLK

AOUTR

SEPTEMBER '05

DS82F1

1

CS3310

ANALOG CHARACTERISTICS (T

2kΩ; C

= 20 pF; 10 Hz to 20 kHz Measurement Bandwidth; unless otherwise specified)

L

= 25 °C, VA+, VD+ = 5 V ± 5%; VA- = -5V ± 5%; Rs = 0; RL =

A

Parameter Symbol Min Typ Max Unit

DC Characteristics

Step Size - 0.5 - dB
Gain Error (31.5 dB Gain) - ±0.05 - dB
Gain Matching Between Channels - ±0.05 - dB
Input Resistance R
Input Capacitance C

IN
IN

810-kΩ

-10-pF

AC Characteristics

Total Harmonic Distortion plus Noise (V in = 2V rms, 1 kHz) THD+N - 0.001 .0025 %
Dynamic Range 1 10 1 16 - dB
Input/Output Voltage Range (VA-)+1.25 - (VA+)-1.25 V
Output Noise (Note 1) - 4.2 8.4 µVrms
Digital Feedthrough (Peak Component) (Note 2) -80 - - dB
Interchannel Isolation (1 kHz) (Note 2) -100 -110 - dB

Output Buffer

Offset Voltage (Note 1) V

OS

- 0.25 0.75 mV
Load Capacitance - - 100 pF
Short Circuit Current - 20 - mA
Unity Gain Bandwidth, Small Signal (Note 2) 2 - - MHz

Power Supplies

Supply Current (No Load, AIN = 0 V) IA+

IA-

ID+

Power Consumption P

D

-

-

-

7.0

7.0

450

9.0

9.0

800

mA
mA

µA

-7294mW
Power Supply Rejection Ratio (250 Hz) PSRR - 80 - dB

Notes: 1. Measured with input grounded and Gain = 1. Will increase as a function of Gain settings >1.

2. This parameter is guaranteed by design and/or characterization.

2 DS82F1

CS3310

DIGITAL CHARACTERISTICS (T

= 25 °C, VA+ , VD+ = 5V ± 5%, VA- = -5V ± 5% )

A

Parameter Symbol Min Typ Max Unit

High-Level Input Voltage V
Low-Level Input Voltage V
High-Level Output Voltage (I
Low-Level Output Voltage (I

= 200µA) V

O

= 3.2mA) V

O

Input Leakage Current I

SWITCHING CHARACTERISTICS

(TA = 25 °C; VA+, VD+ = +5V ± 5%; VA- = -5V ± 5%; CL = 20 pF)

IH

IL

OH

OL
in

2.0 - VD+0.3 V

-0.3 - +0.8 V

VD-1.0 - - V

--0.4V

-1.010µA

Parameter Symbol Min Typ Max Unit

Serial Clock SCLK 0 - - MHz
Serial Clock Pulse Width High

Pulse Width Low

MUTE

Pulse Width Low - 2.0 - - ms

t

ph

t

pl

80
80

-

-

-

-

ns
ns

Input Timing

SDATAI Set Up Time t
SDATAI Hold Time t
CS

Valid to SCLK Rising t

SCLK Falling to CS

High t

SDVS

SDH

CSVS

LTH

20 - - ns
20 - - ns
30 - - ns
35 - - ns

Output Timing

CS

Low to Output Active t
SCLK Falling to Data Valid t
CS

High to SDATAO Inactive t

CSH
SSD

CSDH

- - 35 ns

- - 60 ns

--100ns

CS

SCLK

SDATAI

SDATAO

t

CSVS

t

MSB

CSH

t

SDVS

t

SDH

t

SSD

t

LTH

t

CSDH

Figure 1. Serial Port Timing Diagram

DS82F1 3

CS3310

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Typ Max Unit

DC Power Supplies:

Positive Digital
Positive Analog
Negative Analog
(VD+) - (VA+) (Note 3)

Ambient Operating Temperature T

Notes: 3. Applying power to VD+ prior to VA+ creates a SCR latch-up condition. Refer to Figure 2 for the

recommended power connections.

(DGND = 0V; all voltages with respect to ground)

VD+
VA+

VA

-

A

4.75

4.75

-4.75

-0.3
02570°C

5.0

5.0

-5.0

-

VA+

5.25

-5.25

0.0

ABSOLUTE MAXIMUM RATINGS (AGND, DGND = 0V, all voltages with respect to ground.)

Parameter Symbol Min Max Unit

DC Power Supplies:

Positive Digital
Positive Analog

Negative Analog
Input Current, Any Pin Except Supply I
Digital Input Voltage V
Ambient Operating Temperature (power applied) T
Storage Temperature T

VD+
VA+

VA-

in

IND

A

STG

-0.3

-0.3

0.3

- ±10 mA

-0.3 (VA+) + 0.3 V

-55 +125 °C

-65 +150 °C

(VA+)+ 0.3

6.0

-6.0

V
V
V
V

V
V
V

4 DS82F1

+

10

µ

F

CONTROLLER

AUDIO
SOURCE

0.1 µF

2

3

6

8

16

9

1

ZCEN

CS

SDATAI

SCLK

MUTE

AINL

AINR
DGND

5

**

10

4

VD+ VA+

CS3310

AGNDL AGNDR

12

SDATAO

AOUTL

AOUTR

15

0.1 µF

VA-

10

13

7

14

11

0.1 µF

*

+

47 k

AUDIO
OUTPUTS

10

10 µF

Ω

µ

F

0.1 µF

+

TO ANOTHER
CS3310 OR
CONTROLLER

CS3310

+5V ANALOG

-5V ANALOG

*Required to terminate SDATAI due to high impedance
state of SDATAO when CS

is high.

**Refer to Note 3.

Figure 2. Recommended Connection Diagram

DS82F1 5

CS3310

GENERAL DESCRIPTION

The CS3310 is a stereo, digital volume control designed for audio systems. The levels of the left
and right analog input channels are set by a 16-bit serial data word; the first 8 bits address the
right channel and the remaining 8 bits address the left channel, as detailed in Table 1. Resistor
values are decoded to 0.5 dB resolution by an internal multiplexer for a total attenuation range of

-95.5 dB. An output amplifier stage provides a programmable gain of up to 31.5 dB in 0.5 dB
steps. This results in an overall 8-bit adjustable range of 127 dB.

The CS3310 operates from ±5 V supplies and accepts inputs up to ±3.75 V. Once in operation,
the CS3310 can be brought to a muted state with the mute pin, MUTE, or by writing all zeros to
the volume control registers. The device contains a simple three wire serial interface which ac­cepts 16-bit data. This interface also supports daisy-chaining capability.

SYSTEM DESIGN

Very few external components are required to support the CS3310. Normal power supply decou­pling components are all that is required, as shown in Figure 2.

Serial Data Interface

The CS3310 has a simple, three wire interface that consists of three input pins: SDATAI, serial
data input; SCLK, serial data clock and CS, the chip select input. SDATAO, serial data output,
enables the user to read the current volume setting or provide daisy-chaining of multiple
CS3310’s.

The 16-bit serial data is formatted MSB first and clocked into SDATAI by the rising edge of SCLK
with CS
output levels of both left and right channels are set. The existing data in the volume control data
register is clocked out SDATAO on the falling edge of SCLK. This data can be used to read cur­rent gain/attenuation levels or to daisy chain multiple CS3310’s. See Figure 1 for proper setup
and hold times for CS, SDATAI, SCLK, and SDATAO. SCLK and SDATAI should be active only
during volume setting operations to achieve optimum dynamic range.

low as shown in Figure 3. The data is latched by the rising edge of CS and the analog

Daisy Chaining

Digitally controlled, multi-channel audio systems often result in complex address decoding which
complicates PCB layout. This is greatly simplified with the daisy-chaining capability of the
CS3310.

6 DS82F1