Cirrus Logic CS3002-IS, CS3001-IS Datasheet
CS3001
CS3002
Precision Low Voltage Amplifier; DC to 2 kHz
Features
Low Offset: 10 µVMax
Low Drift: 0.05 µV/°C Max
Low Noise
–6nV/√Hz @0.5Hz
– 0.1 to 10 Hz = 125 nVp-p
– 1/f corner @ 0.08 Hz
Open-Loop Voltage Gain
– 1000 Trillion Typ
– 10 Billion Min
Rail-to-Rail Output Swing
1.8 mA Supply Current
Slew rate: 5 V/µs
Applications
Thermocouple/Thermopile Amplifiers
Load Cell and Bridge Transducer Amplifiers
Precision Instrumentation
Battery-Powered Systems
Description
The CS3001 single amplifier and the CS3002 dual amplifier are designed for precision amplification of low
level signals and are ideally suited to applications that
require very high closed loop gains. These amplifiers
achieve excellent offset stability, super high open loop
gain, and low noise over time and temperature. The devices also exhibit excellent CMRR and PSRR. The
common mode input range includes the negative supply
rail. The amplifiers operate with any total supply voltage
from 2.7 V to 6.7 V (±1.35 V to ±3.35 V).
Pin Configurations
PWDN
-In
+In
V-
CS3001
1
-
2
+
3
4
8-lead SOIC
8
7
6
5
NC
V+
Output
NC
Out A
-In A
+In A
CS3002
1
2
3
V-
4
8-lead SOIC
8
V+
A
+
-
7
Out B
B
6
+
-In B
-
5
+In B
Noise vs. Frequency (Measured)
100
10
nV/√Hz
1
0.001 0.01 0.1 1 10
Frequency (Hz)
Preliminary Product Information
Cirrus Logic, Inc.
http://www.cirrus.com
CS3001
Dexter Research
Thermopile 1M
R2
64.9k
R1
100
Thermopile Amplifier with a Gain of 650 V/V
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
CopyrightCirrus Logic, Inc. 2002
(All Rights Reserved)
0.015
C1
µµµµF
OCT ‘02
DS490PP1
1
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ................................................... 3
1.1 Electrical Characteristics ...................................................................................... 3
1.2 Absolute Maximum Ratings ................................................................................. 4
2. PERFORMANCE PLOTS ......................................................................................... 4
3. CS3001/CS3002 OVERVIEW ................................................................................... 7
3.1 Open Loop Gain and Phase Response .................................................................. 7
3.2 Open Loop Gain and Stability Compensation ...................................................... 8
3.3 Powerdown (PDWN) ......................................................................................... 10
3.4 Applications ........................................................................................................ 11
4. PACKAGE DRAWING ........................................................................................... 13
5. ORDERING INFORMATION ............................................................................... 14
LIST OF FIGURES
Figure 1. Noise vs Frequency (Measured) .........................................................................4
Figure 2. 0.01 Hz to 10 Hz Noise .......................................................................................4
Figure 3. Noise vs Frequency ............................................................................................4
Figure 4. Offset Voltage Stability (DC to 3.2 Hz) ...............................................................4
Figure 5. Open Loop Gain and Phase vs Frequency .........................................................5
Figure 6. Open Loop Gain and Phase vs Frequency (Expanded) .....................................5
Figure 7. Input Bias Current vs Supply Voltage (CS3002) .................................................6
Figure 8. Input Bias Current vs Common Mode Voltage ...................................................6
Figure 9. CS3001/CS3002 Open Loop Gain and Phase Response ..................................7
Figure 10. Non-Inverting Gain Configuration .....................................................................8
Figure 11. Non-Inverting Gain Configuration with Compensation ......................................9
Figure 12. Loop Gain Plot: Unity Gain and with Pole-Zero Compensation ......................10
Figure 13. Thermopile Amplifier with a Gain of 650 V/V ..................................................11
Figure 14. Load Cell Bridge Amplifier and A/D Converter ...............................................12
CS3001
CS3002
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to <http://www.cirrus.com/corporate/contacts/sales.cfm>
IMPORTANT NOTICE
"Preliminary" pr oduct in formation describes products that are in production, but for which full characterization data is not yet available. "Advance" product inf ormation describes products that are in development an d subject to development changes. Cirrus Logic, I nc. and its subsidiaries ("Cirr us") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provi ded "AS IS" without warranty
of any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale suppl ied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus f or the use of thi s information, including use of this
information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus
and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or
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obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this materi al is subject to the PRC Foreign
Trade Law and i s to be exported or taken out of the PRC.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL I NJURY, OR SEVERE
PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.
Cirrus Logic, Ci rrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and pr oduct names in this document may be trademarks or service marks of their respective owners.
2
CS3001
CS3002
1. CHARACTERISTICS AND SPECIFICATIONS
1.1 Electrical Characteristics
V+=+5V,V-=0V,VCM=2.5V
Input Offset Voltage (Note 2) • --±10 µV
Average Input Offset Drift (Note 2) • -±0.01±0.05 µV/ºC
Long Term Input Offset Voltage Stability (Note 3)
Input Bias Current T
Input Offset Current T
Input Noise Voltage Density R
Input Noise Voltage 0.1 to 10 Hz - 125 nV
Input Noise Current Density f0=1Hz - 2
(Note 1)
Parameter
= 100 Ω,f0=1Hz
S
R
= 100 Ω,f0=1kHz
S
=25ºC
A
=25ºC
A
CS3001/CS3002
UnitMin Typ Max
- ±100 ±200
•
±1000
- ±200 ±400
•
-
-
6
6
±2000
pA
pA
pA
pA
nV/ Hz
nV/ Hz
p-p
pA/ Hz
Input Noise Current 0.1 to 10 Hz - 40 pA
p-p
Input Common Mode Voltage Range • -0.1 - (V+)-1.25 V
Common Mode Rejection Ratio (dc) (Note 4) • 115 120 - dB
Power Supply Rejection Ratio • 120 136 - dB
Large Signal Voltage Gain R
Output Voltage Swing R
Slew Rate R
=2kΩ to V+/2 (Note 5) • 200 300 - dB
L
=2kΩ to V+/2
L
R
= 100 kΩ to V+/2
L
= 2 k, 100 pF 5 - V/µs
L
• +4.7 +4.99
-V
V
Overload Recovery Time - 100 - µs
Supply Current per Amplifier
PWDN
PWDN
Threshold (Note 6)
active (CS3001 Only) (Note 6)••
• (V+) -1.0 - - V
-1.82.415mA
µA
Start-up Time (Note 7) • -912 ms
Notes: 1. Symbol “•” denotes specification applies over -40 to +85
° C.
2. This parameter is guaranteed by design and laboratory characterization. Thermocouple effects prohibit
accurate measurement of these parameters in automatic test systems.
3. 1000-hour life test data @ 125 °C indicates randomly distributed variation approximately equal to
measurement repeatability of 1 µV.
4. Measured within the specified common mode range limits.
5. Guaranteed within the output limits of (V+ -0.3 V) to (V- +0.3 V). Tested with proprietary production test
method.
6. PWDN
current consumption when PWDN
input has an internal pullup resistor to V+ of approximately 800 kΩ and is the major source of
is active low.
7. The device has a controlled start-up behavior due to its complex open loop gain characteristics. Startup time applies when supply voltage is applied or when PDWN
is released.
3
CS3001
0
0
5
0
0
5
0
0
0
CS3002
1.2 Absolute Maximum Ratings
Parameter Min Typ Max Unit
Supply Voltage [(V+) - (V-)] 6.8 V
Input Voltage V- -0.3 V+ +0.3 V
Storage Temperature Range -65 +150 ºC
2. PERFORMANCE PLOTS
Noise vs. Frequency (Measured)
100
10
nV/√Hz
1
0.001 0.01 0.1 1 10
Frequency (Hz)
Figure 1. Noise vs Frequency (Measured)
0
1
34 5
2
TIM E (Se c)
6
78
9
10
1000
100
10
1
10 100 1K 10K 100K 1M 10M
Frequency (Hz)
Figure 3. Noise vs Frequency
100
75
50
25
0
nV
-25
-50
-75
-100
Time (1 Hour)
= 13 nVσ
Figure 2. 0.01 Hz to 10 Hz Noise
Figure 4. Offset Voltage Stability (DC to 3.2 Hz)
4
Performance Plots (Cont.)
M
500
400
300
200
100
0
-100
Gain (dB)
-200
Phase (Degrees)
-300
-400
-500
1 10 100 1K 10K 100K 1M 10M
CS3001
CS3002
Gain
Phase
Frequency (Hz)
Figure 5. Open Loop Gain and Phase vs Frequency
100
80
60
40
Gain (dB)
20
0
-45
-90
-135
-180
-225
-270
Phase (Degrees)
-315
-360
10K
100K
1M
10
Figure 6. Open Loop Gain and Phase vs Frequency (Expanded)
5
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