CS3001
CS3002
Precision Low-voltage Amplifier; DC to 2 kHz
Features
Low Offset: 10 µV Max
Low Drift: 0.05 µV/°C Max
Low Noise
–6 nV/√Hz @ 0.5 Hz
– 0.1 to 10 Hz = 125 nVp-p
– 1/f corner @ 0.08 Hz
Open-loop Voltage Gain
– 300 dB Typical
– 200 dB Minimum
Rail-to-rail Output Swing
Slew Rate: 5 V/µs
Applications
Thermocouple/Thermopile Amplifiers
Load Cell and Bridge Transducer Amplifiers
Precision Instrumentation
Battery-powered Systems
Description
The CS3001 single amplifier and the CS3002 dual amplifier are designed for precision amplification of lowlevel signals and are ideally suited to applications that
require very high closed-loop gains. These amplifiers
achieve excellent offset stability, super-high open-loop
gain, and low noise over time and temperature. The devices also exhibit excellent CMRR and PSRR. The
common mode input range includes the negative supply
rail. The amplifiers operate with any total supply voltage
from 2.7 V to 6.7 V (±1.35 V to ±3.35 V).
Pin Configurations
PWDN
-In
+In
V-
CS3001
1
-
2
+
3
4
8-lead SOIC
8
7
6
5
NC
V+
Output
NC
Out A
-In A
+In A
CS3002
1
2
3
V-
4
8-lead SOIC
8
V+
A
+
-
7
Out B
B
6
+
-In B
-
5
+In B
Noise vs. Frequency (Measured)
100
10
nV/√Hz
1
0.001 0.01 0.1 1 10
Frequency (Hz)
http://www.cirrus.com
Dexter Research
Thermopile 1M
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
CS3001
R2
64.9k
R1
100
Thermopile Amplifier with a Gain of 650 V/V
0.015
C1
µF
AUG ‘05
DS490F4
TABLE OF CONTENTS
o
r
d
e
s
s
s
d
R
N
S
E
D
A
M
Y
o
1. CHARACTERISTICS AND SPECIFICATIONS ............................................................3
1.1 Electrical Characteristics ......................................................................................3
1.2 Absolute Maximum Ratings ................ ...................... ....................... ..................... 4
2. PERFORMANCE PLOTS .............................................................................................4
3. CS3001/CS3002 OVERVIEW .......................................................................................7
3.1 Open Loop Gain and Phase Response ................. ... .... ... ... ... ... .... ... ... ... .... ... ... ... ..7
3.2 Open Loop Gain and Stability Compensation .......... .... ... ... ... ... .... ... ... ... .... ... ... ... ..8
3.3 Powerdown (PDWN) ... ... .... ... ... ... .................................................... ... ... .............10
3.4 Applications ..................................................... ... ... ... ..........................................10
4. PACKAGE DRAWING ...............................................................................................13
5. ORDERING INFORMATION ......................................................................................14
LIST OF FIGURES
Figure 1. Noise vs Frequency (Measured) .........................................................................4
Figure 2. 0.01 Hz to 10 Hz Noise .......................................................................................4
Figure 3. Noise vs Frequency ............................. ... ... .... ... ... ... .... ... ... ... ... .... ... ... ..................4
Figure 4. Offset Voltage Stability (DC to 3.2 Hz) ...............................................................4
Figure 5. Open Loop Gain and Phase vs Frequency .........................................................5
Figure 6. Open Loop Gain and Phase vs Frequency (Expanded) .....................................5
Figure 7. Input Bias Current vs Supply Voltage (CS3002) .................................................6
Figure 8. Input Bias Current vs Common Mode Voltage ...................................................6
Figure 9. CS3001/CS3002 Open Loop Gain and Phase Response ....................... ... ... ... ..7
Figure 10. Non-Inverting Gain Configuration .....................................................................8
Figure 11. Non-Inverting Gain Configuration with Compensation .............. ... ... ..................9
Figure 12. Loop Gain Plot: Unity Gain and with Pole-Zero Compensation ......... .............10
Figure 13. Thermopile Amplifier with a Gain of 650 V/V ..................................................11
Figure 14. Load Cell Bridge Amplifier and A/D Converter ...............................................12
CS3001
CS3002
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find the one nearest to you go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and i ts subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject t
change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant info
mation to verify, before placing orders, that inform ation being relied on is current and complete. All pr oducts are sold subject to the term s and conditions of sale supplie
at the time of order acknowl edgment, i ncludin g those per taining to warra nty, in demnifica tion, an d limitat ion of l iabili ty. No r esponsibility is assumed by Cirrus for th
use of this information, including use of this information as the basis for manufacture or sale of any items, or for infring ement of patents or other rights of third partie
This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyright
trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copie
to be made of the information on l y for use wi t h i n you r or g aniz a ti on wit h r esp ect to Cirr u s integrated circuits or other pr oduc t s of Cirrus. This consent does not exten
to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPE
TY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE I
AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICE
LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO B
FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIE
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH
MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTO
ER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM AN
AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademar ks
service marks of their respective owners.
2 DS490F4
1. CHARACTERISTICS AND SPECIFICATIONS
CS3001
CS3002
ELECTRICAL CHARACTERISTICS
V+ = +5 V, V- = 0V, VCM = 2.5 V
(Note 1)
CS3001/CS3002
Parameter
UnitMin Typ Max
Input Offset Voltage (Note 2) • --±10 µV
Average Input Offset Drift (Note 2) • - ±0.01 ±0.05 µV/ºC
Long Term Input Offset Voltage Stability (Note 3)
Input Bias Current T
Input Offset Current T
Input Noise Voltage DensityR
= 100 Ω, f0 = 1 Hz
S
R
= 100 Ω, f0 = 1 kHz
S
Input Noise Voltage 0.1 to 10 Hz - 125 nV
Input Noise Current Densityf0 = 1 Hz - 100
Input Noise Current 0.1 to 10 Hz - 1.9 pA
= 25º C
A
= 25º C
A
-
•
-
-
•
-
-
-
±100
-
±200
-
6
6
-
±1000
-
±2000
pA
pA
pA
pA
nV/ Hz
nV/ Hz
p-p
fA/ Hz
p-p
Input Common Mode Voltage Range • -0.1 - (V+)-1.25 V
Common Mode Rejection Ratio (dc) (Note 4) • 115 120 - dB
Power Supply Rejection Ratio • 120 136 - dB
Large Signal Voltage Gain R
Output Voltage Swing R
R
Slew Rate R
= 2 kΩ to V+/2 (Note 5) • 200 300 - dB
L
= 2 kΩ to V+/2
L
= 100 kΩ to V+/2
L
= 2 k, 100 pF 5 - V/µs
L
• +4.7 +4.99
-V
V
Overload Recovery Time - 100 - µs
Supply Current CS3001
CS3002
PWDN
PWDN
Threshold (Note 6)
active (CS3001 Only) (Note 6)
•
•
•
-
-
2.1
3.6
2.8
4.8
15
mA
mA
µA
• (V+) -1.0 - - V
Start-up Time (Note 7) • -912 ms
Notes: 1. Symbol “•” denotes specification applies over -40 to +85
° C.
2. This parameter is guaranteed by design and laboratory characterization. Thermocouple effects prohibit
accurate measurement of these parameters in automatic test systems.
3. 1000-hour life test data @ 125 °C indicates randomly distributed variation approximately equal to
measurement repeatability of 1 µV.
4. Measured within the specified common mode range limits.
5. Guaranteed within the output limits of (V+ -0.3 V) to (V- +0.3 V). Tested with proprietary production test
method.
6. PWDN
current consumption when PWDN
input has an internal pullup resistor to V+ of approximately 800 kΩ and is the major source of
is active low.
7. The device has a controlled start-up behavior due to its complex open loop gain characteristics. Startup time applies when supply voltage is applied or when PDWN
is released.
DS490F4 3
CS3001
0
0
5
0
0
5
0
0
0
CS3002
ABSOLUTE MAXIMUM RATINGS
Parameter Min Typ Max Unit
Supply Voltage [(V+) - (V-)] 6.8 V
Input Voltage V- -0.3 V+ +0.3 V
Storage Temperature Range -65 +150 ºC
2. PERFORMANCE PLOTS
Noise vs. Frequency (Measured)
100
10
nV/√Hz
1
0.001 0.01 0.1 1 10
Frequency (Hz)
Figure 1. Noise vs Frequency (Measured)
0
1
34 5
2
TIM E ( Se c)
6
78
9
10
1000
100
10
1
10 100 1K 10K 100K 1M 10M
Frequency ( Hz)
Figure 3. Noise vs Frequency
100
75
50
25
0
nV
-25
-50
-75
-100
Time (1 Hour)
= 13 nVσ
Figure 2. 0.01 Hz to 10 Hz Noise
Figure 4. Offset Voltage Stability (DC to 3.2 Hz)
4 DS490F4
Performance Plots (Cont.)
M
500
400
300
200
100
0
Gain (dB)
-100
-200
Phase (Degrees)
-300
-400
-500
GAIN
PHASE
1
1 10 100 1000 10000 100000 10000001E+07
10 100 1 K
Frequency (Hz)
Fre quency (Hz)
Figure 5. Open-loop Gain and Phase vs Frequency
10 K
100 K
1 M 10 M
CS3001
CS3002
100
80
60
40
Gain (dB)
20
0
-45
-90
-135
-180
-225
-270
Phase (Degrees)
-315
-360
10K
100K
1M
10
Figure 6. Open-loop Gain and Phase vs Frequency (Expanded)
DS490F4 5
Performance Plots (Cont.)
-150
-100
-50
0
-50
A1A1+
B1-
A2+
B1+
A2-
CS3001
CS3002
-100
Input Bias Current (pA)
-150
-200
Figure 7. Input Bias Current vs Supply Voltage (CS3002)
±1.35
CM = 0 V
±2
Supply Voltage (±V)
±2.5 ±3.35
B2B2+
3
2
1
0
-1
-2
-3
012345
Bias Current
Normalized to CM = 2.5 V
Common Mode Voltage (Vs = 5V)
Figure 8. Input Bias Current vs Common Mode Voltage
6 DS490F4
3. CS3001/CS3002 OVERVIEW
CS3001
CS3002
The CS3001/CS3002 amplifiers are designed for
precision measurement of signals from DC to
2 kHz when operating from a supply voltage of
+2.7 V to +6.7 V (± 1.35 to ± 3.35 V). The amplifiers are designed with a patented architecture that
utilizes multiple amplifier stages to yield very high
open loop gain at frequencies of 10 kHz and below.
The amplifiers yield low noise and low offset drift
while consuming relatively low supply current. An
increase in noise floor above 2 kHz is the result of
intermediate stages of the amplifier being operated
at very low currents. The amplifiers are intended
for amplifying small signals with large gains in ap-
100
plications where the output of the amplifier can be
band-limited to frequencies below 2 kHz.
3.1 Open-loop Gain and Phase Response
Figure 9 illustrates the open loop gain and phase re-
sponse of the CS3001/CS3002. The gain slope of
the amplifier is about –100 dB/decade between
500 Hz and 60 kHz and transitions to –20 dB/decade between 60 kHz and its unity gain crossover
frequency at about 4.8 MHz. Phase margin at unity
gain is about 70 degrees; gain margin is about
20 dB.
80
60
40
Gain (dB)
20
0
-45
-90
-135
-180
-225
-270
Phase (Degrees)
-315
-360
10K
Figure 9. CS3001/CS3002 Open-loop Gain and Phase Response
-100 dB/ dec
100K
-20 dB/ dec
1M
10M
DS490F4 7
3.2 Open-loop Gain and Stability Compensation
The CS3001 and CS3002 achieve ultra-high open
loop gain. Figure 10 illustrates the amplifier in a
non-inverting gain configuration. The open loop
gain and phase plots indicate that the amplifier is
stable for closed-loop gains less than 50 V/V. For a
gain of 50, the phase margin is between 40° and 60°
depending upon the loading conditions. As shown
in Figure 11, on page 9, the operational amplifier
has an input capacitance at the + and – signal inputs
of typically 50 pF. This capacitance adds an addi-
tional pole in the loop gain transfer function at a
frequency of f = 1/(2πR*Cin) where R is the parallel combination of R1 and R2 (R1 || R2). A higher
value for R produces a pole at a lower frequency,
thus reducing the phase margin. R1 is recommended to be less than or equal to 100 ohms, which results in a pole at 30 MHz or higher. If a higher
value of R1 is desired, a compensation capacitor
(C2) should be added in parallel with R2. C2
should be chosen such that R2*C2 ≥ R1*Cin.
CS3001
CS3002
R
Vin
S
R2
R1
Figure 10. Non-inverting Gain Configuration
Vo
8 DS490F4
Vin
CS3001
CS3002
C
in
50 pF
Vo
50 pF
C
in
R2
R1
C2
Figure 11. Non-inverting Gain Configuration with Compensation
The feedback capacitor C2 is required for closedloop gains greater than 50 V/V. The capacitor introduces a pole and a zero in the loop gain transfer
function,
s
⎛⎞
---- -
1
+
–
⎝⎠
z
1
-----------------------
T
=
⎛⎞
⎝⎠
P
1
Z
=whereA
1
A
ol
s
-----
1
+
p
1
1
------------------------------------ -
||
()C
2π R
1R2
1
----------------------------------2π AR
×()C
1
1
------------------------ -
≅=forR
()
2π R
2
1C2
=
2
R
-----R
2
1
»
2R1
Choose C2 so that R2C2 < R1C
in
This indicates that the separation of the pole and
the zero is governed by the closed loop gain. It is
required that the zero falls on the steep slope
(–100 dB/decade) of the loop gain plot so that there
is some gain higher than 0 dB (typically 20 dB) at
the hand-over frequency (the frequency at which
the slope changes from – 100 dB/decade to
–20 dB/decade).
DS490F4 9
CS3001
CS3002
The loop gain plot shown in Figure 12 illustrates
the unity gain configuration, and indicates how this
is modified when using the amplifier in a higher
gain configuration with compensation. If it is configured for higher gain, for example, 60 dB, the
x–axis will move up by 60 dB (line B). Capacitor
C2 adds a zero and a pole. The modified plot indicates the effects of introducing the pole and zero
due to capacitor C2. The pole can be located at any
frequency higher than the hand-over frequency, the
zero has to be at a frequency lower than the handover frequency so as to provide adequate gain mar-
3.3 Powerdown (PDWN) The CS3001 single amplifier provides a power-
down function on pin 1. If this pin is left open the
amplifier will operate normally. If the powerdown
is asserted low, the amplifier will go into a low
power state. There is a pull-up resistor (approxi-
gin. The separation between the pole and the zero
is governed by the closed loop gain. The zero (z1)
occurs at the intersection of the –100 dB/decade
and –80 dB/decade slopes. The point X in the figure should be at closed loop gain plus 20 dB gain
margin. The value for C2 = 1/(2πR1p1). Using
p1 = 1 MHz works very well and is independent of
gain. As the closed loop gain is changed, the zero
location is also modified if R1 remains fixed.
Capacitor C2 can be increased in value to limit the
amplifier’s rising noise above 2 kHz.
mately 800 k ohm) inside the amplifier from pin
1 to the V+ supply. The current through this pull-up
resistor is the main source of current drain in the
powerdown state.
-100 dB/dec
z
1
p
|T| (Log gain)
-20 dB/dec
FREQUENCY
Figure 12. Loop Gain Plot: Unity Gain and with Pole-zero Compensation
10 DS490F4
-80 dB/dec
X
Margin
50kHz 1MHz 5MHz
1
B
Desired Closed
Loop Gain
3.4 Applications
Ω
Ω
Ω
Ω
Ω
µ
µ
µ
µ
The CS3001 and CS3002 amplifiers are optimum
for applications that require high gain and low drift.
Figure 13 illustrates a thermopile amplifier with a
gain of 650 V/V. The thermopile outputs only a few
millivolts when subjected to infrared radiation. The
amplifier is compensated and bandlimited by C1 in
combination with R2.
Figure 14, on page 11 illustrates a load cell bridge
amplifier with a gain of 768 V/V. The load cell is
Dexter Research
Thermopile 1M
CS3001
CS3002
excited with +5 V and has a 1 mV/V sensitivity. Its
full scale output signal is amplified to produce a
fully differential ± 3.8 V into the CS5510/12 A/D
converter. This circuit operates from +5 V.
A similar circuit operating from +3 V can be
constructed using the CS5540/CS5541 A/D converters.
CS3001
+5 V
VA
1 mV /V
R2
64.9k
R1
100
Figure 13. Thermopile Amplifier with a Gain of 650 V/V
Ω
-
350
+
Thermopile Amplifier with a Gain of 650 V/V
0.1
F
140 k
365
140 k
x768
100
0.22µF
0.047
0.22
100
F
F
+
-
-
+
C1
0.015µF
VREF
AIN+
AIN1
+5 V +5 V
V+
CS
SDO
SCLK
CS5510/12
Counter/Timer
V-
S C L K = 1 0 k H z to 1 0 0
SCLK = 10 kH z to 100 kHz
(32 .76 8
(32.768 nominal
)
Figure 14. Load Cell Bridge Amplifier and A/D Converter
DS490F4 11
4. ORDERING INFORMATION
Model Temperature Package
CS3301-IS
CS3001
CS3002
CS3301-ISZ (lead free)
CS3302-IS
CS3302-ISZ (lead free)
-40 to +85 °C 8-pin SOIC
5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION
Model Number Peak Reflow Temp MSL Rating* Max Floor Life
CS3301-IS
CS3301-ISZ (lead free)
CS3302-IS
CS3302-ISZ (lead free)
240 °C
260 °C
2365 Days
240 °C
260 °C
* MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020.
6. REVISION HISTORY
Revision Date Changes
F3 OCT 2004 Added lead-free device ordering information.
F4 August 2005 Added MSL specifications. Updated legal notice. Added leaded (Pb) devices.
12 DS490F4
7. PACKAGE DRAWING 8L SOIC (150 MIL BODY) PACKAGE DRAWING
1
b
CS3001
CS3002
E
H
D
SEATING
PLANE
e
INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.053 0.069 1.35 1.75
A1 0.004 0.010 0.10 0.25
B 0.013 0.020 0.33 0.51
C 0.007 0.010 0.19 0.25
D 0.189 0.197 4.80 5.00
E 0.150 0.157 3.80 4.00
e 0.040 0.060 1.02 1.52
H 0.228 0.244 5.80 6.20
L 0.016 0.050 0.40 1.27
∝
0° 8° 0° 8°
A
A1
JEDEC #: MS-012
c
L
∝
DS490F4 13
CS3001
CS3002
14 DS490F4
Loading...