Calogic LLC 2N7002 Datasheet
CORPORATION
N-Channel Enhancement-Mode
MOS Transistor
2N7002
DESCRIPTION
Calogic’s 2N7002 device type is a vertical DMOS FET
transistor housed in a surface mount SOT-23 for
micro-assembly applications. The device is an excellent
choice for switching applications where breakdown (B
) and
V
low on-resistanc e are imp orta nt .
PIN CONFIGU R ATI ON
2
1
DRAIN
2
SOURCE
3
GATE
1
3
3
TOP VIEW
CD5
ORDERING INFORMATION
Part Package Temperature Range
2N7002 Plastic SOT-23 Package -55
X2N7002 Sorted Chips in Carriers -55
1
G
2
S
SOT-23
D
o
C to +150oC
o
C to +150oC
PRODUCT SUMMAR Y
V
(BR)DSS
(V)
60 7.5 0.115
r
DS(ON)
(Ω)
I
(A)
D
PRODUCT MARKING
2N7002 V02
9-3
2N7002
CORPORATION
ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified)
SYMBOL PARAMETERS LIMITS UNITS TEST CONDITIONS
V
DS
V
GS
I
D
I
DM
P
D
T
J
stg
T
L
THERMAL RESISTANCE RATINGS
NOTE: 1. Pulse width limited by maximum junction temperature.
SPECIFICA TIONS
SYMBOL PARAMETER MIN TYP
STATIC
V
(BR)DSS
V
GS(th)
I
GSS
I
DSS
I
D(ON)
r
DS(ON)
V
DS(ON)
g
FS
g
OS
DYNAMIC
C
iss
oss
C
rss
SWITCHING
t
ON
t
OFF
Drain-Source Voltage 60
Gate-Source Voltage ±40
Continuous Drain Current
Pulsed Drain Current
1
Power Dissipation
0.115
0.073 T
0.8
200
80 T
V
A
mW
T
= 25oC
A
= 100oC
A
T
= 25oC
A
= 100oC
A
Operating Junctio n Temperature Range -55 to 150
o
Storage Temperature Range -55 to 150
CT
Lead Temperature (1/16" from case for 10 sec.) 300
SYMBOL THERMAL RESISTANCE LIMITS UNITS
R
thJA
1
Drain-Source Breakdown Voltage
Gate-Thresho ld Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Drain-Source On-Voltage
Forward Transconductance
Common Source Output Conductance
Input Capacitance
Output Capacitance
4
Reverse Transfer Capacitance
Turn-On Time 7 20
Turn-Off Time
Junction-to-Ambient 625 K/W
2
MAX UNIT TEST CONDITIONS
60 70
1 1.9 2. 5
±100 nA
1
500
3
500 1000 mA
57.5
3
913.5
2.5 7.5
ID = 10µA, VGS = 0V
V
VDS = VGS, ID = 0. 25mA
VGS = ±20V, VDS = 0V
V
= 60V, VGS = 0V
µA
Ω
DS
= ≥2V
V
DS
= 5V, ID = 50mA
V
GS
= 10V, ID = 0.5A
V
GS
4.4 13.5
= 5V, ID = 50mA
3
1.25 3.75
0.25 0.375
V
GS
= 10V, ID = 0.5A
V
V
GS
2.2 6.75
3
80 170 mS
3, 4
500 µS
= 10V, ID = 0.2A
V
DS
= 5V, ID = 50mA
V
DS
16 50
11 25
pF V
DS
= 25V, VGS = 0V, f = 1MHzC
25
V
= 30V, RL = 150Ω, ID = 0.2A
DD
V
= 10V, RG = 25Ω
nS
720
GEN
(Switching time is essentially
independent of operating temperature)
DS(ON)
T
C
, VGS = 10V
T
C
T
C
T
C
= 125oC
= 125oC
= 125oC
= 125oC
4
NOTES: 1. T
2. For design aid only, not subject to productio n testin g.
3. Pulse test; PW = ≤80µS, duty cycle ≤1%.
4. This parameter not registered with JEDEC.
= 25oC unless otherwise specified.
A
9-4
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