®
ADS1286
ADS1286
ADS1286
12-Bit Micro Power Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
●SERIAL INTERFACE
●GUARANTEED NO MISSING CODES
●20kHz SAMPLING RATE
●LOW SUPPLY CURRENT: 250μA
APPLICATIONS
●REMOTE DATA ACQUISITION
●ISOLATED DATA ACQUISITION
●TRANSDUCER INTERFACE
●BATTERY OPERATED SYSTEMS
DESCRIPTION
The ADS1286 is a 12-bit, 20kHz analog-to-digital
converter with a differential input and sample and hold amplifier and consumes only 250μA of supply cur-
rent. The ADS1286 offers an SPI and SSI compatible serial interface for communications over a two or three wire interface. The combination of a serial two wire interface and micropower consumption makes the ADS1286 ideal for remote applications and for those requiring isolation.
The ADS1286 is available in a 8-pin plastic mini DIP and a 8-lead SOIC.
SAR |
Control |
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VREF |
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+In |
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DOUT |
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CDAC |
Serial |
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–In |
Interface |
DCLOCK |
S/H Amp |
Comparator |
CS/SHDN |
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International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 •mmediateI |
Product Info: (800) 548-6132 |
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© 1996 Burr-Brown Corporation |
PDS-1335B |
Printed in U.S.A. October, 1998 |
SPECIFICATIONS
At TA = TMIN to TMAX, +VCC = +5V, VREF = +5V, fSAMPLE = 12.5kHz, , fCLK = 16 • fSAMPLE, unless otherwise specified.
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ADS1286, ADS1286A |
ADS1286K, ADS1286B |
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ADS1286C, ADS1286L |
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PARAMETER |
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CONDITIONS |
MIN |
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TYP |
MAX |
MIN |
TYP |
MAX |
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MIN |
TYP |
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MAX |
UNITS |
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ANALOG INPUT |
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Full-Scale Input Range |
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+In – (–In) |
0 |
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VREF |
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V |
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Absolute Input Voltage |
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+In |
–0.2 |
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VCC +0.2 |
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V |
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–In |
–0.2 |
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+0.2 |
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V |
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Capacitance |
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25 |
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pF |
Leakage Current |
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±1 |
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mA |
SYSTEM PERFORMANCE |
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Resolution |
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12 |
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Bits |
No Missing Codes |
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12 |
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Bits |
Integral Linearity |
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±1 |
±2 |
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±0.5 |
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±1 |
LSB |
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Differential Linearity |
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±0.5 |
±1.0 |
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±0.75 |
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±0.25 |
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±0.75 |
LSB |
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Offset Error |
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0.75 |
±3 |
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LSB |
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Gain Error |
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±2 |
±8 |
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LSB |
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Noise |
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50 |
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mVrms |
Power Supply Rejection |
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82 |
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dB |
SAMPLING DYNAMICS |
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Conversion Time |
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12 |
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Clk Cycles |
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Acquisition Time |
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1.5 |
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Clk Cycles |
Small Signal Bandwidth |
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500 |
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kHz |
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DYNAMIC CHARACTERISTICS |
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Total Harmonic Distortion |
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VIN = 5.0Vp-p at 1kHz |
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–85 |
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dB |
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VIN = 5.0Vp-p at 5kHz |
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–83 |
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dB |
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SINAD |
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VIN = 5.0Vp-p at 1kHz |
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72 |
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dB |
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Spurious Free Dynamic Range |
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VIN = 5.0Vp-p at 1kHz |
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90 |
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dB |
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REFERENCE INPUT |
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REF Input Range |
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1.25 |
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2.5 |
VCC+0.05V |
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V |
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Input Resistance |
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CS = VCC |
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5000 |
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MW |
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CS = GND, fCLK = 0Hz |
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5000 |
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MW |
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Current Drain |
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CS |
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= VCC |
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0.01 |
2.5 |
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mA |
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tCYC ³ 640ms, fCLK £ 25kHz |
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2.4 |
20 |
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mA |
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tCYC = 80ms, fCLK = 200kHz |
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2.4 |
20 |
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mA |
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DIGITAL INPUT/OUTPUT |
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Logic Family |
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CMOS |
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Logic Levels: |
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VIH |
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IIH = +5mA |
3 |
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+VCC |
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VIL |
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IIL = +5mA |
0.0 |
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0.8 |
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VOH |
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IOH = 250mA |
3 |
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+VCC |
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V |
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VOL |
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IOL = 250mA |
0.0 |
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0.4 |
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V |
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Data Format |
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Straight Binary |
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POWER SUPPLY REQUIREMENTS |
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Power Supply Voltage |
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VCC |
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+4.50 |
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5 |
5.25 |
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V |
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Quiescent Current, VANA |
tCYC ³ 640mS, fCLK £ 25kHz |
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200 |
400 |
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mA |
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tCYC = 90mS, fCLK = 200kHz |
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250 |
500 |
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mA |
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Power Down |
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CS |
= VCC |
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3 |
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mA |
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TEMPERATURE RANGE |
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Specified Performance |
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ADS1286, K, L |
0 |
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+70 |
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°C |
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ADS1286A, B, C |
–40 |
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+85 |
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°C |
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Specifications same as grade to the left.
TIMING CHARACTERISTICS
fCLK = 200kHz, TA = TMIN to TMAX.
SYMBOL |
PARAMETER |
CONDITIONS |
MIN |
TYP |
MAX |
UNITS |
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tSMPL |
Analog Input Sample Time |
See Operating Sequence |
1.5 |
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2.0 |
Clk Cycles |
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tSMPL (MAX) |
Maximum Sampling Frequency |
ADS1286 |
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20 |
kHz |
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tCONV |
Conversion Time |
See Operating Sequence |
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12 |
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Clk Cycles |
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tdDO |
Delay TIme, DCLOCK¯ to DOUT Data Valid |
See Test Circuits |
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85 |
150 |
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tdis |
Delay TIme, |
CS |
- to DOUT Hi-Z |
See Test Circuits |
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25 |
50 |
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ten |
Delay TIme, DCLOCK¯ to DOUT Enable |
See Test Circuits |
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50 |
100 |
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thDO |
Output Data Remains Valid After DCLOCK¯ |
CLOAD = 100pF |
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30 |
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tf |
DOUT Fall Time |
See Test Circuits |
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70 |
100 |
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tr |
DOUT Rise Time |
See Test Circuits |
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60 |
100 |
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tCSD |
Delay Time, |
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¯ |
to DCLOCK¯ |
See Operating Sequence |
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tSUCS |
Delay Time, |
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to DCLOCK- |
See Operating Sequence |
30 |
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CS |
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®
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ADS1286 |
2 |
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ABSOLUTE MAXIMUM RATINGS(1)
+VCC ..................................................................................................... |
+6V |
Analog Input ....................................................... |
–0.3V to (+VCC + 300mV) |
Logic Input ......................................................... |
–0.3V to (+VCC + 300mV) |
Case Temperature ......................................................................... |
+100°C |
Junction Temperature .................................................................... |
+150°C |
Storage Temperature ..................................................................... |
+125°C |
External Reference Voltage .............................................................. |
+5.5V |
NOTE: (1) Stresses above these ratings may permanently damage the device.
PIN CONFIGURATION
VREF |
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+VCC |
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1 |
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8 |
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DCLOCK |
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+In |
2 |
ADS1286 |
7 |
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DOUT |
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–In |
3 |
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GND |
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5 |
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CS/SHDN |
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8-Pin Mini PDIP
8-Lead SOIC
ELECTROSTATIC DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. BurrBrown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications.
PIN ASSIGNMENTS
PIN |
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NAME |
DESCRIPTION |
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1 |
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VREF |
Reference Input. |
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2 |
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+In |
Non Inverting Input. |
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–In |
Inverting Input. Connect to ground or remote ground sense point. |
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GND |
Ground. |
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5 |
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Chip Select when low, Shutdown Mode when high. |
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CS/SHDN |
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DOUT |
The serial output data word is comprised of 12 bits of data. In operation the data is valid on the falling edge of DCLOCK. The |
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second clock pulse after the falling edge of |
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enables the serial output. After one null bit the data is valid for the next 12 edges. |
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DCLOCK |
Data Clock synchronizes the serial data transfer and determines conversion speed. |
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8 |
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+VCC |
Power Supply. |
PACKAGE/ORDERING INFORMATION
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PACKAGE |
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INTEGRAL |
TEMPERATURE |
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DRAWING |
PRODUCT |
LINEARITY |
RANGE |
PACKAGE |
NUMBER(1) |
ADS1286P |
±2 |
0°C to +70°C |
Plastic DIP |
006 |
ADS1286PK |
±2 |
0°C to +70°C |
Plastic DIP |
006 |
ADS1286PL |
±1 |
0°C to +70°C |
Plastic DIP |
006 |
ADS1286U |
±2 |
0°C to +70°C |
SOIC |
182 |
ADS1286UK |
±2 |
0°C to +70°C |
SOIC |
182 |
ADS1286UL |
±1 |
0°C to +70°C |
SOIC |
182 |
ADS1286PA |
±2 |
–40°C to +85°C |
Plastic DIP |
006 |
ADS1286PB |
±2 |
–40°C to +85°C |
Plastic DIP |
006 |
ADS1286PC |
±1 |
–40°C to +85°C |
Plastic DIP |
006 |
ADS1286UA |
±2 |
–40°C to +85°C |
SOIC |
182 |
ADS1286UB |
±2 |
–40°C to +85°C |
SOIC |
182 |
ADS1286UC |
±1 |
–40°C to +85°C |
SOIC |
182 |
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix
C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
3 |
ADS1286 |
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TYPICAL PERFORMANCE CURVES
At TA = +25, VCC = +5V, VREF = +5V, fSAMPLE = 12.5kHz, fCLK = 16 • fSAMPLE, unless otherwise specified.
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2.5 |
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REFERENCE CURRENT vs SAMPLE RATE |
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4.0 |
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REFERENCE CURRENT vs TEMPERATURE |
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(μA) |
2.0 |
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(μA) |
3.5 |
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3.0 |
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Current |
1.5 |
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Current |
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2.5 |
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Reference |
1.0 |
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Reference |
2.0 |
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0.5 |
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1.5 |
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0 |
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1.0 |
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0 |
2 |
4 |
6 |
8 |
10 |
12 |
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–55 |
–40 |
–25 |
0 |
25 |
70 |
85 |
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Sample Rate (kHz) |
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Temperature (°C) |
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Change in Offset (LSB)
CHANGE IN OFFSET vs REFERENCE VOLTAGE
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
1 |
2 |
3 |
4 |
5 |
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Reference Voltage (V) |
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Delta from 25°C (LSB)
CHANGE IN OFFSET vs TEMPERATURE
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–55 |
–40 |
–25 |
0 |
25 |
70 |
85 |
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Temperature (°C) |
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CHANGE IN INTEGRAL LINEARITY AND DIFFERENTIAL |
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LINEARITY vs REFERENCE VOLTAGE |
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0.10 |
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Reference(LSB) |
0.05 |
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Gain(LSB) |
–0.05 |
Change in Differential |
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0.00 |
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Linearity (LSB) |
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fromDelta+5V |
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–0.10 |
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Changein |
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Change in Integral |
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–0.15 |
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Linearity (LSB) |
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–0.20 |
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1 |
2 |
3 |
4 |
5 |
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Reference Voltage (V) |
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CHANGE IN GAIN vs REFERENCE VOLTAGE
4
3.5
3
2.5
2
1.5
1
0.5
0
1 |
2 |
3 |
4 |
5 |
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Reference Voltage (V) |
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®
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ADS1286 |
4 |
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