5
https://vinafix.com
4
3
2
1
PAGE
1
2
3
4
D D
5
6
7
8
9
10
11
12
13
14
15
16
C C
17
18
19
20
21
22
23
24 SATA CONN
25
26
27
B B
28
29
30
31
32 V_1P0_PCH
33
34
35
36
37
38
39
A A
40
41
42
CONTENTS
INDEX
BLOCK DIAGRAM
POWER DELIVERY
CHANGE LIST
CPU PCIEX16/DMI
CPU DDR CHANNEL A
CPU DDR CHANNEL B
CPU MISC
CPU POWER
CPU GND
DDR3 DIMMA1
DDR3 DIMMB1
PCH DMI/PCIE/USB
PCH CLINK/SATA/CPU HOST
PCH HDA/SPI/MISC
PCH LPC/DP/USB3/UART
PCH CLOCK BUFFER
PCH POWER
PCH GND
PCIEX16/X1*2 SLOT
RTD2168 EDP to VGA
DVI CONNECTOR
SIO IT8613E
REAR USB
FRONT USB
LAN RTL8111H/8107E
AUDIO CODEC ALC887
AUDIO CONNECTOR
ACPI POWER
MEMORY DC-DC
RESUME RESET LOGIC
SUPERIO PS2/COM
FAN
24PIN CONN & FP
SPI ROM/RTC CRYSTAL/BAT
VCCIO/VCCSA DC-DC
RT3606 DC-DC CONVERTE
RT3606_VCORE_PHASE
RT3606_VGT_PHASE
BOM
5
IH11P-MHS
C
P
U
:
H110MDS2 PRO D4
Intel Skylake S 42 in LGA1151 Package 95
Syste
SPT-H PCH
Main
m
Chipset
M
e
:
m
ory
:
Dual Channel/DDR-4*2(Max 16GB)1867/2133
O
n
b
oard
D
evice
:
Super I/O:IT8613E
LAN:Realtek 8111H
HD Codec:ALC887
P
o
wer solution:
CPU Voltage Regulators:3phase by RT360
D
DR Voltage Regulators:1Phase by UP1514
Exp
ansion Slots:
PCI EXPRESS 16X SLOT *1
PCI EXPRESS 1X SLOT *
R
E
A
R IO:
2
PS/2 PORT
DVI Por
VGA Por
USB3.0 PORT *
Gb RJ-45 +2 layer USB3.0 Port
Audio Jackets (3 PORT
Front I/O
SATA3 *
USB 2.0 Header *
USB 3.0 Header *
CPU FAN *
Syste
4
t
t
:
6
1
m FAN *
2
s
)
2
1
Serial header
Front Audio Heade
1
3
VER 6.0
W
6
r
2
high 1 Low
high 1 Low
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
1
OV by RT360
1
OV by IT8613E
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◇
duplication, or disclosure of this document
will be subject to the applicable civil
and/orcriminal penalties.
IH11P-MHS
IH11P-MHS
IH11P-MHS
◆
Any unauthorized use, reproduction,
◆
INDEX
INDEX
INDEX
1
142Friday, January 15, 2016
142Friday, January 15, 2016
142Friday, January 15, 2016
6
6.0
6.0
6.0
of
of
of
5
https://vinafix.com
4
3
2
1
Haswell
X16 SLOT X1
D D
PCIE GEN3 X16
Broadwell
LGA 1151 SOCKET
1066/1333/1600
Channel A DIMM X2
Channel B DIMM X2
Ports 0 & 1 6 Gb/s Support
Cost Reduced HDMI Level
Shifter When Trace length
less than 9.25'
DVI
PORTS
C C
DISPLAY
3JACKS
PORT B/D
PORT C SPI FLASH 32M
Front Audio Header
USB 2.0 PORTS *14
USB 3.0 PORTS *10
SATA3.0 PORTS X6
Dual Independent
Dispaly
HDC CODEC
ALC887
DMI3.0
PCH
708 PIN
LPC
GIGA LAN RTL8111H
5GT/s
8 PCIE2.0 PORTS
PEG X1 SLOT*2
ITE8613
B B
CPU SMART FAN X1 SYSTEM FAN X1 PS2 KB/MS Serial header
A A
5
4
3
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◇
duplication, or disclosure of this document
will be subject to the applicable civil
and/orcriminal penalties.
◆
Any unauthorized use, reproduction,
◆
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
IH11P-MHS
IH11P-MHS
IH11P-MHS
242Friday, January 15, 2016
242Friday, January 15, 2016
242Friday, January 15, 2016
1
of
of
of
6.0
6.0
6.0
5
https://vinafix.com
CPU1C
CPU1C
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
D D
C C
B B
V_SA_IO
EXP_A_RX_0_DP20
EXP_A_RX_0_DN20
EXP_A_RX_1_DP20
EXP_A_RX_1_DN20
EXP_A_RX_2_DP20
EXP_A_RX_2_DN20
EXP_A_RX_3_DP20
EXP_A_RX_3_DN20
EXP_A_RX_4_DP20
EXP_A_RX_4_DN20
EXP_A_RX_5_DP20
EXP_A_RX_5_DN20
EXP_A_RX_6_DP20
EXP_A_RX_6_DN20
EXP_A_RX_7_DP20
EXP_A_RX_7_DN20
EXP_A_RX_8_DP20
EXP_A_RX_8_DN20
EXP_A_RX_9_DP20
EXP_A_RX_9_DN20
EXP_A_RX_10_DP20
EXP_A_RX_10_DN20
EXP_A_RX_11_DP20
EXP_A_RX_11_DN20
EXP_A_RX_12_DP20
EXP_A_RX_12_DN20
EXP_A_RX_13_DP20
EXP_A_RX_13_DN20
EXP_A_RX_14_DP20
EXP_A_RX_14_DN20
EXP_A_RX_15_DP20
EXP_A_RX_15_DN20
CR3 24.9 1% 0402CR3 24.9 1% 0402
PEG_RCOMP
B8
B7
C7
C6
D6
D5
E5
E4
F6
F5
G5
G4
H6
H5
J5
J4
K6
K5
L5
L4
M6
M5
N5
N4
P6
P5
R5
R4
T6
T5
U5
U4
L7
SKYLAKE-S Rev:0.7
PEG_RXP[0]
PEG_RXN[0]
PEG_RXP[1]
PEG_RXN[1]
PEG_RXP[2]
PEG_RXN[2]
PEG_RXP[3]
PEG_RXN[3]
PEG_RXP[4]
PEG_RXN[4]
PEG_RXP[5]
PEG_RXN[5]
PEG_RXP[6]
PEG_RXN[6]
PEG_RXP[7]
PEG_RXN[7]
PEG_RXP[8]
PEG_RXN[8]
PEG_RXP[9]
PEG_RXN[9]
PEG_RXP[10]
PEG_RXN[10]
PEG_RXP[11]
PEG_RXN[11]
PEG_RXP[12]
PEG_RXN[12]
PEG_RXP[13]
PEG_RXN[13]
PEG_RXP[14]
PEG_RXN[14]
PEG_RXP[15]
PEG_RXN[15]
PEG_RCOMP
PEG_RCOMP
W/S=12/15 mils,length=0.4''max
DMI_IT_MR_0_DP13
DMI_IT_MR_0_DN13
DMI_IT_MR_1_DP13
DMI_IT_MR_1_DN13
DMI_IT_MR_2_DP13
DMI_IT_MR_2_DN13
DMI_IT_MR_3_DP13
DMI_IT_MR_3_DN13
Y3
DMI_RXP[0]
Y4
DMI_RXN[0]
AA4
DMI_RXP[1]
AA5
DMI_RXN[1]
AB4
DMI_RXP[2]
AB3
DMI_RXN[2]
AC4
DMI_RXP[3]
AC5
DMI_RXN[3]
LGA 1151 SOCKET
LGA 1151 SOCKET
3 OF 12
3 OF 12
4
PEG_TXP[0]
PEG_TXN[0]
PEG_TXP[1]
PEG_TXN[1]
PEG_TXP[2]
PEG_TXN[2]
PEG_TXP[3]
PEG_TXN[3]
PEG_TXP[4]
PEG_TXN[4]
PEG_TXP[5]
PEG_TXN[5]
PEG_TXP[6]
PEG_TXN[6]
PEG_TXP[7]
PEG_TXN[7]
PEG_TXP[8]
PEG_TXN[8]
PEG_TXP[9]
PEG_TXN[9]
PEG_TXP[10]
PEG_TXN[10]
PEG_TXP[11]
PEG_TXN[11]
PEG_TXP[12]
PEG_TXN[12]
PEG_TXP[13]
PEG_TXN[13]
PEG_TXP[14]
PEG_TXN[14]
PEG_TXP[15]
PEG_TXN[15]
PEG
PEG
DMI
DMI
DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]
A5
A6
B4
B5
C3
C4
D2
D3
E1
E2
F2
F3
G1
G2
H2
H3
J1
J2
K2
K3
L1
L2
M2
M3
N1
N2
P2
P3
R2
R1
T2
T3
AC2
AC1
AD3
AD2
AE2
AE1
AF2
AF3
EXP_A_TX_0_DP 20
EXP_A_TX_0_DN 20
EXP_A_TX_1_DP 20
EXP_A_TX_1_DN 20
EXP_A_TX_2_DP 20
EXP_A_TX_2_DN 20
EXP_A_TX_3_DP 20
EXP_A_TX_3_DN 20
EXP_A_TX_4_DP 20
EXP_A_TX_4_DN 20
EXP_A_TX_5_DP 20
EXP_A_TX_5_DN 20
EXP_A_TX_6_DP 20
EXP_A_TX_6_DN 20
EXP_A_TX_7_DP 20
EXP_A_TX_7_DN 20
EXP_A_TX_8_DP 20
EXP_A_TX_8_DN 20
EXP_A_TX_9_DP 20
EXP_A_TX_9_DN 20
EXP_A_TX_10_DP 20
EXP_A_TX_10_DN 20
EXP_A_TX_11_DP 20
EXP_A_TX_11_DN 20
EXP_A_TX_12_DP 20
EXP_A_TX_12_DN 20
EXP_A_TX_13_DP 20
EXP_A_TX_13_DN 20
EXP_A_TX_14_DP 20
EXP_A_TX_14_DN 20
EXP_A_TX_15_DP 20
EXP_A_TX_15_DN 20
DMI_MT_IR_0_DP 13
DMI_MT_IR_0_DN 13
DMI_MT_IR_1_DP 13
DMI_MT_IR_1_DN 13
DMI_MT_IR_2_DP 13
DMI_MT_IR_2_DN 13
DMI_MT_IR_3_DP 13
DMI_MT_IR_3_DN 13
3
DVI PORT
EDP to VGA
2
CPU1D
CPU1D
DDI1_TX_0_DP22
DDI1_TX_0_DN22
DDI1_TX_1_DP22
DDI1_TX_1_DN22
DDI1_TX_2_DP22
DDI1_TX_2_DN22
DDI1_TX_3_DP22
DDI1_TX_3_DN22
DDI2_TX_0_DP21
DDI2_TX_0_DN21
DDI2_TX_1_DP21
DDI2_TX_1_DN21
DDI2_AUX_DP21
DDI2_AUX_DN21
C21
D21
D22
E22
B23
A23
C23
D23
B13
C13
B18
A18
D18
E18
C19
D19
D20
E20
A12
B12
B14
A14
C15
B15
B16
A16
C17
B17
B11
C11
LGA 1151 SOCKET
LGA 1151 SOCKET
DDI1_TXP[0]
DDI1_TXN[0]
DDI1_TXP[1]
DDI1_TXN[1]
DDI1_TXP[2]
DDI1_TXN[2]
DDI1_TXP[3]
DDI1_TXN[3]
DDI1_AUXP
DDI1_AUXN
DDI2_TXP[0]
DDI2_TXN[0]
DDI2_TXP[1]
DDI2_TXN[1]
DDI2_TXP[2]
DDI2_TXN[2]
DDI2_TXP[3]
DDI2_TXN[3]
DDI2_AUXP
DDI2_AUXN
DDI3_TXP[0]
DDI3_TXN[0]
DDI3_TXP[1]
DDI3_TXN[1]
DDI3_TXP[2]
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3]
DDI3_AUXP
DDI3_AUXN
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
SKYLAKE-S Rev:0.7
EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
DP Port
DP Port
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
4 OF 12
4 OF 12
E10
D10
D9
C9
H10
G10
G9
F9
D12
E12
D14
CR1 24.9 1% 0402CR1 24.9 1% 0402
M9
EDP_RCOMP
W/S=20/25 mils,length=0.1'max
V3
V2
CR2 22 0402CR2 22 0402
U1
SDO/SDI match SCLK within 150mils
Max<=8'
Resistor:
1
V_SA_IO
AUD_AZACPU_SCLK 15
AUD_AZACPU_SDO 15
AUD_AZACPU_SDI 15
Total length<4'=200mils
Total length>4' =1000mils
V_SA_IO V_SA_IO V_SA_IO V_SA_IO V_SA_IO V_SA_IO
C23
C23
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
V_SA_IO V_SA_IO V_CPU_CORE
C30
C30
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C24
C24
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C38
C38
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C26
C26
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C39
C39
0.1UF 16V Y5V 0402
0.1UF 16V Y5V 0402
C27
C27
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C28
C28
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
C29
C29
0.1UF 16V Y5V 0402 /NI
0.1UF 16V Y5V 0402 /NI
A A
5
4
3
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◇
reproduction, duplication, or
disclosure of this document will be
subject to the applicable civil
and/orcriminal penalties.
◆
Any unauthorized use,
◆
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU PCIEX16/DMI/FDI
CPU PCIEX16/DMI/FDI
CPU PCIEX16/DMI/FDI
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
of
of
of
542Friday, January 15, 2016
542Friday, January 15, 2016
542Friday, January 15, 2016
6.0
6.0
6.0
5
Vinafix.com
https://vinafix.com
M_DATA_A[0..63]11
D D
C C
B B
A A
5
M_DATA_A[0..63]
M_DATA_A0
M_DATA_A1
M_DATA_A2
M_DATA_A3
M_DATA_A4
M_DATA_A5
M_DATA_A6
M_DATA_A7
M_DATA_A8
M_DATA_A9
M_DATA_A10
M_DATA_A11
M_DATA_A12
M_DATA_A13
M_DATA_A14
M_DATA_A15
M_DATA_A16
M_DATA_A17
M_DATA_A18
M_DATA_A19
M_DATA_A20
M_DATA_A21
M_DATA_A22
M_DATA_A23
M_DATA_A24
M_DATA_A25
M_DATA_A26
M_DATA_A27
M_DATA_A28
M_DATA_A29
M_DATA_A30
M_DATA_A31
M_DATA_A32
M_DATA_A33
M_DATA_A34
M_DATA_A35
M_DATA_A36
M_DATA_A37
M_DATA_A38
M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42
M_DATA_A43
M_DATA_A44
M_DATA_A45
M_DATA_A46
M_DATA_A47
M_DATA_A48
M_DATA_A49
M_DATA_A50
M_DATA_A51
M_DATA_A52
M_DATA_A53
M_DATA_A54
M_DATA_A55
M_DATA_A56
M_DATA_A57
M_DATA_A58
M_DATA_A59
M_DATA_A60
M_DATA_A61
M_DATA_A62
M_DATA_A63
4
CPU1A
CPU1A
AE38
DDR0_DQ[0]
AE37
DDR0_DQ[1]
AG38
DDR0_DQ[2]
AG37
DDR0_DQ[3]
AE39
DDR0_DQ[4]
AE40
DDR0_DQ[5]
AG39
DDR0_DQ[6]
AG40
DDR0_DQ[7]
AJ38
DDR0_DQ[8]
AJ37
DDR0_DQ[9]
AL38
DDR0_DQ[10]
AL37
DDR0_DQ[11]
AJ40
DDR0_DQ[12]
AJ39
DDR0_DQ[13]
AL39
DDR0_DQ[14]
AL40
DDR0_DQ[15]
AN38
DDR0_DQ[16]/DDR0_DQ[32]
AN40
DDR0_DQ[17]/DDR0_DQ[33]
AR38
DDR0_DQ[18]/DDR0_DQ[34]
AR37
DDR0_DQ[19]/DDR0_DQ[35]
AN39
DDR0_DQ[20]/DDR0_DQ[36]
AN37
DDR0_DQ[21]/DDR0_DQ[37]
AR39
DDR0_DQ[22]/DDR0_DQ[38]
AR40
DDR0_DQ[23]/DDR0_DQ[39]
AW37
DDR0_DQ[24]/DDR0_DQ[40]
AU38
DDR0_DQ[25]/DDR0_DQ[41]
AV35
DDR0_DQ[26]/DDR0_DQ[42]
AW35
DDR0_DQ[27]/DDR0_DQ[43]
AU37
DDR0_DQ[28]/DDR0_DQ[44]
AV37
DDR0_DQ[29]/DDR0_DQ[45]
AT35
DDR0_DQ[30]/DDR0_DQ[46]
AU35
DDR0_DQ[31]/DDR0_DQ[47]
AY8
DDR0_DQ[32]/DDR1_DQ[0]
AW8
DDR0_DQ[33]/DDR1_DQ[1]
AV6
DDR0_DQ[34]/DDR1_DQ[2]
AU6
DDR0_DQ[35]/DDR1_DQ[3]
AU8
DDR0_DQ[36]/DDR1_DQ[4]
AV8
DDR0_DQ[37]/DDR1_DQ[5]
AW6
DDR0_DQ[38]/DDR1_DQ[6]
AY6
DDR0_DQ[39]/DDR1_DQ[7]
AY4
DDR0_DQ[40]/DDR1_DQ[8]
AV4
DDR0_DQ[41]/DDR1_DQ[9]
AT1
DDR0_DQ[42]/DDR1_DQ[10]
AT2
DDR0_DQ[43]/DDR1_DQ[11]
AV3
DDR0_DQ[44]/DDR1_DQ[12]
AW4
DDR0_DQ[45]/DDR1_DQ[13]
AT4
DDR0_DQ[46]/DDR1_DQ[14]
AT3
DDR0_DQ[47]/DDR1_DQ[15]
AP2
DDR0_DQ[48]/DDR1_DQ[32]
AM4
DDR0_DQ[49]/DDR1_DQ[33]
AP3
DDR0_DQ[50]/DDR1_DQ[34]
AM3
DDR0_DQ[51]/DDR1_DQ[35]
AP4
DDR0_DQ[52]/DDR1_DQ[36]
AM2
DDR0_DQ[53]/DDR1_DQ[37]
AP1
DDR0_DQ[54]/DDR1_DQ[38]
AM1
DDR0_DQ[55]/DDR1_DQ[39]
AK3
DDR0_DQ[56]/DDR1_DQ[40]
AH1
DDR0_DQ[57]/DDR1_DQ[41]
AK4
DDR0_DQ[58]/DDR1_DQ[42]
AH2
DDR0_DQ[59]/DDR1_DQ[43]
AH4
DDR0_DQ[60]/DDR1_DQ[44]
AK2
DDR0_DQ[61]/DDR1_DQ[45]
AH3
DDR0_DQ[62]/DDR1_DQ[46]
AK1
DDR0_DQ[63]/DDR1_DQ[47]
AU33
DDR0_ECC[0]
AT33
DDR0_ECC[1]
AW33
DDR0_ECC[2]
AV31
DDR0_ECC[3]
AU31
DDR0_ECC[4]
AV33
DDR0_ECC[5]
AW31
DDR0_ECC[6]
AY31
DDR0_ECC[7]
LGA 1151 SOCKET
LGA 1151 SOCKET
4
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
SKYLAKE-S Rev:0.7
DDR CHANNEL A
DDR CHANNEL A
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
1 OF 12
1 OF 12
3
DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]
DDR0_CKN[1]
DDR0_CKP[2]
DDR0_CKN[2]
DDR0_CKP[3]
DDR0_CKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]
DDR0_MA[3]
DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[8]
DDR0_DQSN[8]
3
AW18
AV18
AW17
AY17
AW16
AV16
AT16
AU16
AY24
AW24
AV24
AV25
AW12
AU11
AV13
AV10
AW11
AU14
AU12
AY10
AY13
AV15
AW23
AW13
AV14
AY11
AW15
AU18
AU17
AV19
AT19
AU20
AV20
AU21
AT20
AT22
AY14
AU22
AV22
AV12
AV23
AU24
AY15
AT23
AF39
AK39
AP39
AU36
AW7
AU3
AN3
AJ3
AF38
AK38
AP38
AV36
AV7
AU2
AN2
AJ2
AV32
AU32
M_DQS_A_DP[0..7]
M_DQS_A_DN[0..7]
M_MAA_A16
M_MAA_A14
M_MAA_A15
M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10
M_MAA_A11
M_MAA_A12
M_MAA_A13
2
CK_M_CH0_0_DP 11
CK_M_CH0_0_DN 11
CK_M_CH0_1_DP 11
CK_M_CH0_1_DN 11
M_SCKE_A0 11
M_SCKE_A1 11
M_SCS_A_N0 11
M_SCS_A_N1 11
M_ODT_A0 11
M_ODT_A1 11
M_SBS_A0 11
M_SBS_A1 11
M_BG_CH0_0 11
M_MAA_A[0..16] 11
VER0.60:DDR3 CHANGE DDR4(PAGE6/7/11/12)
M_BG_CH0_1 11
DDR_CH0_ACT_N 11
DDR_CH0_PAR 11
DDR_CH0_ALERT_N 11
M_DQS_A_DN0 11
M_DQS_A_DN1 11
M_DQS_A_DN2 11
M_DQS_A_DN3 11
M_DQS_A_DN4 11
M_DQS_A_DN5 11
M_DQS_A_DN6 11
M_DQS_A_DN7 11
M_DQS_A_DP0 11
M_DQS_A_DP1 11
M_DQS_A_DP2 11
M_DQS_A_DP3 11
M_DQS_A_DP4 11
M_DQS_A_DP5 11
M_DQS_A_DP6 11
M_DQS_A_DP7 11
M_DQS_A_DP[0..7] 11
M_DQS_A_DN[0..7] 11
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
1
CPU DDR3 CHANNEL A
CPU DDR3 CHANNEL A
CPU DDR3 CHANNEL A
IH11P-MHS
IH11P-MHS
IH11P-MHS
6 42Friday, January 15, 2016
6 42Friday, January 15, 2016
6 42Friday, January 15, 2016
1
6.0
6.0
6.0
of
of
of
5
https://vinafix.com
M_DATA_B[0..63]12
D D
C C
B B
A A
5
M_DATA_B[0..63]
M_DATA_B0
M_DATA_B1
M_DATA_B2
M_DATA_B3
M_DATA_B4
M_DATA_B5
M_DATA_B6
M_DATA_B7
M_DATA_B8
M_DATA_B9
M_DATA_B10
M_DATA_B11
M_DATA_B12
M_DATA_B13
M_DATA_B14
M_DATA_B15
M_DATA_B16
M_DATA_B17
M_DATA_B18
M_DATA_B19
M_DATA_B20
M_DATA_B21
M_DATA_B22
M_DATA_B23
M_DATA_B24
M_DATA_B25
M_DATA_B26
M_DATA_B27
M_DATA_B28
M_DATA_B29
M_DATA_B30
M_DATA_B31
M_DATA_B32
M_DATA_B33
M_DATA_B34
M_DATA_B35
M_DATA_B36
M_DATA_B37
M_DATA_B38
M_DATA_B39
M_DATA_B40
M_DATA_B41
M_DATA_B42
M_DATA_B43
M_DATA_B44
M_DATA_B45
M_DATA_B46
M_DATA_B47
M_DATA_B48
M_DATA_B49
M_DATA_B50
M_DATA_B51
M_DATA_B52
M_DATA_B53
M_DATA_B54
M_DATA_B55
M_DATA_B56
M_DATA_B57
M_DATA_B58
M_DATA_B59
M_DATA_B60
M_DATA_B61
M_DATA_B62
M_DATA_B63
4
CPU1B
CPU1B
AD34
DDR1_DQ[0]/DDR0_DQ[16]
AD35
DDR1_DQ[1]/DDR0_DQ[17]
AG35
DDR1_DQ[2]/DDR0_DQ[18]
AH35
DDR1_DQ[3]/DDR0_DQ[19]
AE35
DDR1_DQ[4]/DDR0_DQ[20]
AE34
DDR1_DQ[5]/DDR0_DQ[21]
AG34
DDR1_DQ[6]/DDR0_DQ[22]
AH34
DDR1_DQ[7]/DDR0_DQ[23]
AK35
DDR1_DQ[8]/DDR0_DQ[24]
AL35
DDR1_DQ[9]/DDR0_DQ[25]
AK32
DDR1_DQ[10]/DDR0_DQ[26]
AL32
DDR1_DQ[11]/DDR0_DQ[27]
AK34
DDR1_DQ[12]/DDR0_DQ[28]
AL34
DDR1_DQ[13]/DDR0_DQ[29]
AK31
DDR1_DQ[14]/DDR0_DQ[30]
AL31
DDR1_DQ[15]/DDR0_DQ[31]
AP35
DDR1_DQ[16]/DDR0_DQ[48]
AN35
DDR1_DQ[17]/DDR0_DQ[49]
AN32
DDR1_DQ[18]/DDR0_DQ[50]
AP32
DDR1_DQ[19]/DDR0_DQ[51]
AN34
DDR1_DQ[20]/DDR0_DQ[52]
AP34
DDR1_DQ[21]/DDR0_DQ[53]
AN31
DDR1_DQ[22]/DDR0_DQ[54]
AP31
DDR1_DQ[23]/DDR0_DQ[55]
AL29
DDR1_DQ[24]/DDR0_DQ[56]
AM29
DDR1_DQ[25]/DDR0_DQ[57]
AP29
DDR1_DQ[26]/DDR0_DQ[58]
AR29
DDR1_DQ[27]/DDR0_DQ[59]
AM28
DDR1_DQ[28]/DDR0_DQ[60]
AL28
DDR1_DQ[29]/DDR0_DQ[61]
AR28
DDR1_DQ[30]/DDR0_DQ[62]
AP28
DDR1_DQ[31]/DDR0_DQ[63]
AR12
DDR1_DQ[32]/DDR1_DQ[16]
AP12
DDR1_DQ[33]/DDR1_DQ[17]
AM13
DDR1_DQ[34]/DDR1_DQ[18]
AL13
DDR1_DQ[35]/DDR1_DQ[19]
AR13
DDR1_DQ[36]/DDR1_DQ[20]
AP13
DDR1_DQ[37]/DDR1_DQ[21]
AM12
DDR1_DQ[38]/DDR1_DQ[22]
AL12
DDR1_DQ[39]/DDR1_DQ[23]
AP10
DDR1_DQ[40]/DDR1_DQ[24]
AR10
DDR1_DQ[41]/DDR1_DQ[25]
AR7
DDR1_DQ[42]/DDR1_DQ[26]
AP7
DDR1_DQ[43]/DDR1_DQ[27]
AR9
DDR1_DQ[44]/DDR1_DQ[28]
AP9
DDR1_DQ[45]/DDR1_DQ[29]
AR6
DDR1_DQ[46]/DDR1_DQ[30]
AP6
DDR1_DQ[47]/DDR1_DQ[31]
AM10
DDR1_DQ[48]
AL10
DDR1_DQ[49]
AM7
DDR1_DQ[50]
AL7
DDR1_DQ[51]
AM9
DDR1_DQ[52]
AL9
DDR1_DQ[53]
AM6
DDR1_DQ[54]
AL6
DDR1_DQ[55]
AJ6
DDR1_DQ[56]
AJ7
DDR1_DQ[57]
AE6
DDR1_DQ[58]
AF7
DDR1_DQ[59]
AH7
DDR1_DQ[60]
AH6
DDR1_DQ[61]
AE7
DDR1_DQ[62]
AF6
DDR1_DQ[63]
AR25
DDR1_ECC[0]
AR26
DDR1_ECC[1]
AM26
DDR1_ECC[2]
AM25
DDR1_ECC[3]
AP26
DDR1_ECC[4]
AP25
DDR1_ECC[5]
AL25
DDR1_ECC[6]
AL26
DDR1_ECC[7]
LGA 1151 SOCKET
LGA 1151 SOCKET
4
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
Rev:0.7
Rev:0.7
DDR CHANNEL B
DDR CHANNEL B
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
2 OF 12
2 OF 12
DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]
DDR1_CKP[2]
DDR1_CKN[2]
DDR1_CKP[3]
DDR1_CKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]
DDR1_DQSN[8]
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
3
3
AM20
AM21
AP22
AP21
AN20
AN21
AP19
AP20
AY29
AV29
AW29
AU29
AP17
AN15
AN17
AM15
AM16
AL16
AP15
AL15
M_MAA_B16
AN18
M_MAA_B14
AL17
M_MAA_B15
AP16
AL18
AM18
AW28
M_MAA_B0
AL19
M_MAA_B1
AL22
M_MAA_B2
AM22
M_MAA_B3
AM23
M_MAA_B4
AP23
M_MAA_B5
AL23
M_MAA_B6
AW26
M_MAA_B7
AY26
M_MAA_B8
AU26
M_MAA_B9
AW27
M_MAA_B10
AP18
M_MAA_B11
AU27
M_MAA_B12
AV27
M_MAA_B13
AR15
AY28
AU28
AL20
AY25
AF34
AK33
AN33
AN29
AN13
AR8
AM8
AG6
AF35
AL33
AP33
AN28
AN12
AP8
AL8
AG7
AN25
AN26
CPU_VREF_DIMMA
AB40
DDR0_VREF_DQ
AC40
CPU_VREF_DIMMB
AC39
M_DQS_B_DP[0..7]
M_DQS_B_DN[0..7]
CK_M_CH1_0_DP 12
CK_M_CH1_0_DN 12
CK_M_CH1_1_DP 12
CK_M_CH1_1_DN 12
M_SCKE_B0 12
M_SCKE_B1 12
M_SCS_B_N0 12
M_SCS_B_N1 12
M_ODT_B0 12
M_ODT_B1 12
M_SBS_B0 12
M_SBS_B1 12
M_BG_CH1_0 12
VER0.60:DDR3 CHANGE DDR4(PAGE6/7/11/12)
M_BG_CH1_1 12
DDR_CH1_ACT_N 12
DDR_CH1_PAR 12
DDR_CH1_ALERT_N 12
M_DQS_B_DN0 12
M_DQS_B_DN1 12
M_DQS_B_DN2 12
M_DQS_B_DN3 12
M_DQS_B_DN4 12
M_DQS_B_DN5 12
M_DQS_B_DN6 12
M_DQS_B_DN7 12
M_DQS_B_DP0 12
M_DQS_B_DP1 12
M_DQS_B_DP2 12
M_DQS_B_DP3 12
M_DQS_B_DP4 12
M_DQS_B_DP5 12
M_DQS_B_DP6 12
M_DQS_B_DP7 12
M_DQS_B_DP[0..7] 12
M_DQS_B_DN[0..7] 12
2
M_MAA_B[0..16] 12
M_MAA_B[0..16] 12
CPU_VREF_DIMMA 11
CPU_VREF_DIMMB 12
2
1
CPU_VREF_DIMMA
CC1
CC1
0.01UF 25V X7R 0402
0.01UF 25V X7R 0402
DDR0_VREF_DQ
CC37
CC37
0.01UF 25V X7R 0402 /NI
0.01UF 25V X7R 0402 /NI
CPU_VREF_DIMMB
CC39
CC39
0.01UF 25V X7R 0402
0.01UF 25V X7R 0402
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
CPU DDR3 CHANNEL B
CPU DDR3 CHANNEL B
CPU DDR3 CHANNEL B
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
of
of
of
742Friday, January 15, 2016
742Friday, January 15, 2016
742Friday, January 15, 2016
6.0
6.0
6.0
5
https://vinafix.com
PCH_CPU_BCLK_DP17
D D
VCCST_VCCSFR
CR6
CR6
49.9 1% 0402
VRD13 INTERFACE
H_VIDALERT_N39
H_VIDSCK39
H_VIDSOUT39
H_PROCHOT_N23,39
49.9 1% 0402
CR8 220 0402CR8 220 0402
VER0.6:COST DOWN(SHORT 0402)(PAGE8/11/12/16/19/23/33/39)
C C
VCCST_PWRGD33
H_PWRGD15
PLTRST_CPU_N14
H_PM_SYNC_014
H_PM_DOWN14
PCH_THERMTRIP_N14
H_SKTOCC_N16,33,39
CR12 22 0402CR12 22 0402
PCH_CPU_BCLK_DN17
PCH_CPU_PCIBCLK_DP17
PCH_CPU_PCIBCLK_DN17
PCH_CPU_NSSC_CLK_DP17
PCH_CPU_NSSC_CLK_DN17
CR7
CR7
100 1% 0402
100 1% 0402
H_VIDALERT#
H_VIDSCK
H_VIDSOUT
H_PROCHOT_N
DDR_VTT_CTL
ZVM_N
1
TP26TP26
VCCST_PWRGD
PLTRST_CPU_N_R
H_PM_SYNC_0
H_PM_DOWN_R
H_PECI
PCH_THERMTRIP_N
H_SKTOCC_N
E39
E38
E40
C39
AC36
AC38
AC37
D11
AB35
AB36
D13
4
W5
W4
W1
W2
K9
J9
U2
F8
E7
E8
D8
G7
CPU1E
CPU1E
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
ZVM#
RSVD_AC37
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
Rev:0.7
Rev:0.7
MISC
MISC
5 OF 12
5 OF 12
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[17]
CFG[16]
CFG[19]
CFG[18]
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
H15
F15
F16
H16
F19
H18
G21
H20
G16
E16
F17
H17
G20
F20
F21
H19
F14
E14
F18
G18
D16
D17
G14
H14
H13
G12
F13
F11
F12
B9
B10
M11
3
XDP_CPU_CFG_N0
XDP_CPU_CFG_N4
XDP_CPU_CFG_N5
XDP_CPU_CFG_N6
XDP_CPU_CFG_N7
XDP_CPU_CFG_N8
XDP_CPU_CFG_N9
XDP_CPU_CFG_N10
XDP_CPU_CFG_N11
XDP_CPU_CFG_N12
XDP_CPU_CFG_N13
XDP_CPU_CFG_N14
XDP_CPU_CFG_N15
XDP_CPU_TDO
XDP_CPU_TDI
XDP_CPU_TMS
XDP_CPU_TCK0
XDP_CPU_TRST_N
XDP_CPU_PREQ_N
XDP_CPU_PRDY_N
HSW_CFG_RCOMP
1
TP112TP112
1
TP113TP113
1
TP114TP114
1
TP116TP116
1
TP117TP117
1
TP118TP118
1
TP119TP119
1
TP120TP120
1
TP121TP121
1
TP122TP122
1
TP123TP123
XDP_CPU_TRST_N 19
XDP_CPU_PREQ_N 19
XDP_CPU_PRDY_N 19
2
CPU1J
CPU1J
J8
RSVD_TP_J8
J7
RSVD_TP_J7
L8
RSVD_TP_L8
K8
RSVD_TP_K8
AV1
RSVD_TP_AV1
AW2
RSVD_TP_AW2
H8
RSVD_H8
K10
RSVD_K10
L10
RSVD_L10
J17
RSVD_J17
B39
RSVD_B39
J19
RSVD_J19
C40
RSVD_C40
G8
RSVD_G8
AY3
RSVD_AY3
PCH_TRIGOUT19
PCH_TRIGIN19DDR_VTT_CTL33
D1
PROC_TRIGIN
B3
PROC_TRIGOUT
L12
RSVD_L12
K12
RSVD_K12
LGA 1151 SOCKET
LGA 1151 SOCKET
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
SKYLAKE-S Rev:0.7
RSVD_TP_H11
RSVD_TP_H12
RSVD_TP_AW38
RSVD_TP_AV39
10 OF 12
10 OF 12
RSVD_AU39
RSVD_AU40
VSS_AT15
VSS_AR23
VSS_AR22
RSVD_J15
RSVD_J14
RSVD_AU9
RSVD_AU10
RSVD_J13
RSVD_K13
RSVD_J11
RSVD_D15
RSVD_K11
H11
H12
AW38
AV39
AU39
AU40
AT15
AR23
AR22
J15
J14
AU9
AU10
J13
K13
J11
D15
K11
1
VER0.6:COST DOWN(SHORT 0402)(PAGE8/11/12/16/19/23/33/39)
LGA 1151 SOCKET
H_PECI
B B
CR14 0 0402 /NICR14 0 0402 /NI
EC_PECI 23
PCH_PECI 14
LGA 1151 SOCKET
CR12:
WITHIN 0.25 INCH FROM CPU
XDP_CPU_TDO
XDP_CPU_PREQ_N
XDP_CPU_TDI
XDP_CPU_TMS
H_PROCHOT_N
PCH_THERMTRIP_N
CR17 51 0402CR17 51 0402
CR21 51 0402 /NICR21 51 0402 /NI
CR20 51 0402CR20 51 0402
CR26 51 0402CR26 51 0402
CR23 75 0402CR23 75 0402
CR25 1K 0402CR25 1K 0402
VCCST_VCCSFR
XDP_CPU_CFG_N0
XDP_CPU_CFG_N4
CR19 1K 0402CR19 1K 0402
CR27 1K 0402 /NICR27 1K 0402 /NI
V_SA_IO
CFG[4] pull Low to enable eDP*
HSW_CFG_RCOMP
A A
XDP_CPU_TRST_N
XDP_CPU_TCK0
CR28 49.9 1% 0402CR28 49.9 1% 0402
CR29 51 0402 /NICR29 51 0402 /NI
CR30 51 0402CR30 51 0402
5
CFG[3] pull High PHYSICAL_DEBUG_ENABLE
4
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
3
2
Date: Sheet of
CPU MISC
CPU MISC
CPU MISC
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
6.0
6.0
6.0
of
842Friday, January 15, 2016
842Friday, January 15, 2016
842Friday, January 15, 2016
5
Vinafix.com
https://vinafix.com
V_GT
AA34
AA35
AA36
AA37
AA38
AB33
AB34
W34
W35
W36
W37
W38
G36
G37
G38
G39
G40
H36
H38
H40
J36
J37
J38
J39
J40
K36
K38
K40
L34
L35
L36
L37
L38
L39
L40
M33
M34
M36
M38
M40
N34
N35
N36
N37
N38
N39
N40
P33
P34
P36
P38
P40
R34
R35
R36
R37
R38
R39
R40
T33
T34
T36
T38
T40
U34
U35
U36
U37
U38
U39
U40
V33
V34
V36
V38
V40
Y33
Y34
Y36
Y38
VCC_H32
VCC_J21
VCC_F32
VCC_F33
VCC_F34
VCC_G23
VCC_G24
VCC_G25
VCC_G26
VCC_G27
VCC_G28
VCC_G29
VCC_J22
VCC_J23
VCC_J24
VCC_J25
VCC_J26
VCC_J27
VCC_J28
VCC_J29
VCC_J30
VCC_J31
VCC_K16
VCC_K18
VCC_K20
VCC_K21
VCC_K23
VCC_K25
VCC_K27
VCC_K29
VCC_K31
VCC_L14
VCC_L15
VCC_L16
VCC_L17
VCC_L18
VCC_L19
VCC_L20
VCC_L21
VCC_L22
VCC_L23
VCC_L24
VCC_L25
VCC_L26
VCC_L27
VCC_L28
VCC_L29
VCC_L30
VCC_M13
VCC_M14
VCC_M16
VCC_M18
VCC_M20
VCC_M22
VCC_M24
VCC_M26
VCC_M28
VCC_M30
VCC_AJ12
VCC_AJ14
VCC_AJ16
VCC_AJ18
VCC_AJ20
VCC_AJ22
V_CPU_CORE
H32
J21
F32
F33
F34
G23
G24
G25
G26
G27
G28
G29
J22
J23
J24
J25
J26
J27
J28
J29
J30
J31
K16
K18
K20
K21
K23
K25
K27
K29
K31
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
M13
M14
M16
M18
M20
M22
M24
M26
M28
M30
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
C38
D38
CR38
CR38
499 1% 0402
499 1% 0402
VCC_SENSE_IO 23
VCC_SENSE 39
VSS_SENSE 39
V_CPU_CORE
D D
C C
B B
CPU1G
CPU1G
A25
A26
A27
A28
A29
A30
B25
B27
B29
B31
B32
B33
B34
B35
B36
B37
C25
C26
C27
C28
C29
C30
C32
C34
C36
D25
D27
D29
D31
D32
D33
D34
D35
D36
E24
E25
E26
E27
E28
E29
E30
E32
E34
E36
F23
F24
F25
F27
F29
F31
G30
G32
H22
H23
H25
H27
H29
H31
AJ11
AJ13
AJ15
AJ17
AJ19
AJ21
LGA 1151 SOCKET
LGA 1151 SOCKET
VCC_A25
VCC_A26
VCC_A27
VCC_A28
VCC_A29
VCC_A30
VCC_B25
VCC_B27
VCC_B29
VCC_B31
VCC_B32
VCC_B33
VCC_B34
VCC_B35
VCC_B36
VCC_B37
VCC_C25
VCC_C26
VCC_C27
VCC_C28
VCC_C29
VCC_C30
VCC_C32
VCC_C34
VCC_C36
VCC_D25
VCC_D27
VCC_D29
VCC_D31
VCC_D32
VCC_D33
VCC_D34
VCC_D35
VCC_D36
VCC_E24
VCC_E25
VCC_E26
VCC_E27
VCC_E28
VCC_E29
VCC_E30
VCC_E32
VCC_E34
VCC_E36
VCC_F23
VCC_F24
VCC_F25
VCC_F27
VCC_F29
VCC_F31
VCC_G30
VCC_G32
VCC_H22
VCC_H23
VCC_H25
VCC_H27
VCC_H29
VCC_H31
VCC_AJ11
VCC_AJ13
VCC_AJ15
VCC_AJ17
VCC_AJ19
VCC_AJ21
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
Rev:0.7
Rev:0.7
7 OF 12
7 OF 12
VCC_SENSE
VSS_SENSE
CPU1H
CPU1H
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
SKYLAKE-S Rev:0.7
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
8 OF 12
8 OF 12
LGA 1151 SOCKET
LGA 1151 SOCKET
4
VCCGTX_F35
VCCGTX_G34
VCCGTX_G35
VCCGTX_H33
VCCGTX_H34
VCCGTX_J33
VCCGTX_J35
VCCGTX_K32
VCCGTX_K34
VCCGTX_L31
VCCGTX_L33
VCCGTX_M32
VCCGT_SENSE
VSSGT_SENSE
VCCGTX_SENSE
VSSGTX_SENSE
3
V_SA_IO
CPU1I
CPU1I
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
AA7
VCCSA
F35
G34
G35
H33
H34
J33
44e only
J35
K32
K34
L31
L33
M32
1
GTXGTX
V_SA_IO
VCCST_VCCSFR
VCCST_VCCSFR
BCC56
BCC56
10UF 6.3V X5R /NI
10UF 6.3V X5R /NI
AB6
AB7
AB8
AC7
AC8
AA6
AK11
AK14
AK24
AJ23
VCCST_VCCSFR
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
N7
VCCSA
P7
VCCSA
R7
VCCSA
T7
VCCSA
U7
VCCSA
Y6
VCCSA
Y7
VCCSA
Y8
VCCSA
W7
VCCSA
V7
VCCSA
VCCSA
VCCIO
VCCIO
VCCIO
VCCIO
M8
VCCIO
P8
VCCIO
T8
VCCIO
U8
VCCIO
W8
VCCIO
V5
VCCST_V5
V6
VCCST_V6
V4
VCCPLL
LGA 1151 SOCKET
LGA 1151 SOCKET
VDDQ_AT18
Rev:0.7
Rev:0.7
VDDQ_AT21
VDDQ_AU13
VDDQ_AU15
VDDQ_AU19
VDDQ_AU23
VDDQ_AV11
VDDQ_AV17
VDDQ_AV21
VDDQ_AW10
VDDQ_AW14
VDDQ_AW25
VDDQ_AY12
VDDQ_AY16
VDDQ_AY18
VDDQ_AY23
VCCPLL_OC
VCCOPC_AJ30
VCCOPC_AJ27
VCCOPC_AJ28
VCCOPC_AJ29
VCCOPC_AK27
VCCEOPIO
VCCEOPIO
VCC_OPC_1P8_AB37
VCC_OPC_1P8_AB38
VCCSA_SENSE
VCCIO_SENSE
VSS_SAIO_SENSE
VCCOPC_SENSE
VCCEOPIO_SENSE
VSSOPC_EOPIO_SENSE
9 OF 12
9 OF 12
V_SM
inside TOP SOCKET
AT18
V_SM
AT21
AU13
AU15
AU19
AU23
AV11
AV17
AV21
AW10
AW14
AW25
AY12
AY16
AY18
AY23
AJ9
AJ30
1
1
VCCOPCVCCOPC
44e only
VCCEOPIOVCCEOPIO
AJ27
AJ28
AJ29
AK27
AJ25
AJ26
AB37
AB38
AD5
AF4
AE4
AK21
AJ24
AK22
CC3
CC3
10UF 6.3V X5R /NI
10UF 6.3V X5R /NI
1
VCC_OPC_18PVCC_OPC_18P
1
VCC_OPC_18P1VCC_OPC_18P1
V_SA_IO
V_SA_IO
V_SA_IO
inside TOP SOCKET
V_SM
V_CPU_CORE
2
CC6
CC6
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
BCC10
BCC10
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC15
CC15
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC22
CC22
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC2
CC2
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
V_SA_IO
V_SA_IO
V_CPU_CORE
BCC7
BCC7
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
BCC11
BCC11
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC16
CC16
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC23
CC23
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC27
CC27
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
V_SA_IO
V_SA_IO
V_CPU_CORE
V_CPU_CORE
CC8
CC8
10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
BCC57
BCC57
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC17
CC17
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC24
CC24
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC30
CC30
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC28
CC28
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_SA_IO
V_SA_IO
V_CPU_CORE
1
CC9
CC9
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC13
CC13
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC18
CC18
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC25
CC25
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC31
CC31
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC29
CC29
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_CPU_COREV_CPU_COREV_CPU_CORE V_CPU_CORE V_CPU_CORE
V_CPU_COREV_CPU_COREV_CPU_CORE V_CPU_COREV_CPU_CORE
V_CPU_COREV_CPU_CORE
CC19
CC19
10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
CC26
CC26
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC32
CC32
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
outside TOP SOCKET
V_CPU_CORE
CC33
CC33
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_CPU_CORE
CC14
CC14
10UF 10V 0805 Y5V
F39
F38
F37
F36
VCCGT_SENSE 39
VSSGT_SENSE 39
10UF 10V 0805 Y5V
V_CPU_CORE
CC34
CC34
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
V_SM V_SM V_SM
CC4
CC4
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_CPU_CORE
CC35
CC35
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
BCC12
BCC12
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_CPU_CORE
CC36
CC36
10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
CC59
CC59
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_CPU_CORE
CC40
CC40
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
inside TOP SOCKET
V_GT V_GT
BCC41
BCC21
A A
5
BCC21
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_GT
CC20
CC20
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
BCC41
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_GT
BCC55
BCC55
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_GT V_GT
BCC42
BCC42
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_GT
CC50
CC50
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
4
V_GT
BCC43
BCC43
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
V_GT V_GT
CC47
BCC46
BCC46
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
CC47
22UF 6.3V X5R 0805 /NI
22UF 6.3V X5R 0805 /NI
3
V_GT
CC48
CC48
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
CC54
CC54
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
V_GT
CC49
CC49
10UF 10V 0805 Y5V /NI
10UF 10V 0805 Y5V /NI
2
◇
BIOSTAR'S
PROPRIETARY
INFORMATION
◇
Anyunauthorized
use,reproduction,
duplication,o
disclosureofthi
documentwillb
subjecttoth
applicablecivil
and/orcrimina
penalties
r
e
l
◆
.
◆
Title
Title
s
e
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CPU POWER
CPU POWER
CPU POWER
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
of
9 42Friday, January 15, 2016
of
9 42Friday, January 15, 2016
of
9 42Friday, January 15, 2016
6.0
6.0
6.0
5
https://vinafix.com
CPU1K
CPU1K
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
Rev:0.7
A11
A13
A15
A17
D D
C C
B B
A A
A24
AA3
AA33
AA8
AB39
AB5
AC3
AC33
AC34
AC35
AC6
AD1
AD33
AD36
AD37
AD38
AD39
AD4
AD40
AD6
AD7
AD8
AE3
AE33
AE36
AE5
AE8
AF1
AF33
AF36
AF37
AF40
AF5
AF8
AG1
AG2
AG3
AG33
AG36
AG4
AG5
AG8
AH33
AH36
AH37
AH38
AH39
AH40
AH5
AH8
AJ1
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AJ4
AJ5
AJ8
AK10
AK12
AK13
AK15
AK16
AK17
AK18
AK19
AK20
AK23
AK25
AK26
AK28
A7
5
Rev:0.7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
11 OF 12
11 OF 12
LGA 1151 SOCKET
LGA 1151 SOCKET
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK29
AK30
AK36
AK37
AK40
AK5
AK6
AK7
AK8
AK9
AL1
AL11
AL14
AL2
AL21
AL24
AL27
AL3
AL30
AL36
AL4
AL5
AM11
AM14
AM17
AM19
AM24
AM27
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AM37
AM38
AM39
AM40
AM5
AN1
AN10
AN11
AN14
AN16
AN19
AN22
AN23
AN24
AN27
AN30
AN36
AN4
AN5
AN6
AN7
AN8
AN9
AP11
AP14
AP24
AP27
AP30
AP36
AP37
AP40
AP5
AR1
AR11
AR14
AR16
AR17
AR18
AR19
AR2
AR20
AR21
4
CPU1L
CPU1L
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S Rev:0.7
VSS
VSS
AR3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR4
VSS
AR5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AT5
VSS
AT6
VSS
AT7
VSS
AT8
VSS
AT9
VSS
AU1
VSS
VSS
VSS
VSS
AU4
VSS
AU5
VSS
AU7
VSS
AV2
VSS
VSS
VSS
VSS
VSS
VSS
AV5
VSS
AV9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AY5
VSS
AY7
VSS
AY9
VSS
B24
VSS
B26
VSS
B28
VSS
B30
VSS
B6
VSS
C12
VSS
C14
VSS
C16
VSS
C18
VSS
C20
VSS
C22
VSS
C24
VSS
C31
VSS
C33
VSS
C35
VSS
LGA 1151 SOCKET
LGA 1151 SOCKET
SKYLAKE-S Rev:0.7
12 OF 12
12 OF 12
AR24
AR27
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT10
AT11
AT12
AT13
AT14
AT17
AT24
AT25
AT26
AT27
AT28
AT29
AT30
AT31
AT32
AT34
AT36
AT37
AT38
AT39
AT40
AU25
AU30
AU34
AV26
AV28
AV30
AV34
AV38
AW3
AW30
AW32
AW34
AW36
AW5
AW9
AY27
AY30
4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3
C37
C5
C8
C10
D24
D26
D28
D30
D37
D39
D4
D7
E11
E13
E15
E17
E19
E21
E23
E3
E31
E33
E35
E37
E6
E9
F1
F10
F22
F26
F28
F30
F4
F40
F7
G11
G13
G15
G17
G19
G22
G3
G31
G33
G6
H1
H21
H24
H26
H28
H30
H35
H37
H39
H4
H7
H9
J10
J12
L11
J16
J18
J20
J3
J32
J34
J6
K1
K14
K15
K17
K19
K22
K24
K26
K28
K30
K33
K35
K37
3
CPU1F
CPU1F
K39
K4
K7
L13
L3
L32
L6
L9
M1
M10
M12
M15
M17
M19
M21
M23
M25
M27
M29
M35
M37
M39
M4
M7
N3
N33
N6
N8
P1
P35
P37
P39
P4
R3
R33
R6
R8
T1
T35
T37
T39
T4
U3
U33
U6
V1
V35
V37
V39
V8
W3
W33
W6
Y35
Y37
Y5
A4
B38
C2
D40
LGA 1151 SOCKET
LGA 1151 SOCKET
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◇
reproduction, duplication, or
disclosure of this document
will be subject to th
applicable civil and/orcriminal
penalties
◆
Any unauthorized use,
e
.
◆
2
BIOSTAR-D
BIOSTAR-D
SKYLAKE-S
SKYLAKE-S
Rev:0.7
Rev:0.7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
6 OF 12
6 OF 12
2
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
CPU GND
CPU GND
CPU GND
IH11P-MHS
IH11P-MHS
IH11P-MHS
of
of
of
10 42Friday, January 15, 2016
10 42Friday, January 15, 2016
10 42Friday, January 15, 2016
1
6.0
6.0
6.0
5
https://vinafix.com
DIMMA1A
DIMMA1A
BIOSTAR-D
M_MAA_A[0..16]
M_MAA_A[0..16]6
D D
M_SBS_A16
M_SBS_A06
M_BG_CH0_16
M_BG_CH0_06
CK_M_CH0_1_DP6
CK_M_CH0_1_DN6
CK_M_CH0_0_DP6
CK_M_CH0_0_DN6
M_SCS_A_N16
M_SCS_A_N06
M_SCKE_A16
M_SCKE_A06
M_ODT_A16
M_ODT_A06
DDR_CH0_PAR6
DDR4_DRAMRST_N12,15
DDR_CH0_ALERT_N6
C C
DIMM1(CHANNEL-A1)
ADDRESS = 0:0:0 [SA2:SA1:SA0]
DIMM1 CH0 ADDRESS
HEX:0XA0
B B
A A
DDR_CH0_ACT_N6
SMB_DATA_MAIN12,21,33
SMB_CLK_MAIN12,21,33
M_MAA_A16
M_MAA_A15
M_MAA_A14
M_MAA_A13
M_MAA_A12
M_MAA_A11
M_MAA_A10
M_MAA_A9
M_MAA_A8
M_MAA_A7
M_MAA_A6
M_MAA_A5
M_MAA_A4
M_MAA_A3
M_MAA_A2
M_MAA_A1
M_MAA_A0
M_SBS_A1
M_SBS_A0
M_BG_CH0_1
M_BG_CH0_0
EVENT_A
VCC3_3
DIMMA_VREF_CA
234
82
86
228
232
65
210
225
66
68
211
69
213
214
71
216
72
79
224
81
207
63
218
219
74
75
235
237
93
89
84
203
60
91
87
199
54
192
47
201
56
194
49
222
58
78
208
62
284
238
140
139
285
141
146
227
205
144
230
A17_NC
A16_RAS
A15_CAS
A14_WE
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1
BA0
BG1
BG0
CK1_T
CK1_C
CK0_T
CK0_C
C_2_NC
S3_N_C_1
S2_N_C_0
S1_N
S0_N
CKE1
CKE0
ODT1
ODT0
CB7_NC
CB6_NC
CB5_NC
CB4_NC
CB3_NC
CB2_NC
CB1_NC
CB0_NC
PARITY
RESET
EVENT
ALETR
ACT
VDDSPD
SA2_RFU
SA1
SA0
SDA
SCL
VREFCA
RFU_227
RFU_205
RFU_144
NC2_SAVE
DDR4-288P-YL
DDR4-288P-YL
BIOSTAR-D
DDR IV REV:1.0
DDR IV REV:1.0
1 OF 3
1 OF 3
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
4
M_DATA_A[0..63]
M_DATA_A57
280
M_DATA_A60
135
M_DATA_A56
273
M_DATA_A58
128
M_DATA_A59
282
M_DATA_A62
137
M_DATA_A61
275
M_DATA_A63
130
M_DATA_A55
269
M_DATA_A49
124
M_DATA_A54
262
M_DATA_A52
117
M_DATA_A53
271
M_DATA_A51
126
M_DATA_A48
264
M_DATA_A50
119
M_DATA_A42
258
M_DATA_A46
113
M_DATA_A45
251
M_DATA_A40
106
M_DATA_A43
260
M_DATA_A47
115
M_DATA_A44
253
M_DATA_A41
108
M_DATA_A38
247
M_DATA_A39
102
M_DATA_A32
240
M_DATA_A33
95
M_DATA_A35
249
M_DATA_A34
104
M_DATA_A36
242
M_DATA_A37
97
M_DATA_A27
188
M_DATA_A30
43
M_DATA_A28
181
M_DATA_A25
36
M_DATA_A26
190
M_DATA_A31
45
M_DATA_A24
183
M_DATA_A29
38
M_DATA_A23
177
M_DATA_A22
32
M_DATA_A16
170
M_DATA_A20
25
M_DATA_A19
179
M_DATA_A18
34
M_DATA_A21
172
M_DATA_A17
27
M_DATA_A15
166
M_DATA_A14
21
M_DATA_A13
159
M_DATA_A8
14
M_DATA_A11
168
M_DATA_A10
23
M_DATA_A9
161
DQ9
M_DATA_A12
16
DQ8
M_DATA_A7
155
DQ7
M_DATA_A6
10
DQ6
M_DATA_A5
148
DQ5
M_DATA_A4
3
DQ4
M_DATA_A3
157
DQ3
M_DATA_A2
12
DQ2
M_DATA_A1
150
DQ1
M_DATA_A0
5
DQ0
M_DATA_A[0..63] 6
56-63 Bits
48-55 Bits
40-47 Bits
32-39 Bits
24-31 Bits
16-23 Bits
8-15 Bits
0-7 Bits
+VPP
V_SM_VTT
V_SM
VER0.60:DDR3 CHANGE DDR4(PAGE6/7/11/12)
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
1
145
3
M_DQS_A_DP[0..7]
M_DQS_A_DN[0..7]
DIMMA1B
DIMMA1B
VPP5TH
VPP4
VPP3
VPP2
VPP1
VTT2
VTT1
VDD26
VDD25
VDD24
VDD23
VDD22
VDD21
VDD20
VDD19
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD12
VDD11
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
12V3_NC_1
12V3_NC_145
DDR4-288P-YL
DDR4-288P-YL
DIMMA1C
DIMMA1C
138
VSS
136
VSS
134
VSS
131
VSS
129
VSS
127
VSS
125
VSS
123
VSS
120
VSS
118
VSS
116
VSS
114
VSS
112
VSS
109
VSS
107
VSS
105
VSS
103
VSS
101
VSS
98
VSS
96
VSS
94
VSS
57
VSS
55
VSS
53
VSS
50
VSS
48
VSS
46
VSS
44
VSS
42
VSS
39
VSS
37
VSS
35
VSS
33
VSS
31
VSS
28
VSS
26
VSS
24
VSS
22
VSS
20
VSS
17
VSS
15
VSS
13
VSS
11
VSS
9
VSS
6
VSS
4
VSS
2
VSS
DDR4-288P-YL
DDR4-288P-YL
EVENT_A
BIOSTAR-D
BIOSTAR-D
DDR IV REV:1.0
DDR IV REV:1.0
2 of 3
2 of 3
BIOSTAR-D
BIOSTAR-D
DDR IV
DDR IV
REV:1.0
REV:1.0
3 of 3
3 of 3
M_DQS_A_DP[0..7] 6
M_DQS_A_DN[0..7] 6
MR40 240 1% 0402MR40 240 1% 0402
DQS17_T
DQS17_C
DQS16_T
DQS16_C
DQS15_T
DQS15_C
DQS14_T
DQS14_C
DQS13_T
DQS13_C
DQS12_T
DQS12_C
DQS11_T
DQS11_C
DQS10_T
DQS10_C
DQS9_T
DQS9_C
DQS8_T
DQS8_C
DQS7_T
DQS7_C
DQS6_T
DQS6_C
DQS5_T
DQS5_C
DQS4_T
DQS4_C
DQS3_T
DQS3_C
DQS2_T
DQS2_C
DQS1_T
DQS1_C
DQS0_T
DQS0_C
283
VSS
281
VSS
279
VSS
276
VSS
274
VSS
272
VSS
270
VSS
268
VSS
265
VSS
263
VSS
261
VSS
259
VSS
257
VSS
254
VSS
252
VSS
250
VSS
248
VSS
246
VSS
243
VSS
241
VSS
239
VSS
202
VSS
200
VSS
198
VSS
195
VSS
193
VSS
191
VSS
189
VSS
187
VSS
184
VSS
182
VSS
180
VSS
178
VSS
176
VSS
173
VSS
171
VSS
169
VSS
167
VSS
165
VSS
162
VSS
160
VSS
158
VSS
156
VSS
154
VSS
151
VSS
149
VSS
147
VSS
51
52
132
133
121
122
110
111
99
100
40
41
29
30
18
19
7
8
197
196
278
277
267
266
256
255
245
244
186
185
175
174
164
163
153
152
V_SM
M_DQS_A_DP7
M_DQS_A_DN7
M_DQS_A_DP6
M_DQS_A_DN6
M_DQS_A_DP5
M_DQS_A_DN5
M_DQS_A_DP4
M_DQS_A_DN4
M_DQS_A_DP3
M_DQS_A_DN3
M_DQS_A_DP2
M_DQS_A_DN2
M_DQS_A_DP1
M_DQS_A_DN1
M_DQS_A_DP0
M_DQS_A_DN0
V_SM
2
V_SM
DRAM_RST_N12,15
MR59
MR59
1K 1% 0402
1K 1% 0402
DIMMA_VREF_CA
MR60
MR60
1K 1% 0402
1K 1% 0402
R4
V_SM
VER0.65:DDR4_DRAMRST_N BY PETER(PAGE11)
MR4
MR4
470 1% 0402
470 1% 0402
MR6
MR6
10K 0402 /NI
10K 0402 /NI
R3
FOR LPT-H: ADD U1,R3;NI R4
FOR SPT-H: DO THE REVERSE
V_SM
MR61 0 0402MR61 0 0402
MC46
MC46
1UF 6.3V X5R 0402
1UF 6.3V X5R 0402
DDR4_DRAMRST_N 12,15
DDR4_DRAMRST_N
VCC3_3
MC5 1UF 6.3V X5R 0402MC5 1UF 6.3V X5R 0402
MC6 1UF 6.3V X5R 0402MC6 1UF 6.3V X5R 0402
MC7 1UF 6.3V X5R 0402MC7 1UF 6.3V X5R 0402
MC8 1UF 6.3V X5R 0402MC8 1UF 6.3V X5R 0402
MC34 1UF 6.3V X5R 0402MC34 1UF 6.3V X5R 0402
MC35 1UF 6.3V X5R 0402MC35 1UF 6.3V X5R 0402
MC36 1UF 6.3V X5R 0402MC36 1UF 6.3V X5R 0402
MC21 1UF 6.3V X5R 0402MC21 1UF 6.3V X5R 0402
1
CPU_VREF_DIMMA 7
CC44
CC44
22NF 16V X7R 0402
22NF 16V X7R 0402
CR64
CR64
24.9 1% 0402
24.9 1% 0402
離所有訊號遠一點
MC47 0.1UF 16V Y5V 0402MC47 0.1UF 16V Y5V 0402
+VPP
V_SM_VTT
MC30 10UF 6.3V X5RMC30 10UF 6.3V X5R
MC24 10UF 6.3V X5RMC24 10UF 6.3V X5R
MC27 0.1UF 16V Y5V 0402MC27 0.1UF 16V Y5V 0402
MC29 0.1UF 16V Y5V 0402MC29 0.1UF 16V Y5V 0402
MC45 0.1UF 16V Y5V 0402MC45 0.1UF 16V Y5V 0402
MC37 10UF 6.3V X5RMC37 10UF 6.3V X5R
MC33 1UF 6.3V X5R 0402MC33 1UF 6.3V X5R 0402
MC28 0.1UF 16V Y5V 0402MC28 0.1UF 16V Y5V 0402
5
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◆
Any unauthorized use,
◇
reproduction,duplication,or
disclosure of this document wil
be subject to the applicable civi
and/orcriminal penalties.
4
3
2
◆
Title
Title
Title
l
l
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR3L DIMMA1
DDR3L DIMMA1
DDR3L DIMMA1
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
6.0
6.0
6.0
of
of
of
11 42Friday, January 15, 2016
11 42Friday, January 15, 2016
11 42Friday, January 15, 2016
5
https://vinafix.com
DIMMB1A
DIMMB1A
BIOSTAR-D
234
82
86
228
232
65
210
225
66
68
211
69
213
214
71
216
72
79
224
81
207
63
218
219
74
75
235
237
93
89
84
203
60
91
87
199
54
192
47
201
56
194
49
222
58
78
208
62
284
238
140
139
285
141
146
227
205
144
230
A17_NC
A16_RAS
A15_CAS
A14_WE
A13
A12
A11
A10_AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1
BA0
BG1
BG0
CK1_T
CK1_C
CK0_T
CK0_C
C_2_NC
S3_N_C_1
S2_N_C_0
S1_N
S0_N
CKE1
CKE0
ODT1
ODT0
CB7_NC
CB6_NC
CB5_NC
CB4_NC
CB3_NC
CB2_NC
CB1_NC
CB0_NC
PARITY
RESET
EVENT
ALETR
ACT
VDDSPD
SA2_RFU
SA1
SA0
SDA
SCL
VREFCA
RFU_227
RFU_205
RFU_144
NC2_SAVE
DDR4-288P-YL
DDR4-288P-YL
BIOSTAR-D
DDR IV REV:1.0
DDR IV REV:1.0
1 OF 3
1 OF 3
DDR4_DRAMRST_N11,15
DDR_CH1_ALERT_N7
DDR_CH1_ACT_N7
CK_M_CH1_1_DP7
CK_M_CH1_1_DN7
CK_M_CH1_0_DP7
CK_M_CH1_0_DN7
M_SCS_B_N17
M_SCS_B_N07
M_SCKE_B17
M_SCKE_B07
DDR_CH1_PAR7
SMB_DATA_MAIN11,21,33
SMB_CLK_MAIN11,21,33
M_MAA_B[0..16]
M_SBS_B17
M_SBS_B07
M_BG_CH1_17
M_BG_CH1_07
M_ODT_B17
M_ODT_B07
M_MAA_B16
M_MAA_B15
M_MAA_B14
M_MAA_B13
M_MAA_B12
M_MAA_B11
M_MAA_B10
M_MAA_B9
M_MAA_B8
M_MAA_B7
M_MAA_B6
M_MAA_B5
M_MAA_B4
M_MAA_B3
M_MAA_B2
M_MAA_B1
M_MAA_B0
M_SBS_B1
M_BG_CH1_1
EVENT_B
VCC3_3
DIMMB_VREF_CA
M_MAA_B[0..16]7
D D
C C
DIMM3(CHANNEL-B1)
ADDRESS = 0:1:0 [SA2:SA1:SA0]
DIMM1 CH0 ADDRESS
HEX:0XA4
DQ63
DQ62
DQ61
DQ60
DQ59
DQ58
DQ57
DQ56
DQ55
DQ54
DQ53
DQ52
DQ51
DQ50
DQ49
DQ48
DQ47
DQ46
DQ45
DQ44
DQ43
DQ42
DQ41
DQ40
DQ39
DQ38
DQ37
DQ36
DQ35
DQ34
DQ33
DQ32
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
4
V_SM_VTT
MC32 10UF 6.3V X5RMC32 10UF 6.3V X5R
MC31 1UF 6.3V X5R 0402MC31 1UF 6.3V X5R 0402
M_DATA_B[0..63]
M_DATA_B58
280
M_DATA_B63
135
M_DATA_B57
273
M_DATA_B60
128
M_DATA_B62
282
M_DATA_B59
137
M_DATA_B61
275
M_DATA_B56
130
M_DATA_B55
269
M_DATA_B54
124
M_DATA_B52
262
M_DATA_B48
117
M_DATA_B51
271
M_DATA_B50
126
M_DATA_B53
264
M_DATA_B49
119
M_DATA_B42
258
M_DATA_B46
113
M_DATA_B41
251
M_DATA_B40M_SBS_B0
106
M_DATA_B47
260
M_DATA_B43M_BG_CH1_0
115
M_DATA_B44
253
M_DATA_B45
108
M_DATA_B38
247
M_DATA_B34
102
M_DATA_B36
240
M_DATA_B37
95
M_DATA_B39
249
M_DATA_B35
104
M_DATA_B33
242
M_DATA_B32
97
M_DATA_B26
188
M_DATA_B31
43
M_DATA_B29
181
M_DATA_B24
36
M_DATA_B27
190
M_DATA_B30
45
M_DATA_B28
183
M_DATA_B25
38
M_DATA_B19
177
M_DATA_B18
32
M_DATA_B17
170
M_DATA_B16
25
M_DATA_B23
179
M_DATA_B22
34
M_DATA_B21
172
M_DATA_B20
27
M_DATA_B10
166
M_DATA_B11
21
M_DATA_B13
159
M_DATA_B12
14
M_DATA_B15
168
M_DATA_B14
23
M_DATA_B9
161
DQ9
M_DATA_B8
16
DQ8
M_DATA_B2
155
DQ7
M_DATA_B6
10
DQ6
M_DATA_B1
148
DQ5
M_DATA_B0
3
DQ4
M_DATA_B3
157
DQ3
M_DATA_B7
12
DQ2
M_DATA_B4
150
DQ1
M_DATA_B5
5
DQ0
M_DATA_B[0..63] 7
56-63 Bits
48-55 Bits
40-47 Bits
32-39 Bits
24-31 Bits
16-23 Bits
8-15 Bits
0-7 Bits
V_SM_VTT
3
M_DQS_B_DP[0..7]
M_DQS_B_DN[0..7]
+VPP V_SM
V_SM
V_SM
288
287
286
143
142
221
77
236
233
231
229
226
223
220
217
215
212
209
206
204
92
90
88
85
83
80
76
73
70
67
64
61
59
145
VER0.60:DDR3 CHANGE DDR4(PAGE6/7/11/12)
MR34
MR34
1K 1% 0402
1K 1% 0402
DIMMB_VREF_CA
MR31
MR31
1K 1% 0402
1K 1% 0402
DIMMB1B
DIMMB1B
VPP5TH
VPP4
VPP3
VPP2
VPP1
VTT2
VTT1
VDD26
VDD25
VDD24
VDD23
VDD22
VDD21
VDD20
VDD19
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD12
VDD11
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
1
12V3_NC_1
12V3_NC_145
DDR4-288P-YL
DDR4-288P-YL
EVENT_B
MR35 0 0402MR35 0 0402
MC3
MC3
1UF 6.3V X5R 0402
1UF 6.3V X5R 0402
M_DQS_B_DP[0..7] 7
M_DQS_B_DN[0..7] 7
BIOSTAR-D
BIOSTAR-D
DDR IV REV:1.0
DDR IV REV:1.0
2 of 3
2 of 3
MR39 240 1% 0402MR39 240 1% 0402
CPU_VREF_DIMMB 7
MC22
MC22
22NF 16V X7R 0402
22NF 16V X7R 0402
MR38
MR38
24.9 1% 0402
24.9 1% 0402
DQS17_T
DQS17_C
DQS16_T
DQS16_C
DQS15_T
DQS15_C
DQS14_T
DQS14_C
DQS13_T
DQS13_C
DQS12_T
DQS12_C
DQS11_T
DQS11_C
DQS10_T
DQS10_C
DQS9_T
DQS9_C
DQS8_T
DQS8_C
DQS7_T
DQS7_C
DQS6_T
DQS6_C
DQS5_T
DQS5_C
DQS4_T
DQS4_C
DQS3_T
DQS3_C
DQS2_T
DQS2_C
DQS1_T
DQS1_C
DQS0_T
DQS0_C
51
52
132
133
121
122
110
111
99
100
40
41
29
30
18
19
7
8
197
196
278
277
267
266
256
255
245
244
186
185
175
174
164
163
153
152
V_SM
M_DQS_B_DP7
M_DQS_B_DN7
M_DQS_B_DP6
M_DQS_B_DN6
M_DQS_B_DP5
M_DQS_B_DN5
M_DQS_B_DP4
M_DQS_B_DN4
M_DQS_B_DP3
M_DQS_B_DN3
M_DQS_B_DP2
M_DQS_B_DN2
M_DQS_B_DP1
M_DQS_B_DN1
M_DQS_B_DP0
M_DQS_B_DN0
2
V_SM
2015-08-12
Ver: 0.6
MC18 1UF 6.3V X5R 0402MC18 1UF 6.3V X5R 0402
MC38 1UF 6.3V X5R 0402MC38 1UF 6.3V X5R 0402
MC39 1UF 6.3V X5R 0402MC39 1UF 6.3V X5R 0402
MC40 1UF 6.3V X5R 0402MC40 1UF 6.3V X5R 0402
MC23 1UF 6.3V X5R 0402MC23 1UF 6.3V X5R 0402
MC25 1UF 6.3V X5R 0402MC25 1UF 6.3V X5R 0402
MC41 1UF 6.3V X5R 0402MC41 1UF 6.3V X5R 0402
MC43 1UF 6.3V X5R 0402MC43 1UF 6.3V X5R 0402
MC44 1UF 6.3V X5R 0402MC44 1UF 6.3V X5R 0402
MC26 1UF 6.3V X5R 0402MC26 1UF 6.3V X5R 0402
1
DIMMB1C
DIMMB1C
BIOSTAR-D
BIOSTAR-D
DDR IV
DDR IV
REV:1.0
REV:1.0
138
VSS
136
VSS
B B
A A
5
4
134
131
129
127
125
123
120
118
116
114
112
109
107
105
103
101
98
96
94
57
55
53
50
48
46
44
42
39
37
35
33
31
28
26
24
22
20
17
15
13
11
9
6
4
2
3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DDR4-288P-YL
DDR4-288P-YL
3 of 3
3 of 3
283
VSS
281
VSS
279
VSS
276
VSS
274
VSS
272
VSS
270
VSS
268
VSS
265
VSS
263
VSS
261
VSS
259
VSS
257
VSS
254
VSS
252
VSS
250
VSS
248
VSS
246
VSS
243
VSS
241
VSS
239
VSS
202
VSS
200
VSS
198
VSS
195
VSS
193
VSS
191
VSS
189
VSS
187
VSS
184
VSS
182
VSS
180
VSS
178
VSS
176
VSS
173
VSS
171
VSS
169
VSS
167
VSS
165
VSS
162
VSS
160
VSS
158
VSS
156
VSS
154
VSS
151
VSS
149
VSS
147
VSS
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◆
Any unauthorized use, reproduction,
◇
duplication, or disclosure of this document
will be subject to the applicable civil
and/orcriminal penalties.
◆
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR3L DIMMB1
DDR3L DIMMB1
DDR3L DIMMB1
IH11P-MHS
IH11P-MHS
IH11P-MHS
1
12 42Friday, January 15, 2016
12 42Friday, January 15, 2016
12 42Friday, January 15, 2016
of
of
of
6.0
6.0
6.0
5
Vinafix.com
https://vinafix.com
4
3
2
1
PCH PART: Y+Reference
D D
?
PCIe/USB 3
PCIe/USB 3
?
AF5
USB2N_1
AG7
USB2P_1
AD5
USB2N_2
AD7
USB2P_2
AG8
USB2N_3
AG10
USB2P_3
AE1
DMI
DMI
USB 2.0
USB 2.0
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
2 OF 12
2 OF 12
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
AD43
AD42
AD39
AC44
Y43
Y41
W44
W43
AG3
AD10
AB13
AG2
BD14
3
USB_OC0_R_N
USB_OC1_R_N
USB_OC2_R_N
USB_OC3_R_N
USB_OC4_R_N
USB_OC5_R_N
USB_OC6_R_N
USB_OC7_R_N
USB2_COMP
USB2_VBUSEN
USB2_ID
USB_D1- 25
USB_D1+ 25
USB_D2- 25
USB_D2+ 25
USB_D3- 26
USB_D3+ 26
USB_D4- 26
USB_D4+ 26
USB_D5- 26
USB_D5+ 26
USB_D6- 26
USB_D6+ 26
USB_D7- 26
USB_D7+ 26
USB_D8- 26
USB_D8+ 26
USB_D9- 25
USB_D9+ 25
USB_D10- 25
USB_D10+ 25
YR2 140 1% 0402YR2 140 1% 0402
YR3 1K 1% 0402YR3 1K 1% 0402
YR4 1K 1% 0402YR4 1K 1% 0402
USB_OC0_R_N
USB_OC1_R_N
USB_OC2_R_N
USB_OC3_R_N
USB_OC5_R_N
USB_OC4_R_N
USB_OC6_R_N
USB_OC7_R_N
R_USB3.0
F_USB3.0
F_USB2.0
F_USB2.0
R_USB3.0
H110 N/A
H170 only
YRN1
YRN1
8.2K 8P4R 0402
8.2K 8P4R 0402
12
34
56
78
YRN2
YRN2
8.2K 8P4R 0402
8.2K 8P4R 0402
12
34
56
78
+3V3_DUAL
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH DMI/PCIE/USB
PCH DMI/PCIE/USB
PCH DMI/PCIE/USB
IH11P-MHS
IH11P-MHS
IH11P-MHS
13 42Friday, January 15, 2016
13 42Friday, January 15, 2016
13 42Friday, January 15, 2016
1
6.0
6.0
6.0
of
of
of
PCH1B
PCH1B
DMI_MT_IR_0_DN5
DMI_MT_IR_0_DP5
DMI_IT_MR_0_DN5
DMI_IT_MR_0_DP5
DMI_MT_IR_1_DN5
DMI_MT_IR_1_DP5
DMI_IT_MR_1_DN5
DMI_IT_MR_1_DP5
DMI_MT_IR_2_DN5
DMI_MT_IR_2_DP5
DMI_IT_MR_2_DN5
DMI_IT_MR_2_DP5
DMI_MT_IR_3_DN5
DMI_MT_IR_3_DP5
DMI_IT_MR_3_DN5
C C
PCIE_RCOMP
W/S=4/12 mils
Max Lenght NA
DMI_IT_MR_3_DP5
YR1
YR1
100 1% 0402
100 1% 0402
PCIE_RCOMPN
PCIE_RCOMPP
USB3.0 : H110 N/A
B150 N/A
USB3.0 : H110 N/A
B150 N/A
GBEB_RXN27
GBEB_RXP27
B B
GBE
SLOT 1
SLOT 2
A A
GBEB_TXN27
GBEB_TXP27
PCIE5_RXN20
PCIE5_RXP20
PCIE5_TXN20
PCIE5_TXP20
PCIE6_RXN20
PCIE6_RXP20
PCIE6_TXN20
PCIE6_TXP20
5
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SUNRISEPOINT-H110
SUNRISEPOINT-H110
4
5
https://vinafix.com
4
3
2
1
PCH PART: Y+Reference
PCH1C
PCH1C
AV2
D D
VCC3_3
C C
SATA0_GP
SATA1_GP
B B
BOARD ID(111)
YR5
YR5
10K 0402
10K 0402
YR7
YR7
10K 0402 /NI
10K 0402 /NI
YR9
YR9
10K 0402
10K 0402
YR17
YR17
10K 0402 /NI
10K 0402 /NI
YR10 8.2K 0402YR10 8.2K 0402
YR11 8.2K 0402YR11 8.2K 0402
YR6
YR6
10K 0402
10K 0402
GPP_F11
GPP_F12
GPP_F13
YR8
YR8
10K 0402 /NI
10K 0402 /NI
VCC3_3
GPP_F11
GPP_F13
GPP_F12
SATA_TXN124
SATA_TXP124
SATA_RXN124
SATA_RXP124
SATA_TXN024
SATA_TXP024
SATA_RXN024
SATA_RXP024
Table 51-38
GbE can be mapped into one of the PCIe Ports 4-5, Port 9, and Ports 12-13.
PCH_PECI
YR16 1K 0402YR16 1K 0402
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP
K44
PCIE20_TXN
N38
PCIE20_RXP
N39
PCIE20_RXN
H44
PCIE19_TXP
H43
PCIE19_TXN
L39
PCIE19_RXP
L37
PCIE19_RXN
SUNRISEPOINT-H110
SUNRISEPOINT-H110
CLINK
CLINK
FAN
FAN
3 OF 12
3 OF 12
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIe/SATA
PCIe/SATA
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
HOST
HOST
GPP_F19/EDP_VDDEN
PLTRST_CPU#
THERMTRIP#
PECI
PM_SYNC
PM_DOWN
G31
H31
C31
B31
G29
E29
C32
B32
F41
E41
B39
A39
D43
E42
A41
A40
H42
H40
E45
F45
K37
G37
G45
G44
PCH_SATA_LED_N
AD44
SATA0_GP
AG36
SATA1_GP
AG35
AG39
VER0.60:REMOVE SATA EXPRESS CONN(PAGE14/16/17/24)
AD35
AD31
Unused SATAGP[5:0] pins can be left as no connect and need to be
AD38
default to GPIO functionality.
AC43
AB44
W36
W35
W42
PCH_THERMTRIP_R_N
AJ3
PCH_PECI
AL3
H_PM_SYNC_R
AJ4
PLTRST_CPU_N
AK2
H_PM_DOWN
AH2
SATA_RXN2 24
SATA_RXP2 24
SATA_TXN2 24
SATA_TXP2 24
SATA_RXN3 24
SATA_RXP3 24
SATA_TXN3 24
SATA_TXP3 24
PCH_SATA_LED_N 36
YR102 562 1% 0402YR102 562 1% 0402
YR101 33 0402YR101 33 0402
SATA 2/3
SATA 4/5
SATA : H110 N/A
PCH_THERMTRIP_N 8
PCH_PECI 8
H_PM_SYNC_0 8
PLTRST_CPU_N 8
H_PM_DOWN 8
A A
5
4
3
BIOSTAR'S PROPRIETARY
◇
INFORMATION
◇
duplication, or disclosure of this document
will be subject to the applicable civil
and/orcriminal penalties.
◆
Any unauthorized use, reproduction,
◆
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH CLINK/SATA/CPU HOST
PCH CLINK/SATA/CPU HOST
PCH CLINK/SATA/CPU HOST
B
B
B
IH11P-MHS
IH11P-MHS
IH11P-MHS
6.0
6.0
6.0
of
of
of
14 42Friday, January 15, 2016
14 42Friday, January 15, 2016
14 42Friday, January 15, 2016
1
Loading...