5
hexainf@hotmail.com
4
3
2
1
PCB STACK UP
LAYER 1 : TOP
LAYER 2 : SGND1
LAYER 3 : IN1
LAYER 4 : IN2
LAYER 5 : SVCC
D D
LAYER 6 : IN3
PCI DEVICES IRQ ROUTING
IDSEL#
PCI8402 INT A/B/E#
AD25 REQ0# / GNT0#
InterruptsPCI DEVICE REQ# / GNT#
LAYER 7 : SGND2
LAYER 8 : BOT
CPU CORE SC452
PAG 38
CH3 BLOCK DIAGRAM
CPU
Merom
479P (uPGA)/35W
PAG 3,4
CPU THERMAL
SENSOR
PAG 5
CLK_CPU_BCLK,CLK_CPU_BCLK#
CLK_MCH_BCLK,CLK_MCH_BCLK#
DREFCLK,DREFCLK#
DREFSSCLK,DREFSSCLK#
01
14.318MHz
CLOCK GEN
ICS9LPRS363AGLFT
64pinsTSSOP
PAG 2
VGACORE(1.025V)MAX1993
INT-VGACORE MAX8776
VCCP +1.5V AND GMCH
1.05V(TPS51124)
C C
SYSTEM POWER MAX8734
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116)
SYSTEM CHARGER(MAX8724)
Voltage Rails
B B
VCC_CORE
VCCP
SMDDR_VTERM
VGACORE
VGA1.2
RVCC3
VCC1.25
VCC1.5
VCC1.8
VCC2.5
VCC3
VCC5
A A
1.8VSUS
3VSUS
5VSUS
3VPCU
5VPCU
15VPCU
PAG 39
PAG 40
PAG 41
PAG 42
PAG 43
PAG 45,46
DDRII-SODIMM1
DDRII-SODIMM2
SATA - HDD
PATA-
USB2.0 I/O Ports
Voltage Rails
ON S0~S2 Ctl Signal
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ON S3 ON S4 ON S5
X
X
X
X
X
X
5
VR_ON
MAINON
MAINON
MAINON
MAINON
XX
X
X
X
RVCCD
MAINON
MAINON
MAIND
MAINON
MAIND
MAIND
SUSON
SUSD
SUSD
8734LDO5
X
8734LDO5
X
5VPCU
X
PAG 12,13
PAG 12,13
PAG 33
CD-ROM
PAG 33
Bluetooth
Camera
Mini_PCI_E
Express Card
4
DDRII 533,667 MHz
DDRII 533,667 MHz
SATA0 150MB
(66/100/133)
PATA
0,1,2,3
X4
4
6
7
9
Keyboard
Touch Pad
PAG 29
USB2.0
NORTH BRIDGE
Crestline
Santa Rosa
PAG 5,6,7,8,9,10,11
SOUTH BRIDGE
PC87541
PAGE 37
FAN
3
DMI LINK
ICH-8M
PAG 20,21,22,23
LPC
BIOS
PAG 37PAG 30
PCI-Express 16X
PCI BUS / 33MHz
PCI-E
Azalia
ALC262
Audio Jack
PAG 35
Audio
Amplifier
SPEAKER
PAG 34,35
MODEM RJ 11
2
NVDIA NB8P
PAG 14,15,16,17,18,19,20
PCI8402
PAG 26~28
14 26
Mini PCI-E
Card
WLAN
PAG 31 PAG 32
MDC
PAG 34PAG 35
PAG 35PAG 35
Mini PCI-E
Card
Robson
PAG 31
Size Document Number Re v
BLOCK DIAGRAM
Date: Sheet
DDR3 X 4
PAG 18,19
LCD CON
PAG 25
CRT PORT
PAG 24
HDMI CON
PAG 36
NBSRCCLK, NBSRCCLK#
IEEE1394
PAG 26
Memory
CardReader
PAG 27
LAN
Marvell
PCIE-LAN
M8055
RJ45
PAG 32
Express
Card
PAG 28
PROJECT : CH3
Quanta Computer Inc.
146Tuesday, February 06, 2007
1
of
1A
1
2
3
4
5
6
7
8
VCC3
L16
1 2
BLM21PG600SN1D
C895
3.3N/50V
A A
Add 3.3N CAP for EMI suggestion
Nicole 12/11
VCC3
VCC3
Add 3.3N CAP for EMI suggestion
B B
Nicole 12/11
L17
1 2
BLM21PG600SN1D
L19
1 2
BLM21PG600SN1D
C896
3.3N/50V
PDAT_SMB13,22,28,31
PCLK_SMB13,22,28,31
12
C96
10U_0805
12
12
C101
10U_0805
C132
0.1U/10V
12
C97
10U_0805
Q6
2N7002E
3
Q5
2N7002E
3
12
12
C134
0.1U/10V
VCC3
VCC3
C159
0.1U/10V
12
C113
0.1U/10V
VDDA
R59
2
2
10K
1
1
12
C157
0.1U/10V
VDDCPU
VDDA
12
VDDCPU
R57
10K
CGDAT_SMB
CGCLK_SMB
C156
0.1U/10V
12
C154
0.1U/10V
CLKUSB_4822
CLK_3.3V
14M_ICH22
PM_STPCPU#22
PM_STPPCI#22
12
DREFCLK6
DREFCLK#6
C158
0.1U/10V
CK_PWG22
CLK_3.3V
12
12
CLKUSB_48
CLK_BSEL0
14M_ICH
VCC3
C133
C160
0.1U/10V
0.1U/10V
VCC3
R459
*10K/F
VCC3
R60 1K/F_4
R58 348_6
RP46 *I@4P2R-S-33
1
3
R460
*10K/F
R107 33_4
R106 2.2K/F_4
R95 10K/F_4
R461 10K/F_4
R462 33_4
2
4
(96MHz)
CPU Clock select
C C
D D
CPU_BSEL03
VCC3
BSEL2 BSEL1 BSEL0 CPU
0
0
0
0
0
*
0
1
1
0
1
011
1
1
1
1
1
FSAFSBFSC
0
1
0
1
0
0
1
R109 0
R108 *56
R105 *1K
SRC
266.66
100
133.33
100
100
200.00
166.66
100
333.33
100
100.00
100
400.00
100
200.00 100 33.33
2
CLK_BSEL0CPU_BSEL0
R110 0
PCI
REF
USB48DOT
33.33
14.318
33.33 14.318 48 96
33.33 14.318 48 96
33.33 14.318 48 96
33.33 14.318 48 96
33.33 14.318 48 96
33.33 14.318 48 96
14.318 48 96
96
Spread
%
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
0.5 Down
3
MCH_BSEL0 6
R_PCLK_DEBUG
R_PCLK_541
Update for Robson CLKREQ#
nicole 9/20
R_PCLK_ICH
SELPCIEX0_LCD#
Pin64
PCIEXCLK
0
PEREQ#
1
*
PCIE_REQ1#
PCIE_REQ2#
Pin8
*
PCIE_L0
PCIE_L1
PCIE_L2PCIE_REQ3#
PCIE_L3
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
4
BG614318F84
XTL-5_3X3_2-3_8-1_2H
21
CLK_XIN
CLK_XOUT
CGCLK_SMB
CGDAT_SMB
CLK_BSEL1
CLK_BSEL2
96/100M
SRC Pair
CLK_XIN
Y3
14.318MHZ/20P
CLK_XOUT
58
57
62
63
54
55
12
16
61
60
1
7
11
56
21
28
42
50
47
45
10
14
15
34
37
2
6
13
29
53
59
46
internal bu ild-in 33ohm
damping resisteor
U19
X1
ICS9PR363DGLF
X2
CPU_STOP#
PCI/PCIEX_STOP#
SCLK
SDATA
FSA/USB_48MHZ
FSB/TEST_MODE
FSC/REF1/TEST_SEL
REF0
VDDPCI
VDDPC1
VDD48
VDDREF
VDDPCIEX
VDDPCIEX
VDDPCIEX
VDDCPU
VREF
VDDA
VTTPWR_GD/PD#
PCIET_L9/DOTT_96MHZ
PCIEC_L9/DOTC_96MHZL
*PWRSAVE#
GND
GND
GND
GND
GND
GND
GND
GNDA
VCC3
LATCH SELECT TABLE
Pin5 Pin9
*
CPUT_L0
CPUC_L0
CPUT_L1F
CPUC_L1F
CPUITPT_L2/PCIET_L8
CPUITPC_L2/PCIEC_L8
27FIX/LCD_SSCGT/PCIET_L0
27SS/LCD_SSCGC/PCIEC_L0
SATACLKT_L
SATACLKC_L
PCIET_L1
PCIEC_L1
PCIET_L2
PCIEC_L2
PCIET_L3
PCIEC_L3
PCIET_L4
PCIEC_L4
PCIET_L5
PCIEC_L5
PCIET_L6
PCIEC_L6
PEREQ1#/PCIET_L7
PEREQ2#/PCIEC_L7
*PEREQ3#
*PEREQ4#
**REQ_SEL/PCICLK0
PCICLK1
*SELPCIEX0_LCD#/PCICLK3
*SELLCD_27#/PCICLK_F5
0
0
PCICLK2
ITP_EN/PCICLK_F4
* Internal pull up to VDD
**Internal pull down to GND
PWRSAVE#
PCIE_REQ2#
PCIE_REQ3#
PCIE_REQ4#
0
1
1x
PN change from B version to D version
nicole 12/01
RHCLK_CPU
52
RHCLK_CPU#
51
RHCLK_MCH
49
RHCLK_MCH#
48
RSRC_RB
44
RSRC_RB#
43
R_DREFSSCLK
17
R_DREFSSCLK#
18
RSRC_SATA
26
RSRC_SATA#
27
R_CLK_PCIE_VGA
19
R_CLK_PCIE_VGA#
20
CLK_PCIE_NEW
22
CLK_PCIE_NEW#
23
RSRC_ICH
24
RSRC_ICH#
25
CLK_PCIE_MINI_
30
CLK_PCIE_MINI_#
31
RSRC_MCH
36
RSRC_MCH#
35
RSRC1_LAN
39
RSRC1_LAN#
38
41
40
32
33
R_PCLK_DEBUG
64
R_PCI_CLK_8402
3
4
SELPCIEX0_LCD#
5
R_PCLK_ICH PCLK_ICH
8
R_PCLK_541 PCLK_541
9
R71 *10K_4
R457 10K_4
R92 10K_4
R69 10K_4
RP1
RP2 4P2R-S-33
RP5 4P2R-S-33
RP45 *I@4P2R-S-33
RP42 4P2R-S-33
RP44 4P2R-S-33
RP40 4P2R-S-33
RP43 4P2R-S-33
RP41 4P2R-S-33
RP3 4P2R-S-33
RP4 4P2R-S-33
R_PCIE_REQ 2#
R_PCIE_REQ 3#
R_PCIE_REQ 4#
R68 475/F_4
R474 475/F_4
R65 475/F_4
R66 33_4
R475 33_4
R94 33_4
R103 33_4
VCC3
Pin17/18Pin14/15
PCIEX9
PCIEX9
DOT96
27MHz
LCD
PCIEX0
4
2
4
2
4
2
2
4
2
4
2
4
2
4
2
4
2
4
4
2
4
2
4P2R-S-33
3
1
3
1
3
1
1
3
1
3
1
3
1
3
1
3
1
3
3
1
3
1
PCLK_DEBUG
PCI_CLK_8402
14M_ICH
PCLK_DEBUG
CLKUSB_48
PCLK_541
PCLK_ICH
PCI_CLK_8402
REQ2#
REQ3#
REQ4#
C662 30P
C664 30P
CLK_3.3V
VDDCPU
VDDA
R_DREFCLK
R_DREFCLK#
PWRSAVE#
R67 10K_4
R96 10K_4 C115 15P
R476 10K_4
R477 *10K_4
0
1 CPUITP Pair
PCIE_L6
PCIE_L8
PCIE_L4
PCIE_L7PCIE_REQ4# PCIE_L5
Size Document Number Re v
CLOCK GENERATOR
5
6
Date: Sheet
7
PROJECT : CH3
Quanta Computer Inc.
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_PCIE_MINI_RB 31
CLK_PCIE_MINI_RB# 31
DREFSSCLK 6
DREFSSCLK# 6
CLK_PCIE_SATA 20
CLK_PCIE_SATA# 20
CLK_PCIE_VGA 14
CLK_PCIE_VGA# 14
CLK_PCIE_NEW_C 28
CLK_PCIE_NEW_C# 28
CLK_PCIE_ICH 21
CLK_PCIE_ICH# 21
CLK_PCIE_MINI_WLAN 31
CLK_PCIE_MINI_WLAN# 31
CLK_PCIE_3GPLL 6
CLK_PCIE_3GPLL# 6
CLK_PCIE_LAN 32
CLK_PCIE_LAN# 32
PCIE_REQ2# 31
PCIE_REQ3# 28
PCIE_REQ4# 6
PCI_CLK_8402 26
PCLK_ICH 21
PCLK_541 36
C657 15P
C689 15P
C192 15P
C193 15P
C688 15P
used for ROBSON
used for NEWCARD
used for GMCH
PCLK_DEBUG 31
246Tuesday, February 06, 2007
8
02
1A
of
14.318MHz
1
hexainf@hotmail.com
2
3
4
5
6
7
8
03
H_A#[3..16]5
A A
H_ADSTB#05
H_REQ#[0..4]5
H_A#[17..35]5
B B
H_ADSTB#15
H_A20M#20
H_FERR#20
H_IGNNE#20
H_STPCLK#20
H_INTR20
H_NMI20
H_SMI#20
C C
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
ITP PU
ITP_DBRESET#
ITP_TMS
ITP_TDI
ITP_BPM#5
ITP_TCK
ITP_TRST#
R61 *54.9/F_4
R23 39/F_4 R468
R28 150/F_4
R26 54.9/F_4
R22 27/F
R24 680/F_4
12
VCCP
U17A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
D22
RSVD[08]
D3
RSVD[09]
F6
RSVD[10]
Merom Ball-out Rev 1a
DEFER#
CONTROL
RESET#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
XDP/ITP SIGNALS
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
ADDR GROUP 0 ADDR GROUP 1
THERMAL
THERMDA
THERMDC
H CLK
BCLK[0]
BCLK[1]
D21
A24
B25
C7
A22
A21
PROCHOT#
ICH
THERMTRIP#
RESERVED
ITP disable guidelines
R62 56
H_IERR#H_A#13
1 2
H_RESET#
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#
R63 75
CPU_PROCHOT#CPU_PROCHOT#
H_THERMDA
H_THERMDC
PM_THRMTRIP#
12
H_ADS# 5
H_BNR# 5
H_BPRI# 5
H_DEFER# 5
H_DRDY# 5
H_DBSY# 5
H_BR0# 5
VCCP
H_INIT# 20
H_LOCK# 5
H_RESET# 5
H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5
H_HIT# 5
H_HITM# 5
T5
T6
T7
T4
T2
T3
VCCP
H_THERMDA 30
H_THERMDC 30
PM_THRMTRIP# 6,20
CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2
Layout Note:
Place voltage
divider within
0.5" of GTLREF
pin
VCCP
R470
1K/F
1 2
R471
2K/F
1 2
R64 *1K/F
1 2
R472 *1K/F
1 2
C672 *0.1 U/1 0V
R466 *0
1 2
Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
H_D#[0..63]5
H_DSTBN#05
H_DSTBP#05
H_DINV#05
H_D#[0..63]5
H_DSTBN#15
H_DSTBP#15
H_DINV#15
CPU_BSEL02
CPU_TEST1
CPU_TEST2
CPU_TEST4
12
CPU_TEST6
FSB
BCLK
533 001133
166
667
200
800
Signal Resistor Value Connect To Resistor Placement
150 ohm +/- 5%
D D
1
TDI
TMS
39 ohm +/- 1%
TRST#
500-680ohm +/- 5%
27 ohm +/- 1%
TCK
TDO
150 ohm +/- 5%
2
3
Within 2.0" of the ITPVTT
VTT
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
GND
Within 2.0" of the ITP
VTT
Within 2.0" of the ITP
4
H_D#[0..63]
H_D#[0..63]
T152
T151
BSEL2 BSEL1 BSEL0
0
1
1
5
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
T13
T1
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
U17B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Merom Ball-out Rev 1a
CPU_TEST3
CPU_TEST5
DATA GRP 0
DATA GRP 1
MISC
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
DATA GRP 2DATA GRP 3
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
1
00
Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.
Size Document Number Rev
CPU
6
Date: Sheet
7
H_D#[0..63]
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#[0..63]
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
Note:
H_DPRTSTP need to daisy chain
from ICH8 to IMVP6 to CPU.
COMP0
COMP1
COMP2
COMP3
R27
R25
27.4/F
54.9/F
1 2
1 2
PROJECT : CH3
Quanta Computer Inc.
H_D#[0..63] 5
H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5
H_D#[0..63] 5
H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5
H_DPRSTP# 6,20,37
H_DPSLP# 20
H_DPWR# 5
H_PWRGD 20
H_CPUSLP# 5
PM_PSI# 37
R469
54.9/F
27.4/F
1 2
1 2
346Tuesday, February 06, 2007
of
8
1A
1
2
3
4
5
6
7
8
ICCODE:
04
VCC_CORE
C635
10U/6.3V
C80
10U/6.3V
12
12
12
A A
VCC_CORE
12
C636
10U/6.3V
C58
10U/6.3V
12
C93
10U/6.3V
12
C74
10U/6.3V
12
C89
10U/6.3V
12
C650
10U/6.3V
12
C79
10U/6.3V
12
C65
10U/6.3V
8 inside cavity, north side, secondary layer.
VCC_CORE
12
B B
VCC_CORE
12
C643
10U/6.3V
C651
10U/6.3V
12
C640
10U/6.3V
12
C645
10U/6.3V
12
12
C648
10U/6.3V
C64
10U/6.3V
12
C638
10U/6.3V
12
C73
10U/6.3V
12
C646
10U/6.3V
12
C637
10U/6.3V
8 inside cavity, south side, secondary layer.
VCC_CORE
12
C91
10U/6.3V
12
C95
10U/6.3V
12
C57
10U/6.3V
12
C649
10U/6.3V
12
C639
10U/6.3V
12
C642
10U/6.3V
6 inside cavity, north side, primary layer.
VCC_CORE
C C
12
C66
10U/6.3V
12
C72
10U/6.3V
12
C78
10U/6.3V
12
10U/6.3V
C90
12
C94
10U/6.3V
12
C56
10U/6.3V
6 inside cavity, south side, primary layer.
VCC_CORE VCC_CORE
U17C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Merom Ball-out Rev 1a
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
.
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
VCCSENSE
VSSSENSE
Update to 10u *32pcs. OK
VCCP
C53
0.1U/10V
12
12
Layout out:
Place these inside socket cavity on North side secondary.
D D
1
C98
0.1U/10V
12
C54
0.1U/10V
C99
0.1U/10V
12
12
2
C55
0.1U/10V
12
C100
0.1U/10V
3
4
for Merom processors
recommended design
target is 44A
ICCP:
1before vccore stable
peak current is 4.5A
2.after vccore stable
VCCP
continue current is
2.5A
12
+
C75
330U/2.5V
ICCA 130mA
CPU_VID0 37
CPU_VID1 37
CPU_VID2 37
CPU_VID3 37
CPU_VID4 37
CPU_VID5 37
CPU_VID6 37
VCCSENSE 37
VSSSENSE 37
VCC_CORE
VCCSENSE
VSSSENSE
Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.
5
VCC1.5
12
C169
.01U/25V
Layout Note:
Place C105 near PIN
B26.
12
R43
100/F
12
R37
100/F
6
12
C176
10U/6.3V
U17D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
Merom Ball-out Rev 1a
Size Document Number Rev
CPU
Date: Sheet
7
PROJECT : CH3
Quanta Computer Inc.
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
.
of
446Tuesday, February 06, 2007
8
1A
1
hexainf@hotmail.com
2
3
4
5
6
7
8
05
H_A#[3..35]
H_ADS# 3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BR0# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3
H_DINV#0 3
H_DINV#1 3
H_DINV#2 3
H_DINV#3 3
H_DSTBN#0 3
H_DSTBN#1 3
H_DSTBN#2 3
H_DSTBN#3 3
H_DSTBP#0 3
H_DSTBP#1 3
H_DSTBP#2 3
H_DSTBP#3 3
H_REQ#0 3
H_REQ#1 3
H_REQ#2 3
H_REQ#3 3
H_REQ#4 3
H_RS#0 3
H_RS#1 3
H_RS#2 3
H_A#[3..35] 3
M10
N12
W10
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
AC6
AE2
AC5
AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AE5
AH2
AH13
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
N9
H5
P13
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
Y3
AJ9
AJ5
AJ6
AJ7
AJ2
AJ3
B3
C2
W1
W2
B6
E5
B9
A9
U25A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
CRESTLINE_1p0
HOST
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
12
C209
0.1U/10V
H_D#[0..63]
H_RESET#3
H_CPUSLP#3
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_REF
H_D#[0..63]3
A A
VCCP
12
R118
221/F
H_SWING
12
R114
100/F
B B
VCCP
C191
0.1U/10V
1 2
impedance 55 ohm
12
12
R111
R116
54.9/F
54.9/F
H_SCOMP
H_SCOMP#
12
R113
24.9/F
C C
H_RCOMP
Layout Note:
H_RCOMP trace should be
10-mil wide with 15-mil
spacing.
VCCP
R134
1K/F
1 2
12
R127
2K/F
Layout Note:55ohm
Place the 0.1 uF
D D
1
2
decoupling capacitor
within 100 mils from
GMCH pins.
3
Size Document Number Rev
4
5
6
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
NB
7
546Tuesday, February 06, 2007
8
1A
of
1
A A
WW22 update
--- MA14 needs
to be routed if
customers are
planning on
using 2Gb
technology and
width=8 (by 8)
DIMMs
SA_MA1413
SB_MA1413
R207 1K/F_4
R196 1K/F_4
T35
T177
T30
T25
T27
T50
T40
T28
T31
T44
T64
R264 0
R255 0
R247 0
R177 100
R178 *0
R240 0
T183
T75
PM_THRMTRIP#_GMCH
PM_DPRSLPVR_GMCH
PM_EXTTS#0
PM_EXTTS#1
CRESTLINE
new pin
define
Layout Note:
B B
C C
D D
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.
MCH_BSEL02
VCCP
MCH_CFG_511
MCH_CFG_911
MCH_CFG_1211
MCH_CFG_1311
MCH_CFG_1611
MCH_CFG_1911
MCH_CFG_2011
PM_BMBUSY#22
H_DPRSTP#3,20,37
PM_EXTTS#013
PM_EXTTS#113
PWROK22
PLT_RST-R#14,21
PM_THRMTRIP#3,20
DPRSLPVR22,37
GMCH pwrok is 3.3v
tolerant
VCC3
R509 10K
1 2
R251 10K
1 2
1
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_BMBUSY#_R
ICH_DPRSTP#_R
PM_EXTTS#1_R
PLTRST_MCH#
2
2
U25B
P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20
H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34
P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35
G41
L39
L36
J36
AW49
AV20
N20
G36
BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
CRESTLINE_1p0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
SA-MA14
SB_MA14
RSVD34
RSVD35
RSVD36
LVDSA_DATA#_3
LVDSA_DATA_3
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
SM_RCOMP_VOH
12
C274
.01U/25V
SM_RCOMP_VOL
12
C301
.01U/25V
12
12
C268
2.2U/10V
C315
2.2U/10V
DDR MUXINGCLKDMI
CFGRSVD
PM
GRAPHICS VIDME
NC
MISC
3
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2
1.8VSUS
12
R211
1K/F
12
R212
3.01K/F
12
R226
1K/F
3
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
SMRCOMPP
BL15
SMRCOMPN
BK14
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
SMDDR_VREF_MCH
AR49
R276 *10K/F
AW4
R269 *10K/F
B42
C42
H48
H47
K44
K45
DMI_TXN0
AN47
DMI_TXN1
AJ38
DMI_TXN2
AN42
DMI_TXN3
AN46
DMI_TXP0
AM47
DMI_TXP1
AJ39
DMI_TXP2
AN41
DMI_TXP3
AN45
DMI_RXN0
AJ46
DMI_RXN1
AJ41
DMI_RXN2
AM40
DMI_RXN3
AM44
DMI_RXP0
AJ47
DMI_RXP1
AJ42
DMI_RXP2
AM39
DMI_RXP3
AM43
E35
A39
C38
B39
DFGT_VR_EN
E36
update per design guide v1.1
9/29
AM49
AK50
AT43
AN49
AM50
MCH_CLVREF
H35
K36
G39
G40
A37
R32
R224
20K
1 2
MCH_CLVREF
C745
0.1U/10V
1 2
4
M_A_CLK0 13
M_A_CLK1 13
M_B_CLK0 13
M_B_CLK1 13
M_A_CLK0# 13
M_A_CLK1# 13
M_B_CLK0# 13
M_B_CLK1# 13
M_A_CKE0 12,13
M_A_CKE1 12,13
M_B_CKE0 12,13
M_B_CKE1 12,13
M_A_CS#0 12,13
M_A_CS#1 12,13
M_B_CS#0 12,13
M_B_CS#1 12,13
M_A_ODT0 12,13
M_A_ODT1 12,13
M_B_ODT0 12,13
M_B_ODT1 12,13
C375 0.1U/10V
C376 0.1U/10V
R270 0
DREFCLK 2
DREFCLK# 2
DREFSSCLK 2
DREFSSCLK# 2
CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2
DMI_TXN[3:0] 21
DMI_TXP[3:0] 21
DMI_RXN[3:0] 21
DMI_RXP[3:0] 21
R203 E@0/I@1.3K
<check list & CRB>
For Calero : 255
For Cresstline:1.3K/F
For external VGA:0 ohm
GVR_VID0 39
GVR_VID1 39
GVR_VID2 39
GVR_VID3 39
T178
CL_CLK0 22
CL_DATA0 22
ECPWROK 17,22,36
CL_RST#0 22
T215
PCIE_REQ4# 2
MCH_ICH_SYNC# 22
R246
0
1 2
VCC1.25
12
R519
1K/F
12
R516
392/F
4
VCC3
EDIDCLK16,17,25
EDIDDATA16,17,25
DIGON17,25
<check list & CRB>
For Calero : 1.5K
For Cresstline:2.4K
SMDDR_VREF
1.8VSUS
VCC3
<FAE>
If no use can be NC
CRT_B16,24
CRT_G16,24
CRT_R16,24
CRTCLK16,24
CRTDAT16,24
HSYNC_COM16,24
VSYNC_COM16,24
In Crestline EDS Rev.1.0,
Render Standb y V oltage is not
finalized yet(TBD), 1.05V for
Graphic Voltage
range(VCC_AXG) is between
0.9975V(min.) and
1.1025V(max.). Vgfx max at
1.1025V @ 8A (estimated)
only reserve AT3/5 not support IAMT,
but design guide suggest to connection
these pin ,do not NC
CLKREQ# ( MCH drives CLK_REQ#
to control the PCI-E diff clk input
itself )
1.8VSUS
12
R152
20/F
SMRCOMPP
SMRCOMPN
R146
20/F
12
5
BLON17,25
R243 *I@10K
R258 *I@10K
R513 *I@0
R510 *I@0
R263 *I@0
R262 *I@2.4K
I&E Dis/Enable
setting
R237 **I@2.2K
R267 **I@2.2K
5
R261 *I@0
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
T74
LA_CLK#16
LA_CLK16
LA_DATAN016
LA_DATAN116
LA_DATAN216
LA_DATAP016
LA_DATAP116
LA_DATAP216
connect to GND <design guide>
nicole 10/19
TV_DCONSEL_0
TV_DCONSEL_1
R82 *I@0
R80 *I@0
R76 *I@0
R265 *I@0
R225 *I@0
R86 *I@30
R90 *I@30
<check list>
HSYNC/VSYNC serial R
place close to NB
<Design Guide V1.1 P195>
If no use DREFCLK PD and
DREFCLK# PU
I&E Dis/Enable setting
<design gui d e V 1 . 1 P195>
If no use DREFCLK PD
and DREFCLK# PU
<check list>
For E@
Connect to GND
CRT R/G/B
TV A/B/C
HSYNC/VSYNC
NB_B
NB_G
NB_R
DREFSSCLK
DREFSSCLK#
DREFCLK
DREFCLK#
R220 E@0/I@150
R200 E@0/I@150
R202 E@0/I@150
R223 E@0
R214 E@0
T72
J40
H39
E39
E40
C37
D35
K40
LVDS_IBG
L41
L43
N41
N40
D46
C45
D44
E42
G51
E51
F49
G50
E50
F48
G44
B47
B45
E44
A47
A45
E27
G27
K27
F27
J27
L27
M35
P33
H32
G32
K29
J29
F29
E29
DDCCLK
K33
DDCDATA
G35
HSYNC11
F33
CRTIREF
C32
VSYNC11
E33
R274 E@0
R272 E@0
R268 E@0
R266 E@0
<check list>
For I@
Connect to 150ohm
CRT R/G/B
TV A/B/C
Connect to 30ohm
HSYNC/VSYNC
HSYNC11
VSYNC11
6
U25C
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
TVA_DAC
TVB_DAC
TVC_DAC
TVA_RTN
TVB_RTN
TVC_RTN
TV_DCONSEL_0
TV_DCONSEL_1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC
CRESTLINE_1p0
VCCP
NB_B
NB_G
NB_R
6
VCCP
LVDS
TV VGA
PCI-EXPRESS GRAPHICS
7
PEG_COMPI
PEG_COMPO
PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15
N43
M43
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
VCC_PEG_R
<=0.5''
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
C_PEG_TXN0
C_PEG_TXN1
C_PEG_TXN2
C_PEG_TXN3
C_PEG_TXN4
C_PEG_TXN5
C_PEG_TXN6
C_PEG_TXN7
C_PEG_TXN8
C_PEG_TXN9
C_PEG_TXN10
C_PEG_TXN11
C_PEG_TXN12
C_PEG_TXN13
C_PEG_TXN14
C_PEG_TXN15
C_PEG_TXP0
C_PEG_TXP1
C_PEG_TXP2
C_PEG_TXP3
C_PEG_TXP4
C_PEG_TXP5
C_PEG_TXP6
C_PEG_TXP7
C_PEG_TXP8
C_PEG_TXP9
C_PEG_TXP10
C_PEG_TXP11
C_PEG_TXP12
C_PEG_TXP13
C_PEG_TXP14
C_PEG_TXP15
R277 2 4.9 /F
1 2
C714 E@.1U/10V
C718 E@.1U/10V
C721 E@.1U/10V
C725 E@.1U/10V
C728 E@.1U/10V
C730 E@.1U/10V
C734 E@.1U/10V
C737 E@.1U/10V
C739 E@.1U/10V
C747 E@.1U/10V
C750 E@.1U/10V
C756 E@.1U/10V
C761 E@.1U/10V
C763 E@.1U/10V
C767 E@.1U/10V
C769 E@.1U/10V
C710 E@.1U/10V
C715 E@.1U/10V
C720 E@.1U/10V
C724 E@.1U/10V
C727 E@.1U/10V
C729 E@.1U/10V
C731 E@.1U/10V
C735 E@.1U/10V
C738 E@.1U/10V
C741 E@.1U/10V
C749 E@.1U/10V
C751 E@.1U/10V
C758 E@.1U/10V
C762 E@.1U/10V
C766 E@.1U/10V
C768 E@.1U/10V
+VCC_PEG
8
06
PEG_RXN0 14
PEG_RXN1 14
PEG_RXN2 14
PEG_RXN3 14
PEG_RXN4 14
PEG_RXN5 14
PEG_RXN6 14
PEG_RXN7 14
PEG_RXN8 14
PEG_RXN9 14
PEG_RXN10 14
PEG_RXN11 14
PEG_RXN12 14
PEG_RXN13 14
PEG_RXN14 14
PEG_RXN15 14
PEG_RXP0 14
PEG_RXP1 14
PEG_RXP2 14
PEG_RXP3 14
PEG_RXP4 14
PEG_RXP5 14
PEG_RXP6 14
PEG_RXP7 14
PEG_RXP8 14
PEG_RXP9 14
PEG_RXP10 14
PEG_RXP11 14
PEG_RXP12 14
PEG_RXP13 14
PEG_RXP14 14
PEG_RXP15 14
PEG_TXN_C0 14
PEG_TXN_C1 14
PEG_TXN_C2 14
PEG_TXN_C3 14
PEG_TXN_C4 14
PEG_TXN_C5 14
PEG_TXN_C6 14
PEG_TXN_C7 14
PEG_TXN_C8 14
PEG_TXN_C9 14
PEG_TXN_C10 14
PEG_TXN_C11 14
PEG_TXN_C12 14
PEG_TXN_C13 14
PEG_TXN_C14 14
PEG_TXN_C15 14
PEG_TXP_C0 14
PEG_TXP_C1 14
PEG_TXP_C2 14
PEG_TXP_C3 14
PEG_TXP_C4 14
PEG_TXP_C5 14
PEG_TXP_C6 14
PEG_TXP_C7 14
PEG_TXP_C8 14
PEG_TXP_C9 14
PEG_TXP_C10 14
PEG_TXP_C11 14
PEG_TXP_C12 14
PEG_TXP_C13 14
PEG_TXP_C14 14
PEG_TXP_C15 14
I&E Dis/Enable setting
<check list>
SDVO/PCIE/LVDS not implement,
16 lanes NC
R259 E@0
R231 E@0
R514 E@0
R511 E@0
R257 E@0
R239 E@0
R242 E@0
R260 E@0
Per desigen guide V1.1 p195
nicole 10/20
Size Document Number Rev
Date: Sheet
NB
7
DDCCLK
DDCDATA
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
TV_DCONSEL_0
TV_DCONSEL_1
PROJECT : CH3
Quanta Computer Inc.
646Tuesday, February 06, 2007
of
8
1A
1
hexainf@hotmail.com
2
3
4
5
6
7
8
07
M_A_DQ[63:0]13 M_B_DQ[63:0]13
A A
B B
C C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BG10
AW9
AM8
AN10
AM9
AN11
BD8
AY9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AT9
AN9
U25D
SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63
CRESTLINE_1p0
BB19
SA_BS_0
BK19
SA_BS_1
BF29
SA_BS_2
BL17
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEMORY A
SA_WE#
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
M_A_DQM0
M_A_DQM1
M_A_DQM2
M_A_DQM3
M_A_DQM4
M_A_DQM5
M_A_DQM6
M_A_DQM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
TP_SA_RCVEN#
M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13
M_A_DQM[0..7] 13
M_A_DQS[7:0] 13
M_A_DQS#[7:0] 13
M_A_A[13:0] 12,13
M_A_RAS# 12,13
T21
M_A_WE# 12,13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BK10
BL9
BK5
BL5
BK9
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
U25E
SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63
CRESTLINE_1p0
AY17
SB_BS_0
BG18
SB_BS_1
BG36
SB_BS_2
BE17
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
M_B_DQM0
M_B_DQM1
M_B_DQM2
M_B_DQM3
M_B_DQM4
M_B_DQM5
M_B_DQM6
M_B_DQM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
TP_SB_RCVEN#
M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13
M_B_DQM[0..7] 13
M_B_DQS[7:0] 13
M_B_DQS#[7:0] 13
M_B_A[13:0] 12,13
M_B_RAS# 12,13
T19
M_B_WE# 12,13
D D
Size Document Number Rev
NB
1
2
3
4
5
6
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
7
746Tuesday, February 06, 2007
8
1A
of
INT: 1.6A
EXT:1.3A
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
5
R30
R20
T14
Y12
5
U25G
VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
CRESTLINE_1p0
VCC CORE
POWER
VCC SMVCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC GFX NCTF
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCCP
D D
IVCCSM supply
current 1
channel 1.615A 2
channel 3.318A
C C
B B
A A
1.8VSUS
+VGFX_CORE
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
4
Ivcc_AXG Graphics core supply
current 7.7A
12
+
C694
*I@330U/6.3V
Layout Note:
Inside GMCH cavity for VCC_AXG.
12
C237
*I@0.1U/10V
GMCH 1.05V
VCC Core
VCC_AXG
VCC_AXD
VTT
VCC_PEG
VCC_AXM
VCCR_RX_DMI
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
4
12
C210
0.1U/10V
Ivcc (External GFX 1.310 A,
integrate 1.572 A)
Layout Note:
370 mils from edge.
12
+
12
C231
*I@0.1U/10V
C705
*I@330U/6.3V
R187
E@0_0603
Layout Note:
370 mils from edge.
12
C222
*I@0.47U/10V
current(A)
( 1.3A for
1.573
external
GFX )
for integrated
7.7
Gfx
0.2
0.85
1.2
0.54
0.25
FSB VCCP
for PCIEG
for IAMT
function
DMI
12.313SUM
12
12
C212
0.1U/10V
C196
0.22U/10V
12
C220
*I@1U/10V
Remark
12
VCCP
12
+
+VGFX_CORE
C235
0.22U/10V
3
C507
220U/2.5V
12
C250
*I@10U/6.3V
Ivcc_AXM
Controller
supply
current
540mA
12
C327
0.47U/10V
3
VCCP
VCC3
R125 10
1 2
12
Layout Note:
Inside GMCH cavity.
12
12
C278
22U/4V
C227
*I@22U/4V
C276
0.22U/10V
for IAMT power if not
support need to
connection to S0 power
12
C316
0.1U/10V
12
C674
22U/4V
Layout Note:
Place close to GMCH edge.
12
12
C349
C388
1U/10V
1U/10V
+VCC_GMCH_L
12
C273
0.22U/10V
A test check
when use
external VGA can
remove or not..
andrew
Layout Note:
Inside GMCH
cavity.
12
C322
0.1U/10V
12
C321
0.22U/10V
2
D5
21
CH751H-40HPT
12
C333
0.1U/10V
12
C279
0.1U/10V
12
C303
0.22U/10V
1.8VSUS
12
C293
0.1U/10V
Layout Note:
Place C293 where LVDS
and DDR2 taps.
2
1
U25F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
CRESTLINE_1p0
12
+
C733
330U/6.3V
Size Document Number Rev
Date: Sheet
VCC NCTF
POWER
12
Layout Note:
Place on the edge.
NB
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS NCTF
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VSS SCBVCC AXM
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
VCC AXM NCTF
1.8VSUS
12
C263
C302
22U/4V
22U/4V
PROJECT : CH3
Quanta Computer Inc.
1
08
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
846Tuesday, February 06, 2007
VCCP
1A
of
5
hexainf@hotmail.com
I&E Dis/Enable setting
R160 *I@0
VCC3
<FAE>
INT VGA disable VCCSYNC
connect to GND
12
12
R195 *I@0.03/F
12
+
12
+
12
C240
*I@22N
12
C213
*I@22N
12
*I@22N
L20
1 2
*I@BLM18PG181SN1
12
80mA
+1.25V_VCCA_DPLLA
12
C400
C707
470U/4V
0.1U/10V
80mA
+1.25V_VCCA_DPLLB
12
C703
C243
470U/4V
0.1U/10V
R173 E@0
R481 E@0
R482 E@0C225
VCC1.5
FB_180ohm+-25%_
100mHz_1500mA_
0.09ohm DC
D D
VCC1.25
R642
0
L55
+1.25V_VCCA_HPLL
12
BLM11A121S
12
C164
L54
BLM11A121S
12
R473 0.5 /F
C174
22U/10V
VCC3
22nF & 0.1uF for
VCC_TVDACA:C_R should be
placed with in 250 mils
from Crestline.
22U/10V
+1.25V_VCCA _MPLL
L21
1 2
*I@BLM18PG181SN1
+VCCA_MPLL_L
C C
B B
A A
1 2
12
50mA
12
C671
0.1U/10V
400mA
VCC1.25
0.1Caps should be
placed 200 mils
12
with in its pins.
C676
0.1U/10V
+3V_TV_DAC
12
C217
*I@10U
Update all 22nF CAP to 2pin
nicole 12/01
VCC3
Add the 100uF CAP for BenQ requirement.
SG Tie 061010
+3V_TV_DAC
L38
10uH/100MA
10uH+-20%_100mA
L22
10uH/100MA
12
C233
*I@.1U
12
C691
*I@.1U
12
C692
*I@.1U
+3V_VCCSYNC
C232
*I@.1U
C680
100U/6.3V_3528
12
40mA
L30
1 2
*I@BLM18PG181SN1
C292
*I@.1U
40mA
40mA
4
+
12
R147
E@0
C334
0.1U/10V
3
30mA
80mA
R216
E@0
+3V_VCCA_CRT_DAC
R126
E@0
Update this net name
nicole 9/25
+1.8VSUS_VCC _TX_LVDS
+VCC_TVBG
12
12
C207
C182
*I@.1U
*I@22N
12
C314
*I@22N
10mA
12
12
C252
22U/4V
200mA
C270
1U/10V
R507 E@0
100mA
640mA
12
12
C269
1U/10V
R197 E@0
R205 *I@0
12
C679
0.1U/10V
+1.8V_VCCD_LVDS
C310
*I@1U
L59
1 2
BLM21PG221SN1D
Add for BenQ request
nicole 10/23
+1.25V_VCCD_PEG_PLL
C228
22U/4V
12
C754
0.1U/10V
VCC3
12
C311
0.1U/10V
VCC1.25
R151 0
12
VCC1.25
C757
+
100U/6.3V
VCC1.5
C245
4.7U/6.3V
1 2
12
C262
22U/4V
60mA
+VCCA_MPLL_L
250mA
120mA
12
C324
22N
12
12
C347
C350
*I@22N
*I@.1U
1.8VSUS
R219 *I@0
R254
E@0
VCC1.25
CRT/TV Disable/Enable guideline
External VGA with E@part,Internal VGA with I@ part
Enable
3.3V
1.5V
1.5V
3.3V
3.3V
Disable
GND VCCA_TVC_DAC
GND
GND VCCA_DAC_BG
GND
GND
POWER
D TV/CRTLVDS
+1.25V_VCCA_DPLLA
+1.25V_VCCA_DPLLB
+1.25V_VCCA_HPLL
+1.25V_VCCA _MPLL
C696
*I@1000P
100mA
+1.25V_VCCA_SM
12
C255
1U/10V
12
C253
0.1U/10V
+1.5V_VCCD_CRT
+VCCQ_TVDAC
+VCCA_MPLL_L
+1.25V_VCCD_PEG_PLL
Ball
VCCA_CRT_DAC
VCCD_CRT
U25H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
150mA
+VTTLF1
+VTTLF2
C329
*I@10U
100mA
R236
E@0
+
C759
220U
+VTTLF3
+1.25V_VCCD_PEG_PLL
12
R517
1/F/0603
12
C753
10U/6.3V
12
C755
0.1U/10V
CRTPLLA PEGA SMTV
A CK A LVDS
12
C673
0.47U/10V
Ball
VCCD_TVDAC
VSS_DAC_BG
VCCSYNC
AXD
VCC_AXD_NCTF
AXF
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
SM CK
VCC_TX_LVDS
HV
PEG
VCC_RXR_DMI_1
VCC_RXR_DMI_2
DMI
CRESTLINE_1p0
12
C683
0.47U/10V
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VTTLF1
VTTLF2
VTTLF3
VTTLF
Enable
3.3V
1.5V
3.3VVCCD_QDAC
GNDVCCA_TVA_DAC
3.3VVCCA_TVB_DAC
12
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
C678
0.47U/10V
Disable
+3V_VCC_HV
+VCC_RXR_DMI
+VTTLF1
+VTTLF2
+VTTLF3
GND
1.5V
GND
GND
GND
12
C202
2.2U/6.3V
Place on the edge.
12
C259
0.47U/6.3V
Place on the edge.
+1.25V_AXD
12
C242
1U/10V
+1.25V_VCC_AXF
+1.25V_VCC_DMI
+1.25V_VCC_DMI
+1.8VSUS_VCC_SM_CK
200mA
+1.8VSUS_VCC _TX_LVDS
100mA
12
C360
0.1U/10V
2
LVDS Disable/Enable guideline
External VGA with E@part,Internal VGA with I@ part
12
C300
4.7U/10V
12
C675
4.7U/10V
1 2
12
C246
22U/10V
12
R506
E@0
+VCC_PEG
12
+
C746
220U/4V
12
+
C760
220U/4V
12
Signal
VCCD_LVDS
VCCA_LVDS
VCC_TX_LVDS
Ivcc_VTT FSB
supply
current
0.85A
VCCP
12
+
C677
220U/4V
520mA
L23 0
Place caps close
to VCC_AXD.
100mA
R518 0
C742
0.1U/10V
+1.8VSUS_VCC _TX_LVDS
100mA
12
C695
*I@1000P
L61
12
91nH/1.5A
91uH+-20%_1.5A
12
C743
10U/6.3V
L35
12
91nH/1.5A
91uH+-20%_1.5A
12
C483
10U/6.3V
+1.8VSUS_VCC_SM_CK
12
C711
C287
22U/10V
0.1U/10V
If SDVO Disable
LVDS Disable
GND
GND
GND
VCC1.25
VCC1.25
L56 *I@1UH
12
12
1uH+-20%_300mA
+
C698
*I@220U
I&E Dis/Enable setting
VCCP
Ivcc_PEG
supply current
1.25A
VCCP
Ivcc_RX_DMI
supply current
260mA
L57 1uH/30 0mA
12
1uH+-20%_300mA
R221
1/F/0603
+VCC_SM_CK_L
12
C297
10U/6.3V
12
If LVDS
enable
1.8V
1.8V
1.8V
1.8VSUS
D8
CH751H-40HPT_NC
+3V_VCC_HV
R244 0
500mA
+1.25V_VCC_AXF
12
C699
1U/10V
Place caps close
to VCC_AXF
VCC1.25
1.8VSUS
VCCP
21
12
12
R273
10
VCC3
R508
0
C701
10U/6.3V
1
09
40 mil
Size Document Number Rev
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
NB
1
946Tuesday, Fe b r u ary 06, 2007
1A
of
5
4
3
2
1
U25I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
D D
C C
B B
A A
5
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16
AL1
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
CRESTLINE_1p0
VSS
4
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
3
U25J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
CRESTLINE_1p0
VSS
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
1
10
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10 46Tuesday, February 06, 2007
1A
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
Size Document Number Rev
NB
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
Strap table
hexainf@hotmail.com
5
All strap are sampled with respect to the leading edge of the GMCH Power OK(PWROK) Signal
CFG[17:3] Have internal Pull-up
CFG[18:19] Have internal Pull-down
Any CFG signal strapping option not list below should be left NC Pin
Pin Name Strap description
D D
CFG[2:0]
CFG[4:3]
CFG5
CFG6
CFG7
CFG8
CFG9
CFG[11:10]
C C
CFG[13:12]
CFG[15:14]
CFG16
CFG[18:17]
SDVO_CTRLDATA
CFG19
CFG20
B B
DMI X2 Select
MCH_CFG_5 Low = DMIX2
MCH_CFG_56
High = IDMIX4(D efault)
R155
*4.02K/F
FSB Dynamic ODT
MCH_CFG_16 Low = OD T Dis able
A A
MCH_CFG_166
High = ODT Enable(D efault)
R156
*4.02K/F
5
FSB Frequency Select
Reserved
DMI X2 Select
Reserved
CPU Strap
Low power PCI Express
PCI Express Graphics Lane Reversal
Reserved
XOR/ALLZ
Reserved
FSB Dynamic ODT
Reserved
SDVO Present
DMI Lane Reversal
SDVO/PCIe concurrent
DMI Lane Reversal
MCH_CFG_19 Lo w = No rm a l operation(D efault)
MCH_CFG_196
SDVO/PCIE Concurrent operation
MCH_CFG_20
MCH_CFG_206
4
High = Reverse Lane
VCC3
R172
*4.02K/F
Low = Only SDVO or PCIE X1 is
operational(Default)
High = SDVO andPCIE X1 are operating
simultaneously via the PEG port
VCC3
R245
*4.02K/F
4
3
2
Configuration
010 = FSB 800MHz
011 = FSB 667MHz
0 = DMI X2
1 = DMI X4(Default)
0 = Reserved
1 = Mobile CPU(Default)
0 = Normal mode
1 = Low Power mode
0 = Reverse Lanes
1 = Normal operation(Default)
00 = Reserved
01 = XOR Mode Enable
10 = All-Z Mode Enabled
11 = Normal operation(Default)
0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)
0 = No SDVO Card present(Default)
1 = SDVO Card Present
0 = Normal operation(Default)
1 = Reverse Lanes
0 = Only SDVO or PCIE x1 is operation(Default)
1 = SDVO and PCIE x1 are operating simultaneously via the PEG port
XOR /ALLz /Clock Un-gating
MCH_CFG_12MCH_CFG_13 Configuration
0
0
1
1
MCH_CFG_126
MCH_CFG_136
0
1
0
1
Clock gating disable
XOR Mode Enable
ALL-z Mode Enable
Normal operation(Default)
R190
*4.02K/F
3
R157
*4.02K/F
PCI Express Graphics
MCH_CFG_9 Low = Reverse Lane
High = Normal operation(Default)
MCH_CFG_96
2
1
11
SDVO Present
Strap define at External
DVI control page
R174
*4.02K/F
Size Document Number Re v
NB
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
11 46Tuesday, February 06, 2007
1
of
1A
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B
A A
M_B_A[13..0]
M_B_A[13..0] 7,13
12
DDRII A CHANNEL
M_A_A[13..0]
SMDDR_VTERM
SMDDR_VTERM
C126
C179
C188
.1U/10V
B B
M_A_ODT06,13
M_A_CKE16,13
M_A_BS#07,13
M_A_RAS#7,13
M_A_BS#17,13
C C
M_A_WE#7,13
M_A_CAS#7,13
.1U/10V
C161
.1U/10V
M_A_ODT0
M_A_A13
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_CKE1
M_A_A11
M_A_A10
M_A_BS#0
M_A_A7
M_A_A6
M_A_A2
M_A_A4
M_A_BS#1
M_A_A9
M_A_A12
C120
.1U/10V
.1U/10V
RP7 56X2
RP23 56X2
RP19 56X2
RP28 56X2
RP14 56X2
RP25 56X2
RP20 56X2
RP15 56X2
RP27 56X2
RP10 56X2
C128
.1U/10V
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
1
3
C152
.1U/10V
M_A_A[13..0] 7,13
C138
.1U/10V
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
C137
.1U/10V
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
C117
.1U/10V
C136
.1U/10V
C123
.1U/10V
C111
.1U/10V
SMDDR_VTERM
C206
.1U/10V
DDRII B CHANNEL
C189
.1U/10V
C142
.1U/10V
C216
.1U/10V
C139
.1U/10V
C127
.1U/10V
C121
.1U/10V
C194
.1U/10V
C129
.1U/10V
C178
.1U/10V
C165
.1U/10V
C124
.1U/10V
C223
.1U/10V
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
RP17 56X2
M_B_BS#17,13
M_B_BS#27,13
M_B_CKE06,13
M_B_RAS#7,13
M_B_CS#06,13
M_B_BS#07,13
M_B_CAS#7,13
M_B_WE#7,13
M_B_A0
M_B_A5
M_B_A1
M_B_A8
M_B_A3
M_B_A4
M_B_A2
M_B_A12
M_B_A9
M_B_A7
M_B_A6
M_B_A10
1
3
RP21 56X2
1
3
RP24 56X2
1
3
RP18 56X2
1
3
RP26 56X2
1
3
RP22 56X2
1
3
RP31 56X2
1
3
RP13 56X2
1
3
RP12 56X2
1
3
RP16 56X2
1
3
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
RP11 56X2
M_A_CS#06,13
M_B_ODT06,13
M_B_ODT16,13
M_B_CS#16,13
M_A_CS#16,13
M_A_ODT16,13
M_B_CKE16,13
M_A_CKE06,13
M_A_BS#27,13
D D
1
2
3
4
5
M_A_A0
M_B_A13
M_ODT3
M_ODT1
M_B_A11
6
1
3
RP9 56X2
1
3
RP8 56X2
1
3
RP6 56X2
1
3
RP29 56X2
1
3
RP30 56X2
1
3
Size Document Number R ev
Date: Sheet
DDR2
2
4
2
4
2
4
2
4
2
4
2
4
SMDDR_VTERM
PROJECT : CH3
Quanta Computer Inc.
7
1A
of
12 46Tuesday, February 06, 2007
8
5
hexainf@hotmail.com
SMDDR_VREF_DIMM
1.8VSUS
CN17
1
VREF
3
M_A_DQ6
M_A_DQ5
M_A_DQS#0
M_A_DQS0
D D
M_A_CKE06,12
C C
M_A_BS#27,12
M_A_BS#07,12
M_A_WE#7,12
M_A_CAS#7,12
M_A_CS#16,12
M_A_ODT16,12
B B
R47 0
VCC3
M_A_DQ2
M_A_DQ3
M_A_DQ12
M_A_DQ8
M_A_DQS#1
M_A_DQS1
M_A_DQ11
M_A_DQ15
M_A_DQ20
M_A_DQS#2
M_A_DQS2
M_A_DQ23
M_A_DQ19
M_A_DQ24
M_A_DQ25
M_A_DQM3
M_A_DQ26
M_A_DQ27
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_A_DQ36
M_A_DQS#4
M_A_DQS4
M_A_DQ39
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DQM5
M_A_DQ42
M_A_DQ46
M_A_DQ53
M_A_DQ49
M_A_DQS#6
M_A_DQS6
M_A_DQ50
M_A_DQ56
M_A_DQ60
M_A_DQM7
M_A_DQ62
PDAT_SMB
PCLK_SMB
VCC3_SPD
CLOCKA 0,1 CLOCKB 0,1
A A
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
DDR2_SODIMM
CKEA 0,1 CKEB 0,1
2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
H 4.0 H 8.0
M_A_DQ4
4
M_A_DQ0
6
8
M_A_DQM0
10
12
M_A_DQ7
14
M_A_DQ1
16
18
M_A_DQ13
20
M_A_DQ9
22
24
M_A_DQM1
26
28
30
32
34
M_A_DQ14
36
M_A_DQ10
38
40
42
M_A_DQ21M_A_DQ17
44
M_A_DQ16
46
48
50
M_A_DQM2
52
54
M_A_DQ18
56
M_A_DQ22
58
60
M_A_DQ29
62
M_A_DQ28
64
66
M_A_DQS#3
68
M_A_DQS3
70
72
M_A_DQ30
74
M_A_DQ31
76
78
80
82
84
86
88
M_A_A11
90
M_A_A7
92
M_A_A6
94
96
M_A_A4
98
M_A_A2
100
M_A_A0
102
104
106
108
110
112
114
M_A_A13
116
118
120
122
M_A_DQ32
124
M_A_DQ33M_A_DQ37
126
128
M_A_DQM4
130
132
M_A_DQ35
134
M_A_DQ38
136
138
M_A_DQ44
140
M_A_DQ45
142
144
M_A_DQS#5
146
M_A_DQS5
148
150
M_A_DQ43
152
M_A_DQ47
154
156
M_A_DQ48
158
M_A_DQ52
160
162
164
166
168
M_A_DQM6
170
172
M_A_DQ54
174
M_A_DQ55M_A_DQ51
176
178
M_A_DQ61
180
M_A_DQ57
182
184
M_A_DQS#7
186
M_A_DQS7
188
190
M_A_DQ58M_A_DQ59
192
M_A_DQ63
194
196
R41 10K
198
R35 10K
200
SO-DIMM0 SPD Address is 0xA0
SO-DIMM0 TS Address is 0x30
4
M_A_CLK0 6
M_A_CLK0# 6
PM_EXTTS#0 6
M_A_CKE1 6,12
SA_MA14 6
M_A_BS#1 7,12
M_A_RAS# 7,12
M_A_CS#0 6,12
M_A_ODT0 6,12
M_A_CLK1 6
M_A_CLK1# 6
M_A_DQ[0..63] 7
M_A_DQS[0..7] 7
M_A_DQS#[0..7] 7
M_A_A[0..13] 7,12
M_B_CKE06,12
M_B_BS#27,12
M_B_BS#07,12
M_B_WE#7,12
M_B_CAS#7,12
M_B_CS#16,12
M_B_ODT16,12
PDAT_SMB2,22,28,31
PCLK_SMB2,22,28,31
M_B_DQ0
M_B_DQ5
M_B_DQS#0
M_B_DQS0
M_B_DQ7
M_B_DQ3
M_B_DQ9
M_B_DQ8
M_B_DQS#1
M_B_DQS1
M_B_DQ11
M_B_DQ10
M_B_DQ20
M_B_DQ17
M_B_DQS#2
M_B_DQS2
M_B_DQ22
M_B_DQ23
M_B_DQ29
M_B_DQ28
M_B_DQM3
M_B_DQ26
M_B_DQ27
M_B_A12
M_B_A9
M_B_A8
M_B_A5
M_B_A3
M_B_A1
M_B_A10
M_B_DQ37
M_B_DQ38
M_B_DQS#4
M_B_DQS4
M_B_DQ34
M_B_DQ35
M_B_DQ40
M_B_DQ41
M_B_DQM5
M_B_DQ46
M_B_DQ43
M_B_DQ53
M_B_DQ49
M_B_DQS#6
M_B_DQS6
M_B_DQ51
M_B_DQ54
M_B_DQ56
M_B_DQ61
M_B_DQM7
M_B_DQ59
M_B_DQ62
PDAT_SMB
PCLK_SMB
VCC3_SPD
3
SMDDR_VREF_DIMM
CN18
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
2-1734073-2
VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
PC4800 DDR2 SDRAM
SO-DIMM (200P)
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
1.8VSUS1.8VSUS 1.8VSUS
2
M_B_DQ4
4
M_B_DQ1
6
8
M_B_DQM0
10
12
M_B_DQ2
14
M_B_DQ6
16
18
M_B_DQ12
20
M_B_DQ13
22
24
M_B_DQM1
26
28
30
32
34
M_B_DQ14
36
M_B_DQ15
38
40
42
M_B_DQ16
44
M_B_DQ21
46
48
50
M_B_DQM2
52
54
M_B_DQ18
56
M_B_DQ19
58
60
M_B_DQ24
62
M_B_DQ25
64
66
M_B_DQS#3
68
M_B_DQS3
70
72
M_B_DQ31
74
M_B_DQ30
76
78
80
82
84
86
88
M_B_A11
90
M_B_A7
92
M_B_A6
94
96
M_B_A4
98
M_B_A2
100
M_B_A0
102
104
106
108
110
112
114
M_B_A13
116
118
120
122
M_B_DQ36
124
M_B_DQ32
126
128
M_B_DQM4
130
132
M_B_DQ39
134
M_B_DQ33
136
138
M_B_DQ44
140
M_B_DQ45
142
144
M_B_DQS#5
146
M_B_DQS5
148
150
M_B_DQ42
152
M_B_DQ47
154
156
M_B_DQ52
158
M_B_DQ48
160
162
164
166
168
M_B_DQM6
170
172
M_B_DQ55
174
M_B_DQ50
176
178
M_B_DQ60
180
M_B_DQ57
182
184
M_B_DQS#7
186
M_B_DQS7
188
190
M_B_DQ63
192
M_B_DQ58
194
196
R39 10K
198
R44 10K
200
VCC3_SPD
SO-DIMM1 SPD Address is 0xA4
SO-DIMM1 TS Address is 0x34
M_B_CLK0 6
M_B_CLK0# 6
PM_EXTTS#1 6
M_B_CKE1 6,12
SB_MA14 6
M_B_BS#1 7,12
M_B_RAS# 7,12
M_B_CS#0 6,12
M_B_ODT0 6,12
M_B_CLK1 6
M_B_CLK1# 6
2
M_B_DQM[0..7 ] 7M_A_DQM[0..7] 7
M_B_DQ[0..63] 7
M_B_DQS[0..7] 7
M_B_DQS#[0..7] 7
M_B_A[0..13] 7,12
1.8VSUS
SMDDR_VREF_DIMM
1.8VSUS
C130
2.2U/6.3V
SMDDR_VREF_DIMM
C307 470P/50V
SMDDR_VREF_DIMM
1 2
R256
R235 *10K/F
*10K/F
Place these Caps near So-Dimm2.
C201
2.2U/6.3V
C373
.1U/10V
C147
2.2U/6.3V
C392
2.2U/6.3V
C172
2.2U/6.3V
C198
2.2U/6.3V
VCC3
C46
2.2U/6.3V
C131
2.2U/6.3V
C140
.1U/10V
C49
.1U/10V
Place these Caps near So-Dimm1.
C190
2.2U/6.3V
C361
2.2U/6.3V
C162
2.2U/6.3V
VCC3
C200
2.2U/6.3V
C45
2.2U/6.3V
C180
.1U/10V
C48
.1U/10V
C382
.1U/10V
C175
2.2U/6.3V
1
13
R248 0
C153
.1U/10V
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm2
No Vias Between the Trace of PIN to CAP.
C145
.1U/10V
SO-DIMM BYPASS PLACEMENT :
Place these Caps near So-Dimm1.
No Vias Between the Trace of PIN to CAP.
1.8VSUS
C146
.1U/10V
C141
.1U/10V
SMDDR_VREF
C181
C167
.1U/10V
.1U/10V
C149
.1U/10V
C166
.1U/10V
C187
.1U/10V
C199
.1U/10V
Size Doc ument Number Rev
DDR2
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
13 46Tuesday, February 06, 2007
1
1A
U27F
AA12
GND_0
AA2
GND_1
AA21
GND_2
AA31
GND_3
AB27
GND_4
AB6
GND_5
AC10
GND_6
AC23
GND_7
AC29
GND_8
AC4
GND_9
AD16
GND_10
AD17
GND_11
AD2
AD31
AE17
AE27
AF11
AF26
AF29
AG10
AG11
AG14
AG15
AG19
AG2
AG22
AG31
AG8
AH24
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ26
AJ29
AK28
AK31
AL11
AL14
AL19
AL22
AL25
AM13
AM16
AM17
AM20
AM23
AM26
AM29
AE6
AF4
AF7
AJ4
AJ7
AK2
AL3
AL6
AL9
B12
B15
B18
B21
B24
B27
B3
B30
B6
B9
C2
C31
D10
D13
D16
D17
D20
D23
D26
D29
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
E@U_GPU_G3
D D
C C
B B
A A
5
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
5
D4
D7
F11
F14
F19
F2
F22
F25
F31
F8
G26
G29
G4
G7
H27
H6
J16
J17
J2
J31
K10
K23
K29
K4
L27
L6
M12
M2
M31
N15
N18
N29
N4
P15
P18
P27
P6
R13
R14
R15
R18
R19
R2
R20
R31
T16
T17
T24
T29
T4
U16
U17
U24
U29
U8
V13
V14
V15
V18
V19
V2
V20
V31
W15
W18
W27
W6
Y15
Y18
Y29
Y4
AL10
AM10
AG13
PLT_RST-R#6,21
PLT_RST-R#
PEG_RXP06
PEG_RXN06
PEG_RXP16
PEG_RXN16
PEG_RXP26
PEG_RXN26
PEG_RXP36
PEG_RXN36
PEG_RXP46
PEG_RXN46
PEG_RXP56
PEG_RXN56
PEG_RXP66
PEG_RXN66
PEG_RXP76
PEG_RXN76
PEG_RXP86
PEG_RXN86
PEG_RXP96
PEG_RXN96
PEG_RXP106
PEG_RXN106
PEG_RXP116
PEG_RXN116
PEG_RXP126
PEG_RXN126
PEG_RXP136
PEG_RXN136
PEG_RXP146
PEG_RXN146
PEG_RXP156
PEG_RXN156
PEG_TXP_C06
PEG_TXN_C06
PEG_TXP_C16
PEG_TXN_C16
PEG_TXP_C26
PEG_TXN_C26
PEG_TXP_C36
PEG_TXN_C36
PEG_TXP_C46
PEG_TXN_C46
PEG_TXP_C56
PEG_TXN_C56
PEG_TXP_C66
PEG_TXN_C66
PEG_TXP_C76
PEG_TXN_C76
PEG_TXP_C86
PEG_TXN_C86
PEG_TXP_C96
PEG_TXN_C96
PEG_TXP_C106
PEG_TXN_C106
PEG_TXP_C116
PEG_TXN_C116
PEG_TXP_C126
PEG_TXN_C126
PEG_TXP_C136
PEG_TXN_C136
PEG_TXP_C146
PEG_TXN_C146
PEG_TXP_C156
PEG_TXN_C156
CLK_PCIE_VGA2
CLK_PCIE_VGA#2
R230 E@0
del 10K pull_down resistor per FAE
nicole 10/9
4
T70
T181
T179
C_PEG_RXP0PEG_RXP0
C_PEG_RXP1
C_PEG_RXP2PEG_RXP2
C_PEG_RXP3PEG_RXP3
C_PEG_RXN3PEG_RXN3
C_PEG_RXP4
C_PEG_RXP5PEG_RXP5
C_PEG_RXN5PEG_RXN5
C_PEG_RXP6
C_PEG_RXN6PEG_RXN6
C_PEG_RXP7PEG_RXP7
C_PEG_RXN7PEG_RXN7
C_PEG_RXP8
C_PEG_RXN8
C_PEG_RXP9
C_PEG_RXN9
C_PEG_RXP10PEG_RXP10
C_PEG_RXN10
C_PEG_RXP11
C_PEG_RXN11PEG_RXN11
C_PEG_RXP13PEG_RXP13
C_PEG_RXN13PEG_RXN13
C_PEG_RXP14
C_PEG_RXP15
C_PEG_RXN15
VGA_RFU0
VGA_RFU1
PEX_TSTCK
PEX_TSTCK#
C342 E@.1U/10V
PEG_RXN0 C_PEG_RXN0
C351 E@.1U/10V
PEG_RXP1
C368 E@.1U/10V
PEG_RXN1 C_PEG_RXN1
C357 E@.1U/10V
C369 E@.1U/10V
PEG_RXN2 C_PEG_RXN2
C381 E@.1U/10V
C386 E@.1U/10V
C396 E@.1U/10V C380 E@.1U/10V
PEG_RXP4
C403 E@.1U/10V
PEG_RXN4 C_PEG_RXN4
C398 E@.1U/10V C364 E@.47U/10V
C415 E@.1U/10V
C405 E@.1U/10V
PEG_RXP6
C425 E@.1U/10V
C418 E@.1U/10V
C435 E@.1U/10V
C427 E@.1U/10V
PEG_RXP8
C437 E@.1U/10V
PEG_RXN8
C444 E@.1U/10V
PEG_RXP9
C446 E@.1U/10V
PEG_RXN9
C451 E@.1U/10V
C455 E@.1U/10V
PEG_RXN10
C453 E@.1U/10V
PEG_RXP11
C457 E@.1U/10V
C461 E@.1U/10V
PEG_RXP12 C_PEG_RXP12
C465 E@.1U/10V
PEG_RXN12 C_PEG_RXN12
C475 E@.1U/10V
C478 E@.1U/10V
C482 E@.1U/10V
PEG_RXP14
C487 E@.1U/10V
PEG_RXN14 C_PEG_RXN14
C484 E@.1U/10V
PEG_RXP15
C496 E@.1U/10V
PEG_RXN15
C488 E@.1U/10V
PEG_TXP_C0
PEG_TXN_C0
PEG_TXP_C1
PEG_TXN_C1
PEG_TXP_C2
PEG_TXN_C2
PEG_TXP_C3
PEG_TXN_C3
PEG_TXP_C4
PEG_TXN_C4
PEG_TXP_C5
PEG_TXN_C5
PEG_TXP_C6
PEG_TXN_C6
PEG_TXP_C7
PEG_TXN_C7
PEG_TXP_C8
PEG_TXN_C8
PEG_TXP_C9
PEG_TXN_C9
PEG_TXP_C10
PEG_TXN_C10
PEG_TXP_C11
PEG_TXN_C11
PEG_TXP_C12
PEG_TXN_C12
PEG_TXP_C13
PEG_TXN_C13
PEG_TXP_C14
PEG_TXN_C14
PEG_TXP_C15
PEG_TXN_C15
CLK_PCIE_VGA
CLK_PCIE_VGA#
VGA_RST#
4
AJ15
PEX_TX0
AK15
PEX_TX0#
AH16
PEX_TX1
AG16
PEX_TX1#
AG17
PEX_TX2
AH17
PEX_TX2#
AG18
PEX_TX3
AH18
PEX_TX3#
AK18
PEX_TX4
AJ18
PEX_TX4#
AJ19
PEX_TX5
AH19
PEX_TX5#
AG20
PEX_TX6
AH20
PEX_TX6#
AG21
PEX_TX7
AH21
PEX_TX7#
AK21
PEX_TX8
AJ21
PEX_TX8#
AJ22
PEX_TX9
AH22
PEX_TX9#
AG23
PEX_TX10
AH23
PEX_TX10#
AK24
PEX_TX11
AJ24
PEX_TX11#
AJ25
PEX_TX12
AH25
PEX_TX12#
AH26
PEX_TX13
AG26
PEX_TX13#
AK27
PEX_TX14
AJ27
PEX_TX14#
AJ28
PEX_TX15
AH27
PEX_TX15#
AK13
PEX_RX0
AK14
PEX_RX0#
AM14
PEX_RX1
AM15
PEX_RX1#
AL15
PEX_RX2
AL16
PEX_RX2#
AK16
PEX_RX3
AK17
PEX_RX3#
AL17
PEX_RX4
AL18
PEX_RX4#
AM18
PEX_RX5
AM19
PEX_RX5#
AK19
PEX_RX6
AK20
PEX_RX6#
AL20
PEX_RX7
AL21
PEX_RX7#
AM21
PEX_RX8
AM22
PEX_RX8#
AK22
PEX_RX9
AK23
PEX_RX9#
AL23
PEX_RX10
AL24
PEX_RX10#
AM24
PEX_RX11
AM25
PEX_RX11#
AK25
PEX_RX12
AK26
PEX_RX12#
AL26
PEX_RX13
AL27
PEX_RX13#
AM27
PEX_RX14
AM28
PEX_RX14#
AL28
PEX_RX15
AL29
PEX_RX15#
AH14
PEX_REFCLK
AJ14
PEX_REFCLK#
AH15
PEX_RST#
AG12
RFU0
AH13
RFU1
AM12
PEX_TSTCLK_OUT
AM11
PEX_TSTCLK_OUT#
E@U_GPU_G3
U27A
3
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_LP_0
VDD_LP_1
VDD_LP_2
VDD_LP_3
VDD_LP_4
VDD_LP_5
VDD33_0
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD33_10
VDD33_11
VDD33_12
AD23
C372 E@.1U/10V
AF23
C434 E@.1U/10V
AF24
C416 E@1U/6.3V
AF25
C438 E@1U/6.3V
AG24
C428 E@4.7U/10V
AG25
AC16
AC17
AC21
C420 E@.1U/10V
AC22
C417 E@0.47U/10V
AE18
AE21
C378 E@1U/6.3V
AE22
C397 E@1U/6.3V
AF12
C404 E@10U/4V
AF18
C374 E@.1U/10V
AF21
C441 E@.1U/10V
AF22
K16
K17
C358 E@.1U/10V
N13
C384 E@.1U/10V
N14
C389 E@.1U/10V
N16
C383 E@.1U/10V
N17
C366 E@.1U/10V
N19
C338 E@10U/4V
P13
C362 E@.1U/10V
P14
C370 E@1U/6.3V
P16
C390 E@.1U/10V
P17
C371 E@.1U/10V
P19
C402 E@.1U/10V
R16
C356 E@.1U/10V
R17
C363 E@10U/4V
T14
C385 E@.47U/10V
T15
C407 E@.47U/10V
T18
C411 E@.47U/10V
T19
C408 E@.47U/10V
U13
C346 E@1U/6.3V
U14
C337 E@1U/6.3V
U15
C410 E@.47U/10V
U18
C409 E@.47U/10V
U19
C323 E@.47U/10V
V16
C393 E@.47U/10V
V17
C406 E@.47U/10V
W13
C344 E@.47U/10V
W14
C348 E@10U/4V
W16
W17
W19
Y13
Y14
Y16
Y17
Y19
Y20
P20
T20
T23
U20
U23
W20
VDD_SENSE
N20
GND_SENSE
M21
AC11
AC12
C264 E@.1U/10V
AC24
C265 E@.1U/10V
AD24
C285 E@.1U/10V
AE11
C205 E@.47U/10V
AE12
C224 E@.47U/10V
H7
C288 E@.47U/10V
J7
C282 E@1U/10V
K7
L10
L7
L8
M10
15mil
PEX_PLLVDD
AF15
AE15
AE16
PCIE
PEX_IOVDD_0
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
VDD_SENSE
GND_SENSE
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
2
VGA1.2V
PLACE NEAR GPU
VGA1.2V
PLACE NEAR GPU
VGACORE_G73
PLACE NEAR GPU
T76
T78
VCC3
PLACE NEAR GPU
L31 E@10nH
C353 E@1U/6.3V
C355 E@.01U/16V
C352 E@.1U/10V
C339 E@4.7U/X5R
500mA
1500mA
19.81A
180mA
VGA1.2V
C387E@0.1U
20mA
E@CH501H
SPDIF_VGA
E@CH501H
1
G8X Total power consumption
1.NVDD CORE POWER 1.2 - 1.0
-- 11.01A
2.PCIE VGA1.2V -- 1.75A
3.FBVDDQ 1.8V ----- 3.12A
4.VDD I/O 3.3V ---- 0.49A
5.PLL 2.5V ---
power up sequence
I/O 3.3V
NVCORE
1.8VFBDDQ
1.2V
2.5V
VCC3
D7
D6
R169
*E@24.3K/F
C891 E@.01U
2 1
R185
*E@3.4K/F
2 1
R179
*E@76.8/F
no 76.8 in SAP, use 78.7 instead
for 3.3V swing
G73 use 0ohm, NB8P use 10nF
14
SPDIF 34
PLACE NEAR GPU
NV_PLLAVDD
NC_0
NC_1
NC_2
T13
AM8
AM9
B32
NV_PLLAVDD
L27 *E@10nH
R238 E@0
VGACORE_G73
G72M/G73M: STUFF L27
VGA1.2V
15mil
NB8X: STUFF R238
SPDIF_VGA
J6
SPDIF
Size Document Number Rev
VGA
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
14 46Tuesday, February 06, 2007
1
1A
5
hexainf@hotmail.com
4
3
2
1
U27C
B7
FBCD0
A7
FBCD1
C7
FBCD2
A2
FBCD3
B2
FBCD4
C4
FBCD5
A5
FBCD6
B5
FBCD7
F9
FBCD8
F10
FBCD9
D12
FBCD10
D9
FBCD11
E12
FBCD12
D11
FBCD13
E8
FBCD14
D8
FBCD15
E7
FBCD16
F7
FBCD17
D6
FBCD18
D5
FBCD19
D3
FBCD20
E4
FBCD21
C3
FBCD22
B4
FBCD23
C10
FBCD24
B10
FBCD25
C8
FBCD26
A10
FBCD27
C11
FBCD28
C12
FBCD29
A11
FBCD30
B11
FBCD31
B28
FBCD32
C27
FBCD33
C26
FBCD34
B26
FBCD35
C30
FBCD36
B31
FBCD37
C29
FBCD38
A31
FBCD39
D28
FBCD40
D27
FBCD41
F26
FBCD42
D24
FBCD43
E23
FBCD44
E26
FBCD45
E24
FBCD46
F23
FBCD47
B23
FBCD48
A23
FBCD49
C25
FBCD50
C23
FBCD51
A22
FBCD52
C22
FBCD53
C21
FBCD54
B22
FBCD55
E22
FBCD56
D22
FBCD57
D21
FBCD58
E21
FBCD59
E18
FBCD60
D19
FBCD61
D18
FBCD62
E19
FBCD63
A4
FBCDQM0
E11
FBCDQM1
F5
FBCDQM2
C9
FBCDQM3
C28
FBCDQM4
F24
FBCDQM5
C24
FBCDQM6
E20
FBCDQM7
C5
FBCDQS_WP0
E10
FBCDQS_WP1
E5
FBCDQS_WP2
B8
FBCDQS_WP3
A29
FBCDQS_WP4
D25
FBCDQS_WP5
B25
FBCDQS_WP6
F20
FBCDQS_WP7
C6
FBCDQS_RN0
E9
FBCDQS_RN1
E6
FBCDQS_RN2
A8
FBCDQS_RN3
B29
FBCDQS_RN4
E25
FBCDQS_RN5
A25
FBCDQS_RN6
F21
FBCDQS_RN7
E@U_GPU_G3
R478 *E@200/F
C690
*E@2200P/50V
3
AA23
FBC
FBVTT_0
FBVTT_1
FBVTT_2
FBVTT_3
FBVTT_4
FBVTT_5
FBVTT_6
FBVTT_7
FBVTT_8
FBVTT_9
FBVTT_10
FBVTT_11
FBVTT_12
FBVTT_13
FBVTT_14
FBVTT_15
FBVTT_16
FBVTT_17
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#
RFU4
RFU5
FBC_DEBUG
FBC_REFCLK
FBC_REFCLK#
C260 E@.1U/10V
AB23
C414 E@.1U/10V
H16
C304 E@.1U/10V
H17
C449 E@.1U/10V
J10
C241 E@.47U/10V
J23
C234 E@.47U/10V
J24
C458 E@10U/4V
J9
C275 E@.1U/10V
K11
C289 E@.1U/10V
K12
C247 E@.1U/10V
K21
C472 E@.1U/10V
K22
C226 E@.47U/10V
K24
C447 E@.47U/10V
K9
C452 E@10U/4V
L23
M23
T25
U25
VMC_MA4
C13
VMC_RAS#
A16
VMC_MA5
A13
VMC_BA1
B17
VMC_MA2H
B20
VMC_MA4H
A19
VMC_MA3H
B19
VMC_BA2_CS1#
B14
VMC_CS0#
E16
VMC_MA11
A14
VMC_CAS#
C15
VMC_WE#
B16
VMC_BA0
F17
VMC_MA5H
C19
VMC_MA12
D15
VMC_RST
C17
VMC_MA7
A17
VMC_MA10
C16
VMC_CKE
D14
VMC_MA0
F16
VMC_MA9
C14
VMC_MA6
C18
VMC_MA2
E14
VMC_MA8
B13
VMC_MA3
E15
VMC_MA1
F15
VMC_MA13
A20
VMC_CLK0
E13
VMC_CLK0#
F13
VMC_CLK1
F18
VMC_CLK1#
E17
C20
G73_D1
D1
VMC_DEBUG
F12
THMDAT
B1
THMCLK
C1
PLACE NEAR GPU
FBC_CMD27
In NB8P C1use d as I2CS_SCL signal, B1used as I2CS_SDA signal
G73_G8
MAX6649_V
GFX_THMDÂGFX_THMD+
*E@.1U/10V
FBC_PLLVDD
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FB_VREF2
3
2
C687
G8
G10
G9
FBCAL_PD
K26
FBCAL_PU
H26
FBCAL_TERM
J26
Update for Nvidia FAE suggestion
Nicole 11/20
FB_VREF2
A28
U23
VCC1/ALERT
DXN
SDA
DXP
SCLK
GND5/THERM
*E@MAX6649_A
change to MAX6649 for Nvidia guarantee
nicole 11/07
FBC_PLLAVDD
C256
E@470P/50V
15mil
6
7
8
4
T65
C261
E@4700P/25V
R280 E@ 40.2/F
R284 E@ 30.1/F
R283 E@ 40.2/F
ALERT#
OVERT#
VGA THERMAIL CIRCUIT, When use GPU internal sensor, not stuff
2
VCC1.8
VMC_MA4 19
VMC_RAS# 19
VMC_MA5 19
VMC_BA1 19
VMC_MA2H 19
VMC_MA4H 19
VMC_MA3H 19
VMC_BA2 19
VMC_CS0# 19
VMC_MA11 19
VMC_CAS# 19
VMC_WE# 19
VMC_BA0 19
VMC_MA5H 19
T73
VMC_MA7 19
VMC_MA10 19
VMC_CKE 19
VMC_MA0 19
VMC_MA9 19
VMC_MA6 19
VMC_MA2 19
VMC_MA8 19
VMC_MA3 19
VMC_MA1 19
T184
VMC_CLK0 19
VMC_CLK0# 19
VMC_CLK1 19
VMC_CLK1# 19
T77
T168
T68
THMDAT 30
THMCLK 30
L25
E@10nH
15mil
C277
E@4.7U/6.3V
VCC1.8
F_VREF2 filter can be
remove from nvidia
T84
HANK recommend
G70,G71: Stuff these parts
G72M,G73M : NC
VCC3
R115
R496
*E@2.2K
*E@2.2K
R119
R647
R648
R120
15
VMA_DQ[63..0]18
VMA_DM[7..0]18
VMA_WDQS[7..0]18
VMA_RDQS[7..0]18
VMC_DQ[63..0]19
VMC_DM[7..0]19
VMC_WDQS[7..0]19
VMC_RDQS[7..0]19
VMA_RST
G72M/G73M: STUFF
R311
UMA:NC
E@10K
VMC_RST
R278
E@10K
VGA1.2V
*E@0
THMDAT
*E@0
*E@0
THMCLK
*E@0
Size Document Number Re v
Date: Sheet
VGA_OVT# 17
THERM_ALERT# 22,30
VGA
VMA_RST 18
VMC_RST 19
G72M/G73M: STUFF
UMA:NC
PROJECT : CH3
Quanta Computer Inc.
15 46Tuesday, F ebruary 06, 2007
1
1A
of
15mil
N27
M27
N28
L29
K27
K28
J29
J28
P30
N31
N30
N32
L31
L30
J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29
J27
F27
E27
E28
F28
AD29
AE29
AD28
AC28
AB29
AA30
Y28
AB30
AM30
AF30
AJ31
AJ30
AJ32
AK29
AM31
AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29
AD27
AF27
AE28
M29
M30
G30
F29
AA29
AK30
AC30
AG30
L28
K31
G32
G28
AB28
AL32
AF32
AH30
M28
K32
G31
G27
AA28
AL31
AF31
AH29
E32
C486
*E@.1U-10V
5
U27B
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
FB_VREF1
E@U_GPU_G3
FBA
FBVDD_0
FBVDD_1
FBVDD_2
FBVDD_3
FBVDD_4
FBVDD_5
FBVDD_6
FBVDD_7
FBVDD_8
FBVDD_9
FBVDD_10
FBVDD_11
FBVDD_12
FBVDD_13
FBVDD_14
FBVDD_15
FBVDD_16
FBVDD_17
FBVDD_18
FBVDD_19
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
RFU2
RFU3
FBA_DEBUG
FBA_REFCLK
FBA_REFCLK#
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
A12
A15
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32
V32
AA25
AA26
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
M25
M26
R25
R26
V25
V26
P32
U27
P31
U30
Y31
W32
W31
T32
V27
T28
T31
U32
W29
W30
T27
V28
V30
U31
R27
V29
T30
W28
R29
R30
P29
U28
Y32
P28
R28
Y27
AA27
Y30
AC26
AC27
D32
D31
G23
G25
G24
E@470P/50V
C460
VMA_MA4
VMA_RAS#
VMA_MA5
VMA_BA1
VMA_MA2H
VMA_MA4H
VMA_MA3H
VMA_BA2_CS1#
VMA_CS0#
VMA_MA11
VMA_CAS#
VMA_WE#
VMA_BA0
VMA_MA5H
VMA_MA12
VMA_RST
VMA_MA7
VMA_MA10
VMA_CKE
VMA_MA0
VMA_MA9
VMA_MA6
VMA_MA2
VMA_MA8
VMA_MA3
VMA_MA1
VMA_MA13
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
G73_AC26
VMA_DEBUG
VMA_REFCK
VMA_REFCK#
C421 E@.1U/10V
C345 E@.1U/10V
C394 E@.1U/10V
C513 E@.1U/10V
C430 E@.47U/10V
C436 E@.47U/10V
C309 E@10U/4V
C365 E@.1U/10V
C354 E@.1U/10V
C317 E@.1U/10V
C442 E@.1U/10V
C424 E@.47U/10V
C431 E@.47U/10V
C326 E@10U/4V
PLACE NEAR GPU
C443 E@.1U/10V
C510 E@.1U/10V
C530 E@.1U/10V
C445 E@.1U/10V
C477 E@.47U/10V
C413 E@.47U/10V
C399 E@10U/4V
C526 E@.1U/10V
C377 E@.1U/10V
C336 E@.1U/10V
C343 E@.1U/10V
C432 E@.47U/10V
C429 E@.47U/10V
C423 E@10U/4V
PLACE NEAR GPU
T81
T188
FBA_CMD27
T80
T83
T189
C450
E@4.7U/6.3V
C454
E@4700P/25V
YELLOW
BLOCK is
for G8X
chip only
T85
C426 E@ 4.7U/6.3V
C422 E@.1U /10V
H_PLLVDD
FBA_PLLAVDD
15mil
VCC1.8
VCC1.8
VMA_MA4 18
VMA_RAS# 18
VMA_MA5 18
VMA_BA1 18
VMA_MA2H 18
VMA_MA4H 18
VMA_MA3H 18
VMA_BA2 18
VMA_CS0# 18
VMA_MA11 18
VMA_CAS# 18
VMA_WE# 18
VMA_BA0 18
VMA_MA5H 18
VMA_MA7 18
VMA_MA10 18
VMA_CKE 18
VMA_MA0 18
VMA_MA9 18
VMA_MA6 18
VMA_MA2 18
VMA_MA8 18
VMA_MA3 18
VMA_MA1 18
VMA_CLK0 18
VMA_CLK0# 18
VMA_CLK1 18
VMA_CLK1# 18
T87
pin D31, D32 in NB8X are NC pins
VGA1.2V
L33
E@BLM18PG221SN1D
L34
VGA1.2V
E@10nH
C439
E@.1U/10V
For EMI
4
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63
VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7
VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7
VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7
SLAVE ADDRESS: (1001 100) 94h
VCC3
GFX_THMD-17
GFX_THMD+17
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
R299 * E @1K/F
12
R301
*E@1K/F
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
FB_VREF1
1 2
D D
C C
B B
VCC1.8
VREF = FBVDDQ *
Rbot/(Rtop + Rbot)
Still remain VREF circuit for FAE suggestion
A A
5
YELLOW BLOCK is
IFPABRSET
for G8X chip
only
AC9
AD9
AF9
AF8
15mil
AM4
AL5
45mA
R479 E@0
C290 E@470P/50V
C298 E@4700P/25V
C236 E@10U/6.3V
C284 E@470P/50V
C291 E@4700P/25V
C332 E@10U/6.3V
VCC1.8
R210 E@0
T176
R194 E@1K
15mil
IFPAB_PLLVDD
IFPA_IOVDD
IFPABVPROBE
80mA
VCC1.8
D D
15mil
VCC3
R249 E@0
DACA_VDD
C319 E@470P/50V
C299 E@4700P/25V
C271 E@10U/6.3V
AD10
15mil
15mil
IFPCD_PLLVDD
IFPC_IOVDD
IFPD_IOVDD
NV_PLLVDD
15mil
DACA_VREF
DACA_RSET
IFPCDVPROBE
IFPCDRSET
15mil
DACC_VD
AH10
AH9
AG9
AK3
AH3
AA10
AB10
AD6
AE7
AD7
AH4
AF5
AG4
U10
V8
R5
R7
V7
T9
T10
C306 E@.01U/16V
R204 E@124/F
C C
R206 E@0
VCC1.8
40mA
300mA
need add to 3v
VGA1.2V
40mA
B B
40mA
C318 E@470P/50V
C305 E@4700P/25V
C266 E@10U/6.3V
IFPC_DVI_3V
15mil
IFPC_DVI_3V
15mil
120mA
R228 E@0
R130 E@0
C249 E@470P/50V
C257 E@4700P/25V
C230 E@10U/6.3V
R129 E@0
C229 E@10U/6.3V
C272 E@470P/50V
C283 E@4700P/25V
T20
R181 E@1K
15mil
R199 E@10K
YELLOW BLOCK is
for G8X chip
only
C313 E@.1U/10V
C296 E@4700P/25V
C280 E@10U/6.3V
U27D
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPB_IOVDD
IFPAB_VPROBE
IFPAB_RSET
DACA_VDD
DACA_VREF
DACA_RSET
DACA_IDUMP
DACB_VDD
DACB_VREF
DACB_RSET
DACB_IDUMP
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
IFPCD_PLLGND
IFPC_IOVDD
IFPD_IOVDD
DACC_VDD
DACC_VREF
DACC_RSET
DACC_IDUMP
PLLVDD
VID_PLLVDD
PLLGND
E@U_GPU_G3
4
LVDS
DACA_HSYNC
CRT
DACA_VSYNC
DACA_GREEN
DACB_GREEN
TV
TMDS
DACC_HSYNC
DAC
DACC_VSYNC
DACC_GREEN
XTALOUTBUFF
XTAL
IFPA_TXC#
IFPA_TXC
IFPA_TXD0#
IFPA_TXD0
IFPA_TXD1#
IFPA_TXD1
IFPA_TXD2#
IFPA_TXD2
IFPA_TXD3#
IFPA_TXD3
IFPB_TXC#
IFPB_TXC
IFPB_TXD4#
IFPB_TXD4
IFPB_TXD5#
IFPB_TXD5
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7
I2CA_SCL
I2CA_SDA
DACA_RED
DACA_BLUE
DACB_RED
DACB_BLUE
IFPC_TXC#
IFPC_TXC
IFPC_TXD0#
IFPC_TXD0
IFPC_TXD1#
IFPC_TXD1
IFPC_TXD2#
IFPC_TXD2
IFPD_TXC#
IFPD_TXC
IFPD_TXD4#
IFPD_TXD4
IFPD_TXD5#
IFPD_TXD5
IFPD_TXD6#
IFPD_TXD6
I2CB_SCL
I2CB_SDA
DACC_RED
DACC_BLUE
XTALSSIN
XTALIN
XTALOUT
AJ9
AK9
AJ6
AH6
AH7
AH8
AK8
AJ8
AH5
AJ5
AL4
AK4
AM5
AM6
AL7
AM7
AK5
AK6
AL8
AK7
K2
J3
AF10
AK10
AH11
AJ12
AH12
R6
T5
T6
AM3
AM2
AE1
AE2
AF2
AF1
AH1
AG1
AH2
AG3
AJ1
AK1
AL1
AL2
AJ3
AJ2
H4
J4
AG7
AG5
AF6
AG6
AE5
T2
T1
U1
U2
C_TXLCLKOUTÂC_TXLCLKOUT+
C_TXLOUT0ÂC_TXLOUT0+
C_TXLOUT1ÂC_TXLOUT1+
C_TXLOUT2ÂC_TXLOUT2+
C_TXLCLK1UTÂC_TXLCLK1UT+
C_TXLOUT4ÂC_TXLOUT4+
C_TXLOUT5ÂC_TXLOUT5+
C_TXLOUT6-
C_TXLOUT6+
L_DDCCLK
L_DDCDAT
CRT_HSYNC
CRT_VSYNC
L_CRT_R
L_CRT_G
L_CRT_B
HDMI_SCL
HDMI_SDA
DAC_BLU
R132 E@10K/04
GFX_27MSS
EVGA-XTALI
EVGA-XTALO
C239
E@27P/04
R163 E@0
R162 E@0
R88 E@0
R91 E@0
R75 E@0
R79 E@0
R83 E@0
EX_TXC_HDMI- 25
EX_TXC_HDMI+ 25
EX_TX0_HDMI- 25
EX_TX0_HDMI+ 25
EX_TX1_HDMI- 25
EX_TX1_HDMI+ 25
EX_TX2_HDMI- 25
EX_TX2_HDMI+ 25
HDMI_SCL 25
HDMI_SDA 25
T46
R492 *E@22/04
R493 E@10K/04
5ppm
Y2
2 1
C238
E@27MHZ
3
CRTCLK
CRTDAT
HSYNC_COM
VSYNC_COM
CRT_R
CRT_G
CRT_B
27M_BUFO
E@27P/04
TXLCLK1UT+ 25
TXLCLK1UT- 25
TXLOUT4- 25
TXLOUT4+ 25
TXLOUT5- 25
TXLOUT5+ 25
TXLOUT6- 25
TXLOUT6+ 25
HDMI_SCL
HDMI_SDA
CRTCLK 6,24
CRTDAT 6 ,24
HSYNC_COM 6,24
VSYNC_COM 6,24
CRT_R 6,24
CRT_G 6,24
CRT_B 6,24
R153 E@2K
R154 E@2K
2
OPTION SIGNAL FROM NB FOR UMA VGA
TXLCLKOUT+
RP39 *I@4P2R-S-0
TXLCLKOUTÂTXLOUT0-
TXLOUT0+
TXLOUT1+
TXLOUT1-
TXLOUT2+
TXLOUT2-
3
1
RP32 *I@4P2R-S-0
1
3
RP34 *I@4P2R-S-0
3
1
RP36 *I@4P2R-S-0
1
3
OPTION SIGNAL FROM Nvidia to VGA
C_TXLCLKOUT+
C_TXLCLKOUTÂC_TXLOUT0ÂC_TXLOUT0+
C_TXLOUT1ÂC_TXLOUT1+
C_TXLOUT2ÂC_TXLOUT2+
VCC5
RP38 E@4P2R-S-0
3
1
RP33 E@4P2R-S-0
1
3
RP35 E@4P2R-S-0
1
3
RP37 E@4P2R-S-0
3
1
L_CRT_R
L_CRT_G
L_CRT_B
4
2
2
4
4
2
2
4
4
2
2
4
2
4
4
2
R234 E@150/F
R252 E@150/F
R241 E@150/F
LA_CLK
LA_CLK#
LA_DATAN0
LA_DATAP0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
1
LA_CLK 6
LA_CLK# 6
LA_DATAN0 6
LA_DATAP0 6
LA_DATAP1 6
LA_DATAN1 6
LA_DATAP2 6
LA_DATAN2 6
TXLCLKOUT+ 25
TXLCLKOUT- 25
TXLOUT0- 25
TXLOUT0+ 25
TXLOUT1- 25
TXLOUT1+ 25
TXLOUT2- 25
TXLOUT2+ 25
16
Q8
3
E@AO3409
VGA_GD#
R489 E@10K
3
Q7
E@2N7002E
1
2
1
FOR IFPC VDD LEAKAGE CIRCIUT
VCC3
R121
A A
E@10K
IPFC_C
2
R128
*E@0
15mil
IFPC_DVI_3V
C211
E@.1U/16V
R131 E@0
2 1
VCC3
R497
*E@10K/04
EDIDCLK6,17,25
EDIDDATA6,17,25
I2C ADDRESS: 0xD4H
5
4
SPREAD SPECTRUM
VCC3
U24
8
27M_BUFO
PD#
1
CLKIN
7
SCL
6
SDA
*E@ICS91730AM-T
3
VCC3
R488
*E@10K/04
2
VDD
4
CLKOUT
REFOUT
GND
5
3
ICSS_RFO
When use internal spread spectrum, this part not stuff
close to ICS91730
R483 *E@22/04
GFX27M_L
3V_SSCICSS_PD
R480
*E@10K/04
C215
*E@10P/50V/04
C204
C197
*E@.1U/10V/04
*E@470P/50V/04
GFX_27MSS
R140 *E@4.7/06
C208
C214
*E@4.7U/10V/08
*E@4.7U/10V/08
2
VCC3
Size Document Number Rev
VGA
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
16 46Tuesday, February 06, 2007
1
of
1A
5
hexainf@hotmail.com
VCC3
C295 E@.1U/10V
MIOACAL_PU
T23
MIOACAL_PD
T159
MIOA_VREF
D D
T169
15mil PCI_DEVICE2
15mil
VCC3
C C
B B
YELLOW
BLOCK is
for G8X
chip
only
T161
T37
T42
GREEN
BLOCK can
remove if
use G8X
GFX_THMD-15
GFX_THMD+15
GPIO13
DACB_CSYNC
GPIO14
T157
T171
T36
T154
T71
T67
T69
T180
T182
T165
T160
T51
T38
T57
VGA_FU13
VGA_FU14
VGA_FU15
VGA_FU16
T32
T52
T43
T63
C308 E@.1U/10V
T172
MIOBCAL_PU
T155
MIOBVREF
T164
GFX_THMDÂGFX_THMD+
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
STRAP
VGA_FU7
VGA_FU8
VGA_FU11
VGA_FU12
VGA_FU17
VGA_FU18
VGA_FU19
VGA_FU20
U27E
M7
MIOA_VDDQ_0
M8
MIOA_VDDQ_1
R8
MIOA_VDDQ_2
T8
MIOA_VDDQ_3
U9
MIOA_VDDQ_4
L3
MIOACAL_PU_GND
L1
MIOACAL_PD_VDDQ
L2
MIOA_VREF
AA8
MIOB_VDDQ_0
AB7
MIOB_VDDQ_1
AB8
MIOB_VDDQ_2
AC6
MIOB_VDDQ_3
AC7
MIOB_VDDQ_4
Y1
MIOBCAL_PD_VDDQ
Y3
MIOBCAL_PU_GND
Y2
MIOB_VREF
J1
THERMDN
K1
THERMDP
AJ11
JTAG_TCK
AK11
JTAG_TMS
AK12
JTAG_TDI
AL12
JTAG_TDO
AL13
JTAG_TRST#
F1
STRAP
U3
RFU6
V3
RFU7
U6
RFU8
U5
RFU9
U4
RFU10
V4
RFU11
V6
RFU12
W3
RFU13
V1
RFU14
Y5
RFU15
W1
RFU16
W4
RFU17
W5
RFU18
V5
RFU19
Y6
RFU20
E@U_GPU_G3
MIOAD
MIOBD
THERMAL
GPIO
MEMSTRAPSEL0
MEMSTRAPSEL1
MEMSTRAPSEL2
MEMSTRAPSEL3
ROM
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE
MIOA_CTL3
MIOA_CLKOUT
MIOA_CLKOUT#
MIOA_CLKIN
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOB_VSYNC
MIOB_HSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT#
MIOB_CLKIN
CLAMP
I2CC_SCL
I2CC_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
ROMCS#
ROM_SI
ROM_SO
ROM_SCLK
I2CH_SCL
I2CH_SDA
BUFRST#
STEREO
SWAPRDY_A
TESTMEMCLK
TESTMODE
P2
N2
N1
N3
M1
M3
P5
N6
N5
M4
L4
L5
R3
R1
P1
P3
R4
P4
M5
AC3
AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5
AE3
AF3
AD1
AD3
AD4
AD5
AE4
F6
G2
G1
K3
H1
K5
G5
E2
J5
G6
K6
E1
D2
H5
F4
E3
AE26
AD26
AH31
AH32
AA4
W2
AA6
AA7
G3
H3
F3
T3
M6
A26
H2
4
MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11
MIOAHSYNC
MIOAVSYNC
MIOADE
MIOACTL3
MIOA_CKO
MIOA_CKO#
MIOA_CKI
MIOBD0
MIOBD1
MIOBD2
VIPD3
VIPD4
VIPD5
MIOBD6MIOBCAL_PD
MIOBD7
MIOBD8
MIOBD9
VIPD10
VIPD11
ROMTYPE1
3GIO_PADCFG3
MIOB_DE
G73_AD3
G73_AD4
G73_AD5
MIOB_CKI
G73_F6
EXT_SDAT
HDMI_DET
DVI_DET
G72_DISP_ON
R136 E@0
GFX_VID0
GFX_VID1
GFX_VID2
GPIO8
VGA_OVT#
GPIO10
GPIO11
GFX_GPIO12
MSTRAPSEL0
MSTRAPSEL1
MSTRAPSEL2
MSTRAPSEL3
ROM_CS#
ROM_SI
ROM_SO
ROM_CK
HDCP_SCL
HDCP_SDA
RESET_BUF#
STEREO
SWAPRDY_A
VGA_TEST
VGA_TMODE
R123 E@10K
R124 E@10K
R133 E@10K
R122 E@10K
R186 E@10K
R135 E@0
R137 E@0
R282 E@10K
R138 E@10K
T34
T61
T16
T162
T158
T170
T156
T41
T29
T166
T45
T39
T17
T56
T26
T167
T53
T33
T163
T79
T82
T185
T186
T22
T153
T55
T60
T18
T173
T62
T54
T24
MIOAD2/3/4/5 set to
1111 for EDID panel
R191 E@10K
VCC3
R166
E@10K
R165 *E@10K
R504 *E@10K
R144
E@10K
EDIDCLKEXT_SCLK
EDIDDATA
HDMI_DET 25
BLON
VCC3
MIOA_CKI through a 10K
resistor to G N D from Lincia
MIOBD7 pull down for G73M
and pull high for NB8P,
MIOB_DE pull up for
G73,pull down for NB8P from
VCC3
nvidia Lincia recommend
EDIDCLK 6,16,25
EDIDDATA 6,16,25
BLON 6,25
VGA_OVT# 15
VGACORECTL
3
PCI DEVICE
PCI_DEVICE[3:0]
MIOBD2 set to 0 and MIOBD6 set to 1 from Lincia
GFX_VID0
H : Low Voltage
L : Normal Voltage
HI
LO
1000
0101
0110
0111
others
MIOBD2
MIOBD6
G73M
1.0V
1.1V
DESCRIPTION
G72M/G73M
NB8P-SE
G72M-Z
NB8P-GS
Reserved
R141 E@10K
R167 E@10K
GFX_VID0
JTAG_TMS
JTAG_TDI
JTAG_TCK
JTAG_TRST#
HDMI_DET
GFX_VID0
ECPWROK
DVI_DET
VCC3
R201 *E@2K
R213 *E@10K
R222 *E@10K
R229 *E@10K
R250 E@10K
R164 *E@2K
R139 *E@2K
R484 E@0
3VPCU
U6
2
1
*E@TC7SH08FU
2
R143 *E@10K
R142 *E@10K
R145 E@10K
R192 E@10K
R176 E@10K
R171 *E@2K
R490 E@2K
SHARE M/B SYSTEM BIOS, SUB VENDOR
ID NEED PULL DOWN .
VCC3
GPIO1 PULL
DOWN strap can
be remove from
nvidia HANK
recommend
4
3 5
MIOBD0MIOAD6
MIOBD1
MIOBD8
MIOBD9
VIPD4
VIPD5
VIPD3
VIPD11
G73_AD3
MIOAHSYNC
MIOAD1
V_PWRCNTL 38
NB8P VRAM Con figuration Table
0000
0001
0010
0011 Samsung
0100
0101
0110
0111
ECPWROK6,22,36
R503 E@10K
R502 E@10K
R505 *E@10K
R188 *E@10K
R501 E@2K
R499 *E@2K
R500 E@2K
R189 *E@2K
R183 *E@2K
R175 E@2K
Reserved
DDR3 16Mx32-136ball,128bit
DDR3 16Mx32-136ball,128bit
DDR3 16Mx32-136ball,128bit
Reserved
DDR3 8Mx32-136ball,128bit
DDR3 8Mx32-136ball,128bit
Update configuration table
nicole 12/01
R487 E@0
G72_DISP_ON
U7
*E@TC7SH08FU
1
VCC3
RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3
PCI_DEVICE0
PCI_DEVICE1
PCI_DEVICE3
PCI_DEVICE4
SLOT_CLOCK_CFG
SUB_VENDOR
DESCRIPTIONRAM_CFG[3:0]
3VPCU
2
1
3 5
17
PCI_DEVICE[3:0]
Default are
"0",can remove
pull down
resister from
nvidia HANK
recommend
Vendor
Qimonda
Hynix
Qimonda
HynixDDR3 8Mx32-136ball,128bit
Samsung
4
DIGON 6,25
VCC3
R495
HDCP_SDA
E@10K
HDCP_SCL
A A
R494
E@10K
U22
5
SDA
3
NC
6
SCL
2
NC2
E@AT88SC0808C
VCC
VCC
GND
GND
VCC3
R491 E@2K
8
7
C686
E@.1U/10V
1
4
Default are
"0",can remove
pull down resister
from nvidia HANK
recommend
MIOAD0
MIOAD6
MIOAD8
MIOAD9
3GIO_PADCFG3
R150 *E@2K
R193 E@2K
R209 *E@2K
R182 *E@2K
R168 *E@2K
configure the G P U PCI-E interface 0001---Mobile
for HDMI function
5
4
3
VCC3
PEX_PLL_EN
3GIO_PADCFG0
3GIO_PADCFG1
3GIO_PADCFG2
3GIO_PADCFG3
Size Document Number Rev
VGA
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
17 46Tuesday, February 06, 2007
1
1A
5
4
3
2
1
External VGA Memory
VMA_DQ2
VMA_DQ4
D D
C C
VMA_CLK0#15
VMA_CLK015
B B
Programmable impedance output
buffer and active terminator
EX: 240 Ohm is required for
an output impedance of 40 Ohm
VMA_BA215
VMA_BA115
VMA_BA015
VMA_MA1115
VMA_MA1015
VMA_MA915
VMA_MA815
VMA_MA715
VMA_MA615
VMA_MA515
VMA_MA415
VMA_MA315
VMA_MA215
VMA_MA115
VMA_MA015
VMA_CS0#15
VMA_WE#15
VMA_RAS#15
VMA_CAS#15
VMA_CKE15
R525 E@243/F
VMA_RST15
R315
E@475
VMA_DQ0
VMA_DQ1
VMA_DQ3
VMA_DQ6
VMA_DQ7
VMA_DQ5
VMA_DQ9
VMA_DQ8
VMA_DQ11
VMA_DQ10
VMA_DQ15
VMA_DQ14
VMA_DQ12
VMA_DQ13
VMA_DQ27
VMA_DQ24
VMA_DQ28
VMA_DQ25
VMA_DQ31
VMA_DQ26
VMA_DQ30
VMA_DQ29
VMA_DQ17
VMA_DQ16
VMA_DQ18
VMA_DQ20
VMA_DQ22
VMA_DQ21
VMA_DQ23
VMA_DQ19
VMA_BA2
VMA_BA1
VMA_BA0
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0
VMA_CS0#
VMA_WE#
VMA_RAS#
VMA_CAS#
VMA_CKE
VMA_RDQS0
VMA_RDQS1
VMA_RDQS3
VMA_RDQS2
VMA_WDQS0
VMA_WDQS1
VMA_WDQS3
VMA_DM0
VMA_DM1
VMA_DM3
VMA_DM2
VMA_RST
DDR3_VREF0
DDR3_VREF#0
R10
R11
M10
N11
M11
G10
C10
C11
H10
H11
D10
D11
N10
H12
T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
L10
F11
F10
E11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2
G9
G4
L4
K2
M9
K11
L9
K10
K9
M4
K3
H2
K4
F9
H9
H3
F4
H4
J10
J11
P3
P10
D3
P2
P11
D2
N3
E10
E3
V9
A4
H1
VMA_DQ[63..0] 15
VMA_DM[7..0] 15
VMA_WD Q S [7..0] 15
VMA_RDQS[7..0] 15
U29
DQ31 | DQ23
DQ30 | DQ22
DQ29 | DQ21
DQ28 | DQ20
DQ27 | DQ19
DQ26 | DQ18
DQ25 | DQ17
DQ24 | DQ16
DQ23 | DQ31
DQ22 | DQ30
DQ21 | DQ29
DQ20 | DQ28
DQ19 | DQ27
DQ18 | DQ26
DQ17 | DQ25
DQ16 | DQ24
DQ15 | DQ7
DQ14 | DQ6
DQ13 | DQ5
DQ12 | DQ4
DQ11 | DQ3
DQ10 | DQ2
DQ9 | DQ1
DQ8 | DQ0
DQ7 | DQ15
DQ6 | DQ14
DQ5 | DQ13
DQ4 | DQ12
DQ3 | DQ11
DQ2 | DQ10
DQ1 | DQ9
DQ0 | DQ8
BA2 | RAS
BA1 | BA0
BA0 | BA1
A11 | A7
A10 | A8
A9 | A3
A8/AP | A10
A7 | A11
A6 | A2
A5 | A1
A4 | A0
A3 | A9
A2 | A6
A1 | A5
A0 | A4
CS | CAS
WE | CKE
RAS | BA2
CAS | CS
CKE | WE
CK
CK
RDQS3 | RDQS2
RDQS2 | RDQS3
RDQS1 | RDQS0
RDQS0 | RDQS1
WDQS3 | WDQS2
WDQS2 | WDQS3
WDQS1 | WDQS0
WDQS0 | WDQS1
DM3 | DM2
DM2 | DM3
DM1 | DM0
DM0 | DM1
RESET
ZQ
VREF
VREF#H12
VDDQ#A12
VDDQ#C1
VDDQ#C4
VDDQ#C9
VDDQ#C12
VDDQ#E1
VDDQ#E4
VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9
VDDQ#N12
VDDQ#R1
VDDQ#R4
VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1
VSSQ#D4
VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA#K12
VSSA#J12
GND | VDD
136 FBGA
E@GDDR3-512M(500MHZ)
A1
VDDQ
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
VDD
A11
F1
F12
M1
M12
V2
V11
B1
VSSQ
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
VSS
A10
G1
G12
L1
L12
V3
V10
GDDR3_VDDA0
K1
VDDA
VSSA
RFU2
RFU1
RFU0
GDDR3_VDDA#0
K12
C520
E@.1U
J12
J1
J3
J2
V4
R528 E@0
A9
MF
MIRROR FUNCTION
Low==>136 FBGA(NORMAL)
High==>136 FBGA(REVERSE)
256/512 Mbit GDDRIII Channels
C508 E@ . 022U
C505 E@ . 022U
C512 E@ . 022U
C500 E@ . 022U
C497 E@ . 022U
C490 E@ . 022U
C485 E@ . 022U
C479 E@ . 022U
C469 E@ . 022U
+
C503 E@10U
C493 E@22U
C464 E@220P
C456 E@4700P
C459 E@.1U
+
C495 E@10U
C494 E@22U
L39 E@BLM18PG181SN1D
C498
E@.1U
VMA_MA3H15
VMA_MA2H15
VMA_MA5H15
VMA_MA4H15
VCC1.8
VMA_CLK1#15
VMA_CLK115
E@475
R312 E@ 243/F
Programmable impedance output
buffer and active terminator
EX: 240 Ohm is required for
an output impedance of 40 Ohm
R308
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ36
VMA_DQ32
VMA_DQ35
VMA_DQ33
VMA_DQ34
VMA_DQ55
VMA_DQ53
VMA_DQ54
VMA_DQ52
VMA_DQ51
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ61
VMA_DQ62
VMA_DQ63
VMA_DQ57
VMA_DQ58
VMA_DQ60
VMA_DQ59
VMA_DQ56
VMA_DQ43
VMA_DQ44
VMA_DQ41
VMA_DQ42
VMA_DQ45
VMA_DQ40
VMA_DQ47
VMA_DQ46
VMA_RAS#
VMA_BA0
VMA_BA1
VMA_MA7
VMA_MA8
VMA_MA10
VMA_MA11
VMA_MA1
VMA_MA0
VMA_MA9
VMA_MA6
VMA_CAS#
VMA_CKE
VMA_BA2
VMA_CS0#
VMA_WE#
VMA_RDQS4
VMA_RDQS6
VMA_RDQS7
VMA_RDQS5
VMA_WDQS4
VMA_WDQS6
VMA_WDQS7
VMA_WDQS5VMA_WDQS2
VMA_DM4
VMA_DM6
VMA_DM7
VMA_DM5
VMA_RST
DDR3_VREF1
DDR3_VREF#1
U30
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
A4
ZQ
H1
VREF
H12
VREF#H12
136 FBGA
E@GDDR3-512M(500MHZ)
VDDQ
VDDQ#A12
VDDQ#C1
VDDQ#C4
VDDQ#C9
VDDQ#C12
VDDQ#E1
VDDQ#E4
VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9
VDDQ#N12
VDDQ#R1
VDDQ#R4
VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1
VSSQ#D4
VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VDDA#K12
VSSA#J12
VSSA
RFU2
RFU1
RFU0
GND | VDD
VCC1.8VCC1.8
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
VSS
A10
G1
G12
L1
L12
V3
V10
K1
K12
C502
E@.1U
J12
J1
J3
J2
V4
R524 E@0
A9
MF
MIRROR FUNCTION
Low==>136 FBGA(NORMAL)
High==>136 FBGA(REVERSE)
C511 E@ .022U
C776 E@ .022U
C773 E@ .022U
C772 E@ .022U
C771 E@ .022U
C777 E@ .022U
C525 E@ .022U
C524 E@ .022U
C522 E@ .022U
+
C529 E@10U
C779 E@22U
C514 E@220P
C515 E@4700P
C775 E@.1U
+
C519 E@10U
C778 E@22U
GDDR3_VDDA1
GDDR3_VDDA#1
C516
E@.1U
VCC1.8
18
L40 E@BLM18PG181SN1DL36 E@BLM18PG181SN1D
L37 E@BLM18PG181SN1D
VCC1.8
VCC1.8
A A
R303
E@2.37K/F
R304
E@5.49K/F
DDR3_VREF0
VREF = .72*VDDQ
C499
E@.1U
5
R310
E@2.37K/F
R309
E@5.49K/F
DDR3_VREF#0
C521
E@.1U
4
VCC1.8 VCC1.8VCC1.8
R313
E@2.37K/F
R314
E@5.49K/F
DDR3_VREF1
C528
E@.1U
R306
E@2.37K/F
DDR3_VREF#1
VREF = .72*VDDQVREF = .72*VDDQVREF = .72*VDDQ
R302
E@5.49K/F
3
C501
E@.1U
2
Size Document Number Re v
NVG73M VRAM-1(GDDR3)
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
18 46Tuesday, February 06, 2007
1
of
1A
5
hexainf@hotmail.com
4
3
2
1
VDDQ
VDDQ#A12
VDDQ#C1
VDDQ#C4
VDDQ#C9
VDDQ#C12
VDDQ#E1
VDDQ#E4
VDDQ#E9
VDDQ#E12
VDDQ#J4
VDDQ#J9
VDDQ#N1
VDDQ#N4
VDDQ#N9
VDDQ#N12
VDDQ#R1
VDDQ#R4
VDDQ#R9
VDDQ#R12
VDDQ#V1
VDDQ#V12
VDD
VDD#A11
VDD#F1
VDD#F12
VDD#M1
VDD#M12
VDD#V2
VDD#V11
VSSQ
VSSQ#B4
VSSQ#B9
VSSQ#B12
VSSQ#D1
VSSQ#D4
VSSQ#D9
VSSQ#D12
VSSQ#G2
VSSQ#G11
VSSQ#L2
VSSQ#L11
VSSQ#P1
VSSQ#P4
VSSQ#P9
VSSQ#P12
VSSQ#T1
VSSQ#T4
VSSQ#T9
VSSQ#T12
VSS#A10
VSS#G1
VSS#G12
VSS#L1
VSS#L12
VSS#V3
VSS#V10
VDDA
VDDA#K12
VSSA#J12
VSSA
RFU2
RFU1
RFU0
GND | VDD
VCC1.8
R512
E@2.37K/F
R515
E@5.49K/F
VMC_DQ[63..0] 15
VMC_DM[7..0] 15
VMC_WDQS[7..0] 15
VMC_RDQS[7..0] 15
VCC1.8
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
VSS
A10
G1
G12
L1
L12
V3
V10
GDDR3_VDDA2
K1
GDDR3_VDDA#2
K12
C716
E@.1U
J12
J1
J3
J2
V4
R148 E@0
A9
MF
MIRROR FUNCTION
Low==>136 FBGA(NORMAL)
High==>136 FBGA(REVERSE)
DDR3_VREF#2
VREF = .72*VDDQ
C708
E@.1U
4
256/512 Mbit GDDRIII Channels
C440 E@ .022U
C433 E@ .022U
C340 E@ .022U
C244 E@ .022U
C248 E@ .022U
C251 E@ .022U
C258 E@ .022U
C267 E@ .022U
C281 E@ .022U
+
C218 E@10U
C489 E@22U
C294 E@220P
C312 E@4700P
C325 E@.1U
+
C219 E@10U
C221 E@22U
L24 E@BLM18PG181SN1D
L58 E@BLM18PG181SN1D
C286
E@.1U
VMC_MA3H15
VMC_MA2H15
VMC_MA5H15
VMC_MA4H15
VCC1.8
VMC_CLK1#15
VMC_CLK115VMC_CLK0#15
E@475
R300 E@ 2 43/F
Programmable impedance output
buffer and active terminator
EX: 240 Ohm is required for
an output impedance of 40 Ohm
VCC1.8 VCC1.8
R520
E@2.37K/F
R523
E@5.49K/F
3
DDR3_VREF3
C765
E@.1U
R285
VMC_DQ55
VMC_DQ54
VMC_DQ49
VMC_DQ52
VMC_DQ48
VMC_DQ51
VMC_DQ50
VMC_DQ53
VMC_DQ62
VMC_DQ60
VMC_DQ63
VMC_DQ61
VMC_DQ58
VMC_DQ57
VMC_DQ56
VMC_DQ59
VMC_DQ44
VMC_DQ43
VMC_DQ47
VMC_DQ46
VMC_DQ42
VMC_DQ45
VMC_DQ40
VMC_DQ41
VMC_DQ34
VMC_DQ35
VMC_DQ33
VMC_DQ32
VMC_DQ39
VMC_DQ37
VMC_DQ36
VMC_DQ38
VMC_RAS#
VMC_BA0
VMC_BA1
VMC_MA7
VMC_MA8
VMC_MA10
VMC_MA11
VMC_MA1
VMC_MA0
VMC_MA9
VMC_MA6
VMC_CAS#
VMC_CKE
VMC_BA2
VMC_CS0#
VMC_WE#
VMC_RDQS6
VMC_RDQS7
VMC_RDQS5
VMC_RDQS4
VMC_WDQS6
VMC_WDQS7
VMC_WDQS5
VMC_WDQS4
VMC_DM6
VMC_DM7
VMC_DM5
VMC_DM4
VMC_RST
DDR3_VREF3
DDR3_VREF#3
R297
E@2.37K/F
R296
E@5.49K/F
U28
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
A4
ZQ
H1
VREF
H12
VREF#H12
136 FBGA
E@GDDR3-512M(500MHZ)
DDR3_VREF#3
VREF = .72*VDDQVREF = .72*VDDQ
C471
E@.1U
VCC1.8
A1
VDDQ
A12
VDDQ#A12
C1
VDDQ#C1
C4
VDDQ#C4
C9
VDDQ#C9
C12
VDDQ#C12
E1
VDDQ#E1
E4
VDDQ#E4
E9
VDDQ#E9
E12
VDDQ#E12
J4
VDDQ#J4
J9
VDDQ#J9
N1
VDDQ#N1
N4
VDDQ#N4
N9
VDDQ#N9
N12
VDDQ#N12
R1
VDDQ#R1
R4
VDDQ#R4
R9
VDDQ#R9
R12
VDDQ#R12
V1
VDDQ#V1
V12
VDDQ#V12
A2
VDD
A11
VDD#A11
F1
VDD#F1
F12
VDD#F12
M1
VDD#M1
M12
VDD#M12
V2
VDD#V2
V11
VDD#V11
B1
VSSQ
B4
VSSQ#B4
B9
VSSQ#B9
B12
VSSQ#B12
D1
VSSQ#D1
D4
VSSQ#D4
D9
VSSQ#D9
D12
VSSQ#D12
G2
VSSQ#G2
G11
VSSQ#G11
L2
VSSQ#L2
L11
VSSQ#L11
P1
VSSQ#P1
P4
VSSQ#P4
P9
VSSQ#P9
P12
VSSQ#P12
T1
VSSQ#T1
T4
VSSQ#T4
T9
VSSQ#T9
T12
VSSQ#T12
A3
VSS
A10
VSS#A10
G1
VSS#G1
G12
VSS#G12
L1
VSS#L1
L12
VSS#L12
V3
VSS#V3
V10
VSS#V10
K1
VDDA
K12
VDDA#K12
J12
VSSA#J12
J1
VSSA
J3
RFU2
J2
RFU1
V4
RFU0
A9
MF
GND | VDD
2
C474 E@ . 022U
C466 E@ . 022U
C419 E@ . 022U
C412 E@ . 022U
C401 E@ . 022U
C395 E@ . 022U
C379 E@ . 022U
C367 E@ . 022U
C391 E@ . 022U
+
C480 E@10U
C492 E@22U
C504 E@220P
C473 E@4700P
C509 E@.1U
+
C470 E@10U
C491 E@22U
GDDR3_VDDA3
GDDR3_VDDA#3
C448
C752
E@.1U
E@.1U
R298 E@0
MIRROR FUNCTION
Low==>136 FBGA(NORMAL)
High==>136 FBGA(REVERSE)
Update to 1.8V for reverse config.
nicole 10/9
Size Document Number Re v
NVG73M VRAM- 2 (GDDR3)
Date: Sheet
L60 E@BLM18PG181SN1D
L32 E@BLM18PG181SN1D
VCC1.8
PROJECT : CH3
Quanta Computer Inc.
1
External VGA Memory
VMC_DQ29
VCC1.8
R198
E@2.37K/F
R184
E@5.49K/F
VMC_DQ30
VMC_DQ31
VMC_DQ27
VMC_DQ28
VMC_DQ25
VMC_DQ26
VMC_DQ24
VMC_DQ10
VMC_DQ9
VMC_DQ12
VMC_DQ13
VMC_DQ15
VMC_DQ11
VMC_DQ8
VMC_DQ14
VMC_DQ16
VMC_DQ19
VMC_DQ18
VMC_DQ17
VMC_DQ23
VMC_DQ20
VMC_DQ22
VMC_DQ21
VMC_DQ0
VMC_DQ1
VMC_DQ7
VMC_DQ6
VMC_DQ2
VMC_DQ4
VMC_DQ3
VMC_DQ5
DDR3_VREF2
VREF = .72*VDDQ
C254
E@.1U
VMC_BA2
VMC_BA1
VMC_BA0
VMC_MA11
VMC_MA10
VMC_MA9
VMC_MA8
VMC_MA7
VMC_MA6
VMC_MA5
VMC_MA4
VMC_MA3
VMC_MA2
VMC_MA1
VMC_MA0
VMC_CS0#
VMC_WE#
VMC_RAS#
VMC_CAS#
VMC_CKE
VMC_RDQS3
VMC_RDQS1
VMC_RDQS2
VMC_RDQS0
VMC_WDQS3
VMC_WDQS1
VMC_WDQS2
VMC_WDQS0
VMC_DM3
VMC_DM1
VMC_DM2
VMC_DM0
VMC_RST
DDR3_VREF2
DDR3_VREF#2
D D
C C
VMC_CLK015
B B
R149 E@243/F
Programmable impedance output
buffer and active terminator
EX: 240 Ohm is required for
an output impedance of 40 Ohm
A A
E@475
R208
VMC_BA215
VMC_BA115
VMC_BA015
VMC_MA1115
VMC_MA1015
VMC_MA915
VMC_MA815
VMC_MA715
VMC_MA615
VMC_MA515
VMC_MA415
VMC_MA315
VMC_MA215
VMC_MA115
VMC_MA015
VMC_CS0#15
VMC_WE#15
VMC_RAS#15
VMC_CAS#15
VMC_CKE15
VMC_RST15
5
U26
T3
DQ31 | DQ23
T2
DQ30 | DQ22
R3
DQ29 | DQ21
R2
DQ28 | DQ20
M3
DQ27 | DQ19
N2
DQ26 | DQ18
L3
DQ25 | DQ17
M2
DQ24 | DQ16
T10
DQ23 | DQ31
T11
DQ22 | DQ30
R10
DQ21 | DQ29
R11
DQ20 | DQ28
M10
DQ19 | DQ27
N11
DQ18 | DQ26
L10
DQ17 | DQ25
M11
DQ16 | DQ24
G10
DQ15 | DQ7
F11
DQ14 | DQ6
F10
DQ13 | DQ5
E11
DQ12 | DQ4
C10
DQ11 | DQ3
C11
DQ10 | DQ2
B10
DQ9 | DQ1
B11
DQ8 | DQ0
G3
DQ7 | DQ15
F2
DQ6 | DQ14
F3
DQ5 | DQ13
E2
DQ4 | DQ12
C3
DQ3 | DQ11
C2
DQ2 | DQ10
B3
DQ1 | DQ9
B2
DQ0 | DQ8
H10
BA2 | RAS
G9
BA1 | BA0
G4
BA0 | BA1
L4
A11 | A7
K2
A10 | A8
M9
A9 | A3
K11
A8/AP | A10
L9
A7 | A11
K10
A6 | A2
H11
A5 | A1
K9
A4 | A0
M4
A3 | A9
K3
A2 | A6
H2
A1 | A5
K4
A0 | A4
F9
CS | CAS
H9
WE | CKE
H3
RAS | BA2
F4
CAS | CS
H4
CKE | WE
J10
CK
J11
CK
P3
RDQS3 | RDQS2
P10
RDQS2 | RDQS3
D10
RDQS1 | RDQS0
D3
RDQS0 | RDQS1
P2
WDQS3 | WDQS2
P11
WDQS2 | WDQS3
D11
WDQS1 | WDQS0
D2
WDQS0 | WDQS1
N3
DM3 | DM2
N10
DM2 | DM3
E10
DM1 | DM0
E3
DM0 | DM1
V9
RESET
A4
ZQ
H1
VREF
H12
VREF#H12
136 FBGA
E@GDDR3-512M(500MHZ)
19
19 46Tuesday, February 06, 2007
of
VCC1.8
1A
5
RTC
3VPCU
VCCRTC_2
R417
1K
D D
1
2
RTC CONN
5VPCU
C C
B B
20MIL
R421 2.2K
R414
4.7K
R411
15K
VCCRTC
D22
CH500H-40
D21
CH500H-40
BT1
1
2
VCCRTC_1
CKL:1n ~ 20nF
CKL:1n ~ 20nF
VCCRTC
R365
1M/F
Q16
R374
20K
MMBT3904
2
C577
1U/16V
13
SATA_RXN033
SATA_RXP033
SATA_LED#33
SATA_TXN033
SATA_TXP033
C579
1U/16V
CLK_PCIE_SATA#2
CLK_PCIE_SATA2
Place near to Mini-door
12
G1
*SHORT_ PAD1
+1.5V_PCIE
C551 3900P/25V
C552 3900P/25V
T98
T99
T196
T195
R325 24.9/F
Place within
500 mils of
ICH7
R397 24.9/F
ACZ_SDIN034
ACZ_SDIN134
4
CKL:C1/C2: 18pF -> CL:12.5pF
C1/C: 10pF -> CL Value =
8.5pF
CLK_32KX1
C814
18P
23
32.768KHZ
C841
18P
T207
T138
T132
T203
T133
T131
T137
T130
T204
Y7
T201
T110
T114
T191
T190
T97
T95
R582
10M
4 1
CLK_32KX2
RTCRST#
SM_INTRUDER#
ICH_INTVRMEN
LAN100_SLP
LAN_JCLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GLAN_COMP_SB
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDOUT
SATA_LED#
SATA_TXN0_C
SATA_TXP0_C
SATA_RXN2_C
SATA_RXP2_C
SATA_TXN2_C
SATA_TXP2_C
SATA_BIAS
25mils/15mils
U33A
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
ICH8M REV 1.0
3
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
RTCLAN / GLAN
LPCCPU
A20GATE
DPRSTP#
DPSLP#
CPUPWRGD/GPIO49
IGNNE#
STPCLK#
THRMTRIP#
IHDA
IDE
SATA
DDACK#
A20M#
FERR#
INIT#
INTR
RCIN#
SMI#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
DIOR#
DIOW#
IDEIRQ
IORDY
DDREQ
2
1
20
VCC3
VCC3
R340
R336
10K
H_DPRSTP# 3,6,37
H_DPSLP# 3
VCCP
R36
56
1 2
C797
*10P/50V
C806
*10P/50V
10K
VCCP
R597
56/F
H_FERR# 3
PM_THRMTRIP# 3,6
C795
*10P/50V
C807
*10P/50V
ACZ_SDOUT0 34
ACZ_SDOUT1 34
ACZ_SYNC0 34
ACZ_SYNC1 34
E5
F5
G8
F6
C4
LDRQ#0
G9
LDRQ#1
E6
GATEA20
AF13
AG26
H_DPRSTP#_R
AF26
H_DPSLP#_R
AE26
AD24
AG29
AF27
AE24
AC20
RCIN#
AH14
AD23
NMI
TP8
AG28
AA24
AE27
AA23
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
Y6
Y5
W4
W3
Y2
Y3
Y1
W5
H_SMI#_R
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0
PDA1
PDA2
IRQ14
PDIORDY
LAD0 31,36
LAD1 31,36
LAD2 31,36
LAD3 31,36
LFRAME# 31,36
T104
T100
R602 0/F
R612 0/F
R609 0/F
H_THERMTRIP_R
T140
GATEA20 36
H_A20M# 3
PDD[15:0] 33
PDA[2:0] 33
PDCS1# 33
PDCS3# 33
PDIOR# 33
PDIOW# 33
PDDACK# 33
IRQ14 33
PIORDY 33
PDDREQ 33
VCCP
R605
*56/F
H_PWRGD 3
H_IGNNE# 3
H_INIT# 3
H_INTR 3
RCIN# 36
H_NMI 3
H_SMI# 3
H_STPCLK# 3
R611 24.9 /F
RCIN#
GATEA20
R413
*56/F
R606 0
R611 2" close ICH8 and R36 2'' close to R611
HD Audio to Codec and Modem
ACZ_SDOUT
ACZ_SYNC
R332 33
R335 33
R364 33
R361 33
SB Strap
ICH8-M Internal VR Enable
strap
(Internal VR for
Vccsus1_05,VccSus1_5 and
VccCL1_5)
INTVRMEN
A A
Low = Internal VR disable
High = Internal VR
enable(Default)
VCCRTC VCCRTC VCC3
R572
332K/F
ICH_INTVRMEN LAN100_SLP ACZ_SDOUT
R399
*0
5
ICH8-M LAN100_SLP Strap
(Internal VR for VccLAN1_05 and
VccCL1.05)
LAN100_SLP
Low = Internal VR disable
High = Internal VR
enable(Default)
R571
332K/F
R379
*0
4
XOR Chain Entrance Strap
HDA_SDOUT
ICH_RSV0
0
0
1
1 Set PCIE port config bit 1
R562
*1K
R385
*1K
Description
0
1
1
RSVD
Enter XOR Chain
Normal opration(Default)0
ICH_TP3 22
3
ACZ_BCLK
C571
*10P/50V
2
ACZ_RST#
R355 33
R350 33
C802
*10P/50V
R338 33
R342 33
C800
*10P/50V
Size Document Number Rev
ICH8M
Date: Sheet
C804
*10P/50V
C799
*10P/50V
PROJECT : CH3
Quanta Computer Inc.
1
BIT_CLK0 34
BIT_CLK1 34
ACZ_RST#0 34
ACZ_RST#1 34
20 46Tuesday, February 06, 2007
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1A
5
hexainf@hotmail.com
PCIE_RXN031
PCIE_RXP031
PCIE_RXN331
PCIE_RXP331
PCIE_TXN331
PCIE_TXP331
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
INTA#
INTB#
INTC#
INTD#
PCIE_TXN031
PCIE_TXP031
PCIE_RXN128
PCIE_RXP128
PCIE_TXN128
PCIE_TXP128
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
PCIE_RXN4
T149
PCIE_RXP4
T146
PCIE_TXN4
T214
PCIE_TXP4
T212
PCIE_RXN2_LAN32
PCIE_RXP2_LAN32
PCIE_TXN2_LAN32
PCIE_TXP2_LAN32
T143
T139
T145
T144
T142
U33B
D20
AD0
E19
AD1
D19
AD2
A20
AD3
D17
AD4
A21
AD5
A19
AD6
C19
AD7
A18
AD8
B16
AD9
A12
AD10
E16
AD11
A14
AD12
G16
AD13
A15
AD14
B6
AD15
C11
AD16
A9
AD17
D11
AD18
B12
AD19
C12
AD20
D10
AD21
C7
AD22
F13
AD23
E11
AD24
E13
AD25
E12
AD26
D8
AD27
A6
AD28
E8
AD29
D6
AD30
A3
AD31
Interrupt I/F
F9
PIRQA#
B5
PIRQB#
C5
PIRQC#
A10
PIRQD#
ICH8M REV 1.0
MINI CARD PCI-E
EXPRESS CARD(NEW CARD)
D D
ROBSON
PCIE-LAN
C C
AD[0..31]26
B B
INTA#26
INTB#26
A A
5
C870 .1U/10V
C868 .1U/10V
C865 .1U/10V
PCI
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
C871 .1U/10V
C869 .1U/10V
T148
T147
T213
T150
C867 .1U/10V
C866 .1U/10V
C878 .1U/10V
SPI_CS1#
USBOC0#29
USBOC1#29
USBOC2#29
USBOC3#29
REQ0#
GNT0#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
T117
T121
T108
T202
T116
T216
A4
D7
E18
C18
B19
F18
A11
C10
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
F8
G11
F12
B3
4
4
PCIE_TXN0_C
PCIE_TXP0_C
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN3_C
PCIE_TXP3_C
PCIE_TXN2_C
PCIE_TXP2_C
USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
IRDY#
DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#
PLT_RST-R#
PCLK_ICH
INTE#
INTF#
INTG#
INTH#
PCLK_ICH
U33D
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
E28
PETP5
D27
PERN6/GLAN_RXN
D26
PERP6/GLAN_RXP
C29
PETN6/GLAN_TXN
C28
PETP6/GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#/GPIO40
AG15
OC2#/GPIO41
AE15
OC3#/GPIO42
AF15
OC4#/GPIO43
AG17
OC5#/GPIO29
AD12
OC6#/GPIO30
AJ18
OC7#/GPIO31
AD14
OC8#
AH18
OC9#
ICH8M REV 1.0
T128
T123
T124
T199
T107
PCLK_ICH 2
PCI_PME# 26
INTE# 26
T111
T194
R353 *0
C570 *33P/50V
for EMI request
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
PCI-Express
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
Direct Media Interface
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
SPI
USBP4P
USBP5N
USBP5P
USBP6N
USB
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBRBIAS#
USBRBIAS
For Intel check list
REQ0# 26
GNT0# 26
C/BE0# 26
C/BE1# 26
C/BE2# 26
C/BE3# 26
IRDY# 26
PAR 26
PCIRST# 26
DEVSEL# 26
PERR# 26
SERR# 26
STOP# 26
TRDY# 26
FRAME# 26
3
V27
V26
U29
U28
Y27
Y26
W29
W28
AB26
AB25
AA29
AA28
AD27
AD26
AC29
AC28
T26
T25
Y23
Y24
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
F2
USB_RBIAS_PN
F3
5/5mils
Place within 500
mils of ICH8
PLT_RST-R#
TC7SH08FU
3
U34
2
1
DMI_RXN0 6
DMI_RXP0 6
DMI_TXN0 6
DMI_TXP0 6
DMI_RXN1 6
DMI_RXP1 6
DMI_TXN1 6
DMI_TXP1 6
DMI_RXN2 6
DMI_RXP2 6
DMI_TXN2 6
DMI_TXP2 6
DMI_RXN3 6
DMI_RXP3 6
DMI_TXN3 6
DMI_TXP3 6
CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2
DMI_IRCOMP_R
USBP0- 29
USBP0+ 29
USBP1- 29
USBP1+ 29
USBP2- 29
USBP2+ 29
USBP3- 29
USBP3+ 29
USBP4- 30
USBP4+ 30
USBP5- 31
USBP5+ 31
USBP6- 25
USBP6+ 25
USBP7- 31
USBP7+ 31
USBP8- 31
USBP8+ 31
USBP9- 28
USBP9+ 28
VCC3
3 5
5/15mils
USB Connector
USB Connector
USB Connector
USB Connector
BLUETOOTH
Carama USB
WLAN
CIR
NEW CARD
R328
22.6/F
PLT_RST-R# 6,14
C810
0.1U/16V
4
Don't connect to PCI device / Express card
VCC1.5
R388
24.9/F
PLTRST# 22,28,31,32,33
2
VCC3
VCC3
Place within 500
mils of ICH8
C5920.1U
3VSUS
A16 SWAP Override strap
GNT3#
2
1
RP54
6
7
8
9
10
8.2KX8
RP52
6
7
8
9
10
8.2KX8
RP51
6
7
8
9
10
8.2KX8
USBOC#2
USBOC#4
USBOC#6
USBOC#3 USBOC#0
USBOC#8
USBOC#9
RP53
6
7
8
9
10
10P8R-10K
R360 10K
R373 10K
VCC3
STOP#
REQ2#
FRAME#
REQ1#
SERR#
IRDY#
PERR#
LOCK#
INTA#
VCC3
5
REQ3#
4
INTD#
3
DEVSEL#
2
TRDY#
1
VCC3
5
4
REQ0#
3
INTG#
2
INTF#
1
VCC3
5
INTE#
4
INTC#
3
INTB#
2
INTH#
1
5
USBOC#1
4
USBOC#7
3
2
USBOC#5
1
3VSUS
3VSUS
CHECK LIST suggest pull up 10k
PCI_GNT#3
Low = A16 swap override enabled
High = Default
R359 *1K
ICH8 Boot BIOS select
SPI_CS#1PCI_GNT#0
1
SPI_CS1#
GNT0#
Size Document Number Rev
Date: Sheet
1
R389 *1K
R337 *1K
ICH8M
Boot BIOS Location
SPI10
PCI01
LPC(Default)
Update Nicole 9/25
PROJECT : CH3
Quanta Computer Inc.
21 46Tuesday, February 06, 2007
1
21
1A
of
5
VCC3
U35
1
VR_PWRGD_CK410#37
D D
PM_STPPCI#2
PM_STPCPU#2
2
close to ICH
THERM_ALERT#15,30
C C
B B
VCC3
MCH_ICH_SYNC#6
C809 .1U/16V
5
VR_PWRGD_CK410
43
NL17SZ14DFT2G
PCLK_SMB2,13,28,31
PDAT_SMB2,13,28,31
RI#26
LPC_PD#26
PM_BMBUSY#6
R566 0/F
R563 0/F
CLKRUN#26,36
PCIE_WAKE#28,31,32
SERIRQ26,36
1 2
R561 0
R559 8.2K
KBSMI#36
SCI#36
ACZ_SPKR34
R376
100K/F_4
T134
T120
T126
T135
KBSMI#
SCI#
T205
T197
T102
T200
T105
T209
T115
T112
T103
T198
T106
PCLK_SMB
PDAT_SMB
PCIE_WAKE#
PM_BATLOW#
PCLK_SMB
PDAT_SMB
SMB_LINK_ALERT#
SMLINK0
SMLINK1
SYS_RST#
R358 0
SMB_ALERT#
PM_STPPCI_ICH#
PM_STPCPU_ICH#
CLKRUN#
PCIE_WAKE#
SERIRQ
VR_PWRGD_CK410
MCH_ICH_SYNC#_R
ICH_TP320
No Reboot strap
HDA_SPKR
ACZ_SPKR
Low = Default
High = No
Reboot
R348 10K
VCC3
D20BAS316
D19BAS316
RI#
21
21
4
R378
R412
R368 1K
R384 8.2K
KBSMI#_R
SCI#_R
DELAY_VR_PWRGOOD37
2.2K
2.2K
U33C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
ICH8M REV 1.0
ECPWROK6,17,36
RVCC3
CRB STUFF
2K%1
VCC3
SMB_LINK_ALERT#
SMLINK0
SMLINK1
SYS
R617 2 K/ F
R418 100K
GPIO
SATA
SMB
Clocks
S4_STATE#/GPIO26
GPIO
DPRSLPVR/GPIO16
Power MGTController Link
GPIO
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
MISC
3VSUS
2
1
R334 10K
R371 10K
R381 10K
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST#
MEM_LED/GPIO24
WOL_EN/GPIO9
C882 .047U/10V
U43
4
TC7SH08FU
3 5
3
RI#
DNBSWON#
RVCC3
SYS_RST#
SMB_ALERT#
KBSMI#_R
these pin if unused require 8.2k to
10k pull-up to +3v
BOARD_ID1
AJ12
BOARD_ID0
AJ10
R557 8.2K
AF11
R555 8.2K
AG11
14M_ICH
AG9
CLKUSB_48
G5
D3
AG23
AF21
AD18
AH27
PWROK
AE23
DPRSLPVR-ICH
AJ14
PM_BATLOW#
AE21
DNBSWON#
C2
AH20
AG27
E1
E3
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
AJ24
AF22
AG19
R330 0
SUSM#
CL_VREF0_SB
CL_VREF1_SB
PWROK
R618
10K
PLTRST_LAN#
T210
T206
T141
R401
100K
VCC3
VCC3
14M_ICH 2
CLKUSB_48 2
T96
R569 1 00/F
R377 1 00/F
T122
T211
R369 100/F
R70 *0
R589 100/F
CK_PWG 2
ECPWROK 6,17,36
T208
CL_CLK0 6
T125
CL_DATA0 6
T129
CL_RST#0 6
PWROK 6
R375 8.2K
R536 10K
R362 10K
R331 10K
R558 10K
R366 *100K
DPRSLPVR
RSMRST#PM_RSMRST#_R
2
RVCC3
CLKRUN#
SERIRQ
SCI#_R
PM_RSMRST#_R
SUSB# 36
SUSC# 36
check list -- 100k
pull-down to gnd
DPRSLPVR 6,37
PM_BATLOW# 36
DNBSWON# 36
PLTRST# 21,28,31,32,33
RSMRST# 36
RVCC3
C581
R372
.1U/10V
453/F
Controller Link 1
VREF for IAMT
support only
R370
3.24K/F
R345 8.2K
R352 8.2K
R339 10K
R590 10K
PLTRST_LAN#
R391
453/F
Controller Link 0
VREF for IAMT
support only
VCC3
VCC3
C591
.1U/10V
1
R380 0
R393
3.24K/F
22
VCC3
R553
*10K
A A
5
BOARD_ID0 BOARD_ID1
R548
10K
4
VCC3
R346
10K
R354
*10K
PM+NB8M
PM+NB8P
3
ID0 ID1Board ID
0
01
0
Size Document Number Rev
ICH8M
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
22 46Tues day, February 06, 2007
1
of
1A
5
hexainf@hotmail.com
U33E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
D D
C C
B B
A A
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
C24
C26
C27
D12
D15
D18
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
AJ5
B11
B14
B17
B2
B20
B22
B8
C6
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
ICH8M REV 1.0
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
5VPCU
+1.5V_PCIE
R533 10
VCC1.5
VCC1.5
60 mils(1.56A)
R535 0
VCC3
VCC1.5
4
3VPCU VCC3
21
D26
PDZ5.6B
VCC5
C553
.1U/10V
L43
BLM21PG220SN1D
+1.5V_SATA
R382 0
R587 1
+1.5V_PCIE
C583
.1U/10V
L63 1UH
C874
4.7U/6.3V
R570 100/F
40 mils(657mA)
+
C879
220U
L41 10UH
C843
10U
C877
22U/6.3V
C836
2.2U
21
C815
.1U/10V
C593
22U/6.3V
C785
1U/16V
C789
1U/16V
C793
.1U/10V
C792
.1U/10V
VCCRTC
D28
PDZ5.6B
100mA
VCC3
C607
1U
+5VREF_SB
+5VREF_SUS_SB
C875
2.2U
C796
10U
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
+3V_VCCLAN
+1.5V_VCCGLANPLL
80mA
R591 0
3
C603
.1U/10V
C794
1U/16V
+3V_GLAN
C597
.1U/10V
AD25
AA25
AA26
AA27
AB27
AB28
AB29
W25
AG7
AC10
W23
A16
T7
G4
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
Y25
AJ6
AE7
AF7
AH7
AJ7
AC1
AC2
AC3
AC4
AC5
AC9
AA5
AA6
G12
G17
H7
AC7
AD7
D1
F1
L6
L7
M6
M7
F17
G18
F19
G20
A24
A26
A27
B26
B27
B28
B25
U33F
VCCRTC
V5REF[1]
V5REF[2]
V5REF_SUS
VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCCSATAPLL
VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]
VCC1_5_A[18]
VCC1_5_A[19]
VCCUSBPLL
VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]
VCCLAN1_05[1]
VCCLAN1_05[2]
VCCLAN3_3[1]
VCCLAN3_3[2]
VCCGLANPLL
VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]
VCCGLAN3_3
ICH8M REV 1.0
CORE
VCCA3GP ATXARX
VCCP_COREVCCPSUSVCCPUSB
IDE
PCI
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
USB CORE
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
GLAN POWER
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
VCCSUSHDA
VCCCL1_05
VCCCL1_5
VCCCL3_3[1]
VCCCL3_3[2]
VCCHDA
2
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
TP_VCCCL1_05_ICH
G22
VCCCL1_5_INT_ICH
A22
+V3.3M_ICH
F20
G21
+1.05V_SB
C573
.047U/10V
VCCDMIPLL_ICH
+1.05V_V_CPU_IO
+V3.3_DMI_ICH
C566
.1U/10V
C555
.1U/10V
+3V_1.5V_HDA_IO_ICH
+VCCSUSHDA
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
+V3.3A_ICH
C572
.022U
+1.25V_DMI
C550
.1U/10V
20 mils(177mA)
C558
.1U/10V
C564
4.7U/6.3V
R386 0
R567 0
C872
.01U
R416 0
C625
22U/6.3V
C556
.1U/10V
32mA
C559
0.1U/16V
C554
.022U
C584
C587
.1U
1U/16V
VCCP
1.13A
L48 1UH
C608
10U
C595
C618
.1U/10V
.1U/10V
20 mils(278mA)
C562
C557
.1U/10V
.1U/10V
32mA
R341 0
Can be connect to
+3V_S5 or
+1.5V_S5
R351 0
TP_VCCLAN1_05_ICH_1
TP_VCCLAN1_05_ICH_2
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2
TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH
VCC3
VCC1.25
R347 0
RVCC3
RVCC3
1
R409 1
R410 0
C619
4.7U/6.3V
VCC3
R356 0
C568
.1U/10V
Can be connect to
VCC3 or VCC1.5
C578 0.1U/16V
C582 0.1U/16V
C565 0.1U/16V
C586 0.1U/16V
T101
T118
T136
23
VCC1.5
VCCP
VCC3
Size Document Number Rev
ICH8M
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
1
23 46Tuesday, February 06, 2007
1A
5
4
3
2
1
CAPSLED#36
NUMLED#36
D D
WLAN_LED#31
BT_LED#30
PWRLED#36
SUSLED#36
ODD_LED#33
C C
BATLED0#36
BATLED1#36
PWRLED#
SUSLED#
CRT_R6,16
B B
CRT_G6,16
CRT_B6,16
CRT_R
CRT_G
CRT_B
LED5
LTST-C191TBKT-Q1
LED6
LTST-C191TBKT-Q1
LED2
3 1
LED3
3 1
LED_BL/ORG
LED7
LTST-C191TBKT-Q1
LED4
3 1
LED1
3 1
LED_BL/ORG
pin1,3 Blue
pin2,4 ORG
R12
150/F
LED_BL/ORG
24
LED_BL/ORG
24
21
21
24
21
24
R11
150/F
R427 150
R426 150
R643 150
R423 150
R424 150
R644 150
R428 150
R645 150
R425 150
R10 150
R646 150
R9
150/F
C23
5.6P
L6 BK1608HS470
L5 BK1608HS470
L4 BK1608HS470
C18
C21
5.6P
5.6P
VCC3
VCC3
VCC3
3VPCU
VCC3
3VPCU
3VPCU
24
R531 100K
C780
*.1U-16V_4
SW3
4
5
3
4
5
3
2
2
1
1
7
6
7
6
VCC3
MAIL#36
INTERNET#36
ECO#36
SKYPE#36
L-MAIL#36
L-INTERNET#36
L1-ECO#36
L2-ECO#36
L1-SKYPE#36
L2-SKYPE#36
2
5
6
CN2
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
SW2MISAKI_SWITCH
3
14
*.1U-10V_4
C16
2
5
6
2
5
6
NBSWON#
SW4MISAKI_SWITCH
3
14
*.1U-10V_4
SW5MISAKI_SWITCH
3
14
*.1U-10V_4
NBSWON# 36
MAIL#
C892
INTERNET#
C893
3VPCU
WR/BT_SW#36
VCC3
WR/BT_SW#
R624 *10K_4
R625 *10K_4
R626 *10K_4
R627 *10K_4
R628 *10K_4
WR/BT_SW
MAIL#
INTERNET#
ECO#
SKYPE#
SW4, SW5 not stuff in NEC control in BOM NIcole 11/08
for BenQ SW4 used as SRS function, SW5 used as Snapshort. need EC code. from SG
C20
5.6P
CRT_R1
CRT_G1
CRT_B1
C22
5.6P
3
C24
5.6P
DA204U
2 1
VCC3VCC3VCC3
D4
D3
DA204U
3
3
2 1
CRT_VCC
DKZ00TFU101
C14
0.1U
D1
CH501H
6
7
2
8
3
9
4
10
5
21
1617
D2
DA204U
2 1
F1
1 2
POLY_SWITCH RC1206
CN12
111
12
13
14
15
CRT_CONN
D24
MEW355
CRT_DDCDATA
HSYNC1
VSYNC1
CRT_DDCCLK
VCC5
21
2 1
R434 0
*MEW355
D25
CRT_SENSE# 36
VCC5VCC3
VCC5
CRTDAT6,16
1
C8 .1U/10V
A A
VSYNC_COM6,16
HSYNC_COM6,16
5
5
U1
2 4
5
U2 AHCT1G125DCH
2 4
VSYNC1
AHCT1G125DCH
1
HSYNC1
CRTCLK6,16
4
R433
2.2K
CRTDAT
R4
2.2K
CRTCLK
VCC3
R432
Q18
3
2N7002E-LF
VCC5
Q2
3
2N7002E-LF
2.2K
CRT_DDCDATA
R429
2.2K
CRT_DDCCLK
Size Document Number Rev
CRT/LED/SW
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
24 46Tuesday, February 06, 2007
1
of
1A
2
1
2
1
3
1
hexainf@hotmail.com
2
3
4
5
6
7
8
PANEL VCC CONTROL
VCC3
C632
A A
DIGON6,17
0.1U
R8
100K/F
Q29
OUT
GND
1
2
5
IN
4
IN
3
ON/OFF
C897
G5241T1U
*4.7u/10V
Add C897 for LCDVCC and LCD Data sequence request
R487 and R263 shoud change to 5.6K nicole 12/11
LCDVCC
LID#36
C19
.1U
BACKLIGHT CONTROL
C17 .1U
VCC3
B B
LCD_ON36
BLON6,17
R7
100K
2
1
3 5
4
U3
TC7SH08FU
DISPON
C15
0.1U
EMI
VADJ36
LID
2
LID#
C1
0.1U
GND
3
OUT
MRSS23W
add for NEC nicole 12/14
change for pin definition wrong 01/05
L3 0
VCC
SW6
1
VADJ-1
EMI
R641470
3VPCU
VIN
C7
10U/25V/X5R
C12
0.1U
EDIDCLK6,16,17
EDIDDATA6,16,17
C4
.1U
VCC3
USBP6-21
USBP6+21
L2
ACB2012L-120
.1U
C2
LCDVCC
R5 2.2K
R3 2.2K
12
C5
10U/25V/X5R
LCD CONNECTOR
LP13
1
4 3
*WCM2012-90
C11
0.1U
2
DSC_5V
VCC3
TXLOUT0+16
TXLOUT1+16
TXLOUT2+16
TXLCLKOUT-16
TXLCLKOUT+16
TXLOUT4+16
TXLOUT5+16
TXLOUT6+16
TXLCLK1UT-16
TXLCLK1UT+16
C9
.1U
TXLOUT0-16
TXLOUT1-16
TXLOUT2-16
DISPON
VADJ-1
TXLOUT4-16
TXLOUT5-16
TXLOUT6-16
Add B channel LVDS signals
12/12
CN1
G_0
1
2
3
4
5
6
7
8
9
10
G_1
11
12
13
14
15
16
17
18
G_2
19
20
21
22
23
24
G_3
25
26
27
28
29
30
G_4
31
32
33
34
35
36
37
38
39
40
G_5
GS12401-1011-9F
25
HDMI PORT
R29 *E@0
EX_TX2_HDMI+16
C C
D D
EX_TX2_HDMI-16
EX_TX1_HDMI+16
EX_TX1_HDMI-16
EX_TX0_HDMI+16
EX_TX0_HDMI-16
EX_TXC_HDMI+16
EX_TXC_HDMI-16
1
EX_TX2_HDMI+
EX_TX2_HDMI-
EX_TX1_HDMI+
EX_TX1_HDMI-
EX_TX0_HDMI+
EX_TX0_HDMI-
EX_TXC_HDMI+
EX_TXC_HDMI-
HDMI_DET17
LP9 E@CMM21T-900M-N
4
1
R21 *E@0
R20 *E@0
LP10 E@CMM21T-900M-N
1
4
R19 *E@0
R18 *E@0
LP11 E@CMM21T-900M-N
4
1
R17 *E@0
R16 *E@0
LP12 E@CMM21T-900M-N
1
4
R15 *E@0
VCC5
HDMI_DET
2
3
2
2
3
3
2
2
3
F2 E@FUSE1A6V_POLY
12
R436
E@1K
TX2_HDMI+
TX2_HDMI-
TX1_HDMI+
TX1_HDMI-
TX0_HDMI+
TXC_HDMI-
HDMISCL
HDMISDA
HDMIC_5V
HDMIDET_R
R437
E@15K
3
LAYOUT must support
connectors from JAE,
Molex and Acon.
CN13
19
D2+
18
D2 Shield
17
D2-
16
D1+
15
D1 Shield
14
D1-
13
D0+
12
TX0_HDMI-
TXC_HDMI+
11
10
9
8
7
6
5
4
3
2
1
D0 Shield
D0ÂCK+
CK Shield
CKÂCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
E@C12814
20
SHELL1
HDMIC_5V
21
SHELL2
for EMI request
Update CN13 footprint and PN nicole 12/04
4
C633
*.1U/10V
DSC_POWERON#36
5
1 3
Q3
MMBT3904
HDMI_SCL16
HDMI_SDA16
VCC5VCC3 VCC5
R2
R6
10K/F_4
2
10K/F_4
1
L8
L7
For HDMI Nvidia's PUN issue
6
R1 *0
L1
BK2125HS330_8
3
AO3403
Q1
2
10U/10V/X5R_8
SG add
E@LQG18HN68NJ00D
E@LQG18HN68NJ00D
C25
*E@10P/50V
Size Document Number Rev
LCD /CAMERA
Date: Sheet
HDMISCL
HDMISDA
C26
*E@10P/50V
7
DSC_5V
C3
C10
1U/10V_4
PROJECT : CH3
Quanta Computer Inc.
of
25 46Tues day, February 06, 2007
8
1A
A
GNT0#21
AD25
R538 150
4 4
3 3
REQ0#21
FRAME#21
IRDY#21
DEVSEL#21
TRDY#21
SERR#21
STOP#21
PERR#21
PAR21
C/BE3#21
C/BE2#21
C/BE1#21
C/BE0#21
PCI_CLK_84022
PCIRST#21
AD[0..31]21
AD25_R
GRST#_8402
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
B
W10
R11
P11
U11
V11
W11
R10
U10
V10
C
1394_XIN
U32A
L2
GNT#
L3
REQ#
N5
IDSEL
R6
FRAME#
V5
IRDY#
U6
DEVSEL#
W5
TRDY#
W6
SERR#
V6
STOP#
R7
PERR#
U7
PAR
P2
CBE3
U5
CBE2
V7
CBE1
CBE0
L1
PCLK
K3
PRST#
K5
GRST#
AD00
AD01
AD02
AD03
AD04
AD05
AD06
AD07
R9
AD08
U9
AD09
V9
AD10
W9
AD11
V8
AD12
U8
AD13
R8
AD14
W7
AD15
W4
AD16
T2
AD17
T1
AD18
R3
AD19
P5
AD20
R2
AD21
R1
AD22
P3
AD23
N3
AD24
N2
AD25
N1
AD26
M5
AD27
M6
AD28
M3
AD29
M2
AD30
M1
AD31
PCI8402
PCI Interface
1394 Interface
Miscellaneous
RSVD_03/VD0/VCCD1#/PS_MODE
PHY_TEST_MA
LATCH/VD3/VPPD0
CLOCK/VD1/VCCD0#
DATA/VD2/VPPD1
CPS
TEST0
VSSPLL
TPA0P
TPA0N
TPBIAS0
TPB0P
TPB0N
TPA1P
TPA1N
TPBIAS1
TPB1P
TPB1N
VDDPLL15
PC0_RSVD
PC1_RSVD
PC2_RSVD
AGND_00
AGND_01
AGND_02
SUSPEND#
RI_OUT#
SPKROUT
VR_EN#
USB_EN
SCL
SDA
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
R19
XI
XO
R0
R1
R18
T18
T19
R12
P12
R17
V14
W14
R13
V13
W13
V16
W16
W17
V15
W15
P15
P17
U12
V12
W12
U13
U14
R14
J5
L5
H3
K2
E10
G2
G3
G1
H5
H2
H1
J1
J2
J3
C9
A9
B9
C4
1394_XOUT
R0
R575 6.34K/F
R1
CPS
TEST0_7412
TPA0P
TPA0N
TPBIAS0
TPB0P
TPB0N
PHY_TEST_MA
LPC_PD#_8402
RI#_PCI_PME#
SCL_CARD
SDA_CARD
MFUNC4
+3V_VCCD1
C812 22P
Y6
24.576MHZ
C808 27P
1 2
R565 390K
R568 330
R564 4.7K
R552 0
R547 *0
R539 10K
T193
R540 10K
del 2*4.7K resistors
10/26
1394_AVDD
VCC3
PCI_PME# 21
RI# 22
PCMSPK 34
INTE# 21
INTB# 21
INTA# 21
SERIRQ 22,36
CLKRUN# 22,36
VCC3
R537
10K
VCC3
D
+1.5V_PCM
C824
1U
D27 *BAS316
E
26
LPC_PD# 22
CN14
TPBIAS0
2 2
R544
2.2K
SCL_CARD
SDA_CARD
R546
*220
1 1
A
R542
2.2K
R543
*220
VCC3
VCC3
U39
8
7
6
5
24LC02BT
C788
.1U
VCC
NC
SCL
SDA
GND
R454
R452
56.2/F
R447
56.2/F
C634
270P
C641
1U
R453 0
LP7 *CMF-2012-0160I-S1
1
4
R451 0
R450 0
LP8 *CMF-2012-0160I-S1
4
1
R448 0
2
3
3
2
L1394_TPA0+
L1394_TPA0-
L1394_TPB0+
L1394_TPB0-
D
Size Document Number Rev
Date: Sheet
56.2/F
1
A0
2
A1
3
A3
4
VCC3
R534
1M
GRST#_8402
C781
.1U
B
TPA0P
TPA0N
TPB0P
TPB0N
R449
56.2/F
R446
5.1K/F
C
L1394_TPB0ÂL1394_TPB0+
L1394_TPA0ÂL1394_TPA0+
PCI8402-IEEE1394
1
2
3
4
020115FR004S501ZL
PROJECT : CH3
Quanta Computer Inc.
5
6
1A
of
26 46Tuesday, February 06, 2007
E
A
hexainf@hotmail.com
U32C
F2
SC_OC#
SC_VCC5
SC_CLK
SC_RST
SC_DATA
CLK_48
SC_CD#
SD_CD#
MS_CD#
SM_CD#
G5
G6
C5
A4
B4
D1
E3
E2
F5
E1
F1
F3
E9
A8
B8
A3
C8
F8
E8
A7
B7
C7
A6
B6
E7
C6
A5
B5
E6
SC_PWR_CTRL
SD_CMD/SM_ALE/SC_GPIO2
SD_CLK/SM_RE#/SC_GPIO1
SM_CLE/SC_GPIO0
SM_R/B#/SC_RFU
4 4
3 3
SM_PHYS_WP#/SC_FCB
XD_CD#/SM_PHYS_WP#
MC_PWR_CTRL_0
MC_PWR_CTRL_1/SM_R/B#
MS_BS/SD_CMD/SM_WE#
MS_CLK/SD_CLK/SM_EL_WP#
MS_SDIO(DATA0)/SD_DATA0/SM_D0
MS_DATA1/SD_DATA1_SM_D1
FlashMedia Interface
MS_DATA2/SD_DATA2_SM_D2
MS_DATA3/SD_DATA3_SM_D3
SD_WP/SM_CE#
SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
PCI8402
B
SC_VCC5
SM_ALE
SM_RE#
SM_CLE
SM_PHYS_WP#/SC_FCB
CLK48M
SD_CD#
MS_CD#
XD_CD#
MC_PWR_CTRL_0#
SM_R/B#
MS_BS/SD_CMD/SM_WE#
MS_CLK/SD_CLK/SM_EL_W P#_R R
MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS_DAT1/SD_DAT1/SM_D1
MS_DAT2/SD_DAT2/SM_D2
MS_DAT3/SD_DAT3/SM_D3
SD_WP/SM_CE#
SM_D4
SM_D5
SM_D6
SM_D7
R541 0
R586 10K
T192
R578 47
VCC3
VCC_FM
48MHz Clock
Y5
3
OUT
VDD
2
OE
GND
TXC-48MHz-30PPM-15Pf
R588 10K
R581 10K
MS_CLK/SD_CLK/SM_EL_WP#
R585 10K
C
D
E
27
C863
.1U
VCC3
VCC3
R619
10K
C873
.1U
C890
.1U
C880
.1U
Q27
1
GND
2
IN
3
IN
4
EN#
TPS2061DGNR
OUT
OUT
OUT
OUTNC
C864
.1U
VCC_FM
C883
10U
C861
2.2U
VCC_FM
R608
150K
8
7
6
5
VCC3
4
1
VCC_FM
C783
.01U
MC_PWR_CTRL_0#
VCC_FM
+1.5V_PCM
C822
.1U
1394_AVDD
2 2
K19
U19
M14
K14
G14
K1
H6
K6
N6
P7
P9
F13
F10
F7
U32D
1.5V_00
1.5V_01
VDDPLL33
GND_00
GND_01
GND_02
GND_03
GND_04
GND_05
GND_06
GND_07
GND_08
GND_09
GND_10
PCI8402
1394_AVDD
C801
.1U
VCC33_00
VCC33_01
VCC33_02
VCC33_03
VCC33_04
VCC33_05
VCC33_06
VCC33_07
VCC33_08
VCC33_09
VCC33_10
AVDD33_00
AVDD33_01
Power/GND
AVDD33_02
VCCP_00
VCCP_01
L62 BK1608HS800
C803
1U
VCC3
J6
L6
P6
P8
P10
L14
J14
F14
F12
F9
F6
1394_AVDD
P13
P14
U15
VCC3
P1
W8
VCC31394_AVDD
VCC3
VCC3
C787
.1U
C846
.1U
C805
1U
C790
.1U
C854
1U
C798
10U
C817
.01U
C816
.01U
6 IN1 CARD READER
SM_CLE
MS_DAT2/SD_DAT2/SM_D2
MS_CLK/SD_CLK/SM_EL_WP#
SM_R/B#
SM_ALE
SM_RE#
MS_CD#
MS_BS/SD_CMD/SM_WE#
MS_CLK/SD_CLK/SM_EL_WP#
MS_DAT3/SD_DAT3/SM_D3
MS_DAT2/SD_DAT2/SM_D2
SD_WP/SM_CE#
MS_BS/SD_CMD/SM_WE#
MS_DAT3/SD_DAT3/SM_D3
VCC_FM
VCC_FM
CN25
6
CLE_XD
9
DAT2_SD
10
-WP_XD
2
CD_XD
3
R/-B_XD
7
ALE_XD
4
-RE_XD
1
GND_XD
11
MS-VSS
13
MS-VCC
18
MS-INS
19
VSS_SD
17
GND_XD
15
CMD_SD
14
MS-SCLK
16
MS-DATA3
20
MS-DATA2
5
-CE_XD
8
-WE_XD
12
CD/DAT3_SD
21
VDD_SD
MXP038-01-A_CARD READER
GND
GND-SDIO
CLK_SD
MS-BS
VSS_SD
MS-VSS
D1_XD
DAT0_SD
D2_XD
DAT1_SD
D3_XD
D4_XD
D5_XD
D6_XD
D7_XD
VCC_XD
C/D_SD
GND_SD
W/P_SD
MS-DATA1
SDIO/MS-DATA0
D0_XD
43
42
MS_CLK/SD_CLK/SM_EL_WP#
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
24
22
23
MS_BS/SD_CMD/SM_WE#XD_CD#
MS_DAT1/SD_DAT1/SM_D1
MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS_DAT2/SD_DAT2/SM_D2
MS_DAT1/SD_DAT1/SM_D1
MS_DAT3/SD_DAT3/SM_D3
VCC_FM
MS_DAT1/SD_DAT1/SM_D1
MS_SDIO(DAT0)/SD_DAT0/SM_D0
MS_SDIO(DAT0)/SD_DAT0/SM_D0
SM_D4
SM_D5
SM_D6
SM_D7
SD_CD#
SD_WP/SM_CE#
NEED PN
1 1
Size Document Number Re v
PCI8402-CARD READER
A
B
C
D
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
27 46Tuesday, February 06, 2007
E
of
1A
5
4
3
2
1
U32B
D D
CardBus Interface
RSVD_04/D2
C C
B B
PCI8402
CCD1#/CD1#
CCD2#/CD2#
CREQ#/INPACK#
CSERR#/WAIT#
RSVD_02/A18
RSVD_01/D14
CAD31
CAD30
CAD29
CAD28
CAD27
CAD26
CAD25
CAD24
CAD23
CAD22
CAD21
CAD20
CAD19
CAD18
CAD17
CAD16
CAD15
CAD14
CAD13
CAD12
CAD11
CAD10
CAD09
CAD08
CAD07
CAD06
CAD05
CAD04
CAD03
CAD02
CAD01
CAD00
CCBE3
CCBE2
CCBE1
CCBE0
CVS1/VS1#
CRST#
CBLOCK#
CDEVSEL#
CFRAME#
CGRANT#
CINT#
CVS2/VS2#
CPERR#
CSTOP#
CIRDY
CTRDY#
CCLKRUN#
CPAR
VCCCA_01
VCCCA_00
CSTSCHG
CAUDIO
CCLK
C10
A10
F11
E11
C11
B13
C13
A14
B14
B15
E14
A16
D19
E17
F15
H19
J17
J15
J18
K15
K17
K18
L15
L18
L19
M17
M18
N19
M15
N17
N18
P19
E13
E18
H18
L17
B10
N15
B11
A13
C15
H15
C14
C12
F19
E19
G17
E12
B16
G19
G18
F17
G15
H17
M19
A11
H14
A15
J19
A12
B12
F18
R545 33K
1 2
4700P
PLTRST#21,22,31,32,33
USBP9-21
USBP9+21
CLK_PCIE_NEW_C#2
CLK_PCIE_NEW_C2
AUXOUT
3.3VOUT_0
1.5VOUT_0
1.5VOUT_1
PCIE_RXN121
PCIE_RXP121
PCIE_TXN121
PCIE_TXP121
15
3
5
11
13
PERST_C#PERST#
C547
U13
3VSUS
VCC3
VCC1.5 1.5V_NEWCARD
17
AUXIN
2
3.3VIN_0
3.3VIN_143.3VOUT_1
12
1.5VIN_0
14
1.5VIN_1
USBP9-
USBP9+
PCLK_SMB2,13,22,31
PDAT_SMB2,13,22,31
PCIE_WAKE#22,31,32
PCIE_REQ3#2
ExpressSwitch
20
SHDN#
1
STBY#
6
SYSRST#
16
NC
7
GND0
SHDN#, STBY#, PERST# and CPPE# have internal pull-up to AUXIN.
So del R551, R541, R327, R329 nicole 12/11
PERST#
CPPE#
CPUSB#
OC#
RCLKEN
R5538D001-TR-F
PERST#
8
CPPE#
10
CPUSB#
9
19
18
Del R532 and R556 nicole 12/11
LP4
1
2
4 3
*WCM2012-90
1.5V_NEWCARD
3VAUX_NEW
CLK_PCIE_NEW_C#
CLK_PCIE_NEW_C
PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1
3VAUX_NEW
3V_NEWCARD
PCIE_REQ3#
C563 0.1U
C567 0.1U
3V_NEWCARD
CPUSB#
PERST_C#
CPPE#
C791
0.1U
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CN6
GND_1
USBÂUSB+
CPUSB#
RSV_0
RSV_1
SMBCLK
SMBDATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V_1
+3.3V_2
CLKREQ#
CPPE#
REFCLKÂREFCLK+
GND_2
PERn0
PERp0
GND_3
PETn0
PETp0
GND_4
C548
0.1U
FEB800601
27
28
NC430NC329NC228NC1
1.5V_NEWCARD3V_NEWCARD 3VAUX_NEW
C786
0.1U
C546
0.1U
C782
0.1U
C544
0.1U
H10
H-C276D118P2
1
H14
H-C236D165P2
1
A A
H1
H-TC354BC276D118P2
1
H11
H-C236D165P2
1
5
H15
H-C276D118P2
1
H6
H-C236D165P2
1
H25
H-C276D118P2
1
H8
H-C236D165P2
1
H26
H-C276D118P2
1
H9
H-C236D165P2
1
H18
H-C276D118P2
H13
H-C236D165P2
4
H23
H-C276D118P2
1
1
1
H28
H-C236D165P2
1
H5
H-C276D118P2
H21
H-C217D122P2
H24
H-C276D118P2
1
1
1
H17
H-C217D122P2
1
3
H16
H-C276D118P2
1
H22
H-C217D122P2
1
H7
H-C276D118P2
1
H20
H-C217D122P2
1
H4
H-C276D118P2
1
H12
H-C217D122P2
1
H3
H-C276D118P2
1
H19
H-C217D122P2
1
2
H2
H-TC354BC276D118P2
1
Size Document Number Rev
NEWCARD/HOLE
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
28 46Tuesday, February 06, 2007
1
1A
A
hexainf@hotmail.com
B
C
D
E
USB PORT
U9
G545B2RD1U
5VSUS
USBON#- E
4 4
2
IN1
OUT3
IN23OUT2
OUT1
4
EN#
1
GND
9
OC#
GND-C
USBP2-21
USBP2+21
1
4 3
*WCM2012-90
LP2
8
7
6
USB_OC2#
5
2
40 mils
R279 0
C748
*47P
*47P
USBOC2# 21
USBP2ÂUSBP2+
USBVCC2USBVCC2
USBVCC2
C736
0.1U
5VSUS
C732
100u/6.3V_6032
CN21
4
4
3
3
2
6
2
6
1
5
1
5
USB
USBON#- E
U41
G545B2RD1U
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
USBP1-21
USBP1+21
OUT3
OUT1
OC#
40 mils
8
7
6
USB_OC1#
5
LP6
1
4 3
*WCM2012-90
USBVCC1
2
R415 0
40 mils
C858
*47P
USBOC1# 21
USBP1ÂUSBP1+
C862
*47PC744
USBVCC1
C876
0.1U
29
C860
100u/6.3V_6032
U8
G545B2RD1U
USBP3-21
USBP3+21
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
OUT3
OUT1
OC#
1
4 3
*WCM2012-90
5VSUS
USBON#- E
3 3
8
7
6
USB_OC3#
5
LP1
USBVCC3
2
R159 0
C706
*47P
USBP3ÂUSBP3+
USBOC3# 21
USBVCC3
C704
*47P
INT KeyBoard
CN3
MY15
2 2
1 1
MY1536
MY1436
MY1336
MY1236
MY1136
MY1036
MY936
MY836
MY736
MY636
MY536
MY436
MY336
MY236
MY136
MY036
MX736
MX636
MX536
MX436
MX336
MX236
MX136
MX036
A
need P/N
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MY2
MY1
MY0
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
AFN260-N2GLZ
B
USBVCC3
4
3
2
1
40 mils
C702
0.1U
CN19
4
3
2
6
1
5
USB
7 8
5
3
1
220Px4
CP1
7 8
5
3
1
220Px4
CP2
7 8
5
3
1
220Px4
CP3
7 8
5
3
1
220Px4
CP6
7 8
5
3
1
220Px4
CP5
7 8
5
3
1
220Px4
CP4
C700
100u/6.3V_6032
U38
G545B2RD1U
5VSUS
USBON# USBON#- E
USBON#36
R599 0_4
2
IN1
IN23OUT2
4
EN#
1
GND
9
GND-C
OUT3
OUT1
OC#
8
7
6
USB_OC0#
5
40 mils
USBVCC0
R396 0
USBOC0# 21
USBVCC0
C833
0.1U
C842
100u/6.3V_6032
40 mils
LP5
1
6
5
MY15
MY14
6
MY13
4
MY12
2
MY11
MY10
6
MY9
4
MY8
2
MY7
MY6
6
MY5
4
MY4
2
MY3
MY2
6
MY1
4
MY0
2
MX7
MX6
6
MX5
4
MX4
2
MX3
MX2
6
MX1
4
MX0
2
3VPCU
RP50
10
MY9
9
MY8
8
MY7
7 4
MY6
10KX8
RP49
10
MY15
9
MY13
8
MY12
7 4
MY0
10KX8
DEL MX[7:0] pull-up to 3 VPC U
nicole 9/25
C
USBP0-21
USBP0+21
MY4
1
MY1
2
MY3
3
MY5
56
MY10
1
MY14
2
MY11
3
MY2
56
4 3
*WCM2012-90
2
C839
*47P
D
USBP0ÂUSBP0+
C850
*47P
USBP0+
USBP0ÂUSBVCC0
USBVCC1
USBP1+
USBP1-
update signal sequence, cable need update
12/05
Size Document Number Rev
KB / USB
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
CN8
1
2
3
4
5
6
7
8
USB-CON
E
1A
of
29 46Tuesday, February 06, 2007
5
4
3
2
1
BT Connector
VCC3
D D
BT_ON#36
Activate: L
USBP4+21
USBP4-21
BT_LED#24
C C
2
Q15
DTC144EUA
1
Q14
3
AO3403
L44
BK2125HS330_8
2
R639 0_4
LP14
4 3
1
*WCM2012-90
R640 0_4
13
C602 .1U _4
5
BT_VCC
4
3
2
1
2
Del R398 change back to CH2 5pin onnector
for BenQ and NEC not share one module
nicole 11/28 B ver
BT_USB
CN9
THERM_ALERT#15,22
5
4
3
2
1
C629 0.1U
VCC5
THERM_ALERT#
VFAN36
FAN CONN
U15
VIN2VO
GND
1
FON#
GND
GND
4
VSET
GND
G995
FANSIG36
FANPWR = 1.6*VSET
3
5
6
7
8
12
C630
10U_0805
FANSIG
3VPCU
3
1
+5V_FAN
R431
100K
Q17
2N7002E-LF
2
C628
0.01U_0603
VCC5
1 2
R430
10K
C631
4700P_0603
CN11
3
2
1
85205-0300L
30
Thermal Senser
R458 200
1
2
3
4
VCC5
2
Q24
2N7002E
VCC3
U18
VCC
DXP
DXN
-OVT
MAX6648
3
1
R464
200K
C661
.01U
VCC5
C655
0.1U/10V
SMCLK
SMDATA
-ALT
GND
THMCLK
8
THMDAT
7
THERM_ALERT#
6
5
3
2
Q23
2N7002E
1
THMCLK 15
THMDAT 15
THERM_ALERT# 15,22
SYS_SHDN# 41
TOUCH PAD
20 mils
L29 BLM21P300S
VCC5
TPDATA36
B B
A A
TPCLK36
TPDATA
TPCLK TPCLK_R
R291
R292
10K_4
10K_4
VCC5
CN5
TB-MB
1
2
3
4
LEFT#
RIGHT#
C331
*.1U-16V_4
C330
*.1U-16V_4
+TPVDD
.1U-16V_4C328
L28 LZA10-2ACB104MT
L26 LZA10-2ACB104MT
LEFT#
RIGHT#
TPDATA_R
CN4
12
11
10
9
8
7
6
5
4
3
2
1
TOUCH_PAD_12P
VCC3
R463 10K
R456 10K
THMDAT
THMCLK
1
Q20
2N7002
2
2
Q19 2N7002
1
3
3
MBDATA
MBCLK
H_THERMDA3
H_THERMDC3
MBDATA 36,44
MBCLK 36,44
2200P
C659
C654
THERM_VCC
0.1U/10V
H_THERMDA
H_THERMDA
H_THERMDC
H_THERMDC
-SYS_SHDN-1
-SYS_SHDN-1
R465
10K
Size Document Number Rev
FAN/BT/TP
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
30 46Tuesday, February 06, 2007
1
1A
A
hexainf@hotmail.com
B
C
D
E
Mini PCI-E Card
WLAN
3VSUS
C518
C536
1U_0603
D D
PCLK_DEBUG
EMI
PCIE_WAKE#22,28,32
C C
0.1U
R305
*22
C506
*22P
PCIE_WAKE#
3VSUS
2
3
1
Q30
*2N7002E-LF
VCC3
C533
0.1U
CLK_PCIE_MINI_WLAN2
CLK_PCIE_MINI_WLAN#2
C476
10U/6.3V
PCIE_TXP021
PCIE_TXN021
PCIE_RXP021
PCIE_RXN021
PCLK_DEBUG2
PLTRST#21,22,28,32,33
C481
0.01U
PCIE_TXP0
PCIE_TXN0
PCIE_RXP0
PCIE_RXN0
PCLK_DEBUG
PLTRST#
CLK_PCIE_MINI_WLAN
CLK_PCIE_MINI_WLAN#
T89
CLK_MINI_OE#
C532
0.1U
VCC1.5
C523
10U/6.3V
Del two .1u caps
nicole 9/25
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
CN22
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved
GND
REFCLK+
REFCLKÂGND
CLKREQ#
Reserved
Reserved
WAKE#
1827680-1
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
3VSUSVCC3
VCC1.5
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
LAD0_1
16
LAD1_1
14
LAD2_1
12
LAD3_1
10
8
6
4
2
LAD1_1
LAD0_1
LAD3_1
LAD2_1
Activate: L
R422 0_4
USBP7+
USBP7-
PDAT_SMB
PCLK_SMB
PLTRST#
RP48 0X2
1
3
RP47 0X2
1
3
R522 0
VCC3
WLAN_LED#
PDAT_SMB 2,13,22,28
PCLK_SMB 2,13,22,28
PLTRST# 21,22,28,32,33
LAD1
2
LAD0
4
LAD3
2
LAD2
4
LFRAME#
for LPC debug
WLAN_LED# 24
LP3 *WCM2012-90
1
2
4 3
R307 10K
D16 1SS355
LAD1 20,36
LAD0 20,36
LAD3 20,36
LAD2 20,36
LFRAME# 20,36
add 0ohm resietor for BenQ request
USBP7+ 21
USBP7- 21
VCC3
RF_EN 36
31
Mini PCI-E Card ROBSON
VCC1.5
CN24
51
Reserved
49
Reserved
47
Reserved
45
Reserved
43
Reserved
41
Reserved
39
Reserved
37
Reserved
35
C585
10U/6.3V
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved
GND
REFCLK+
REFCLKÂGND
CLKREQ#
Reserved
Reserved
WAKE#
1827680-1
C543
0.01U
3VSUS
2
Q11
*2N7002E-LF
C537
*1U_0603
PCIE_TXP3
PCIE_TXN3
PCIE_RXP3
PCIE_RXN3
CLK_PCIE_MINI_RB
CLK_PCIE_MINI_RB#
1
C542
0.1U
A
Nicole update per Intel Rosbon
need double check
PCIE_TXP321
PCIE_TXN321
CLK_PCIE_MINI_RB2
CLK_PCIE_MINI_RB#2
PCIE_REQ2#2
PCIE_WAKE#
PCIE_RXP321
PCIE_RXN321
3
3VSUS VCC3
C539
*0.1U
B B
A A
C561
0.1U
LED_WPAN#
LED_WLAN#
LED_WWAN#
+3.3V
GND
+1.5V
GND
USB_D+
USB_D-
GND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND
Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
TV_POWERON#36
VCC1.5
C575
10U/6.3V
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
B
3VSUS
R333
*0
USB5+
R363 *0
USB5-
R357 *0
R349 *0
R343 *0
PLTRST#
+3V_TV
R322 0
When used TV card, not stuff this resistor
VCC3
1
VCC3
3
*AO?
Q12
2
PLTRST# 21,22,28,32,33
TV_SENSE# 36
L42
*BK2125HS330_8
USBP5+ 21
USBP5- 21
PDAT_SMB 2,13,22,28
PCLK_SMB 2,13,22,28
+3V_TV
C580
*10U/6.3V
C
CIR ( Low Speed USB Interface )
CIR_5V
C811
*.1U-10V
PWRBTN_CIR#36
CIR_ALWON#36
not stuff for BenQ
USBP8+21
USBP8-21
R594 0_4
R593 0_4
2
1 3
Q25
MMBT3904
4.7u/10VC610
R607
10K/F_4
D
USB8+
USB8-
1
5VPCU3VPCU 5VPCU
R601
10K/F_4
SG add
U42
11
VCC
18
P0-4
17
P0-5
16
P0-6
15
P0-7
14
P1-1
13
D+/SCLK
12
D-/SDATA
10
XTALOUT
CY7C63723_SXC
R592 1.5K_4
U44
VCC
OUT
GND
IRM-v036
1
2
Size Document Number Rev
Date: Sheet
P0-0
P0-1
P0-2
P0-3
P1-0
VSS
VPP
VREG/P2-0
XTALIN/P2-1
CIR_VCCCIR_OUT
2
3
3
AO3403
Q26
WIRELESS/ ROBSON/CIR
20 MIL
CIR_OUT
1
2
3
4
5
6
7
8
9
CIR_VREG
CIR_5V
R420
C627
100_8
4.7u/10V
5VSUS
D23 RB500
R402 *0
L65
BK2125HS330_8
CIR_5V
C859
10U/10V/X5R_8
PROJECT : CH3
Quanta Computer Inc.
31 46Tues day, February 06, 2007
E
of
C855
1U/10V_4
1A
5
4
3
2
1
R73 4.7K_4
R77 4.7K_4
LAN_VPDCLK
LAN_VPDDATA
D D
C148
C104
0.1U_4
0.1U_4
R84 0_6
RVCC3
C C
VDD
C110
C682
0.1U_4
0.1U_4
R78 0_6
RVCC3
B B
C184
C658
1000P
1000P
C143
.01U/16V_4
C195
.01U/16V_4
C163
.01U/16V_4
C177
A A
.01U/16V_4
1G -- FCE NS892402P
10/100 -- FCE NS892404
U20
6
SCL
5
SDA
7
WP
24LC08BT-I
C102
C103
1000P
0.1U_4
C173
C116
0.1U_4
0.1U_4
C665
10U/6.3V
C112
1000P
AVDD18
MDI3+
MDI3-
MDI2+
MDI2- RJ45_MX2-
MDI1+
MDI1-
MDI0-
5
VCC
GND
C670
4.7U_6
C666
4.7U_6
C203
1000P
U21
1
TCT3
2
TD3+
3
TD3-
4
TCT2
5
TD2+
6
TD2-
7
TCT1
8
TD1+
9
TD1-
10
TCT0
11
TD0+
12
TD0-
NS892402P
TRF-10-1-24P
A0
A1
A2
C119
1000P
CTRL_12
C150
0.1U_4
1
2
3
8
4
C681
0.1U_4
C118
1000P
MCT3
MX3+
MX3-
MCT2
MX2+
MX2-
MCT1
MX1+
MX1-
MCT0
MX0+
MX0-
C109
0.1U_4
RVCC3
C125
C114
*4.7U_6
1000P
R467
4.7K_4
1
C168
C108
1000P
10U/6.3V
C667
0.1U_4
CTRL_18
24
23
22
21
20
19
18
17
16
15
14
13
C653
4.7U_6
R74
4.7K_4
MCT3
RJ45_MX3+
RJ45_MX3-
MCT2
RJ45_MX2+
MCT1
RJ45_MX1+
RJ45_MX1-
MCT0
RJ45_MX0+MDI0+
RJ45_MX0-
C697
RJ45_TER
1000P/3KV_1808
DB0ZH1LAN06
DBED2LLAN05
RVCC3
32
4
1
C170
0.1U_4
R112
75/F_4
Q22
BCP69T1
C107
1000P
32
4
BCP69T1
C186
0.1U_4
R93
75/F_4
C144
1000P
Q21
AVDD18
C185 1000P
C183 1000P
C684 1000P
C685 1000P
Closed Transfomer
C663
1000P
C151
C656
0.1U_4
0.1U_4
R81
R85
75/F_4
75/F_4
4
PCIE_RXP2_LAN21
PCIE_RXN2_LAN21
PCIE_TXP2_LAN21
PCIE_TXN2_LAN21
CLK_PCIE_LAN2
CLK_PCIE_LAN#2
PCIE_WAKE#22,28,31
C669
0.1U_4
U5
LAN_VPDCLK
LAN_VPDDATA
LAN_SMB_CLK
LAN_SMB_DATA
PCIE_RXP2_R
PCIE_RXN2_R
MDI0+
MDI0ÂMDI1+
MDI1ÂMDI2+
MDI2ÂMDI3+
MDI3-
3
49
50
54
53
6
55
56
5
17
18
20
21
26
27
30
31
38
41
42
43
470p/3KV_1808C660
470p/3KV_1808C652
TX_P
TX_N
RX_P
RX_N
WAKEn
REFCLKP
REFCLKN
PERSTn
MDIP[0]
MDIN[0]
MDIP[1]
MDIN[1]
MDIP[2]
MDIN[2]
MDIP[3]
MDIN[3]
VPD_CLK
VPD_DATA
CLKREQ#
RESERVED
VDD
(426mA)
C106 0.1U_4
C105 0.1U_4
PLTRST#21,22,28,31,33
C668
0.1U_4
R101 49.9
R102 49.9
R99 49.9
R100 49.9
R97 49.9
R98 49.9
R89 49.9
R87 49.9
T15
T14
RVCC3
(4mA)
1
40
45
61
8
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
AVDDH(3.3V)
88E8055
VDD
VDD
VDD
VDD
VDD
VDD
2
7
13
33
Giga: P/N: AJ080550011
TIPL
RINGL
39
44
CN15
1
2
MDC_CABLE
VDD
48
RVCC3
34
35
AVDD
22
28
AVDD
36
SPI_CS
NC
32
37
SPI_CLK
NC51NC
SPI_DI
52
SPI_DO
NC
57
LOM_DISABLEn
VAUX_AVLBL
SWITCH_VCC
VMAIN_AVAL
SWITCH_VAUX
RESERVED
RESERVED
RSET
CTRL18
CTRL12
RESERVED
TESTMODE
LED_ACTn
LED_LINK10/100n
LED_LINK1000n
LED_LINKn
XTALI
XTALO
AVDD
NC
23
64
AVDD18
(218mA)
10
12
11
47
9
24
25
16
4
3
29
46
59
60
62
63
15
14
LOM_DISABLE#
RVCC3
LAN_RTSET
CTRL_18
CTRL_12
T11
T10
T12
T9
CLK_LAN_X1
CLK_LAN_X2
R104 4.99K/F
When stuff 8039, R104 stuff 2.0K
control in BOM
2 1
65
EPAD
AVDD
VDD
19
58
pin32, 51, 52, 57 64 and 19,22,23 are 2.5V power
RJ45_MX0+
RJ45_MX0ÂRJ45_MX1+
RJ45_MX2+
RJ45_MX2ÂRJ45_MX1-
RJ45_MX3+
RJ45_MX3-
RINGL
TIPL
CN16
1
2
3
4
5
6
7
8
9
10
11
12
RJ11-C10054
RX0+
RX0ÂRX1+
TX1ÂTX2+
RX2ÂTX3+
TX3-
NC
RING
TIP
NC
GND
GND
NEED CHECK
Size Document Number Rev
Marvell 8039/55
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
32
R72
10K_4
C135
*0.1U_4
C171 22P
Y1
25MHz/20pF/30ppm
C155 22P
14
13
1
1A
of
32 46Tuesday, February 06, 2007
1
hexainf@hotmail.com
2
3
4
5
6
7
8
VCC3
R323
8.2K
R326
4.7K
PDD[0..15]
PIORDY
IRQ14
VCC5
CD-ROM CONNECTOR
SMT TYPE CNN
CN20
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
DTC144EUA
PLTRST# ID ERST #
PDIOW#20
PIORDY20
IRQ1420
PDA120
PDA020
PDCS1#20
ODD_5V
R215 4.7K_4
NC for Slave
RCSEL
R227
*470_0603
PLTRST#21,22,28,31,32
IDERST#
PDD6
PDD5
PDD4
PDD2
PDD1
PDD0
PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#
ODDLED#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
51
52
VCC3
Q9
1 3
2
PDD8
PDD9PD D7
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#
PDDACK#
DIAG#
PDA2
PDCS3#
C320
0.1U
R275 *10K
C341
1000P_0603
VCC5
R281
10K_4
PDDREQ 20
PDIOR# 20
PDDACK# 20
VCC5
PDA2 20
PDCS3# 20
80 mils
ODD_5V
C335
0.1U
80 mils
R271 0_0805
SATA HDD
C359
10U_0805
VCC5ODD_5V
CN23
1
GND1
2
TXP
3
TXN
4
GND2
5
RXN
6
RXP
7
GND3
8
3.3V
9
3.3V
10
3.3V
11
GND
12
GND
13
GND
14
5V
15
5V
16
5V
17
GND
18
RSVD
GND
GND
GND
GND
SATA
GND
19
20
12V
21
12V
22
12V
23
24
25
26
Update CN23 footprint and PN
nicole 12/12
SATA_TXP0
SATA_TXN0
SATA_RXN0_C
SATA_RXP0_C
+3.3VSATAPDD3
C784
0.1U
C576 3900P/25V
C574 3900P/25V
R344
C549
C545
10U_0805
0.1U
+3.3VSATA
4.7U_0805
ODD_LED#24
0_0805
C569
VCC3
HDD_5V
4
SATA_TXP0 20
SATA_TXN0 20
SATA_RXN0 20
SATA_RXP0 20
C560
0.1U
VCC3
3 5
VCC5
R549
10K/F_4
2
1
TC7SH08FU
U12
40 mils
R324 0_0805
VCC3
10K
R560
ODDLED#
SATA_LED#
33
VCC5HDD_5V
SATA_LED# 20
PDD[0..15]20
A A
B B
Nicole add 9/25
C C
D D
Size Document Number Re v
ODD/SATA/FAN
1
2
3
4
5
6
Date: Sheet
7
PROJECT : CH3
Quanta Computer Inc.
33 46Tuesday, February 06, 2007
of
8
1A
5
4
3
2
1
34
ADOGND
SRS_EN36
DMIC_DATA
CODEC1-BITCLK0
VCC3
BEEP-RR
C853 1U
LINE1-PLG
ADOGND
262_AMP_MUTE#35
MIC1-PLG
DMIC_CLK
1
DVDD
2
GPIO2/DMIC-DATA
3
GPIO3
4
DVSS
5
SDATA_OUT
6
BIT_CLK
7
DVSS
8
SDATA_IN
9
DVDD-IO
10
SYNC
11
RESET#
12
PC-BEEP
R580 2 0K /F_4
R576 1 0K /F_4
R584 39.2K/F_4
C826 .1U
C827 .1U
C828 .1U
C829 .1U
C830 .1U
R613
20K/F
41
44
42
46
47
48
45
SPDIFO
DMIC-CLK
SPDIFI/EAPD
38
39
40
NC
AVSS
AVDD
GPIO043GPIO1
JDREF
HP_OUT_L
HP_OUT_R
ALC262
SENSE_A13LINE2_L14LINE2_R15MIC2_L16MIC2_R17CD_L18CD_GND19CD_R20MIC1_L21MIC1_R22LINE1_L23LINE1_R
4.75VA
37
MONO_OUT
LINE_OUT_R
LINE_OUT_L
SENSE_B
DCVOL
MIC1_VREFO_R
LINE2_VREFO
MIC2_VREFO
LINE1_VREFO
MIC1_VREFO_L
VREF
AVSS
AVDD
24
LINE1-R
LINE1-L
MIC1-R
MIC1-L
U40ALC262SRS
D D
C894 *2 2P
R635 33
C852
100P
R614 E@0
R60422
MIC1-PLG35
HP-PLG35
SPDIF14
ACZ_SDOUT020
BIT_CLK020
ACZ_SDIN020 MIC2-VREFO 35
ACZ_SYNC020
ACZ_RST#020
C C
VCC3
U36 SN74LVC1G86DCKR
PCMSPK26
ACZ_SPKR22
B B
1
BEEP
R573 10K
4
2
3 5
R598
1K
HPR
HPL
36
35
34
33
MIC1-VREFO-R
32
31
MIC2-VREFO
30
29
MIC1-VREFO-L
28
C851 10U
27
26
25
4.75VA
MIC1-R 35
MIC1-L 35
MIC2-R 35
MIC2-L 35
ADOGND
HPR 35
HPL 35
FRONT-R 35
FRONT-L 35
MIC1-VREFO-R 35
MIC1-VREFO-L 35
CN30
C884
.1U
VCC3
1
2
3
4
C887
.1U
4.75VA
C881
10U
C626
.1U
1
2
3
4
C834
.1U
ADOGND
C888
.1U
R633 0_4
VCC3
R634 0_4
C840
10U
Close to pin38 and 25
C889
10U
DMIC_CLK
DMIC_DATA
MIC CON(53398-0471)
Add digital MIC nicole 12/01
For MDC Module
LINE-IN
RVCC3
CN26
1
GND
11
3
5
7
9
AC_SDO
GND
AC_SYNC
AC_SDI
AC_RST#
MDC
ACZ_SDOUT120
ACZ_SYNC120
ACZ_SDIN120
ACZ_RST#120
A A
5
R636 33
C849
*10P
SDIN1_M
GND
GND
AC_BCLK
RSV
RSV
3.3V
C848
2
4
.1U
6
8
10
12
R595
*22
C847
*10P
4
BIT_CLK1 20
LINE1-L
LINE1-R
LINE1-PLG
3
C604 4.7 U-25V
R403 0
R404 0C 601 4.7U-25V
150p_4
C612
ADOGND
C613
150p_4
2
CN29
1
2
6
3
4
5
2SJ-S351-005
9
7
8
10
Size Doc ument Number Rev
ALC262/MIC/LINE/MDC
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
1
34 46Tuesday, February 06, 2007
1A
of
5
hexainf@hotmail.com
Package 1206 for THD+N
performa n c e a nd Vis ta Logo
requirements.
C821 1U/25V
FRONT-L34
FRONT-R34
HPL34
HPR34
D D
262_AMP_MUTE#34
AMP_VOLMUTE#36
+5V_ADO
C C
1 2
12
ADOGND
R387
*100K
R390
100K
R579
100K
1 2
AUD_AMP_GAIN1
AUD_AMP_GAIN2
12
R583
*100K
12
C832 1U/25V
12
C838 4.7U/25V
12
C845 4.7U/25V
12
GAIN1 GAIN2 GAIN
0 0 6dB
12
C600
*47P/50V
ADOGND ADOGND
21
D30 *SW1010CPT
21
D29 SW1010CPT
0 1 15.6dB
1 0 10dB
1 1 21.6dB
12
C596
*47P/50V
+5V_ADO
12
R600
10K
C590
*47P/50V
MUTE
12
LDO_EN
Headphone out
B B
R405 0_4
HP_L
HP_R HPOUT_R
1 2
1 2
R406 0_4
C615
180P
HPOUT_L
C614
180P
4
Add for Realtek AE suggestion
Gain and low frequency consider nicole 12/01
R629 0
R630 0
R631 4.7K
R632 4.7K
C588
*47P/50V
ADOGND
+5V_ADO
12
C819
0.01U
+5V_ADO
R577
10K
ADOGND
ADOGNDADOGND
SPKR_INL
SPKR_INR
HP_INL
HP_INR
C856 1U
1 2
AUD_AMP_GAIN1
AUD_AMP_GAIN2
12
12
C820
C857
1U
10U
ADOGND
4.75VA
12
ADOGND
Layout Note:
Place close chip.
CN27
1
2
6
3
4
5
2SJ-S351-003
C835 1U
C599
1U
SPKR_EN#
HP_EN
C844
1U
12
9
7
8
10
C598
1U
3
2
27
26
24
23
22
25
31
32
17
9
10
12
11
14
13
U37
SPKR_INL
SPKR_INR
HP_INL
HP_INR
BIAS
SPKR_EN#
HP_EN
MUTE#
GAIN1
GAIN2
HPVDD
CPVDD
C1P
C1N
CPGND
PVSS
CPVSS
MAX9789A
3
MAX9789A
TQFN 32PIN
+5V_ADO
R638
10K_4
ADOGND
R637 10K_4
SPKR_EN#
OUTL+
OUTL-
OUTR+
OUTR-
HPR
LDO_EN
LDO_SET
VOUT
VDD
PVDD_8
PVDD_18
GND_28
PGND_5
PGND_21
2
INSPKL+
6
INSPKL-
7
INSPKR+
20
INSPKR-
19
HP_L
16
HPL
HP_R
15
LDO_EN
4
1
29
30
8
18
28
5
21
ADOGND
HP_EN
ADOGND
C823
.1U
4.75VA
ADOGND
max 120mA continuous
LDO output
+5V_ADO
C818
10U
C589
.1U
+5V_ADO
ADOGND
C594
10U
+5V_ADO
L64
R394 *28.7K/F
R383
*10K/F_6
Vout=Vset{1+R(4,5)/R(5,gnd)}
Vset=1.25V
ADOGND
Vout=1.25(1+29.4K /10K)=4.925V
Vout=1.25(1+28.7K/10K)=4.8375V
4
5
ADOGND
U14
*G913C
OUT
SET
R574 0
R616 0
R596 0
C837 .1U
C813 .01U
C886 1000P
BK2125HS330
3
IN
2
GND
1
SHDN
FOR EMI
20 mil
R392 *0
C825
.1U
1
35
VCC5
C831
10U
MAINON 36,38,39,40,41,42
Vout=1.25(1+27K/1 0K)=4.625V
INT-MIC
MIC2-VREFO34
MIC2-L34
MIC2-R34
MIC2-VREFO
MIC2-L
MIC2-R
INT-MIC2
C885
22P-50V_4
R603 2.2K_4
C606 1U-16V_6
C609 1U-16V_6
R615
*1K_4
ADOGND
ADOGND
CN10
1
2
MIC_INT
BLM11A121S
L47
INT-MIC2
ADOGND
HP-PLG34
HP-PLG
MIC-IN
MIC1-VREFO-L34
A A
MIC1-L34
MIC1-R34
MIC1-VREFO-R34
R407 2.2K_4 C620
C616 2.2 U-25V
C611 2.2 U-25V
R408 2.2K_4
change PN for wrong footprint
nicole 01/11/07
5
MIC1-PLG34
L46BLM11A121S
L45BLM11A121S
MICINL_SYS
MICINR_SYS
MIC1-PLG
ADOGND
4
C617
150p_4
C605
150p_4
ADOGND
update sense circuit for realtek AE suggestion
12/06
CN28
1
2
6
3
4
5
2SJ-S351-001
9
7
8
10
3
SPEAKER
INSPKR+
INSPKR-
INSPKL+
INSPKL-
L52 BK1608LL121
L51 BK1608LL121
L50 BK1608LL121
L49 BK1608LL121
ADOGND
2
INSPKR+N
INSPKR-N
INSPKL+N
INSPKL-N
47P
47P
C623
C622
Size Doc ument Number Rev
Date: Sheet
ADOGND
C621
47P
47P
AMPLIFIE R &JACKS
CN7
1
1
2
7
2
7
3
6
3
6
4
4
5
5
INT_SpK
ADOGND
need check PN
11/13
PROJECT : CH3
Quanta Computer Inc.
1
35 46Tuesday, February 06, 2007
1A
of
5
LDRQ#(pin 8) internal is no use
3VPCU
U11
MBCLK
6
MBDATA
5
7
D D
3VPCU
PCLK_541
R320
*22_4
C538
*10P-50V_4
C C
R526 20M_6
B B
A A
23
Y4
32.768KHZ
4 1
C774
15P
PG_1.5V40
MCHPG40
PG_EXT_VGA38
PG_INT_VGA39
PG_SYS41
PG_DDR42
PG_LDO40
SCL
SDA
WP
24LC08
R321
470K_4
5
C770
15P
VCC
GND
CAPSLED#24
NUMLED#24
R527
62K/F_6
1
A0
2
A1
3
A2
8
4
KBSMI#22
PM_BATLOW#22
GATEA2020
RCIN#20
MX029
MX129
MX229
MX329
MX429
MX529
MX629
MX729
MY029
MY129
MY229
MY329
MY429
MY529
MY629
MY729
MY829
MY929
MY1029
MY1129
MY1229
MY1329
MY1429
MY1529
TPCLK30
TPDATA30
A1A 7/8 change 121K to 62K
TV_POWERON#31
D9 SW1010CPT
D10 SW1010CPT
D11 E@SW1010CPT
D12 *I@SW1 0 10CPT
D13 SW1010CPT
D14 SW1010CPT
D15 SW1010CPT
3VPCU
C517
.1U-10V_4
VCC3
2mA
VRON37
KBSMI#
SCI#
GATEA20
RCIN#
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
TPCLK
TPDATA
CAPSLED#
NUMLED#
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_541
R286
4.7K_4
BT_ON#
VRON
MAINON
SUSON
HWPG
2 1
D18 SW1010CPT
2 1
D31 SW1010CPT
2 1
D32 SW1010CPT
R293
4.7K_4
541_32KX1
541_32KX2
USBON#
SERIRQ22,26
LFRAME#20,31
LAD020,31
LAD120,31
LAD220,31
LAD320,31
PCLK_5412
SCI#22
VCC5
PWRLED#24
USBON#29
SUSLED#24
BATLED0#24
BATLED1#24
RF_EN31
BT_ON#30
RSMRST#22
MAINON35,38,39,40,41,42
SUSON41,42
RVCC_ON41
21
21
21
21
21
21
21
R317*0
CS#
C467
.1U-10V_4
T93
change PN to 87541
nicole 01/11/07
4
U10
7
8
9
15
14
13
10
18
19
22
23
31
5
6
71
72
73
74
77
78
79
80
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
105
106
107
108
109
110
111
114
115
116
117
118
119
158
160
62
63
69
70
75
76
148
149
155
156
3
4
27
28
173
174
47
PC87541
4
C462
.1U-10V_4
16
VDD
SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST
SMI
PWUREQ
IOPD3/ECSCI
GA20/IOPB5
KBRST/IOPB6
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15
TINT
TCK
TDO
TDI
TMS
PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7
32KX1/32KCLKOUT
32KX2
IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO
IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15
SEL0
SEL1
CLK
3VPCU
30mA
123
136
157
VCC134VCC245VCC3
VCC4
Host interface
Key matrix scan
PORTD-1
JTAG debug port
PS2 interface
PORTJ-2
PORTM
GND117GND235GND346GND4
GND5
GND6
122
159
167
137
166
VCC5
GND7
VCC6
PORTE
R294
0_4
591_AVCC
AD Input
DA output
PWM
or PORTA
PORTB
PORTC
PORTH
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
96
VCCRTC
R316
0_4
C468
.1U-10V_4
161
95
VBAT
AVCC
IOPE0
IOPE1
IOPE2
IOPE3
NC12
NC11
IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7
IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL
IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46
IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7
IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
PORTI
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO
IOPD4
IOPD5
IOPD6
IOPD7
IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13/BE0
IOPK6/A14/BE1
IOPK7/A15/CBRD
IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
11
C541
1U-16V_6
C531
*.1U-10V_4
AD0
AD1
AD2
AD3
DA0
DA1
DA2
DA3
98
3
TEMP_MBAT
81
82
83
MBATV
84
87
T90
88
89
90
93
94
99
100
101
102
32
33
36
37
38
39
40
43
153
154
162
163
164
165
168
169
170
171
172
175
176
1
26
29
30
2
44
24
25
124
125
126
127
128
131
132
133
138
139
140
141
144
145
146
147
150
151
152
41
42
54
55
143
142
135
134
130
129
121
120
113
112
104
103
48
3
CC-SET
CV-SET
VFAN
BATT_TYPE
MBCLK
MBDATA
REFON
FANSIG
LID#
PWROK_1
ACIN
NBSWON#
SUSB#
CLKRUN#
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
D0
D1
D2
D3
D4
D5
D6
D7
RD#
WR#
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
SUSC#
HWPG
T88
T86
R318 *0_4
CRT_SENSE#
D17 BAS316
T91
21
R319 0_4
TEMP_MBAT 43,44
MBATV 44
WR/BT_SW# 24
SUSC# 22
CC-SET 43
CV-SET 43
VADJ 25
VFAN 30
LCD_ON 25
INTERNET# 24
BATT_TYPE 43
AMP_VOLMUTE# 35
TV_SENSE# 31
MAIL# 24
L1-SKYPE# 24
CRT_SENSE# 24
SRS_EN 34
ECO# 24
SKYPE# 24
MBCLK 30,44
MBDATA 30,44
L2-SKYPE# 24
REFON 44
L1-ECO# 24
L2-ECO# 24
DNBSWON# 22
FANSIG 30
DSC_POWERON# 25
LID# 25
ECPWROK 6,17,22
PWRBTN_CIR# 31
ACIN 43
CIR_ALWON# 31
NBSWON# 24
SUSB# 22
CLKRU N# 22,26
portA, portB, portC, portC, portE4,6,7,
portF, portQ0,1,2 all internal pull-high,
programmable
L-MAIL# 24
L-INTERNET# 24
BAT/AC# 43
CHG# 43
VCC3
R295
10K_4
HWPG
2
C535
.1U-10V_4
C527
.1U-10V_4
ENV1
BADDR0
BADDR1
SHBM
R290 10K_4
R289 *10K_4
R288 *10K_4
R287 10K_4
C534
10U-6.3V_6
Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the supply.
SHBM=1: Enable shared memory with host BIOS
MBCLK
MBDATA
NBSWON#
BADDR1-0
0 0
0 1
(HCFGBAH, HCFGBAL)
1 0
1 1
CRT_SENSE#
R622 *10K_4
R622,R623, no stuff if is OK can del in B stage
ENV0
ENV1
BADDR0
BADDR1
TRIS
SHBM
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
2
U31
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
RESET#/NC
36
A10
RY/BY#/NC
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
40
A17
13
A18
37
A19
CS#
22
CE#
RD#
24
OE#
WR#
9
WE#
SST39VF080
VCC1_PWROK
Size Document Number Rev
PC87541&FLASH
Date: Sheet
1
3VPCU
C540
C463
.1U-10V_4
.1U-10V_4
3VPCU
I/O Address
(HCFGBAH, HCFGBAL)+1
Reserved
VCC3
25
26
27
28
32
33
34
35
VCC1_PWROK
10
12
29
38
11
3VPCU
31
30
23
39
3VPCU
R521
10K_4
12
C764
.1U-10V_4
3VPCU
Data
2F
4F
D0
D1
D2
D3
D4
D5
D6
D7
T187
R530 4.7K_4
R529 4.7K_4
R623 10K_4
Index
2E
4E
D0
D1
D2
D3
D4
D5
D6
D7
NC1
NC2
NC3
VCC
VCC
GND
GND
PROJECT : CH3
Quanta Computer Inc.
1
36
of
36 46Tuesday, February 06, 2007
1A
5
hexainf@hotmail.com
4
3
2
1
VCC5
21
1 2
PD9
CH551H-30PT-30V-0.5A
PC136
1U/25V_X5R/0603
1 2
PC32
.015U/16V/X7R/0603
7.5K/0603/F
DAC
SS
1 2
CS1P
ISH
33
CS1N
32
CS2N
31
30
Z2906
29
VCCA
28
27
DAC
26
SS
25
24
23
1 2
2 1
PC26
1U/25V/X5R/0603
PC44
PC46
1000P/50V/X7R/0402
0.01U/50V/X7R /0603
CS2P
PC147
1u/25V_X5R/0603
PD5
CH551H-30PT-30V-0.5A
VCC5
all resistor footprints in this aera all changed to 0402, except PR148
P/N need Terry update to meet footprint.
nicole 06/11
PR135
10R/0603/F
PC34
0.1U/50V/X7R/0603
PR41
2K/0603/F
PC41
E-RCE-RC
1 2
VREF_452
Update this net name
nicole 9/29
PC39 .015U/16V/X7R/0603
PC37
560P/50V/X7R/0603
1U/25V/X5R/0603
3
NTMFS4707NT1G
NTMFS4119NT1G
PC40
100P/50V/X7R/0402
NTMFS4119NT1G
PQ17
4
PQ7
5
4
213
NTMFS4707NT1G
PQ22
5
4
213
PQ21
4
5
213
NTMFS4119NT1G
PR3
*2.2R/0603/J
*2200P/50V/X7R/0603
5
NTMFS4119NT1G
213
PQ20
4
PC1
PQ8
4
PR4
*2.2R/0603/J
PC4
*2200P/50V/X7R/0603
5
213
PC49
10U/25V/X6S/1206
5
213
PD7
EC31QS03L/30V/3A
2 1
PC47
*10U/25V/X6S/1206
2
PC21
10U/25V/X6S/1206
DRN1
CS1N
PR40 0R/0603
PR140 0R/0603
CS2N
PC146
0.1U/50V/X7R/0603
DRN2
PD8
EC31QS03L/30V/3A
2 1
V-RC1
PC221000P/50V/X7R/0402
37
38
39
40
41
TG1
BG1
V5_1
BST1
DRN1
BST215TG216DRN217BG218V5_219PSI#20FB+21FB-
PC52
1000P/50V/X7R/0402
V-RC2
DRP+
DRP-
PC51
1u/25V/X5R/0603
PR30
TG1
DRN1
BG1
36
34NC35
EN
ISH
CS1+
CS1ÂCS2-
CS2+
ERROUT
VCCA
AGND
DRP+
DRP-
22
PR143
7.5K/0603/F
TG2
BG2
DRN2
VIN_SC452
D D
PR136 *0R/0402
H_DPRSTP#3,6,20
VRON36
DPRSLPVR6,22
PC139 100P/50V/X7R/0402
PR38 24K/0402/F
PR146 160K/0603/F
C C
PC42 100P/50V/X7R/0402
PC35 1000P/50V/X7R/0402
DELAY_VR_PWRGOOD22
B B
DRN1
30.1K/0402/F
A A
DRN2
30.1K/0402/F
12
PR28
PR47
CS1N
PR139
120K/0603/F
PR141
130K/0603/F
12
12
VCCSENSE4
VSSSENSE4
PR22
18.2K/0402/F
DCR_DR1
DCR_DR2
PR145
18.2K/0402/F
CS2N
5
PM_PSI#3
PC29 .022U/16V/X7R/0603
PC141 .022U/16V/X7R/0603
VR_PWRGD_CK410#22
DRP_L1
12
DRP_L2
12
PR137 0R/0402
PR134 499/0603/F
CPU_VID64
CPU_VID54
CPU_VID44
CPU_VID34
CPU_VID24
CPU_VID14
CPU_VID04
PC148
*.1U/10V/X5R/0402
PR156 10R/0603/F
PR152 10R/0603/F
TH
PR25
33K/0402/F
PR42
33K/0402/F
TH
12
PR46
47K/0402/F
PR45
47K/0402/F
12
PR154
1K/0603/F
PR157
47K/0402/F
0.1U/50V/X7R/0603
VCC3
PR39
680/0603/F
CLK_EN#
VREF_452
HYS
CLSET
VID6
VID5
VID4
VID3
VID2
VID1
VID0
VCC3
PR155
680/0603/F
DRPÂDRP+
PR138
12
47K/0402/F
12
12
12
PC45
PC143
PU6
1
2
3
4
5
6
7
8
9
10
11
FB+
FB-
VIN_SC452
100R/0402/F
Z2902
CLKEN#
VREF
HYS
CLSET
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PR44
100R/0402/F
68P/50V/COG/0402
PR31
VPN1
42
43
44
VIN1
VPN1
DPRSL
SC452
VIN214VPN213PWRGD12GND
45
VPN2
PC43
0.1U/50V/X7R/0603
PC144
*100P/50V/X7R/0402
1 2
12
PR148
30.9K/0603/F
12
PC24
*100P/50V/X7R/0402
4
PC31
PC48
10U/25V/X6S/1206
PL6
0.36uH 30A
VIN_SC452
10U/25V/X6S/1206
PL9
0.36uH 30A
PC25
PC50
VIN_SC452
+
PC145
PC135
470u/25V
*10U/25V/X6S/1206
PC16
0.1U/50V/X7R/0603
2200P/50V/X7R/0402
22A
Max Current 44A
44A
VCC_CORE
12
2200P/50V/X7R/0402
12
PC140
PC198
+
0.1U/50V/X7R/0603
PC132
+
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
PC142
12
+
470U/2.5V_7343/12m/1.9
22A
Delete Curent Sensor:
PR158, PR161,159,160
Size Document Number R ev
CPU CORE ( SC452 )
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
PL7
BLM21PG220SN1D
PL8
BLM21PG220SN1D
12
12
PC149
PC138
+
+
470U/2.5V_7343/12m/1.9
470U/2.5V_7343/12m/1.9
1
VIN
37
37 46Tuesday, February 06, 2007
VCC_CORE
1A
of
5
4
3
2
1
39
D D
PC152
E@1U/10V/X5R/0603
PD17
PR72
E@0R0402
1993_DH
PC61
5VPCU
PR165 E@20R/0603_F
19
VDD
17
BST
15
DH
16
LX
18
DL
E@MAX1993
20
GND
11
CSP
12
CSN
10
OUT
9
FB
SKIP
13
E@470P/50V/Y5V/0402
PC160
PU7
VGA_P_VCC
PC154
E@1U/10V/X5R/0603
VCC
POK
LSAT
TON
REF
ILIM
V+
OD
VIN_1993
14
4
PR78 *0 R/0402
3
23
21
VGA_REFIN
7
E@91K/0603/F
8
1
VGA_P_REF
6
PR180
E@140K/0402/F
PR181
E@100K/0402/F
PR85
PC155
E@1U/10V/X5R/0603
24
22
OVP/UVP
SHDN
GATE
REFIN
FBLANK
2
5
VCC3
PR176
E@100K/0402/F
PR82 E@75K/0603/F
PC68
E@470P/50V/NPO/0402
PR182
E@21.5K/0402/F
TON= REF F=450k
VGA_P_REF
V_PWRCNTL
PG_EXT_VGA 36
V_PWRCNTL 17
NB8P-SE
1.2V
LO
HI 1.1V
PR167 E@0R/0402
PC153
*E@.1U/25V/X7R/0603
Vo=VREF*(PR85+PR182)/(PR82+PR85+PR182)
Vo=VREF*PR85/(PR82+PR85)
MAINON 35,36,39,40,41,42
PL11
E@HI0805R800R-10_8
VIN
PC80
E@10U/25V/X6S/1206
C C
20A
VGACORE_G73
PC72
E@0.1U/50V/X7R/0603
2006-0120
B B
+
PC65
E@470U/2.5V/H1.8
VIN_1993
PC70
E@10U/25V/X6S/1206
+
PC159
E@470U/2.5V/H1.8
PC81
E@0.1U/50V/X7R/0603
PL15
E@0.45uH 25A
PR83
E@698/0603/F
PC73
E@.47U/10V/X7R/0603
PC83
E@2200P/50V/X7R/0402
E@AOL1414
876
PQ11
E@AO4456
351
4
2
Add Low Side MOS
PQ40
PQ38
E@AO4456
876
351
5
213
2
VGA_CSP
E@RB500V-40/UMD2
VGA_BST
4
E@0.1U/50V/X7R/0603
1993_LX
1993_DL
4
OCP 35A
PR73
short
A A
Size Document N u m b e r R ev
VCORE
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
38 46Tuesday, February 06, 2007
1
3B
1
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2
3
4
5
39
5VPCU
A A
PC177
*I@2.2U/10V/X5R/0603
3VSUS
PG_INT_VGA36
MAINON35,36,38,40,41,42
GVR_VID0
GVR_VID1
GVR_VID2
GVR_VID3
PC187*I@1000P/50V/X7R/0402
8776VCC
PR203*I@10K/0402/F
3VSUS
**I@10K/NTC/0603
PR215
*I@100K/0402/F
GVR_VID06
B B
GVR_VID16
GVR_VID26
GVR_VID36
update per design guide v1.1
9/29
C C
3VSUS
PR210
*I@22K/0402/J
PR214*I@71.5K/0603/F
PC188 *I@.22U/10V/X7R/0603
PR218
*I@100K/0402/F
1
GVR_VID4
25
26
27
28
29
PR219 *I@ 0R /04 02
PR204 *I@ 0R /04 02 PC179*I@.22U/10V/X5R/0402
PR202 *I@ 0R /04 02
PR213
8776REF
32
31
30
2
8
6
9
15
5
4
3
PR216
*I@10K/0402/J
PC180
*I@0.1U/10V/X5R/0402
8776VCC
PU9
PWRGD
D0
D1
D2
D3
D4
SKIP
SHDN
STDBY
OFS
CCV
TIME
REF
GND
THRM
VRHOT
POUT
PR192
*I@10R/0402/J
16
VCC
*I@MAX8776
19
TON
VDD
BST
PGND
GND
CSP
CSN
GNDS
IC1
N.C.
IC2
PC170
*I@1U/10V/X5R/0603
VIN_8776
PR212
*I@200K/0603/F
7
8776BST
24
8776LX
22
LX
8776DH
23
DH
8776DL
20
DL
21
33
pin 33 is thermal PAD
8776CSP
14
13
10
FB
11
12
17
18
PR109
PD18
*I@RB500V-40/UMD2
8776BST_R
PR187
*I@0R/0603
PR207
*I@11.5K/0402/F
8776VCC
short
PC165
*I@0.22U/16V/X7R/0603
PC172
*I@1nF/50V/X7R/0402
PR201
*I@10R/0402/J
PC182
*I@1000P/50V/X7R/0402
PR206
*I@10R/0402/J
PC181
*I@1000P/50V/X7R/0402
4
PQ41
*I@AO4408
4
PC178
876
2
351
876
PQ45
*I@AO4410
2
351
PR208
*I@10R/0402/J
+VGFX_CORE
VSS_SENSE
PR211
*I@10R/0402/J
PC174
*I@0.1U/50V/X7R/0603
VCC_SENSE
PC175
*I@0.1U/50V/X7R/0603
*I@2200P/50V/X7R/0402
PL17 *I@0.36uH 30a
PR189
*I@1.62K/0603/F
PR195
*I@3.01K/0402/F
Loadline=-8mV/A
PR200
*I@22K/0402/J
PC173
*I@2200P/50V/X7R/0402
PR205
*I@10K/NTC/0603
PR193
*I@22K/0402/J
PC171
*I@10U_25V/X6S/1206
+
PR197
*I@22K/0402/J
PL18 *I@33/6A
VIN_8776
PC169
*I@10U_25V/X6S/1206
+VGFX_CORE
PC184
*I@330UF_2V_7mohm/2.8
PC183
+
GVR_VID0
GVR_VID1
GVR_VID3
GVR_VID4
PR198
*I@22K/0402/J
update per design guide v1.1
01/11
VIN
Delete Current Sensor
PR188 1/22 Terry
PC186
*I@330UF_2V_7mohm/2.8
*I@.01U/25V/X7R/O0402
7.7A
+VGFX_CORE
f=298KHz
D D
PROJECT :CH3
Quanta Computer Inc.
Size Document Number Rev
GMCH (MAX8776)
1
2
3
4
Date: Sheet
39 46Tuesday, February 06, 2007
5
1A
of
5
4
3
2
1
VCCP&VCC1.5V&VCC1.25&VGA1.2
VIN
D D
PC64
PC77
2200P/50V/X7R/0603
0.1U/25V/X7R/0603
PC66
VCCP @ 4.5A
VCCP
C C
Delete Current Sensor
PR76 1/22 Terry
PC74
+
PC75
PC158
0.1U/25V/X7R/0603
330UF_2V_7mohm/2.8
100P 50V(+-5%,NPO,0603)EP
3.8UH/CHOKE-MSCDRI-104R
PR178
8.06K/0603/F
PR179
20K/0603/F
VIN_51124_105
PC71
0.1U/25V/X7R/0603
2200P/50V/X7R/0603
PQ39
578
AO4468
3 6
PR71
241
578
3 6
241
FDS6690AS_NL
PQ37
*2.2R/0603/J
PL10
VCCP VCC1.5
PC60
*2200P/50V/X7R/0603
Vo=0.75Vx(1+R1/R2)
MAINON35,36,38,39,41,42
MCHPG36
B B
PR173 0R/0603
PL13
FBMJ3216HS800-T/1206
PGOOD2
7
1 2
PU3
TPS51124
4
TON
V5FILT15V5IN
16
PR9010R/0603/J
3
GND
1
VO1
TRIP1
PGOOD1
18
24
PR96
100K/0603/F
1 2
PC93
10U/25V/X6S/1206
VCCP VCC1.5
10
11
12
14
9
5
8
BST2
DH2
LL2
DL2
FB2
EN2
TRIP2
PGND2
13
1 2
PR172
100K/0603/F
6
VO2
PR79
51124BST2
0R/0603
PC63
PR166
51124DH2
0.1U/25V/X7R/0603
51124LL2VCCP 51124LL1
51124DL2
FB2
PR87
PC62
6.49K/0603/D
*1U/10V/X5R/0603
PC76
10U/10V/Y5V/0805
short
BST1
DH1
LL1
DL1
FB1
EN1
PGND1
1 2
51124BST1
22
51124DH1
21
20
51124DL1
19
FB1
2
23
17
PR175
8.45K/0603/F
1 2
PC89
10U/10V/Y5V/0805
5VSUS
PR184
0R/0603
PC86
0.1U/25V/X7R/0603
FDS6690AS_NL
5VSUS
PR183
PQ46
578
578
3 6
0R/0402
PQ43
AO4468
3 6
241
241
*2200P/50V/X7R/0603
PC87
PC92
0.1U/25V/X7R/0603
2200P/50V/X7R/0603
PL16
3.8UH/CHOKE-MSCDRI-104R
PR100
PC97
MAINON 35,36, 38,39,41,42
*2.2R/0603/J
PG_1.5V 36
VCC1.5
PR92
20K/0603/F
PR89
20K/0603/F
PC90
VIN_51124_150
PL14
FBMJ3216HS800-T/1206
PC82
10U/25V/X6S/1206
PC85
0.1U/25V/X7R/0603
2200P/50V/X7R/0603
VIN
PC164
10U/25V/X6S/1206
6A
PC79
+
PC167
470U/2.5V_7343/12m/1.9
100P 50V(+-5%,NPO,0603)EP
Vo=0.75Vx(1+R1/R2)
Delete Current Sensor
PR101 1/22 Terry
PC161
0.1U/25V/X7R/0603
41
VCC1.5
PR70
100K/0603/F
PG_LDO
MAINON35,36, 38,39,41,42
5VSUS
VCC1.5
A A
PR106 0R/0402
PC102
0.1U/25V/X7R/0603
5
966EN_1
PC107
10U/6.3V/X5R/0805
PU5
G966-25ADJF1UF
1
POK
VEN
VPP
VIN
NC
VO
ADJ
GND8PGND
9
2
4
3
5
6
7
R2
2.5A
PR103 7.15K/0603/F
PR105
12K/0603/F
R1
Vo=0.8*(1+R1/R2)
4
100 mils
PC103
10U/6.3V/X5R/0805
VCC1.25
PC108
0.1U/25V/X7R/0603
PG_LDO36
3
PG_LDO
MAINON35,36,38,39,41,42
5VSUS
VCC1.5
change PR105, PR107 PN
nicole 01/11/07
1 2
PR104 0R/0402
PC202
*4.7U/6.3 V / X5R/0603
PC101
E@0.1U/25V/X7R/0603
E@G966-25ADJF1UF
1
966EN_2
2
4
3
PC105
E@10U/6.3V/X5R/0805
PU4 close to GPU
2
POK
VEN
VPP
VIN
PU4
5
NC
6
VO
7
ADJ
GND8PGND
9
R2
PR102 E@6.8K/ 0603/F
PR107
E@12K/0603/F
Vo=0.8*(1+R1/R2)
Size Docu ment Number R e v
Date: Sheet
2A
80 mils
R1
PC109
E@10U/6.3V/X5R/0805
PROJECT : CH3
Quanta Computer Inc.
VCCP(1.05V)/VCC1.5
VGA1.2V
E@0.1U/25V/X7R/0603
1
PC106
40 46Tuesda y, Febr uary 06, 2007
1A
of
1
hexainf@hotmail.com
2
3
4
5
3VPCU& 5VPCU& 2.5V& Discharge
PD1.2
PD12
UDZS5.6B TE17
PR118
10K/0603/F
A A
8734_SKIP#
PR225
0R/0603
8734LDO3
PG_SYS36
8734LDO5
PR222
PR228 0R/0603
PC118
PR226
PR220 0R/0603
8734REF
PR230
75K/0603/F
1U/10V/X5R/0603
100K/0603/J
PR114
150K/0603/F
ILIM5ILIM3
PR223
75K/0603/F
SYS_SHDN#30
B B
8734VCC
150K/0603/F
C C
PR229
100K/0603/J
8734TON
8734PG
ILIM3
FB3
8734REF
FB5
ILIM5
8734_SKIP#
8734BST5
8734_SHDN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
8734DL3
PU10
MAX8734AEEI+
N.C
PGOOD
ON3
ON5
ILIM3
SHDN
FB3
REF
FB5
PRO
ILIM5
SKIP
TON
BST5
PR126
PR127
0.01U/50V/X7R/0603
PD20
BAT54S
PR227
100K/0603/J
BST3
LX3
DH3
LDO3
DL3
GND
OUT3
OUT5
DL5
LDO5
VCC
DH5
LX5
short
0R/0603
PC126
28
27
26
25
24
23
22
21
20
V+
19
18
17
16
15
3
2
PC197
0.1U/25V/X7R/0603
8734BST3
8734LX3
8734DH3
8734LDO3
8734DL3
3VPCU
5VPCU
8734V+
8734DL5
8734LDO5
8734VCC
8734DH5
8734LX5
1
PC120
0.1U/25V/X7R/0603
PR231
1U/10V/X5R/0603
8734LDO5
PR115 47R/0603/J
PC193
1U/10V/X5R/0603
PR113 0R/0603
PC195
0.01U/50V/X7R/0603
3
PD13
BAT54S
1
2
PC115
0.1U/25V/X7R/0603
0R/0603
PC123
5VPCU15VPCU
PR117 10R/0603/J
PC194
1 2
1U/25V/X5R/0603
3
DAP202UT106
PC127
4.7U/16V/X5R/1206
0.22U/16V/X7R/0603
1
PD19
2
PC192
0.22U/16V/X7R/0603
SUSON36,42
PC124
578
3 6
241
578
3 6
241
578
3 6
241
578
3 6
241
2
PQ31
DTC144EUEUA-7-F
PQ49
AO4468
PQ50
FDS6680AS
PQ48
AO4468
PQ47
FDS6680AS
PR63
100K/0603/J
1 3
2
2N7002E-T1-E3
PC117
0.1U/25V/X7R/0603
5.2UH/CHOKE-MSCDRI-104R
PR125
*2.2R/0603/J
PC125
*2200P/50V/X7R/0603
PC191
0.1U/25V/X7R/0603
3.8UH/CHOKE-MSCDRI-104R
PR111
*2.2R/0603/J
PC110
*2200P/50V/X7R/0603
5VSUS
PR61
22R/0603/J
3
2
1
PQ30
2N7002E-T1-E3
VIN_8734_3V
PL22
PL19
3VSUS5VPCU
PR60
22R/0603/J
3
1
PQ29
PC119
*10U/25V/X5R/1206
PR122
*0R/0603
FB3
PR124
0R/0603
VIN_8734_5V
PC189
10U/25V/X5R/1206
PR120
*0R/0603
FB5
PR116
0R/0603
1.8VSUS
22R/0603/J
3
2
1
PQ28
2N7002E-T1-E3
FBMJ3216HS480NT/1206
PC116
10U/25V/X5R/1206
3VPCU
5VPCU
15VPCU
PR59
2
PQ35
2N7002E-T1-E3
PL21
PC196
+
330U/6.3V_7343/2.8
PC190
+
330U/6.3V_7343/2.8
PR68
1M/0603/J
SUSDSUSG
3
1
VIN
PC111
10U/25V/X5R/1206
PC122
1U/10V/X5R/0603
PC185
*10U/25V/X5R/1206
PC113
0.01U/50V/X7R/0603
PC59
*0.01U/50V/X7R/0603
5A
FBMJ3216HS480NT/1206
6A
PC114
*10U/25V/X5R/1206
200 mils
PC121
0.01U/50V/X7R/0603
PL20
240 mils
PC112
1U/10V/X5R/0603
PC104
10U/25V/X5R/1206
VIN
Delete Current Sensor
PR119 1/22 Terry
3VPCU
PQ14
8
7
5
4
3VPCU
3.2A
VCC3
Delete Current Sensor
PR112 1/22 Terry
5VPCU
2.6A
5VSUS
120 mils
MAIND
SUSD
876
123
5VPCU
876
123
AO4468
SUSD
5
4
5
4
PQ13
AO4812
RVCCD
PQ12
AO4812
MAIND
1
2
36
40mils
35 mils
3VSUS
RVCC3
3A
VCC5
41
1A
RVCC3
VCC35VPCU
VCC5
PR62
PR56
22R/0603/J
100K/0603/J
MAING
3
MAINON
D D
MAINON35,36,38,39,40,42
2
1 3
PQ27
DTC144EUEUA-7-F
1
2
1
PQ26
2N7002E-T1-E3
2
2N7002E-T1-E3
VCC1.5 VGACORE_G73 +VGFX_CORE
PR50
PR53
22R/0603/J
22R/0603/J
3
3
2
2
1
1
PQ24
PQ25
E@2N7002E-T1-E3
2N7002E-T1-E3
E@22R/0603/J
3
1
PQ9
PR64
2
PQ10
*I@2N7002E-T1-E3
PR69
*I@22R/0603/J
3
1
2
15VPCU
PR48
1M/0603/J
MAIND RVCCDRVCCG
3
2
1
PQ23
2N7002E-T1-E3
PC53
*0.01U/50V/X7R/0603
MAIND 42
RVCC_ON36
5VPCU
2
PQ32
DTC144EUEUA-7-F
3
PR65
100K/0603/J
1 3
2
2N7002E-T1-E3
PQ33
PR66
22R/0603/J
31
15VPCU
31
2
PQ34
2N7002E-T1-E3
PR67
1M/0603/J
PC58
*0.01U/50V/X7R/0603
Size Document Number Rev
3V / 5V
4
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
5
41 46Tuesday, Febr uary 06, 2007
1A
5
4
3
2
1
1.8VSUS & VCC1.8 & SMDDR_VTERM
D D
PC166
10U/6.3V/X5R/0805
20
VBST
19
DRVH
18
LL
17
DRVL
16
PGND
21
GND1
9
VDDQSNS
10
VDDQSET
8
COMP
PU8
TPS51116
5VPCU
14
V5IN
22
GND323GND424GND5
GND2
VTTGND
OCP 20A
PR99
16.5K/0603/F
51116CS
15
CS
13
PGOOD
12
S5
11
S3
1
VLDOIN
2
VTT
4
VTTSNS
6
MODE
3
7
VTTREF
GND
GND626GND7
5
25
27
PC168
0.01U/50V/X7R/0603
51116_PG
51116S5
51116S3
60 mils
10U/6.3V/X5R/0805
PC69
0.033U/25V/X7R/0603
PC67
5VPCU
PR52
100K/0603/F
1 2
PR84
*0R/0603
PR185 0R/0402
PR98 0R/0402
PR170
0R/0603
1.8VSUS
SMDDR_VTERM
SMDDR_VREF
MAINON
SMDDR_VTERM
PC157
10U/6.3V/X5R/0805
PG_DDR 36
SUSON 36,41
MAINON 3 5 , 36,38, 39,40, 41
PC78
10U/6.3V/X5R/0805
Delete Current Sensor
PR74 1/23 Terry
SMDDR_VTERM
PC151
0.1U/25V/X7R/0603
VIN
PL2
FBMJ3216HS800-T/1206
PC95
10U/25V/X6S/1206
1.8VSUS
C C
VDDQSET
GND = 2.5V
5V = 1.8V
R = 1.5~3V
PC96
10U/25V/X 6S/1206
Delete Current Sensor
PR91 and PR97 1/22 Terry
1.8V / 12A
1.8VSUS
PC162
+
470U/2.5V_7343/12m/1.9
10U/25V/X6S/1206
PC163
+
5VPCU
VIN_TPS51116
PC94
400 mils
470U/2.5V_7343/12m/1.9
PR51
0R/0402
PC84
PC99
0.1U/25V/X7R/0603
*0R/0603
0.1U/25V/X7R/0603
*0R/0603
PR168
PR77
PC98
0.1U/25V/X7R/0603
PL12
0.45uH 25A
PC100
2200P/50V/X7R/0603
PQ44
AO4468
PR95
*2.2R/0603/J
PC88
*2200P/50V/X7R/0603
3 6
241
3 6
241
578
578
PQ42
FDS6680AS
PD11
RB500V-40/0.1A/UMD2
PR186
0R/0603
PC91
0.1U/25V/X7R/0603
PR86 0R/0603
PR164
short
51116BST
51116DH
51116LX
51116DL
51116FB
42
VCC1.8
B B
A A
5
3A
MAIND41
PQ36
AO4704
1
2
3 6
4
1.8VSUS
8
7
5
4
12
PC156
0.1U/16V/X7R/0603
Size Docu me n t N u m be r Rev
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
1.8VSUS /SMDDR_VTERM
1
42 46Tuesday, F eb ru ar y 06, 2007
1A
of
5
hexainf@hotmail.com
4
3
2
1
Battery Charger
VA
FBMJ3216HS480NT/1206
PC2
0.1U/25V/X7R /0603
1000P/50V/X7R/0603
PR6
4.7K/0603/F
4.7K/0603/F
PR49 *0R/0603
1.33K/0603/F
2
1 3
PC9
0.1U/25V/X7R/0603
PL4
FBMJ3216HS480NT/1206
PL3
UDZS15B-7-F
PR7
REFIN
PR23
825/0603/F
VCTL
PC15
0.1U/16V/X7R/0603
PR13
1K/0603/J
PD1
470K/0603/J
PR132
PR15
PF1.1
PD15
27
26
CELLS
CSSP
CSSN
DLOV
PGND
CSIP
CSIN
BATT
GND
GND
14
29
17
2
LDO
22
24
BST
25
DHI
23
LX
21
DLO
20
19
18
16
4
REF
8724CLS
3
CLS
PU1
MAX8724ETI+
*SSM34PT
PD16
SSM34PT
PD14
SSM34PT
CELLS
8724_DLOV
PR24
CHG_DH
CHG_LX
CHG_DL
8724CSIP
8724CSIN
MBAT+
8724_REF8724CCI
*0.1U/25V/X7R/0603
PR35 *0R/0402
Vout 5.4V
8724_LDO
2.2R/0603/J
Vref = 4.096V
PR12
37.4K/0603/F
PR9
56K/0603/F
PF1
FUSE 10A 0453010.MR
PR5
10K/0603/F
PC5
0.1U/25V/X7R /0603
8724_LDO
PR34
*0R/0603
PC6
1U/25V/X5R/0603
1 2
ICTL
REFIN
PC10
0.01U/50V/X7 R/0603
PD2
1SS355/UMD2/80V/100mA
DCIN
1
DCIN
10
ACIN
15
VCTL
13
ICTL
12
REFIN
11
ACOK
8724ICHG
9
ICHG
8724IINP
28
IINP
8
SHDN
8724CCV
7
CCV
6
CCI
5
CCS
8724CCS
PC11
0.01U/50V/X7 R/0603
RES 0.01R 2W +-2%/7520
CS_INPJ1.1
8724CSSP
PC131
PR37
PC36
1U/10V/X5R/0603
PC23
0.22U/16V/X7R/0603
PR129
12
1P2P
8724CSSN
REFIN
33R/0603/J
PD6
RB500V-40/0.1A/UMD2
VREF
PC8
1U/10V/X5R/0603
CS_OUT
PC128
PC133
*0.1U/25V/X7R/0603
PC30
1U/10V/X5R/0603
0.1U/25V/X7R /0603
PR11
33K/0603/F
PR14
0R/0603
BAT/AC# 36
PL1
VIN
PR130
1 2
1P 2P
PQ16 AO4407
8
1
7
2
6
3
5
4
PR10
2.2K/0603/F
3
2
PQ1
2N7002E-T1-E3
1
VIN
PC28
0.1U/25V/X7R/0603
PC129
0.1U/25V/X7R/0603
Change Sensor Position
Nicole 12/04
PC134
10U/25V/X5R/1206
PC200
PC137
10U/25V/X5R/1206
3.3N/50V/X7R/0402
Add two 3.3N CA P f or E MI suggestion
Nicole 12/11
MBAT+
PC201
3.3N/50V/X7R/0402
PQ15 AO4407
1
2
3
4
PR128
220K/0603/F
1 6
PR8
2
220K/0603/F
3
PQ4
IMD2AT108
2481
PQ19
FDS6900AS
7
6
5
3
PR17
0R/0603
5
4
PC38
0.1U/25V/X7R/0603
PL5
6.8uH
PR18
*2.2R/0603/J
PC13
*2200P/50V/X7R/0603
8
7
6
5
PC7
0.1U/25V/X7R/0603
PC33
10U/25V/X5R/1206
Ichg+
VIN
FBMJ3216HS480NT/1206
RES 0.015R 1W +-2%/3720
ICHG=(VICTL/R E FI N ) *7 5mV/15mR = 2.5A
E E
AC ADAPTOR IN CONN
PJ2
1
2
3
4
88291-0400-4P-R
PC3
PC199
3.3N/50V/X7R /0402
Add 3.3N CAP for EMI suggestion
Nicole 12/11
D D
Set to 1.67V
C C
B B
4+0.4*VCTL/REFIN
CV-SET36
CC-SET36
Set to 1.67V
5*VICTL/REFIN=2.5A
CHG#36
TEMP_MBAT36,44
ACIN36
3VPCU
PR27 1K/0603/J
PR29 0R/0603
DTC144EUEUA-7-F
PR16 220R/0603/J
PR36 0R/0603
PQ5
43
MBAT+
I_INPUT=[56/ (4 0 . 2 +56)]*75mV/10mR = 3.966A. (85W)
1 6
2
3
PQ18
CELLS
5
BATT_TYPE 36
4
PR19
10K/0603/F
8724IINP
PC14
*1000P/50V/X7R/0603
REFIN
*IMD2AT108
3
8724ICHG
PR131
20K/0603/J
A A
5
PC130
*1000P/50V/X7R/0603
4
BATT-TYPE
High Low
Li-ion 4S2P
Li-ion 4S1P
Ni-MH 8S1P
Li-ion 3S2P
2
Size Document Number Rev
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
BATTERY CHARGER
1
of
43 46Tuesday, Febr uary 06, 2007
1A
5
Battery Connector
E E
4
3
2
1
44
Battery Connector
PD3
UDZS5.6B TE17
3
2N7002E-T1-E3
UDZS5.6B TE17
2
PQ3
Delete Fuse PF2 and PC254
Terry 10/11
PC18
1
0.01U/50V/X7R/0603
0.01U/50V/X7 R/0603
PC27
PQ6
2N7002E-T1-E3
PC12
0.1U/25V/X7R /0603
MBAT+
Read Battery Temperature
PR32
200K/0603/F
3
REFP
2
1
MBATV
Read Battery Voltage
PR33
40.2K/0603/F
TEMP_MBAT 36,43
MBDATA 30,36
MBCLK 30,36
MBATV 36
PN is different for BenQ and NEC. need control in BOM
nicole 11/07
PJ1
456
P_CLK
PC17
47P/50V/NPO/ 0603
3VPCU
PR20 330R/0603/J
PR21 330R/0603/J
PC19
47P/50V/NPO/ 0603
10K/0603/F
PR26
PD4
REFP
3
7
P_DATA
2
1
BATTERY CN
D D
PQ2
IMD2AT108
VIN
C C
1 6
2
IMD2A
REFON36
5
3
4
REFP
PC20
0.1U/25V/X7R/0603
3VPCU
TEMP_MBAT voltage :
System Off
Battery
Adapter
Battery+Adapter
B B
A A
5
4
0V
3.3V
1.6V
System On
1.6V
3.3V
1.6V
3
Li-ion 4S*P
Ni-MH 8S1P
MBATV voltage :
16.8V*40.2/(200+40.2)= 2.812V
12.0V*40.2/(200+40.2)= 2.008V
8.0V*40.2/(200+40.2)= 1.34V
2
Size Document Number Rev
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
BATTERY CNN
1
of
44 46Tuesday, Febr uary 06, 2007
1A
5
hexainf@hotmail.com
4
3
2
1
CH3 B stage change list
1. P9. Del R117,R217,R233, R496, R485 and R486, update the relative net name. 12/01
2. P13. Update SDRAM SMbus clock and data net name 12/01
3. P17. Update the HW VRAM strap setting 12/01
4. P28. Del H27 12/01
D D
5. P30. Del R398 12/01
1. P25. Change SW pin definition for not coincident with layout library 01/05/07
2. P17. Update GPU PCI device strapping for NB8P-SE 01/11/07
3. P35. Change C611, C616 PN 01/11/07
4. P36. Change U10 PN 01/11/07
5. P40. Change PR105, PR107 PN 01/11/07
CH3 C stage change list
45
6. P34. Change the capacities of C601 and C604 from 1u to 4.7u for Realtek AE suggestion 12/01
7. P34. Add digtal MIC array 12/01
8. P35. Add R629, R630, R631 and R632, Change C838, C845 from 1u to 4.7u, C616, C611 from 1u to 2.2u . 12/01
9. P34. Add R635 and R636 in HDA_SDIN signal 12/05
10. P25. Del C6 and C13 for EDID CLK and DATA issue 12/05
6. Delete CPU_Vcore Current Sensor:PR158, PR159, PR160, P R 161 1/22
7. Delete Current Sensor PR188, PR76, PR101,PR119, PR112, PR91, PR97, PR74 1/22
8. P33. Change CN20 footprint 1/24
9. P24. Add R643, R644, R645 and R646 1/26
10. Delete CPUVcore 0 ohm resistor: PR142, PR144, PR43, PR147, PR149, PR150, PR153 02/01/07
11. P29. Update CN8 signal sequence, cable need update 12/05
12. P34, 35. Del Q28, R620, R621, add R637, R638 and C894 12/06
13. P39. Change PC170 from 10u to 1u 12/06
C C
14. P33. Update CN23 footprint, need new PN 12/06
15. P14. Change R230 footprint to 0402 12/07
16. P2. Change U19 PN from B version to D version. 12/01
17. P24, P36. Change quick button function definition 12/08
18. P25. Change CN13 footprint from SMT to DIP. 12/04
19. P41. Change PQ12, PQ13 net name 12/08
20. P39. Change PQ41to AO4408, PQ45 to AO4410 12/08
11. Delete Max1993 0ohm resistors PR88, PR163, PR171, PR177 02/01/07
12. Delete SC452 reserved 0 ohm resistors: PR133, PR151 02/01/07
13. Delete Max8776 Reserved 0 ohm resistors: PR190, PR191, PR194, PR196, PR217, PR209, PC176 02/01/07
14. Delete TPS51124 Power Good Reserved 0 ohm resistor: PR80, PR94 02/01/07
15. Delete G966 Power Good Reserved 0 ohm resistor: PR110, PR108 02/01/07
16. Move PC93 behind PL13 02/01/07
17. Delete Max8734 Reserved 0 ohm resistors: PR123, PR221, PR121, PR224 02/01/07
18. Delete TPS51116 PC150, PR162, PR93, PR169, PR75 02/01/07
19. Del C740 and C693 02/05/07
20. Add R643, R644, R645 and R646 02/05/07
21. Add signal L2-ECO# 02/05/07
21. P38. Change PQ40 to AOL1414, PQ11, PQ38 to AO4456 12/08
22. P2.P42. Add C895, C896, PC199, PC200, PC201 3.3nF for EMI issue 12/11
23. Add C897 and PC202 for frequency adjust 12/11
B B
24. P39. Change MAX8776 FB net from +VGFX_CORE to VGFX_CORE 12/11
22. Change C732, C700, C842, C860 footprint 02/05/07
23. Change R10, R423-R428, R643-R646 from 330ohm to 150ohm 02/06/07
24. Del S W 1 02/07/07
25. Stuff LP9--LP12 and change them footprint, unstuff 0ohm resistors 02/02/07
25. P25. Add magnetic sense LID SW for NEC 12/11
26. P31. Change U44 footprint, need apply new PN 12/11
27. P28. Del R327,R329, R551 and R554 for they have intternal pull-up, del R532 and R556 for wrong connection 12/12
28. P16, P25. Add B channel LVDS signals for EXTERNAL SKU 12/12
29. P24. Change R427, R426, R428 from 150ohm to 330ohm, LED power change from VCC5, 5VPCU to VCC3 and 3VPCU 12/12
30. P25. Change LID SW footprint and PN for NEC 12/14
31. P36, P26. C770, C774 change from 10pF to 15pF, C808 from 22pF to 27pF. 12/14
32. P30. Change BT connector for NEC and BenQ share 12/14
33. P9. Del R170, R161, add R642 and change net +VCCA_MPLL_L 12/18
A A
Size Document Number Rev
46--CHANGE LIST
5
4
3
2
Date: Sheet
PROJECT : CH3
Quanta Computer Inc.
of
45 46Wednesday, February 07, 2007
1
A
5
SLP_S3#(SUSB#):Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).
SLP_S4#(SUSC#):1.Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power
4
3
2
1
46
4
3VPCU
5VPCU
NBSWON#
5
RVCCD
3
S4 POWER
7
RSMRST#
8
DNBSWON#
9
SUSC#
SUSB#
D D
2
8734LDO5
AC Adapter
Charger Circuit
1
VIN
Always System power
Battery
10
SUSON
MAINON
For other device to know system is below the S3 state
Power off when system into S3-S5
EC
15
RVCC3
6
20
SB
CK_PWG
CLOCK
VRON
14
ECPWROK
C C
19
21
PWROK H_PWRGD
CPU
13
HWPG
23
H_RESET#
CPU CORE VR
VCC_CORE
16
17
22
VR_PWRGD_CK410
DELAY_VR_PWRGOOD
11
VCC1.25
System power 3
B B
System power 2
VCC2.5
VGA1.2V
VCC1.05
VCC1.5
18
PLTRST_MCH#
NB
System power 1
SLP_S4(Other
device to know
below the S3)
DDR VR
VCC5
VCC3
3VSUS
5VSUS
1.8VSUS
SMDDR_VTERM
12
PG_LDO
PG_1.5V/MCHPG
PG_SYS
PG_DDR
PG_EXT_VGA
PG_INT_VGA
AND
10
MAINON
INT VGA Power
chip
11
+VGFX_CORE
A A
EXT VGA Power
chip
5
4
VGACORE_G73
3
PROJECT : CH3
Quanta Computer Inc.
Size Document Number Rev
POWER SEQUENCE
2
Date: Sheet
1
of
46 46Tuesday, February 06, 2007
1A
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