Appendix
16 KL401x and KL402x
Register Table
These registers exist once for each channel.
Address Denomination Default
value
R/W Storage medium
R0
reserved 0x0000 R
...
... ... ... ...
R4
reserved 0x0000 R
R5
Raw DAC value variable R RAM
R6
Diagnostic register not used 0x0000 R
R7
Command register not used 0x0000 R
R8
Terminal type e.g. 4012 R ROM
R9
Software version number 0x???? R ROM
R10
Multiplex shift register 0x0218/0130 R ROM
R11
Signal channels 0x0218 R ROM
R12
Minimum data length 0x9800 R ROM
R13
Data structure 0x0000 R ROM
R14
reserved 0x0000 R
R15
Alignment register variable R/W RAM
R16
Hardware version number 0x???? R/W SEEROM
R17
Hardware compensation: Offset specific R/W SEEROM
R18
Hardware compensation: Gain specific R/W SEEROM
R19
Manufacturer scaling: Offset 0x0000 R/W SEEROM
R20
Manufacturer scaling: Gain 0x0020 R/W SEEROM
R21
Manufacturer's switch-on value 0x0000 R/W SEEROM
R22
reserved 0x0000 R/W SEEROM
...
... ... ... ...
R30
reserved 0x0000 R/W SEEROM
R31
Code word register variable R/W RAM
R32
Feature register 0x0006 R/W SEEROM
R33
User scaling: Offset 0x0000 R/W SEEROM
R34
User scaling: Gain 0x0100 R/W SEEROM
R35
User switch-on value 0x0000 R/W SEEROM
R36
reserved 0x0000 R/W SEEROM
...
... ... ... ...
R63
reserved 0x0000 R/W SEEROM