AUO M170EN05 V6 Specification

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AU OPTRONICS CORPORATION

17.0” SXGA Color TFT-LCD Module

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Spec. No.: DDPM-EN05-v6-1.0

Version: 6

Total pages: 28

Date: 2003-Nov-13

Product Specifications

Model Name: M170EN05

V.6

Approved by Prepared by

CCChiu

DDBU Marketing Division / AU Optronics Croporation

Customer Checked & Approved by

(C) Copyright AU Optronics, Inc.

January, 2003 All Rights Reserved. M170EN05 V.6 ver1.0

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Product Specifications

17.0” SXGA Color TFT-LCD Module
Model Name: M170EN05

V.6

( ) Preliminary Specifications

(• ) Final Specifications

Note: This Specification is subject to change without notice.

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i Contents

ii Record of Revision

1.0 Handling Precautions

2.0 General Description

2.1 Display Characteristics

2.2 Functional Block Diagram

2.3 Optical Characteristics

2.4 Pixel format image

3.0 Electrical characteristics

3.1 Absolute Maximum Ratings

3.2 Connectors

3.3 Signal Pin

3.4 Signal Description

3.5 Signal Electrical Characteristics

3.6 Interface Timing

3.6.1 Timing Characteristics

3.6.2 Timing Definition

3.7 Power Consumption

3.8 Power ON/OFF Sequence

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4.0 Backlight Characteristics

4.1 Signal for Lamp connector

4.2 Parameter guideline for CCFL Inverter

5.0 Vibration, shock and drop

5.1 Vibration and shock

5.2 Drop test

6.0 Environment

6.1 Temperature and humidity

6.1.1 Operating conditions

6.1.2 Shipping conditions

6.2 Atmospheric pressure

6.3 Thermal shock

7.0 Reliability

7.1 Failure criteria

7.2 Failure rate

7.2.1 Usage

7.2.2 Components de-rating

7.3 CCFL life

7.4 ON/OFF cycle

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8.0 Safety

8.1 Sharp edge requirement

8.2 Material

8.2.1 Toxicity

8.2.2 Flammability

8.3 Capacitors

8.4 Hazardous voltage

9.0 Other requirements

9.1 Smoke free design

9.2 National test lab requirement

10.0 Mechanical Characteristics

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ii Record of Revision

Version and Date Page Old description New Description Remark

0.1 2003/04/09 All First Edition for Customer All New

0.2 2003/05/09 9/20 Brightness (min): 250nit Brightness (min): 230nit Update

0.3 2003/05/26 P.6 N/A

0.4 2003/8/19 P.19

1.0 2003/11/13 All Preliminary Final

3.8 Power on/Off sequence
(Graph re-arrange)

TCO compliance
Arrange the graph for

clarification

Addition

Update

(C) Copyright AU Optronics, Inc.

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1.0 Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.

2) Be sure to turn off power supply when inserting or disconnecting from input connector.

3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.

4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.

6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when
handling.

7) Do not open nor modify the Module Assembly.

8) Do not press the reflector sheet at the back of the module to any directions.

9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface
Connector of the TFT-LCD module.

10) After installation of the TFT-LCD module into an enclosure (LCD monitor housing, for example), do not
twist nor bend the TFT -LCD module even momentary. At designing the enclosure, it should be taken into
consideration that no bending/twisting forces are applied to the TFT -LCD module from outside.
Otherwise the TFT -LCD module may be damaged.

(C) Copyright AU Optronics, Inc.

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General Description

This specification applies to the 17.0 inch Color TFT-LCD Module M170EN05.

The display supports the SXGA (1280(H) x 1024(V)) screen format and 262k colors (RGB 6-bits data).

All input signals are 2 Channel LVDS interface compatible.

This module does not contain an inverter card for backlight.

2.1 Display Characteristics

The following items are characteristics summary on the table under 25  condition:

ITEMS Unit SPECIFICATIONS

Screen Diagonal [mm] 432(17.0")
Active Area [mm] 337.920 (H) x 270.336(V)
Pixels H x V 1280(x3) x 1024
Pixel Pitch [mm] 0.264 (per one triad) x 0.264
Pixel Arrangement R.G.B. Vertical Stripe

Display Mode Normally White
White Luminance [cd/m2] 300 (center) @ 7mA, 40,000hrs

Contrast Ratio 450 : 1 (Typ)
Optical Response Time [msec] 16 (Typ)
Color Saturation 72% NTSC
Nominal Input Voltage VDD [Volt] +5.0 V
Power Consumption

(VDD line + CCFL line)
Weight [Grams] 2000 (Typ)
Physical Size [mm] 358.5(W) x 296.5(H) x 19.0(D)

Electrical Interface

Support Color 262k colors (RGB 6-bit data )
Temperature Range

Operating
Storage (Shipping)

TCO compliance Meet TCO’03 regulation

[Watt]

o

C]

[

o

C]

[

25W (typ)
(w/o Inverter, All black pattern)

Even/Odd R/G/B data, 3 sync signal,
Clock

0 to +50

-20 to +60

(C) Copyright AU Optronics, Inc.

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2.2 Functional Block Diagram

The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Module:

AU ASIC

G1

LVDS

+ 5V

Connector

DC/DC

Converter

Timing

Controller

LVDS

Receiver

RSDS

Transmitter

G1024

Gamma

Correction

DC POWER

-

TFT-LCD

1280*(3)*1024

Pixels

D1 D3840

Inverter

JAE FI-X30S-HF JST BHR-04VS-1
Mating Type: JAE FI-X30S-H Mating Type: SM04(4.0)B-BHS-1-TB

-

4 CCFL

(C) Copyright AU Optronics, Inc.

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2.3 Optical Characteristics

The optical characteristics are measured under stable conditions at 25 (Room Temperature) :

Item Unit Conditions Min. Typ. Max.

Viewing Angle [degree]

Contrast ratio Normal Direction 250 450 -

Response Time (Note 1) [msec]

Color / Chromaticity
Coordinates (CIE)

Color Coordinates (CIE) White

White Luminance @ CCFL 7.0mA (center)

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Horizontal (Right)
CR = 10 (Left)

Vertical (Up)
CR = 10 (Down)

Horizontal (Right)
CR = 5 (Left)

Vertical (Up)
CR = 5 (Down)

Raising Time - 4 5
Falling Time - 12 20
Raising + Falling - 16 25
Red x 0.61 0.64 0.67
Red y 0.31 0.34 0.37
Green x 0.26 0.29 0.32
Green y 0.58 0.61 0.64
Blue x 0.11 0.14 0.17
Blue y 0.04 0.07 0.10
White x 0.28 0.31 0.34
White y 0.30 0.33 0.36

2

]

[cd/m

60
60

60
60

70
70

70
70

70
70

70
70

80
80

80
80

230 300 -

-

-

-

-

-

-

Luminance Uniformity (Note 2) [%] 75 80 -

Crosstalk (in 75Hz) (Note 3) [%] 1.5

Equipment Pattern Generator, Power Supply, Digital Voltmeter, Luminance meter (PR 880, BM-5A)
Aperture 1with 100cm VD or 2with 50cm viewing distance

Test Point Center (ISO point 22)

Environment < 1 lux

LCD Module

PR-880 /

BM5A /

BM7

measuring distance

Module Driving Equipment

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Note 1: Definition of Response time:

The output signals of photodetector are measured when the input signals are changed from “ Black” to “ White”
(falling time), and from “White” to “ Black” (rising time), respectively. The response time is interval between the 10%
and 90% of amplitudes.

%

100

90

Optical
Response

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TrR

TrD

10

Note 2: Brightness uniformity of these 5 points is defined as below:

329.22m

Minimum Luminance in 5 Points (1-5)
Uniformity = ————————————————————
Maximum Luminance in 5 Points (1-5)

white

0

black

50 %

white

8.7mm

8.7mm

50 %

261.636mm

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Note 4:

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1/2

A

184 gray level 184 gray level

Unit: percentage of dimension of display area

l L

l L

l / LA x 100%= 1.5% max., LA and LB are brightness at location A and B

A-LA’

l / LB x 100%= 1.5% max., LA’ and LB’ are brightness at location A’ and B’

B-LB’

1/6

1/6

1/2

B

2/3 1/3

A’

2.4: Pixel format image

Following figure shows the relationship of the input signals and LCD pixel format.

1 2 1279 1280

1st Line

R G B R G B

R G B R G B

1/2

1/6

B’

0 gray level

1/6

1/3

1/2

2/3

1024th

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R G B R G B

R G B R G B

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p

3.0 Electrical characteristics

3.1 Absolute Maximum Ratings

Absolute maximum ratings of the module is as following:

Item Symbol Min Max Unit Conditions

Logic/LCD Drive Voltage VIN -0.3 +5.5 [Volt]

Select LVDS data order SELLVDS NC NC [Volt]

CCFL Inrush current ICFLL - 38 [mA]

CCFL Current ICFL - 7.6 [mA] rms

Operating Temperature TOP 0 +50 [oC] Note 1

Operating Humidity HOP 8 95 [%RH] Note 1

Storage Temperature TST -20 +60 [oC] Note 1

Storage Humidity HST 8 95 [%RH] Note 1

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Note 1 : Maximum Wet-Bulb should be 39 and No condensation.

Relative Humidity %

Twb=39

100

95

80

60

40

20

Storage

range

Operation range

Storage

range

5

0

-20

06050

eratureoC

Tem

T=40,H=95%

T=50,H=55%

T=60,H=39%

T=65,H=29%

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3.2 Connectors

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following components.

Connector Name / Designation

Manufacturer

Type Part Number

Mating Housing Part Number

Connector Name / Designation

Manufacturer

Type Part Number

Mating Type Part Number

3.3 Signal Pin

Pin# Signal Name Pin# Signal Name

1 RxO0- 2 RxO0+
3 RxO1- 4 RxO1+
5 RxO2- 6 RxO2+
7 GND 8 RxOC-

9 RxOC+ 10 RxO3­11 RxO3+ 12 RxE0­13 RxE0+ 14 GND
15 RxE1- 16 RxE1+
17 GND 18 RxE2­19 RxE2+ 20 RxEC­21 RxEC+ 22 RxE3­23 RxE3+ 24 GND
25 NC 26 NC
27 NC 28 Power
29 Power 30 Power

Interface Connector / Interface card

JAE or compatible

FI-X30S-HF

FI-X30S-H

Lamp Connector / Backlight lamp

JST

BHR-04VS-1

SM04(4.0)B-BHS-1-TB

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3.4 Signal Description

The module using a pair of LVDS receiver SN75LVDS82 (Texas Instruments) or compatible. LVDS is a
differential signal technology for LCD interface and high speed data transfer device. Transmitter shall be
SN75LVDS83(negative edge sampling) or compatible. The first LVDS port(RxOxxx) transmits odd pixels
while the second LVDS port(RxExxx) transmits even pixels.

PIN # SIGNAL NAME DESCRIPTION

1 RxO0- Negative LVDS differential data input (Odd data)

2 RxO0+ Positive LVDS differential data input (Odd data)

3 RxO1- Negative LVDS differential data input (Odd data)

4 RxO1+

5 RxO2- Negative LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG)
6 RxO2+ Positive LVDS differential data input (Odd data, H-Sync,V-Sync,DSPTMG)
7 GND Power Ground
8 RxOC- Negative LVDS differential clock input (Odd clock)

9 RxOC+ Positive LVDS differential clock input (Odd clock)
10 RxO3- Negative LVDS differential data input (Odd data)

11 RxO3+ Positive LVDS differential data input (Odd data)
12 RxE0- Negative LVDS differential data input (Even clock)
13 RxE0+ Positive LVDS differential data input (Even data)
14 GND Power Ground
15 RxE1- Positive LVDS differential data input (Even data)
16 RxE1+ Negative LVDS differential data input (Even data)
17 GND Power Ground
18 RxE2- Negative LVDS differential data input (Even data)
19 RxE2+ Positive LVDS differential data input (Even data)
20 RxEC- Negative LVDS differential clock input (Even clock)
21 RxEC+ Positive LVDS differential clock input (Even clock)
22 RxE3- Negative LVDS differential data input (Even data)
23 RxE3+ Positive LVDS differential data input (Even data)
24 GND Power Ground
25 NC ­26 NC ­27 NC ­28 POWER Power
29 POWER Power
30 POWER Power

Note: Input signals of odd and even clock shall be the same timing.

Positive LVDS differential data input (Odd data)

LVDS DATA Name Description
DSP Display Timing: When the signal is high, the pixel data shall be valid to be displayed
V-S Vertical Sync: Both Positive and Negative polarity are acceptable
H-S Horizontal Sync: Both Positive and Negative polarity are acceptable

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TI LVDS X’mitter

SN75LVDS83

Module LVDS signal

(interface connector pin7)

Signal Name Low(open)

D0 Red0
D1 Red1
D2 Red2
D3 Red3
D4 Red4
D5 Red7
D6 Red5
D7 Green0
D8 Green1

D9 Green2
D10 Green6
D11 Green7
D12 Green3
D13 Green4
D14 Green5
D15 Blue0
D16 Blue6
D17 Blue7
D18 Blue1
D19 Blue2
D20 Blue3
D21 Blue4
D22 Blue5
D23 NA
D24 H Sync
D25 V Sync
D26 Display Timing
D27 Red6

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8bits input: M170EN05 only catch bit 2 to bit 7 for 6 bit display
6bits input data format marked with ( ).

RCLKP1

RAP1

RBP1
RCP1

RDP1

G0(0) R5(R3) R4(R2) R3(R1) R2(R0) R1(0) R0(0)

B1(0) B0(0) G5(G3) G4(G2) G3(G1) G2(G0) G1(0)

DE VS HS
RSV

B7(B5) B6(B4) G7(G5) G6(G4) R7(R5) R6(R4)

RCLKP2

RAP2

RBP2

G0(0) R5(R3) R4(R2) R3(R1) R2(R0) R1(0) R0(0)

B1(0) B0(0) G5(G3) G4(G2) G3(G1) G2(G0) G1(0)

RCP2

RDP2

Note: R/G/B data 7:MSB, R/G/B data 0:LSB

O = “First Pixel Data”

E = “Second Pixel Data”

RSV

B7(B5) B6(B4) G7(G5) G6(G4) R7(R5) R6(R4)

B5(B3) B4(B2) B3(B1) B2(B0)

B5(B3) B4(B2) B3(B1) B2(B0)

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Scaling IC

6 bits+FRC

0

1

2

3

4

5

System

8 bits LVDS
transmitter

0

1

2

3

4

5

6

7

8 bits LVDS
Receiver

LVDS interface

Controller IC

0

1

2

3

4

5

6

7

8 bits RSDS
transmitter

01

23

45

67

M170EN05 module

Driver IC

6 bits RSDS
receiver driver IC

open

01

23

45

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3.5 Signal Electrical Characteristics

Input signals shall be low or Hi-Z state when Vin is off
It is recommended to refer the specifications of SN75LVDS82DGG (Texas Instruments) in detail.

Each signal characteristics are as follows;

Parameter Condition Min Max Unit

Vth

Vtl

Differential InputHigh
Voltage(Vcm=+1.2V)

Differential Input Low
Voltage(Vcm=+1.2V)

100

-100

[mV]

[mV]

3.6 Interface Timings

Basically, interface timings described here is not actual input timing of LCD module but output timing of
SN75LVDS82DGG (Texas Instruments) or equivalent.

3.6.1 Timing Characteristics

Signal Item Symbol MIN TYP MAX Unit

DTCLK Freq. Fdck 50 67.5 70 MHz
DTCLK Cycle Tck 14.2 14.8 20 ns
+V-Sync Frame Rate 1/Tv 56.25 75 77 Hz
+V-Sync Cycle Tv 13 13.33 17.78 ms
+V-Sync Cycle Tv 1035 1066 2047 lines
+V-Sync Active level Tva 3 3 lines
+V-Sync V-back porch Tvb 7 38 63 lines
+V-Sync V-front porch Tvf 1 1 lines
+DSPTMG V-Line m - 1024 - lines
+H-Sync Scan rate 1/Th - 80.06 - KHz
+H-Sync Cycle Th 800 844 1023 Tck
+H-Sync Active level Tha (*1) 4 56 Tck
+H-Sync Back porch Thb (*1) 4 124 Tck
+H-Sync Front porch Thf 4 24 Tck
+DSPTMG Display Pixels n - 640 - Tck

Note: Typical value refer to VESA STANDARD (*1) Tha+Thb should be less than 1024 Tck.

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t

H

G

3.6.2 Timing Definition

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844dot

H- Sync

DSPTMG

V- Sy n c

DSPTM

24dot

1H

124do

56dot

640dot

38

3H

3.7 Power Consumption

Input power specifications are as follows;

Symbol Parameter Min Typ Max Units Condition

VDD Logic/LCD Drive

Voltage

IDD VDD current 950 1200 [mA]

PDD VDD Power 4.75 6.6 [Watt] Vin=5V, All Black Pattern

VDDrp Allowable

Logic/LCD Drive
Ripple Voltage

VDDns Allowable

Logic/LCD Drive
Ripple Noise

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4.5 5 5.5 [Volt]

100 [mV]

p-p

100 [mV]

p-p

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3.8 Power ON/OFF Sequence

Vin power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from
any system shall be Hi-Z state or low level when Vin is off.

90% 90%

90% 90%

90% 90%

10%

10%

Vin 10%

Vin 10%

Vin 10%

0V

0V

0V

10%

T2 T5 T6 T7

T2 T5 T6 T7

T2 T5 T6 T7

T1

T1

T1

10%

10%

10%

Signal

Signal

Signal

0V

0V

0V

T4

T4

T3

T3

T3

Lamp

Lamp

Lamp

0V

0V

0V

Symbol

Min Typ Max

T1 0.5 - 10 [ms]

T2 0.5 25 50 [ms]

T3 250 - - [ms]

T4 0.5 200 - [ms]

T5 0.5 16 50 [ms]

T6 0.5 - 10 [ms]

T7 1000 - - [ms]

Values

T4

Unit

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4.0 Backlight Characteristics

4.1 Signal for Lamp connector

Pin # Signal Name

1 Lamp High Voltage

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2

3

4

Lamp High Voltage

No Connection

Ground

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4.2 Parameter guideline for CFL Inverter

Symbol Parameter Min Typ Max Units Condition

(L63) White Luminance 230 300 -

ISCFL CCFL standard current 6.5 7.0 7.5

IRCFL CCFL operation range 3.0 7.0 7.5

ICFL CCFL Inrush current - 26 34 [mA] Note 1

fCFL CCFL Frequency 40 50 80 [KHz]

ViCFL

o

C)

(0

ViCFL

o

C)

(25

TCFL CCFL Dark start time 1.0 sec (Ta=25oC)

VCFL

PCFL CCFL Power consumption 19.6 25.8 [Watt]

CCFL Ignition Voltage 1700

CCFL Ignition Voltage 1200

CCFL Discharge Voltage

(Reference)

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540

700 860

[cd/m

[mA]

rms

[mA]

rms

[Volt]

rms

[Volt]

rms

[Volt]

rms

2

]

(Ta=25

(Ta=25

(Ta=25

(Ta=25

o

C)

o

C)

o

C)

o

C)

Note 2

o

Note 3

o

C)

C)

(Ta=0

(Ta=25

Note 3

o

(Ta=25

C)

Note 4

o

(Ta=25

C)

Note 4

Note 1: Duration=50 [msec]
Note 2: CCFL Frequency should be carefully determined to avoid interference between inverter and TFT LCD
Note 3: CCFL inverter should be able to give out a power that has a generating capacity of over 1700 voltage.
Lamp units need 1700 voltage minimum for ignition
Note 4: Calculator value for reference (ICFL×VCFL=PCFL)
Note 5: Lamp soldering method is required to use “Hook Soldering”.

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5.0 Vibration, Shock, and Drop

5.1 Vibration & Shock

Frequency: 10 - 200Hz
Sweep: 30 Minutes each Axis (X, Y, Z)
Acceleration: 1.5G(10~200Hz P- P)
Test method:

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Acceleration (G)

Frequency (Hz)

Active time(min)

1.5

10~200~10

30

5.2 Shock Test Spec:

Acceleration (G)
Active time
Wave form
Times

Direction: X , Y, Z

50
20

half-sin

1

5.3 Drop test

Package test: The drop height is 60 cm.

6.0 Environment

The display module will meet the provision of this specification during operating condition or after storage or

shipment condition specified below. Operation at 10% beyond the specified range will not cause physical

damage to the unit.

6.1 Temperature and Humidity

6.1.1 Operating Conditions

The display module operates error free, when operated under the following conditions;
Temperature 0
Relative Humidity 8% to 95%
Wet Bulb Temperature 39.0

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0

C to 50 0C

0

C

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6.1.2 Shipping Conditions

The display module operates error free, after the following conditions;
Temperature -20
Relative Humidity 8% to 95%
Wet Bulb Temperature 39.0

6.2 Atmospheric Pressure

The display assembly is capable of being operated without affecting its operations over the pressure range
as following specified;

Maximum Pressure 1040hPa 0m = sea level

Minimum Pressure 674hPa 3048m = 10.000 feet

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0

C to 60 0C

0

C

Pressure Note

Note : Non-operation attitude limit of this display module = 30,000 feet. = 9145 m.

6.3 Thermal Shock

The display module will not sustain damage after being subjected to 100 cycles of rapid temperature
change. A cycle of rapid temperature change consists of varying the temperature from -20
back again.

0

Thermal shock cycle -20

C for 30min

0

C for 30min

60

Power is not applied during the test. After temperature cycling, the unit is placed in normal room ambient for
at least 4 hours before powering on.

0

C to 600C, and

7.0 Reliability

This display module and the packaging of that will comply following standards.

7.1 Failure Criteria

The display assembly will be considered as failing unit when it no longer meets any of the requirements
stated in this specification. Only as for maximum white luminance, following criteria is applicable.

2

Note : Maximum white Luminance shall be 115 cd/m

or more.

7.2 Failure Rate

The average failure rate of the display module (from first power-on cycle till 1,000 hours later) will not exceed 1.0%.
The average failure rate of the display module from 1,000 hours until 16,000 hours will not exceed 0.7%
per 1000 hours.

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7.2.1 Usage

The assumed usage for the above criteria is:

220 power-on hours per month
500 power on/off cycles per month
Maximum brightness setting
Operation to be within office environment (25

7.2.2 Component De-rating

All the components used in this device will be checked the load condition to meet the failure rate criteria.

7.3 CCFL Life

The assumed CCFL Life will be longer than 30,000 hours, typical value is 40,000 hours under stable condition at 25

o

C;

± 5
Standard current at 7.0 ± 0.5mA.
Definition of life: brightness becomes 50% or less than the minimum luminance value of CCFL.

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0

C typical)

7.4 ON/OFF Cycle

The display module will be capable of being operated over the following ON/OFF Cycles.

ON/OFF Value Cycles

+Vin and CCFL power 30,000 10 seconds on / 10 seconds off

8.0 Safety

8.1 Sharp Edge Requirements

There will be no sharp edges or comers on the display assembly that could cause injury.

8.2 Materials

8.2.1 Toxicity

There will be no carcinogenic materials used anywhere in the display module. If toxic materials are used,

they will be reviewed and approved by the responsible AU Toxicologist.

8.2.2 Flammability

All components including electrical components that do not meet the flammability grade UL94-V1 in the
module will complete the flammability rating exception approval process. The printed circuit board will be
made from material rated 94-V1 or better. The actual UL flammability rating will be printed on the printed
circuit board.

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8.3 Capacitors

If any polarized capacitors are used in the display assembly, provisions will be made to keep them from

being inserted backwards.

8.4 Hazardous Voltages

Any point exceeding 42.4 volts meets the requirement of the limited current circuit. The current through a 2K
resistance is less than 0.7 x f (kHz) mA.

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9.0 Other requirements

9.1 National Test Lab Requirement

The display module will satisfy all requirements for compliance to

UL 1950, First Edition U.S.A. Information Technology Equipment

CSA C22.2 No.950-M89 Canada, Information Technology Equipment

EEC 950 International, Information Technology Equipment

EN 60 950 International, Information Processing Equipment

(European Norm for IEC950)

9.2 Label

9.2.1 Product label

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10.0 Mechanical Characteristics

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