Atmel SAM4S-EK2 User guide

SAM4S-EK2

....................................................................................................................

User Guide

11176A–ATARM–24-Sep-12

Section 1
Introduction.................................................................................................................			1-1
1.1	SAM4S Evaluation Kit........................................................................................................		1-1
1.2	User Guide.........................................................................................................................		1-1
1.3	References and Applicable Documents .............................................................................		1-1
Section 2
Kit Contents ................................................................................................................			2-1
2.1	Deliverables .......................................................................................................................		2-1
2.2	Electrostatic Warning .........................................................................................................		2-2
Section 3
Power Up	....................................................................................................................		3-1
3.1	Power up the Board ...........................................................................................................		3-1
3.2	DevStart	.............................................................................................................................	3-1
3.3	Recovery Procedure ..........................................................................................................		3-1
3.4	Sample Code and Technical Support ................................................................................		3-2
Section 4
Evaluation Kit Hardware .............................................................................................			4-1
4.1	Board Overview..................................................................................................................		4-1
4.2	Features List ......................................................................................................................		4-2
4.3	Function Blocks..................................................................................................................		4-2
	4.3.1	Processor.............................................................................................................	4-2
	4.3.2	Memory................................................................................................................	4-2
	4.3.3	Clock Circuitry......................................................................................................	4-3
	4.3.4	Reset Circuitry .....................................................................................................	4-4
	4.3.5	Power Supply and Management..........................................................................	4-4
	4.3.6	UART ...................................................................................................................	4-5
	4.3.7	USART.................................................................................................................	4-5
	4.3.8	Display Interface ..................................................................................................	4-6
	4.3.9	JTAG/ICE.............................................................................................................	4-8
	4.3.10	Audio Interface.....................................................................................................	4-9
	4.3.11	USB Device .......................................................................................................	4-11
	4.3.12	Analog Interface ................................................................................................	4-11
	4.3.13	QTouch Elements ..............................................................................................	4-12
	4.3.14	User Buttons ......................................................................................................	4-13
	4.3.15	LEDs ..................................................................................................................	4-14
	4.3.16	SD/MMC Card ...................................................................................................	4-14
	4.3.17	ZigBEE...............................................................................................................	4-14
	4.3.18	PIO Expansion...................................................................................................	4-15

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4.4	Configuration....................................................................................................................		4-16
	4.4.1	PIO Usage .........................................................................................................	4-16
	4.4.2	Jumpers .............................................................................................................	4-19
	4.4.3	Test Points.........................................................................................................	4-20
	4.4.4	Assigned PIO Lines, Disconnection Possibility..................................................	4-20
4.5	Connectors.......................................................................................................................		4-22
	4.5.1	Power Supply Connector J9 ..............................................................................	4-22
	4.5.2	USART Connector J5 With RTS/CTS Handshake Support...............................	4-22
	4.5.3	UART Connector J7 ..........................................................................................	4-23
	4.5.4	USB Device Connector J15 ...............................................................................	4-23
	4.5.5	TFT LCD Connector J8......................................................................................	4-23
	4.5.6	JTAG Debugging Connector J6.........................................................................	4-25
	4.5.7	SD/MMC - MCI Connector J3 ............................................................................	4-26
	4.5.8	Analog Connector CN1 & CN2 ..........................................................................	4-27
	4.5.9	RS485 Connector J14 .......................................................................................	4-27
	4.5.10	Headphone Connector J11................................................................................	4-28
	4.5.11	ZigBEE Connector J16 ......................................................................................	4-28
	4.5.12	PIO Expansion Port C Connector J12 ...............................................................	4-29
	4.5.13	PIO Expansion Port A Connector J13 ..............................................................	4-30
	4.5.14	PIO Expansion Port B Connector J14 ...............................................................	4-31

Section 5
Schematics .................................................................................................................		5-1
5.1	Schematics.........................................................................................................................	5-1
Section 6
Troubleshooting..........................................................................................................		6-1
6.1	Self-Test.............................................................................................................................	6-1
6.2	Board Recovery .................................................................................................................	6-1
Section 7
Revision History..........................................................................................................		7-1
7.1	Revision History .................................................................................................................	7-1

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Section 1

Introduction

1.1SAM4S Evaluation Kit

The SAM4S Evaluation Kit (SAM4S-EK2) enables evaluation capabilities and code development of applications running on a SAM4SD32 device.

1.2User Guide

This guide focuses on the SAM4S-EK2 board as an evaluation platform. It is made up of 6 sections:

Section 1 includes references, applicable documents, acronyms and abbreviations.

Section 2 describes the kit contents, its main features and specifications.

Section 3 provides instructions to power up the SAM4S-EK2 and describes how to use it.

Section 4 provides board specifications, describes the development environment and presents the hardware resources, default jumper, switch settings and connectors.

Section 5 provides schematics.

Section 6 provides troubleshooting instructions.

1.3References and Applicable Documents

Table 1-1. References and Applicable Documents

Title	Comment
SAM4SD32 Datasheet	www.atmel.com

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Section 2

Kit Contents

2.1Deliverables

The Atmel® SAM4S-EK2 toolkit contains the following items:

Board:

–a SAM4S-EK2 board

–a universal input AC/DC power supply with US, Europe and UK plug adapters

Cables:

–one USB cable

–one serial RS232 cable

A Welcome Letter

Figure 2-1. Unpacked SAM4S-EK2

Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues concerning the contents of the kit.

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Kit Contents

2.2Electrostatic Warning

The SAM4S-EK2 board is shipped in a protective anti-static bag. The board must not be subjected to high electrostatic potentials. A grounding strap or similar protective device should be worn when handling the board. Avoid touching the components or any other metallic element of the board.

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Section 3

Power Up

3.1Power up the Board

Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug adapter corresponding to that of your country, and insert it into the power supply.

Connect the power supply DC connector to the board and plug the power supply to an AC power plug.

The board LCD should light up and display a welcome page. Then, click or touch the icons displayed on the screen and enjoy the demo.

3.2Sample Code and Technical Support

After boot up, you can run some sample code or your own application on the development kit. You can download sample code and get technical support from the Atmel web site: http://www.atmel.com

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Section 4

Evaluation Kit Hardware

4.1Board Overview

This section introduces the Atmel SAM4S-EK2 Evaluation Kit design. It introduces system-level concepts, such as power distribution, memory, and interface assignments.

The SAM4S-EK2 board is based on the integration of an ARM® Cortex®-M4 processor with on-board NAND Flash and a set of popular peripherals. It is designed to provide a high performance processor evaluation solution with high flexibility for various kinds of applications.

Figure 4-1. SAM4S-EK2 Block Diagram

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Evaluation Kit Hardware

4.2Features List

Here is the list of the main board components and interfaces:

SAM4SD32 chip LQFP100 package with optional socket footprint

12 MHz crystal

32.768 KHz crystal

Optional SMB connector for external system clock input

NAND Flash

2.8 inch TFT color LCD display with touch panel and backlight

UART port with level shifter circuit

USART port with level shifter circuit multiplexed with RS485 port with level shifter circuit

Microphone input and mono/stereo headphone jack output

SD/MMC interface

Reset button: NRST

User buttons: Left and Right

QTouch® buttons: Up, Down, Left, Right, Valid and Slider

Full Speed USB device port

JTAG/ICE port

On-board power regulation

Two user LEDs

Power LED

BNC connector for ADC input

BNC connector for DAC output

User potentiometer connected to the ADC input

ZigBEE connector

2x32 bit PIO connection interfaces (PIOA, PIOC) and 1x16 bit PIO connection interface (PIOB)

4.3Function Blocks

4.3.1Processor

The SAM4S-EK2 is equipped with a SAM4SD32 device in LQFP100 package.

4.3.2Memory

The SAM4SD32 chip embeds:

2048 Kbytes of embedded Flash

160 Kbytes of embedded SRAM

16 Kbytes of ROM with embedded BootLoader routines (UART, USB) and In-Application Programming functions (IAP) routines

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The SAM4SD32 features an External Bus Interface (EBI) that permits interfacing to a broad range of external memories and virtually to any parallel peripheral. The SAM4S-EK2 board is equipped with a memory device connected to the SAM4 EBI:

One NAND Flash MT29F2G08ABAEA.

Figure 4-2. NAND Flash

	+3V3		+3V3			NAND FLASH
		R15		R16		MN3
		47K		47K
						MT29F2G08ABAEA
PC17					16			29	PC0
						CLE	I/O0
PC16					17			30	PC1
PC9					8	ALE	I/O1	31	PC2
PC10					18	RE	I/O2	32	PC3
	JP9					WE	I/O3	41	PC4
PC14	Header2				9		I/O4	42	PC5
							I/O5	43	PC6
						CE	I/O6	44	PC7
PC18	R19	0R			7	R/B	I/O7	48
					19
						WP	N.C28	47
+3V3					1		N.C27	46
R21	47K				2	N.C1	N.C26	45
					3	N.C2	N.C25	40
			R22		4	N.C3	N.C24	39
			0R		5	N.C4	N.C23	38
			DNP		6	N.C5	PRE	35
					10	N.C6	N.C22	34
					11	N.C7	N.C21	33
					14	N.C8	N.C20	28
		DGND			15	N.C9	N.C19	27
					20	N.C10	N.C18			+3V3
								37
					21	N.C11
					22	N.C12	VCC	12
					23	N.C13	VCC		C27	C28	C29
					24	N.C14		36	100nF	100nF	1uF
					25	N.C15
					26	N.C16	VSS	13
						N.C17	VSS

DGND

NCS0 chip select signal is used for NAND Flash chip selection. Furthermore, a dedicated jumper can disconnect it from the on-board memories, thereby letting NCS0 free for other custom purposes.

4.3.3Clock Circuitry

The clock generator of a SAM4SD32 microcontroller is composed of:

A Low Power 32.768 Hz Slow Clock Oscillator with bypass mode

A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)

A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4 (default value), 8 or 12 MHz.

A 60 to 130 MHz PLL (PLLB) providing a clock for the USB Full Speed Controller

A 60 to 130 MHz programmable PLL (PLLA), capable to provide the clock MCK to the processor and to the peripherals. The input frequency of PLLA is from 7.5 to 20 MHz

The SAM4S-EK2 board is equipped with one 12 MHz crystal, optional Piezoelectric Ceramic Resonator 12 MHz (Murata ref. CSTCE12M0G15L99-R0), one 32.768 Hz crystal and an external clock input connector (optional, not populated by default).

Figure 4-3.

External Clock Source

NOT POPULATED

J1

C3

R11

1

R1

DNP

20pF

0R

XIN32

2

3

4

5

<![if ! IE]> <![endif]>1

R2

R3

DNP

3

Y3

49.9R 1%

MN1

32.768KHz

<![if ! IE]> <![endif]>1

C1

20pF

DGND

R4

0R

XIN

DGND

<![if ! IE]> <![endif]>2

XOUT32

3

Y1

PB9

R6

DNP

97

DGND

Y2

12MHz

_XIN

C4

R12

DNP

PB9

C2

20pF

SAM4SD32

20pF

0R

<![if ! IE]> <![endif]>2

R5

0R

XOUT

DGND

DGND

R7

DNP

PB8

R8

DNP

96

PA7_RTS0_PWMH3

49

XIN32

R9

DNP

PA7

PB8_XOUT

48

XOUT32 R10

DNP

PA8

PA8_CTS0_AD12BTRG

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Evaluation Kit Hardware

The SAM4SD32 chip internally generates the following clocks:

SLCK, the Slow Clock, which is the only permanent clock of the system

MAINCK, the output of the Main Clock Oscillator selection: either a Crystal Oscillator or a 4/8/12 MHz Fast RC Oscillator

PLLACK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLA)

PLLBCK, the output of the Divider and 60 to 130 MHz programmable PLL (PLLB)

4.3.4Reset Circuitry

On-board NRST button BP1 provides an external reset control of the SAM4SD32.

The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide a reset signal out to the external components. Conversely, it can be asserted low from the outside to reset the microcontroller Core and the peripherals. The NRST pin integrates a permanent pull-up resistor of 100 kOhm to VDDIO.

On the SAM4S-EK2 board, the NRST signal is connected to the LCD module and JTAG port.

Note: At power-on, the NRST signal is asserted with a default duration of 2 clock cycles. That duration may not be sufficient to correctly reset any other system or board devices connected to that signal. First, in your custom application, you need to check for these device’s datasheets about reset duration requirements. Then, you need to set an appropriate configuration in the NRST Manager. This is done through the ERSTL field in the RSTC_MR register. The NRST duration is thereby configurable between 60 µs and 2 s, whether it is subsequently activated by a software reset or a user reset. Refer to the SAM4SD32 datasheet for in-depth information.

4.3.5Power Supply and Management

The SAM4S-EK2 board is supplied with an external 5V DC block through input J9. It is protected by a PolyZen diode (MN9) and an LC combinatory filter (MN10). The PolyZen is used in the event of an incorrect power supply connection.

The adjustable LDO regulator MN12 is used for the 3.3V rail main supply. It powers all the 3.3V components on the board.

Figure 4-4. Power Block

J9	MN9	MN10
MP179P 2.1mm	ZEN056V130A24LS	BNX002-01

1	1	3			1	CV	3
2					SV
					2	CG1	4
<![if ! IE]> <![endif]>3			C64	+ C65	SG		5
						CG2
		<![if ! IE]> <![endif]>2	100nF	22uF			6
						CG3

+5V

+ C66 22uF

					DGND
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
+5V			4		+3V3
2
VIN			VOUT
1			5	R89
SD	<![if ! IE]> <![endif]>GND1	<![if ! IE]> <![endif]>GND2	ADJ		C76
				+ C75
				169K 1%
	<![if ! IE]> <![endif]>3	<![if ! IE]> <![endif]>6		100uF	100nF
				R92
				102K 1%

DGND

The SAM4SD32 product has different types of power supply pins:

VDDIN pin:

Power for the internal voltage regulator, ADC, DAC, and analog comparator power supplies. The voltage ranges from 1.8V to 3.6V.

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VDDIO pins:

Power for the Peripherals I/O lines. The voltage ranges from 1.62V to 3.6V.

VDDOUT pin:

Output of the internal voltage regulator.

VDDCORE pins:

Power for the core, including the processor, embedded memories and peripherals. The voltage ranges from 1.62V to 1.95V.

VDDPLL pin:

Power for the PLL A, PLL B and 12 MHz oscillator. The voltage ranges from 1.62V to 1.95V.

Note: VDDPLL should be decoupled and filtered from VDDCORE.

4.3.6UART

The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for communication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART is associated with two PDC channels to reduce the processor time on packet handling.

This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to the DB9 male connector J7.

Figure 4-5. UART

					MN6
					MAX3232CSE
			+3V3	16			1
					VCC	C1+
				C39			C38
				100nF			100nF
				2	V+	C1-	3
	+3V3	+3V3	C40
				6			4
			100nF		V-	C2+
	R45	R46		C41			C42
				100nF			100nF
	100K	100K
				15			5
					GND	C2-
	PA10			11	T1IN	T1OUT	14
		R47	0R	12			13
	PA9				R1OUT	R1IN
				10			7
					T2IN	T2OUT
		R48	0R	9			8
					R2OUT	R2IN
	TP5		TP6	DGND
	SMD		SMD

J7

1

6

2

7

3

8

4

9

5

			<![if ! IE]> <![endif]>10		<![if ! IE]> <![endif]>11
DGND

FGND

4.3.7USART

The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex universal synchronous/asynchronous serial link. The data frame format is extensively configurable (data length, parity, number of stop bits) to support a broad range of serial communication standards. The USART is also associated with PDC channels for TX/RX data access.

Note: For design optimization purposes, both transmitters have been implemented on the same PIO lines, that is PA21, 22, 23, 24, 25.

To avoid any electrical conflict, the RS485 transceiver is isolated from the receiving line PA21.

Should you need to implement an RS485 channel in place of the RS232, follow the procedure below:

1.make sure your software will permanently set PA23 to a high level - this will permanently disable the RS232 receiver.

2.change JP31 to make sure that 2-3 pins are connected.

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4.3.7.1RS232

SAM4S-EK2 connects the USART1 bus (including TXD, RXD, RTS, CTS handshake signal controls and EN command) to the DB9 male connector J5 through the RS232 Transceiver MN5.

Figure 4-6.

USART Evaluation Kit Hardware

USART

+3V3

MN5

3

ADM3312EARU

6

VCC

C1+

C31

C32

C33

C34

4.7uF

100nF

100nF

20

100nF

1

V+

C1-

2

21

V-

C2+

DGND

C35

C36

4

100nF

100nF

C2-

R32

23

GND

24

J5

+3V3

C3+

47K

19

C37

1

SD

22

100nF

6

PA23

R31

0R

5

EN

C3-

2

7

PA22

R33

0R

7

T1IN

T1OUT

18

3

PA21_232 R34

0R

10

15

8

PA24

R35

0R

8

R1OUT

R1IN

17

4

PA25

R36

0R

11

T2IN

T2OUT

14

9

R37

47K

9

R2OUT

R2IN

16 R38

0R

5

+3V3

12

T3IN

T3OUT

13

R3OUT

R3IN

DGND

<![if ! IE]> <![endif]>10

<![if ! IE]> <![endif]>11

DGND

FGND

4.3.7.2RS485

As noticed above, the USART1 is shared with the RS485 port, connected to the transceiver MN4, connected to the 3-point connector J4. The design includes selectable jumpers for RS485 bus termination resistors selection (JP10, JP11, JP12).

Figure 4-7. RS485

			+3V3				+3V3
			RS 485					R24
			R23
								TBD
			10K
								DNP
			MN4
			ADM3485ARZ			+3V3
PA21_485	R25	0R	1	VCC	8			JP10
			RO			C30		Header2
PA25	R26	0R	2	GND	5	100nF		J4
			RE					1
PA24	R27	0R	3					2
			DE			DGND
PA22	R28	0R	4		6
				A				3
			DI		7
				B
			DNP			R29	JP11	JP12
			JP28				Header2	Header2
						120R
			Header2 nm					FGND
								R30
								TBD
								DNP
							DGND

4.3.8Display Interface

The SAM4S-EK2 carries a TFT Transmissive LCD module with touch panel, FTM280C34D. Its integrated driver IC is ILI9325. The LCD display area is 2.8 inches diagonally measured, with a native resolution of 240 x 320 dots.

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4.3.8.1LCD Module

The LCD module gets reset from the NRST signal. As explained, this NRST is shared with the JTAG port and the push-button BP1. The LCD chip select signal is connected to NCS1; the jumper JP13 can disconnect it so that this PIO line is available for other custom usage.

The SAM4SD32 communicates with the LCD through PIOC where an 8-bit parallel “8080-like” protocol data bus has to be implemented in software.

Figure 4-8. LCD Block

				+3V3
				+ C43	C44	C45		R49
	PC[0..31]			10uF	100nF	100nF		47K
				DGND
										J8
		PC13							1	FH26-39S-0.3SHW
										VDD
		PC22		PC7		LCD_DB17			2
		PC23		PC6					3	DB17
						LCD_DB16				DB16
		PC24		PC5		LCD_DB15			4
		PC25		PC4					5	DB15
						LCD_DB14				DB14
		PC26		PC3		LCD_DB13			6
		PC27		PC2					7	DB13
						LCD_DB12				DB12
		PC28		PC1		LCD_DB11			8
		PC29		PC0					9	DB11
						LCD_DB10				DB10
		PC30				LCD_DB9			10
		PC31				LCD_DB8			11	DB9
						LCD_DB7			12	DB8
						LCD_DB6			13	DB7
						LCD_DB5			14	DB6
						LCD_DB4			15	DB5
						LCD_DB3			16	DB4
						LCD_DB2			17	DB3
		+3V3				LCD_DB1			18	DB2
						LCD_DB0			19	DB1
				PC11					20	DB0
		R56		PC8					21	VDD
				PC19					22	RD
		10K							23	WR
			NRST	PC15	JP13	Header2			24	RS
NRST									25	CS
									26	RESET
									27	IM0
									28	IM1
				LED_A	R59	0R			29	GND
		R58				LED_K1			30	LED-A
						LED_K2			31	LEDK1
		4.7K				LED_K3			32	LEDK2
						LED_K4			33	LEDK3
						Y_UP			34	LEDK4
						Y_DOWN			35	Y+
		DGND				X_RIGHT			36	Y-
						X_LEFT			37	X+
									38	X-
									39	NC
										GND
LCD_DB0	R61	4.7K								LCD
LCD_DB4	1	DNP
		8
LCD_DB2	2	7	RA2						DGND
LCD_DB3	3	6	4.7Kx4
LCD_DB1	4	5	DNP
LCD_DB8	1	8
LCD_DB6	2	7	RA3		X_RIGHT
LCD_DB7	3	6	4.7Kx4		Y_UP				Thepart is placedas
LCD_DB5	4	5	DNP		X_LEFT				close as possible to J8
LCD_DB9	R63	4.7K			Y_DOWN
						1	5	4	3
		DNP
									D1
							2		PACDN044Y5R
				DGND					TVS, SOT23-5
									DNP
							DGND		NOT POPULATED

DGND

DGND

Z7

DGND

DGND

PIN 39

PINs on BOT

FTM280C34D

PIN 1

DGND

DGND

Sixslotson PCB for LCD shield

4.3.8.2Backlight Control

The LCD backlight is made of four integrated white chip-LEDs arranged in parallel. These are driven by an AAT3155 charge pump, MN8. The AAT3155 is controlled by the SAM4SD32 through a single PIO line PC13 interface; the 0 Ohm resistor R68 is mounted in series on this line, which permits to use it for other custom purposes. In that case, the pull-up resistor R64 maintains the charge pump permanently enabled by default.

On the anode drive line, a 0 Ohm resistor R59 is implemented in series for an optional current limitation.

Figure 4-9. Backlight Control

				MN8
		+3V3	10	AAT3155ITP-T1		7
				C1+	C2+
		R64	C54
			1uF
	R68	47K				6
			9	C1-	C2-
PC13	0R		11			8
			5	EN/SET	OUTCP
	FB1			IN		3
+3V3	BN03K314S300R				D1
			C57			2
			4.7uF		D2	1
			4	GND	D3	12
					D4

DGND	LCD BACKLIGHT

C55 1uF

LED_A

LED_K1

LED_K2

LED_K3

LED_K4

TP7

C56 1uF

DGND

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11176A–ATARM–24-Sep-12

Evaluation Kit Hardware

4.3.8.3Touch Screen Interface

The LCD module integrates a 4-wire touch panel controlled by MN7 (ADS7843) which is a slave device on the SAM4SD32 SPI bus. The controller sends back the information about the X and Y positions, as well as a measurement for the pressure applied to the touch panel. The touch panel can be used with either a stylus or a finger.

The ADS7843 touch panel controller connects to the SPI0 interface via the NPCS0 control signal. Two interrupt signals are connected and provide events information back to the microcontroller: PenIrq and Busy.

Note: PenIrq (PA16) is shared with ZigBEE signal IRQ0. Busy (PA17) is shared with ZigBEE signal IRQ1.

Therefore, if using a ZigBEE interface in concurrence with the TouchScreen controller, take care not to have both drivers enabled at the same time on either PA16 or PA17.

For that purpose, 0 Ohm resistors have been implemented on these PIO lines in order to disconnect either end driver from the other:

On the touch panel controller side, R67 and R69.

On ZigBEE side, R117 and R120.

For further information, refer to the “Schematics” section.

Touch ADC auxiliary inputs IN3/IN4 of the ADS7843 are connected to test points (TP8, TP9) for optional function extension.

Figure 4-10. Touch Panel Control

X_RIGHT

Y_UP

X_LEFT

Y_DOWN

TP8 TP9

R72	R73
100K	100K

				+3V3
	MN7			R62
				100K			+3V3
	ADS7843E
2			16	PA14
	XP	DCLK
3			14	PA13	JP32
4	YP	DIN	12	PA12	Header2	PA11	R65
5	XM	DOUT	15
	YM	CS					100K
		BUSY	13	R67	0R	PA17		R69 0R
			11					PA16
		PENIRQ						+3V3
			9	R70	0R
7		VREF
			1				L2
8	IN3	VCC1	10
							R71 10uH-100mA
	IN4	VCC2
				C58	C59	C60	1R
			6
		GND		100nF	100nF	100nF	C61
								R74
							4.7uF
								0R

AGND_TP	LCD TOUCH SCREEN

AGND_TP

DGND

4.3.9JTAG/ICE

A standard 20-pin JTAG/ICE connector is implemented on the SAM4S-EK2 for the connection of a compatible ARM JTAG emulator interface, such as the SAM-ICE from Segger.

Notes: 1. The NRST signal is connected to BP1 system button and is also used to reset the LCD module. The 0 ohm resistor R44 may be removed in order to isolate the JTAG port from this system reset signal.

2.The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M4 is not in debug mode. To avoid current consumption on VDDIO and/or VDDCORE due to floating input, the internal pull-up resistor corresponding to this PIO line must be enabled.

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