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This device complies with FCC Rules Part 15. Operation is subject to the following
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•This device must accept any interference received, including interference that
may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to
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not installed and used in accordance with manufacturer’s instructions, may cause
harmful interference to radio communications. However , there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause
harmful interference to radio or television reception, which can be determined by
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•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment to an outlet on a circuit different from that to which
the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
WARNING! The use of shielded cables for connection of the monitor to the
graphics card is required to assure compliance with FCC regulations. Changes
or modifications to this unit not expressly approved by the party responsible for
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Canadian Department of Communications Statement
This digital apparatus does not exceed the Class B limits for radio noise emissions
from digital apparatus set out in the Radio Interference Regulations of the Canadian Department of Communications.
6
ASUS ASMM User’s Manual
Page 7
I. ASUS ASMM
Introduction
The ASUS ASMM (System Monitoring Module) allows you to monitor the system
temperature, fan speed, and voltages to enhance system stability.
IMPORTANT! If your motherboard is equipped with the LM78 chipset, your
system will report a warning since both LM78s (motherboard and ASMM’ s) use
the same I/O address (0x0290), which is necessary for the LDCM software to
function. Future BIOS will automatically disable the onboard LM78 if the ASMM
is detected. You can manually disable the motherboard’s LM78 if your BIOS
does not have this feature. If your motherboard does not have LM78, no modifications are necessary to use the LDCM software.
Procedures for disabling the motherboard’s LM78:
1.Create a bootable disk by formatting a floppy disk with system files.
Introduction
I. ASUS ASMM
2.Copy the PCI control program PCICFG.EXE to the disk
3.Copy the DOS utility DEBUG.COM to the disk (NOTE: DEBUG.COM must
be the same version as the DOS version on the disk otherwise, it will not run)
4.With the disk inserted, restart the system and press DELETE to enter BIOS setup.
5.Adjust the BIOS boot sequence to A:, C: (that is, boot from floppy first).
6.Save and exit the BIOS setup.
NOTE: Ignore the next hardware monitor error from the LM78 conflict.
7.Under the appropriate prompt signs, type the following:
A>PCICFG <ENTER>
BUS00>WD 1 3 60 00670290 <ENTER> (disables the motherboard’s LM78)
BUS00>Q <ENTER> (exits the PCI control program)
A>DEBUG <ENTER>
>A <ENTER>
xxxx:0100int 19 <ENTER>
xxxx:01yy<ENTER> (then remove the disk from the floppy drive)
>G <ENTER>
ASUS ASMM User’s Manual7
Page 8
I. ASUS ASMM
I. ASUS ASMM
Parts/Layout
ASUS ASMM System Monitoring Module
Server Monitor
Signal Connector
(TO MOTHERBOARD
SERVER CONNECTOR)
Key Unlock
Signal Connectors
RESET Signal
Connectors
Chassis Fan Connector
CPU1 Fan Connector
NCNCNC
Power LED
SMB Clock
NC
Ground
Ext SMI#
CPU1 TH
Server Connector
SMB Data
CPU2 TH
11
1
NCNCNC
Minimum Server Monitor
Signal Connector
TO MOTHERBOARD
SERVER
CONNECTOR
+3V Standby
Keyboard Lock
TH REFV
20
10
NC
Reset
KLOCK_C
KLOCK_MB
RSTCON_C
RSTCON_MB
Chassis Fan
CPU 1 Fan
TO MOTHERBOARD
EXTERNAL
MICRO-SWITCH
JP4
Automatic Server Restart
Period Selection
Chassis Connector
(TO MOTHERBOARD
EXTERNAL MICRO-SWITCH)
Battery Power (≤10µA)
Photo Sensor
JP5
R
LM78
Hardware
Monitor
JP6
Intrusion Signal
Ground
JP7
Chassis Intrusion
Selection
CR2032
3V Button
Cell Battery
CPU 2 Fan
Hardware Monitor
CPU2 Fan Connector
8-bit ISA Connector
Motherboard Server Connector
Pin 1
(NC)
(NC)
(NC)
Ground
(NC)
CPU1 TH
Ext SMI#
CPU2 TH
(NC)
Reset
Server Connector
(NC)
(NC)
(NC)
Power LED
SMB Clock
SMB Data
Keylock
+3Volt Standby
TH REFV
ASUS ASMM User’s Manual8
Page 9
I. ASUS ASMM
Server Monitor Card Specifications
BUS: 8-bit ISA bus
Battery: Lithium battery, 210mA/hour
Thermal Monitoring: Onboard temperature sensor
Voltage Monitoring: +12V, -12V, +5V, -5V, +3.3V (+3.3V needs external cable)
Fan Speed Monitoring: 3 tachometers are provided to detect fan speed as low as
660rpm(needs cooling fan with extra signal line)
Chassis Intrusion Monitoring: Optical chassis detection circuit is built-in (external
intrusion detection connector is also provided)
Security Mode: Keyboard lock/unlock, Reset enable/disable (requires Feature cable)
Automatic Server Reset/Restart: Server can be hard reset after a system hang is
detected (requires Feature cable)
Mechanical: Half-length ISA card (length: 10.3cm, height: 8.8cm)
Connectors
Voltages: +5V, -5V, +12V, -12V, +3V
Temperature: Card temperature
Tachometer: 3 fan speed detectors
Chassis Intrusion: Onboard Photo-resistor and Chassis intrusion external connector
ASR Reset Status: Under ASR (Automatic Server Restart) Test mode, one can ac-
cess the status of ASR RESET signal while no real system reset will be active.
Card Rev. ID: For future upgradability, a card rev. ID is provided to enable the
software to identify the card and adapt for it.
ASR Status: One can recognize whether the ASR function is enabled or disabled.
ASUS ASMM User’s Manual9
Page 10
I. ASUS ASMM
I. ASUS ASMM
System/Cabling
System Control
Reset Button: Hard reset enable/disable
Keylock: keyboard lock/unlock
ASR: Enable, disable, and test
ASR period: ASR period selection through mini-jumper (30/120/240/330 seconds)
Chassis Intrusion: As this status will be backup through battery, one can clear the
memorization of intrusion circuit.
System Notification
The system can be notified when the voltage/temperature/fan speed exceeds the
predefined thresholds. The notification mechanism can be as simple as polling or
through SMI#/IRQ service routine, depending on the programming of LM78. Five
ISA IRQs can be selected (IRQs 3, 4, 5, 6, 7) through hardware jumper.
ASMM Color-Coded Cabling
These connections are classified into 3 categories: chassis intrusion, fan monitor,
and server monitor.
Chassis intrusion:Chassis intrusion permits the activation of a user-installed alarm.
One 3-wire cable supports the external customized chassis intrusion alarm. The pin
definitions are: RED (battery power), YELLOW (intrusion signal), and BLACK
(ground). The external intrusion signal should be open-drained.
Fan monitor: The fan monitor provides power for up to 3 fans while monitoring
the connected fans’ rotation through the specially designed tachometer. Three 3wire cables are used to extend the length of each fan connection. The pin definitions
are: YELLOW (tachometer signal), RED (+12V), and BLACK (ground).
Server monitor:The server monitor contains many signals that can be monitored
and controlled through the software. The server monitor signals are: CPU voltage
ID for Pentium II processor (N.A. in P/I-P65UP8), key lock and reset, CPU1 and
CPU2 Vcore (N.A. in P/I-P65UP8), +3.3V, I2C bus (N.A. in P/I-P65UP8), and CPU1
and CPU2 thermister (N.A. in ASMM), EXTSMI#. One 20-wire ribbon cable is
used. The red stipe indicates pin 1.
NOTE: If you want to test the security mode, the KEYLOCK and RESET connections must be correct. If the position of the reset signal is wrong, the reset inhibit
function may not work.
ASUS ASMM User’s Manual10
Page 11
I. ASUS ASMM
Programming Interface
LM 78
The LM78 address is fixed on I/O port 0x0290–0x0297 by default, as follows:
0x0290Power On Self Test codes from ISA bus
0x0294Power On Self Test codes from ISA bus
0x0295The LM78 internal Address register
0x0296Data register
For the relative programming interface, refer to the N.S. LM78 data sheet.
Automatic Server Restart
Four I/O ports are defined in this revision and are allocated on I/O space 0x0298–
0x029F by default. These 4 I/O ports are ASR status/control register, Chassis intrusion reset register, ASR trigger register, and ASR enable/disable register.
ASR Status/Control Register (0x0298/Read/Write)
Read (default value: 00x0001)
bit 7:6 Card revision ID
00SMC rev 1.x
othersReserved
I. ASUS ASMM
Programming Interface
bit 5ASR under reset. Because ASR needs a much longer time to be reset, this bit
should be polled by the BIOS/application before it can be accessed. A “0” indicates the ASR is under reset such that the BIOS/application must wait until it
becomes a “1”. A “1” means the ASR is now out of reset and free for access.
bit 4ASR test output. Under test mode, a “0” indicates a timeout event occurred
as being too long without writing to the ASR trigger register.
bit 3ASR enable or disable. A “0” depicts ASR function is disabled; a “1” indi-
cates the ASR is enabled. While ASR is enabled, if the ASR is not under test
mode, ASR trigger register must be written within a pre-specified time period or the system will get a hard reset.
bit 2Mode select A
“0”Secure mode is disabled (default)
“1”Secure mode is selected. The system will enter the secure mode (key-
board is locked, reset button is disabled) after a special I/O write sequence is executed.
ASUS ASMM User’s Manual11
Page 12
I. ASUS ASMM
Programming Interface
I. ASUS ASMM
bit 1Mode select B
“1”ASR is in normal mode. The ASR can be enabled after a special I/O write
sequence is executed.
“0”ASR is under test mode.
bit 0System in secure mode. A “0” indicates the system is now under secure
mode. A “1” depicts the system is now free for control.
Write
bit 7:3 Reserved.
bit 2Mode select A
Writing a “1” will select secure mode while it will be enabled after a special I/
O write sequence is executed. A “0” will deselect the secure function.
NOTE: If secure mode is selected and entered, deselecting the secure mode will not
free the system out of secure mode. You must execute the special I/O write sequence
to disable the secure function.
bit 1Mode select B
Writing a “1” will select ASR under normal mode while ASR will be en-
abled after a special I/O write sequence is executed. A “0” will deselect the
secure function.
bit 0Reserved
NOTE: If ASR is enabled, putting ASR in test mode will not get the system out of
the ASR normal mode. You must execute the special I/O write sequence to disable
the ASR function.
Writing any value to this I/O port will clear the memory of the chassis intrusion
circuit. This function may only be activated under administrator control. The status
of chassis intrusion can be retrieved by accessing LM78.
ASR Trigger Register (0x029A/Write only)
Periodically executing I/O write to this port will keep the system reset from driving.
Otherwise, a system hard reset will be generated after a pre-specified period of time
with no I/O write to this register if ASR is enabled.
ASR Enable/Disable Register (0x029B/Write only)
A data pattern of xxxx_0001b must be written into this port to produce a special I/O
write sequence to enable ASR and secure function.
ASUS ASMM User’s Manual12
Page 13
I. ASUS ASMM
ASR Enable/Disable Sequence and Test
The ASR function will be enabled by consecutively writing three I/O writes to the
ASR enable/disable register with data pattern of xxxx_0001b. After these I/O writes
are executed, bit 3 of the ASR status/control register will be set to “1” and bit 4 of the
ASR status/control register will become “0” when there is no I/O write to the ASR
trigger register within a pre-specified period of time. (The time period can be selected
through 2 mini-jumpers with 30-, 90-, 240-, 330-second options.) The system will get
a reset if the bit 1/Mode Select B of the ASR status/control register is set to “1” (normal mode). Otherwise, no system reset will be generated; the application can test the
function of the ASR circuit by polling bit 4 of the ASR status/control register without
writing to the ASR trigger register for the pre-specified time for checking whether it
becomes “0” or not. If it is not, the ASR is malfunctioning. If it is, the application can
then issue an I/O write to the ASR trigger register and wait for 30ms. Then bit 4 of the
ASR status/control register can be checked again to see if it has changed to “1”. If it
has, the ASR circuit is correct. Otherwise, the ASR function is not working.
I. ASUS ASMM
Programming Interface
After the ASR function is enabled, consecutively writing three I/O writes to the ASR
enable/disable register with data pattern “xxxx_0001” can disable the ASR function. It
can be verified by reading bit 3 of the ASR status/control register to check if it has
changed “0”. If it has, the ASR is disabled. Otherwise, the SMC card is malfunctioning.
Secure Mode Enable/Disable Sequence
The system will enter secure mode only when bit 2/Mode Select A of the ASR status/control register is set to “1”, then two consecutive I/O writes to the ASR enable/
disable register with data pattern “xxxx_0001” and then another consecutive I/O
write to the ASR trigger register are completed. While the system is under secure
mode, the keyboard will be locked and reset button disabled.
Two consecutive I/O writes to the ASR enable/disable register with data pattern
“xxxx_0001” and then another consecutive I/O write to ASR trigger register will
bring the system out, unlock the keyboard and enable the reset button.
Early Access of ASR
Because the ASR needs more time to be reset (1 more second than the main system),
unexpected problems can occur if someone tries to access/test/arm the ASR in the
BIOS/application while the ASR is still under reset. So, a new status bit called “ASR
under reset” has been added to the ASR status/control register so that the BIOS/
application can poll this bit first to make sure the ASR is out of reset and free for
access. Before you access the ASR, you must test this bit and check the related ASR
setting (that is, the ASR setting is what you want it to be) as long as there is any
possibility that the ASR has been reset for some other reason. For the BIOS, this bit
must be tested before it can access/control the ASR.
ASUS ASMM User’s Manual13
Page 14
I. ASUS ASMM
I. ASUS ASMM
Jumpers
Jumper and Connector Settings
Jumpers
JP1: LM78 I/O space select (Option; PROVIDED BY NEGOTIATION)
JP3: FAN 3 double pulse selection (Option; PROVIDED BY NEGOTIATION)
1-2FAN 3 gets normal FAN pulse signal (default SHORT)
2-3FAN 3 gets double FAN pulse signal
JP4/JP5: ASR period selection
JP4JP5Period select
2-32-35.5 min
1-22-34 in
2-31-21.5 min
1-21-230 sec
JP6: LM78 IRQ selection
JP6IRQ selectJP6IRQ select
1-2IRQ37-8IRQ6
3-4IRQ49-10IRQ7
5-6IRQ5
NOTE: Only one jumper can be set or IRQ lines will get conflict.
JP7: Chassis intrusion selection
JP7Period select
2-3Disable the Chassis intrusion detection on ASMM
1-2Enable the Chassis intrusion detection on ASMM
ASUS ASMM User’s Manual14
Page 15
I. ASUS ASMM
Connectors
• SERVER_CON: Full set server monitor signal connector
Pin#NameI/ODescription
1VID4IPentium II VID4
2VID2IPentium II VID2
3VID0IPentium II VID0
4PGND-Power LED ground connect
5VCORE 1IVCORE voltage from CPU 1
6THRMR-R1IOne thermister on motherboard (default for CPU1)
7EXTSMI#OEXTSMI# to generate SMI# signal (O.D.)
8THRMR-R2IThe other thermister terminal on motherboard (default for CPU2)
9THRM#OA signal to indicate abnormal temperature is detected (O.D.)
10RESET#ORESET signal to hard reset motherboard (O.D.)
11VID3IPentium II VID3
12VID1IPentium II VID1
13VCORE 2IVCORE voltage from CPU 2
14PLED-Power LED power connect
15SMBCLKII2C bus clock (O.D.)
16Key
Connectors
I. ASUS ASMM
17SMBDATAI/OI2C bus data (O.D.)
18KEYUNLK-/OKey unlock signal for motherboard (O.D.)
19+3VI+3V from motherboard for measurement
20VthermOReference voltage for thermister
• MINI_CON: Minimum server monitor signal connector
Pin#NameI/ODescription
1THRMR-R1IOne thermister terminal on motherboard
2+3VI+3V from motherboard for measurement
3THRM#OA signal to indicate abnormal temperature is detected (O.D.)
4VthermOReference voltage for thermister
5Key
6VCOREIVCORE voltage from CPU
ASUS ASMM User’s Manual15
Page 16
I. ASUS ASMM
I. ASUS ASMM
Connectors
• KLOCK_A/KLOCK_B: Key unlock signal connectors for intercepting the
KEYUNLK signal for processing.
Pin#NameI/ODescription
1Power LED-+5V for Power LED
2N.C.
3GND-GROUND
4KEYUNLK-KEY unlock signal
5GND-GROUND
NOTE: The key unlock connector from the chassis can be connected to either one
of these connector while the other connector must be connected to the motherboard
key unlock header
• RSTCON_A/RSTCON_B: RESET signal connectors to intercept the reset but-
ton for processing
The reset signal connector from the chassis can be connected to either one of these
connector while the other connector must be connected to the motherboard reset
button header.
• EXT_I2C: External I2C bus connector to provide external access to the system
resource from the I2C bus.
Pin#NameI/ODescription
1SMBDATAI/OI2C bus data (O.D.)
2+5VOPower for external I2C device
3GND-GROUND
4SMBCLKII2C bus clock (O.D.)
• CHASSIS: Header designed to provide a connection to the customer’s self-de-
signed chassis intrusion hardware.
NOTE: Because the hardware is powered by battery, the power consumption must be
carefully limited. It is 20 µA for the external detection circuit.
Pin#NameI/ODescription
1BATT-+3V power for external circuit
2INTRUDIChassis intrusion signal. “H” indicates intrusion. “L” indicates
chassis is closed.
H: above or equal to 2.5V; L: below or equal to 0.8V
3GND-GROUND
ASUS ASMM User’s Manual16
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