001_Block Diagram
002_System Setting
003_CPU_DMI,PEG,eDP,DDI
004_CPU_DDR4
005_CPU_GND
006_CPU_CFG,RSVD
007_CPU_XDP*
008_CPU_PWR
009_CPU_PWR
010_CPU_POWER_CAP
011_
012_PD_CYPRESS_CCG4
013_DDR4_TERMINATION
014_DDR4_ON-BOARD_A(1)
015_
016_DIM_DDR4 SO-DIMM B(0) TOP
017_
018_DIM_CA/DQ Voltage
019_
020_PCH_HDA,SMBUS,SYS PWR,JTAG
021_PCH-CPT(2)_PCIE,USB2,MISC
022_PCH-CPT(3)_CLK,LPC,USB3
023_PCH-CPT(4)_eDP,PCI,DP
024_PCH-CPT(5)_SPI
025_PCH-CPT(6)_GPIO
026_PCH-CPT(7)_POWER,GND
027_PCH-CPT(8)_POWER,GND
028_PCH-SPI ROM/OTH
029_TEST POINT
030_KBC_IT8225
031_KBC_KB & TP
032_RST_Reset Circuit
033_LAN_RTL8111H-CG
034_LAN_RJ45_CON
035_Mac&N_KEY_IT8299E-120A
036_AUD-ALC3288CG
037_AUD-Headphone
038_USB3.0*2
039_AUD_INT SPK
040_NGFF_SSD_2
041_NGFF_SSD_1
042_
043_eDP_HDMI_Switch
044_DEBUG_LPC
045_CRT_eDP
046_
047_MUX_Redriver_USB3.1/DP
048_HDMI
049_ANT
050_FAN_Thermal Sensor & Fan
051_
052_USB3.1 Gen2 port
053_NGFF Type_WLAN&BT
054_
055_PowerKeyBoard
056_LED & CON
057_DSG_Discharge
058_Power Protect
059_
060_DC & BAT IN
061_
062_
063_
064_
065_
066_
067_screw hold
068_
069_OTH_EMI
070_GPU_PCIE I/F
071_GPU_POWER
072_GPU_FRAME BUFFER
073_VRAM_Channel_A
074_VRAM_Channel_B
075_VRAM_Channel_C
076_VRAM_Channel_D
077_VRAM
078_GPU_CLOCK/STRAP/GPIO_N18
079_GPU_DP/EDP/HDMI/LVDS/CRT
080_PW_COFFEELAKE (1) (4+1+1)
081_PW_COFFEELAKE (2) (4+1+1)
083_PW_+1.05VSUS
084_PW_+1.8VSUS
086_PW_+1.2V/+VTT/+2.5V
087_PW_+3VADSW/+5VSUS
088_PW_LOAD SWITCH
089_PW_CHARGER
090_PW_PROTECTION
091_PW_+NVVDD (1) (N18E 7Phase)
092_PW_+NVVDD (2) (N18E 7Phase)
093_PW_SLAVE CHARGER
094_PW_+FBVDDQ(N18)
096_PW_+12VS_FAN
098_PW_IPC(N18)
099_PW_FLOW CHART
100_Power On Timing--AC mode
101_Power On Timing--DC mode
102_Revision History
103. SKU Table
GX502/GU502 Block Diagram
DDR4 SO-DIMM X1
DDR4 On Board Memory X1
I2C
PD
MUX
CYPD4126-24LQXIT
Page 12
1st NGFF SSD
2nd NGFF SSD
SPEAKER
Port1
HP & MIC
8ohm/1.5W
SPEAKER
8ohm/1.5W
Page 37
Page 39
Audio Jack
J3701
Port2
EXT. MIC
Smart Amp.
TAS5825MRHBR
Page 37
Page 37
Audio Jack
J3702
Audio DAC+ Amp.
ES9118EQ
(2666MHz)
(2666MHz)
INT. DMIC
Page 20~27
PCIe
x8
eDP
SWITCH
TS3DV642A0RUAR
CNVi
Page 12
27MHz
NVIDIA N18E-G2/G1/G0
IFPC
IFPE
IFPD
(HDMI)
(DP)
(eDP)
Page 43
15
16PCIEx1
14
10
I2C
MUX(REDRIVER)
PI3DPX1205AZLB
USB TYPE-A
Port 1
USB TYPE-A
Port 2
USB TYPE-A
Port 3
Page 38
Page 38
Page 52
Page 38
Page 70~79
HDMI Retimer
SN75DP159RGZR
REDRIVER
PI3DPX1203BZHEX
GigaLAN
RTL8125-CG
WiFi / BT
9560
Macro/N Key
IT8299E-120A/BX
GDDR6 VRAM
(256Mbx32)*8
Page 73~77
HDMI Port
4K*2K
Page 48Page 48
LCD Panel
(eDP)
Page 45
Page 45
RJ45
Page 34Page 33
Page 53
KEYBOARD
Page 31
PER-KEY RGB
Page 56
AERO LED
Page 56
Page 35
USB TYPE-C
Port 1
Page 47
Page 47
Reset Circuit
Thermal Sensor
PWM Fan
PowerKeyBoard
LED & CON
Discharge Circuit
Power Protect
DC & Battery
Skew Holes
OTH_EMI
Page 32
Page 50
Page 50
Page 55
Page 56
Page 57
Page 58
Page 60
Page 67
Page 69
Power
+VCORE/+VCCSA/+VCCGT
+VCCIO
+1.05VSUS
+1.8VSUS
1.2V/+VTT/2.5V
+3VADSW/+5VSUS
Load Switch
Charger
Protection
VGA CORE (+NVVDD)
SLAVE CHARGER
+FBVDDQ
+12VS_FAN
PEX_VDD
IPC
Project Name
Title :
Block Diagram
Size
Dept.:
ASUSTeK COMPUTER INC. NB1
Custom
Date: Sheet
Monday, February 18, 2019
Page 80,81
Page 88
Page 83
Page 84
Page 86
Page 87
Page 88
Page 89
Page 90
Page 91,92
Page 93
Page 94
Page 96
Page 88
Page 98
Rev
R1.2GX502GX
Engineer:
99
of
1
Coffeelake H Platform
PCIE9,10,11,12
SATA1a
PCIE21,22,23,24
Page 31
DDR4
CPU
Coffeelake H-Processor
(H62 / 45W)
Page 3~10
DMI
x4
CNL PCH-H
HM370
USB
3.1/3.0
4
1
2
3
24MHz32.768KHz
USB
2.0
1
4
USB REDRIVER
PI3EQX1002B1ZLEX+FDX
5
3
Page 44
LPC
Page 30
SPI
I2C1
Azalia
Page 36
Page 16
Page 14
Debug Conn.
SMBUS3
EC
IT8225VG-128/CX
SPI ROM
Page 28
Page 41
Page 40
Touchpad
Azalia Codec
Page 39
Realtek ALC3288-CG
Page 45
Page 37
Page 37
Page 12
PCIEG
dGPU
(AC-CAP Place on dGPU)
Trace length < 400 MILS
Trace width = 12 MILS
Trace spacing = 15 MILS
+VCCIO
R0301
DMI_TXP0[21]
DMI_TXN0[21]
DMI_TXP1[21]
DMI_TXN1[21]
DMI_TXP2[21]
DMI_TXN2[21]
DMI_TXP3[21]
DMI_TXN3[21]
24.9Ohm
PCIENB_RXP8
PCIENB_RXN8
PCIENB_RXP9
PCIENB_RXN9
PCIENB_RXP10
PCIENB_RXN10
PCIENB_RXP11
PCIENB_RXN11
PCIENB_RXP12
PCIENB_RXN12
PCIENB_RXP13
PCIENB_RXN13
PCIENB_RXP14
PCIENB_RXN14
PCIENB_RXP15
PCIENB_RXN15
12
1%
PEG_RCOMP
U0301C
E25
D25
E24
F24
E23
D23
E22
F22
E21
D21
E20
F20
E19
D19
E18
F18
D17
E17
F16
E16
D15
E15
F14
E14
D13
E13
F12
E12
D11
E11
F10
E10
G2
D8
E8
E6
F6
D5
E5
J8
J9
COFFEE_LAKE_H
PEG_RXP_0
PEG_RXN_0
PEG_RXP_1
PEG_RXN_1
PEG_RXP_2
PEG_RXN_2
PEG_RXP_3
PEG_RXN_3
PEG_RXP_4
PEG_RXN_4
PEG_RXP_5
PEG_RXN_5
PEG_RXP_6
PEG_RXN_6
PEG_RXP_7
PEG_RXN_7
PEG_RXP_8
PEG_RXN_8
PEG_RXP_9
PEG_RXN_9
PEG_RXP_10
PEG_RXN_10
PEG_RXP_11
PEG_RXN_11
PEG_RXP_12
PEG_RXN_12
PEG_RXP_13
PEG_RXN_13
PEG_RXP_14
PEG_RXN_14
PEG_RXP_15
PEG_RXN_15
PEG_RCOMP
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
DMI_RXP_2
DMI_RXN_2
DMI_RXP_3
DMI_RXN_3
3 OF 13
PEG_TXP_0
PEG_TXN_0
PEG_TXP_1
PEG_TXN_1
PEG_TXP_2
PEG_TXN_2
PEG_TXP_3
PEG_TXN_3
PEG_TXP_4
PEG_TXN_4
PEG_TXP_5
PEG_TXN_5
PEG_TXP_6
PEG_TXN_6
PEG_TXP_7
PEG_TXN_7
PEG_TXP_8
PEG_TXN_8
PEG_TXP_9
PEG_TXN_9
PEG_TXP_10
PEG_TXN_10
PEG_TXP_11
PEG_TXN_11
PEG_TXP_12
PEG_TXN_12
PEG_TXP_13
PEG_TXN_13
PEG_TXP_14
PEG_TXN_14
PEG_TXP_15
PEG_TXN_15
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
B25
A25
B24
C24
B23
A23
B22
C22
B21
A21
B20
C20
B19
A19
B18
C18
A17
B17
C16
B16
A15
B15
C14
B14
A13
B13
C12
B12
A11
B11
C10
B10
B8
A8
C6
B6
B5
A5
D4
B4
PCIENB_TXP8
PCIENB_TXN8
PCIENB_TXP9
PCIENB_TXN9
PCIENB_TXP10
PCIENB_TXN10
PCIENB_TXP11
PCIENB_TXN11
PCIENB_TXP12
PCIENB_TXN12
PCIENB_TXP13
PCIENB_TXN13
PCIENB_TXP14
PCIENB_TXN14
PCIENB_TXP15
PCIENB_TXN15
DMI_RXP0 [21]
DMI_RXN0 [21]
DMI_RXP1 [21]
DMI_RXN1 [21]
DMI_RXP2 [21]
DMI_RXN2 [21]
DMI_RXP3 [21]
DMI_RXN3 [21]
R0.1-25
Display
PCIENB_RXN[15:8] [70]
PCIENB_RXP[15:8] [70]
PCIEG_RXN[7:0] [70]
PCIEG_RXP[7:0] [70]
CX0309 0.22UF/6.3V
PCIENB_TXN8
PCIENB_TXN9
PCIENB_TXN10
PCIENB_TXN11
PCIENB_TXN12
PCIENB_TXN13
PCIENB_TXN14
PCIENB_TXN15
1 2
CX0310 0.22UF/6.3V
1 2
CX0311 0.22UF/6.3V
1 2
CX0312 0.22UF/6.3V
1 2
CX0313 0.22UF/6.3V
1 2
CX0314 0.22UF/6.3V
1 2
CX0315 0.22UF/6.3V
1 2
CX0316 0.22UF/6.3V
1 2
PCIEG_RXN7
PCIEG_RXN6
PCIEG_RXN5
PCIEG_RXN4
PCIEG_RXN3
PCIEG_RXN2
PCIEG_RXN1
PCIEG_RXN0
2017/11/16 Add HDMI/TBT/eDP interface for MS-Hybrid by James
U0301D
K36
DDI1_TXP_0
K37
DDI1_TXN_0
J35
DDI1_TXP_1
J34
DDI1_TXN_1
H37
DDI1_TXP_2
H36
DDI1_TXN_2
J37
DDI1_TXP_3
J38
DDI1_TXN_3
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP_0
H33
DDI2_TXN_0
F37
DDI2_TXP_1
G38
DDI2_TXN_1
F34
DDI2_TXP_2
F35
DDI2_TXN_2
E37
DDI2_TXP_3
E36
DDI2_TXN_3
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP_0
D34
DDI3_TXN_0
B36
DDI3_TXP_1
B34
DDI3_TXN_1
F33
DDI3_TXP_2
E33
DDI3_TXN_2
C33
DDI3_TXP_3
B33
DDI3_TXN_3
A27
DDI3_AUXP
B27
DDI3_AUXN
COFFEE_LAKE_H
Refer to CFL-H PDG P.363 (Doc.571391)
PCIENB_TXP8
PCIENB_TXP9
PCIENB_TXP10
PCIENB_TXP11
PCIENB_TXP12
PCIENB_TXP13
PCIENB_TXP14
PCIENB_TXP15
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
4 of 13
CX0325 0.22UF/6.3V
CX0326 0.22UF/6.3V
CX0327 0.22UF/6.3V
CX0328 0.22UF/6.3V
CX0329 0.22UF/6.3V
CX0330 0.22UF/6.3V
CX0331 0.22UF/6.3V
CX0332 0.22UF/6.3V
EDP_TXP_0
EDP_TXN_0
EDP_TXP_1
EDP_TXN_1
EDP_TXP_2
EDP_TXN_2
EDP_TXP_3
EDP_TXN_3
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
DISP_RCOMP
Discrete_high_12V[43]
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
D29
E29
F28
E28
A29
B29
C28
B28
C26
B26
A33
D37
eDP_RCOMP
eDP_RCOMP
Trace length < 100 Mils
Trace Width 5 Mils Trace Spacing 25 Mils
eDP_DISP_UTIL
R0302 24.9Ohm
PCIEG_RXP7
PCIEG_RXP6
PCIEG_RXP5
PCIEG_RXP4
PCIEG_RXP3
PCIEG_RXP2
PCIEG_RXP1
PCIEG_RXP0
1
1 2
EDP_TXP0_CPU [43]
EDP_TXN0_CPU [43]
EDP_TXP1_CPU [43]
EDP_TXN1_CPU [43]
EDP_TXP2_CPU [43]
EDP_TXN2_CPU [43]
EDP_TXP3_CPU [43]
EDP_TXN3_CPU [43]
EDP_AUXP_CPU [43]
EDP_AUXN_CPU [43]
T0301 @
1%
from PCH (for MS-Hybrid)
G27
G25
AUD_AZACPU_SCLK
G29
AUD_AZACPU_SDO
AUD_AZACPU_SDI
R0303 Place Near CPU
1 2
R0303 20Ohm
AUD_AZACPU_SDO
Main Board
AUX of EDP
+VCCIO
1% /MSH
R0304
R0305 2.2kOHM
/DGPU
eDP
MShybrid_high_12V[43]
12
12
EM6K1-G-T2R
N/A
EM6K1-G-T2R
N/A
AUD_AZACPU_SDI_M
2.2kOHM/DGPU
2
61
Q0302A
2
61
Q0303A
AUD_AZACPU_SDO_G
AUD_AZACPU_SCLK_GAUD_AZACPU_SCLK
MShybrid_high_12V
AUD_AZACPU_SCLK_M
MShybrid_high_12V
MShybrid_high_12V
34
61
EM6K1-G-T2R
Q0301A
Q0301B
EM6K1-G-T2R
3 4
34
EM6K1-G-T2R
Q0302B
5
EM6K1-G-T2R
Q0303B
2
5
5
N/A
N/A
N/A
AUD_AZAPCH_SCLK [20]
N/A
AUD_AZAPCH_SDO [20]
AUD_AZAPCH_SDI [20]
GND
GND
Project Name
Title :
CPU_DMI,PEG,FDI,eDP,DDI
Size
Dept.:
C
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
3
Memory Channel A Memory Channel B
www.teknisi-indonesia.com
On Board DDR4 SO-DIMM DDR4
Main Board
M_A_DQ[63:0][14]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U0301A
BR6
DDR0_DQ_0/DDR0_DQ_0
BT6
DDR0_DQ_1/DDR0_DQ_1
BP3
DDR0_DQ_2/DDR0_DQ_2
BR3
DDR0_DQ_3/DDR0_DQ_3
BN5
DDR0_DQ_4/DDR0_DQ_4
BP6
DDR0_DQ_5/DDR0_DQ_5
BP2
DDR0_DQ_6/DDR0_DQ_6
BN3
DDR0_DQ_7/DDR0_DQ_7
BL4
DDR0_DQ_8/DDR0_DQ_8
BL5
DDR0_DQ_9/DDR0_DQ_9
BL2
DDR0_DQ_10/DDR0_DQ_10
BM1
DDR0_DQ_11/DDR0_DQ_11
BK4
DDR0_DQ_12/DDR0_DQ_12
BK5
DDR0_DQ_13/DDR0_DQ_13
BK1
DDR0_DQ_14/DDR0_DQ_14
BK2
DDR0_DQ_15/DDR0_DQ_15
BG4
DDR0_DQ_16/DDR0_DQ_32
BG5
DDR0_DQ_17/DDR0_DQ_33
BF4
DDR0_DQ_18/DDR0_DQ_34
BF5
DDR0_DQ_19/DDR0_DQ_35
BG2
DDR0_DQ_20/DDR0_DQ_36
BG1
DDR0_DQ_21/DDR0_DQ_37
BF1
DDR0_DQ_22/DDR0_DQ_38
BF2
DDR0_DQ_23/DDR0_DQ_39
BD2
DDR0_DQ_24/DDR0_DQ_40
BD1
DDR0_DQ_25/DDR0_DQ_41
BC4
DDR0_DQ_26/DDR0_DQ_42
BC5
DDR0_DQ_27/DDR0_DQ_43
BD5
DDR0_DQ_28/DDR0_DQ_44
BD4
DDR0_DQ_29/DDR0_DQ_45
BC1
DDR0_DQ_30/DDR0_DQ_46
BC2
DDR0_DQ_31/DDR0_DQ_47
AB1
DDR0_DQ_32/DDR1_DQ_0
AB2
DDR0_DQ_33/DDR1_DQ_1
AA4
DDR0_DQ_34/DDR1_DQ_2
AA5
DDR0_DQ_35/DDR1_DQ_3
AB5
DDR0_DQ_36/DDR1_DQ_4
AB4
DDR0_DQ_37/DDR1_DQ_5
AA2
DDR0_DQ_38/DDR1_DQ_6
AA1
DDR0_DQ_39/DDR1_DQ_7
V5
DDR0_DQ_40/DDR1_DQ_8
V2
DDR0_DQ_41/DDR1_DQ_9
U1
DDR0_DQ_42/DDR1_DQ_10
U2
DDR0_DQ_43/DDR1_DQ_11
V1
DDR0_DQ_44/DDR1_DQ_12
V4
DDR0_DQ_45/DDR1_DQ_13
U5
DDR0_DQ_46/DDR1_DQ_14
U4
DDR0_DQ_47/DDR1_DQ_15
R2
DDR0_DQ_48/DDR1_DQ_32
P5
DDR0_DQ_49/DDR1_DQ_33
R4
DDR0_DQ_50/DDR1_DQ_34
P4
DDR0_DQ_51/DDR1_DQ_35
R5
DDR0_DQ_52/DDR1_DQ_36
P2
DDR0_DQ_53/DDR1_DQ_37
R1
DDR0_DQ_54/DDR1_DQ_38
P1
DDR0_DQ_55/DDR1_DQ_39
M4
DDR0_DQ_56/DDR1_DQ_40
M1
DDR0_DQ_57/DDR1_DQ_41
L4
DDR0_DQ_58/DDR1_DQ_42
L2
DDR0_DQ_59/DDR1_DQ_43
M5
DDR0_DQ_60/DDR1_DQ_44
M2
DDR0_DQ_61/DDR1_DQ_45
L5
DDR0_DQ_62/DDR1_DQ_46
L1
DDR0_DQ_63/DDR1_DQ_47
BA2
NC/DDR0_ECC_0
BA1
NC/DDR0_ECC_1
AY4
NC/DDR0_ECC_2
AY5
NC/DDR0_ECC_3
BA5
NC/DDR0_ECC_4
BA4
NC/DDR0_ECC_5
AY1
NC/DDR0_ECC_6
AY2
NC/DDR0_ECC_7
COFFEE_LAKE_H
M_B_DQ[63:0][16]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
NC/DDR0_CKP_2
NC/DDR0_CKN_2
NC/DDR0_CKP_3
NC/DDR0_CKN_3
NC/DDR0_CS#_2
NC/DDR0_CS#_3
NC/DDR0_ODT_1
NC/DDR0_ODT_2
NC/DDR0_ODT_3
NC/DDR0_MA_3
NC/DDR0_MA_4
NC/DDR0_PAR
NC/DDR0_ALERT#
AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1
AT1
AT2
AT3
AT5
AD5
AE2
AD2
AE5
AD3
AE4
AE1
AD4
AH5
AH1
AU1
AH4
AG4
AD1
AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3
AG3
AU5
BR5
BL3
BG3
BD3
AA3
U3
P3
L3
BP5
BK3
BF3
BC3
AB3
V3
R3
M3
AY3
BA3
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_DIM0_CK_DDR1_DP
M_A_DIM0_CK_DDR1_DN
M_A_DIM0_CKE1
M_A_DIM0_CS1#
M_A_DIM0_ODT1_2DIE
M_A_A16
M_A_A14
M_A_A15
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
DDR0_CKP_0/DDR0_CKP_0
DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_1/DDR0_CKP_1
DDR0_CKN_1/DDR0_CKN_1
DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_1/DDR0_CKE_1
DDR0_CKE_2/DDR0_CKE_2
DDR0_CKE_3/DDR0_CKE_3
DDR0_CS#_0/DDR0_CS#_0
DDR0_CS#_1/DDR0_CS#_1
DDR0_ODT_0/DDR0_ODT_0
DDR0_CAB_4/DDR0_BA_0
DDR0_CAB_6/DDR0_BA_1
DDR0_CAA_5/DDR0_BG_0
DDR0_CAB_3/DDR0_MA_16
DDR0_CAB_2/DDR0_MA_14
DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_9/DDR0_MA_0
DDR0_CAB_8/DDR0_MA_1
DDR0_CAB_5/DDR0_MA_2
DDR0_CAA_0/DDR0_MA_5
DDR0_CAA_2/DDR0_MA_6
DDR0_CAA_4/DDR0_MA_7
DDR0_CAA_3/DDR0_MA_8
DDR0_CAA_1/DDR0_MA_9
DDR0_CAB_7/DDR0_MA_10
DDR0_CAA_7/DDR0_MA_11
DDR0_CAA_6/DDR0_MA_12
DDR0_CAB_0/DDR0_MA_13
DDR0_CAA_9/DDR0_BG_1
DDR0_CAA_8/DDR0_ACT#
DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSP_7/DDR1_DQSP_5
DDR0_DQSP_8/DDR0_DQSP_8
1 OF
13
DDR0_DQSN_8/DDR0_DQSN_8
M_A_DIM0_CK_DDR0_DP [13,14]
M_A_DIM0_CK_DDR0_DN [13,14]
1
T0401 @
1
T0402 @
M_A_DIM0_CKE0 [13,14]
1
T0403 @
M_A_DIM0_CS0# [13,14]
1
T0408 @
1
T0409 @
M_A_BA0 [13,14]
M_A_BA1 [13,14]
M_A_BG0 [13,14]
M_A_A[16:14] [13,14]
M_A_A[13:0] [13,14]
M_A_BG1 [13,14]
M_A_ACT# [13,14]
M_A_PARITY [13,14]
M_A_ALERT# [13,14]
M_A_DQS#[7:0] [14]
M_A_DQS[7:0] [14]
M_A_DIM0_ODT0 [13,14]
U0301B
BT11
DDR1_DQ_0/DDR0_DQ_16
BR11
DDR1_DQ_1/DDR0_DQ_17
BT9
DDR1_DQ_2/DDR0_DQ_18
BR8
DDR1_DQ_3/DDR0_DQ_19
BP11
DDR1_DQ_4/DDR0_DQ_20
BN11
DDR1_DQ_5/DDR0_DQ_21
BP8
DDR1_DQ_6/DDR0_DQ_22
BN8
DDR1_DQ_7/DDR0_DQ_23
BL12
DDR1_DQ_8/DDR0_DQ_24
BL11
DDR1_DQ_9/DDR0_DQ_25
BL8
DDR1_DQ_10/DDR0_DQ_26
BJ8
DDR1_DQ_11/DDR0_DQ_27
BJ11
DDR1_DQ_12/DDR0_DQ_28
BJ10
DDR1_DQ_13/DDR0_DQ_29
BL7
DDR1_DQ_14/DDR0_DQ_30
BJ7
DDR1_DQ_15/DDR0_DQ_31
BG11
DDR1_DQ_16/DDR0_DQ_48
BG10
DDR1_DQ_17/DDR0_DQ_49
BG8
DDR1_DQ_18/DDR0_DQ_50
BF8
DDR1_DQ_19/DDR0_DQ_51
BF11
DDR1_DQ_20/DDR0_DQ_52
BF10
DDR1_DQ_21/DDR0_DQ_53
BG7
DDR1_DQ_22/DDR0_DQ_54
BF7
DDR1_DQ_23/DDR0_DQ_55
BB11
DDR1_DQ_24/DDR0_DQ_56
BC11
DDR1_DQ_25/DDR0_DQ_57
BB8
DDR1_DQ_26/DDR0_DQ_58
BC8
DDR1_DQ_27/DDR0_DQ_59
BC10
DDR1_DQ_28/DDR0_DQ_60
BB10
DDR1_DQ_29/DDR0_DQ_61
BC7
DDR1_DQ_30/DDR0_DQ_62
BB7
DDR1_DQ_31/DDR0_DQ_63
AA11
DDR1_DQ_32/DDR1_DQ_16
AA10
DDR1_DQ_33/DDR1_DQ_17
AC11
DDR1_DQ_34/DDR1_DQ_18
AC10
DDR1_DQ_35/DDR1_DQ_19
AA7
DDR1_DQ_36/DDR1_DQ_20
AA8
DDR1_DQ_37/DDR1_DQ_21
AC8
DDR1_DQ_38/DDR1_DQ_22
AC7
DDR1_DQ_39/DDR1_DQ_23
W8
DDR1_DQ_40/DDR1_DQ_24
W7
DDR1_DQ_41/DDR1_DQ_25
V10
DDR1_DQ_42/DDR1_DQ_26
V11
DDR1_DQ_43/DDR1_DQ_27
W11
DDR1_DQ_44/DDR1_DQ_28
W10
DDR1_DQ_45/DDR1_DQ_29
V7
DDR1_DQ_46/DDR1_DQ_30
V8
DDR1_DQ_47/DDR1_DQ_31
R11
DDR1_DQ_48/DDR1_DQ_48
P11
DDR1_DQ_49/DDR1_DQ_49
P7
DDR1_DQ_50/DDR1_DQ_50
R8
DDR1_DQ_51/DDR1_DQ_51
R10
DDR1_DQ_52/DDR1_DQ_52
P10
DDR1_DQ_53/DDR1_DQ_53
R7
DDR1_DQ_54/DDR1_DQ_54
P8
DDR1_DQ_55/DDR1_DQ_55
L11
DDR1_DQ_56/DDR1_DQ_56
M11
DDR1_DQ_57/DDR1_DQ_57
L7
DDR1_DQ_58/DDR1_DQ_58
M8
DDR1_DQ_59/DDR1_DQ_59
L10
DDR1_DQ_60/DDR1_DQ_60
M10
DDR1_DQ_61/DDR1_DQ_61
M7
DDR1_DQ_62/DDR1_DQ_62
L8
DDR1_DQ_63/DDR1_DQ_63
AW11
NC/DDR1_ECC_0
AY11
NC/DDR1_ECC_1
AY8
NC/DDR1_ECC_2
AW8
NC/DDR1_ECC_3
AY10
NC/DDR1_ECC_4
AW10
NC/DDR1_ECC_5
AY7
NC/DDR1_ECC_6
AW7
NC/DDR1_ECC_7
DDR1_CKP_0/DDR1_CKP_0
DDR1_CKN_0/DDR1_CKN_0
DDR1_CKP_1/DDR1_CKP_1
DDR1_CKN_1/DDR1_CKN_1
NC/DDR1_CKP_2
NC/DDR1_CKN_2
NC/DDR1_CKP_3
NC/DDR1_CKN_3
DDR1_CKE_0/DDR1_CKE_0
DDR1_CKE_1/DDR1_CKE_1
DDR1_CKE_2/DDR1_CKE_2
DDR1_CKE_3/DDR1_CKE_3
DDR1_CS#_0/DDR1_CS#_0
DDR1_CS#_1/DDR1_CS#_1
NC/DDR1_CS#_2
NC/DDR1_CS#_3
DDR1_ODT_0/DDR1_ODT_0
NC/DDR1_ODT_1
NC/DDR1_ODT_2
NC/DDR1_ODT_3
DDR1_CAB_3/DDR1_MA_16
DDR1_CAB_2/DDR1_MA_14
DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_4/DDR1_BA_0
DDR1_CAB_6/DDR1_BA_1
DDR1_CAA_5/DDR1_BG_0
DDR1_CAB_9/DDR1_MA_0
DDR1_CAB_8/DDR1_MA_1
DDR1_CAB_5/DDR1_MA_2
NC/DDR1_MA_3
NC/DDR1_MA_4
DDR1_CAA_0/DDR1_MA_5
DDR1_CAA_2/DDR1_MA_6
DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8
DDR1_CAA_1/DDR1_MA_9
DDR1_CAB_7/DDR1_MA_10
DDR1_CAA_7/DDR1_MA_11
DDR1_CAA_6/DDR1_MA_12
DDR1_CAB_0/DDR1_MA_13
DDR1_CAA_9/DDR1_BG_1
DDR1_CAA_8/DDR1_ACT#
NC/DDR1_PAR
NC/DDR1_ALERT#
DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSP_7/DDR1_DQSP_7
DDR1_DQSP_8/DDR1_DQSP_8
DDR1_DQSN_8/DDR1_DQSN_8
AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
AH10
AH11
AF8
AH8
AH9
AR9
AJ9
AK6
M_B_A0
AK5
M_B_A1
AL5
M_B_A2
AL6
M_B_A3
AM6
M_B_A4
AN7
M_B_A5
AN10
M_B_A6
M_B_A7
AN8
AR11
M_B_A8
AH7
M_B_A9
AN11
M_B_A10
AR10
M_B_A11
AF9
M_B_A12
AR7
M_B_A13
AT9
AJ7
AR8
BN9
BL9
M_B_DQS#0
BG9
M_B_DQS#1
BC9
M_B_DQS#2
AC9
M_B_DQS#3
W9
M_B_DQS#4
R9
M_B_DQS#5
M9
M_B_DQS#6
M_B_DQS#7
BP9
BJ9
M_B_DQS0
BF9
M_B_DQS1
BB9
M_B_DQS2
AA9
M_B_DQS3
V9
M_B_DQS4
P9
M_B_DQS5
L9
M_B_DQS6
M_B_DQS7
AW9
AY9
M_B_CLK_DDR0 [16]
M_B_CLK_DDR#0 [16]
M_B_CLK_DDR1 [16]
M_B_CLK_DDR#1 [16]
M_B_CKE0 [16]
M_B_CKE1 [16]
M_B_CS#0 [16]
M_B_CS#1 [16]
M_B_ODT0 [16]
M_B_ODT1 [16]
M_B_RAS# [16]
M_B_WE# [16]
M_B_CAS# [16]
M_B_BA0 [16]
M_B_BA1 [16]
M_B_BG0 [16]
M_B_A[13:0] [16]
M_B_BG1 [16]
M_B_ACT# [16]
M_B_PARITY [16]
M_B_ALERT# [16]
M_B_DQS#[7:0] [16]
M_B_DQS[7:0] [16]
M_B_ALERT#
C0402 100PF/50V
1 2
@EMI
DDR4 COMPENSATION SIGNALS
1 2
R0401 121Ohm 1%
R0402 75Ohm 1%
1 2
1 2
R0403 100Ohm 1%
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
G1
H1
J2
DDR_RCOMP_0
DDR_RCOMP_1
DDR_RCOMP_2
COFFEE_LAKE_H
2 OF 13
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
BN13
BP13
BR13
1
T0404
@
+V_DDR_CA_VREF [18]
SB_DIMM_VREFDQ [18]
Project Name
Title :
CPU_DDR4
Size
Dept.:
C
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
4
CFG
From PCH
From PCH
From PCH
+VCCST
P_SVID_ALERT#_50OHM_X2[80]
P_SVID_CLK_50OHM_X2[80]
P_SVID_DATA_50OHM_X2[80]
+VCCST
must close to CPU
+VCCST
R0636 10KOhm
For CPU states check
Close to CPU
21
CLK_PCH_BCLK[22]
CLK_PCH_BCLK#[22]
CLK_PCI_BCLK[22]
CLK_PCI_BCLK#[22]
CLK_24M[22]
CLK_24M#[22]
5%
R0619 56Ohm
R0601 100Ohm
VCCST_PWRGD_CPU[58]
H_CPUPWRGD[20]
PCH_PLTRST_CPU#[7,21]
H_PM_SYNC[21]
H_PM_DOWN[21]
H_PECI[21,30]
PCH_THERMTRIP#[21]
@
1 2
DDR_VTT_CTRL:
System Memory Power Gate Control:
Disables the platform memory VTT regulator
in C8 and deeper and S3.
Ref: Intel 570805_Coffeelake_EDS_Vol_1_Rev1.5 P.116
12
12
1%
H_CATERR#
R0618 220Ohm1%
2017/11/24 by James
R0620 60.4Ohm
R0622 20Ohm
0402
0402
0402
0402
0402
0402
1 2
1 2
1%
0402
0402
1 2
5%
SL0611@
21
SL0612@
CLK_CPU_BCLK
CLK_CPU_BCLK#
21
SL0608@
21
SL0609@
CLK_PCI_BCLK_X1
CLK_PCI_BCLK#_X1
21
SL0610@
21
SL0613@
CLK_CPU_24M
CLK_CPU_24M#
H_CPU_SVIDALRT#
H_PROCHOT_D#
DDR_VTT_CTRL
H_VCCST_PWRGD
21
R0621@
21
R0606@
H_CPUPWRGD_X1
PLTRST_CPU#
H_PM_DOWN_X1
H_PECI
1
T0603@
1
T0604@
H_SKTOCC#
H_PROC_SELECT#
1
T0605@
H_CATERR#
VTT Enable
R0603 0OHM
DDR_VTT_CTRL
[ 建議用料 ]
1st. : LOGIC U74AUP1G07G-AL5-R 06004-00620000
2nd. : LOGIC 74AUP1G07SE-7 SOT353 06004-00051800
1 2
R0602 0OHM@
1 2
DDR_PG_CTRL_RR
CPU SIDEBAND SIGNALS
+VCCSTG
12
R0615
1KOhm
1 2
R0614 499OHM
1%
H_PROCHOT_D#_RH_PROCHOT_D#
12
C0601
43PF/50V
@
B31
A32
D35
C36
E31
D31
BH31
BH32
BH29
BR30
BT13
H13
BT31
BP35
BM34
BP31
BT34
J31
BR33
BN1
BM30
AT13
AW13
AU13
AY13
2017/11/24 by James
Remove C0603/C0604
U0601
1
NC
A
2
3 4
GND
U74AUP1G07G-AL5-R
06004-00620000
D0608
3
BA
T54AW
U0301E
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
ZVM#
MSM#
RSVD32
RSVD33
COFFEE_LAKE_H
VCC
Y
1
2
Boundary Scan
CFG3
XDP_TDO_CPU
XDP_TDI_CPU
XDP_TMS_CPU
XDP_TCLK_CPU
XDP_TRST_CPU#
XDP_PREQ#
XDP_PRDY#
BN25
CFG_0
BN27
CFG_1
BN26
CFG_2
BN28
CFG_3
BR20
CFG_4
BM20
CFG_5
BT20
CFG_6
BP20
CFG_7
BR23
CFG_8
BR22
CFG_9
BT23
CFG_10
BT22
CFG_11
BM19
CFG_12
BR19
CFG_13
BP19
CFG_14
BT19
CFG_15
BN23
CFG_17
BP23
CFG_16
BP22
CFG_19
BN22
CFG_18
BR27
BPM#_0
BT27
BPM#_1
BM31
BPM#_2
BT30
BPM#_3
BT28
PROC_TDO
BL32
XDP_TDO_CPU
BP28
XDP_TDI_CPU
BR28
XDP_TMS_CPU
XDP_TCLK_CPU
BP30
BL30
BP27
BT25
5 OF 13
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
Cost down
12
C0602
0.1UF/6.3V
5
0402
0402
@
ALL_SYSTEM_PWRGD[20,30,58,69,80]
THRO_CPU# [30]
21
R0608@
21
R0609@
OD
IMVP8_VRHOT# [80]
PWRLIMIT#_CPU [60,89]
1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
1
CFG6
CFG7
R0616
49.9OHM
1 2
Place close to CPU
2017/12/20 Changed by Jason
R1.0-02
+3VS+1.2V
12
R0604
300KOhm
R0612 0OHM
1 2
R0613 0OHM@
1 2
T0608 @
T0607 @
XDP_TDO_CPU [20]
XDP_TDI_CPU [20]
XDP_TMS_CPU [20]
XDP_TCLK_CPU [20]
XDP_TRST_CPU# [27]
XDP_PREQ# [27]
XDP_PRDY# [27]
1
T0611 @
1
T0617 @
1
T0614 @
1
T0601 @
1
T0615 @
1
T0613 @
1
T0612 @
1
T0616 @
CFG0 [7]
CFG3 [7]
DDR_PG_CTRL [86]
XDP_PREQ#
XDP_TCLK_CPU
H_PM_DOWN
GM531GS modified by TG 20180602
CFG Straps
CFG4
5
/MSH
34
Q0601B PJX8838_R1_00002
PCH_TRIGGER_CPU[27]
CPU_TRIGGER_PCH[27]
1 2
R0637 51Ohm1% @
1 2
R0625 51Ohm1%
1 2
R0638 51Ohm1% @
2017/11/16 by James
1. Changed R0632 to stuff for eDP enable
2. Changed R0628/R0626 to stuff for PCIEx8
1 2
R0605 1KOhm
CFG0
CFG2
CFG4_strap[78]
R0632 1KOhm
CFG5
CFG6
CFG7
1 2
R0627 1KOhm
1 2
1%
1 2
R0628 1KOhm
1 2
R0626 1KOhm
1 2
R0607 1KOhm
1% @
1%
2
61
Q0601A PJX8838_R1_00002
1%
1%
1% @
1 2
R0631 30Ohm
+VCCST
/MSH
CFG Straps for Processor
ref : Intel 570805_Coffeelake_EDS_Vol_1_Rev1.4 P.121
CFG[0] : Stall reset sequence after PCU PLL lock until de-asserted
- 1 : (Default) Normal Operation; No stall
0913
GND
GND
GND
- 0 : Stall
CFG[1] : Reserved Configuration Lane
Reserved Configuration Lane
CFG[2] : PCI Express* Static x16 Lane Numbering Reversal
- 1 : (Default) Normal Operation
- 0 : Lane Numbers Reversed
CFG[3] : Reserved configuration lanes
Reserved Configuration Lane
CFG[4] : eDP Enable
- 1 : Disabled
- 0 : Enabled
CFG[6:5] : PCI Expres* Bifurcation
- 00 : 1 x8 , 2 x4 PCI Express*
- 01 : Reserved
- 10 : 2 x8 PCI Express*
- 11 : 1 x16 PCI Express*
CFG[7] : PEG Training
- 1 : (Default) PEG Train Immediately Following RESET# de-assertion
- 0 : PEG Wait for BIOS for Training
CFG[19:8] : Reserved Configuration Lanes
Reserved Configuration Lanes
U0301M
E2
RSVD_TP5
IST_TRIG
BR1
BT2
BN35
J24
H24
BN33
BL34
N29
R14
AE29
AA14
AP29
AP14
A36
A37
H23
J23
F30
E30
B30
C30
BR35
BR31
BH30
E3
E1
D1
G3
J3
IST_TRIG
RSVD_TP4
RSVD_TP3
RSVD_TP1
RSVD_TP2
RSVD15
RSVD28
RSVD27
RSVD14
RSVD13
RSVD30
RSVD31
RSVD2
RSVD1
RSVD5
RSVD4
VSS_A36
VSS_A37
PROC_TRIGIN
PROC_TRIGOUT
RSVD24
RSVD23
RSVD7
RSVD21
RSVD26
RSVD29
RSVD19
RSVD18
RSVD9
COFFEE_LAKE_H
T0609@
CPU_TRIGGER_PCH_X1
1
BK28
RSVD11
BJ28
RSVD10
BL31
RSVD12
AJ8
RSVD3
G13
RSVD25
C38
RSVD22
C1
RSVD20
BR2
RSVD17
BP1
RSVD16
B38
RSVD8
B2
13 OF 13
RSVD6
Title :
CPU_CFG,RSVD
Size
Dept.:
C
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Project Name
Main Board
Engineer:
Rev
R1.2GX502GX
EE
99
of
6
CPU XDP
Main Board
@/XDP
CFG3[6]
CFG0[6]
PM_RSMRST#[20,30]
PWR_SW#[30,32,56]
PM_PWRBTN#[20,30]
R0737 1.5KOhm
CFG3
CFG0 XDP_HOOK2
1 2
R0736 0Ohm@/XDP
1 2
XDP_HOOK2
@/XDP
12
12
@/XDP
12
12
C0703
0.1UF/25V
@/XDP
12
C0703
R0703 1KOhm
+VCCIO +3VSUS
12
R0735
150Ohm
@/XDP
R0712 1KOhm
R0708 0Ohm
@/XDP
R0709 0Ohm
@/XDP
XDP_HOOK0
XDP_HOOK1
XDP_PIN1
1
XDP_PIN60
SPI_SI_SPI[24,28]
PM_SYSPWROK[20,30]
T0701 @
PCH_PLTRST_CPU#[6,21]
ITP_PMODE[20]
PM_SYSRST#_PCH[20]
R0710 1KOhm@/XDP
R0720 0Ohm@/XDP
R0731 1KOhm@/XDP
R0707 0Ohm
@/XDP
R0714 0Ohm
R0774 0Ohm
1 2
@/XDP
1 2
12
12
@/XDP
@/XDP
12
12
12
R07190Ohm
C0705
0.1UF/25V
@/XDP
GND
+1.05VSUS
12
GND
12
R0772
2.2kOHM
@/XDP
12
R0773
2.2kOHM
@/XDP
HOOK7_DBR#
HDIO2_SPI [24,28]
12
C0706
0.1UF/25V
@/XDP
GND
XDP_HOOK6
XDP_HOOK3
Project Name
Title :
CPU XDP
Size
Dept.:
C
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
7
Imax=1.05V/11.1A Imax=1.2V/3.3A
+VCCSA +1.2V
+VCCIO
Imax=0.95V/6.4A Imax=1.2V/0.13A
U0301L
J30
VCCSA_1
K29
VCCSA_2
K30
VCCSA_3
K31
VCCSA_4
K32
VCCSA_5
K33
VCCSA_6
K34
VCCSA_7
K35
VCCSA_8
L31
VCCSA_9
L32
VCCSA_10
L35
VCCSA_11
L36
VCCSA_12
L37
VCCSA_13
L38
VCCSA_14
M29
VCCSA_15
M30
VCCSA_16
M31
VCCSA_17
M32
VCCSA_18
M33
VCCSA_19
M34
VCCSA_20
M35
VCCSA_21
M36
VCCSA_22
AG12
VCCIO_1
G15
VCCIO_2
G17
VCCIO_3
G19
VCCIO_4
G21
VCCIO_5
H15
VCCIO_6
H16
VCCIO_7
H17
VCCIO_8
H19
VCCIO_9
H20
VCCIO_10
H21
VCCIO_11
H26
VCCIO_12
H27
VCCIO_13
J15
VCCIO_14
J16
VCCIO_15
J17
VCCIO_16
J19
VCCIO_17
J20
VCCIO_18
J21
VCCIO_19
J26
VCCIO_20
J27
VCCIO_21
12 OF 13
COFFEE_LAKE_H
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VCCPLL_OC1
VCCPLL_OC2
VCCPLL_OC3
VCCST
VCCSTG2
VCCSTG1
VCCPLL1
VCCPLL2
VCCSA_SENSE
VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12
BH13
BJ13
G11
H30
H29
G30
H28
J28
M38
M37
H14
J14
Imax=1.05V/0.15A
VCCIO_VCCSENSE
VCCIO_VSSSENSE
+VCCST
Imax=1.05V/0.06A
+VCCPLL
P_VCCSA_VCCSENSE_50OHM [80]
P_VCCSA_VSSSENSE_50OHM [80]
1
T0802 @
1
T0801 @
+VCCPLL_OC
+VCCSTG
Imax=1.05V/0.02A
Main Board
+VCCST/+VCCPLL
DECAPS Place Back Side (TOP)
+VCCST
Imax=1.05V/0.06A Imax=1.05V/0.15A
12
C0808
1UF/6.3V
120mA
+VCCPLL
12
C0818
1UF/6.3V
12
@
C0827
1UF/6.3V
+VCCPLL_OC DECAPS Place Back Side (TOP)
+VCCPLL_OC
Imax=1.2V/0.13A
12
C0838
1UF/6.3V
12
C0839
1UF/6.3V
12
C0810
1UF/6.3V
Main Source 1th PWR 2nd PWR
+VCCST
+VCCSTG
+VTT
+VCCPLL_OC
+VCCSTG
+VDDQ DECAPS Place Back Side (TOP)
+1.2V
Imax=1.2V/3.3A
AC_BAT_SYS
+1.05VSUS
+1.2V
+VCCSA
+VCCIO
10UF x 11
12
12
@
@
C0821
C0826
22UF/6.3V
22UF/6.3V
12
@
@
C0825
1UF/6.3V
12
12
C0807
C0817
10UF/6.3V
10UF/6.3V
+1.2V
12
12
C0820
C0819
22UF/6.3V
22UF/6.3V
12
C0830
10UF/6.3V
12
C0836
10UF/6.3V
12
C0823
22UF/6.3V
+VCCSA DECAPS Place Back Side (TOP)
+VCCSA
5.1A
10UF x 7 1UF x 1
12
12
C0849
C0848
10UF/6.3V
10UF/6.3V
+VCCSA near CPU
+VCCSA
22UF x 6
12
C0816
22UF/6.3V
12
12
C0842
C0841
10UF/6.3V
10UF/6.3V
C0824
22UF/6.3V
22UF x 4
0911
12
Imax=1.05V/11.1A
12
12
C0851
C0850
10UF/6.3V
10UF/6.3V
12
12
C0815
22UF/6.3V
12
C0854
22UF/6.3V
12
12
C0811
22UF/6.3V
C0843
10UF/6.3V
C0852
10UF/6.3V
12
C0844
10UF/6.3V
12
C0813
10UF/6.3V
12
C0812
22UF/6.3V
12
12
C0845
10UF/6.3V
12
C0809
10UF/6.3V
12
C0814
22UF/6.3V
12
C0846
C0847
10UF/6.3V
10UF/6.3V
12
C0853
1UF/6.3V
SI模擬結果新增
(20181019)
0914
+VCCSA
12
3rd PWR
+
CE0801
220UF/2.5V
nbs_c3528_h47_000s
+VCCIO DECAPS Place Back Side (TOP)
Imax=0.95V/6.4A
+VCCIO
IccMax 6.4A
12
C0831
10UF/6.3V
12
C0832
10UF/6.3V
12
C0840
10UF/6.3V
N/A
12
C0833
10UF/6.3V
12
C0835
10UF/6.3V
N/A
+VCCSTG DECAPS Place Back Side (TOP)
+VCCSTG
12
C0822
1UF/6.3V
@
12
C0806
@
1UF/6.3V
Project Name
Title :
CPU_PWR
Size
Dept.:
C
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
8
+VCCGT +VCCGT
teknisi-indonesia
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BP37
BP38
BR15
BR16
BR17
U0301K
VCCGT_1
VCCGT_2
VCCGT_3
VCCGT_4
VCCGT_5
VCCGT_6
VCCGT_7
VCCGT_8
VCCGT_9
VCCGT_10
VCCGT_11
VCCGT_12
VCCGT_13
VCCGT_14
VCCGT_15
VCCGT_16
VCCGT_17
VCCGT_18
VCCGT_19
VCCGT_20
VCCGT_21
VCCGT_22
VCCGT_23
VCCGT_24
VCCGT_25
VCCGT_26
VCCGT_27
VCCGT_28
VCCGT_29
VCCGT_30
VCCGT_31
VCCGT_32
VCCGT_33
VCCGT_34
VCCGT_35
VCCGT_36
VCCGT_37
VCCGT_38
VCCGT_39
VCCGT_40
VCCGT_41
VCCGT_42
VCCGT_43
VCCGT_44
VCCGT_45
VCCGT_46
VCCGT_47
VCCGT_48
VCCGT_49
VCCGT_50
VCCGT_51
VCCGT_52
VCCGT_53
VCCGT_54
VCCGT_55
VCCGT_56
VCCGT_57
VCCGT_58
VCCGT_59
VCCGT_60
VCCGT_61
VCCGT_62
VCCGT_63
VCCGT_64
VCCGT_65
VCCGT_66
VCCGT_67
VCCGT_68
VCCGT_69
VCCGT_70
VCCGT_71
VCCGT_72
VCCGT_73
VCCGT_74
VCCGT_75
VCCGT_76
VCCGT_77
VCCGT_78
VCCGT_79
VCCGT_159
VCCGT_160
VCCGT_161
VCCGT_162
VCCGT_163
COFFEE_LAKE_H
11 OF 13
VCCGT_80
VCCGT_81
VCCGT_82
VCCGT_83
VCCGT_84
VCCGT_85
VCCGT_86
VCCGT_87
VCCGT_88
VCCGT_89
VCCGT_90
VCCGT_91
VCCGT_92
VCCGT_93
VCCGT_94
VCCGT_95
VCCGT_96
VCCGT_97
VCCGT_98
VCCGT_99
VCCGT_100
VCCGT_101
VCCGT_102
VCCGT_103
VCCGT_104
VCCGT_105
VCCGT_106
VCCGT_107
VCCGT_108
VCCGT_109
VCCGT_110
VCCGT_111
VCCGT_112
VCCGT_113
VCCGT_114
VCCGT_115
VCCGT_116
VCCGT_117
VCCGT_118
VCCGT_119
VCCGT_120
VCCGT_121
VCCGT_122
VCCGT_123
VCCGT_124
VCCGT_125
VCCGT_126
VCCGT_127
VCCGT_128
VCCGT_129
VCCGT_130
VCCGT_131
VCCGT_132
VCCGT_133
VCCGT_134
VCCGT_135
VCCGT_136
VCCGT_137
VCCGT_138
VCCGT_139
VCCGT_140
VCCGT_141
VCCGT_142
VCCGT_143
VCCGT_144
VCCGT_145
VCCGT_146
VCCGT_147
VCCGT_148
VCCGT_149
VCCGT_150
VCCGT_151
VCCGT_152
VCCGT_153
VCCGT_154
VCCGT_155
VCCGT_156
VCCGT_157
VCCGT_158
VCCGT_164
VCCGT_165
VCCGT_166
VCCGT_167
VCCGT_168
VCCGT_SENSE
VSSGT_SENSE
BD35
BD36
BE31
BE32
BE33
BE34
BE35
BE36
BE37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BJ16
BJ17
BJ19
BJ20
BJ21
BJ23
BJ24
BJ26
BJ27
BJ37
BJ38
BK16
BK17
BK19
BK20
BK21
BK23
BK24
BK26
BK27
BL15
BL16
BL17
BL23
BL24
BL25
BL26
BL27
BL28
BL36
BL37
BM15
BM16
BM17
BM36
BM37
BN15
BN16
BN17
BN36
BN37
BN38
BP15
BP16
BP17
BR37
BT15
BT16
BT17
BT37
AH38
AH37
Imax=0.55~1.52V/32A
P_VCCGT_VCCSENSE_50OHM [80]
P_VCCGT_VSSSENSE_50OHM [80]
+VCCCORE +VCCCORE +VCCCORE +VCCCORE
Imax=0~1.52V/128A
U0301J
K14
VCC_125
L13
VCC_126
L14
VCC_127
N13
VCC_128
N14
VCC_129
N30
VCC_130
N31
VCC_131
N32
VCC_132
N35
VCC_133
N36
VCC_134
N37
VCC_135
N38
VCC_136
P13
VCC_137
P14
VCC_138
P29
VCC_139
P30
VCC_140
P31
VCC_141
P32
VCC_142
P33
VCC_143
P34
VCC_144
P35
VCC_145
P36
VCC_146
R13
VCC_147
R31
VCC_148
R32
VCC_149
R33
VCC_150
R34
VCC_151
R35
VCC_152
R36
VCC_153
R37
VCC_154
R38
VCC_155
T29
VCC_156
T30
VCC_157
T31
VCC_158
T32
VCC_159
T35
VCC_160
T36
VCC_161
T37
VCC_162
T38
VCC_163
U29
VCC_164
U30
VCC_165
U31
VCC_166
U32
VCC_167
U33
VCC_168
U34
VCC_169
U35
VCC_170
U36
VCC_171
V13
VCC_172
V14
VCC_173
V31
VCC_174
V32
VCC_175
V33
VCC_176
V34
VCC_177
V35
VCC_178
V36
VCC_179
V37
VCC_180
V38
VCC_181
W13
VCC_182
W14
VCC_183
W29
VCC_184
W30
VCC_185
W31
VCC_186
W32
VCC_187
10 OF 13
COFFEE_LAKE_H
Title :
Size
B
Date: Sheet
Monday, February 18, 2019
VCC_188
VCC_189
VCC_190
VCC_191
VCC_192
VCC_193
VCC_194
VCC_195
VCC_196
VCC_197
VCC_198
VCC_199
CPU_PWR
Dept.:
W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36
Project Name
ASUSTeK COMPUTER
AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF29
AF30
AF31
AF32
AF33
AF34
AF35
AF36
AF37
AF38
AG14
AG31
AG32
AG33
AG34
AG35
AG36
U0301I
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
9 OF 13
COFFEE_LAKE_H
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC_111
VCC_112
VCC_113
VCC_114
VCC_115
VCC_116
VCC_117
VCC_118
VCC_119
VCC_120
VCC_121
VCC_122
VCC_123
VCC_124
VCC_SENSE
VSS_SENSE
AH13
AH14
AH29
AH30
AH31
AH32
AJ14
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP30
AP31
AP32
AP35
AP36
AP37
AP38
K13
AG37
AG38
P_VCCCORE_VCCSENSE_50OHM [80]
P_VCCCORE_VSSSENSE_50OHM [80]
Main Board
Engineer:
Rev
R1.2GX502GX
EE
99
of
9
+VCCORE DECAPS Place Back Side (TOP)
+VCCCORE
10UF x 21
12
12
C1026
10UF/6.3V
12
12
C1075
C1078
10UF/6.3V
10UF/6.3V
+VCCCORE
12
12
C1013
C1024
10UF/6.3V
10UF/6.3V
12
12
C1074
C1073
10UF/6.3V
10UF/6.3V
22UF x 12
12
12
C10101
C1096
22UF/6.3V
22UF/6.3V
+VCCCORE
12
12
C1093
C1090
22UF/6.3V
22UF/6.3V
1UF x 27
+VCCCORE
12
12
C1015
C1012
1UF/6.3V
1UF/6.3V
12
12
C1040
C1039
1UF/6.3V
1UF/6.3V
12
12
C1017
C1016
1UF/6.3V
1UF/6.3V
12
12
C1042
C1041
1UF/6.3V
1UF/6.3V
C1028
10UF/6.3V
Main Board
+VCCGT DECAPS Place Back Side (TOP)
12
C1029
10UF/6.3V
12
C1079
10UF/6.3V
12
C1032
10UF/6.3V
12
C1037
10UF/6.3V
12
C1030
10UF/6.3V
12
C1080
10UF/6.3V
12
12
C1043
C1051
10UF/6.3V
10UF/6.3V
12
12
C1059
10UF/6.3V
C1068
10UF/6.3V
C1070
10UF/6.3V
C1071
10UF/6.3V
12
C1072
10UF/6.3V
12
12
+VCCGT
+VCCGT
10UF x 10
12
12
C10107
10UF/6.3V
C10108
10UF/6.3V
12
12
C10109
10UF/6.3V
C10110
10UF/6.3V
12
C10111
10UF/6.3V
12
12
C10112
10UF/6.3V
C10113
10UF/6.3V
12
C10114
10UF/6.3V
12
12
C10116
C10115
10UF/6.3V
10UF/6.3V
1UF x 12
12
+VCCGT
C10125
1UF/6.3V
12
12
C10126
C10127
1UF/6.3V
1UF/6.3V
22UF x 7
12
12
C10132
C10133
22UF/6.3V
22UF/6.3V
12
12
12
C10117
12
12
12
C10106
C10105
22UF/6.3V
22UF/6.3V
12
12
C1019
C1018
1UF/6.3V
1UF/6.3V
12
12
C10103
C1076
22UF/6.3V
22UF/6.3V
12
12
C1020
C1022
1UF/6.3V
1UF/6.3V
12
C1077
C1097
22UF/6.3V
22UF/6.3V
12
12
C1023
C1025
1UF/6.3V
1UF/6.3V
12
12
C1060
C1098
22UF/6.3V
22UF/6.3V
12
C1031
1UF/6.3V
12
12
C1033
1UF/6.3V
C1034
1UF/6.3V
12
C1035
1UF/6.3V
12
12
C1038
C1036
1UF/6.3V
1UF/6.3V
1UF/6.3V
+VCCGTX near CPU
+VCCGT
C10119
C10118
1UF/6.3V
1UF/6.3V
Modified by TG 20180713
12
12
C10121
C10120
1UF/6.3V
1UF/6.3V
12
C10123
1UF/6.3V
12
C10124
1UF/6.3V
12
C10122
1UF/6.3V
22UF X 6 (Change from 47UF x 3)
12
12
12
C10130
C10129
22UF/6.3V
12
12
C1044
1UF/6.3V
C1045
1UF/6.3V
12
C1046
1UF/6.3V
12
12
C1048
C1047
1UF/6.3V
1UF/6.3V
12
12
C1050
C1049
1UF/6.3V
1UF/6.3V
22UF/6.3V
C10131
22UF/6.3V
12
C10139
22UF/6.3V
12
12
C10141
C10140
22UF/6.3V
22UF/6.3V
+VCCGT
SI模擬結果新增
(20181002)
12
C10128
1UF/6.3V
12
12
C10134
C10135
22UF/6.3V
22UF/6.3V
12
+
CE1001
330UF/2.5V
12
C10136
22UF/6.3V
12
12
C10138
C10137
22UF/6.3V
22UF/6.3V
+VCCORE near CPU
+VCCCORE
22UF X 10 (Change from 47UF X 5)
12
12
12
C1001
22UF/6.3V
C1002
22UF/6.3V
C1003
22UF/6.3V
12
C1004
22UF/6.3V
Modified by TG 20180713
12
C1005
22UF/6.3V
12
12
C1007
C1006
22UF/6.3V
22UF/6.3V
12
C1009
22UF/6.3V
12
C1010
22UF/6.3V
Project Name
Title :
010_CPU_POWER_CAP
Size
Dept.:
ASUSTeK COMPUTER
Custom
Date: Sheet
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
10
12
C1008
22UF/6.3V
Main Board
Main Board
Project Name
Title :
TBT_Alpine-Ridge
Size
Dept.:
ASUSTeK COMPUTER
B
Date: Sheet
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
11
Imax = 600mA
SL1201
SHOR
SL1202
SHOR
0603
0603
T_LAND
T_LAND
+5V_PD
@
21
@
21
12
+5VSUS
Schumi (20180508)
+3VSUS +3VSUS_CCG4_VDDD
L1201
21
Irat=600mA
12
C1203
0.1UF/16V
120Ohm/100Mhz
Schumi (20180508)
+3VSUS +3VSUS_CCG4_VDDIO
L1202
21
120Ohm/100Mhz
Irat=600mA
12
C1206
0.1UF/16V
Schumi (20180508)
+3VSUS_CCG4_VDDIO
Schumi (20180509)
1
TP1203@
C1202
0.1UF/6.3V
12
12
C1210
0.1UF/6.3V
12
C1204
0.1UF/16V
R1203
4.7KOhm
CCG4_XRES
12
C1207
0.1UF/16V
U1201B
26
Schumi (20180521)
VCCD
12
C1205
1UF/6.3V
12
C1208
1UF/6.3V
+PD_VBUS_CH
12
C1201
1UF/6.3V
TP1204
1
@
1 2
R1201
100KOhm
CCG2_VBUS_C_CTRL[93]
ACIN Charging CTRL
Schumi (20180508) Schumi (20180508)
EC/SoC Interface (I2C Slave)
VBUS_MON_P1.3
12
12
R1202
C1209
10KOhm
0.1UF/25V
TP1201@
1
TP1202@
CCG4_SWD_CLK
VBUS_MON_P1.3
CCG2_VBUS_C_CTRL
PD_CC2
+5V_PD
PD_CC1
IFPE_DP_HPD[47,78]
1
TP1205@
1
CCG4_SWD_IO
GND
1
P1.2
2
P1.3
3
P1.5
4
CC2
5
V5V
6
CC1
CCG4_XRES
PD_I2C_INT2_X1
PD_I2C_SDA2_X1
PD_I2C_SCL2_X1
IFPF_DP_HPD CCG4_VBUS_DISCHARGE
to EC or PCH
1 2
PD_IRQ#[30]
PD_I2C_INT_PCH#[20]
SMB3_DAT_AMP[28,39]
PD_I2C_SDA_PCH[25]
SMB3_CLK_AMP[28,39]
PD_I2C_SCL_PCH[25]
R1259 0Ohm/PD
1 2
R1289 0Ohm@/PD
1 2
R1257 0Ohm/PD
1 2
R1253 0Ohm@/PD
1 2
R1258 0Ohm/PD
1 2
R1255 0Ohm@/PD
PD_IRQ#_R
27
28
29
30
31
32
33
34
GND
+3VSUS_CCG4_VDDIO
VCCD
21
22
23
25
P3.624P1.1
VSS1
VCCD
VDDIO
XRES8P1.79P0.010P0.111P2.312P2.5
7
Schumi (20180508)
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
CYPD4126-24LQXIT
06050-00690900
Schumi (20180508)
+3VSUS_CCG4_VDDD
GND
19
20
U1201A
GND
VDDD
18
P3.4
17
P3.3
16
P3.2
15
P3.1
14
P2.6
13
P3.0
CYPD4126-24LQXIT
06050-00690900
20181012 Delete Q1202
20181012 Delete Q1202
CCG4_I2C_SCL1
CCG4_I2C_SDA1
CCG2_VBUS_P_CTRL
1205A_EN
沒預燒06050-00690100
有預燒06050-00690400(15版)
+3VSUS
EM6K1-G-T2R
5
34
CCG4_VBUS_DISCHARGE [47]
Q1204B
EM6K1-G-T2R
2
61
PD_I2C_SDA2_X1
PD_I2C_SCL2_X1
PD_CC1
12
C1211
Schumi (20180517)
390PF/50V
GND
PD_CC2
12
C1212
Schumi (20180517)
390PF/50V
GND
VBUS Provider Ctrl & MUX Ctrl Interface (I2C Master)
CCG4_I2C_SCL1 [47,93]
CCG4_I2C_SDA1 [47,93]
CCG2_VBUS_P_CTRL [93]
1205A_EN [47]
Q1204A
BATT Dis-charging CTRL
Discharging CTRL
Schumi (20180509)
CCG4_I2C_SDA1
CCG4_I2C_SCL1PD_I2C_INT2_X1
Schumi (20180508)
PD_I2C_INT2_X1
Project Name
Title :
CYPRESS CCG4
Size
Dept.:
B
Date: Sheet
ASUSTeK COMPUTER INC.
Monday, February 18, 2019
PD_CC1 [47]
PD_CC2 [47]
Schumi (20180508)
+3VSUS_CCG4_VDDIO
12
R1251
2.2kOHM
+3VSUS_CCG4_VDDIO
12
Engineer:
R1270
10KOhm
EE
12
R1252
2.2kOHM
Rev
R1.2GX502GX
99
of
12
Main Board
N501
+VTT
M_A_A[16:0][4,14]
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
R1305
R130636Ohm
R132536Ohm
R132636Ohm
R132736Ohm
R132836Ohm
R132936Ohm
R130136Ohm
R130736Ohm
R130836Ohm
R130936Ohm
R133036Ohm
36Ohm
M_A_A8
M_A_A11
M_A_A13
M_A_A1
M_A_A7
M_A_BA0
M_A_BA1
M_A_BG0
M_A_A3
M_A_A5
M_A_A0
M_A_A2
M_A_A4
M_A_A6
M_A_A9
M_A_A10
M_A_A12
M_A_A14
M_A_A15
M_A_A16
1 2
1 2
1 2
1 2
R1310 36Ohm
R1312 36Ohm
R1313 36Ohm
R1314 36Ohm
R1315 36Ohm
R1316 36Ohm
R1317 36Ohm
R1318 36Ohm
R1319 36Ohm
R1320 36Ohm
R1321 36Ohm
R1322 36Ohm
R1323 36Ohm
R1324 36Ohm
M_A_DIM0_CKE0[4,14]
M_A_DIM0_ODT0[4,14]
M_A_BG1[4,14]
M_A_ACT#[4,14]
M_A_PARITY[4,14]
M_A_DIM0_CS0#[4,14]
M_A_BA0[4,14]
M_A_BA1[4,14]
M_A_BG0[4,14]
R1.0 Hacken 0128 Remove
N501
1 2
M_A_ALERT#[4,14]
R1304 49.9OHM
12
nbs_c0402_h28_000s
GND GND
nbs_c0201_h13_000s
+1.2V
C1302
10UF/6.3V
C1312
12
0.1UF/10V
@
GND
12
@
C1303
10UF/6.3V
nbs_c0402_h28_000s
10uF*4
1uF*16
2017/12/20 Changed by Jason
N501
+1.2V
C1327
12
N/A
0.01UF/6.3VMLCC/+/-10%
原11G231210415030 0.1UF/6.3V/0201
改11202-0119F000 0.01UF/6.3V/0201
Modified by TG 20180629
DIMM_CLOCK_TERM_B
C1305
0.1UF/10V
1 2
nbs_c0201_h13_000s@
GND
R1302
1 2
36Ohm
R1303
1 2
36Ohm
Clock Pull up power change from +0.6V to +1.2V (CFL PDG) 20820601
+VTT
12
C1328
1UF/6.3V
nbs_c0201_h14_000s
GND
Close U1401
+VTT
12
C1336
1UF/6.3V
nbs_c0201_h14_000s
GND
12
C1329
1UF/6.3V
nbs_c0201_h14_000s
C1330
1UF/6.3V
nbs_c0201_h14_000s
C1331
1UF/6.3V
nbs_c0201_h14_000s
12
12
Close U1402 Close U1403 Close U1404
12
12
C1337
1UF/6.3V
nbs_c0201_h14_000s
12
C1338
1UF/6.3V
nbs_c0201_h14_000s
C1339
1UF/6.3V
nbs_c0201_h14_000s
12
C1332
1UF/6.3V
nbs_c0201_h14_000s
12
C1340
1UF/6.3V
nbs_c0201_h14_000s
12
C1333
1UF/6.3V
nbs_c0201_h14_000s
12
C1341
1UF/6.3V
nbs_c0201_h14_000s
12
C1334
1UF/6.3V
nbs_c0201_h14_000s
12
C1342
1UF/6.3V
nbs_c0201_h14_000s
Close U1405 Close U1407 Close U1408 Close U1409
+VTT
12
C1304
10UF/6.3V
nbs_c0402_h28_000s
GND
12
nbs_c0402_h28_000s
C1306
10UF/6.3V
12
C1307
10UF/6.3V
nbs_c0402_h28_000s
12
C1308
10UF/6.3V
nbs_c0402_h28_000s
M_A_DIM0_CK_DDR0_DP [4,14]
12
C1301
@
PDG 1.8 Table 4-14.
Modified by TG 20180531
1.5pF/50V
M_A_DIM0_CK_DDR0_DN [4,14]
12
C1335
1UF/6.3V
nbs_c0201_h14_000s
12
C1343
1UF/6.3V
nbs_c0201_h14_000s
<Core Design>
Title :
ASUSTeK COMPUTER INC.
Size Project Name
Custom
Date: Sheet
Engineer:
DDR4_TERMINATION
EE
of
13 99Monday, February 18, 2019
Rev
R1.2GX502GX
Micron 8G 03012-00030700
Strap Resistance
R2509,R2517,R2515 mount
R2516,R2518,R2513 unmount
Samsung 16G 03012-00060000
Strap Resistance
R2509,R2517,R2513 mount
R2516,R2518,R2515 unmount
M_A_VREFCA
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
1 2
M_A_PARITY
ZQ_1401
U1401
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ18
DQ1
D3
M_A_DQ19
DQ2
D7
M_A_DQ22
DQ3
D2
M_A_DQ16
DQ4
D8
M_A_DQ17
DQ5
E3
M_A_DQ20
DQ6
E7
M_A_DQ23
DQ7
M_A_DQ21
C3
DQS_t
B3
M_A_DQS2
DQS_c
M_A_DQS#2
B2
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VSSQ1
VSSQ2
VSSQ3
VSSQ4
A-BCTD
+1.2V
B8
C1
C9
E2
Imax=1.2V/0.28A
E8
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
A8
D1
D9
GND
L3
L7
M3
K7
K3
L8
L2
M8
M2
M7
J3
N2
J7
N8
H2
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
+2.5V
B1
M9
G9
G2
G8
N7
F2
M_A_VREFCA
U1403
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ13
DQ1
D3
M_A_DQ15
DQ2
D7
M_A_DQ10
DQ3
D2
M_A_DQ14
DQ4
D8
M_A_DQ9
DQ5
E3
M_A_DQ12
DQ6
E7
M_A_DQ8
DQ7
M_A_DQ11
C3
DQS_t
B3
M_A_DQS1
DQS_c
M_A_DQS#1
B2
+1.2V
VDDQ1
B8
VDDQ2
C1
VDDQ3
Imax=1.2V/0.28A
C9
VDDQ4
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
GND
L3
L7
M_A_A0
M3
M_A_A1
K7
M_A_A2
K3
M_A_A3
L8
M_A_A4
L2
M_A_A5
M8
M_A_A6
M2
M_A_A7
M7
M_A_A8
J3
M_A_A9
N2
M_A_A10
J7
M_A_A11
N8
M_A_A12
H2
M_A_A13
M_A_A14
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
1 2
R1403 240Ohm
Imax=2.5V/30mA
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
ZQ_1403
+2.5V
B1
M9
G9
G2
G8
N7
F2
M_A_BA0[4,13]
M_A_BA1[4,13]
M_A_BG0[4,13]
M_A_BG1[4,13]
M_A_DIM0_CK_DDR0_DP[4,13]
M_A_DIM0_CK_DDR0_DN[4,13]
M_A_DIM0_CKE0[4,13]
M_A_DIM0_ODT0[4,13]
M_A_DIM0_CS0#[4,13]
M_A_ACT#[4,13]
M_A_ALERT#[4,13]
R1411 51Ohm
+1.2V
M_A_PARITY[4,13]
DDR4_DRAMRST#[16,20]
DDR4_DRAMRST#
GND
+1.2V
M_A_VREFCA
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
R1412 51Ohm
DDR4_DRAMRST#
1 2
R1404 240Ohm
GND
Imax=2.5V/30mA
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
U1404
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ7
DQ1
D3
M_A_DQ4
DQ2
D7
M_A_DQ2
DQ3
D2
M_A_DQ1
DQ4
D8
M_A_DQ6
DQ5
E3
M_A_DQ0
DQ6
E7
M_A_DQ3
DQ7
M_A_DQ5
C3
DQS_t
B3
M_A_DQS0
DQS_c
M_A_DQS#0
+1.2V
B2
VDDQ1
B8
VDDQ2
C1
VDDQ3
Imax=1.2V/0.28A
C9
VDDQ4
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
GND
R1409 51Ohm
+1.2V
DDR4_DRAMRST#
1 2
R1401 240Ohm
GND
Imax=2.5V/30mA
L3
L7
M3
K7
K3
L8
L2
M8
M2
M7
J3
N2
J7
N8
H2
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
ZQ_1404
+2.5V
B1
M9
G9
G2
G8
N7
F2
+1.2V
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
R1410 51Ohm
DDR4_DRAMRST#
1 2
R1402 240Ohm
GND
Imax=2.5V/30mA
M_A_VREFCA
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
U1402
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ25
DQ1
D3
M_A_DQ28
DQ2
D7
M_A_DQ30
DQ3
D2
M_A_DQ27
DQ4
D8
M_A_DQ24
DQ5
E3
M_A_DQ26
DQ6
E7
M_A_DQ29
DQ7
M_A_DQ31
C3
DQS_t
B3
M_A_DQS3
DQS_c
M_A_DQS#3
B2
+1.2V
VDDQ1
B8
VDDQ2
C1
VDDQ3
C9
Imax=1.2V/0.28A
VDDQ4
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
GND
L3
L7
M3
K7
K3
L8
L2
M8
M2
M7
J3
N2
J7
N8
H2
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
ZQ_1402
+2.5V
B1
M9
G9
G2
G8
N7
F2
+1.2V
12
C1424
1UF/6.3V
nbs_c0201_h14_000s
Close U1405
12
C1425
1UF/6.3V
nbs_c0201_h14_000s
+2.5V
12
Close U1401
+1.2V
12
C1426
1UF/6.3V
nbs_c0201_h14_000s
+1.2V
nbs_c0402_h28_000s
GND
Close to IC Pin B1/M9
C1478
1UF/6.3V
nbs_c0201_h14_000s
12
C1496
1UF/6.3V
nbs_c0201_h14_000s
12
12
C1449
10UF/6.3V
10uF*1
1uF*4
12
C1481
1UF/6.3V
nbs_c0201_h14_000s
Close U1401
12
C1497
1UF/6.3V
nbs_c0201_h14_000s
12
C1428
1UF/6.3V
nbs_c0201_h14_000s
nbs_c0402_h28_000s
GND
12
C1450
10UF/6.3V
nbs_c0402_h28_000s
M_A_VREFCA
U1405
J1
VREFCA
L3
L7
M_A_A0
M3
M_A_A1
K7
M_A_A2
K3
M_A_A3
L8
M_A_A4
L2
M_A_A5
M8
M_A_A6
M2
M_A_A7
M7
M_A_A8
J3
M_A_A9
N2
M_A_A10
J7
M_A_A11
N8
M_A_A12
H2
M_A_A13
M_A_A14
K2
K8
M_A_BA0
M_A_BA1
J2
J8
M_A_BG0
M_A_BG1
F7
F8
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
G3
M_A_DIM0_CKE0
F3
G7
M_A_DIM0_ODT0
H3
M_A_DIM0_CS0#
L9
M_A_ACT#
H8
M_A_ALERT#
H7
M_A_A16
M_A_A15
A7
1 2
C1448
10UF/6.3V
12
C1482
1UF/6.3V
nbs_c0201_h14_000s
12
C1498
1UF/6.3V
nbs_c0201_h14_000s
nbs_c0402_h28_000s
12
R1413 51Ohm
DDR4_DRAMRST#
R1405 240Ohm
GND
C1407
10UF/6.3V
M_A_VREFCA
A3
N3
M_A_PARITY
L1
B9
1 2
ZQ_1405
+2.5V
B1
M9
G9
G2
G8
N7
F2
+2.5V
12
12
12
C1483
C1406
1UF/6.3V
10UF/6.3V
nbs_c0201_h14_000s
nbs_c0402_h28_000s
GND
Close U1402
+1.2V
12
12
C1447
C1499
1UF/6.3V
10UF/6.3V
nbs_c0201_h14_000s
nbs_c0402_h28_000s
GND
+1.2V
12
12
C1429
1UF/6.3V
nbs_c0201_h14_000s
Close U1401~U1404 pin J1 Close U1405~U1409 pin J1
12
12
12
C1470
C1469
0.047UF/6.3V
0.047UF/6.3V
C2
DQ0
A0
B7
M_A_DQ38
DQ1
A1
D3
M_A_DQ36
DQ2
A2
D7
M_A_DQ34
DQ3
A3
D2
M_A_DQ37
DQ4
A4
D8
M_A_DQ39
DQ5
A5
E3
M_A_DQ32
DQ6
A6
E7
M_A_DQ35
DQ7
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
Close to IC Pin B1/M9 Close to IC Pin B1/M9
C1484
1UF/6.3V
nbs_c0201_h14_000s
Close U1402 Close U1403 Close U1404
12
C1403
1UF/6.3V
nbs_c0201_h14_000s
C1430
1UF/6.3V
nbs_c0201_h14_000s
C1471
0.047UF/6.3V
M_A_DQ33
C3
DQS_t
B3
M_A_DQS4
DQS_c
M_A_DQS#4
B2
VDDQ1
B8
VDDQ2
C1
VDDQ3
C9
VDDQ4
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
12
C1485
1UF/6.3V
nbs_c0201_h14_000s
12
12
C1431
1UF/6.3V
nbs_c0201_h14_000s
12
GND
C1404
1UF/6.3V
nbs_c0201_h14_000s
C1472
0.047UF/6.3V
12
C1486
1UF/6.3V
nbs_c0201_h14_000s
12
12
C1433
1UF/6.3V
nbs_c0201_h14_000s
C1405
1UF/6.3V
nbs_c0201_h14_000s
GND
12
12
12
nbs_c0402_h28_000s
GND
C1487
1UF/6.3V
nbs_c0201_h14_000s
C1412
1UF/6.3V
nbs_c0201_h14_000s
C1446
10UF/6.3V
+1.2V
Imax=1.2V/0.28A
12
C1416
10UF/6.3V
nbs_c0402_h28_000s
GND
12
nbs_c0402_h28_000s
GND
12
C1408
10UF/6.3V
nbs_c0402_h28_000s
M_A_VREFCA
12
Close U1403
C1445
10UF/6.3V
C1473
0.047UF/6.3V
+2.5V
+1.2V
12
12
+1.2V
12
12
C1488
1UF/6.3V
nbs_c0201_h14_000s
C1413
1UF/6.3V
nbs_c0201_h14_000s
Close U1408Close U1407
C1434
1UF/6.3V
nbs_c0201_h14_000s
C1474
0.047UF/6.3V
12
C1489
1UF/6.3V
nbs_c0201_h14_000s
12
C1414
1UF/6.3V
nbs_c0201_h14_000s
12
12
C1435
1UF/6.3V
nbs_c0201_h14_000s
C1475
0.047UF/6.3V
12
12
12
GND
+1.2V+1.2V
C1490
1UF/6.3V
nbs_c0201_h14_000s
C1415
1UF/6.3V
nbs_c0201_h14_000s
12
C1436
1UF/6.3V
nbs_c0201_h14_000s
C1476
0.047UF/6.3V
M_A_VREFCA
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
R1414 51Ohm
DDR4_DRAMRST#
1 2
R1406 240Ohm
GND
Imax=2.5V/30mAImax=2.5V/30mA
12
C1491
1UF/6.3V
nbs_c0201_h14_000s
12
C1418
1UF/6.3V
nbs_c0201_h14_000s
12
C1438
1UF/6.3V
nbs_c0201_h14_000s
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
12
C1422
10UF/6.3V
nbs_c0402_h28_000s
GND
12
C1442
10UF/6.3V
nbs_c0402_h28_000s
GND
12
nbs_c0402_h28_000s
GND
ZQ_1407
+2.5V
C1444
10UF/6.3V
U1407
J1
VREFCA
L3
A0
L7
A1
M3
A2
K7
A3
K3
A4
L8
A5
L2
A6
M8
A7
M2
A8
M7
A9
J3
A10/AP
N2
A11
J7
A12/BC_n
N8
A13
H2
WE_n/A14
K2
BA0
K8
BA1
J2
BG0
J8
BG1
F7
CK_t
F8
CK_c
G3
CKE
F3
ODT
G7
CS_n
H3
ACT_n
L9
ALERT_n
H8
RAS_n/A16
H7
CAS_n/A15
A7
DM_n/DBI_n/TDQS_t
A3
TDQS_c
N3
PAR
L1
RESET_n
B9
ZQ
B1
VPP1
M9
VPP2
G9
TEN
G2
NC1
G8
NC2
N7
NC3
F2
NC4
K4AAG085W
+2.5V
12
C1492
1UF/6.3V
nbs_c0201_h14_000s
Close U1404
+1.2V
12
C1419
1UF/6.3V
nbs_c0201_h14_000s
12
C1409
10UF/6.3V
nbs_c0402_h28_000s
A-BCTD
Close to IC Pin B1/M9
12
12
C1420
1UF/6.3V
nbs_c0201_h14_000s
+1.2V
Close to IC Pin M1
M_A_VREFCA
C1451
1 2
0.1UF/6.3V
nbs_c0201_h13_000s
C1493
1UF/6.3V
nbs_c0201_h14_000s
Close U1409
12
C1439
1UF/6.3V
nbs_c0201_h14_000s
nbs_c0201_h13_000s
12
1 2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS_t
DQS_c
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSSQ1
VSSQ2
VSSQ3
VSSQ4
12
C1421
1UF/6.3V
nbs_c0201_h14_000s
12
C1452
0.1UF/6.3V
C2
B7
D3
D7
D2
D8
E3
E7
C3
B3
B2
B8
C1
C9
E2
E8
A1
C7
F1
F9
H1
J9
M1
N9
A9
C8
E1
E9
G1
H9
K1
K9
N1
A2
A8
D1
D9
C1494
1UF/6.3V
nbs_c0201_h14_000s
C1440
1UF/6.3V
nbs_c0201_h14_000s
1 2
nbs_c0201_h13_000s
M_A_DQS5
M_A_DQS#5
12
C1453
0.1UF/6.3V
M_A_DQ46
M_A_DQ42
M_A_DQ41
M_A_DQ43
M_A_DQ45
M_A_DQ40
M_A_DQ44
M_A_DQ47
GND
12
C1495
1UF/6.3V
nbs_c0201_h14_000s
C1423
1UF/6.3V
nbs_c0201_h14_000s
12
Imax=1.2V/0.28A
C1441
1UF/6.3V
nbs_c0201_h14_000s
C1454
1 2
0.1UF/6.3V
nbs_c0201_h13_000s
GND
+1.2V
12
nbs_c0402_h28_000s
GND
12
nbs_c0402_h28_000s
GND
C1427
10UF/6.3V
C1432
10UF/6.3V
12
C1443
1UF/6.3V
nbs_c0201_h14_000s
12
nbs_c0402_h28_000s
GND
M_A_VREFCA
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
R1415 51Ohm
DDR4_DRAMRST#
1 2
R1407 240Ohm
GND
Imax=2.5V/30mA
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
U1408
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ58
DQ1
D3
M_A_DQ61
DQ2
D7
M_A_DQ63
DQ3
D2
M_A_DQ56
DQ4
D8
M_A_DQ57
DQ5
E3
M_A_DQ60
DQ6
E7
M_A_DQ59
DQ7
M_A_DQ62
C3
DQS_t
B3
M_A_DQS7
DQS_c
M_A_DQS#7
B2
+1.2V
VDDQ1
B8
VDDQ2
C1
VDDQ3
Imax=1.2V/0.28A
C9
VDDQ4
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
GND
L3
L7
M3
K7
K3
L8
L2
M8
M2
M7
J3
N2
J7
N8
H2
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
ZQ_1408
+2.5V
B1
M9
G9
G2
G8
N7
F2
+1.2V+1.2V
M_A_VREFCA
M_A_DIM0_CK_DDR0_DP
M_A_DIM0_CK_DDR0_DN
1 2
R1416 51Ohm
DDR4_DRAMRST#
1 2
R1408 240Ohm
GND
Imax=2.5V/30mA
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_BA0
M_A_BA1
M_A_BG0
M_A_BG1
M_A_DIM0_CKE0
M_A_DIM0_ODT0
M_A_DIM0_CS0#
M_A_ACT#
M_A_ALERT#
M_A_A16
M_A_A15
M_A_PARITY
U1409
J1
VREFCA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_n
A13
WE_n/A14
BA0
BA1
BG0
BG1
CK_t
CK_c
CKE
ODT
CS_n
ACT_n
ALERT_n
RAS_n/A16
CAS_n/A15
DM_n/DBI_n/TDQS_t
TDQS_c
PAR
RESET_n
ZQ
VPP1
VPP2
TEN
NC1
NC2
NC3
NC4
K4AAG085W
C2
DQ0
B7
M_A_DQ50
DQ1
D3
M_A_DQ53
DQ2
D7
M_A_DQ49
DQ3
D2
M_A_DQ51
DQ4
D8
M_A_DQ48
DQ5
E3
M_A_DQ52
DQ6
E7
M_A_DQ54
DQ7
M_A_DQ55
C3
DQS_t
B3
M_A_DQS6
DQS_c
M_A_DQS#6
B2
+1.2V
VDDQ1
B8
VDDQ2
C1
VDDQ3
C9
VDDQ4
Imax=1.2V/0.28A
E2
VDDQ5
E8
VDDQ6
A1
VDD1
C7
VDD2
F1
VDD3
F9
VDD4
H1
VDD5
J9
VDD6
M1
VDD7
N9
VDD8
A9
VSS1
C8
VSS2
E1
VSS3
E9
VSS4
G1
VSS5
H9
VSS6
K1
VSS7
K9
VSS8
N1
VSS9
A2
VSSQ1
A8
VSSQ2
D1
VSSQ3
D9
VSSQ4
A-BCTD
GND
L3
L7
M3
K7
K3
L8
L2
M8
M2
M7
J3
N2
J7
N8
H2
K2
K8
J2
J8
F7
F8
G3
F3
G7
H3
L9
H8
H7
A7
A3
N3
L1
B9
ZQ_1409
+2.5V
B1
M9
G9
G2
G8
N7
F2
DIM Thermal Sensor
Cap Placement of VREF
M_A_VREFCA
Delete DIM thermal Sensor related schematic 0918
12
C1410
C1437
10UF/6.3V
10UF/6.3V
nbs_c0402_h28_000s
+1.2V
+1.2V
12
12
GND
12
C1411
+
+
@
CE1402
CE1401
10PF/50V
220UF/2V
220UF/2V
GND
2.2uF
M_A_A[16:14] [4,13]
M_A_A[13:0] [4,13]
M_A_DQ[63:0] [4]
M_A_DQS[3:0] [4]
M_A_DQS[7:4] [4]
M_A_DQS#[3:0] [4]
M_A_DQS#[7:4] [4]
U1401
0.1uF
U1402
0.1uF
U1403
0.1uF
U1404
0.1uF
<Core Design>
ASUSTeK COMPUTER INC.
Date: Sheet
Size Project Name
E
Engineer:
Title :
DDR4_ON-BOARD_A1
EE
of
14 99Monday, February 18, 2019
Rev
R1.2GX502GX
<Core Design>
Title :
Engineer:
ASUSTeK COMPUTER
Size Project Name
A
Date: Sheet
DDR4_ON-BOARD_A2
EE
15 99Monday, February 18, 2019
of
Rev
R1.2GX502GX
<Core Design>
Title :
NB_****
ASUSTeK COMPUTER
Engineer:
Size Project Name
A
Date: Sheet
EE
Rev
R1.2GX502GX
17 99Monday, February 18, 2019
of
PCH_CPU GPIO
www.teknisi-indonesia.com
Default Signal Name
GPP_A0
RCIN#
GPP_A1
LAD0
GPP_A2
LAD1
GPP_A3
LAD2
GPP_A4
LAD3
GPP_A5
LFRAME#
GPP_A6
SERIRQ
GPP_A7
PIRQA#
GPP_A8
CLKRUN#
GPP_A9
CLKOUT_LPC0
GPP_A10
CLKOUT_LPC1
GPP_A11
PME#
GPP_A12
GPI
GPP_A13
SUSWANRN#
GPP_A14
SUS_STAT#
GPP_A15
SUS_ACK#
GPP_A16
Native/GPI
GPP_A17
GPI
GPP_A18
GPO
GPP_A19
GPO
GPP_A20
GPI
GPP_A21
GPI
GPP_A22
GPI
GPP_A23
GPI
Default Signal Name
GPP_B0
GPO
GPP_B1
GPO
GPP_B2
GPI
GPP_B3
GPI
GPP_B4
GPI
GPP_B5
GPI
GPP_B6
GPO
GPI
GPP_B7
GPP_B8
GPO
GPP_B9
GPO GPO
GPP_B10
GPO
GPP_B11
GPO
SLP_S0#
GPP_B12
GPP_B13
PLTRST#
GPP_B14
GPO
GPP_B15
GPO GPO (N.C)
GPP_B16
GPO GPO (N.C)
GPP_B17
GPO GPO (N.C)
GPO
GPP_B18
GPP_B19
GPI
GPP_B20
GPI
GPP_B21
GPI
GPP_B22
GPO
GPP_B23
GPO
GPP_C0 SMBCLK
SMBDATA
GPP_C1
GPO
GPP_C2
SML0CLK
GPP_C3
SML0DATA
GPP_C4
GPO
GPP_C5
GPI
GPP_C6
GPI
GPP_C7
GPO GPO (N.C)
GPP_C8
GPO GPO (N.C)
GPP_C9
GPO GPO (N.C)
GPP_C10
GPI
GPP_C11
GPI
GPP_C12
GPI
GPP_C13
GPI
GPP_C14
GPI
GPP_C15
GPI
GPP_C16
GPI
GPP_C17
GPI
GPP_C18
GPI
GPP_C19
GPP_C20
GPI
GPI
GPP_C21
GPO (N.C)
GPP_C22
GPI
GPP_C23
Default Signal Name
GPP_D0
GPP_D1
GPP_D2
GPP_D3
GPP_D4
GPP_D5
GPI GPI
GPI
GPP_D6
GPI
GPP_D7
GPI
GPP_D8
GPP_D9
GPO GPO (N.C)
GPP_D10
GPO GPO (N.C)
GPP_D11
GPO GPO (N.C)
GPP_D12
GPO GPO (N.C)
GPP_D13
GPO GPO (N.C)
GPP_D14
GPO GPO (N.C)
GPP_D15
GPO GPO (N.C)
GPP_D16
GPO GPO (N.C)
GPP_D17
GPO GPO (N.C)
GPP_D18
GPO GPO (N.C)
GPP_D19
GPO GPO (N.C)
GPP_D20
GPO GPO (N.C)
GPP_D21
GPO GPO (N.C)
GPP_D22
GPO GPO (N.C)
GPP_D23
GPO GPO (N.C)
Use As
Native
Native
Native
Native
Native
Native
Native
Native
Native
Native
Native
Native
GPI
Native
Native
Native
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
Use As
GPO
GPO
GPI
GPI
GPI
Native
GPO
Native
GPO
GPO
Native
Native
Strap
Strap
GPO
GPO
GPI
Strap
GPO
Use As
Native
Native
Strap
Native
Native
Strap
Native
Native
GPI
GPI
GPI
GPI
GPI
GPO
GPO
Native
Native
GPI
GPO
GPO
GPI
Use As
GPOGPO (N.C)
GPOGPO (N.C)
GPOGPO (N.C)
GPOGPO (N.C)
GPOGPO (N.C)
GPI
GPO
GPI
RC_IN#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
INT_SERIRQ
PCI_INTA#
PM_CLKRUN#
CLK_KBCPCI_PCH_X1
CLK_DEBUG_X1
PCI_PME#
PCH_GPP_A12
ME_SusPwrDnAck
PCH_SUS_STAT#
PM_SUSACK#
GPP_A16 (TP)
(N.C)
PCH_GPP_A18
PCH_GPP_A19
(N.C)
(N.C)
(N.C)
(N.C)
PCH_GPP_B0
PD_I2C_INT_PCH
PCH_GPP_B2
(N.C)
(N.C)
CLK_PEGA_REQ0#_X1
(N.C)
CLK_REQ2#/CLKREQ2_WLAN#
(N.C)
(N.C)
(N.C)
(N.C)GPO
SLP_S0# (TP)
PLT_RST#
PCH_GPPB14
PCH_GPPB18
PCH_GPPB19/BT_ON_PCH
PCH_GPPB20/NV_GPU_EVENT#
PCH_GPPB21/NV_GC6_FB_EN
PCH_GPPB22
SML1ALERT#
Signal NameDefault
SMB_CLK
SMB_SDA
PCH_GPPC2
SML0_CLK
SML0_DAT
PCH_GPPC5
SML1_CLK
SML1_DAT
WLAN_ON#
DIMM_SEL0
DIMM_SEL1
DIMM_SEL2
NFC_ID
PD_I2C_SDA_PCH
PD_I2C_SCL_PCH
I2C1_SDA
I2C1_SCL
PCH_GPPC20/DGPU_PWROK
PCH_GPPC21/GPU_RST#
CPAD_INT#
PCH_GPPD5 / M.2_BT_PCMFRM_CRF_RST_N
PCH_GPPD6 / M.2_BT_PCMOUT_CLKREQ0
PCH_GPPD7 / M.2_BT_PCMIN
PCH_GPPD8 / M.2_BT_PCMCLK
INT PU/PD
INT PU/PD
INT PU/PD
INT PU/PD
PD
PD
PD
PD
EXT PU/PD
PU 10K +3VS
PU 10K
PU 10K
PU 8.2K
PU 10K +3VSUS
PU 10K
PU 10K
PD1K(@)/PU10K(@)
PD1K(@)/PU10K(@)
PD 10K(@)
PU 10K
PU 10K(@) +3VS
PD1K(@)/PU10K(@)
PU 150K +3VSUSPD
EXT PU/PD Power
PU 2.2K
PU 2.2K
PU 4.7K(@)
PU 2.2K
PU 2.2K
PD1K(@)/PU15K(@)
PU 2.2K
PU 2.2K
PD 10K
PD 10K
PU 10K
PU 10K +3VSUS
PU 2.2K +3VSUS
PU 2.2K +3VSUS
PU 2.2K
PU 2.2K
PU 10K +3VS
PD 10K
PU 10K
PD 75K
PD 71.5K
+3VSUSPU 10K(@)
+3VSUS
+3VSUS
+3V_NGFF_WLAN
+3VSUS
+3VSUS
+3VSUS
+3V_NGFF_WLAN
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
Power
+3VA_DSW
+3VA_DSW
+3VA_DSW
+3VSUSPWRBTN#/PM_PWRBTN#
+3VA_DSW
EC IT8995 GPIO
Power
GPA0
GPA2
GPA3
GPA4
GPA5
GPA6
+3VS
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
+3VSPU 10KGPI
GPB5
GPB6
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG3
GPG4
GPG5
GPG6
GPG7
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
GPH7
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
Power
GPJ0
GPJ1
GPJ2
GPJ3
GPJ4
+3VS
GPJ5
+3VS
GPJ6
GPJ7
+3VS
+3VS
+3VS
GPM0
GPM1
GPM2
GPM3
GPM4
GPM5
GPM6
Use As
Default Signal Name
O
GPO
PWR_LED
GPO
OD
OD
Alt
O
Alt
Alt
O
Default Signal Name
Alt
I
OD
Alt
I
O
OD
Default Signal Name
O
Alt
Alt
O
I
I
Alt
O
Default Signal Name
I
O
Alt
OD
OD
O
Alt
Alt
Default Signal Name
O
O
O
O
O
I
OD
OD
Default Signal Name
O
O
Alt
Alt
Alt
Alt
Alt
O
Default Signal Name
O
O
I
GPI
GPI
GPI
O
GPI
Default Signal Name
Alt
Alt
Alt
O
O
O
O
O
Default Signal Name
I
I
I
I
I
I
Alt
Alt
Default Signal Name
O
O
Alt
O
Alt
O
I
O
Default Signal Name
LAD0/EIO0
LAD1/EIO1
LAD2/EIO2
LAD3/EIO3
LPCCLK/ESCK
LFRAME#/ECS#
SERIRQ/ALERT#
CHG_LED#
GPO
CHG_FULL_LED#
PWM
FAN1_PWM
GPO
EC_GPA4
PWM
FAN0_PWM
PWM
KB_LED_PWM
GPO
OS_LED#
Use As
GPI
AC_IN_OC#
GPI
LID_SW#
GPO
NUM_LED#
GPO
EC_GPB3/PWR_SW#
GPO
PS_ON_EC
GPO
NKey_WRST
RC_IN#
GPO
Use As
PM_EXTTS#0
GPO
SMB1_CLK
SMBus
SMB1_DAT
SMBus
PM_PWRBTN#
GPO
EC_GPC4/INTB#
GPI
PM_SUSC#
GPI
BAT1_IN_OC#
GPI
EC_GPC7
GPO
Use As
EC_GPD0/PCH_SLP_S0#
GPI
GPO
EC_GPD1/ME_AC_PRESENT
BUF_PLT_RST#
GPI
GPO
EXT_SCI#
GPO
EXT_SMI#
GPO
EC_GPD5/OP_SD#
FAN0_TACH
GPI
FAN1_TACH PU 10K +3VS
GPI
Use As
EC_GPE0/SUSB_EC#
GPO
EC_GPE1/SUSC_EC#
GPO
1.2V_ON
GPO
SUSWARN#_wCC
GPO
USB_BC1.2_OFF#
GPO
PM_SUSB#
GPI
CAP_LED#
GPO
THRO_CPU#
GPO
Use As
5VSUS_ON
GPO
VSUS_ON
GPO
P_SMB0_CLK
SMBus
P_SMB0_DAT
SMBus
TP_CLK
PS2
TP_DAT
PS2
EC_GPF6/PECI_EC
PECI
PCH_SPI_OV
GPO
Use As
DGPU_LIMIT
GPO
PCH_SUSACK#
GPO
GPI
EC_GPG2/PWRLIMIT_EC#
EC_SCE#/EC_SCE#_PCH
EC_SI/EC_SI_PCH
EC_SO/EC_SO_PCH
USB30_5VBUS
GPO
EC_SCK_PCH
Use As
PM_CLKRUN#
PCI
P_SMB3_CLK
SMBus
P_SMB3_DAT
SMBus
GPO
PM_RSMRST#
GPO
DPWROK_EC
PM_PWROK
GPO
PM_SYSPWROK
GPO
LCD_BACKOFF#
GPO
Use As
PM_SLP_SUS#
GPI
3VSUS_PWRGD
GPI
ALL_SYSTEM_PWRGD +3VS
GPI
IMVP8_PWRGD
GPI
3VA_DSW_PWRGD
GPI
SUSWARN#
GPI
A/D_MAX_POWER
AD
MB_MAX_POWER
AD
Use As
EC_GPJ0/USB31_5VBUS#
GPI
3VADSW_ON
GPO
PL_REF_EC
DA
EC_GPJ3 / PCH_SUS_STAT#
GPO
IBAT_REF_EC
DA
EC_GPJ5
GPO
KB_WAKE#
GPI
USB_CHARGE_ON#
GPO
Use As
LPC_AD0_R/LPC_AD0
LPC_AD1_R/LPC_AD1
LPC_AD2_R/LPC_AD2
LPC_AD3_R/LPC_AD3
CLK_KBCPCI_PCH
LPC_FRAME#
INT_SERIRQ
PU 100K&PD 1M
PU 100K&PD 1M
PU 100K & PD 93.1K
EXT PU/PD
PD 1M
PU 10K (@) +3VA_ECGPA1
PU 10K (@) +3VA_EC
EXT PU/PD
PU 100K
PU 100K
PU 100K
PD 10k
PU 10K
EXT PU/PD
+3VA_EC
PU 10K (@)
+3VA_EC
PU 4.7K
+3VA_EC
PU 4.7K
+3VSUS
PU 10K (@)
PU 10K +3VSUS
PD 100K
PD 100K
EXT PU/PD
+3VA_DSW
PU 100K
PD 100K
PU 10K
EXT PU/PD
PD 4.7K
PD 4.7K
PD 100K
+3VA_EC
PU 10K(@)
EXT PU/PD
+3VA_EC
+3VA_EC
+3VA_EC
PU 4.7K
+3VA_EC
PU 4.7K
PU 4.7K
PU 4.7K
EXT PU/PD
PU 100K
+3VA_EC
PD 10K (@)
EXT PU/PD
PU 8.2K +3VS
PU 4.7K
+3VA_EC
PU 4.7K
+3VA_EC
PD 10K(@)
PD 10K
PD 10K
PD 10K
EXT PU/PD
PU 10K
PU 100K
+3VA_DSW
PU 100K
+3VACC
PD 100K
+3VACC
EXT PU/PD
PU 10K +3VSUS
+3VA_EC
PU 100K
+3VA_DSWPU 100K
EXT PU/PD
PU 10K
Power
Power
+3VA
+3VA
+3VA
+3VS
Power
Power
+3VSPU 10K
+3VSPU 10K
+3VS
Power
Power
+3VS
+3VS
Power
Power
Power
+3VS
Power
Power
+3VS
GX502/GU502 Source:
SM_BUS ADDRESS :
PCH Master
on board memory CHA
SO-DIMM B(0) A4h
ESS_ES9118EQ 90h
EC Master (SMB0)
SN2867RUYR(CHARGER) 12h
BATTERY(GAUGE) 16h
APL6012(PROTECTION) 7Eh
EC Master (SMB1)
SM-Bus Device SM-Bus Address
GPU INT. Thermal sensor
PCH INT. Thermal sensor 94h
CPU Thermal Sensor 90h
GPU Thermal Sensor 9Ah
IT8299(N-key)
EC Master (SMB3)
SM-Bus Device SM-Bus Address
CYPD4126(PD) 08h
TAS5825(SMARTAMP) 9Ah, 98h
Device Identification
CPU Thermal Senser
1st
2nd
GPU Thermal Senser
1st
2nd
06023-00330000
SM-Bus AddressSM-Bus Device
SM-Bus AddressSM-Bus Device
9Eh, 9Ch
E2h
NCT7717U-A
G781-1P8F06G023048020
571182_CNL_PCH_H_EDS_Vol_1_Rev_0_7, page24 571391_CFL_H_PDG_Rev0p71, page 230
Power
GPP_E0
GPP_E1
GPP_E2
GPP_E3
GPP_E4
GPP_E5
GPP_E6
+3VS
GPP_E7
+3VS
GPP_E8
+3VS
GPP_E9
GPP_E10
GPP_E11
GPP_E12
GPP_F0
GPP_F1
GPP_F2
GPP_F3
GPP_F4
GPP_F5
GPP_F6
GPP_F7
GPP_F8
GPP_F9
PowerEXT PU/PD
GPP_F10
GPP_F11
GPP_F12
GPP_F13
GPP_F14
GPP_F15
GPP_F16
GPP_F17
GPP_F18
GPP_F19
GPP_F21
GPP_F22
GPP_F23
GPP_G0
GPP_G1
GPP_G2
GPP_G3
GPP_G4
GPP_G5
GPP_G6
GPP_G7
GPP_G8
GPP_G9
GPP_G10
GPP_G11
GPP_G12
GPP_G13
GPP_G14
GPP_G15
GPP_G16
GPP_G17
GPP_G18
GPP_G19
GPP_G20
GPP_G21
GPP_G22
GPP_G23
GPP_H0
GPP_H1
GPP_H2
+3VS
GPP_H3
+3VS
GPP_H4
GPP_H5
GPP_H6
GPP_H7
+3VS
GPP_H8
GPP_H9
PowerEXT PU/PD
GPP_H10
GPP_H11
GPP_H12
GPP_H13
GPP_H14
GPP_H15
GPP_H16
GPP_H17
GPP_H18
GPP_H19
GPP_H20
GPP_H21
GPP_H22
GPP_H23
GPP_I0
GPP_I1
GPP_I2
GPP_I3
GPP_I4
GPP_I5
GPP_I6
GPP_I7
GPP_I8
GPP_I9
GPP_I10
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPD8
GPD9
GPD10
GPD11 NativeLANPHYPC
Use As
GPO (N.C)GPO
GPO (N.C)GPO
GPO (N.C)GPO
GPI GPI
GPO (N.C)GPO
GPI
Native
GPO GPO (N.C)
GPI
GPO GPO (N.C)
GPI
Native
GPI
Native
Native
GPI
Native
GPI
Use As
Default
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPO GPO
GPI
Native
Native
GPI
GPI
Native
Native
GPI
GPI
Native
GPIGPP_F20
Native
GPI
Native
GPO
GPO
Use As
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
FAN_PWM_0
Native
FAN_PWM_1
FAN_PWM_2
Native
FAN_PWM_3
Native
GPI GPI
GPI GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
Use As
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
Native
GPI
GPI
GPO
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
Default
Use As
GPI
Native
GPI
Native
GPI
Native
GPI
GPI
Native
GPI
Native PU 2.2K
Native
GPO
GPI
Native
GPO
Native
GPI
Native
GPO
Native PD
Default Signal Name
Use As
Native
BATLOW#
Native
ACPRESENT
Native
LAN_WAKE#
Native
PWRBTN#
Native
SLP_S3# PD 100K
Native
SLP_S4#
Native
SLP_A#
RSVD
SUSCLK
Native SUS_CLK#/SUS_CLK
SLP_WLAN#
Native
SLP_S5#
Native
GPI
Native2
GPO
GPO
GPI
GPO
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPO
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPI
GPO
GPI
GPO
Signal NameDefault
EXT_SMI#
NGFF1_DEVSLP
EXT_SCI#
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
Signal Name
(N.C)
SATAPCIE_DET4
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
L_VDDEN_PCH
LCD_BACKEN_PCH
L_BKLTCTL_PCH
(N.C)
(N.C)
Signal NameDefault
(N.C)
SATA_ODD_PWRGT
SATA_ODD_DA#
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)Native
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
PCH_GPP_G18
PCH_GPP_G19
(N.C)
(N.C)
(N.C)
(N.C)
Signal NameDefault
CLKREQ6_NGFF1#_X1
CLKREQ7_USB31#_X1
CLK_REQ8#
CLK_REQ9#
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
WLAN_WAKE_CTRL_CRB
Signal Name
(N.C)
(N.C)
(N.C)
(N.C)
GPP_I4
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
(N.C)
PM_BATLOW#
ME_AC_PRESENT_X1
LAN_WAKE#
SLP_S3#/PM_SUSB#
SLP_S4#/PM_SUSC#
SLP_A#
(N.C)
SLP_WLAN#
SLP_S5#
LAN_PWREN
INT PU/PD
INT PU/PD
INT PU/PD
INT PU/PD
INT PU/PD
INT PU/PD
PD
PD
PD
PD
PD
PD
PD
EXT PU/PD
PU 10K +3VS
PU 10K(@)
PU 10K
PU 10K
PU 10K
PU 10K
EXT PU/PD Power
PU 10K
PU 10K
PU 10K
PU 10K
PD 100K
PD 1M
EXT PU/PD Power
EXT PU/PD Power
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
PU 10K
EXT PU/PD
PD 100K
PD 100K
PD 100K
PU 2.2K
PU 2.2K +3VS
PU 2.2K
PU 2.2K(@)
PU 2.2K
EXT PU/PD
PU 8.2K
PU 100K
PU 10K
PU 10K(@)
PD 100K
PU 10K(@)
PU 10K +3VA_DSW
Project Name
Title :
System Setting
Size
Dept.:
ASUSTeK COMPUTER INC. NB1
Monday, February 18, 2019
Engineer:
Custom
Date: Sheet
Rev
R1.2GX502GX
EE
99
of
2
Memory Down Vref
+V_DDR_CA_VREF[4]
C1803
0.022UF/16V
20mil
12
12
+V_VREF_CA_RC
R1813
24.9Ohm
R1814
1 2
2.7Ohm
+1.2V
12
12
R1815
1.8KOHM
1%
+V_VREF_CA
R1816
1.8KOHM
1%
R1805
1 2
0Ohm
nbs_r0603_h24_000s
Main Board
20mil
C1806
1 2
0.1UF/6.3V
nbs_c0201_h13_000s
R1.0 Hacken 1219
C1807
1 2
0.1UF/6.3V
nbs_c0201_h13_000s
GNDGND
M_A_VREFCA
SO-DIMM1 Vref
GND
High Frequency termina�on,
can absorb any high
frequency noise coming from
CPU/board crosstalk
R1809
12
12
+V_VREF_RC1
R1808
24.9Ohm
1 2
2.2Ohm
SB_DIMM_VREFDQ[4]
C1802
0.022UF/16V
GND
High Frequency termina�on,
can absorb any high
frequency noise coming from
CPU/board crosstalk
GND
+1.2V
1 2
1 2
GND
1%
R1811
1KOhm
+V_VREF_CA
+V_VREF_VD1
1%
R1812
1KOhm
Title :
Size
B
Date: Sheet
共用VREF_CA分壓
R1810
12
0Ohm
nbs_r0603_h24_000s
nbs_c0201_h13_000s
DIM_CA/DQ Voltage
Dept.:
Monday, February 18, 2019
ASUSTeK COMPUTER
R1817
0Ohm
0.1UF/6.3V
12
@
C1810
1 2
GND GND
Project Name
20mil20mil
Engineer:
M_B_VREFCA
C1811
1 2
0.1UF/6.3V
nbs_c0201_h13_000s
EE
18
Rev
R1.2GX502GX
99
of
<Core Design>
Title :
*****
ASUSTeK COMPUTER
Engineer:
Size Project Name
A
Date: Sheet
EE
Rev
R1.2GX502GX
19 99Monday, February 18, 2019
of
XTAL 24MHz
C2201
12
XTAL24_IN_X1
27PF/50V
4
X2201
2
24MHZ
C2202
27PF/50V
GND
07009-00065700
1 3
12
XTAL24_OUT_X1
RTC CRYSTAL 32.768KHz
C2203
12
15PF/50V
GND
C2204
12
15PF/50V
GND
DGPU CLKReq#
For Optimus
DGPU_PWROK[25,70,77]
PCH CLKREQ Setting:
+3VSUS
1 2
R2219 10KOhm
1 2
R2214 10KOhm
+3VS
1 2
R2217 10KOhm
1 2
R2215 10KOhm
Prevent leackage Modied by TG 20180706
1 2
R2223 10KOhm@
GND
1 2
2N7002K
RTC_X1_X1
X2202
32.768khz
07009-00112000
RTC_X2_X1
Q2201
2017/12/25 Changed by James
(1) X2201 from 07009-0062000 to 07009-00065700
(2) R2212 from 1M to 200K
1 2
R2211 0Ohm
nbs_r0201_h12_000s
12
R2212
200KOhm
nbs_r0402_h16_000s
1 2
R2209 0Ohm
nbs_r0201_h12_000s
1 2
R2213 0Ohm
nbs_r0201_h12_000s
12
R2210
10MOHM
1 2
R2221 0Ohm
nbs_r0201_h12_000s
+3VSUS
12
R2203
10KOhm
CLKREQ0_PEGA#
3
32
D
1
1
G
S
2
GND
CLK_REQ2#
CLK_REQ4#
CLK_REQ6#
CLK_REQ8#
CLK_REQ0#
XTAL24_IN
XTAL24_OUT
RTC_X1
RTC_X2
#0 : GPU
#2 : WLAN
#4 : GLAN
#6 : SSD1
#8 : SSD2
USB3.1 Port1 : Standard A
J3801
USB3.1 Port2 : Standard A
J3802
USB3.1 Port3 : Standard A
J5202
USB3.1 Port1 : Type C
J4701
U2001G
1
12
21
0402
21
0402
21
0402
21
0402
21
0402
U2001F
F9
USB31_1_TXN
F7
USB31_1_TXP
D11
USB31_1_RXN
C11
USB31_1_RXP
C3
USB31_2_TXN
D4
USB31_2_TXP
B9
USB31_2_RXN
C9
USB31_2_RXP
C17
USB31_6_TXN
C16
USB31_6_TXP
G14
USB31_6_RXN
F14
USB31_6_RXP
C15
USB31_5_TXN
B15
USB31_5_TXP
J13
USB31_5_RXN
K13
USB31_5_RXP
F11
USB31_3_TXN
G12
USB31_3_TXP
B10
USB31_3_RXN
C10
USB31_3_RXP
B14
USB31_4_TXN
C14
USB31_4_TXP
K16
USB31_4_RXN
J15
USB31_4_RXP
INTEL_COFFEELAKE_H_P
T2211@
CLK_24M[6]
CLK_24M#[6]
CLK_PCH_BCLK[6]
CLK_PCH_BCLK#[6]
R2218 60.4Ohm1%
GND
CLKREQ0_PEGA#[70]
CLKREQ2_WLAN#[53]
CLKREQ4_GLAN#[33]
CLKREQ6_NGFF1#[41]
CLKREQ8_NGFF2#[40]
U3_U3TXDN1[38]
U3_U3TXDP1[38]
U3_U3RXDN1[38]
U3_U3RXDP1[38]
U3_U3TXDN2[38]
U3_U3TXDP2[38]
U3_U3RXDN2[38]
U3_U3RXDP2[38]
U3_U3TXDN3[52]
U3_U3TXDP3[52]
U3_U3RXDN3[52]
U3_U3RXDP3[52]
U3_U3TXDN4[47]
U3_U3TXDP4[47]
U3_U3RXDN4[47]
U3_U3RXDP4[47]
R2222 @
R2206 @
R2202 @
R2255 @
R2207 @
BE33
GPP_A16
XTAL24_OUT
XTAL24_IN
XCLK_BIASREF
RTC_X1
RTC_X2
CLK_REQ0#
CLK_REQ2#
CLK_REQ4#
CLK_REQ6#
CLK_REQ8#
D7
C6
B8
C8
U9
U10
T3
BA49
BA48
BF31
BE31
AR32
BB30
BA30
AN29
AE47
AC48
AE41
AF48
AC41
AC39
AE39
AB48
AC44
AC43
V2
V3
T2
T1
AA1
Y2
AC7
AC6
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_K19/SMI#
GPP_K18/NMI#
GPP_E4/SATA_DEVSLP0
GPP_E5/SATA_DEVSLP1
GPP_E6/SATA_DEVSLP2
GPP_F5/SATA_DEVSLP3
GPP_F6/SATA_DEVSLP4
GPP_F7/SATA_DEVSLP5
GPP_F8/SATA_DEVSLP6
GPP_F9/SATA_DEVSLP7
GPP_A16/CLKOUT_48
CLKOUT_CPUNSSC_P
CLKOUT_CPUNSSC#
CLKOUT_CPUBCLK_P
CLKOUT_CPUBCLK#
XTAL_OUT
XTAL_IN
XCLK_BIASREF
RTCX1
RTCX2
GPP_B5/SRCCLKREQ0#
GPP_B6/SRCCLKREQ1#
GPP_B7/SRCCLKREQ2#
GPP_B8/SRCCLKREQ3#
GPP_B9/SRCCLKREQ4#
GPP_B10/SRCCLKREQ5#
GPP_H0/SRCCLKREQ6#
GPP_H1/SRCCLKREQ7#
GPP_H2/SRCCLKREQ8#
GPP_H3/SRCCLKREQ9#
GPP_H4/SRCCLKREQ10#
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
GPP_H7/SRCCLKREQ13#
GPP_H8/SRCCLKREQ14#
GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_N15
CLKOUT_PCIE_P15
CLKOUT_PCIE_N14
CLKOUT_PCIE_P14
CLKOUT_PCIE_N13
CLKOUT_PCIE_P13
CLKOUT_PCIE_N12
CLKOUT_PCIE_P12
INTEL_COFFEELAKE_H_P
BB39
AW37
AV37
BA38
BE38
AW35
BA36
BE39
BF38
BB36
BB34
T48
T47
AL48
AH35
AH40
AP48
AR47
AN46
AN37
AP47
PCI_INTA#
PCH_SUS_STAT#
CLK_KBCPCI_PCH_X1
CLK_DEBUG_X1
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK#
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
CLKIN_XTAL
R2245 22Ohm
R2201 22Ohm
Y3
Y4
CLK_ITP_BCLK_PCH#
CLK_ITP_BCLK_PCH
B6
A6
AJ6
AJ7
CLK0_PCIE_PEG#_GPU_X1
CLK0_PCIE_PEG_GPU_X1
AH9
AH10
AE14
AE15
CLK2_PCIE_WLAN#_X1
CLK2_PCIE_WLAN_X1
AE6
AE7
AC2
AC3
CLK4_PCIE_GLAN#_X1
CLK4_PCIE_GLAN_X1
AB2
AB3
W4
W3
CLK6_PCIE_NGFF1#_X1
CLK6_PCIE_NGFF1_X1
W7
W6
AC14
AC15
CLK8_PCIE_NGFF2#_X1
CLK8_PCIE_NGFF2_X1
U2
U3
AC9
AC11
AE9
AE11
R6
CLKIN_XTAL CLKIN_XTAL_PCH
R2249
10KOhm
1 2
GND GND
LPC_AD0 [30,44]
LPC_AD1 [30,44]
LPC_AD2 [30,44]
LPC_AD3 [30,44]
LPC_FRAME# [30,44]
INT_SERIRQ [30]
RC_IN# [30]
1 2
1 2
NGFF1_DEVSLP [41]
2017/11/30
Add NGFF1_DEVSLP
1
1
1 2
R2250 0Ohm
12
C2206
2.2PF/50V
@
1
T2205 @
CLK_KBCPCI_PCH [30]
CLK_DEBUG [44]
R2204 @
R2205 @
R2236 @
R2234 @
R2228 @
R2229 @
R2252 @
R2220 @
T2230 @
T2231 @
PCH XDP
100 MHz
CLK_PCI_BCLK# [6]
CLK_PCI_BCLK [6]
CLK0_PCIE_PEG#_VGA [70]
CLK0_PCIE_PEG_VGA [70]
21
0402
21
0402
21
0402
21
0402
21
0402
21
0402
21
0402
21
0402
CLK2_PCIE_WLAN# [53]
CLK2_PCIE_WLAN [53]
CLK4_PCIE_GLAN# [33]
CLK4_PCIE_GLAN [33]
CLK6_PCIE_NGFF1# [41]
CLK6_PCIE_NGFF1 [41]
CLK8_PCIE_NGFF2# [40]
CLK8_PCIE_NGFF2 [40]
PCI_INTA#
INT_SERIRQ
NGFF1_DEVSLP
Main Board
CPU
100 MHz
GPU
100 MHz
PCIE#16
WLAN
PCIE#15
GLAN
PCIE #9~12
NGFF1 (SSD)
PCIE #21~24
NGFF2 (SSD)
CLKIN_XTAL_PCH [53]
12
R2208 10KOhm
12
R2246 10KOhm
12
R2251 10KOhm@
+3VS
Project Name
Title :
PCH-CPT(3)_FDI,DMI,SYS PWR
Size
Dept.:
Custom
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
22
Main Board
HPD0 to DP
HPD1 to HDMI
HPD2 to TBT
HPD3 to VGA
HPD4 to EDP Panel
DDP Strap Setting Update：
0 = Port is not detected (Default)
1 = Port is detected
HPD1 to HDMI
HPD4 to EDP Panel
U2001E
AT6
GPP_I0/DDPB_HPD0/DISP_MISC0
AN10
GPP_I1/DDPC_HPD1/DISP_MISC1
AP9
GPP_I2/DDPD_HPD2/DISP_MISC2
AL15
GPP_I3/DDPF_HPD3/DISP_MISC3
AN6
EDP_HPD_CPU[43]
GPP_I4/EDP_HPD/DISP_MISC4
INTEL_COFFEELAKE_H_P
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
GPP_F22/DDPF_CTRLCLK
GPP_F23/DDPF_CTRLDATA
GPP_F14/PS_ON#
GPP_K23/IMGCLKOUT1
GPP_K22/IMGCLKOUT0
GPP_H23/TIME_SYNC0
GPP_K21
GPP_K20
AL13
AR8
AN13
AL10
AL9
AR3
AT49
AN40
AP41
M45
L48
T45
T46
AJ47
Project Name
Title :
PCH-CPT(4)_eDP,PCI,DP
Size
Dept.:
B
Date: Sheet
Monday, February 18, 2019
ASUSTeK COMPUTER
Engineer:
Rev
R1.2GX502GX
EE
23
99
of
PLT_RST#
+3VS
1 2
R2411 10KOhm
1 2
R2410 10KOhm
Strap Pin
Strap Pin
U2401
1
INB
2
INA
3
GND4OUTY
74LVC1G08GW
GND
EXT_SCI#
EXT_SMI#
SPI_SI_SPI[7,28]
SPI_SO_SPI[28]
SPI_CS#0_SPI[28]
SPI_CLK_SPI[28]
HDIO2_SPI[7,28]
HDIO3_SPI[28]
R2401 49.9Ohm
R2402 49.9Ohm
R2403 @
R2404 49.9Ohm
R2405 49.9Ohm
R2406 49.9Ohm
2017/12/15 Changed from 33 om to 49.9 ohm
+3VSUS
R1.0-24
5
VCC
12
12
C2401
R2408
680PF/50V
100KOhm
PLT_RST# [32]
@
GND
GND
12
12
2 1
0402
12
12
12
BUF_PLT_RST# [30,33,37,40,41,53,69,70]
U2001A
T2401@
Strap Pin
1
GND
BE36
PCI_PME# PLT_RST#
SPI_SI
SPI_SO
SPI_CS#0
SPI_CLK
HDIO2
HDIO3
GPP_A11/PME#/SD_VDD2_PWR_EN#
R15
RSVD2_2
R13
RSVD1_2
AL37
VSS
AN35
TP1
AU41
SPI0_MOSI
BA45
SPI0_MISO
AY47
SPI0_CS0#
AW47
SPI0_CLK
AW48
SPI0_CS1#
AY48
SPI0_IO2
BA46
SPI0_IO3
AT40
SPI0_CS2#
BE19
GPP_D1/SPI1_CLK/SBK1_BK1
BF19
GPP_D0/SPI1_CS#/SBK0_BK0
BF18
GPP_D3/SPI1_MOSI/SBK3_BK3
BE18
GPP_D2/SPI1_MISO/SBK2_BK2
BC17
GPP_D22/SPI1_IO3
BD17
GPP_D21/SPI1_IO2
INTEL_COFFEELAKE_H_P
GPP_B13/PLTRST#
GPP_K16/GSXCLK
GPP_K12/GSXDOUT
GPP_K13/GSXSLOAD
GPP_K14/GSXDIN
GPP_K15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
PCH_GPP_H12: weak internal pull down
Strap => eSPI Flash Sharing Mode
0: Master Attached Flash Sharing (MAFS) enable (Default)
1: Slave Attached Flash Sharing (SAFS) enable
INTRUDER#
Strap => Reserved
Refer to CFL_MOW_WW21(Doc.571006)
+3VSUS
Stuff R2442
R2442 100KOhm
+3VSUS
12
12
R2414
10KOhm
R2413
10KOhm
@
1 2
KB ID1
GPP_H17
AV29
Y47
Y46
Y48
W46
AA45
AL47
AM45
BF32
BC33
AE44
AJ46
AE43
KBID_1
AC47
KBID_0
AD48
SML3ALERT#
AF47
Strap Pin
AB47
AD47
GPP_H12
AE48
BB44
SM_INTRUDER#
1 2
R2418 220KOhm
RES 220K OHM 1/20W (0201) 5%
@
EXT_SMI# [30]
EXT_SCI# [30]
Strap Pin
@
1 2
R2444 20KOhm
1 2
R2407
330KOHM
0922
GND
GND
+3VA_RTC
KB ID2
GPP_H18
KBID_2 KBID_1 KBID_0KBID_2
SML3ALERT#
+3VSUS
12
12
R2415
10KOhm
@
R2417
10KOhm
KB ID0
GPP_H16
+3VSUS
12
12
R2412
10KOhm
@/4zone
R2416
10KOhm
/perkey
Main Board
Strap Pin
Strap Pin
GPP_J4(CNV_BRI_DT):
This signal has a weak internal pull down.
0 = 38.4MHz XTAL frequency selected.(Default)
1 = 24MHz XTAL frequency selected.
(MOW39)
Pin Strap for XTAL frequence selection
An external 4.7K PU to VCC(1.8V or 3.3V) is required
on this strap for PCH 24 MHZ XTAL operation
GPP_J6(CNV_RGI_DT):
An external pull-up or pull-down is required.
0 = Integrated CNVi enable.
1 = Integrated CNVi disable.
[Intel FAE]
RGI_DT has an automatic detect CNVi mechanisim,
please do not use external PD.
The CRF has an internal strong 1K PD already.
Do not leave this pin float,
if CNVi is not used, it still need a 20K ohm PU.
GPP_J9:
The signal has a weak internal pull-down
0 = VCCSPI is connected to 3.3V rail
1 = VCCSPI is connected to 1.8V rail
CNV_BRI_DT_PCH[53]
CNV_BRI_RSP[53]
CNV_RGI_DT_PCH[53]
CNV_RGI_RSP[53]
RF CNVi BRI/RGI
T2407@
R2440 33Ohm
R2438 33Ohm
T2403@
T2406@
Strap Pin
R2440/R2438 close to PCH side
R5330/R5328 close to WLAN side
Strap
GPP_J4(CNV_BRI_DT):Must PU 4.7K
GPP_J6(CNV_RGI_DT):Must PU 20K
U2001M
AW13
GPP_G0/SD_CMD
BE9
GPP_G1/SD_DATA0
BF8
GPP_G2/SD_DATA1
BF9
GPP_G3/SD_DATA2
BG8
GPP_G4/SD_DATA3
BE8
GPP_G5/SD_CD#
BD8
GPP_G6/SD_CLK
AV13
GPP_G7/SD_WP
AP3
GPP_I11/M2_SKT2_CFG0
AP2
GPP_I12/M2_SKT2_CFG1
AN4
GPP_I13/M2_SKT2_CFG2
AM7
GPP_I14/M2_SKT2_CFG3
AV6
GPP_J0/CNV_PA_BLANKING
1
GPP_J1
/CNVI
12
12
1
1
/CNVI
CNV_MFUART2_RXD
CNV_MFUART2_TXD
1107
CNV_BRI_DT
CNV_BRI_RSP
CNV_RGI_DT
CNV_RGI_RSP
AY3
GPP_J1/CPU_C10_GATE#
AR13
GPP_J11/A4WP_PRESENT
AV7
GPP_J10
AW3
GPP_J_2
AT10
GPP_J_3
AV4
GPP_J4/CNV_BRI_DT/UART0B_RTS#
AY2
GPP_J5/CNV_BRI_RSP/UART0B_RXD
BA4
GPP_J6/CNV_RGI_DT/UART0B_TXD
AV3
GPP_J7/CNV_RGI_RSP/UART0B_CTS#
AW2
GPP_J8/CNV_MFUART2_RXD
AU9
GPP_J9/CNV_MFUART2_TXD
INTEL_COFFEELAKE_H_P
GPPJ_RCOMP_1P81
GPPJ_RCOMP_1P82
GPPJ_RCOMP_1P83
CNV_WR_CLKN
CNV_WR_CLKP
CNV_WR_D0N
CNV_WR_D0P
CNV_WR_D1N
CNV_WR_D1P
CNV_WT_CLKN
CNV_WT_CLKP
CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N
CNV_WT_D1P
CNV_WT_RCOMP
PCIE_RCOMPN
PCIE_RCOMPP
SD_RCOMP_1P8
SD_RCOMP_3P3
RSVD2_1
RSVD3_1
RSVD1_1
CNV_BRI_RSP
CNV_RGI_RSP
BD4
BE3
BB3
BB4
BA3
BA2
BC5
BB6
BE6
BD7
BG6
BF6
BA1
B12
A13
BE5
BE4
BD1
BE1
BE2
Y35
Y36
BC1
AL35
TP2
1 2
R2447 20KOhm
1 2
R2448 20KOhm
CNV_WT_RCOMP
PCIE_RCOMPN
PCIE_RCOMPP
SD_RCOMP_1P8
SD_RCOMP_3P3
GPPJ_RCOMP
1 2
R2422 150Ohm
1% /CNVi
R2423 100Ohm
1%
1 2
R2435 200Ohm
1%
1 2
R2436 200Ohm
1%
1 2
R2421 200Ohm
1%
+1.8VSUS
12
CNV_WR_CLKN_PCH
CNV_WR_CLKP_PCH
CNV_WR_D0N_PCH
CNV_WR_D0P_PCH
CNV_WR_D1N_PCH
CNV_WR_D1P_PCH
CNV_WT_CLKN_PCH
CNV_WT_CLKP_PCH
CNV_WT_D0N_PCH
CNV_WT_D0P_PCH
CNV_WT_D1N_PCH
CNV_WT_D1P_PCH
PCIE RCOMP 100 OHM 1%
GND
Strap => Reserved
Refer to CFL-H RVP R1.0 (Doc. 571483)
External pull-up is required. Recommend 100K if pulled
up to 3.3V or 75K if pulled up to 1.8V.
CNV_WR_CLKN_PCH [53]
CNV_WR_CLKP_PCH [53]
CNV_WR_D0N_PCH [53]
CNV_WR_D0P_PCH [53]
CNV_WR_D1N_PCH [53]
CNV_WR_D1P_PCH [53]
CNV_WT_CLKN_PCH [53]
CNV_WT_CLKP_PCH [53]
CNV_WT_D0N_PCH [53]
CNV_WT_D0P_PCH [53]
CNV_WT_D1N_PCH [53]
CNV_WT_D1P_PCH [53]
RF CNVi Interface
SPI_SI
+3VSUS
12
12
R2443
100KOhm
R2445
4.7KOhm
@
Project Name
Title :
PCH-CPT(5)_LPC,SPI,SMBUS
Size
Dept.:
Custom
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
24
GC6FBEN_PCH[70,71,77]
teknisi-indonesia
GPUEVENT#_PCH[77,78]
BT_ON_PCH[53]
GPU_RST#
12
C2501
@
100PF/50V
GND
EMI-GX501GI
CPAD_INT#[31]
GPU_RST#[70]
DGPU_PWROK[22,70,77]
I2C1_SCL[31]
I2C1_SDA[31]
PD_I2C_SCL_PCH[12]
PD_I2C_SDA_PCH[12] PCH_GPP_A18 [49]
EDP_OD#[45]
2017/12/05 Remove TBT_I2C_SCL_PCH/TBT_I2C_SDA_PCH by James
Onboard Memory PCB-ID:
GPP_C12 =>DIMM_SEL0
GPP_C13 =>DIMM_SEL1
GPP_C14 =>DIMM_SEL2
DDR4 Memory Down pool
DIMM_SEL0
DIMM_SEL1
DIMM_SEL2
Micron (1Rx8Gb)
03012-00030700
Micron DDR4 2666
MT40A1G8SA-075:E
L
L
H
R2509 10KOhm
1 2
/MicronSamsung
R2517 10KOhm
1 2
/MicronSamsung
R2513 10KOhm
1 2
/Samsung
Samsung (1Rx16Gb)
03012-00060000
Samsung DDR4 2666
K4AAG085WA-BCTD
L
L
L
Strap Pin
21
R2541 @/GC6
0402
21
R2520 @/GC6
0402
21
R2539 @
0402
21
R2507 @
0402
21
R2504 @
0402
R2516 10KOhm
DIMM_SEL0
R2518 10KOhm
DIMM_SEL1
R2515 10KOhm
DIMM_SEL2
U2001K
BA26
GPP_B22/GSPI1_MOSI
+3VSUS
BD30
AU26
AW26
BE30
BD29
BF29
BB26
BB24
BE23
AP24
BA24
BD21
AW24
AP21
AU24
AV21
AW21
BE20
BD20
BE21
BF21
BC22
BF23
BE15
BE14
GPP_B21/GSPI1_MISO
GPP_B20/GSPI1_CLK
GPP_B19/GSPI1_CS0#
GPP_B18/GSPI0_MOSI
GPP_B17/GSPI0_MISO
GPP_B16/GSPI0_CLK
GPP_B15/GSPI0_CS0#
GPP_C9/UART0A_TXD
GPP_C8/UART0A_RXD
GPP_C11/UART0A_CTS#
GPP_C10/UART0A_RTS#
GPP_C15/UART1_CTS#
GPP_C14/UART1_RTS#
GPP_C13/UART1_TXD/
GPP_C12/UART1_RXD/
GPP_C23/UART2_CTS#
GPP_C22/UART2_RTS#
GPP_C21/UART2_TXD
GPP_C20/UART2_RXD
GPP_C19/I2C1_SCL
GPP_C18/I2C1_SDA
GPP_C17/I2C0_SCL
GPP_C16/I2C0_SDA
ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
GPP_D4/
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
INTEL_COFFEELAKE_H_P
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/
/ISH_UART1_CTS#
/ISH_UART1_RTS#
ISH_UART1_TXD
ISH_UART1_RXD
(TP)
(PD)
Strap => Boot BIOS Strap Bit BBS
PCH_GPPB22
PCH_GPPB21
PCH_GPPB20
PCH_GPPB19
PCH_GPPB18
NFC_ID
DIMM_SEL2
DIMM_SEL1
DIMM_SEL0
CPAD_INT#
PCH_GPPC21
PCH_GPPC20
I2C1_SCL
I2C1_SDA
PD_I2C_SCL_PCH
PD_I2C_SDA_PCH PCH_GPP_A18
1 2
@/RAM
1 2
@/RAM
1 2
@/Micron
GPP_D16/ISH_UART0_CTS#/
GPP_A17/SD_VDD1_PWR_EN#/
PCH_GPPB22
GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D14/ISH_UART0_TXD/I2C2_SCL
GPP_D13/ISH_UART0_RXD/I2C2_SDA
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
+3VS +3VS
12
R2514
10KOhm
@
12
R2508
1KOhm
@
GSPI2_MISO
GSPI2_MOSI
CNV_WCEN
CNV_WFEN
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
ISH_GP7
BA20
BB20
BB16
AN18
BF14
AR18
BF17
BE17
AG45
AH46
AH47
AH48
AV34
AW32
BA33
BE34
BD34
BF35
BD38
PCH_GPPB22: weal internal pull down
PU LPC
PD SPI (Default)
PCH_GPP_A19
Strap => No Reboot
PCH_GPPB18
NOTE: Enable No Reboot
PCH will disable the TCO
Timer system reboot feature.
This function is useful when running ITP/XDP.
PCH_GPPB18: weak internal pull down
PU Enable
PD Disable (Default)
PCH_GPP_A19 [49]
12
R2522
10KOhm
@
12
R2521
1KOhm
@
RN2501A 1KOhm
I2C1_SCL
I2C1_SDA
CPAD_INT#
PCH_GPPB21 : GC6FBEN_PCH
PCH_GPPB21
RN2501B 1KOhm
R2519 10KOhm
R2527 10KOhm@
PCH_GPPB20
PCH_GPPB20 : NV_GPU_EVENT#, GPO
Schumi (20180510)
PD_I2C_SCL_PCH
PD_I2C_SDA_PCH
PCH_GPPC21 : DGPU_RST#
PCH_GPPC22 : DGPU_PWR_EN#
PCH_GPPC21
PCH_GPPC20
PCH_GPPB19
RN2502A 2.2KOhm
RN2502B 2.2KOhm
R2536 10KOhm
R2538 10KOhm@
R2535 10KOhm@
12
34
1 2
1 2
R2503 10KOhm
1 2
12
34
1 2
1 2
1 2
Main Board
+3VS
0907
+3VSUS
+3VSUS
PCB ID0 GPP_D9 PCB ID1 GPP_D10 Touch Panel ID
Touch Pad ID
GPP_D11
GPP_D12
NFC ID
GPP_C15
NFC_ID
H: no NFC
L: NFC
+3VSUS
1 2
1 2
R2534
10KOhm
@
R2525
10KOhm
X-tal Frequency Select
Project Name
Title :
PCH-CPT(6)_GPIO,MISC
Size
Dept.:
Custom
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
25
11/22 Remove R2634/R2635 by James
+1.05VSUS
1012
11/22 Changed R2609/59 size from 1uH to 0 ohm by James
11/22 Changed R2649 size from 0603 to 0402 by James
+VCCCLPLLEBB_1P05
+VCCMPHY_1P05
6.66A
12
C2636
C2607
1UF/6.3V
nbs_c0201_h14_000s
1 2
22UF/6.3V
+VCCPRIM_1P05
GND GND
5.95A
C2655
1UF/6.3V
nbs_c0201_h14_000s
1 2
11/22 Remove R2610/14/62/16/17/60/61/56/07/08 by James
GND
4.174A
R2609 0OHM
R2659 0OHM
R2649 0OHM
1013
+VCCPRIM_CNV_HVLDO_1P05
+VCCDSW_1P05
+VCCA_SRC_1P05
+VCCA_OC_1P05
1 2
1 2
1 2
GND
GND
GND
GND
1 2
GND
+VCCPRIM_1P05
+VCCMPHY_1P05
+VCCPRIM_FUSE_1P05
+VCCDUSB_1P05
+VCCAZPLL_1P05
+VCCAMPHYPLL_1P05
+VCCA_XTAL_1P05
+VCCA_OCPLL1_1P05
+VCCA_BCLKPLL2_1P05
C2635
1 2
0.1UF/25V
@
C2654
1 2
0.1UF/25V
1 2
GND
C2602
1UF/6.3V
nbs_c0201_h14_000s
1 2
@
C2624
1 2
0.1UF/25V
C2626
1UF/6.3V
nbs_c0201_h14_000s
C2623
1UF/6.3V
nbs_c0201_h14_000s
0.015A
+VCCFHV0_2P8
0.0859A
+VCCFHV1_2P8
0.193A
+VCCPRIM_FUSE_1P05
0.0012A
+VCCPRIM_CNV_HVLDO_1P05
0.2A
0.00428A
0.213A
+VCCCLPLLEBB_1P05
0.109A
+VCCDUSB_1P05
0.42A
+VCCA_BCLKPLL2_1P05
0.021A
+VCCA_OCPLL1_1P05
0.0198A
+VCCA_OC_1P05
0.0085A
+VCCA_SRC_1P05
0.169A
+VCCDSW_1P05
AA22
AA23
AB20
AB22
AB23
AB27
AB28
AB30
AD20
AD23
AD27
AD28
AD30
AF23
AF27
AF30
U26
U29
V25
V27
V28
V30
V31
AD31
AE17
W22
W23
BG45
BG46
W31
D1
E1
C49
D49
E49
P2
P3
W19
W20
C1
C2
V19
B1
B2
B3
INTEL_COFFEELAKE_H_P
U2001H
VCCPRIM_1P05_1
VCCPRIM_1P05_2
VCCPRIM_1P05_3
VCCPRIM_1P05_4
VCCPRIM_1P05_5
VCCPRIM_1P05_6
VCCPRIM_1P05_7
VCCPRIM_1P05_8
VCCPRIM_1P05_9
VCCPRIM_1P05_10
VCCPRIM_1P05_11
VCCPRIM_1P05_12
VCCPRIM_1P05_13
VCCPRIM_1P05_16
VCCPRIM_1P05_17
VCCPRIM_1P05_18
VCCPRIM_1P05_23
VCCPRIM_1P05_24
VCCPRIM_1P05_25
VCCPRIM_1P05_26
VCCPRIM_1P05_27
VCCPRIM_1P05_28
VCCPRIM_1P05_29
VCCPRIM_1P05_14
VCCPRIM_1P05_15
VCCDUSB_1P05_1
VCCDUSB_1P05_2
VCCDSW_1P05_1
VCCDSW_1P05_2
VCCPRIM_MPHY_1P05
VCCPRIM_1P05_21
VCCPRIM_1P05_22
VCCAMPHYPLL_1P05_1
VCCAMPHYPLL_1P05_2
VCCAMPHYPLL_1P05_3
VCCA_XTAL_1P05_1
VCCA_XTAL_1P05_2
VCCA_SRC_1P05_1
VCCA_SRC_1P05_2
VCCAPLL_1P05_4
VCCAPLL_1P05_5
VCCA_BCLK_1P05
VCCAPLL_1P05_1
VCCAPLL_1P05_2
VCCAPLL_1P05_3
VCCPRIM_3P3_2
BF47
DCPRTC1
BG47
DCPRTC2
V23
VCCPRIM_3P3_5
AN44
VCCSPI
BC49
VCCRTC1
BD49
VCCRTC2
AN21
VCCPGPPG_3P3
AY8
VCCPRIM_3P3_3
BB7
VCCPRIM_3P3_4
AC35
VCCPGPPHK1
AC36
VCCPGPPHK2
AE35
VCCPGPPEF1
AE36
VCCPGPPEF2
AN24
VCCPGPPD
AN26
VCCPGPPBC1
AP26
VCCPGPPBC2
AN32
VCCPGPPA
AT44
VCCPRIM_3P3_1
BE48
VCCDSW_3P3_1
BE49
VCCDSW_3P3_2
BB14
VCCHDA
AG19
VCCPRIM_1P8_3
AG20
VCCPRIM_1P8_4
AN15
VCCPRIM_1P8_5
AR15
VCCPRIM_1P8_6
BB11
VCCPRIM_1P8_7
AF19
VCCPRIM_1P8_1
AF20
VCCPRIM_1P8_2
AG31
VCCPRIM_1P05_20
AF31
VCCPRIM_1P05_19
AK22
VCCDPHY_1P24_1
AK23
VCCDPHY_1P24_2
AJ22
VCCDPHY_1P24_3
AJ23
VCCDPHY_1P24_4
BG5
VCCDPHY_1P24_5
K47
VCCMPHY_SENSE
K46
VSSMPHY_SENSE
+VCCAZPLL_1P05
12
C2656
1PF/50V
@
GND
GND
1 2
C2622
1UF/6.3V
nbs_c0201_h14_000s
+VCCPHVLDO_1P8
VCCMPHY_SENSE
VSSMPHY_SENSE
12
GND
+V3.3A_V1.8A_VCCPGPPHK
+V3.3A_V1.8A_VCCPGPPA
+V3.3A_V1.8A_VCCPAZIO
+VCCLDOSRAM_IN_1P24
+VCCDPHY_1P24
+VCCDPHY_1P24_MAR_R
C2629
1PF/50V
@
+VCCRTCEXT
+VCCPRTC_3P3
+V3.3A_V1.8A_VCCPGPPEF
+VCCPFUSE_3P3
+VCCPRIM_1P8
@
1
+VCCFHV1_2P8
T2601
1 2
R2652 0Ohm
1 2
R2651 0Ohm
+VCCFHV0_2P8
GND
+VCCPUSB2_3P3
+VCCPGPPC_G_3P3
+V3.3A_V1.8A_VCCPGPPD
+VCCPDSW_3P3
+VCCLDOSRAM_IN_1P24
+1.05VSUS
+V3.3A_V1.8A_VCCPSPI
+VCCPHVLDO_3P3
+V3.3A_V1.8A_VCCPGPPBC
1 2
R2663 0Ohm
1 2
R2658 0Ohm
12
C2657
4.7UF/6.3V
GND
+3VSUS
+VCCRTCEXT
12
C2601
0.1UF/25V
GND
+VCCDPHY_1P24
12
C2603
+VCCDPHY_1P24
4.7UF/6.3V
GND
09/12 RF add
SHORT PCH PINS AJ22, AJ23 ,AK22, AK23 TOGETHER IN SURFACE LAYER
AND CONNECT BG5 TO EDGE CAP WITH LOWEST LOOP INDUCTANCE AS PDG
RECOMMENDS.
11/22 Remove R2669/02/03/04/36 by James
+VCCPHVC_3P3
AW9
4.174A
11/22 Remove R2667 by James
+3VA_DSW
+3VA_RTC
R2668 0OHM
11/22 Changed R2668 size from 0603 to 0402 by James
11/22 Remove R2648 by James
+1.8VSUS
1 2
0.088A
0.33A
0925
12
C2625
22UF/6.3V
GND
C2613
1UF/6.3V
1 2
GND GND
+VCCA_XTAL_1P05
+VCCAMPHYPLL_1P05
0925
12
nbs_c0201_h14_000s
C2614
22UF/6.3V
0.005A
0.114A
0.034A
Refer to CNL-H PCH EDS R1.0 (Doc.571182)
+VCCPDSW_3P3
C2651
1 2
0.1UF/25V
GND
+VCCPRTC_3P3
C2649
C2650
1UF/6.3V
nbs_c0201_h14_000s
1 2
1 2
0.1UF/25V
GND GND
+VCCPRIM_1P8
C2648
4.7UF/6.3V
0.766A
C2647
1UF/6.3V
nbs_c0201_h14_000s
1 2
GNDGND
12
Pureple reference CRB
Blue reference EDS
C2652
1UF/6.3V
1 2
GND
0.113A
0.000416A
0.152A
nbs_c0201_h14_000s
1 2
GND
0.094A
0.00031A
C2653
0.1UF/25V
+VCCPFUSE_3P3
+VCCPHVC_3P3
+VCCPHVLDO_3P3
+VCCPUSB2_3P3
+VCCPGPPC_G_3P3
0.106A
0.182A
0.97A
0.095A
0.145A
+1.8VSUS
11/22 Remove R2666/65/30/32/31/39/41/43 by James
+3VSUS +V3.3A_V1.8A_VCCPGPPA
+1.8VSUS
+3VSUS
0.536A
0.005A
+3VSUS +V3.3A_V1.8A_VCCPGPPD
+1.8VSUS
+3VSUS +V3.3A_V1.8A_VCCPGPPEF
+3VSUS +V3.3A_V1.8A_VCCPGPPHK
+3VSUS +V3.3A_V1.8A_VCCPSPI
+3VS
R2625 0Ohm
R2626 0Ohm
C2628
0.01UF/25V
@
R2601 0Ohm
R2602 0Ohm
GPIO Voltage Level
GPP_A
GPP_B
GPP_C
GPP_D
GPP_E
GPP_F
GPP_G
GPP_H
GPP_I
GPP_J
GPP_K
GPD
12
@
12
Q2601
@
PEA28BA
3
D
2
5
1
G S
4
Q2601_G
@
12
R2605
100KOhm
12
@
12
Power pinGroup
VCCPGPPA
VCCPGPPBC
VCCPGPPBC
VCCPGPPD
VCCPGPPEF
VCCPGPPEF
VCCPGPPG_3P3
VCCPRIM_1P8
VCCPGPPHK
VCCPRIM_3P3
VCCPRIM_1P8
VCCPGPPHK
VCCDSW_3P3
+12VS
12
Power option
3.3V
3.3V
3.3V
1.8V or 3.3V
3.3V
3.3V
Dynamic voltage
to be config SDIO
3.3V
3.3V Only
1.8V Only
3.3V
3.3V Only
C2627
1 2
0.1UF/25V
GND
12
C2630
1PF/50V
@
GND
Power plane
+3VSUS
+3VSUS
+3VSUS
+1.8VSUS
+3VSUS
+3VSUS
+3VSUS
+1.8VSUS
+3VSUS
+3VSUS
+1.8VSUS
+3VSUS
+3VA_DSW
12
C2631
1PF/50V
@
GND
+V3.3A_V1.8A_VCCPGPPBC
@
C2646
1 2
0.1UF/25V
GND
@
C2608
1 2
0.1UF/25V
GND
+V3.3A_V1.8A_VCCPAZIO
0.00767A
0.101A
0.343A
0.14A
0.174A
0.262A
0.05A
Main Board
0.007A
0.085A
0.286A
0.117A
0.145A
0.219A
0.042A
0.009A
0.141A
Project Name
GX502GX
Title :
PCH-CPT(7)_POWER,GND
Size
Dept.:
ASUSTeK COMPUTER
D
Date: Sheet
Monday, February 18, 2019
Engineer:
Rev
R1.2
EE
99
of
26
Main Board
U2001I
A2
VSS_1
A28
VSS_2
A3
VSS_3
A33
VSS_4
A37
VSS_5
A4
VSS_6
A45
VSS_7
A46
VSS_8
A47
VSS_9
A48
VSS_10
A5
VSS_11
A8
VSS_12
AA19
VSS_13
AA20
VSS_14
AA25
VSS_15
AA27
VSS_16
AA28
VSS_17
AA30
VSS_18
AA31
VSS_19
AA49
VSS_20
AA5
VSS_21
AB19
VSS_22
AB25
VSS_23
AB31
VSS_24
AC12
VSS_25
AC17
VSS_26
AC33
VSS_27
AC38
VSS_28
AC4
VSS_29
AC46
VSS_30
AD1
VSS_31
AD19
VSS_32
AD2
VSS_33
AD22
VSS_34
AD25
VSS_35
AD49
VSS_36
AE12
VSS_37
AE33
VSS_38
AE38
VSS_39
AE4
VSS_40
AE46
VSS_41
AF22
VSS_42
AF25
VSS_43
AF28
VSS_44
AG1
VSS_45
AG22
VSS_46
AG23
VSS_47
AG25
VSS_48
AG27
VSS_49
AG28
VSS_50
AG30
VSS_51
AG49
VSS_52
AH12
VSS_53
AH17
VSS_54
AH33
VSS_55
AH38
VSS_56
AJ19
VSS_57
AJ20
VSS_58
AJ25
VSS_59
AJ27
VSS_60
AJ28
VSS_61
AJ30
VSS_62
AJ31
VSS_63
AK19
VSS_64
AK20
VSS_65
AK25
VSS_66
AK27
VSS_67
AK28
VSS_68
AK30
VSS_69
AK31
VSS_70
AK4
VSS_71
AK46
VSS_72
INTEL_COFFEELAKE_H_P
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
AL12
AL17
AL21
AL24
AL26
AL29
AL33
AL38
AM1
AM18
AM32
AM49
AN12
AN16
AN34
AN38
AP4
AP46
AR12
AR16
AR34
AR38
AT1
AT16
AT18
AT21
AT24
AT26
AT29
AT32
AT34
AT45
AV11
AV39
AW10
AW4
AW40
AW46
B47
B48
B49
BA12
BA14
BA44
BA5
BA6
BB41
BB43
BB9
BC10
BC13
BC15
BC19
BC24
BC26
BC31
BC35
BC40
BC45
BC8
BD43
BE44
BF1
BF2
BF3
BF48
BF49
BG17
BG2
BG22
BG25
BG28
U2001L
BG3
VSS_145
BG33
VSS_146
BG37
VSS_147
BG4
VSS_148
BG48
VSS_149
C12
VSS_150
C25
VSS_151
C30
VSS_152
C4
VSS_153
C48
VSS_154
C5
VSS_155
D12
VSS_156
D16
VSS_157
D17
VSS_158
D30
VSS_159
D33
VSS_160
D8
VSS_161
E10
VSS_162
E13
VSS_163
E15
VSS_164
E17
VSS_165
E19
VSS_166
E22
VSS_167
E24
VSS_168
E26
VSS_169
E31
VSS_170
E33
VSS_171
E35
VSS_172
E40
VSS_173
E42
VSS_174
E8
VSS_175
F41
VSS_176
F43
VSS_177
F47
VSS_178
G44
VSS_179
G6
VSS_180
H8
VSS_181
J10
VSS_182
J26
VSS_183
J29
VSS_184
J4
VSS_185
J40
VSS_186
J46
VSS_187
J47
VSS_188
J48
VSS_189
J9
VSS_190
K11
VSS_191
K39
VSS_192
M16
VSS_193
M18
VSS_194
M21
VSS_195
INTEL_COFFEELAKE_H_P
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
M24
M32
M34
M49
M5
N12
N16
N34
N35
N37
N38
P26
P29
P4
P46
R12
R16
R26
R29
R3
R34
R38
R4
T17
T18
T32
T4
T49
T5
T7
U12
U15
U17
U21
U24
U33
U38
V20
V22
V4
V46
W25
W27
W28
W30
Y10
Y12
Y17
Y33
Y38
Y9
U2001J
RSVD7
RSVD8
RSVD6
RSVD5
RSVD3_2
RSVD4
RSVD2_3
RSVD1_4
PREQ#
PRDY#
CPU_TRST#
TRIGGER_OUT
TRIGGER_IN
INTEL_COFFEELAKE_H_P
Y14
Y15
U37
U35
N32
R32
AH15
AH14
AL2
AM5
AM4
AK3
AK2
XDP_PREQ#
XDP_PRDY#_PCH
XDP_TRST#_PCH
PCH_TRIGGER_CPU_X1
21
R2702@
0402
1 2
R2701 30Ohm
XDP_PREQ# [6]
XDP_PRDY# [6]
XDP_TRST_CPU# [6]
PCH_TRIGGER_CPU [6]
CPU_TRIGGER_PCH [6]
GND GND GND GND
Project Name
GX502GX
Title :
PCH-CPT(8)_POWER,GND
Size
Dept.:
B
Date: Sheet
Monday, February 18, 2019
ASUSTeK COMPUTER
Engineer:
Rev
R1.2
EE
99
of
27
SPI Power
EC(SMB1)
SMB1_CLK[30,35]
SMB1_DAT[30,35]
EC(SMB3)
SMB3_CLK[30]
SMB3_DAT[30]
R2847
2 1
0402
@
+12VS
2
61
5
EM6K1-G-T2R
Q2803A
34
EM6K1-G-T2R
Q2803B
2
61
5
EM6K1-G-T2R
Q2804A
34
EM6K1-G-T2R
Q2804B
PH power must check(need follow SMART AMP & PD)
N/A
61
1 2
EM6K1-G-T2R
Q2802A
@
+3VSUS
2
R28010Ohm
N/A
34
1 2
1st SPI ROM
PCH
SML1_CLK [20]
SML1_DAT [20]
RN2802B
4.7KOhm
3 4
PH power must check(need follow SMART AMP & PD)
RN2803B
4.7KOhm
3 4
5
EM6K1-G-T2R
Q2802B
@
R28030Ohm
1018 Heath checked with VC change to
100k, 571182 CNL_PCH_H_EDS
EC_SCE#_PCH[30]
EC_SO_PCH[30]
HDIO2_SPI[7,24]
SPI_CS#0_SPI[24]
SPI_SO_SPI[24]
+3VS+12VS
RN2802A
4.7KOhm
1 2
+3VSUS
RN2803A
4.7KOhm
1 2
1st: 05006-00090900 FLASH MXIC MX25L12873FM2I-10G 128M SOP-8L
2nd: 05006-00093100 FLASH GD25B127DSIGG IGADEVICE 128MB SOP8
12
1
BIOS_WP#
1
1
T2803 @
T2802 @
T2801 @
U2802
1
CS#
2
SO/SIO1
3
WP#/SIO2
4
GND1
MX25L12873FM2I-10G
05006-00090900
(128Mb)
VCC
NC/SIO3
SCLK
SI/SIO0
R2842 @
0402
R2840 @
0402
R2841 @
0402
100KOhm
R2833
21
21
21
SMBus InterfaceSystem Management Interface
SMB_CLK[20]
SMB_SDA[20]
CPU,VGA Thermal Sensor
SMB1_CLK_S [48,50,77,78]
SMB1_DAT_S [48,50,77,78]
SMART AMP & PD
SMB3_CLK_AMP [12,39]
SMB3_DAT_AMP [12,39]
61
8
7
6
5
T2806@
T2805@
T2804@
EM6K1-G-T2R
Q2801A
2
+3VM_SPI+3VM_SPI+3VSUS
R2831
100KOhm
BIOS_HOLD#
1
1
1
+12VS +3VS
5
34
EM6K1-G-T2R
Q2801B
12
12
C2802
0.1UF/16V
R2839 @
R2837 @
R2838 @
12
R2816
Refer to CFL_MOW_WW34(Doc.571006)
For Glitch Free Operation During Boot Process.
100KOhm
0911
GND
RN2801B
4.7KOhm
3 4
Main Board
EC_SCK_PCH [30]
EC_SI_PCH [30]
21
0402
0402
0402
HDIO3_SPI [24]
21
SPI_CLK_SPI [24]
21
SPI_SI_SPI [7,24]
RN2801A
4.7KOhm
1 2
SO-DIMM & ESSPCH
SMB_CLK_S [16,37]
SMB_DAT_S [16,37]
20181202 add for power
+3VS
+12VS
RN2804B
RN2804A
4.7KOhm
4.7KOhm
@
@
3 4
1 2
2
P_SMB0_CLK[30,60,69,89,90]
P_SMB0_DAT[30,60,69,89,90]
61
Q2805A
EM6K1-G-T2R
5
@
34
Q2805B
EM6K1-G-T2R
@
SwitchEC(SMB0)
P_SMB0_CLK_S [90]
P_SMB0_DAT_S [90]
Size
Dept.:
Monday, February 18, 2019
PCH-SPI ROM,OTH
ASUSTeK COMPUTER
Project Name
Engineer:
Title :
Custom
Date: Sheet
Rev
R1.2GX502GX
EE
99
of
28
Main Board
Project Name
Title :
TEST POINT
Size
Dept.:
B
Date: Sheet
ASUSTeK COMPUTER
Monday, February 18, 2019
Engineer:
Rev
R1.2GX502GX
EE
99
of
29
Keyboard Connector
www.teknisi-indonesia.com
+5VSUS
J3101
37
38
12018-00960000
SIDE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
SIDE2
FPC_CON_36P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
C3120 0.1UF/16V N/A
KSO15
KSO14
KSO12
KSO10
KSO11
KSO6
KSO8
KSO4
KSO2
KSO5
KSO13
KSI0
KSI3
KSO1
KSI2
KSI4
KSO3
KSI5
KSI6
KSO9
KSI7
KSI1
KSO0
KSO7
12
CAP_LED_CON# [56]
Gaming_center# [35]
Mic_mute# [35]
Volume_up# [35]
Volume_down# [35]
GND
KSO[15:0] [35]
KSI[7:0] [35]
GND
For EMI
D3102
1
1
GND
2
2
3
3
AZ21
15-05C
D3101
1
1
2
2
3
3
AZ21
15-05C
D3104
1
1
2
2
3
3
AZ21
15-05C
D3105
1
1
2
2
3
3
AZ21
15-05C
D3106
1
1
2
2
3
3
AZ21
15-05C
KSO5
KSO2
KSI6
KSI5 KSO3
KSO7
KSO0
KSO11
KSO10
KSO1
KSI3
6
6
5
5
4
4
/EMI
6
6
5
5
4
4
/EMI
6
6
5
5
4
4
/EMI
6
6
5
5
4
4
/EMI
6
6
5
5
4
4
/EMI
KSO4
KSO8
KSO6
KSI2
KSI4
KSI1
KSI7
KSO9
KSO12
KSO14
KSO15
KSO13
KSI0
Gaming_center#
Mic_mute#
Volume_up#
Volume_down#
C3163 4700PF/50V
1 2
C3164 4700PF/50V
1 2
C3166 4700PF/50V
1 2
C3165 4700PF/50V
1 2
Main Board
GND
+3VS +3VS_TPCON
L3101
2 1
120Ohm/100Mhz
Irat=600mA
CPAD_INT#
TVM0G5R5M101R001 @
GND
12
C3116
0.1UF/16V
GND
I2C1_SCL I2C1_SDA
12
C3113
GND GND
12
D3109
AZ5325-01F
TP Connector
J3105
I2C1_SDA[25]
I2C1_SCL[25]
CPAD_INT#[25]
+3VS_TPCON
T3133@
I2C1_SDA
I2C1_SCL
1
CPAD_INT#
LID_SW#_TP
6
5
4
3
2
1
FPC_CON_6P
12018-00162400
GND
EMI Reserve
如要上件請確認容值(選擇Pico等級)
12
D3110
AZ5325-01F
I2C1_SCL I2C1_SDA
C3161
0.1UF/6.3V
1 2
@/EMI
GND GND
0.1UF/6.3V
C3162
@/EMI
SIDE2
6
5
4
3
2
17SIDE1
8
GND
1 2
<Core Design>
Title :
ASUSTeK COMPUTER
Size Project Name
Custom
Date: Sheet
Engineer:
KBC_KB & TP
EE
31 99Monday, February 18, 2019
Rev
R1.2GX502GX
of
+3VA_EC
R3204 100KOhm
D3202
3
BA
T54CTB
1 2
2
1
IT8752 has built-in level detec�on for
power-on reset circuit
Main Board
Thermal Policy
CPU_THERM#[50,77]
DGPU_THERML_SHDWN#[70,78]
PWR_SW#[7,30,56]
12
R3218
0Ohm
R3211
21
U3201_3V
@
0402
R3207
21
@
0402
R3224 0Ohm
PLT_RST#[24]
THERM#_S
1 2
+3VA_RTC+3VA
12
R3217
0Ohm
@
06004-01330000
1
T3202
@
U3201
1
VDD
2
THERM#
3
Power_SW#
SLG4E42553VTR
1 2
R3223 0Ohm
C3201
1UF/6.3V
8
PS_ON
RTC_RST#
GND
7
6
5
EC_RST#
PLT_RST#
4
12
C3204
12
0.1UF/6.3V
R3206 10KOhm
R3222 0Ohm
RTC_RST#_U3201
1 2
1 2
R3220
100KOhm
EC_RST# [30]
R3221 0Ohm
+3VA
12
+3VA
12
61
2
Press PWR_SW# 14s clear EC
PS_ON_EC [30]
PS_ON [57,88]
1 2
@
R3214
1MOHM
EM6K1-G-T2R
Q3205A
1 2
RTC_RST#_S
5
C3206
0.01UF/16V
34
EM6K1-G-T2R
Q3205B
D3201
1
3
2
BA
T54CTB
Press PWR_SW# 20s clear RTC
SRTC_RST# [20]
RTC_RST# [20]
<Core Design>
Title :
ASUSTeK COMPUTER
Size Project Name
Custom
Date: Sheet
Engineer:
RST_Reset Circuit
EE
of
32 99Monday, February 18, 2019
Rev
R1.2GX502GX
Main Board
33/34 pin ground pad
need ground via
L_TRDP0[34]
L_TRDM0[34]
L_TRDP1[34]
L_TRDM1[34]
L_TRDP2[34]
L_TRDM2[34]
L_TRDP3[34]
L_TRDM3[34]
EMI Reserve
LAN_RST#
12
GND
L_TRDP3
L_TRDM3
C3301
1000PF/50V
N/A
GND
+1V_LAN
R3305
1 2
2.49KOhm
U3301
1
2
3
4
5
6
7
8
RTL8111H-CG
02043-00091100
+3VSUS_LAN
MDIP0
MDIN0
AVDD10_1
MDIP1
MDIN1
MDIP2
MDIN2
AVDD10_2
+3VSUS_LAN
+1V_LAN
X2_LAN
28
30
31
32
33
RSET
GND134GND2
CKXTAL129CKXTAL2
AVDD10_3
AVDD33_2
MDIP310MDIN311AVDD33_112CLKREQB13HSIP14HSIN15REFCLK_P16REFCLK_N
9
X1_LAN
27
LED0
25
26
LED2
LED1/GPO
1
REGOUT
VDDREG
DVDD10
LANWAKEB
ISOLATEB
PERSTB
HSON
HSOP
The distance from U3301.24 to L3301 within 200 mil.
The distance from L3301 to C3347 within 200 mil.
T3301TPC26T @
C3304
12
0.1UF/25V
GND
24
23
REGOUT_60
22
VDD_REG
21
20
19
ISOLATEB
18
LAN_RST#
17
PCIE15_RXN_GLAN_X1
PCIE15_RXP_GLAN_X1
PCIE15_TXN_GLAN_X1
PCIE15_TXP_GLAN_X1
CLKREQ_GLAN#, PCIE_WAKE#
should be PU on the host side
1 2
R3301 0Ohm
/LDO
21
SL3303@
0805
21
SL3302@
0402
C3334 0.1UF/25V
1 2
C3335 0.1UF/25V
1 2
C3350 0.1UF/25V
1 2
C3351 0.1UF/25V
1 2
+1V_LAN
60 mil
+3VSUS_LAN
+1V_LAN
PCIE_WAKE# [20,40,41,53,70]
BUF_PLT_RST# [24,30,37,40,41,53,69,70]
PCIE15_RXN_GLAN [21]
PCIE15_RXP_GLAN [21]
CLK4_PCIE_GLAN# [22]
CLK4_PCIE_GLAN [22]
PCIE15_TXN_GLAN [21]
PCIE15_TXP_GLAN [21]
CLKREQ4_GLAN# [22]
ISOLATEB
+3VS
GND
07G010272501
X3301
25.00MHZ
12
R3307
1KOhm
12
R3322
15KOhm
X1_LAN X2_LAN
X3301: 25MHZ +/-30ppm/10pF (3225)
1st: P/N:07G010272501 TXC/7V2500001
1 3
12
GND GND GND
C3306
10PF/50V
2
4
+/-30ppm/10PF
1
12
C3307
10PF/50V
2nd: P/N:07G010952500 HOSONIC/E3FB25
Realtek suggests 3V_LAN raise time >1ms
+3VSUS
SL3301
0603
@
21
E_3VSUS_LAN_20
+3VSUS_LAN
12
C3302
4.7UF/10V
pi32 pin11
GND
12
C3303
4.7UF/10V
12
C3342
0.1UF/25V
pi32 pin11
12
C3341
0.1UF/25V
+1V_LAN+3VSUS_LAN
12
12
C3326
0.1UF/25V
pin3 pin8 pin22 pin30 pin22
C3327
0.1UF/25V
12
C3328
0.1UF/25V
12
C3336
0.1UF/25V
GND
12
C3346
1UF/6.3V
@
VDD_REG
12
C3305
0.1UF/25V
GND
12
C3308
0.1UF/25V
Q3304
QM3002V
1
6
D
2
5
S
4
3
G
@
12
R3331
200KOhm
@
GND GND
Title :
LAN RTL8111GUX-CG
Size
Dept.:
B
Date: Sheet
Monday, February 18, 2019
ASUSTeK COMPUTER
12
C3355
0.1UF/25V
@
Project Name
R3328
1 2
100KOhm
@
Engineer:
+12VSUS
EE
33
Rev
R1.2GX502GX
99
of
C3401
L_TRDM3_SL
1 4
20171106 Heath modify
U3401
1
L_TRDM3[33]
L_TRDP3[33]
L_TRDM2[33]
L_TRDP2[33]
L_TRDM1[33]
L_TRDP1[33]
L_TRDM0[33]
L_TRDP0[33]
L_TRDM3
L_TRDP3
L_TRDM2
L_TRDP2
L_TRDM1
L_TRDMP1
L_TRDM0
L_TRDP0
GND
IN0_P
2
IN0_N
3
IN1_P
4
IN1_N
5
IN2_P
6
IN2_N
7
IN3_P
8
IN3_N
@
9
GND_VIA1
10
GND_VIA2
nbs_empass_ecmf_16p_4v_007;nbs_empass_ecmf_16p_4v_007_t;nbs_empass_ecmf_16p_4v_007_b
OUT0_P_1
OUT0_P_2
OUT0_P_3
OUT0_N_1
OUT0_N_2
OUT0_N_3
OUT1_P_1
OUT1_P_2
OUT1_P_3
OUT1_N_1
OUT1_N_2
OUT1_N_3
OUT2_P_1
OUT2_P_2
OUT2_P_3
OUT2_N_1
OUT2_N_2
OUT2_N_3
OUT3_P_1
OUT3_P_2
OUT3_P_3
OUT3_N_1
OUT3_N_2
OUT3_N_3
GND_VIA3
GND_VIA4
11
11_1
11_2
12
12_1
12_2
13
13_1
13_2
14
14_1
14_2
15
15_1
15_2
16
16_1
16_2
17
17_1
17_2
18
18_1
18_2
19
20
GND
L_TRDP3_SL
L_TRDM2_SL
1 4
L_TRDP2_SL
L_TRDM1_SL
1 4
L_TRDP1_SL
L_TRDM0_SL
1 4
L_TRDP0_SL
2 3
2 3
2 3
2 3
TRDM3
L3401
800Ohm/100Mhz
TRDP3
TRDM2
L3402
800Ohm/100Mhz
TRDP2
TRDM1
L3403
800Ohm/100Mhz
TRDP1
TRDM0
L3404
800Ohm/100Mhz
TRDP0
0.1UF/16V
C3402
0.1UF/16V
C3403
0.1UF/16V
C3404
0.1UF/16V
C3405
0.1UF/16V
C3406
0.1UF/16V
C3407
0.1UF/16V
C3408
0.1UF/16V
12
L3405
1700Ohm/100Mhz
1 4
12
12
12
12
12
12
12
2 3
L3406
1700Ohm/100Mhz
1 4
2 3
L3407
1700Ohm/100Mhz
1 4
2 3
L3408
1700Ohm/100Mhz
1 4
2 3
GND
L_TRLM3_L
L_TRLP3_L
L_TRLM2_L
L_TRLP2_L
L_TRLM1_L
L_TRLP1_L
L_TRLM0_L
L_TRLP0_L
LAN Connector
L_TRLM3_L
L_TRLP3_L
L_TRLM1_L
L_TRLM2_L
L_TRLP2_L
L_TRLP1_L
L_TRLM0_L
L_TRLP0_L
J3402
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
LAN_JACK_8P
12014-00692000
Main Board
10
P_GND2
12
NP_NC2
11
NP_NC1
9
P_GND1
GND
L_TRDM3
L_TRDP3
L_TRDM2
L_TRDP2
U3402
1
2
3
4
5
AZ1023-04F
Line-1
Line-2
GND
Line-3
Line-4
.R7G
U3403
1
9
NC4
8
NC3
NC2
NC1
L_TRDM3
7
L_TRDP3
6
L_TRDM2
L_TRDP2
L_TRDM1
L_TRDP1
L_TRDM0
L_TRDP0
GNDGND
2
3
4
5
AZ1023-04F
Line-1
Line-2
GND
Line-3
Line-4
.R7G
9
NC4
8
NC3
NC2
NC1
L_TRDM1
7
L_TRDP1
6
L_TRDM0
L_TRDP0
D3401,D3402 ESD Diode
1st Source: P/N:07024-00200200 AMAZING/AZC099-04SP.R7G
2nd Source: P/N:07024-00710000 NXP/PUSB2X4D
Title :
LAN_RJ45_CON
Size
Dept.:
B
Date: Sheet
Monday, February 18, 2019
Project Name
ASUSTeK COMPUTER
Engineer:
Rev
R1.2GX502GX
EE
34
99
of
GND GND
AA12
AA29
AA30
AB33
AB34
AC1
AC12
AC2
AC3
AC37
AC38
AC4
AC5
AC6
AD10
AD11
AD12
AD29
AD30
AD6
AD8
AD9
AE33
AE34
AF12
AF13
AF14
AG10
AG11
AG13
AG29
AG30
AG6
AG7
AG8
AH12
AH33
AH34
AH35
AH36
AH6
AJ13
AJ37
AJ38
AK29
AK30
A10
A12
A16
A18
A20
A22
A24
A26
A28
A30
A6
A9
AB6
AE6
AF1
AF2
AF3
AF4
AJ1
AJ2
AJ3
AJ4
AJ5
AJ6
W4
W5
Y10
Y11
Y13
Y14
Y37
Y38
Y7
Y8
Y9
U0301F
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
6 OF 13
COFFEE_LAKE_H
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
AK4
AL10
AL12
AL14
AL33
AL34
AL4
AL7
AL8
AL9
AM1
AM12
AM2
AM3
AM37
AM38
AM4
AM5
AN12
AN29
AN30
AN5
AN6
AP10
AP11
AP12
AP33
AP34
AP8
AP9
AR1
AR13
AR14
AR2
AR29
AR3
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AR4
AR5
AT29
AT30
AT6
AU10
AU11
AU12
AU33
AU34
AU6
AU7
AU8
AU9
AV37
AV38
AW1
AW12
AW2
AW29
AW3
AW30
AW4
U6
V12
V29
V30
A14
AD7
V6
W1
W12
W2
W3
W33
W34
U0301G
AW5
VSS_163
AY12
VSS_164
AY33
VSS_165
AY34
VSS_166
B9
VSS_167
BA10
VSS_168
BA11
VSS_169
BA12
VSS_170
BA37
VSS_171
BA38
VSS_172
BA6
VSS_173
BA7
VSS_174
BA8
VSS_175
BA9
VSS_176
BB1
VSS_177
BB12
VSS_178
BB2
VSS_179
BB29
VSS_180
BB3
VSS_181
BB30
VSS_182
BB4
VSS_183
BB5
VSS_184
BB6
VSS_185
BC12
VSS_186
BC13
VSS_187
BC14
VSS_188
BC33
VSS_189
BC34
VSS_190
BC6
VSS_191
BD10
VSS_192
BD11
VSS_193
BD12
VSS_194
BD37
VSS_195
BD6
VSS_196
BD7
VSS_197
BD8
VSS_198
BD9
VSS_199
BE1
VSS_200
BE2
VSS_201
BE29
VSS_202
BE3
VSS_203
BE30
VSS_204
BE4
VSS_205
BE5
VSS_206
BE6
VSS_207
BF12
VSS_208
BF33
VSS_209
BF34
VSS_210
BF6
VSS_211
BG12
VSS_212
BG13
VSS_213
BG14
VSS_214
BG37
VSS_215
BG38
VSS_216
BG6
VSS_217
BH1
VSS_218
BH10
VSS_219
BH11
VSS_220
BH12
VSS_221
BH14
VSS_222
BH2
VSS_223
BH3
VSS_224
BH4
VSS_225
BH5
VSS_226
BH6
VSS_227
BH7
VSS_228
BH8
VSS_229
BH9
VSS_230
T2
VSS_231
T3
VSS_232
T33
VSS_233
T34
VSS_234
T4
VSS_235
T5
VSS_236
T7
VSS_237
T8
VSS_238
T9
VSS_239
U37
VSS_240
U38
VSS_241
BJ12
VSS_242
BJ14
VSS_243
7 OF 13
GND GND
COFFEE_LAKE_H
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
BJ15
BJ18
BJ22
BJ25
BJ29
BJ30
BJ31
BJ32
BJ33
BJ34
BJ35
BJ36
BK13
BK14
BK15
BK18
BK22
BK25
BK29
BK6
BL13
BL14
BL18
BL19
BL20
BL21
BL22
BL29
BL33
BL35
BL38
BL6
BM11
BM12
BM13
BM14
BM18
BM2
BM21
BM22
BM23
BM24
BM25
BM26
BM27
BM28
BM29
BM3
BM33
BM35
BM38
BM5
BM6
BM7
BM8
BM9
BN12
BN14
BN18
BN19
BN2
BN20
BN21
BN24
BN29
BN30
BN31
BN34
P38
P6
R12
R29
AY14
BD38
R30
T1
T10
T11
T12
T13
T14
U0301H
BN4
VSS_325
BN7
VSS_326
BP12
VSS_327
BP14
VSS_328
BP18
VSS_329
BP21
VSS_330
BP24
VSS_331
BP25
VSS_332
BP26
VSS_333
BP29
VSS_334
BP33
VSS_335
BP34
VSS_336
BP7
VSS_337
BR12
VSS_338
BR14
VSS_339
BR18
VSS_340
BR21
VSS_341
BR24
VSS_342
BR25
VSS_343
BR26
VSS_344
BR29
VSS_345
BR34
VSS_346
BR36
VSS_347
BR7
VSS_348
BT12
VSS_349
BT14
VSS_350
BT18
VSS_351
BT21
VSS_352
BT24
VSS_353
BT26
VSS_354
BT29
VSS_355
BT32
VSS_356
BT5
VSS_357
C11
VSS_358
C13
VSS_359
C15
VSS_360
C17
VSS_361
C19
VSS_362
C21
VSS_363
C23
VSS_364
C25
VSS_365
C27
VSS_366
C29
VSS_367
C31
VSS_368
C37
VSS_369
C5
VSS_370
C8
VSS_371
C9
VSS_372
D10
VSS_373
D12
VSS_374
D14
VSS_375
D16
VSS_376
D18
VSS_377
D20
VSS_378
D22
VSS_379
D24
VSS_380
D26
VSS_381
D28
VSS_382
D3
VSS_383
D30
VSS_384
D33
VSS_385
D6
VSS_386
D9
VSS_387
E34
VSS_388
E35
VSS_389
E38
VSS_390
E4
VSS_391
E9
VSS_392
N3
VSS_393
N33
VSS_394
N34
VSS_395
N4
VSS_396
N5
VSS_397
N6
VSS_398
N7
VSS_399
N8
VSS_400
N9
VSS_401
P12
VSS_402
P37
VSS_403
M14
VSS_404
M6
VSS_405
N1
VSS_406
F11
VSS_407
F13
VSS_408
COFFEE_LAKE_H
8 OF 13
GND GND
VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479
VSS_A3
VSS_A34
VSS_A4
VSS_B3
VSS_B37
VSS_BR38
VSS_BT3
VSS_BT35
VSS_BT36
VSS_BT4
VSS_C2
VSS_D38
F15
F17
F19
F2
F21
F23
F25
F27
F29
F3
F31
F36
F4
F5
F8
F9
G10
G12
G14
G16
G18
G20
G22
G23
G24
G26
G28
G4
G5
G6
G8
G9
H11
H12
H18
H22
H25
H32
H35
J10
J18
J22
J25
J32
J33
J36
J4
J7
K1
K10
K11
K2
K3
K38
K4
K5
K7
K8
K9
L29
L30
L33
L34
M12
M13
N10
N11
N12
N2
BT8
BR9
A3
A34
A4
B3
B37
BR38
BT3
BT35
BT36
BT4
C2
D38
Main Board
Project Name
Title :
CPU_CFG,RSVD,GND
Size
Dept.:
B
Date: Sheet
Monday, February 18, 2019
ASUSTeK COMPUTER
Engineer:
Rev
R1.2GX502GX
EE
99
of
5
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