Asus B1A Service Manual A7
B1A Internal BIOS Specification
T
Software Specifications
Get to know more about the B1 Series Notebook
with a detailed look at the software specifications.
he information contained in the chapter can be quite useful when you
are troubleshooting the system’s hardware. Each item has its
7
individual usage for you to understand the software side of the
notebook’s architecture.
B1A Internal BIOS Specification
Content
1. Introduction................................................................................................................ 1
2. Hardware Overview...................................................................................................2
2.1 Chipset Strapping............................................................................................. 5
2.2 Multiplex Pin Assignment................................................................................5
2.3 General Purpose Pin Usage..............................................................................8
2.4 Connections of System Management Bus .....................................................11
2.5 Connections of Power Management Control Pins......................................... 11
3. Configuration of PCI Devices..................................................................................12
4. Functions of Embedded Controller..........................................................................13
4.1 Host Interface and Command Set .............................. 錯誤! 尚未定義書籤。
4.1 Fast Button and Function Hot Key Events ............................................................13
4.2 Power Management Events............................................................................15
4.2.1 Thermal Control..................................................................................15
4.3 LED Control...................................................................................................18
5. M-Mode Control Mechanism ..................................................................................19
6. Power Management .................................................................................................19
6.1 APM and Legacy PM.....................................................................................20
6.1.1 Common Settings................................................................................ 20
6.1.2 Full On Sate ........................................................................................21
6.1.3 Standby Sate........................................................................................21
6.1.4 Suspend To RAM Sate........................................................................ 21
6.1.5 Suspend To Disk Sate .........................................................................21
6.2 ACPI...............................................................................................................21
6.2.1 ACPI-Enabling Initialization ..............................................................22
6.2.2 ACPI-Disabling Initialization ............................................................. 22
6.2.3 Thermal Control..................................................................................22
6.2.4 Control Method Battery ......................................................................22
6.2.5 Control Method Sleep Button .............................................................22
6.2.6 Methods for Proprietary On-Screen Display Utility...........................22
7. Callback Services for nVidia’s VGA BIOS ............................................................. 22
8. Clock Generator Setting...........................................................................................23
9. Setup Menu ..............................................................................................................24
10. Reference ...............................................................................................................24
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B1A Internal BIOS Specification
1. Introduction
B1A is a high-performance/2-spindles/Balanced Mobility notebook PC supporting
1GHz P-III level or above socket uPGA2 CPUs. The major features of B1A system
BIOS support following industry specifications:
Advanced Configuration and Power Interface Specification, Revision 2.0
Advanced Power Management (APM) BIOS Interface Specification, Revision
2.0
Plug and Play BIOS Specification, Version 1.0A
PCI BIOS Specification, Revision 2.0
System Management BIOS Reference Specification, Version 2.3
System Management Bus BIOS Interface Specification, Revision 1.0
PC 2001 System Design Guide, Version 1.0
Additionally, it’s also in compliance with all other standards and specifications of PC
industry if not specifically indicated. Table 1 shows the summary of the B1A BIOS
features.
Table 1. The Features of System BIOS
Item Description
BIOS Vendor AWARD
BIOS Size 256 KB
CPU / Cache Automatic frequency and cache size detection; host clock and
VID adjusting.
DRAM Auto-sizing and SPD detection support.
HDD/CDROM 4-drive, FDMA, UDMA, fast PIO, block PIO, 32-bit IO,
SMART disk, and INT 13 extensions support; automatic model
typing, size detection, and parameters setting (drive geometry,
transfer mode, block size, LBA); bootable CDROM.
FDD 3 mode floppy disk support; floppy disk seek disable.
Booting Quiet boot; quick boot; multi-boot from HDD, FDD, CDROM,
USB devices, and 1394 peripheral; boot sequence control.
Display Automatic LCD/CRT presence detection.
Keyboard Numlock power-on state and typematic rate/delay setting;
US/JP/EU keyboards support.
PS/2 mouse Support.
Parallel port Enhanced parallel port (EPP) support for network adapters.
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B1A Internal BIOS Specification
Security 2-level password control, quick lock FDD access control, HDD
boot sector protection, and virus check reminder message.
Smart card reader and Finger Print authentication as optional for
security at BIOS booting and file encryption and description
PnP Legacy ISA, PnP ISA and PCI devices auto-configuration; PnP
ISA and PCI run-time BIOS services support.
APM Full on, standby, suspend-to-RAM, and suspend-to-disk power
management modes support; run-time BIOS services support.
ACPI C0, C1, C2, C3, S0, S1, S3, S4, S4BIOS, and S5 power
management modes, control method battery, proprietary
on-screen display utility support.
SMBus SMBus run-time BIOS services providing APs and O.S. to
access SPD EPROMs of SO-DIMM modules via 1st SMBus
interface of VT8231 ( south bridge)
SMB System Management BIOS v.2.3 support.
M-Mode Dynamically change host clock of CPU and Memory clock or
even Video clock.
Others Daylight savings time; Fast A20; 32-bit BIOS services; graphic
setup menu (English only).
The audience for this document includes system BIOS, embedded controller firmware,
and platform hardware designers.
2. Hardware Overview
The components of B1A platform and their features are listed in the following table.
Table 2. Component List
Component Features Remark
CPU - PIII (1) Socket uPGA2
(2) > 1GHz
Core Chip
(NB) – Twister
Core Chip
(SB) – VT8231
(1) 66/100/133 MHz, 64 Bit CPU FSB
(2) 66/100/133 MHz, 64 Bit SDR/VCM
SDRAM: supports 8 banks up to 4GB
(512Mb x8/x16 tech.), mixed 1M / 2M / 4M
/ 8M / 16M / 32M / 64MxN DRAMs
(1) Integrated Peripheral Controllers:
Dual UDMA-33/66/100 EIDE
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Supports SDR only
B1A Internal BIOS Specification
VGA –
Embedded
VGA
Root Hub & 4 USB Ports
1/10/100 Mb Ethernet
AC ’97 Audio/Modem Interfaces
Digital Audio
LPC Interface
SMB Interface
Hardware Monitor
(2) Integrated Legacy Functions:
KBC w/ PS2 mouse support
RTC w/ 256 byte CMOS RAM
DMA, Timer, & Interrupt Controllers
Serial IRQ
Fast reset and Gate A20
(1) Full internal 4x AGP performance
(2) 128 bit 3D & 2D graphic accelerator
(3) Supports up to 3 display interfaces: LCD,
CRT, and TV out
NOT USED
NOT USED
Audio –
VT8231
AC-Link
interface and
Cirrus CS4299
audio CODEC
CardBus –
(4) Dual CRT/Simultaneous dual display
(5) Supports 8 to 32 MB frame buffer using
system memory
(6) Supports S3 DX7 texture compression
(S3TC)
(7) Support resolution up to 1920x1440
(1) SoundBlaster PRO Hardware and Direct
Sound Ready AC97 Digital Audio
Controller compatible
(2) 32 bytes FIFO of each direct sound channel
(3) Standard V1.0 or V.2.0 AC97 Codec
Interface
(4) Hardware assisted FM synthesis
(5) 1 MPU-401 port and 2 game ports
(6) Built-in HSP modem interface
(7) Support 4.1, 5.1, & 4/6 speaker modes
(1) Built-in Smart Card controller supports ISO
OZ711E1
7816-1, -2, -3 smart cards and PC/SC, open
card, and CT-API (B1) standards
(2) Automatically senses whether a PC card or
smart card is inserted
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B1A Internal BIOS Specification
1394 –
TSB43LV22
Super I/O –
VT8231
EC – NS87591
(Voyager)
(1) Full P1394a support
(2) Fully Interoperable with FireWire and
i.LINK implementation of IEEE std 1394
(3) 2 P1394a cable ports at 100/200/400 Mb/s
(1) LPC system interface
(2) Built-in functions include FDC, parallel
port, 2 serial ports (one w/ Fast IR),
Watchdog Timer, interrupt serializer, &
wake-up control
(1) LPC system interface, 2MB address space,
128 KB on-chip flash, & 4KB on-chip
RAM
(2) 8042 KBC standard interface (60h/64h) and
ACPI PM interface support (62h/66h)
(3) Provides 4 PS/2 channels for KBC &
mouse, 2 ACCESS.bus interfaces, 2
USARTs, 8 PWM outputs, 14 ADC
Wake-up control is
NOT USED
USART is NOT
USED
Battery
Charger –
Max1772
Clock
Generator –
ICS9248-143
CPU VID
Control –
FM3560
LCD Panel
Inverter –
channels, 4 DAC channels, 8 ACM inputs,
up to 32 wake-up inputs, & 84/117 GPIO
pins in 128/176 package
(4) Supports serial IRQ, & voltage/temperature
hardware monitoring
(5) RTC w/ 256 byte CMOS RAM
(1) Compliant with level 2 smart battery
charger specification revision 1.0
(1) Up to 200 MHz support
(2) Spread spectrum for EMI control
(1) 5 bit 2-to-1 multiplexer, 1-bit latch
(2) Used for changing VID when CPU’s
frequency is dynamically changed
(1) 32-level brightness & 256-level contrast
control via SMBus
NOT USED
OZ968
(2) Typical operating frequency ranges from
50KHz to 100 KHz
(3) Brightness output ranges from 0.9v to 2.5v
(level setting 0xFF to 0x00) and contrast
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B1A Internal BIOS Specification
output ranges from 0.8v to 2.8v (level
setting 0x00 to 0xFF)
LCD Panel SAMSUNG and LG 15” XGA/SXGA+
2.1 Chipset Strapping
The chipset strapping pin states of VT8231 PCI-to-ISA Bridge and Twister controller
are shown in table 3 and 4.
Table 3. Strapping Pin State of VT8231
Pin Strapping State Function
SUSA# 1 Select Intel PIII CPU
VGA_SUSP# 0 Only enable 8 bits XD bus
SA16 0 Disable LPC ROM
MCCS# 1 Disable Automatically select CPU host
clock
SYSSPK DEFAULT ISA ROM
SA17 1 Disable auto reboot
Table 4. Strapping Pin State of Twister
Pin Strapping State Function
MA13, 14 By wire cable Panel ID select
MA2 0 Enable INTA
MA3 0 Enable IO access
MA4 0 PCI base address map 0
MA5 0 Set PCI clock to 33MHz
MA6 0 Enable internal GTL pull up
MA7 0 Set VGA at normal mode
MA (12,8) [01] Set the CPU clock at 100MHz
MA9 0 Enable internal PLL clock
MA10 1 Enable quick start mode
MA11 0 Set IOQ level = 4
2.2 Multiplex Pin Assignment
Table 5 shows the assignment of VT8231 multiplex pins. For the usage of Nations
PC87591 embedded controller, please refer to the other document file named
PC87591_GPIOS.xls.
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B1A Internal BIOS Specification
Table 5. Multiplex/Multi-function Pin Assignment of VT8231
Signal Name Pin# I/O Default Used As Register Setting
1
GPI0 F4
GPI1 V3
GPI2 / EXTSMI# W1 I Shared2 EXTSMI#
GPI3 / RING# U3 I Shared SWI#
GPI4 / LID# V2 I Shared NOT USED Pull HIGH
GPI5 / BATLOW# T3 I Shared NOT USED Pull HIGH
GPI6 / PME# U1 I Shared NOT USED Pull HIGH
GPI7 / SMBALRT# T2 I Shared NOT USED Pull HIGH
GPI8 / INTRUDER# F3 I GPI8 ??? NOT USED Pull HIGH
GPI9 / APICCLK Y3 I GPI9 ??? GPI9 ISA_RX58[6]=0
GPI10 / HREQ1# Y11 I GPI10 ??? HREQ1# PM_RXE5[3]=0
GPI11 / HREQ2# V11 I GPI11 ??? HREQ2# PM_RXE5[3]=0
GPI12 / LREQ1# U10 I GPI12 ??? LREQ1# PM_RXE5[2]=0
GPI13 / LREQ2# W10 I GPI13 ??? LREQ2# PM_RXE5[2]=0
GPI14 / WSC# /
V4 I GPI14 ??? WSC# ISA_RX58[7]=1
APICREQ#
GPI15 / LDRQ# /
ACSDIN3
Y8 I GPI15 ??? LDRQ# ISA_RX58[5]=1
PM_RXE5[7]=0
GPI16 / CPUMISS V1 I Shared CPUMISS Pull LOW
GPI17 / AOLGPI /
P3 I Shared THERM# PM_RX40[7]=1
THERM#
GPI18 / GPO18 / FAN2 /
K3 I Shared FAN2 PM_RXE5[0]=0
SLPBTN#
GPI19 / GPO19 /
ACSDIN2
GPO20 / LA20 /
USBOC2#
GPO21 / LA21 /
G5 I GPI19 GPO19 PM_RXE4[5]=1
PM_RXE5[5]=1
W13 I GPI20 USBOC2# PM_RXE4[6]=0
PMIO_RX4E[4]=1
Y13 I GPI21 USBOC3# PM_RXE4[6]=0
USBOC3#
PMIO_RX4E[5]=1
1
NOTE: Dii/Fj/Rxkk means PCI register “kk” of function “j” of device “ii”& PMIOkk means I/O port
offset “kk” relative to the base address of power management I/O base address in which all “ii”, “j”,
and “kk” are hexadecimal values.
2
No register setting is necessary for “shared” pin.
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