Asus A7K Schematics

5
4
3
2
1
D D
LVDS & INV
PAGE 22
CRT
PAGE 23
TV OUT
PAGE 23
DVI
C C
B B
PAGE 24
CIR
PAGE 37
SIR
PAGE 37
KEYPAD MATRIX
PAGE 29
INSTANT KEY
PAGE 50
LED
PAGE 50
ISA
ROM (8MB)
PAGE 29
AMPLIFIER
PAGE 31
SPEAKER or PHONE JACK
PAGE 31
SUPER I/O
ITEIT8712F_IX
PAGE 37
EC IT8511E
MIC AND LINE IN
PAGE 32
CPU VCORE
ATI
M76-M
PAGE 28 29
MDC Conn (RJ11)
PAGE 34
Azalia Codec
ALC 660
PAGE 30
DSP
PAGE 33
SPDIF
PAGE 31
LPC 33MHz
PCIE *16
Azalia
SATA HDD
PAGE 35
PAGE 35
PAGE 35
%/&PSGO(MEKVEQ
HDD
ODD
PAGE 56 7 8
PAGE 11 12 1314
PAGE 17 18 1920
AMD REV.F
H.T 800 MHz 1600MT/s
ATI
RS690M
ALINK 4LANE
ATI
SB600
USB
PAGE 36
PAGE 36
PAGE 22
DDR2-800MHz
PCIE *1
PCIE *1
PCIE *1
PCIE *1
USB 2.0 CON X5
Bluetooth USB
Camera USB
USB
USB
PCI 33MHz
Dual Channel DDR2
SO-DIMM X 2
Up to 2GB DD RII
PAGE 91 0
MINI-PCIE
TV Card
PAGE 40
JMB360 e-SATA
PAGE 49
MINI PCIE
WLAN
PAGE 26
NEW CARD
PAGE 27
CardBus
R5C833
PAGE 38
PCI LAN
PAGE 25
CLOCK GE NERATOR
PAGE 16
LED&SW&T OUCHPAD
PAGE 50
FAN + SENSOR
PAGE 21
DISCHARG E CIRCUIT
PAGE 52
SYSTEM PWR
BAT & CHARGER
1394
PAGE 39
4 in 1 CARD REA DER
PAGE 39
MMC/SD Memory Stick/MS PRO XD
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Block Diagram
Block Diagram
Block Diagram
Rev
Rev
Rev
2 0
2 0
2 0
1 69 14 2007
1 69 14 2007
1 69 14 2007
5
P01.BALOCK DIAGRAM P02.TABLE OF CONTENTS P03.POWER BUDGET P04.CLOCK DISTRIBUTION P05.TURION HT I/F P06.TURION DDR2 MEMORY I/F P07.TURION CNTL/DEBUG/THERM P08.TURION POWER P09.DDR2_SODIMM P10.DDR2_TERMINATIONS
D D
P11.RS690M-HT LINK0 I/F P12.RS690M-PCIE LINK I/F P13.RS690M-SYSTEM I/F&CLKGEN P14.RS690M-POWER P15.BLANK P16.EXTERNAL CLOCK GENERATOR P17.SB600-PCIE/PCI/CPU/LPC P18.SB600-ACPI/GPIO/USB/AC97/AZA P19.SB600-SATA/IDE/HWM/SPI P20.SB600-POWER&DECOUPLING P21.THERMAL FAN CONTROL P22.LVDS AND INVERTER P23.CRT AND TV CONNECTOR P24.DVI P25.PCI LAN P26.MINI PCI-E WLAN P27.NEW CARD P28.EC IT8510TE(1/2) P29.EC IT8510TE(2/2)-ISA ROM P30.ALC660 P31.AMP AND HEADPHONE P32.MIC AND LINE IN
C C
P33.DSP P34.MDC P35.HDD AND ODD P36.USB CONNECTOR AND BT P37.SIO AND SIR P38.CARD BUS R5C832 P39.1394 AND CARD READER P40.MINI PCI-E(TV) P41.M76(1/5)PCI-E I/F P42.M76(2/5)DVI&DAC&DDC&PLL&VID P43.M76(3/5)MEMORY I/F P44.M76(4/5)BLANK P45.M76(5/5)POWER P46.GDDR2 MEMORY(1/2) P47.GDDR2 MEMORY(2/2) P48.BLANK P49.BLANK P50.FUNCTION KEY P51.POWER SEQUENCE P52.DISCHARGE
B B
PCI DEVICES IRQ TABLE
DEVICE
NB VGA
SB
ATA100
AC97/AZALIA
USB
CARD BUS
PCI LAN
SMBUS TABLE
SOURCE SIGNAL NAME LINKED DEVICES
NBSBDAC_SCL/DAC_SDAT CRT/LVDS
EC SMCLK0/SMDAT0 BATTERY
IDSEL# REQ/GNT# PCI INT CLOCK
N/A
AD31(INT)
AD31
AD31
AD30
AD17
AD18
I2C_CLK/I2C_DATA LVDS
I2C_CLK/DDC_DATA DVI
SCLK0/SDATA0
SCLK1/SDATA1
PWR_SW#
PM_PWRBTN#
PM_SUSB# PM_SUSC#
SUSB_ON SUSC_ON
+3VSUS
+1.2VSUS
PM_RSMRST#
V5_REF
+3VS
+1.2VS
+VCORE
VDDC_NB
NB_PWRGD
A A
SB_PWRGD
CPU_PWROK
4
N/A
A
N/AN/A
N/A
N/A
N/A
0
1
SO-DIMMs/CLK_GEN/DSP
MINI-PCIE(WLAN)/NEW CARD/MINI-PCIE(TV)
INT
A
B
INT
INT
D
PCI_CLK0
F,G
PCI_CLK1
E
THERMAL(CPU:98H GPU:4CH)SMCLK1/SMDAT1
T1
T2>20ms
T2A<50ms
T3
T4
T5
T6>15ms
T7=0 T7A
3
2
1
GPIO
STRP_DATA SEL_VCC_NB TUNE NB VOLTAGE OUTPUT
NB
RI#EXTEVNT0#
SB
LPC_PME#/GEVENT3# LPC_SMI#/EXTEVNT1# WAKE#/GEVENT8# GPIO10 GPIO6 GPIO4 GPIO5 GPIO8 GPIO0 LLB#/GPIO66 TEMPIN0 TEMPIN1 GPIO11 GPIO12 GPIO64
ECSMI#/GPM0
EC
ECSCI#/GPD3 SM0 SM1 ADC0/GPK0 ADC2/GPK2 GPK4 GPK5 DAC0/GPJ0 DAC2/GPJ2 GPJ3 PWM1/GPA1 GPA4 GPA5 GPA6 GPA7 GPB0 GPB1 GPB7 GPC0 GPC3 GPC4 GPC5 GPC6 GPC7 RI1#/WUI0/GPD0 RI2#/WUI1/GPD1 GPD4 GPD6 GPE0 GPE1 GPE2 GPE3 PWRSE/GPE4 GPE6 GPE7 PS2CLK2/GPF4 PS2DAT2/GPF5 GPF6 GPF7 GPG4 GPG6 GPG7 GPH0 GPH1 GPH2 GPH3 GPH4 GPH5 GPH6 GPH7 GPI1 GPI3 GPI4 GPI5 GPI6
TBD
PME# LCP_PME# PME TO SB OUTPUT
SIO
KB_SCI# LPC_PME# LPC_SMI# SB_WAKE# BT_DET# BT_LED_EN# 802_LED_EN# CB_HWSUSPEND BT_ON# WLAN_ON# BAT_LL# CPU_THRM NB_THERM SB_THRO_CPU TV_ON# PM_THERM#
EXSMI# EXT_SCI# SM_BAT SMB1 BATO_AD AC_AD KID0 KID1 FAN_DA BRIGHT_PWM BATSEL_2P# FAN_PWM CHG_LED_UP# PWR_LED_UP# BATSEL_3S# BACK_OFF# NUM_LED CAP_LED THRO_CPU DJ_LED# EMAIL_LED# ACIN_OC# OP_SD# BAT_IN_OC# EC_IDE_RST# PM_SUSB# PM_SUSC# RF_OFF_SW# FAN0_TACH EMAIL_SW#
NTERNET# MARATHON# DISTP_SW# PWRSW#_EC LID_EC# BT_ON# TPAD_CLK TPAD_DAT PWRLMT# DJSW# THRM_CPU PMTHERM# AC_APR_UC# VSUS_ON VSUS_GD_EC#
MVPOK# PM_PWRBTN# SUSC_ON SUSB_ON CPU_VRON PM_RSMRST# WATCH_DOG# CHG_EN# PRECHG BAT_LL# BAT_LEARN
KEYBOARD SCI PME FROM SIO SMI FROM EC PCI E WAKE BLUETOOTH DETECT BLUETOOTH LED WIRELESS LAN LED CARDBUS SUPEND BLUETOOTH ENABLE(OP TION) WIRELESS LAN ENABLE BATTERY LOW(OPTION ) CPU TEMPERATURE(OP TION) NB TEMPERATURE CPU OVER TEMP AND S HUT TV ENABLE THERM ALERT FROM E C
SMI TO SB SCI TO SB SMBUS TO BATTERY SMBUS TO THERMAL BATTERY VOLTAGE AC ADAPTER VOLTAGE KEYBOARD ID0 KEYBOARD ID1 FAN CONTROL(OPTION) LCD BRIGHT CONTROL 2P BATTERY FAN CONTROL CHARGE LED POWER LED 3S BATTERY LCD BACK OFF NUM LOCK LED CAP LOCK LED CPU OVER TEMP AND S HUT AUDIO DJ LED EMAIL LED ADAPTER IN AUDIO SHUTDOWN BATTERY IN EC CONTROL IDE RST SB SUSB# IN SB SUSC# IN RF SWITCH OFF FAN TACH EMAIL SWITCH INTERNET SWITCH POWER GEAR DISABLE TOUCHPAD POWER SWITCH LID STATUS IN BLUETOOTH ENABLE TOUCHPAD CLK TOUCHPAD DATA POWER LIMIT DJ SWITCH ALERT FROM THERMAL I C THERM ALERT TO SB ADAPTER POWER OK ENABLE VSUS POWER VSUS OK CPU POWER OK PWRBTN TO SB SUSC ON SUSB_ON ENABLE VCORE SB RSUMRESET WATCH_DOG CONTROL FAN ENABLE CHARGE BATTERY PRECHARGE BATTERY LOW BATTERY LEARN
INPUT INPUT INPUT INPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT INPUT
OUTPUT OUTPUT INPUT
OUTPUT OUTPUT
INPUT INPUT INPUT INPUT OUTPUT OUTPUT INPUT OUTPUT OUTPUT OUTPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT INPUT OUTPUT INPUT OUTPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT OUTPUT
OUTPUT INPUT INPUT OUTPUT INPUT OUTPUT INPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
Title :
Title :
Title :
A7K
A7K
A7K
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Table of Contents
Table of Contents
Table of Contents
Date: Sheet of
Date: Sheet of
Date: Sheet of
Endy Zhang
2 69 14 2007
2 69 14 2007
2 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
A7K POWER ON SEQUENCE BLOCK
A/D_DOCK_IN
D D
AC_BAT_SYS
+5VLCM +2.5VREF
+3VA_EC
+3VA +5VAO
VSUS_ON
1
+3VA_EC
4
3
2
10
47~66ms
1
11
2
PWRSW#_EC
EC
IT8511TE
Power On
SWITCH
8
CPU_VRON
AMD S1g1 CPU
3
+1.2VSUS +3VSUS +5VSUS
4
VSUS_GD_EC#
5
13
16
6
C C
B B
+0.9V +1.8V +3V +5V +12V
+1.2VS +1.5VS +1.8VS +2.5VS +3VS +5VS +12VS
+VCORE
(MAX8760ETL)
+1.2VS_HT
PM_SUSC#
PM_SUSC#
8
CPU_VRON
9
CPUPWR_GD
HTVDD_EN
EC
7
From EC
To EC
SUSC_EC#
SUSB_EC1#
SB600
(South Bridge)
12
CPU_PWROK
15
LDT_RESET#
HT_CPU_STOP#
11
PWRGD
13
A_RST#
RS690M
(North Bridge)
14
10
A A
SYS PWRGD
VLDT_PWRGD
PWRGD Logic
11
PWRGD
PCIRST#
13
A_RST#
PCI Device
(RICOH R5C83 3)
PCIE, LPC Device
(Minicard, Newcard, PCI E LAN, LPC devices)
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Power Budget
Power Budget
Power Budget
3 69 14 2007
3 69 14 2007
3 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
4
3
2
1
D D
TOP SO-DIMM BOT SO-DIMM
HTTCLK0 FS2
SRCLKT1
TURION S1g1 CPU
C C
B B
LGA638 PACKAGE
CPU_CLK_H CPU_CLK_L
200MHZ
SRCLKT6
SRCLKT4
(CLKREQ#B)
SRCLKT2
SRCLKT7
SRCLKT3
KREQ#A)
(CL
SRCLKT0
(CLKREQ#C)
SRCLKT5
FS0
48MHZ_0
48MHZ_1
HTREFCLK
66MHZ
NB_OSC
14.318MHZ
NBGFX_CLK_P NBGFX_CLK_N
100MHZ
NBLINK_CLKP NBLINK_CLKN
100MHZ
GFX_CLK_P GFX
_CLK_N
100MHZ
GPP0_CLK_P GPP0_CLK_N
100MHZ
GPP3_CLK_P GPP3_CLK_N
100MHZ
GPP1_CLK_P GPP1_CLK_N
100MHZ
GPP2_CLK_P GPP2_CLK_N
100MHZ
SBLINK_CLKP SBLINK_CLKN
100MHZ
CLK_14M_SB
14.318MHZ
CLK_48M_USB
48MHZ
SIO_CLK
48MHZ
ATI NB - RS690M
M76-M
MINI PCIE TV
E-SATA
MINI PCI-E WLAN
NEW CARD
ATI SB
SB600
PCI_CLK_CB
33MHZ
PCI_CLK_LAN
33MHZ
LPC_CLK_EC
33MHZ
LPC_CLK_DEBUG
33MHZ
LPC_CLK_SIO
33MHZ
SIO_CLK
48MHZ
CODEC_BCLK
MDC_BCLK
R5C833
PCI LAN
EC IT8511E
NEWCARD FOR DEBUG
SUPER IO IT8712F
ALC660
MDC
24.576MHZ XTAL INPUT
32.768KHZ XTAL INPUT
TPAD_CLK
TOUCHPAD
14.31818MHz
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Clock Distribution
Clock Distribution
Clock Distribution
Rev
Rev
Rev
2 0
2 0
2 0
4 69 14 2007
4 69 14 2007
4 69 14 2007
5
D D
HT_CPU_TX_CLK_H111
+1 2VS_HT
R500 49 9OhmR500 49 9Ohm
1 2
R501 49 9OhmR501 49 9Ohm
1 2
LAYOUT: PLAC E NEAR CPU STUFF WHEN C ONFIGURED AS 16-BIT LINK
C C
HT_CPU_TX_CAD_L[0 15]11
HT_CPU_TX_CAD_H[0 15]11
HT_CPU_TX_CLK_L111 HT_CPU_TX_CLK_H011 HT_CPU_TX_CLK_L011
HT_CPU_TX_CTL_H011 HT_CPU_TX_CTL_L011
4
HT_CPU_TX_CLK_H1 HT_CPU_TX_CLK_L1 HT_CPU_TX_CLK_H0 HT_CPU_TX_CLK_L0
HT_CPU_TX_CTL_H1 HT_CPU_TX_CTL_L1 HT_CPU_TX_CTL_H0 HT_CPU_TX_CTL_L0
HT_CPU_TX_CAD_H15 HT_CPU_TX_CAD_L15 HT_CPU_TX_CAD_H14 HT_CPU_TX_CAD_L14 HT_CPU_TX_CAD_H13 HT_CPU_TX_CAD_L13 HT_CPU_TX_CAD_H12 HT_CPU_TX_CAD_L12 HT_CPU_TX_CAD_H11 HT_CPU_TX_CAD_L11 HT_CPU_TX_CAD_H10 HT_CPU_TX_CAD_L10 HT_CPU_TX_CAD_H9 HT_CPU_TX_CAD_L9 HT_CPU_TX_CAD_H8 HT_CPU_TX_CAD_L8
HT_CPU_TX_CAD_H7 HT_CPU_TX_CAD_L7 HT_CPU_TX_CAD_H6 HT_CPU_TX_CAD_L6 HT_CPU_TX_CAD_H5 HT_CPU_TX_CAD_L5 HT_CPU_TX_CAD_H4 HT_CPU_TX_CAD_L4 HT_CPU_TX_CAD_H3 HT_CPU_TX_CAD_L3 HT_CPU_TX_CAD_H2 HT_CPU_TX_CAD_L2 HT_CPU_TX_CAD_H1 HT_CPU_TX_CAD_L1 HT_CPU_TX_CAD_H0 HT_CPU_TX_CAD_L0
J5
K5
J3 J2
P3 P4 N1 P1
N5 P5 M3 M4
L5 M5 K3 K4 H3 H4 G5 H5
F3
F4 E5
F5
N3 N2
L1 M1
L3
L2
J1 K1 G1 H1 G3 G2 E1
F1 E3 E2
U500A
U500A
L0_CLKIN_H 1 L0_CLKIN_L1 L0_CLKIN_H 0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0
L0_CAD N_H 15 L0_CAD N_L 15 L0_CAD N_H 14 L0_CAD N_L 14 L0_CAD N_H 13 L0_CAD N_L 13 L0_CAD N_H 12 L0_CAD N_L 12 L0_CAD N_H 11 L0_CAD N_L 11 L0_CAD N_H 10 L0_CAD N_L 10 L0_CAD N_H 9 L0_CAD N_L 9 L0_CAD N_H 8 L0_CAD N_L 8
L0_CAD N_H 7 L0_CAD N_L 7 L0_CAD N_H 6 L0_CAD N_L 6 L0_CAD N_H 5 L0_CAD N_L 5 L0_CAD N_H 4 L0_CAD N_L 4 L0_CAD N_H 3 L0_CAD N_L 3 L0_CAD N_H 2 L0_CAD N_L 2 L0_CAD N_H 1 L0_CAD N_L 1 L0_CAD N_H 0 L0_CAD N_L 0
SOCKET638
SOCKET638
L0_CADOUT _H15 L0_CADOUT _L15 L0_CADOUT _H14 L0_CADOUT _L14 L0_CADOUT _H13 L0_CADOUT _L13 L0_CADOUT _H12 L0_CADOUT _L12 L0_CADOUT _H11 L0_CADOUT _L11 L0_CADOUT _H10 L0_CADOUT _L10
HYPERTRAN SPORT
HYPERTRAN SPORT
L0_CLKOUT_H 1 L0_CLKOUT_L 1 L0_CLKOUT_H 0 L0_CLKOUT_L 0
L0_CTLOUT_ H1 L0_CTLOUT_ L1 L0_CTLOUT_ H0 L0_CTLOUT_ L0
L0_CADOUT _H9 L0_CADOUT _L9 L0_CADOUT _H8 L0_CADOUT _L8
L0_CADOUT _H7 L0_CADOUT _L7 L0_CADOUT _H6 L0_CADOUT _L6 L0_CADOUT _H5 L0_CADOUT _L5 L0_CADOUT _H4 L0_CADOUT _L4 L0_CADOUT _H3 L0_CADOUT _L3 L0_CADOUT _H2 L0_CADOUT _L2 L0_CADOUT _H1 L0_CADOUT _L1 L0_CADOUT _H0 L0_CADOUT _L0
3
HT_CPU_RX_CLK_H1
Y4
HT_CPU_RX_CLK_L1
Y3
HT_CPU_RX_CLK_H0
Y1
HT_CPU_RX_CLK_L0
W1
T5 R5
HT_CPU_RX_CTL_H0
R2
HT_CPU_RX_CTL_L0
R3
HT_CPU_RX_CAD_H15
T4
HT_CPU_RX_CAD_L15
T3
HT_CPU_RX_CAD_H14
V5
HT_CPU_RX_CAD_L14
U5
HT_CPU_RX_CAD_H13
V4
HT_CPU_RX_CAD_L13
V3
HT_CPU_RX_CAD_H12
Y5
HT_CPU_RX_CAD_L12
W5
HT_CPU_RX_CAD_H11
AB5
HT_CPU_RX_CAD_L11
AA5
HT_CPU_RX_CAD_H10
AB4
HT_CPU_RX_CAD_L10
AB3
HT_CPU_RX_CAD_H9
AD5
HT_CPU_RX_CAD_L9
AC5
HT_CPU_RX_CAD_H8
AD4
HT_CPU_RX_CAD_L8
AD3
HT_CPU_RX_CAD_H7
T1
HT_CPU_RX_CAD_L7
R1
HT_CPU_RX_CAD_H6
U2
HT_CPU_RX_CAD_L6
U3
HT_CPU_RX_CAD_H5
V1
HT_CPU_RX_CAD_L5
U1
HT_CPU_RX_CAD_H4
W2
HT_CPU_RX_CAD_L4
W3
HT_CPU_RX_CAD_H3
AA2
HT_CPU_RX_CAD_L3
AA3
HT_CPU_RX_CAD_H2
AB1
HT_CPU_RX_CAD_L2
AA1
HT_CPU_RX_CAD_H1
AC2
HT_CPU_RX_CAD_L1
AC3
HT_CPU_RX_CAD_H0
AD1
HT_CPU_RX_CAD_L0
AC1
HT_CPU_RX_CLK_H1 11 HT_CPU_RX_CLK_L1 11 HT_CPU_RX_CLK_H0 11 HT_CPU_RX_CLK_L0 11
HT_CPU_RX_CTL_H0 11 HT_CPU_RX_CTL_L0 11
2
HT_CPU_RX_CAD_L[0 15] 11
HT_CPU_RX_CAD_H[0 15] 11
1
Do not cross plane.
U500E
U500E
P20
RSVD_MA0_C LK_H3
P19
B B
RSVD_MA0_C LK_L3
N20
RSVD_MA0_C LK_H0
N19
RSVD_MA0_C LK_L0
R26
RSVD_MB0_C LK_H3
R25
RSVD_MB0_C LK_L3
P22
RSVD_MB0_C LK_H0
R22
RSVD_MB0_C LK_L0
SOCKET638
SOCKET638
RSVD_MA_RE SET_L RSVD_MB_RE SET_L
RSVD_V DSTR B1 RSVD_V DSTR B0
RSVD_VDDNB _FB_H RSVD_VDDNB _FB_L
RSVD_CORE _TYPE
MISC
MISC
NTERNAL
NTERNAL
FREE5 FREE6 FREE4 FREE1 FREE2 FREE3
T502 TPC28TN/AT502 TPC28TN/A
H16
1
T503 TPC28TN/AT503 TPC28TN/A
B18
B3 C1
H6 G6 D5
R24 W18 R23 AA8 H18 H19
AF1
A1
TURION S1g1
uPGA638
Top View
A26
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Turion HT I/F
Turion HT I/F
Turion HT I/F
Rev
Rev
Rev
2 0
2 0
2 0
5 69 14 2007
5 69 14 2007
5 69 14 2007
5
4
3
2
1
MEM_MA0_CLK_H2
C600
C600
MEM_MA0_CLK_L2
1 5PF/50V
1 5PF/50V
D D
MEM_MA0_CS_L[0 3]9 10 MEM_MB0_CS_L[0 3]9 10
MEM_MA0_ODT[0 1]9 10
C C
B B
MEM_MA_CAS_L9 10 MEM_MA_WE_L9 10 MEM_MA_RAS_L9 10 MEM_MA_BANK[0 2]910
MEM_MA_CKE[0 1]9 10
MEM_MA_ADD[0 15]9 10
MEM_MA_DQS_H[0 7]9
MEM_MA_DQS_L[0 7]9
MEM_MA_DM[0 7]9
MEM_MA0_CLK_L19
MEM_MA0_CLK_H2 MEM_MA0_CLK_L2 MEM_MA0_CLK_H1 MEM_MA0_CLK_L1
MEM_MA0_CS_L3 MEM_MA0_CS_L2 MEM_MA0_CS_L1 MEM_MA0_CS_L0
MEM_MA0_ODT1 MEM_MA0_ODT0
MEM_MA_CAS_L MEM_MA_WE_L MEM_MA_RAS_L
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA_CKE1 MEM_MA_CKE0
MEM_MA_ADD15 MEM_MA_ADD14
MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA_DQS_H7 MEM_MA_DQS_L7 MEM_MB_DATA23 MEM_MA_DQS_H6 MEM_MA_DQS_L6 MEM_MA_DQS_H5 MEM_MA_DQS_L5 MEM_MA_DQS_H4 MEM_MA_DQS_L4 MEM_MA_DQS_H3 MEM_MA_DQS_L3 MEM_MA_DQS_H2 MEM_MA_DQS_L2 MEM_MA_DQS_H1 MEM_MA_DQS_L1 MEM_MA_DQS_H0 MEM_MA_DQS_L0
MEM_MA_DM7 MEM_MA_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0
MEM_MA0_CLK_H1
C602
C602
MEM_MA0_CLK_L1
1 5PF/50V
1 5PF/50V
U500B
U500B
Y16
MA0_CLK_H2
AA16
MA0_CLK_L2
E16
MA0_CLK_H1
F16
MA0_CLK_L1
V19
MA0_CS_L3
J22
MA0_CS_L2
V22
MA0_CS_L1
T19
MA0_CS_L0
V20
MA0_ODT1
U19
MA0_ODT0
U20
MA_CAS_L
U21
MA_WE_L
T20
MA_RAS_L
K22
MA_BANK2
R20
MA_BANK1
T22
MA_BANK0
J20
MA_CKE1
J21
MA_CKE0
K19
MA_ADD15
K20
MA_ADD14
V24
MA_ADD13
K24
MA_ADD12
L20
MA_ADD11
R19
MA_ADD10
L19
MA_ADD9
L22
MA_ADD8
L21
MA_ADD7
M19
MA_ADD6
M20
MA_ADD5
M24
MA_ADD4
M22
MA_ADD3
N22
MA_ADD2
N21
MA_ADD1
R21
MA_ADD0
W12
MA_DQS_H7
W13
MA_DQS_L7
Y15
MA_DQS_H6
W15
MA_DQS_L6
AB19
MA_DQS_H5
AB20
MA_DQS_L5
AD23
MA_DQS_H4
AC23
MA_DQS_L4
G22
MA_DQS_H3
G21
MA_DQS_L3
C22
MA_DQS_H2
C21
MA_DQS_L2
G16
MA_DQS_H1
G15
MA_DQS_L1
G13
MA_DQS_H0
H13
MA_DQS_L0
Y13
MA_DM7
AB16
MA_DM6
Y19
MA_DM5
AC24
MA_DM4
F24
MA_DM3
E19
MA_DM2
C15
MA_DM1
E12
MA_DM0
SOCKET638
SOCKET638
MEMORY
MEMORY
INTERFACE
INTERFACE
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
the cap clos e to cpu less than 1200mil
max neckdown to & from ca ps is 500mil
MEM_MA_DATA[0 63] 9
MEM_MA_DATA63
AA12
MEM_MA_DATA62
AB12
MEM_MA_DATA61
AA14
MEM_MA_DATA60
AB14
MEM_MA_DATA59
W11
MEM_MA_DATA58
Y12
MEM_MA_DATA57
AD13
MEM_MA_DATA56
AB13
MEM_MA_DATA55
AD15
MEM_MA_DATA54
AB15
MEM_MA_DATA53
AB17
MEM_MA_DATA52
Y17
MEM_MA_DATA51
Y14
MEM_MA_DATA50 MEM_MB_RAS_L
W14
MEM_MA_DATA49
W16
MEM_MA_DATA48
AD17
MEM_MA_DATA47
Y18
MEM_MA_DATA46
AD19
MEM_MA_DATA45
AD21
MEM_MA_DATA44
AB21
MEM_MA_DATA43
AB18
MEM_MA_DATA42
AA18
MEM_MA_DATA41
AA20
MEM_MA_DATA40
Y20
MEM_MA_DATA39
AA22
MEM_MA_DATA38
Y22
MEM_MA_DATA37
W21
MEM_MA_DATA36
W22
MEM_MA_DATA35
AA21
MEM_MA_DATA34
AB22
MEM_MA_DATA33
AB24
MEM_MA_DATA32
Y24
MEM_MA_DATA31
H22
MEM_MA_DATA30
H20
MEM_MA_DATA29
E22
MEM_MA_DATA28
E21
MEM_MA_DATA27
J19
MEM_MA_DATA26
H24
MEM_MA_DATA25
F22
MEM_MA_DATA24
F20
MEM_MA_DATA23
C23
MEM_MA_DATA22
B22
MEM_MA_DATA21
F18
MEM_MA_DATA20
E18
MEM_MA_DATA19
E20
MEM_MA_DATA18
D22
MEM_MA_DATA17
C19
MEM_MA_DATA16
G18
MEM_MA_DATA15
G17
MEM_MA_DATA14
C17
MEM_MA_DATA13
F14
MEM_MA_DATA12
E14
MEM_MA_DATA11
H17
MEM_MA_DATA10
E17
MEM_MA_DATA9
E15
MEM_MA_DATA8
H15
MEM_MA_DATA7
E13
MEM_MA_DATA6
C13
MEM_MA_DATA5
H12
MEM_MA_DATA4
H11
MEM_MA_DATA3
G14
MEM_MA_DATA2
H14
MEM_MA_DATA1
F12
MEM_MA_DATA0
G12
MEM_MB0_ODT[0 1]9 10
MEM_MB_CAS_L9 10 MEM_MB_WE_L9 10 MEM_MB_RAS_L9 10 MEM_MB_BANK[0 2]910
MEM_MB_CKE[0 1]9 10
MEM_MB_ADD[0 15]9 10
MEM_MB_DQS_H[0 7]9
MEM_MB_DQS_L[0 7]9
MEM_MB_DM[0 7]9
MEM_MB0_CLK_H2 MEM_MB0_CLK_L2 MEM_MB0_CLK_H1 MEM_MB0_CLK_L1
MEM_MB0_CS_L3 MEM_MB0_CS_L2 MEM_MB0_CS_L1 MEM_MB0_CS_L0
MEM_MB0_ODT1 MEM_MB0_ODT0
MEM_MB_CAS_L MEM_MB_WE_L
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB_CKE1 MEM_MB_CKE0
MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13MEM_MA_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB_DQS_H7 MEM_MB_DQS_L7 MEM_MB_DQS_H6 MEM_MB_DQS_L6 MEM_MB_DQS_H5 MEM_MB_DQS_L5 MEM_MB_DQS_H4 MEM_MB_DQS_L4 MEM_MB_DQS_H3 MEM_MB_DQS_L3 MEM_MB_DQS_H2 MEM_MB_DQS_L2 MEM_MB_DQS_H1 MEM_MB_DQS_L1 MEM_MB_DQS_H0 MEM_MB_DQS_L0
MEM_MB_DM7 MEM_MB_DM6 MEM_MB_DM5 MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0
MEM_MB0_CLK_H29MEM_MA0_CLK_H29
MEM_MB0_CLK_L29MEM_MA0_CLK_L29
MEM_MB0_CLK_H19MEM_MA0_CLK_H19
MEM_MB0_CLK_L19
U500C
U500C
AF18
MB0_CLK_H2
AF17
MB0_CLK_L2
A17
MB0_CLK_H1
A18
MB0_CLK_L1
Y26
MB0_CS_L3
J24
MB0_CS_L2
W24
MB0_CS_L1
U23
MB0_CS_L0
W23
MB0_ODT1
W26
MB0_ODT0
V26
MB_CAS_L
U22
MB_WE_L
U24
MB_RAS_L
K26
MB_BANK2
T26
MB_BANK1
U26
MB_BANK0
H26
MB_CKE1
J23
MB_CKE0
J25
MB_ADD15
MEMORY
MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10 MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
SOCKET638
SOCKET638
MEMORY
INTERFACE
INTERFACE
J26
W25
L23 L25 U25 L24
M26
L26 N23 N24 N25 N26 P24 P26 T24
AF12 AE12 AE16 AD16 AF21 AF22 AC25 AC26
F26 E26 A24 A23 D16 C16 C12 B12
AD12 AC16 AE22 AB26
E25 A22 B16 A12
C601
C601
1 5PF/50V
1 5PF/50V
C603
C603
1 5PF/50V
1 5PF/50V
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10
MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MEM_MB0_CLK_H2
MEM_MB0_CLK_L2
MEM_MB0_CLK_H1
MEM_MB0_CLK_L1
AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16 AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MB_DATA25 MEM_MB_DATA24
MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0
MEM_MB_DATA[0 63] 9
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
Turion DDR2 Memory I/F
Turion DDR2 Memory I/F
Turion DDR2 Memory I/F
6 69 14 2007
6 69 14 2007
6 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
D D
CPU_CLK_H16
R703
R703
680OHM
680OHM
CPU_CLK_L16
R704
R704
680OHM
680OHM
CPU_VDD_FB55 CPU_VDD_FB#55
+1 8V
P700
P700
1
NC
3
DBREQ_L1
5
DBRDY1
7
DBREQ_L2
9
DBRDY2
11
DBREQ_L3
13
DBRDY3
15
DBREQ_L4
17
DBRDY4
19
DBREQ_L5
21
DBRDY5
23
DBREQ_L6
ASP_68200_07_K25
ASP_68200_07_K25
/X
/X
Keep trace t o resistors le ss than 1 5" fr om CPU pin
R724
R724
1KOhm
1KOhm
1%
1%
R725
R725
1KOhm
1KOhm
1%
1%
DBRDY7
DBREQ_L7
DBRDY6
CPU_PWROK17 LDT_STOP#13 17 LDT_RESET#17
R702
Reversion 1.1
C C
B B
A A
R702
680OHM
680OHM
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS
CPU_TDI CPU_TRST# CPU_TDO
+1 8V
4
Keep trace t o resistors less than 60 0mils from CPU pin and trace to AC caps less th an 1250mils
CPU_CLK_H
CPU_CLK_L
+1 8V
CPU_M_VREF 15mil trace. 20mil space shorter than 6 inches
CPU_M_VREF
C706
C706
1000PF/16V
1000PF/16V
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
GND9
GND10
3900PF/50V
3900PF/50V
3900PF/50V
3900PF/50V
route as dif f pair 5/5/5,10mil
+1 8V
R712 39 2OhmR712 39 2Ohm R714 39 2OhmR714 39 2Ohm
R717 300OhmR717 300Ohm R719 300OhmR719 300Ohm
CPU_THERMADC21 CPU_THERMADA21
2 4 6 8 10 12 14 16 18 20 22 24 26
1 2 1 2
1 2 1 2
C707
C707
0 1UF/16V
0 1UF/16V
10KOhm
10KOhm
12
12
R728
R728
C704
C704
R701
R701
169Ohm
169Ohm
C705
C705
R705
R705
1 2 1 2
R710
R710
T703 TPC28TT703 TPC28T T705 TPC28TT705 TPC28T T707 TPC28TT707 TPC28T T708 TPC28TT708 TPC28T T710 TPC28TT710 TPC28T
+3VS
/DEBUG
/DEBUG
3
100UF 6 3V
Need decoupl ing
+2 5V_VDDA
capacitors
U500D
U500D
F8
VDDA1
F9
CPU_CLK_H_C CPU_CLK_L_C
CPU_PWROK LDT_STOP# LDT_RESET#
CPU_PRESENT#
300Ohm
300Ohm 300Ohm
300Ohm
x
x
CPU_TDI CPU_TRST# CPU_TCK CPU_TMS
CPU_DBREQ#
CPU_VCORE_FB_H CPU_VCORE_FB_L
CPU_VTT_SENSE
CPU_M_VREF
CPU_TEST25_H CPU_TEST25_L
1 1 1 1 1
CPU_THERMADC CPU_THERMADA
C E
VDDA2
A9
CLKIN_H
A8
CLKIN_L
A7
PWROK
F10
LDTSTOP_L
B7
RESET_L
AC6
CPU_PRESE NT_L
AF4
SIC
CPU_SID CPU_PROCHOT#
AF5
SID
AF9
TDI
AD9
TRST_L
AC9
TCK
AA9
TMS
E10
DBREQ_L
F6
VDD_FB_H
E6
VDD_FB_L
Y10
VTT_SENSE
W17
M_VREF
AE10
M_ZN
AF10
M_ZP
E9
TEST25_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
TEST3
AB6
TEST2
SOCKET638
SOCKET638
R730
R730 4 7KOhm
4 7KOhm
/DEBUG
/DEBUG
Q703
Q703
LDT_RESET#
PMBS3904
PMBS3904
/DEBUG
/DEBUG
THERMTR P_ L
PROCHOT_L
MISC
MISC
DBRDY
VDDIO_FB_H VDD O_FB_L
HTREF1 HTREF0
TEST29_H TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27 TEST26 TEST10
TEST8
PSI_L
VID5 VID4 VID3 VID2 VID1 VID0
TDO
A5 C6 A6 A4 C5 B5
AF6 AC7
AE9
G10
W9 Y9
A3
P6 R6
C9 C8
AE7 AD7 AE8 AB8 AF7
J7 H8 AF8 AE6 K8 C4
+1 8V
R700
R700
300Ohm
300Ohm
+1 8V_DRAM_FB +1 8V_DRAM_FB#
CPU_TEST29_H CPU_TEST29_L
CPU_TEST21
CPU_TEST26
Required for compatibilit y with future processors
CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0
CPU_TDO
CPU_DBRDY
CPU_PSI#
T702 TPC28TT702 TPC28T T704 TPC28TT704 TPC28T T706 TPC28TT706 TPC28T
T709 TPC28TT709 TPC28T
PWRLMT#28 63
100UF 6 3V
CPU_THERMTRIP#_R
T700 TPC28TT700 TPC28T
1
T701 TPC28TT701 TPC28T
1
CPU_PSI# 55
R713 44 2OhmR713 44 2Ohm
1 2
R715 44 2OhmR715 44 2Ohm
1 2
R720
R720
80 6Ohm
80 6Ohm
1 1 1
1
From SB From EC
5
2
30Ohm 100Mhz
30Ohm 100Mhz
L700
L700
C700
C700
C701
C701
4 7UF/6 3V
4 7UF/6 3V
close to the ferrite bead
CPU_VID[0 5] 55
R707
R707
R706
R706
300Ohm
300Ohm
300Ohm
300Ohm
Keep trace t o resistors le ss than 1 5" fr om CPU pin
+1 2VS_HT
Route as 80O hm differential impedance Keep trace t o resistors le ss than 1" from CPU pin
3
3
D
D
1
1
1
G
G
S
S
2
2
R726
R726 10KOhm
10KOhm
N/A
N/A
GND
GND
+3VS
R729
R729
CPU_PROCHOT#
10KOhm
10KOhm
/x
/x
2
Q704B
Q704B UM6K1N
UM6K1N
/x
/x
GND
GND
21
Q700
Q700
PMBS3904
PMBS3904
Q701
Q701
2N7002
2N7002
N/A
N/A
Q704A
Q704A UM6K1N
UM6K1N
/x
/x
0 22UF/63 V
0 22UF/63 V
10KOhm
10KOhm
CE
1
+2 5V_VDDA+2 5VS
C702
C702
C703
C703
3300PF/50V
3300PF/50V
+1 8V +3VSUS
R708
R708
12
R709
R709 4 7KOhm
4 7KOhm
CPU_THERMTRP# 18 28
+0 9V
R711
CPU_VTT_SENSE
CPU_TEST26
CPU_PRESENT#
CPU_TEST25_H
CPU_TEST25_L
CPU_TEST21
THRO_CPU28SB_THRO_CPU19
R711
1 2
+1 8V
0Ohm /x
0Ohm /x
R716 300OhmR716 300Ohm
1 2
R718 1KOhmR718 1KOhm
1 2
R721 510OhmR721 510Ohm
1 2
R722 510OhmR722 510Ohm
1 2
R723 300OhmR723 300Ohm
1 2
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Turion CNRL/DEBUG/THERM
Turion CNRL/DEBUG/THERM
Turion CNRL/DEBUG/THERM
Date: Sheet of
Date: Sheet of
Date: Sheet of
Erratum 133, Revision Guide for AMD NPT 0Fh Processors
CPU_PROCHOT#CPU_PROCHOT#
3
3
D
D
Q702
Q702
1
1
THRO CPUSB_THRO_CPU
1
2N7002
2N7002
G
G
S
S
2
2
R727
R727 10KOhm
10KOhm
GND
GND
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
Engineer:
7 69 14 2007
7 69 14 2007
7 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
4
3
2
1
D D
+VCORE
U500F
U500F
AC4
VDD1
AD2
VDD2
G4
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8
K10
VDD9
K12
VDD10
K14
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
L11
VDD15
L13
VDD16
M2
VDD17
M6
VDD18
M8
VDD19
M10
VDD20
N7
VDD21
N9
VDD22
N11
VDD23
P8
VDD24
P10
22UF/6 3V
22UF/6 3V
22UF/6 3V
22UF/6 3V
VDD25
R4
VDD26
R7
VDD27
R9
VDD28
R11
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
T10
VDD33
T12
VDD34
T14
VDD35
U7
VDD36
U9
VDD37
U11
VDD38
U13
VDD39
V6
VDD40
V8
VDD41
V10
VDD42
V12
VDD43
V14
VDD44
W4
VDD45
Y2
VDD46
SOCKET638
SOCKET638
C826
C826
C827
C827
22UF/6 3V
22UF/6 3V
C840
C840
C841
C841
22UF/6 3V
22UF/6 3V
C C
+VCORE
C825
C825
22UF/6 3V
22UF/6 3V
B B
+VCORE
C839
C839
22UF/6 3V
22UF/6 3V
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
VDD
VDD
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
place under socket on bot tom side
C829
C829
C828
C828
22UF/6 3V
22UF/6 3V
22UF/6 3V
22UF/6 3V
C842
C842
C843
0 22UF/63 V
0 22UF/63 V
C843
0 22UF/63 V
0 22UF/63 V
+1 2VS_HT
+0 9V +0 9V
+1 8V
C830
C830
22UF/6 3V
22UF/6 3V
C844
C844
0 01UF/16V
0 01UF/16V
180PF/50V
180PF/50V
U500H
U500H
D4
VLDT_A4 VLDT_A3 VLDT_A2 VLDT_A1
VTT8 VTT7 VTT6 VTT5 VTT9
VDD O23 VDD O1 VDD O2 VDD O3 VDD O4 VDD O5 VDD O6 VDD O7 VDD O8 VDD O9 VDD O10 VDD O11 VDD O12 VDD O13 VDD O14 VDD O15 VDD O16 VDD O17 VDD O18 VDD O19 VDD O20 VDD O21 VDD O22 VDD O24 VDD O25 VDD O26 VDD O27
SOCKET638
SOCKET638
POWER
POWER
VLDT_B4 VLDT_B3 VLDT_B2 VLDT_B1
VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56
I O
I O
VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90
D3 D2 D1
D10 C10 B10
AD10
W10
H25 J17 K18 K21 K23 K25
L17 M18 M21 M23 M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
C845
C845
AE5 AE4 AE3 AE2
AC10
VTT4
AB10
VTT3
AA10
VTT2
A10
VTT1
D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11
+VCORE
C800
C800
4 7UF 10V
4 7UF 10V
K16 L15 M16 P16 T16 U15 V16
J15
U500G
U500G
VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54
SOCKET638
SOCKET638
M17
VSS91
N4
VSS92
N8
VSS93
N10
VSS94
N16
VSS95
N18
VSS96
P2
VSS97
P7
VSS98
P9
VSS99
P11
VSS100
P17
VSS101
R8
VSS102
R10
VSS103
R16
VSS104
R18
VSS105
VDD
VDD
T7
VSS106
T9
VSS107
T11
VSS108
T13
VSS109
T15
VSS110
T17
VSS111
U4
VSS112
U6
VSS113
U8
VSS114
U10
VSS115
U12
VSS116
U14
VSS117
U16
VSS118
U18
VSS119
V2
VSS120
V7
VSS121
V9
VSS122
V11
VSS123
V13
VSS124
V15
VSS125
V17
VSS126
W6
VSS130
Y21
VSS131
Y23
VSS132
N6
VSS133
Near the socket on the +1.2V_HT pour
+1 2VS_HT
C847
C847
C846
C846
4 7UF/6 3V
4 7UF/6 3V
4 7UF/6 3V
0 22UF/63 V
0 22UF/63 V
4 7UF/6 3V
C850
C850
C849
C849
180PF/50V
180PF/50V
180PF/50V
180PF/50V
C851
C851
+1 2VS_HT
0 22UF/63 V
0 22UF/63 V
C848
C848
Between the socket and DIMMs, as close as possible to the socket
+1 8V
0 22UF/63 V
0 22UF/63 V
+1 8V
4 7UF/6 3V
4 7UF/6 3V
+1 8V
0 01UF/16V
0 01UF/16V
+1 8V
C813
C813
22UF/6 3V
22UF/6 3V
Capacitors are placed between the socket and DIMMs, as close as possible to the socket
+0 9V
4 7UF/6 3V
4 7UF/6 3V
+0 9V
0 22UF/63 V
0 22UF/63 V
+0 9V
1000PF/16V
1000PF/16V
+0 9V
180PF/50V
180PF/50V
C802
C802
C801
C801
0 22UF/63 V
0 22UF/63 V
0 22UF/63 V
0 22UF/63 V
C806
C806
C805
C805
4 7UF 6 3V
4 7UF 6 3V
4 7UF 6 3V
4 7UF 6 3V
C809
C809
C810
C810
180PF/50V
180PF/50V
0 01UF/16V
0 01UF/16V
place under socket on bottom side
C814
C814
C815
C815
22UF/6 3V
22UF/6 3V
0 22UF/63 V
0 22UF/63 V
C817
C817
C818
C818
4 7UF 6 3V
4 7UF 6 3V
4 7UF 6 3V
4 7UF 6 3V
C821
C821
C822
C822
0 22UF/63 V
0 22UF/63 V
0 22UF/63 V
0 22UF/63 V
C832
C832
C831
C831
1000PF/16V
1000PF/16V
1000PF/16V
1000PF/16V
C835
C835
C836
C836
180PF/50V
180PF/50V
180PF/50V
180PF/50V
C803
C803
C807
C807
C811
C811
0 22UF/63 V
0 22UF/63 V
C819
C819
C823
C823
C833
C833
C837
C837
C816
C816
0 22UF/63 V
0 22UF/63 V
C808
C808
4 7UF/6 3V
4 7UF/6 3V
180PF/50V
180PF/50V
C820
C820
4 7UF/6 3V
4 7UF/6 3V
0 22UF/63 V
0 22UF/63 V
1000PF 16V
1000PF 16V
180PF/50V
180PF/50V
C804
C804
C812
C812
C824
C824
C834
C834
C838
C838
DRAM_VTT 0.9 V
A A
Title :
Title :
Title :
A7K
A7K
A7K
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Turion Power
Turion Power
Turion Power
Date: Sheet of
Date: Sheet of
Date: Sheet of
Endy Zhang
8 69 14 2007
8 69 14 2007
8 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
4
3
2
1
D D
MEM_MA_ADD[0 15]6 10
MEM_MA_BANK2610
MEM_MA_BANK0610 MEM_MA_BANK1610
MEM_MA0_CLK_H16 MEM_MA0_CLK_L16 MEM_MA0_CLK_H26 MEM_MA0_CLK_L26 MEM_MA_CKE06 10 MEM_MA_CKE16 10 MEM_MA_CAS_L6 10
C C
B B
A A
MEM_MA_RAS_L6 10 MEM_MA_WE_L6 10
GND
MEM_MA_DM[0 7]6
MEM_MA_DQS_H[0 7]6
MEM_MA_DQS_L[0 7]6
SMBCLK16 18 33
SMBDATA16 18 33
MEM_MA0_ODT06 10 MEM_MA0 ODT16 10
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA0_CS_L0 MEM_MA0_CS_L1
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM6 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM7
MEM_MA_DQS_H0 MEM_MA_DQS_H1 MEM_MA_DQS_H2 MEM_MA_DQS_H3 MEM_MA_DQS_H6 MEM_MA_DQS_H4 MEM_MA_DQS_H5 MEM_MA_DQS_H7 MEM_MA_DQS_L0 MEM_MA_DQS_L1 MEM_MA_DQS_L2 MEM_MA_DQS_L3 MEM_MA_DQS_L6 MEM_MA_DQS_L4 MEM_MA_DQS_L5 MEM_MA_DQS_L7
U900A
U900A
TOP BOTTOM
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84 85
107 106 110 115
30
32 164 166
79
80 113 108 109 198 200 197 195
114 119
10
26
52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2
BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR_DMM_200P
DDR_DMM_200P
MEM_MA_DATA5
5
DQ0
MEM_MA_DATA4
7
DQ1
MEM_MA_DATA1
17
DQ2
MEM_MA_DATA6
19
DQ3
MEM_MA_DATA2
4
DQ4
MEM_MA_DATA0
6
DQ5
MEM_MA_DATA3
14
DQ6
MEM_MA_DATA7
16
DQ7
MEM_MA_DATA8
23
DQ8
MEM_MA_DATA9
25
DQ9
MEM_MA_DATA10
35
DQ10
MEM_MA_DATA11
37
DQ11
MEM_MA_DATA12
20
DQ12
MEM_MA_DATA13
22
DQ13
MEM_MA_DATA14
36
DQ14
MEM_MA_DATA15
38
DQ15
MEM_MA_DATA17
43
DQ16
MEM_MA_DATA20
45
DQ17
MEM_MA_DATA19
55
DQ18
MEM_MA_DATA23
57
DQ19
MEM_MA_DATA22
44
DQ20
MEM_MA_DATA21 MEM_MB0_CS_L1
46
DQ21
MEM_MA_DATA18
56
DQ22
MEM_MA_DATA16
58
DQ23
MEM_MA_DATA29
61
DQ24
MEM_MA_DATA28
63
DQ25
MEM_MA_DATA30
73
DQ26
MEM_MA_DATA31
75
DQ27
MEM_MA_DATA25
62
DQ28
MEM_MA_DATA24
64
DQ29
MEM_MA_DATA27
74
DQ30
MEM_MA_DATA26
76
DQ31
MEM_MA_DATA49
123
DQ32
MEM_MA_DATA54
125
DQ33
MEM_MA_DATA55
135
DQ34
MEM_MA_DATA48
137
DQ35
MEM_MA_DATA50
124
DQ36
MEM_MA_DATA52
126
DQ37
MEM_MA_DATA51
134
DQ38
MEM_MA_DATA53
136
DQ39
MEM_MA_DATA32
141
DQ40
MEM_MA_DATA35
143
DQ41
MEM_MA_DATA38
151
DQ42
MEM_MA_DATA34
153
DQ43
MEM_MA_DATA36
140
DQ44
MEM_MA_DATA37
142
DQ45
MEM_MA_DATA33
152
DQ46
MEM_MA_DATA39
154
DQ47
MEM_MA_DATA44
157
DQ48
MEM_MA_DATA45
159
DQ49
MEM_MA_DATA47
173
DQ50
MEM_MA_DATA46
175
DQ51
MEM_MA_DATA40
158
DQ52
MEM_MA_DATA41
160
DQ53
MEM_MA_DATA43
174
DQ54
MEM_MA_DATA42
176
DQ55
MEM_MA_DATA63
179
DQ56
MEM_MA_DATA62
181
DQ57
MEM_MA_DATA58
189
DQ58
MEM_MA_DATA59
191
DQ59
MEM_MA_DATA61
180
DQ60
MEM_MA_DATA60
182
DQ61
MEM_MA_DATA56
192
DQ62
MEM_MA_DATA57
194
DQ63
MEM_MA_DATA[0 63] 6
+1 8V
+3VS
MEM_MA0_CS_L2 MEM_MB0_CS_L2 MEM_MA0_CS_L3
C900
C900 0 1UF/16V
0 1UF/16V
GND GND
GND
MEM_M_VREF
U900B
U900B
112 111 117
96 95
118
81 82 87
103
88
104
199
83
120
50 69
163
1
201 202
203 204
47 133 183
77
12
48 184
78
71
72 121 122 196 193
8
MEM_MA0_CS_L[0 3]6 10
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12
VDDSPD
NC1 NC2 NC3 NC4 NCTEST
VREF
GND0 GND1
NP_NC1 NP_NC2
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
DDR_DIMM_200P
DDR_DIMM_200P
+1 8V
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
R901
R901
R902
R902
1KOhm
1KOhm
1%
1%
1KOhm
1KOhm
1%
1%
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
MEM_MB_ADD[0 15]6 10
+3VS
R900
R900
GND
MEM_MB_DM[0 7]6
MEM_MB_DQS_H[0 7]6
GND
MEM_MB_DQS_L[0 7]6
MEM_M_VREF 15mil trace. 20mil space shorter than 6 inches
C902
C902
0 1UF 16V
0 1UF 16V
MEM_M_VREF
C903
C903
C904
C904
0 1UF 16V
0 1UF 16V
1000PF/16V
1000PF/16V
MEM_MB_BANK2610
MEM_MB_BANK0610 MEM_MB_BANK1610
MEM_MB0_CLK_H16 MEM_MB0_CLK_L16 MEM_MB0_CLK_H26 MEM_MB0_CLK_L26 MEM_MB_CKE06 10 MEM_MB_CKE16 10 MEM_MB_CAS_L6 10 MEM_MB_RAS_L6 10 MEM_MB_WE_L6 10
12
MEM_MB0_ODT06 10 MEM_MB0 ODT16 10
1KOhm
1KOhm
SMBCLK16 18 33
SMBDATA16 18 33
MEM_M_VREF
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB0_CS_L0
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM6 MEM_MB_DM7 MEM_MB_DM5 MEM_MB_DM4
MEM_MB_DQS_H0 MEM_MB_DQS_H1 MEM_MB_DQS_H2 MEM_MB_DQS_H3 MEM_MB_DQS_H6 MEM_MB_DQS_H7 MEM_MB_DQS_H5 MEM_MB_DQS_H4 MEM_MB_DQS_L0 MEM_MB_DQS_L1 MEM_MB_DQS_L2 MEM_MB_DQS_L3 MEM_MB_DQS_L6 MEM_MB_DQS_L7 MEM_MB_DQS_L5 MEM_MB_DQS_L4
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84 85
107 106 110 115
30
32 164 166
79
80 113 108 109 198 200 197 195
114 119
10
26
52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
U901A
U901A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2
BA0 BA1 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA
ODT0 ODT1
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7
DDR_DIMM_200P
DDR_DIMM_200P
MEM_MB_DATA0
5
DQ0
MEM_MB_DATA1
7
DQ1
MEM_MB_DATA7
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA4
4
DQ4
MEM_MB_DATA5
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA2
16
DQ7
MEM_MB_DATA13
23
DQ8
MEM_MB_DATA12
25
DQ9
MEM_MB_DATA15
35
DQ10
MEM_MB_DATA11
37
DQ11
MEM_MB_DATA8
20
DQ12
MEM_MB_DATA9
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA10
38
DQ15
MEM_MB_DATA20
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA23
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA16
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA18
56
DQ22
MEM_MB_DATA22
58
DQ23
MEM_MB_DATA25
61
DQ24
MEM_MB_DATA29
63
DQ25
MEM_MB_DATA31
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA24
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA26
76
DQ31
MEM_MB_DATA49
123
DQ32
MEM_MB_DATA53
125
DQ33
MEM_MB_DATA48
135
DQ34
MEM_MB_DATA52
137
DQ35
MEM_MB_DATA54
124
DQ36
MEM_MB_DATA50
126
DQ37
MEM_MB_DATA55
134
DQ38
MEM_MB_DATA51
136
DQ39
MEM_MB_DATA56
141
DQ40
MEM_MB_DATA57
143
DQ41
MEM_MB_DATA62
151
DQ42
MEM_MB_DATA63
153
DQ43
MEM_MB_DATA60
140
DQ44
MEM_MB_DATA61
142
DQ45
MEM_MB_DATA59
152
DQ46
MEM_MB_DATA58
154
DQ47
MEM_MB_DATA47
157
DQ48
MEM_MB_DATA46
159
DQ49
MEM_MB_DATA44
173
DQ50
MEM_MB_DATA45
175
DQ51
MEM_MB_DATA40
158
DQ52
MEM_MB_DATA42
160
DQ53
MEM_MB_DATA41
174
DQ54
MEM_MB_DATA43
176
DQ55
MEM_MB_DATA37
179
DQ56
MEM_MB_DATA36
181
DQ57
MEM_MB_DATA32
189
DQ58
MEM_MB_DATA33
191
DQ59
MEM_MB_DATA34
180
DQ60
MEM_MB_DATA38
182
DQ61
MEM_MB_DATA39
192
DQ62
MEM_MB_DATA35
194
DQ63
MEM_MB_DATA[0 63] 6
+1 8V
+3VS
MEM_MB0_CS_L3
C901
C901 0 1UF/16V
0 1UF/16V
MEM_M_VREF
GND
MEM_MB0_CS_L[0 3]6 10
112 111 117
96 95
118
81 82 87
103
88
104
199
83
120
50 69
163
1
201 202
203 204
47 133 183
77
12
48 184
78
71
72 121 122 196 193
8
U901B
U901B
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12
VDDSPD
NC1 NC2 NC3 NC4 NCTEST
VREF
GND0 GND1
NP_NC1 NP_NC2
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15
DDR_DIMM_200P
DDR_DIMM_200P
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
GND
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
DDR2 SODIMM
DDR2 SODIMM
DDR2 SODIMM
9 69 14 2007
9 69 14 2007
9 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5 4 3 2 1
+0 9V
MEM_MA_ADD[0 15]6 9
D D
MEM_MA_BANK[0 2]6 9
MEM_MA_CAS_L6 9 MEM_MA_RAS_L6 9 MEM_MA_WE_L69
MEM_MA_CKE06 9 MEM_MA_CKE16 9
MEM_MA0_CS_L06 9 MEM_MA0_CS_L16 9 MEM_MA0_CS_L26 9 MEM_MA0_CS_L36 9
MEM_MA0_ODT06 9 MEM_MA0_ODT16 9
C C
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
3 4
47Ohm
47Ohm
1 2
47Ohm
47Ohm
7 8
47Ohm
47Ohm
3 4
47Ohm
47Ohm
5 6
47Ohm
47Ohm
5 6
47Ohm
47Ohm
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
1 2
47Ohm
47Ohm
1 2
47Ohm
47Ohm
3 4
47Ohm
47Ohm
3 4
47Ohm
47Ohm
3 4
47Ohm
47Ohm
3 4
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
1 2
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
3 4
47Ohm
47Ohm
5 6
47Ohm
47Ohm
5 6
47Ohm
47Ohm
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
3 4
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
RN1001C
RN1001C RN1002D
RN1002D RN1000B
RN1000B RN1011A
RN1011A RN1000D
RN1000D RN1011B
RN1011B RN1000C
RN1000C RN1003C
RN1003C RN1011C
RN1011C RN1011D
RN1011D RN1002C
RN1002C RN1003D
RN1003D RN1005A
RN1005A RN1004A
RN1004A RN1000A
RN1000A RN1003B
RN1003B
RN1005B
RN1005B RN1001B
RN1001B RN1002B
RN1002B
RN1007D
RN1007D RN1001A
RN1001A RN1002A
RN1002A
RN1005D
RN1005D RN1003A
RN1003A
RN1004B
RN1004B RN1007C
RN1007C RN1005C
RN1005C RN1004C
RN1004C
RN1001D
RN1001D RN1007B
RN1007B RN1004D
RN1004D RN1007A
RN1007A
+0 9V
C1000
C1000
0 1UF/16V
0 1UF/16V
C1001
C1001
0 1UF 16V
0 1UF 16V
C1002
0 1UF/16V
0 1UF/16V
C1003
C1003
0 1UF 16V
0 1UF 16V
C1004
C1004
0 1UF/16V
0 1UF/16V
C1005
C1005
0 1UF/16V
0 1UF/16V
C1006
C1006
0 1UF 16V
0 1UF 16V
C1007
C1007
0 1UF/16V
0 1UF/16V
C1002
+0 9V
C1013
C1008
C1008
0 1UF/16V
0 1UF/16V
C1009
C1009
0 1UF 16V
0 1UF 16V
C1011
C1011
C1010
C1010
0 1UF 16V
0 1UF 16V
0 1UF/16V
0 1UF/16V
place behind DIMMs
C1012
C1012
0 1UF/16V
0 1UF/16V
C1013
0 1UF/16V
0 1UF/16V
C1014
C1014
0 1UF 16V
0 1UF 16V
C1015
C1015
0 1UF/16V
0 1UF/16V
+1 8V
+0 9V
MEM_MB_ADD[0 15]6 9
MEM_MB_BANK[0 2]6 9
MEM_MB_CAS_L6 9 MEM_MB_RAS_L6 9 MEM_MB_WE_L69
B B
MEM_MB_CKE06 9 MEM_MB_CKE16 9
MEM_MB0_CS_L06 9 MEM_MB0_CS_L16 9 MEM_MB0_CS_L26 9 MEM_MB0_CS_L36 9
MEM_MB0_ODT06 9 MEM_MB0_ODT16 9
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
3 4
47Ohm
47Ohm
5 6
47Ohm
47Ohm
1 2
47Ohm
47Ohm
7 8
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
5 6
47Ohm
47Ohm
3 4
47Ohm
47Ohm
3 4
47Ohm
47Ohm
5 6
47Ohm
47Ohm
3 4
47Ohm
47Ohm
1 2
47Ohm
47Ohm
7 8
47Ohm
47Ohm
5 6
47Ohm
47Ohm
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
5 6
47Ohm
47Ohm
1 2
47Ohm
47Ohm
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
7 8
47Ohm
47Ohm
5 6
47Ohm
47Ohm
3 4
47Ohm
47Ohm
7 8
47Ohm
47Ohm
3 4
47Ohm
47Ohm
3 4
47Ohm
47Ohm
1 2
47Ohm
47Ohm
3 4
47Ohm
47Ohm
1 2
47Ohm
47Ohm
1 2
47Ohm
47Ohm
7 8
47Ohm
47Ohm
RN1008B
RN1008B RN1010C
RN1010C RN1008A
RN1008A RN1010D
RN1010D RN1009D
RN1009D RN1014A
RN1014A RN1009C
RN1009C RN1009B
RN1009B RN1014B
RN1014B RN1014C
RN1014C RN1010B
RN1010B RN1009A
RN1009A RN1014D
RN1014D RN1015C
RN1015C RN1006C
RN1006C RN1006D
RN1006D
RN1012A
RN1012A RN1008C
RN1008C RN1010A
RN1010A
RN1013C
RN1013C RN1015D
RN1015D RN1013D
RN1013D
RN1012C
RN1012C RN1006B
RN1006B
RN1008D
RN1008D RN1013B
RN1013B RN1012B
RN1012B RN1015A
RN1015A
RN1015B
RN1015B RN1013A
RN1013A RN1006A
RN1006A RN1012D
RN1012D
+0 9V
C1016
C1016
0 1UF/16V
0 1UF/16V
C1017
C1017
0 1UF 16V
0 1UF 16V
C1018
C1018
0 1UF/16V
0 1UF/16V
C1019
0 1UF 16V
0 1UF 16V
0 1UF/16V
0 1UF/16V
C1021
C1021
0 1UF/16V
0 1UF/16V
C1022
C1022
0 1UF 16V
0 1UF 16V
C1023
C1023
0 1UF/16V
0 1UF/16V
C1020
C1020
C1019
+0 9V
C1031
C1024
C1024
0 1UF/16V
0 1UF/16V
C1025
C1025
0 1UF 16V
0 1UF 16V
C1026
C1026
0 1UF/16V
0 1UF/16V
C1027
C1027
0 1UF 16V
0 1UF 16V
C1028
C1028
0 1UF/16V
0 1UF/16V
C1029
C1029
0 1UF/16V
0 1UF/16V
C1030
C1030
0 1UF 16V
0 1UF 16V
C1031
0 1UF/16V
0 1UF/16V
place behind DIMMs
+1 8V
5
D D
HT_CPU_RX_CAD_L[0 15]5
C C
HT_CPU_RX_CLK_H15 HT_CPU_RX_CLK_L15
HT_CPU_RX_CLK_H05 HT_CPU_RX_CLK_L05
HT_CPU_RX_CTL_H05 HT_CPU_RX_CTL_L05
VDDHT_PKG
B B
4
HT_CPU_RX_CAD_H15 HT_CPU_RX_CAD_L15 HT_CPU_RX_CAD_H14 HT_CPU_RX_CAD_L14 HT_CPU_RX_CAD_H13 HT_CPU_RX_CAD_L13 HT_CPU_RX_CAD_H12 HT_CPU_RX_CAD_L12 HT_CPU_RX_CAD_H11 HT_CPU_RX_CAD_L11 HT_CPU_RX_CAD_H10 HT_CPU_RX_CAD_L10 HT_CPU_RX_CAD_H9 HT_CPU_RX_CAD_L9 HT_CPU_RX_CAD_H8 HT_CPU_RX_CAD_L8
HT_CPU_RX_CAD_H7 HT_CPU_RX_CAD_L7 HT_CPU_RX_CAD_H6 HT_CPU_RX_CAD_L6 HT_CPU_RX_CAD_H5 HT_CPU_RX_CAD_L5 HT_CPU_RX_CAD_H4 HT_CPU_RX_CAD_L4 HT_CPU_RX_CAD_H3 HT_CPU_RX_CAD_L3 HT_CPU_RX_CAD_H2 HT_CPU_RX_CAD_L2 HT_CPU_RX_CAD_H1 HT_CPU_RX_CAD_L1 HT_CPU_RX_CAD_H0 HT_CPU_RX_CAD_L0
HT_CPU_RX_CLK_H1 HT_CPU_RX_CLK_L1
HT_CPU_RX_CLK_H0 HT_CPU_RX_CLK_L0
HT_CPU_RX_CTL_H0 HT_CPU_RX_CTL_L0
R1100 499OhmR1100 49 9Ohm
1 2
R1101 49 9OhmR1101 49 9Ohm
1 2
HT_RXCALP HT_RXCALN
R19 R18 R21 R22 U22 U21 U18
U19 W19 W20
AC21 AB22 AB20 AA20 AA19
Y19
T24
R25
U25
U24
V23
U23
V24
V25
AA25 AA24 AB23 AA23 AB24 AB25 AC24 AC25
W21 W22
Y24 W25
P24
P25
A24
C24
U1100A
U1100A
HT_RXCAD15 P HT_RXCAD15 N HT_RXCAD14 P HT_RXCAD14 N HT_RXCAD13 P HT_RXCAD13 N HT_RXCAD12 P HT_RXCAD12 N HT_RXCAD11 P HT_RXCAD11 N HT_RXCAD10 P HT_RXCAD10 N HT_RXCAD9P HT_RXCAD9N HT_RXCAD8P HT_RXCAD8N
HT_RXCAD7P HT_RXCAD7N HT_RXCAD6P HT_RXCAD6N HT_RXCAD5P HT_RXCAD5N HT_RXCAD4P HT_RXCAD4N HT_RXCAD3P HT_RXCAD3N HT_RXCAD2P HT_RXCAD2N HT_RXCAD1P HT_RXCAD1N HT_RXCAD0P HT_RXCAD0N
HT_RXCLK1P HT_RXCLK1N
HT_RXCLK0P HT_RXCLK0N
HT_RXCTLP HT_RXCTLN
HT_RXCALP HT_RXCALN
RS690M
RS690M
PART 1 OF 5
PART 1 OF 5
3
HT_TXCAD15 P HT_TXCAD15 N HT_TXCAD14 P HT_TXCAD14 N HT_TXCAD13 P HT_TXCAD13 N HT_TXCAD12 P HT_TXCAD12 N HT_TXCAD11 P HT_TXCAD11 N HT_TXCAD10 P HT_TXCAD10 N
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P HT_TXCLK1N
HT_TXCLK0P HT_TXCLK0N
HT_TXCTLP HT_TXCTLN
HT_TXCALP
HT_TXCALN
2
HT_CPU_TX_CAD_H15
P21
HT_CPU_TX_CAD_L15
P22
HT_CPU_TX_CAD_H14
P18
HT_CPU_TX_CAD_L14
P19
HT_CPU_TX_CAD_H13
M22
HT_CPU_TX_CAD_L13
M21
HT_CPU_TX_CAD_H12
M18
HT_CPU_TX_CAD_L12
M19
HT_CPU_TX_CAD_H11
L18
HT_CPU_TX_CAD_L11
L19
HT_CPU_TX_CAD_H10
G22
HT_CPU_TX_CAD_L10
G21
HT_CPU_TX_CAD_H9
J20
HT_CPU_TX_CAD_L9
J21
HT_CPU_TX_CAD_H8
F21
HT_CPU_TX_CAD_L8
F22
HT_CPU_TX_CAD_H7
N24
HT_CPU_TX_CAD_L7
N25
HT_CPU_TX_CAD_H6
L25
HT_CPU_TX_CAD_L6
M24
HT_CPU_TX_CAD_H5
K25
HT_CPU_TX_CAD_L5
K24
HT_CPU_TX_CAD_H4
J23
HT_CPU_TX_CAD_L4
K23
HT_CPU_TX_CAD_H3
G25
HT_CPU_TX_CAD_L3
H24
HT_CPU_TX_CAD_H2
F25
HT_CPU_TX_CAD_L2
F24
HT_CPU_TX_CAD_H1
E23
HT_CPU_TX_CAD_L1
F23
HT_CPU_TX_CAD_H0
E24
HT_CPU_TX_CAD_L0
E25
HT_CPU_TX_CLK_H1
L21
HT_CPU_TX_CLK_L1
L22
HT_CPU_TX_CLK_H0
J24
HT_CPU_TX_CLK_L0
J25
HT_CPU_TX_CTL_H0
N23
HT_CPU_TX_CTL_L0
P23
HT_TXCALP
C25 D24
HT_TXCALN
R1102
R1102
100Ohm
100Ohm
12
HT_CPU_TX_CLK_H1 5 HT_CPU_TX_CLK_L1 5
HT_CPU_TX_CLK_H0 5 HT_CPU_TX_CLK_L0 5
HT_CPU_TX_CTL_H0 5 HT_CPU_TX_CTL_L0 5
HT_CPU_TX_CAD_L[0 15] 5
HT_CPU_TX_CAD_H[0 15] 5HT_CPU_RX_CAD_H[0 15]5
1
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
RS690M HT Link0 I/F
RS690M HT Link0 I/F
RS690M HT Link0 I/F
Rev
Rev
Rev
2 0
2 0
2 0
11 69 14 2007
11 69 14 2007
11 69 14 2007
5
D D
GFX_RX_C_P15 GFX_RX_C_N15 GFX_RX_C_P14 GFX_RX_C_N14 GFX_RX_C_P13 GFX_RX_C_N13 GFX_RX_C_P12 GFX_RX_C_N12 GFX_RX_C_P11 GFX_RX_C_N11 GFX_RX_C_P10 GFX_RX_C_N10 GFX_RX_C_P9 GFX_RX_C_N9 GFX_RX_C_P8 GFX_RX_C_N8 GFX_RX_C_P7 GFX_RX_C_N7 GFX_RX_C_P6 GFX_RX_C_N6 GFX_RX_C_P5 GFX_RX_C_N5 GFX_RX_C_P4 GFX_RX_C_N4 GFX_RX_C_P3 GFX_RX_C_N3
C C
B B
GFX_RX_C_P2 GFX_RX_C_N2 GFX_RX_C_P1 GFX_RX_C_N1 GFX_RX_C_P0 GFX_RX_C_N0
A_C_RXP2
A_C_RXP3 A_C_RXN3
GPP_RXP0
GPP_RXP1 GPP_RXN1
A_C_RXP0 A_C_RXN0
C1208 0 1UF 16VC1208 0 1UF 16V
C1201 0 1UF 16VC1201 0 1UF 16V
C1210 0 1UF 16VC1210 0 1UF 16V
C1202 0 1UF 16VC1202 0 1UF 16V
C1213 0 1UF 16VC1213 0 1UF 16V
C1214 0 1UF 16VC1214 0 1UF 16V
C1205 0 1UF 16VC1205 0 1UF 16V
C1216 0 1UF 16VC1216 0 1UF 16V
C1218 0 1UF 16VC1218 0 1UF 16V
C1219 0 1UF 16VC1219 0 1UF 16V
C1221 0 1UF 16VC1221 0 1UF 16V
C1223 0 1UF 16VC1223 0 1UF 16V
C1225 0 1UF 16VC1225 0 1UF 16V
C1227 0 1UF 16VC1227 0 1UF 16V
C1228 0 1UF 16VC1228 0 1UF 16V
C1230 0 1UF 16VC1230 0 1UF 16V
C1232 0 1UF 16VC1232 0 1UF 16V
C1234 0 1UF 16VC1234 0 1UF 16V
C1237 0 1UF 16VC1237 0 1UF 16V
C1239 0 1UF 16VC1239 0 1UF 16V
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C1200 0 1UF 16VC1200 0 1UF 16V
1 2
C1209 0 1UF 16VC1209 0 1UF 16V
1 2
C1211 0 1UF 16VC1211 0 1UF 16V
1 2
C1212 0 1UF 16VC1212 0 1UF 16V
1 2
C1203 0 1UF 16VC1203 0 1UF 16V
1 2
C1204 0 1UF 16VC1204 0 1UF 16V
1 2
C1215 0 1UF 16VC1215 0 1UF 16V
1 2
C1217 0 1UF 16VC1217 0 1UF 16V
1 2
C1206 0 1UF 16VC1206 0 1UF 16V
1 2
C1220 0 1UF 16VC1220 0 1UF 16V
1 2
C1222 0 1UF 16VC1222 0 1UF 16V
1 2
C1224 0 1UF 16VC1224 0 1UF 16V
1 2
C1226 0 1UF 16VC1226 0 1UF 16V
1 2
C1207 0 1UF 16VC1207 0 1UF 16V
1 2
C1229 0 1UF 16VC1229 0 1UF 16V
1 2
C1231 0 1UF 16VC1231 0 1UF 16V
1 2
C1233 0 1UF 16VC1233 0 1UF 16V
1 2
C1235 0 1UF 16VC1235 0 1UF 16V
1 2
C1236 0 1UF 16VC1236 0 1UF 16V
1 2
C1238 0 1UF 16VC1238 0 1UF 16V
GFX_RX_P0 GFX_RX_N0 GFX_RX_P1 GFX_RX_N1 GFX_RX_P2 GFX_RX_N2 GFX_RX_P3 GFX_RX_N3 GFX_RX_P4 GFX_RX_N4 GFX_RX_P5 GFX_RX_N5 GFX_RX_P6 GFX_RX_N6 GFX_RX_P7 GFX_RX_N7 GFX_RX_P8 GFX_RX_N8 GFX_RX_P9 GFX_RX_N9 GFX_RX_P10 GFX_RX_N10 GFX_RX_P11 GFX_RX_N11 GFX_RX_P12 GFX_RX_N12 GFX_RX_P13 GFX_RX_N13 GFX_RX_P14 GFX_RX_N14 GFX_RX_P15 GFX_RX_N15
A_RXP2 A_RXN2A_C_RXN2
A_RXP3 A_RXN3
A_RXP0 A_RXN0
A_RXP1A_C_RXP1 A_RXN1A_C_RXN1
4
U1100B
U1100B
G5
PART 2 OF 5
PART 2 OF 5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
W11
SB_RX2P
W12
SB_RX2N
AA11
SB_RX3P
AB11
SB_RX3N
Y7
GPP_RX2P
AA7
AB9 AA9
W14 W15
AB12 AA12
AA14 AB14
GPP_RX2N
GPP_RX3P GPP_RX3N
SB_RX0P SB_RX0N
SB_RX1P SB_RX1N
NC1 NC2
RS690M
RS690M
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
SB_TX2P SB_TX2N
SB_TX3P SB_TX3N
GPP_TX2P GPP_TX2N
GPP_TX3P GPP_TX3N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
PCE_CALRP PCE_CALRN
3
J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4
AD8 AE8
AD7 AE7
AD4 AE5
AD5 AD6
AE9 AD10
AC8 AD9
AD11 AE11
A_C_TXP2 A_C_TXN2
A_C_TXP3 A_C_TXN3
GPP_C_TXP0 GPP_C_TXN0GPP_RXN0
GPP_C_TXP1 GPP_C_TXN1
A_C_TXP0 A_C_TXN0
A_C_TXP1 A_C_TXN1
R1200 562OhmR1200 562Ohm
1 2
R1201 2KOhmR1201 2KOhm
1 2
MINI-PCIE TV
MINI-PCIE WLAN
VDDA12_PKG2
2
GFX_TX_C_P15 GFX_TX_C_N15 GFX_TX_C_P14 GFX_TX_C_N14 GFX_TX_C_P13 GFX_TX_C_N13 GFX_TX_C_P12 GFX_TX_C_N12 GFX_TX_C_P11 GFX_TX_C_N11 GFX_TX_C_P10 GFX_TX_C_N10 GFX_TX_C_P9 GFX_TX_C_N9 GFX_TX_C_P8 GFX_TX_C_N8 GFX_TX_C_P7 GFX_TX_C_N7 GFX_TX_C_P6 GFX_TX_C_N6 GFX_TX_C_P5 GFX_TX_C_N5 GFX_TX_C_P4 GFX_TX_C_N4 GFX_TX_C_P3 GFX_TX_C_N3 GFX_TX_C_P2 GFX_TX_C_N2 GFX_TX_C_P1 GFX_TX_C_N1 GFX_TX_C_P0 GFX_TX_C_N0
GFX_TX_C_P15 GFX_TX_C_N15 GFX_TX_C_P14 GFX_TX_C_N14 GFX_TX_C_P13 GFX_TX_C_N13 GFX_TX_C_P12 GFX_TX_C_N12
1
12
C12400 1UF/16V7UC12400 1UF/16V
12
7U
C12420 1UF/16V7UC12420 1UF/16V
A7U
A7U
12
7U
C12440 1UF/16V7UC12440 1UF/16V
A7
12
7U
C12460 1UF/16V
C12460 1UF/16V
A7U
/A7U
/A7U
A7U
/A7U
/A7U
TMDS_TX2P 24
12
TMDS_TX2N 24
C12410 1UF/16V
C12410 1UF/16V
TMDS_TX1P 24
12
TMDS_TX1N 24
C12430 1UF/16VA7C12430 1UF/16V
TMDS_TX0P 24
12
TMDS_TX0N 24
C12450 1UF/16V
C12450 1UF/16V
TMDS_TXCP 24
12
TMDS_TXCN 24
C12470 1UF/16V
C12470 1UF/16V
GFX_RX_C_N[0 15]41
A_C_RXN[0 3]17
GPP_RXN040
GPP_RXP126
A A
GFX_TX_C_P[0 15] 41GFX_RX_C_P[0 15]41 GFX_TX_C_N[0 15] 41
A_C_TXP[0 3] 17A_C_RXP[0 3]17 A_C_TXN[0 3] 17
GPP_C_TXP0 40GPP_RXP040 GPP_C_TXN0 40
GPP_C_TXP1 26 GPP_C_TXN1 26GPP_RXN126
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
RS690M PCIE Link I/F
RS690M PCIE Link I/F
RS690M PCIE Link I/F
12 69 14 2007
12 69 14 2007
12 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
+1 8VS AVDDQ
L1301
L1301
21
220Ohm 100Mhz
220Ohm 100Mhz
C1302
C1302
C1300
PLLVDD
C1321
C1321
0 1UF/16V
0 1UF/16V
Y
Y
R_BMREQ#
0Ohm
0Ohm
10UF/10V
10UF/10V
/x
/x
C1304
C1304
10UF/10V
10UF/10V
/x
/x
+3VS
+3VS
5
R1303
R1303
10KOhm
10KOhm
C1316
C1316
1UF/10V
1UF/10V
74LVC1G125GV
74LVC1G125GV
4
5
2 2UF/10V
2 2UF/10V
2 2UF/10V
2 2UF/10V
VCC
C1300
C1306
C1306
GND3Y
U1300
U1300
A
OE#
D D
L1302
L1302
21
220Ohm 100Mhz
220Ohm 100Mhz
NB_R23 NB_G23 NB_B23
+1 8VS
R1301
R1301
10KOhm
10KOhm
C C
LDT_STOP#7 17
L1307
L1307
21
220Ohm/100Mhz
220Ohm/100Mhz
HOTPLUG#23 24
B B
TMDS_HPD24
SEL_VCC_NB57
NB_SELV_EN19
R1317
R1317
10KOhm
10KOhm
A A
BMREQ#17
C1318
C1318
2 2UF/10V
2 2UF/10V
R1318
1 2
R1319
1 2
A_RST#
C1320
C1320 15PF/50V
15PF/50V
+1 8VS HTPVDD+1 2VS PLLVDD12
+3VS
Q1300
Q1300
L1306
L1306
220Ohm/100Mhz
220Ohm/100Mhz
A7KR1318
A7K
0Ohm
0Ohm
A7UR1319
A7U
0Ohm
0Ohm
R1315
R1315
10KOhm
10KOhm
PMBS3904
PMBS3904
21
Q1301
Q1301
A
A
1
B
B
2
3 4
GND
GND
NC7SZ00M5X_NL
NC7SZ00M5X_NL
D1300
D1300
1 2
R1316
R1316
1 2
/x
/x
CE
C1315
C1315
10UF/10V
10UF/10V
/x
/x
TMDS_HPD_
+3VS
VCC
VCC
/x
/x
1SS355
1SS355
4
+3VS
L1300
L1300
21
220Ohm/100Mhz
220Ohm/100Mhz
+1 8VS
A_RST#17 26 27 2837 40 41 49 PWRGD18 28 33 67
ALLOW_LDTSTOP17
NBGFX_CLK_P16 NBGFX_CLK_N16
NB_I2C_DATA22 NB_THERMD_P19 NB_THERMD_N19
NB_DDC_DATA24
2 1
PULL HIGH (internally pulled high)
PULL LOW
2 2UF/10V
2 2UF/10V
2 2UF/10V
2 2UF/10V
NB_TV_C23 NB_TV_Y23 NB_TV_COMP23
NB_V23 NB_H23
R1300 715OhmR1300 715Ohm
1 2
NB_DACSCL23 NB_DACSDA23
A_RST#
R1302
R1302
1 2
0Ohm
0Ohm
R1304 10KOhmR1304 10KOhm
1 2
HTREFCLK16
R1305 10KOhmR1305 10KOhm
1 2
NB_OSC16
PLLVDD12
NBL NK_CLKP16 NBL NK_CLKN16
R1306 3KOhm/XR1306 3KOhm/X
1 2
R1307 3KOhm/XR1307 3KOhm/X
1 2
R1308 3KOhm/XR1308 3KOhm/X
1 2
R1309 3KOhm/xR1309 3KOhm/x
1 2
R13113KOhm /XR13113KOhm /X
1 2
R1310 3KOhm/XR1310 3KOhm/X
1 2
NB_ 2C_CLK22
TMDS_HPD_
DFT_GPIO0
Memory side port not available
DEFAULT
Memory side port available
C1301
C1301
C1303
C1303
AVDDQ
PLLVDD
HTPVDD
NB_PWRGD
DFT_GPIO4
R_BMREQ# NB_I2C_CLK NB_I2C_DATA
NB_DDC_DATA
R1314
R1314
4 7KOhm
4 7KOhm
U1100C
U1100C
B22
AVDD1
C22
AVDD2
G17
AVSSN_1
H17
AVSSN_2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C
C20
Y
D19
COMP
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD18
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTS TOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
PLLVDD12
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GP O0
D7
DFT_GP O1
C8
DFT_GP O2
C7
DFT_GP O3
B8
DFT_GP O4
A8
DFT_GP O5
B2
BMREQ#
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIO DE_P
AB15
THERMALDIO DE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RS690M
RS690M
DFT_GPIO1
Bypass the loading of EEPROM straps and use Har dware default valu es
DEFAULT
I2C Master c an load strap values from EEPRO M if connected, or use default valu es if not conne cted
3
B14
TXOUT_L0P
PART 3 OF 5
PART 3 OF 5
TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP
TXCLK_LN TXCLK_UP TXCLK_UN
LPVDD LPVSS
LVDDR18D_1 LVDDR18D_2
LVDDR33_1 LVDDR33_2
LVSSR1 LVSSR2 LVSSR3 LVSSR4 LVSSR5 LVSSR6
LVSSR7 LVSSR8
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
GPP_TX0P GPP_TX0N
DEBUG6 GPP_RX0P GPP_RX0N
DEBUG9
DEBUG10 GPP_TX1N GPP_TX1P GPP_RX1N GPP_RX1P
DEBUG15
DEBUG0 DEBUG2
DEBUG1 DEBUG14 DEBUG13
B15 B13 A13 H14 G14 D17 E17
A15 B16 C17 C18 B17 A17 A18 B18
E15 D15 H15 G15
D14 E14
A12 B12 C12 C13
A16 A14 D12 C19 C15 C16
F14 F15
E12 G12 F12
AD14 AD15 AE15 AD16 AE16 AC17 AD18 AE19 AD19 AE20 AD20 AE21
AD13 AC13 AE13 AE17 AD17
G_LVDS_BLON
NB_DEBUG6
NB_DEBUG9 NB_DEBUG10 GPP_C_TXN3 GPP_C_TXP3
NB_DEBUG9
NB_DEBUG0 NB_DEBUG2 NB_DEBUG1 NB_DEBUG14 NB_DEBUG13
RS690 onlyRS485/RS6 90
DFT_GPIO[4 :2]
These pin straps are used to configure PCI E GP P mode:
111: registe r defined (regis ter default to Co nfig E) 110: 4 0 0 0 0 Con fig A 101: 4 4 Config B 100: 4 2 2 Con fig C 011: 4 2 1 1 Config D 010: 4 1 1 1 1 Con fig E others: regi ster defined (re gister default to Config E)
NB_TXOUT_LP0 22 NB_TXOUT_LN0 22 NB_TXOUT_LP1 22 NB_TXOUT_LN1 22 NB_TXOUT_LP2 22 NB_TXOUT_LN2 22
NB_TXOUT_UP0 22 NB_TXOUT_UN0 22 NB_TXOUT_UP1 22 NB_TXOUT_UN1 22 NB_TXOUT_UP2 22 NB_TXOUT_UN2 22
NB_TXCLK_LP 22 NB_TXCLK_LN 22 NB_TXCLK_UP 22 NB_TXCLK_UN 22
C1309
C1309
0 1UF/16V
0 1UF/16V
NB_LVDS_DIGON 22
NB_LVDS_BLEN 22
T1300 TPC28TT1300 TPC28T
1
T1301 TPC28TT1301 TPC28T
1
T1302 TPC28TT1302 TPC28T
1
T1303 TPC28TT1303 TPC28T
1
T1304 TPC28TT1304 TPC28T
1
T1305 TPC28TT1305 TPC28T
1
T1306 TPC28TT1306 TPC28T
1
T1307 TPC28TT1307 TPC28T
1
T1308 TPC28TT1308 TPC28T
1
Enable debu g bus via the memory IO pads, if a va lable in the package
DEFAULT
use defau lt values
use the m emory data bus to output the debug bus
C1305
C1305
0 1UF/16V
0 1UF/16V
N A
N A
C1310
C1310
2 2UF 10V
2 2UF 10V
1 2
C1317 0 1UF/16VC1317 0 1UF/16V
DFT_GPIO5
2
C1307
C1307
1UF/10V
1UF/10V
2 2UF/10V
2 2UF/10V
N/A
N/A
C1311
C1311
4 7UF/6 3V
4 7UF/6 3V
T1309 TPC28TT1309 TPC28T
1
1 2
C1319 0 1UF 16VC1319 0 1UF 16V
DFT_GPIO4
DEFAULT
C1308
C1308
+1 8VS
L1303
L1303
21
220Ohm/100Mhz
220Ohm/100Mhz
L1304
L1304
21
220Ohm/100Mhz
220Ohm/100Mhz
C1312
C1312
0 1UF/16V
0 1UF/16V
R1313
R1313
1 2
0Ohm
0Ohm
+1 8VS +3VS
220Ohm/100Mhz
220Ohm/100Mhz
C1314
C1314
C1313
C1313
4 7UF 6 3V
4 7UF 6 3V
1UF/10V
1UF/10V
N A
N A
GPP_C_TXP2 27 GPP_C_TXN2 27
GPP_RXP2 27 GPP_RXN2 27
GPP_TXN3 49 GPP_TXP3 49
GPP_RXN3 49 GPP_RXP3 49
+1 8VS
R1312
R1312
10KOhm
10KOhm
Q1302
Q1302
PMBS3904
PMBS3904
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
RS690M System I/F & CLKGEN
RS690M System I/F & CLKGEN
RS690M System I/F & CLKGEN
Date: Sheet of
Date: Sheet of
Date: Sheet of
L1305
L1305
21
NEW CARD
E-SATA
CE
+3VS
1
R1320
R1320 20KOhm
20KOhm
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
GPULV_EN 22
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
13 69 14 2007
13 69 14 2007
13 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
D D
+1 2VS_HT
C1402
C1402
C1403
10UF/10V
10UF/10V
L1400
L1400
220Ohm/100Mhz
220Ohm/100Mhz
L1404
L1404
21
220Ohm/100Mhz
220Ohm/100Mhz
C1420
C1420
10UF/10V
10UF/10V
L1401
L1401
220Ohm/100Mhz
220Ohm/100Mhz
L1402
L1402
220Ohm/100Mhz
220Ohm/100Mhz
L1403
L1403
220Ohm/100Mhz
220Ohm/100Mhz
C1403
C1404
C1404
1UF/10V
1UF/10V
1UF/10V
1UF/10V
VDD18
21
C1418
C1418
+1 2VSNB_VDDA12
1UF/10V
1UF/10V
C1422
C1422
C1421
C1421
1UF/10V
1UF/10V
1UF/10V
1UF/10V
VDDR3
21
2 2UF 10V
2 2UF 10V
21
C1431
C1431
1UF/10V
1UF/10V
VDDPLL
21
C1435
C1435
4 7UF 6 3V
4 7UF 6 3V
C1400
C1400
10UF/10V
10UF/10V
+1 8VS
C C
C1419
C1419
10UF/10V
10UF/10V
+3VS
+1 8VS VDDR
B B
+1 2VS
C1430
C1430
C1405
C1405
1UF/10V
1UF/10V
C1423
C1423
1UF/10V
1UF/10V
C1412
C1412
1UF/10V
1UF/10V
C1432
C1432
1UF/10V
1UF/10V
C1436
C1436
1UF/10V
1UF/10V
C1401
C1401
1UF 10V
1UF 10V
C1424
C1424
1UF 10V
1UF 10V
C1406
C1406
1UF/10V
1UF/10V
C1433
C1433
1UF 10V
1UF 10V
AE24 AD24 AD22 AB17 AE23
Y17
W17 AC18 AD21 AC19 AC20 AB19 AD23 AA17 AE25
J14 J15
AE2 AB3
U7
W7 AB4 AC3 AD2 AE1
E11 D11
AC12 AD12 AE12
E7
F7 F9
G9
D22
M1
AC11
4
U1100D
U1100D
VDD_HT_1 VDD_HT_2 VDD_HT_3 VDD_HT_4 VDD_HT_5 VDD_HT_6 VDD_HT_7 VDD_HT_8 VDD_HT_9 VDD_HT_10 VDD_HT_11 VDD_HT_12 VDD_HT_13 VDD_HT_14 VDD_HT_15
VDD_18_1 VDD_18_2
VDDA_12_1 VDDA_12_2 VDDA_12_3 VDDA_12_4 VDDA_12_5 VDDA_12_6 VDDA_12_7 VDDA_12_8
VDDR3_1 VDDR3_2
VDDR_1 VDDR_2 VDDR_3
VDD_PLL_1 VDD_PLL_2 VSS_PLL_1 VSS_PLL_2
VDD_HT_PK G VDDA_12_PK G_1 VDDA_12_PK G_2
RS690M
RS690M
C1434
C1434
0 1UF/16V
0 1UF/16V
PART 4 OF 5
PART 4 OF 5
VDDA12_PKG2VDDA12_PKG1VDDHT_PKG
VDDA_12_9 VDDA_12_10 VDDA_12_11 VDDA_12_12 VDDA_12_13 VDDA_12_14 VDDA_12_15 VDDA_12_16 VDDA_12_17 VDDA_12_18 VDDA_12_19 VDDA_12_20
VDD_CORE_1 VDD_CORE_2 VDD_CORE_3 VDD_CORE_4 VDD_CORE_5 VDD_CORE_6 VDD_CORE_7 VDD_CORE_8
VDD_CORE_9 VDD_CORE_1 0 VDD_CORE_1 1 VDD_CORE_1 2 VDD_CORE_1 3 VDD_CORE_1 4 VDD_CORE_1 5 VDD_CORE_1 6 VDD_CORE_1 7 VDD_CORE_1 8 VDD_CORE_1 9 VDD_CORE_2 0 VDD_CORE_2 1 VDD_CORE_2 2 VDD_CORE_2 3 VDD_CORE_2 4 VDD_CORE_2 5 VDD_CORE_2 6 VDD_CORE_2 7 VDD_CORE_2 8 VDD_CORE_2 9 VDD_CORE_3 0 VDD_CORE_3 1 VDD_CORE_3 2
3
NB_VDDA12
D1 G7 E2 C1 E3 D2 M9 F4 B1 D3 L9 E6
L11 L13 L15 M12 R15 M14 N11 N13 N15 J11 H11 P12 P14 R11 R13 A19 B19 U11 U14 P17 L17 J19 D20 G20 A9 B9 C9 D9 A7 A4 U12 U15
C1407
C1407
1UF 10V
1UF 10V
C1413
C1413
0 1UF/16V
0 1UF/16V
C1426
C1426
0 1UF/16V
0 1UF/16V
C1408
C1408
1UF/10V
1UF/10V
C1414
C1414
0 1UF 16V
0 1UF 16V
C1427
C1427
0 1UF 16V
0 1UF 16V
C1417
C1417
1UF/10V
1UF/10V
C1409
C1409
1UF/10V
1UF/10V
C1415
C1415
0 1UF/16V
0 1UF/16V
C1428
C1428
0 1UF/16V
0 1UF/16V
C1410
C1410
10UF/10V
10UF/10V
C1416
C1416
10UF/10V
10UF/10V
C1429
C1429
10UF/10V
10UF/10V
C1411
C1411
10UF/10V
10UF/10V
+VDDC_NB
C1425
C1425
0 1UF/16V
0 1UF/16V
2
U1100E
U1100E
A25
VSS1
F11
PAR 5 OF 5
PAR 5 OF 5
VSS2
D23
VSS3
E9
VSS4
G11
VSS5
Y23
VSS6
P11
VSS7
R24
VSS8
AE18
VSS9
M15
VSS10
J22
VSS11
G23
VSS12
J12
VSS13
L12
VSS14
L14
VSS15
L20
VSS16
L23
VSS17
M11
VSS18
M20
VSS19
M23
VSS20
M25
VSS21
N12
VSS22
N14
VSS23
B7
VSS24
L24
VSS25
P13
VSS26
P20
VSS27
P15
VSS28
R12
VSS29
R14
VSS30
R20
VSS31
W23
VSS32
Y25
VSS33
AD25
VSS34
U20
VSS35
H25
VSS36
W24
VSS37
Y22
VSS38
AC23
VSS39
D25
VSS40
G24
VSS41
AC14
VSS42
H12
VSS43
AC22
VSS44
R23
VSS45
C4
VSS46
AE22
VSS47
T23
VSS48
T25
VSS49
AE14
VSS50
R17
VSS51
H23
VSS52
M17
VSS53
A23
VSS54
AC15
VSS55
F17
VSS56
D4
VSS57
AC16
VSS58
M13
VSS59
RS690M
RS690M
VSSA1 VSSA2 VSSA3 VSSA4 VSSA5 VSSA6 VSSA7 VSSA8
VSSA9 VSSA10 VSSA11 VSSA12 VSSA13 VSSA14 VSSA15 VSSA16 VSSA17 VSSA18 VSSA19 VSSA20 VSSA21 VSSA22 VSSA23 VSSA24 VSSA25 VSSA26 VSSA27 VSSA28 VSSA29 VSSA30 VSSA31 VSSA32 VSSA33 VSSA34 VSSA35 VSSA36 VSSA37 VSSA38 VSSA39 VSSA40 VSSA41 VSSA42 VSSA43 VSSA44 VSSA45 VSSA46 VSSA47 VSSA48
1
M3 V12 V11 V14 F3 V15 A1 H1 G3 J2 H3 AE10 J6 AE6 F1 L6 M2 M6 J3 P6 T1 N3 P9 R6 U2 T3 U3 U6 AC4 Y1 Y15 W6 AC2 Y3 Y9 Y11 R9 AD1 AC5 AC6 AC7 AD3 AC9 AC10 G6 Y12 Y14 AA3
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet
Engineer:
RS690M Power
RS690M Power
RS690M Power
Rev
Rev
Rev
2 0
2 0
2 0
of
14 69 14 2007
14 69 14 2007
14 69 14 2007
5
D D
C C
B B
4
3
2
1
A A
Title :
Title :
Title :
A7KM
A7KM
A7KM
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
<Doc>
<Doc>
<Doc>
Engineer:
Rev
Rev
Rev
2 0
2 0
2 0
15 69 14 2007
15 69 14 2007
15 69 14 2007
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
5
4
3
2
1
D D
C1600
C1600 22PF/25V
22PF/25V
12
C1606
C1606 22PF/25V
22PF/25V
12
R1615 33OhmR1615 33Ohm
1 2
GND
R1606 33OhmR1606 33Ohm
1 2
SMBCLK9 18 33 SMBDATA9 1833
R1608 10KOhmR1608 10KOhm R1617 33OhmR1617 33Ohm R1618 33OhmR1618 33Ohm
R1612 33OhmR1612 33Ohm R1614 33OhmR1614 33Ohm R1613 33OhmR1613 33Ohm R1619 33OhmR1619 33Ohm R1621 33OhmR1621 33Ohm R1623 33OhmR1623 33Ohm
R1625 33OhmR1625 33Ohm R1628 33OhmR1628 33Ohm R1627 33OhmR1627 33Ohm R1629 33OhmR1629 33Ohm
R1642
R1641
R1641
49 9Ohm
49 9Ohm
R1642
49 9Ohm
49 9Ohm
R1643
R1643
GNDGND GNDGNDGNDGND GNDGND
49 9Ohm
49 9Ohm
R1644
R1644
49 9Ohm
49 9Ohm
R1645
R1645
49 9Ohm
49 9Ohm
R1646
R1646
COMMENT
Reserved
Reserved
Reserved
Reserved
Reserved
Normal ATHLON64 operation
X1600
X1600
14 318Mhz
14 318Mhz
1 2 1 2 1 2
1 2 1 2 1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
G_CLKREQ#42
R1603
R1603 10MOhm
10MOhm
/x
/x
+3 3VS_CLK
VDDUSB_CLK
VDDREF_CLK
U1600
U1600
1
GNDREF
2
VDDREF
3
XTAL2_CLK
CLK_48M_USB_R SIO_CLK_R
ICS_RESET# GPP3_CLK_P_R GPP3_CLK_N_R
NB_CLKP NB_CLKN SB_CLKP SB_CLKN GFX_CLK_P_R GFX_CLK_N_R
GPP1_CLK_P_R GPP1_CLK_N_R GPP0_CLK_P_R GPP0_CLK_N_R
L1600
L1600
120Ohm/100Mhz
120Ohm/100Mhz
C1607
C1607 10UF/10V
10UF/10V
X1
4
X2
5
VDD48
6
48MHz_0
7
48MHz_1
8
GND48
9
SMBCLK
10
SMBDAT
11
RESET_IN#
12
SRCCLKT7
13
SRCCLKC7
14
VDDSRC1
15
GNDSRC1
16
SRCCLKT6
17
SRCCLKC6
18
SRCCLKT5
19
SRCCLKC5
20
SRCCLKT4
21
SRCCLKC4
22
GNDSRC2
23
VDDSRC2
24
SRCCLKT3
25
SRCCLKC3
26
SRCCLKT2
27
SRCCLKC2
28
VDDSRC3
29
GNDSRC3
30
ATIGCLKT3
31
ATIGCLKC3 *CLKREQB#32*CLKREQC#
CS951462AGLFT
CS951462AGLFT
GND GNDGND
21
GND
0 1UF/16V
0 1UF/16V
C1609
C1609
C1608
C1608
GNDGND GND GND
0 1UF/16V
0 1UF/16V
0 1UF 16V
0 1UF 16V
FS0/REF0 FS1/REF1 FS2/REF2
VDDHTT
HTTCLK0
GNDHTT *CLKREQA# CPUCLK8T0
CPUCLK8C0
VDDCPU
GNDCPU CPUCLK8T1
CPUCLK8C1
SRCCLKT0
SRCCLKC0
GNDSRC4
VDDSRC4
SRCCLKT1 SRCCLKC1 ATIGCLKT0
AT GCLKC0
VDDATIG GNDATIG
ATIGCLKT1
AT GCLKC1
ATIGCLKT2
AT GCLKC2
C1610
C1610
0 1UF/16V
0 1UF/16V
VDDA GNDA
IREF
NC
C1611
C1611
0 1UF/16V
0 1UF/16V
+3 3VS_CLK
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36
GND
35 34 33
C1612
C1612
0 1UF/16V
0 1UF/16V
VDDA_CLK
HTREFCLK_R
CPU_CLK_H_R CPU_CLK_L_R
IREF_CLK GPP2_CLK_P_R GPP2_CLK_N_R
NBGFX_CLK_P_R
NBGFX_CLK_N_R
+3 3VS_CLK+3VS
C1613
C1613
GNDGND GND
0 1UF/16V
0 1UF/16V
FS0 FS1 FS2
R1630
R1630
475Ohm
475Ohm
R1635
R1635
GNDGND
49 9Ohm
49 9Ohm
R1636
R1636
49 9Ohm
49 9Ohm
GND
R1637
R1637
GNDGND
49 9Ohm
49 9Ohm
S O_CLKCLK_48M_USB
C1605
C1605 10PF/50V
10PF/50V
/X
/X
R1638
R1638
49 9Ohm
49 9Ohm
S O_CLK
+3 3VS_CLK
R1640
R1640
R1639
R1639
49 9Ohm
49 9Ohm
49 9Ohm
49 9Ohm
C1604
C1604 10PF/50V
10PF/50V
/X
/X
GND
CLK_48M_USB18 SIO_CLK37
GPP3_CLK_P49 GPP3_CLK_N49
C C
NBLINK_CLKP13 NBLINK_CLKN13 SBL NK_CLKP17 SBL NK_CLKN17 GFX_CLK_P41 GFX_CLK_N41
GPP1_CLK_P26 GPP1_CLK_N26 GPP0_CLK_P40 GPP0_CLK_N40
49 9Ohm
49 9Ohm
B B
EXT CLK F REQUENCY SELECT T ABLE(MHZ)
FS1
FS0 USB
CPU
FS2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
A A
1 0 1
1 1 1
SRCCLK
[2:1]
Hi-Z
100.00
100.00
X Reserved
100.00 60.00
180.00
100.00 36.56
220.00
100.00
100.00
100.00
133.33
100.00
200.00
HTT
Hi-Z
X/3
66.66
66.66
66.66
PCI
Hi-Z
X/6
30.00
73.12
33.33
33.33
33.33
48.00
48.00
48.00
48.00
48.00
48.00
48.00
+3 3VS_CLK
R1600
R1600
R1601
R1601
10KOhm
10KOhm
10KOhm
10KOhm
R1604 33OhmR1604 33Ohm
1 2
R1605 33OhmR1605 33Ohm
R1607 33OhmR1607 33Ohm
1 2
R1616 47 5OhmR1616 475Ohm
1 2
47 5Ohm
47 5Ohm
1 2
R1609
R1609
R1620
R1620
1 2 1 2
R1622
R1622
R1624
R1624
1 2 1 2
R1626
R1626
R1631
R1631
49 9Ohm
49 9Ohm
1%
1%
GND
CLK_NEWCARD_REQ# 27
L1601
L1601
120Ohm/100Mhz
120Ohm/100Mhz
C1614
C1614
C1615
C1615
2 2UF 10V
2 2UF 10V
R1602
R1602 10KOhm
10KOhm
2
HTREFCLKCLK_48M_USB
R1610
R1610
1 2
261Ohm
261Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
33Ohm
21
GND
CLK_14M_SB
NB_OSCXTAL1_CLK
R1611
R1611
R1632
R1632
49 9Ohm
49 9Ohm
VDDUSB_CLK
GND
GND
R1633
R1633
49 9Ohm
49 9Ohm
C1616
C1616 0 1UF/16V
0 1UF/16V
49 9Ohm
49 9Ohm
GNDGND
CLK_14M_SB HTREFCLK
C1601
C1601 10PF/50V
10PF/50V
/X
/X
CLK_14M_SB 18
NB_OSC 13
HTREFCLK 13
MINI_PCIE_CLKREQ# 26
CPU_CLK_H 7 CPU_CLK_L 7
GPP2_CLK_P 27 GPP2_CLK_N 27
NBGFX_CLK_P 13 NBGFX_CLK_N 13
R1634
R1634
49 9Ohm
49 9Ohm
L1602
L1602
21
120Ohm/100Mhz
120Ohm/100Mhz
C1617
C1617
2 2UF/10V
2 2UF/10V
GND
NB_OSC
C1602
C1602 10PF 50V
10PF 50V
/X
/X
GNDGND
R1647
R1647 10KOhm
10KOhm
VDDREF_CLK
C1618
C1618 0 1UF 16V
0 1UF 16V
GND
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet
EMI
C1603
C1603 10PF 50V
10PF 50V
/X
/X
GND
Suggest by ATI due to
1.8V signaling
+3 3VS_CLK
R1649
R1649
R1648
R1648
10KOhm
10KOhm
10KOhm
10KOhm
CLK_NEWCARD_REQ#
MINI_PCIE_CLKREQ#
G_CLKREQ#
L1603
L1603
21
120Ohm/100Mhz
120Ohm/100Mhz
C1619
C1619 10UF/10V
10UF/10V
External Clock Generator
External Clock Generator
External Clock Generator
VDDA_CLK+3VS +3VS +3VS
GND
GND
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
C1620
C1620 0 1UF/16V
0 1UF/16V
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
16 69 14 2007
16 69 14 2007
16 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
of
5
A_C_RXP[0 3] 12 A_C_RXN[0 3] 12
21
21
12
R1715
R1715
20MOHM
20MOHM
A_RST#1326 27 28 37 40 41 49
C1717
C1717
22UF/6 3V
22UF/6 3V
D D
A_C_TXP[0 3]12 A_C_TXN[0 3]12
+1 2VS
L1700
L1700
220Ohm/100Mhz
220Ohm/100Mhz
C C
B B
A A
+1 2VS PCIE_VDDR
L1701
L1701
220Ohm/100Mhz
220Ohm/100Mhz
+1 8VS
R1718 1KOhmR1718 1KOhm
C1718
C1718
1UF 10V
1UF 10V
C1723
C1723
18PF/50V
18PF/50V
ALLOW_LDTSTOP
R1706 8 2KOhmR1706 8 2KOhm
1 2
SBLINK_CLKP16 SBLINK_CLKN16
A_C_RXP0 A_C_RXN0 A_C_RXP1 A_C_RXN1 A_C_RXP2 A_C_RXN2 A_C_RXP3 A_C_RXN3
A_C_TXP0 A_C_TXN0 A_C_TXP1 A_C_TXN1 A_C_TXP2 A_C_TXN2 A_C_TXP3 A_C_TXN3
PCIE_VDDR
C1719
C1719
1UF/10V
1UF/10V
32 768Khz
32 768Khz
X1700
X1700
1 2
R1716 20MOHMR1716 20MOHM
1 2
C1704 0 1UF 16VC1704 0 1UF 16V
1 2
C1712 0 1UF 16VC1712 0 1UF 16V
1 2
C1706 0 1UF 16VC1706 0 1UF 16V
1 2
C1714 0 1UF 16VC1714 0 1UF 16V
C1720
C1720
1UF 10V
1UF 10V
14
ALLOW_LDTSTOP13
CPU_PWROK7
4
R1700 33OhmR1700 33Ohm
1 2
1 2
C1700 0 1UF 16VC1700 0 1UF 16V
1 2
C1705 0 1UF 16VC1705 0 1UF 16V
1 2
C1713 0 1UF 16VC1713 0 1UF 16V
1 2
C1715 0 1UF 16VC1715 0 1UF 16V
R1711 562OhmR1711 562Ohm
1 2
R1712 2 05KOhmR1712 2 05KOhm
1 2
R1713 0OhmR1713 0Ohm
1 2
C1707
C1707
C1716
C1716
1UF/10V
1UF/10V
10UF/10V
10UF/10V
C1721
C1721
C1722
C1722
0 1UF/16V
0 1UF/16V
0 1UF 16V
0 1UF 16V
C1724
C1724
18PF 50V
18PF 50V
CPU_PWROK
LDT_STOP#7 13
LDT_RESET#7
LDT STOP#
T1709 TPC28TT1709 TPC28T T1710 TPC28TT1710 TPC28T T1711 TPC28TT1711 TPC28T
T1712 TPC28TT1712 TPC28T T1714 TPC28TT1714 TPC28T T1715 TPC28TT1715 TPC28T
A_TXP0 A_TXN0 A_TXP1 A_TXN1 A_TXP2 A_TXN2 A_TXP3 A_TXN3
32K_XIN
32K_XOUT
1 1 1
1 1 1
U1700A
U1700A
AG10
A_RST#
J24
PCIE_RCLKP
J25
PCIE_RCLKN
P29
PCIE_TX0P
P28
PCIE_TX0N
M29
PCIE_TX1P
M28
PCIE_TX1N
K29
PCIE_TX2P
K28
PCIE_TX2N
H29
PCIE_TX3P
H28
PCIE_TX3N
T25
PCIE_RX0P
T26
PCIE_RX0N
T22
PCIE_RX1P
T23
PCIE_RX1N
M25
PCIE_RX2P
M26
PCIE_RX2N
M22
PCIE_RX3P
M23
PCIE_RX3N
E29
PCIE_CALRP
E28
PCIE_CALRN
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
PCIE_VDDR_1
F28
PCIE_VDDR_2
F29
PCIE_VDDR_3
G26
PCIE_VDDR_4
G27
PCIE_VDDR_5
G28
PCIE_VDDR_6
G29
PCIE_VDDR_7
J27
PCIE_VDDR_8
J29
PCIE_VDDR_9
L25
PCIE_VDDR_1 0
L26
PCIE_VDDR_1 1
L29
PCIE_VDDR_1 2
N29
PCIE_VDDR_1 3
D2
X1
C1
X2
AC26
CPU_PG/LDT_ PG
W26
INTR/LINT0
W24
NM /LINT1
W25
INIT#
AA24
SMI#
AA23
SLP#/LDT_STP #
AA22
IGNNE#/SIC
AA26
A20M#/SID
Y27
FERR#
AA25
STPCLK#/ALL OW_LDTSTP
AH9
CPU_STP#/D PSLP_3V#
B24
DPSLP_OD# GP O37
W23
DPRSLPVR
AC25
LDT_RST#/DP RSTP#/PROCH OT#
SB600
SB600
SB600 SB 23x23mm
SB600 SB 23x23mm
Part 1 o f 4
Part 1 o f 4
SPDIF_OUT/ PCICLK7/GPIO41
LDRQ1#/GNT5 #/GPIO68
BMREQ# RE Q5#/GPIO65
RTC_IRQ#/GP IO69
3
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5 PCICLK6
PCIRST#
AD0/ROMA18 AD1/ROMA17 AD2/ROMA16 AD3/ROMA15 AD4/ROMA14 AD5/ROMA13 AD6/ROMA12 AD7/ROMA11
AD8/ROMA9
AD9/ROMA8 AD10/ROMA7 AD11/ROMA6 AD12/ROMA5 AD13/ROMA4 AD14/ROMA3 AD15/ROMA2 AD16/ROMD0 AD17/ROMD1 AD18/ROMD2 AD19/ROMD3 AD20/ROMD4 AD21/ROMD5 AD22/ROMD6 AD23/ROMD7
CBE0# ROMA1 0
CBE1#/ROMA1
CBE2#/ROMW E#
CBE3#
FRAME#
DEVSEL#/ROM A0
IRDY#
TRDY#/ROM OE#
PAR/ROMA1 9
STOP# PERR# SERR# REQ0# REQ1#
REQ2# REQ3#/GPIO 70 REQ4#/GPIO 71
GNT0#
GNT1#
GNT2# GNT3#/GPIO7 2 GNT4#/GPIO7 3
CLKRUN#
LOCK#
INTE#/GPIO3 3 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO3 6
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
RTC_GND
2
PCI_CLK_CB_R
U2
PCI_CLK_LAN_R
T2
LPC_CLK_EC_R
U1
LPC_CLK_DEBUG_R
V2
LPC_CLK_SO_R
W3
LPC_CON_DEBUG_R
U3 V1
R1709 0Ohm
R1709 0Ohm
T1
PCIRST#_XP
AJ9
PCI_AD0
W7
PCI_AD1
Y1
PCI_AD2
W8
PCI_AD3
W5
PCI_AD4
AA5
PCI_AD5
Y3
PCI_AD6
AA6
PCI_AD7
AC5
PCI_AD8
AA7
PCI_AD9
AC3
PCI_AD10
AC7
PCI_AD11
AJ7
PCI_AD12
AD4
PCI_AD13
AB11
PCI_AD14
AE6
PCI_AD15
AC9
PCI_AD16
AA3
PCI_AD17
AJ4
PCI_AD18
AB1
PCI_AD19
AH4
PCI_AD20
AB2
PCI_AD21
AJ3
PCI_AD22
AB3
PCI_AD23
AH3
PCI_AD24
AC1
AD24
PCI_AD25
AH2
AD25
PCI_AD26
AC2
AD26
PCI_AD27
AH1
AD27
PCI_AD28
AD2
AD28
PCI_AD29
AG2
AD29
PCI_AD30
AD1
AD30
PCI_AD31
AG1
AD31
PCI_C BE#0
AB9
PCI_C BE#1
AF9
PCI_C BE#2
AJ5
PCI_C BE#3
AG3 AA2 AH6 AG5 AA1 AF7 Y2 AG8 AC11 AJ8 AE2 AG9 AH8 AH5 AD11 AF2 AH7 AB12 AG4 AG7 AF6
AD3 AF1 AF4 AF3
1
LPC_AD0
AG24
LAD0
LPC_AD1
AG25
LAD1
LPC_AD2
AH24
LAD2
LPC_AD3
AH25
LAD3
AF24 AJ24 AH26 W22 AF23
RTCCLK
1
D3
1
F5
E1
VBAT
C1727
C1727
D1
0 1UF 16V
0 1UF 16V
1 2
T1716 TPC28TT1716 TPC28T
T1700 TPC28TT1700 TPC28T T1713 TPC28TT1713 TPC28T
+VCC_RTC
/x
/x
R1701 22OhmR1701 22Ohm
1 2
R1703 22OhmR1703 22Ohm
1 2
R1702 22OhmR1702 22Ohm
1 2
R1707 22OhmR1707 22Ohm
1 2
R1708 22OhmR1708 22Ohm
1 2
R1704 22OhmR1704 22Ohm
1 2
R1710 22OhmR1710 22Ohm
1 2
SPD F_OUT 30 31
PCI_AD[0 31] 25 38
PCIRST# IXP
8 2KOhm
8 2KOhm
GND
T1701 TPC28TT1701 TPC28T
1
T1702 TPC28TT1702 TPC28T
1
T1703 TPC28TT1703 TPC28T
1
T1704 TPC28TT1704 TPC28T
1
T1705 TPC28TT1705 TPC28T
1
T1706 TPC28TT1706 TPC28T
1
T1707 TPC28TT1707 TPC28T
1
T1708 TPC28TT1708 TPC28T
1
R1714
R1714
PCI_C/BE#[0 3] 25 38
PCI_FRAME# 25 38 PCI_DEVSEL# 25 38 PCI_IRDY# 25 38 PCI_TRDY# 25 38 PCI_PAR 2 538 PCI_STOP# 2538 PCI_PERR# 25 38 PCI_SERR# 25 38 PCI_REQ#0 38 PCI_REQ#1 25
PCI_GNT#0 38 PCI_GNT#1 25
PM_CLKRUN# 25 28 38
PCI_INTA# 25 PCI_INTB# 38 PCI_INTC# 38
LPC_AD[0 3 ] 27 28 37
LPC_FRAME# 27 2837 LPC_DRQ#0 37
BMREQ# 13 INT_SERIRQ 28 37 38
GND
C1708
C1708
C1701
C1701
10PF 50V
10PF 50V
/x
/x
10PF/50V
10PF/50V
10PF/50V
10PF/50V
/x
/x
+3VS
U1701
U1701
A
A
1
5
VCC
VCC
B
B
2
3 4
GND
GND
Y
Y
NC7SZ08P5X_NL
NC7SZ08P5X_NL
R17050Ohm
R17050Ohm
1 2
/x
/x
LPC_CLK_SIO
PULL HIGH
PULL LOW
+RTCBAT +3VA +VCC_RTC
T1717TPC28T T1717TPC28T
1
BAT1700
BAT1700
BATT_HOLDER
BATT_HOLDER
PCI_CLK_CB PCI_CLK_LAN
LPC_CLK_SIO
C1702
C1702
C1709
C1709
10PF 50V
10PF 50V
/x
/x
/x
/x
+3VS +3VS
R1719
R1719
10KOhm
10KOhm
PCICLK6 PCI_CLK_LAN
PCI_CLK4
USE INT. PLL48
USE EXT. 48MHZ
DEFAULT
R1723 499OHMR1723 499OHM
1 2
R1717 499OHMR1717 499OHM
1 2
Reversion 1.1
PCICLK6
C1703
C1703
10PF/50V
10PF/50V
x
x
PCIRST# 2225 35 38
PCI_CLK_CB
R1720
R1720
10KOhm
10KOhm
PCI_CLK6
CPU IF=K8
DEFAULT
CPU IF=P4
D1700
D1700
RB715F
RB715F
2
1
T1719
T1719
TPC28T
TPC28T
1
JRST1
JRST1 SGL_JUMP
SGL_JUMP
1
C1710
C1710
10PF 50V
10PF 50V
/x
/x
R1721
R1721
10KOhm
10KOhm
PCI_CLK1
ROM TYPE:
H, H = PCI R OM
L, H = SPI ROM
H, L = LPC ROM
L, L = FWH ROM
3
PCI_CLK_CB 38 PCI_CLK_LAN 25 LPC_CLK_EC 28 LPC_CLK_DEBUG 27 LPC CLK_SIO 37
LPC_CON_DEBUG 27
C1711
C1711
10PF/50V
10PF/50V
x
x
PCI_CLK0
1
C1725
C1725
1UF/10V
1UF/10V
DEFAULT
T1718 TPC28TT1718 TPC28T
C1726
C1726
4 7UF/6 3V
4 7UF/6 3V
X
X
R1722
R1722
10KOhm
10KOhm
Title :
Title :
Title :
A7K
A7K
A7K
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
SB600 PCIE/PCI/CPU/LPC
Date: Sheet of
Date: Sheet of
Date: Sheet of
Endy Zhang
17 69 14 2007
17 69 14 2007
17 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
4
3
2
1
+3VSUS
R1825
D D
C C
B B
A A
+3VSUS
R1813
R1813 2 2KOhm
2 2KOhm
+3VSUS
GPIO39
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
+3VSUS
+3VS
R1814
R1814 2 2KOhm
2 2KOhm
SMBCLK SYS
SMBDAT_SYS
R1800
R1800
1 2
10KOhm
10KOhm
SB_TEST0
R1805
R1805
10KOhm
10KOhm
/x
/x
R1808
R1808 2 2KOhm
2 2KOhm
GND
GND
10KOhm
10KOhm
/x
/x
R1809
R1809 2 2KOhm
2 2KOhm
SMBCLK
SMBDATA
DSP_SHI_EN33
+3VSUS
R1831
R1831 1KOhm
1KOhm
ECN 6/11/2007
GPUPWR_EN
ACZ_SDOUT
ACZ_BCLK
ACZ_SYNC
ACZ RST#
GND /x
/x
SYS_RST#
C1800
C1800
0 1UF 16V
0 1UF 16V
SB_TEST1
R1806
R1806
10KOhm
10KOhm
/x
/x
10KOhm
10KOhm
R1824
R1824
1 2
R1815 22OhmR1815 22Ohm
R1816 22OhmR1816 22Ohm
R1817 22OhmR1817 22Ohm
R1818 22OhmR1818 22Ohm
R1819 22OhmR1819 22Ohm
R1820 22OhmR1820 22Ohm
R1821 22OhmR1821 22Ohm
R1823 22OhmR1823 22Ohm
R1822
R1822
10KOhm
10KOhm
SB_TEST2
R1807
R1807
R1802
R1802
PCI_PME#_SB25
KB_SCI#28 PM_SUSB#28 PM_SUSC#28
PM_PWRBTN#28
PWRGD13 28 33 67
A20GATE_SB60028 KBRST#_SB60028
LPC_PME#37 LPC_SMI#28
SB_WAKE#25 26 27
NCP#27
CPU_THERMTRIP#7 28
PM_RSMRST#28
CLK_14M_SB16
BT_DET#36
802_LED_EN#50 CB_HWSUSPEND38
SB_SPKR30
SMBCLK9 16 33
SMBDATA9 1633 SMBCLK_SYS26 27 SMBDAT_SYS26 27
BT_ON#36 52
WLAN_ON#52
BAT_LL#28
x
x
GND
USB_OC#436 USB_OC#2336 USB_OC#0136
10KOhm
10KOhm
ACZ_SDIN030 ACZ_SDIN134
12
CODEC_SDOUT 30
12
MDC_SDOUT 34
12
CODEC_BCLK 30
12
MDC_BCLK 34
12
MDC_SYNC 34
12
CODEC_SYNC 30
12
MDC_RST# 34
12
CODEC_RST# 30 31
R1825
10KOhm
10KOhm
R1801
R1801
1 2
0Ohm
0Ohm
T1800 TPC28TT1800 TPC28T
SYS_RST#
PM_RSMRST#
R1810 0OhmR1810 0Ohm
1 2
R1812 0OhmR1812 0Ohm
1 2
GPUPWR_EN
ACZ_BCLK ACZ_SDOUT
ACZ_SYNC ACZ_RST#
KEYID
PM_PWRBTN#
SB_PWRGD
1
+3VSUS
R1827
R1827
10KOhm
10KOhm
KB_SCI#
U1700D
U1700D
A3
PCI_PME#/GE VENT4#
B2
R #/EXTEVNT0 #
F7
SLP_S3#
A5
SLP_S5#
E3
PWR_BTN#
B5
PWR_GOOD
B3
SUS_STAT#
F9
TEST2
E9
TEST1
G9
TEST0
AF26
GA20IN
AG26
KBRST#
D7
LPC_PME#/GE VENT3#
C25
LPC_SMI#/EXT EVNT1#
D9
S3_STATE/G EVENT5#
F4
SYS_RESET # GPM7#
E7
WAKE#/GEV ENT8#
C2
BLINK/GPM6#
G7
SMBALERT#/ THRMTR P#/GEV ENT2#
E2
RSMRST#
B23
14M_OSC
C28
SATA_IS0#/GP IO10
A26
ROM_CS#/G PIO1
B29
GHI#/SATA_I S1#/GPIO6
A23
WD_PWRGD GP O7
B27
SMARTVOLT SATA_IS2#/GP IO4
D23
SHUTDOWN # GPIO5
B26
SPKR GPIO2
C27
SCL0/GPOC0#
B28
SDA0/GPOC1 #
C3
SCL1/GPOC2#
F3
SDA1/GPOC3 #
D26
DDC1_SCL/GP IO9
C26
DDC1_SDA/G P O8
A27
SSMUXSEL S ATA_IS3#/GPIO 0
A4
LLB#/GP O66
C6
USB_OC9#/S LP_S2/GPM9#
C5
USB_OC8#/A Z_DOCK_RST# GPM8#
C4
USB_OC7#/GE VENT7#
B4
USB_OC6#/GE VENT6#
B6
USB_OC5#/D DR3_RST#/GPM 5#
A6
USB_OC4#/GP M4#
C8
USB_OC3#/GP M3#
C7
USB_OC2#/GP M2#
B8
USB_OC1#/GP M1#
A8
USB_OC0#/GP M0#
N2
AZ_BITCLK
M2
AZ_SDOUT
K2
AZ_SDIN3/GP IO46
L3
AZ_SYNC
K3
AZ_RST#
L1
AC_BITCLK G PIO38
L2
AC_SDOUT G PIO39
L4
ACZ_SDIN0/G PIO42
J2
ACZ_SDIN1/G PIO43
J4
ACZ_SDIN2/G PIO44
M3
AC_SYNC GP O40
L5
AC_RST#/GP IO45
E23
NC1
AC21
NC2
AD7
NC3
AE7
NC4
AA4
NC5
T4
NC6
D4
NC7
AB19
NC8
SB600
SB600
SB600 SB 23x23mm
SB600 SB 23x23mm
OSC / RST
OSC / RST
Part 4 o f 4
Part 4 o f 4
USBCLK
USB_RCOMP
USB_ATEST1 USB_ATEST0
USB_HSDP9+
USB_HSDM9
USB_HSDP8+
USB_HSDM8
USB_HSDP7+
USB_HSDM7
USB_HSDP6+
USB_HSDM6
USB_HSDP5+
USB_HSDM5
USB_HSDP4+
USB_HSDM4
USB_HSDP3+
USB_HSDM3
USB_HSDP2+
USB_HSDM2
USB_HSDP1+
USB_HSDM1
USB_HSDP0+
USB_HSDM0
AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4
AVDDC
AVSSC
AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8
AVSS_USB_9 AVSS_USB_1 0 AVSS_USB_1 1 AVSS_USB_1 2 AVSS_USB_1 3 AVSS_USB_1 4 AVSS_USB_1 5 AVSS_USB_1 6 AVSS_USB_1 7 AVSS_USB_1 8 AVSS_USB_1 9 AVSS_USB_2 0 AVSS_USB_2 1 AVSS_USB_2 2 AVSS_USB_2 3 AVSS_USB_2 4 AVSS_USB_2 5 AVSS_USB_2 6 AVSS_USB_2 7 AVSS_USB_2 8 AVSS_USB_2 9 AVSS_USB_3 0 AVSS_USB_3 1 AVSS_USB_3 2 AVSS_USB_3 3
0Ohm
0Ohm
R1803
R1803
A17
1 2
USB_RB AS
A14
A11 A10
H12 G12
E12 D12
E14 D14
G14 H14
D16 E16
D18 E18
G16 H16
G18 H18
D19 E19
G19 H19
B9 B11 B13 B16 B18 A9 B10 B12 B14 B17
A12
A13
A16 C9 C10 C11 C12 C13 C14 C16 C17 C18 C19 C20 D11 D21 E11 E21 F11 F12 F14 F16 F18 F19 F21 G11 G21 H11 H21 J11 J12 J14 J16 J18 J19
1 1
R1804
R1804
AVDDC_SB
CLK_48M_USB 16
1 2
11 8KOhm
11 8KOhm T1802 TPC28TT1802 TPC28T T1801 TPC28TT1801 TPC28T
USB_PP9 40 USB_PN9 40
USB_PP7 27 USB_PN7 27
USB_PP6 22 USB_PN6 22
USB_PP5 36 USB_PN5 36
USB_PP4 36 USB_PN4 36
USB_PP3 36 USB_PN3 36
USB_PP2 36 USB_PN2 36
USB_PP1 36 USB_PN1 36
USB_PP0 36 USB_PN0 36
C1801
C1801
22UF/6 3V
22UF/6 3V
C1809
C1809
2 2UF/10V
2 2UF/10V
C1810
C1810
0 1UF/16V
0 1UF/16V
C1803
C1803
1UF 10V
1UF 10V
L1801
L1801
21
220Ohm/100Mhz
220Ohm/100Mhz
+3VS
R1811
R1811
10KOhm
10KOhm
/x
/x
R1826
R1826
10KOhm
10KOhm
/x
/x
GND
C1804
C1804
1UF 10V
1UF 10V
AVDD_USB
220Ohm/100Mhz
C1806
C1806
C1805
C1805
0 1UF 16V
0 1UF 16V
1UF/10V
1UF/10V
+3V
GPUPWR_EN
1
KEY D
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Date: Sheet of
Date: Sheet of
Date: Sheet of
220Ohm/100Mhz
C1807
C1807
C1808
C1808
0 1UF 16V
0 1UF 16V
0 1UF/16V
0 1UF/16V
+3VSUS
R1828
R1828 10KOhm
10KOhm
N/A
N/A
3
3
D
D
Q1801
Q1801
1
1
2N7002
2N7002
G
G
S
S
N/A
N/A
2
2
GND
Size Project Name
Size Project Name
Size Project Name
SB600 ACPI/GPIO/USB/AC97/AZA
SB600 ACPI/GPIO/USB/AC97/AZA
SB600 ACPI/GPIO/USB/AC97/AZA
+3V
L1800
L1800
21
T1803 TPC28TT1803 TPC28T
1
GPUPWR_EN# 48 60 66
Title :
Title :
Title :
A7K
A7K
A7K
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Rev
Rev
Rev
2 0
2 0
2 0
18 69 14 2007
18 69 14 2007
18 69 14 2007
5
D D
C C
B B
Rev 2.0
SATA_TXP035 SATA_TXN035
SATA_RXN035 SATA_RXP035
R1901
R1901
12
10MOhm
10MOhm
X1900
X1900
1 2
1 2
25Mhz
25Mhz
C1905
C1905 10PF/50V
10PF/50V
GND
+1 2VS PLLVDD_SATA
L1900
L1900
21
220Ohm/100Mhz
220Ohm/100Mhz
+3VS XTLVDD_SATA
L1901
L1901
21
220Ohm/100Mhz
220Ohm/100Mhz
+1 2VS
L1902
L1902
21
220Ohm/100Mhz
220Ohm/100Mhz
22UF/6 3V
22UF/6 3V
C1911
C1911
C1912
C1912
1UF/10V
1UF/10V
C1906
C1906
1UF 10V
1UF 10V
C1909
C1909
1UF 10V
1UF 10V
SATA_X1
C1902
C1902 10PF/50V
10PF/50V
C1913
C1913
1UF/10V
1UF/10V
4
C1900 0 01UF/16VC1900 0 01UF/16V
1 2
C1903 0 01UF/16VC1903 0 01UF/16V
2
C1901 0 01UF/16VC1901 0 01UF/16V
1 2
C1904 0 01UF/16VC1904 0 01UF/16V
1 2
R1900
R1900
1 2
1KOhm 1%
1KOhm 1%
GND
SATA_X2
SATA_LED#50
PLLVDD_SATA
XTLVDD_SATA
AVDD_SATA
C1907
C1907
1UF/10V
1UF/10V
C1914
C1914
0 1UF/16V
0 1UF/16V
AVDD_SATA
0 1UF/16V
0 1UF/16V
C1915
C1915
SATA_TX0+ SATA_TX0
SATA_RX0 SATA_RX0+
SATA_CAL
AH21
AJ21
AH20
AJ20
AH18
AJ18
AH17
AJ17
AH13 AH14
AH16
AJ16
AJ11
AH11
AH12
AJ13
AF12
AD16
AD18
AC12
AD14
AJ10
AC16
AE14 AE16 AE18 AE19 AF19 AF21 AG22 AG23 AH22 AH23
AJ12 AJ14 AJ19 AJ22 AJ23
AB14 AB16 AB18 AC14 AC18 AC19 AD12 AD19 AD21 AE12 AE21 AF11 AF14 AF16 AF18 AG11 AG12 AG13 AG14 AG16 AG17 AG18 AG19 AG20 AG21 AH10 AH19
U1700B
U1700B
SATA_TX0+ SATA_TX0
SATA_RX0 SATA_RX0+
SATA_TX1+ SATA_TX1
SATA_RX1 SATA_RX1+
SATA_TX2+ SATA_TX2
SATA_RX2 SATA_RX2+
SATA_TX3+ SATA_TX3
SATA_RX3 SATA_RX3+
SATA_CAL
SATA_X1
SATA_X2
SATA_ACT#/G PIO67
PLLVDD_SAT A_1 PLLVDD_SAT A_2
XTLVDD_SATA
AVDD_SATA_ 1 AVDD_SATA_ 2 AVDD_SATA_ 3 AVDD_SATA_ 4 AVDD_SATA_ 5 AVDD_SATA_ 6 AVDD_SATA_ 7 AVDD_SATA_ 8 AVDD_SATA_ 9 AVDD_SATA_ 10 AVDD_SATA_ 11 AVDD_SATA_ 12 AVDD_SATA_ 13 AVDD_SATA_ 14 AVDD_SATA_ 15
AVSS_SATA_ 1 AVSS_SATA_ 2 AVSS_SATA_ 3 AVSS_SATA_ 4 AVSS_SATA_ 5 AVSS_SATA_ 6 AVSS_SATA_ 7 AVSS_SATA_ 8 AVSS_SATA_ 9 AVSS_SATA_ 10 AVSS_SATA_ 11 AVSS_SATA_ 12 AVSS_SATA_ 13 AVSS_SATA_ 14 AVSS_SATA_ 15 AVSS_SATA_ 16 AVSS_SATA_ 17 AVSS_SATA_ 18 AVSS_SATA_ 19 AVSS_SATA_ 20 AVSS_SATA_ 21 AVSS_SATA_ 22 AVSS_SATA_ 23 AVSS_SATA_ 24 AVSS_SATA_ 25 AVSS_SATA_ 26 AVSS_SATA_ 27
SB600
SB600
3
SB600 SB 2 3x23mm
SB600 SB 2 3x23mm
Part 2 o f 4
Part 2 o f 4
SPI_HOLD#/G PIO31
LAN_RST#/GP IO13
ROM_RST#/G PIO14
FANOUT1/GP IO48 FANOUT2/GP IO49
TEMPIN0 GP IO61 TEMPIN1 GP IO62 TEMPIN2 GP IO63
TEMPIN3/TA LERT#/GPIO64
IDE_IORDY
IDE_IRQ
IDE_A0 IDE_A1 IDE_A2
DE_DACK#
IDE_DRQ
DE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#
IDE_D0 GPIO1 5 IDE_D1 GPIO1 6 IDE_D2 GPIO1 7 IDE_D3 GPIO1 8 IDE_D4 GPIO1 9 IDE_D5 GPIO2 0 IDE_D6 GPIO2 1 IDE_D7 GPIO2 2 IDE_D8 GPIO2 3 IDE_D9 GPIO2 4 DE_D10/GPIO 25 DE_D11/GPIO 26 DE_D12/GPIO 27 DE_D13/GPIO 28 DE_D14/GPIO 29 DE_D15/GPIO 30
SPI_DI GPIO1 2
SPI_DO GPIO1 1
SPI_CLK GPIO 47
SPI_CS# GPIO 32
FANOUT0/GP IO3
FANIN0 GPIO 50 FANIN1 GPIO 51 FANIN2 GPIO 52
TEMP_COMM
VIN0 GPIO53 VIN1 GPIO54 VIN2 GPIO55 VIN3 GPIO56 VIN4 GPIO57 VIN5 GPIO58 VIN6 GPIO59 VIN7 GPIO60
AVDD
AVSS
2
AB29 AA28 AA29 AB27 Y28 AB28 AC27 AC29 AC28 W28 W27
IDE_PDD0
AD28
IDE_PDD1
AD26
IDE_PDD2
AE29
IDE_PDD3
AF27
IDE_PDD4
AG29
IDE_PDD5
AH28
IDE_PDD6
AJ28
IDE_PDD7
AJ27
IDE_PDD8
AH27
IDE_PDD9
AG27
IDE_PDD10
AG28
IDE_PDD11
AF28
IDE_PDD12
AF29
IDE_PDD13
AE28
IDE_PDD14
AD25
IDE_PDD15
AD29
J3 J6 G3 G2 G6
C23 G5
GPIO3
M4
GPIO48
T3
GPIO49
V4
GPIO50
N3
GPIO51
P2
GPIO52
W4
TEMP_COMM
P5
GPIO61
P7
TEMPIN_NB
P8
GPIO63
T8
PM_THERM#
T7
GPU_RST#
V5 L7
GPU 2C_EN#
M8
PANEL_ID0
V6
PANEL_ID1
M6 P4
BT_LED_EN#
M7
EMA L_LED#
V7
HWM AVDD
N1
M1
GND
GND
1 1 1
1 1 1
1
1
1
C1916
C1916
0 1UF/16V
0 1UF/16V
IDE_P ORDY 35 INT_IRQ14 35 IDE_PDA0 35 IDE_PDA1 35 IDE_PDA2 35
DE_PDDACK# 35
IDE_PDDREQ 35
DE_PDIOR# 35 DE_PDIOW# 35 DE_PDCS#1 35 DE_PDCS#3 35
IDE_PDD[15:0] 35
T1905 TPC28TT1905 TPC28T T1906 TPC28TT1906 TPC28T T1907 TPC28TT1907 TPC28T
T1908 TPC28TT1908 TPC28T T1909 TPC28TT1909 TPC28T T1910 TPC28TT1910 TPC28T
T1912 TPC28TT1912 TPC28T
T1911 TPC28TT1911 TPC28T
T1913 TPC28TT1913 TPC28T
L1903
L1903
220Ohm/100Mhz
220Ohm/100Mhz
C1917
C1917
2 2UF 10V
2 2UF 10V
GND
PM_THERM# 28
GPU_RST# 41
GPUI2C_EN# 22
BT_LED_EN# 50 EMAIL_LED# 50
21
SB_THRO_CPU 7
NB_SELV_EN 13
+3VS
R1907 2 2KOhmR1907 2 2KOhm
R1908 2 2KOhmR1908 2 2KOhm
R1914
R1914
R1902 0OhmR1902 0Ohm
C1908
C1908 0 01UF/16V
0 01UF/16V
R1903 0OhmR1903 0Ohm
PANEL_ID0
PANEL_ID1
1 2
1 2
1 2
1 2
GPU 2C_EN#
10KOhm
10KOhm
+3VS
TEMPIN_NB
TEMP_COMM
10KOhm
10KOhm
R1913
R1913
10KOhm
10KOhm
R1915
R1915
1
PANEL_ID0 22
PANEL_ID1 22
/A7K
/A7K
GPU_RST#BT_LED_EN#EMA L_LED#
NB_THERMD_P 13
NB_THERMD_N 13
R1909
R1909
10KOhm
10KOhm
+3VS+3VS+3VS
A7K
A7K
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet of
Engineer:
SB60 SATA/IDE/HWM/SPI
SB60 SATA/IDE/HWM/SPI
SB60 SATA/IDE/HWM/SPI
19 69 14 2007
19 69 14 2007
19 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
5
+3VS
C2000
C2000
C2001
C2025
C2025
2 2UF/10V
2 2UF/10V
C2027
C2027
2 2UF/10V
2 2UF/10V
22UF/6 3V
22UF/6 3V
C2007
C2007
22UF/6 3V
22UF/6 3V
C2012
C2012
22UF/6 3V
22UF/6 3V
C2015
C2015
0 1UF/16V
0 1UF/16V
C2019
C2019
22UF/6 3V
22UF/6 3V
C2001
1UF/10V
1UF/10V
C2008
C2008
1UF/10V
1UF/10V
0 1UF 16V
0 1UF 16V
0 1UF 16V
0 1UF 16V
0 1UF 16V
0 1UF 16V
+
+
CE2000
CE2000
150UF/4V
150UF/4V
/x
D D
C C
B B
/x
+1 2VS
+3VSUS
+1 2VSUS
+1 2V
+3VS AVDDCK_33V
L2000
L2000
21
220Ohm 100Mhz
220Ohm 100Mhz
GND
AVDDCK_12V+12VS
L2001
L2001
21
220Ohm 100Mhz
220Ohm 100Mhz
GND
C2013
C2013
C2016
C2016
C2020
C2020
4
C2004
C2004
C2003
C2003
C2002
C2002
1UF/10V
1UF/10V
1UF 10V
1UF 10V
C2009
C2009
C2010
C2010
1UF 10V
1UF 10V
1UF/10V
1UF/10V
C2014
C2014
0 1UF/16V
0 1UF/16V
GND
C2017
C2017
C2018
C2018
0 1UF/16V
0 1UF/16V
0 1UF/16V
0 1UF/16V
GND
C2021
C2021
C2022
C2022
0 1UF/16V
0 1UF/16V
0 1UF/16V
0 1UF/16V
GND
GND
1UF 10V
1UF 10V
C2011
C2011
1UF 10V
1UF 10V
C2023
C2023
0 1UF/16V
0 1UF/16V
+1 8VS
+5VS
+3VS
C2005
C2005
1UF/10V
1UF/10V
C2006
C2006
1UF/10V
1UF/10V
GND
GND
R2000 1KOhmR2000 1KOhm
1 2
D2000
D2000
1
2
BAT54C
BAT54C
3
+3VS
+1 2VS
+3VSUS
+1 2VSUS
+1 2V
C2024
C2024
0 1UF 16V
0 1UF 16V
AVDDCK_33V
3
AVDDCK_12V
C2026
C2026
1UF 10V
1UF 10V
GND
GND
A25 A28 C29 D24
L9
L21
M5 P3 P9
T5 V9 W2 W6
W21
W29 AA12 AA16 AA19
AC4 AC23 AD27
AE1
AE9 AE23 AH29
AJ2 AJ6
AJ26
M13
M17
N12 N15 N18 R13 R17 U12 U15 U18 V13 V17
A2 A7
F1 J5 J7
K1
G4 H1 H2 H3
A18 A19 B19 B20 B21
AA27
AE11
A24
A22
B22
V29 V28 V27 V26 V25 V24 V23 V22 U27 T29 T28 T27 T24 T21 P27
U1700C
U1700C
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14 VDDQ_15 VDDQ_16 VDDQ_17 VDDQ_18 VDDQ_19 VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25 VDDQ_26 VDDQ_27 VDDQ_28
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 VDD_10 VDD_11 VDD_12
S5_3 3V_1 S5_3 3V_2 S5_3 3V_3 S5_3 3V_4 S5_3 3V_5 S5_3 3V_6
S5_1 2V_1 S5_1 2V_2 S5_1 2V_3 S5_1 2V_4
USB_PHY_1 2V_1 USB_PHY_1 2V_2 USB_PHY_1 2V_3 USB_PHY_1 2V_4 USB_PHY_1 2V_5
CPU_PWR
V5_VREF
AVDDCK_3 3V
AVDDCK_1 2V
AVSSCK
PC E_VSS_42 PC E_VSS_41 PC E_VSS_40 PC E_VSS_39 PC E_VSS_38 PC E_VSS_37 PC E_VSS_36 PC E_VSS_35 PC E_VSS_34 PC E_VSS_33 PC E_VSS_32 PC E_VSS_31 PC E_VSS_30 PC E_VSS_29 PC E_VSS_28
SB600
SB600
SB600 SB 2 3x23mm
SB600 SB 2 3x23mm
Part 3 o f 4
Part 3 o f 4
VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57
PCIE_VSS_1 PCIE_VSS_2 PCIE_VSS_3 PCIE_VSS_4 PCIE_VSS_5 PCIE_VSS_6 PCIE_VSS_7 PCIE_VSS_8
PCIE_VSS_9 PC E_VSS_10 PC E_VSS_11 PC E_VSS_12 PC E_VSS_13 PC E_VSS_14 PC E_VSS_15 PC E_VSS_16 PC E_VSS_17 PC E_VSS_18 PC E_VSS_19 PC E_VSS_20 PC E_VSS_21 PC E_VSS_22 PC E_VSS_23 PC E_VSS_24 PC E_VSS_25 PC E_VSS_26 PC E_VSS_27
2
A20 A21 A29 B1 B7 B25 C21 C22 C24 D6 E24 F2 F23 G1 J1 J8 L6 L8 M9 M12 M15 M18 N13 N17 P1 P6 P21 R12 R15 R18 T6 T9 U13 U17 V3 V8 V12 V15 V18 V21 W1 W9 Y29 AA11 AA14 AA18 AC6 AC24 AD9 AD23 AE3 AE27 AG6 AJ1 AJ25 AJ29
D27 D28 D29 F26 G23 G24 G25 H27 J23 J26 J28 K27 L22 L23 L24 L27 L28 M21 M24 M27 N27 N28 P22 P23 P24 P25 P26
GND
1
A A
Title :
Title :
Title :
A7K
A7K
A7K
Endy Zhang
Endy Zhang
Endy Zhang
Engineer:
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Date: Sheet of
Date: Sheet of
Date: Sheet
Engineer:
SB600 Power & Decoupling
SB600 Power & Decoupling
SB600 Power & Decoupling
20 69 14 2007
20 69 14 2007
20 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
of
5
4
3
2
1
D D
OS#_OC
1 2
VCC
VCC
GND
GND
R2101
R2101 200Ohm
200Ohm
AO
AO
BO
BO
c0402
c0402
1
7
12
OS#_OC
CPU_THERMADA
CPU_THERMADC
+12V
GND
+3VS
R2106
R2106
1 2
330Ohm
330Ohm
CPU_THERMADA 7 CPU_THERMADC 7
C2103
C2103 1000PF/16V
1000PF/16V
+5VS
2 3
C2107
C2107
0 1UF/16V
0 1UF/16V
ADDRESS:98H
SMB1_CLK28 48 SMB1_DAT28 48
C2100
C2100
C2101
C2101
100PF/50V
100PF/50V
100PF/50V
100PF/50V
/x
/x
x
x
C C
+5VS
R2103
R2103 10KOhm
10KOhm
r0402_h16
1
FAN_PWM
r0402_h16
FAN_PWM#
3
3
Q2103
Q2103
D
D
1
1
G
G
S
S
2
2
2N7002
2N7002
R2107
R2107
OS#_OC_GPU48
B B
1 2
1KOhm
1KOhm
OS#_OC
FAN_PWM28
U2100
U2100
8
SCLK
7
SDA
6
ALERT#
5
GND
MAX6657MSA
MAX6657MSA
GND GND
R2105 100KOhm
R2105 100KOhm
1 2
r0603_h24
r0603_h24
4700PF 25V
4700PF 25V
Max: 1mA
VCC DXP DXN
OVERT#
+5VS_FAN
GND
+3VS_THM
1 2 3 4
C2102
C2102 0 1UF 16V
0 1UF 16V
C2104 1000PF/16V
C2104 1000PF/16V
U2101
U2101
A+
A+
348
+
+
A
A
2
B+
B+
5
+
+
C2106
C2106
B
B
6
LM358MX
LM358MX
+5VS
GND
1 2
R2104
R2104 10KOhm
10KOhm
APM2301BAC
APM2301BAC
Q2102
Q2102
+3VS
Route CPU_THRM_DA and CPU_THRM_DC on the same layer
------------------OTHER SIGNALS 15 mils ===============GND 10 mils =========H_THERMDA(10 mils) 10 mils =========H_THERMDC(10 mils) 10 mils =========GND 15 mils
---------------------OTHER SIGNALS
Avoid FSB,Power
R2102 10KOhm
R2102 10KOhm
1 2
r0402_h16
+5VS_FAN
+5VS_FAN
+
+
CE2001
CE2001
D2101
D2101
1SS355
1SS355 100U 6 3V
100U 6 3V
GND
GND
r0402_h16
FAN_TACH
CON2100
CON2100
OLD1
OLD1
1
W oB_CON_3P
W oB_CON_3P
2 3
OLD2
OLD2
GND
GNDGND
GND
C2105
C2105
2200PF/50V
2200PF/50V
c0603
c0603
+3VS
FAN0_TACH 28
A A
Title :
Title :
Title :
A7K
A7K
A7K
Engineer:
Endy Zhang
Engineer:
Endy Zhang
Engineer:
ASUSTECH CO LTD
ASUSTECH CO LTD
ASUSTECH CO LTD
Size Project Name
Size Project Name
Size Project Name
Thermal Fan Control
Thermal Fan Control
Thermal Fan Control
Date: Sheet of
Date: Sheet of
Date: Sheet
Endy Zhang
of
21 69 14 2007
21 69 14 2007
21 69 14 2007
Rev
Rev
Rev
2 0
2 0
2 0
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