ASUS A6G Schematics
5
4
3
2
1
FILE LIST
01_BLOCK DIAGRAM
CLOCK GEN
A6G
D D
ICS 950815
Page 23
BLOCK
THERMAL
DIAGRAM
SENSOR
Page 5
VRAM *4
LCD
Page 17
CRT
Page 18
C C
TV-OUT
Page 18
AUDIO AMP & MIC
Page 36,37
LVDS
RGB
AC'97 CODEC
Realtek ALC650
Page 15,16
VGA
ATI M11-P
Page 12,13,14
Page 35
AGP 4X
AC97
MDC
Page 36
PCI
B B
CARDBUS/1394
RICOH R5C593
Page 26,27
1394
Page 26
PCMCIA
Page 28
LAN KBC
Realtek RTL8100CL
Page 24
LAN & Modem Jack
Page 38
Card Reader
Page 27
A A
Audio DJ
Page 40
DC FAN
Page 40
5
Screw Hole
EMI Cap.
4
MINIPCI
Page 25
USB CCD
Page 52
Page 52
CPU
BANIAS
24.5W
Page 3,4
PSB
NORTH
BRIDGE
Intel 855GME
3.8W
Page 6,7,8,9
HUB
SOUTH
BRIDGE
Intel ICH4-M
2.9W
Page 19,20,21,22
USB 2.0
USB CON *4
Page 17
Discharge Circuit
Function Key
3
DDR
DUAL DDR SO-DIMM
IDE
SECONDARY IDE
LPC
M38857
Page 31
Page 39
Page 34
Page 41
POWER
(IMVP4)
Page 43,44,45,46,47,48,49,50
VGA POWER
Page 51
DDR TERMINATION
Page 11
PRIMARY IDE
Page 29
Page 30
SIO
ITE8705
Page 32
PRINTER PORT
Page 33
2
Page 10
SIR
Page 33
02_POWER DIAGRAM
03_CPU-BANIAS(HOST)
04_CPU-BANIAS(PWR)
05_THERMAL SENSOR
06_NB-MCHM(DDR)
07_NB-MCHM(HOST)
08_NB-MCHM(VGA)
09_NB-MCHM(PWR)
10_DUAL DDR SODIMM
11_DDR TREMINATION
12_ATI M11-P(AGP,LVDS)
13_ATI M11-P(MEMORY IF)
14_ATI M11-P(PWR)
15_VRAM(A CHANNEL)
16_VRAM(B CHANNEL)
17_LVDS & BACKLIGHT
18_CRT & TV-OUT
19_ICH4-M(HUB_PCI)
20_ICH4-M(H_U_IDE_PM)
21_ICH4-M(PWR)
22_ICH4-M(PULLUP)
23_CLOCK-ICS950815
24_LAN-RTL8100CL
25_MINIPCI
26_CB1394-R5C593 (1)
27_CB1394-R5C593 (2)
28_PCMCIA SOCKET
29_IDE-HDD
30_IDE-ODD
31_KBC-M38857
32_SIO-ITE8705 & FWH
33_LPT PORT & IR
34_DISCHARGE CIRCUIT
35_CODEC-ALC650
36_AUDIO AMP
37_MIC
38_MDC & RJ45 & RJ11
39_USB
40_FAN & AUDIO DJ
41_FUNCTION KEY
42_PWR & RESET SEQ
43_VCORE
44_1.25V&1.8V
45_2.5V&1.5V&1.2V& 1. 05 V
46_SYSTEM
47_LOAD SWITCH
48_CHARGER
49_PIC16C54
50_BATLOW/SD#
51_VGACORE
52_SCREW HOLE & EMI CAP
53_M/B SETTING
54_REVISION HISTORY
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
Engineer:
A6G
1
BLOCK DIAGRAM
John Hung
154Friday, October 15, 2004
of
Rev
1.1
5
System work voltage
Adapter in : 19.5 ~18.5 V
Battery in : 16.8 ~ 11.6V
CPU_VRON
D D
AC_BAT_SYS
MAX1987
4
3
2
1
+V1.25S : JP4,5 page 39
+V2.5 : JP6 page 40
+V1.2S : JP7 page 40
VR_VID0-VR_VID5
PM_STPCPU#.,PM_DPRSLPVR.,PCI#.,MCH_OK.,CLK_EN#
+VCCP : JP9 page 40
+V5S : JP13 page 42
+V5 : JP14 page 42
+VCORE
(25A)
+V1.5SUS : JP15 page 39
+V1.8 : JP16,19 page 39
VRM_PWRGD
+V1.8S : JP17 page42
+V12 : JP18 page 42
+V1.5S : JP22 page 40
SUSC#.
(3V_ON)
LTC3728
(Regulator)
SUSB#
SUSC#
+1.5VO
+2.5VO
78L12
(2A)
+5VO
+V3.3SUS
+12VO
(0.15A)
+V1.5S
+V2.5
(5A)
(5A)
SUSB#
SUSB#
SUSC#
SUSB#
SUSB#
+V5S
+V3S
+V5
+V3
+V12S
+V12
+V1.5S(5A)
+V5A : JP24 page 40
+V3.3A : JP26 or 27 page 39
+V3.3S : JP28 page 42
+V3.3 : JP29 page 42
TPS5130
C C
+5VAO
SUSB#
SUSB#
+1.2VO
+1.05VO
SUSB#
+V2.5
CM8562
+V1.25S
(2A)
(1A)
(2A)
+V1.2S
+VCCP
SWITCH
A/D_VIN
BAT_S
TS#
Power
Signal
Circuit
SHUT_DOWN#
BAT_IN#_OC
ACIN_OC
AC_APR_UC
(Regulator)
SUSC#
BAT
(1A)
+V1.8
SUSB#
+V1.8S
TS#
SUSB#
AC_APR_UC
SMC_BAT
SMD_BAT
PIC16C54C
CHG EN#
CHG LED_UP
PWR LED_UP
BAT_LLOW
+2.5VO
MIC37101-1.8
+1.8VO
LDO
PIC + TL494
B B
(Charge)
FDS6679
(20mA)
FD6JK3TP
MIC5223MB
A/D_VIN
+3VALWAYS_M
78L05
(Regulator)
+V3.3A
(Regulator)
+V3.3SUS
A A
CM2855
(LDO)
+5VAO
5
4
+V1.5SUS
+5VALWAYS
+5VO
+5VCHG
3
(100mA)
SWITCH
(F02JK2E)
+5VLCM
LM4040BIM
(Regulator)
2
+2.5VREF
(500uA)
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
A6G
Title :
Engineer:
1
POWER DIAGRAM
Adams Lin
254Friday, October 15, 2004
of
Rev
1.1
5
4
3
2
1
H_A#[16:3]7
ADDR GROUP 0 -> L1
ADDR GROUP 1 -> L4
SPACE >= 1:2
D D
C C
B B
A A
STROBE SPACE >= 1:2
GROUP SPACE >= 20 mils
LENGTH: 0.5" - 6.5"
H_ADSTB#07
H_REQ#[4:0]7
H_A#[31:17]7
H_ADSTB#17
H_DPWR#8
CPU PLL CIRCUITS
1.71V - 1.89V(+/- 5%)
S0-S1M: 0.3A
+V1.8S_PROC
+V1.8S_VCCA
+V1.8S_F26
12
C26
0.01UF/10V
+V1.8S_AC26
12
C325
0.01UF/10V
+V1.8S_N1
12
C104
0.01UF/10V
+V1.8S_B1
12
C98
0.01UF/10V
12
C24
10UF/6.3V
12
C322
10UF/6.3V
12
C100
10UF/6.3V
12
C103
10UF/6.3V
Celeron
Banias
Frequency 133
VCCA[1:3]
VCCA[0]
1.8V
1.8V
1.8V
1.8V
H_A#16
H_A#15
H_A#13
H_A#12
H_A#11
H_A#10
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4 H_D#3
H_A#3
H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0
H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17
1"-6.5"
T92 TPC28t
T95 TPC28t
_CLK_CPU_BCLK23
_CLK_CPU_BCLK#23
H_A20M#20
H_FERR#20
H_IGNNE#20
H_DPSLP#8,20
H_CPUSLP#20
H_INTR20
H_NMI20
H_SMI#20
H_STPCLK#20
H_PWRGD20
H_THERMDA5
H_THERMDC5
H_THRMTRIP_S#20
PM_PSI#43
Dothan
(400)
100100100
1.8V
1.8V 1.5V
Pin 3,4U54 switch to
5
U31B
AA2
A[16]#
Y3
A[15]#
AA3
A[14]#
U1
A[13]#
Y1
A[12]#
Y4
A[11]#
W2
A[10]#
T4
A[9]#
W1
A[8]#
V2
A[7]#
R3
A[6]#
V3
A[5]#
U4
A[4]#
P4
A[3]#
U3
ADSTB[0]#
T1
REQ[4]#
P1
REQ[3]#
T2
REQ[2]#
P3
REQ[1]#
R2
REQ[0]#
AF1
A[31]#
AE1
A[30]#
AF3
A[29]#
AD6
A[28]#
AE2
A[27]#
AD5
A[26]#
AC6
A[25]#
AB4
A[24]#
AD2
A[23]#
AE4
A[22]#
AD3
A[21]#
AC3
A[20]#
AC7
A[19]#
AC4
A[18]#
AF4
A[17]#
AE5
ADSTB[1]#
C19
DPWR#
SOCKET479P
_CLK_CPU_BCLK
1
_CLK_CPU_BCLK#
1
T94 TPC28t
T96 TPC28t
T93 TPC28t
T98 TPC28t
Dothan
(533)
NC
Pin 1,2
ADDRESS GROUP 0ADDRESS GROUP 1
2"-8"
2"-8"
<=10"
0.5"-12"
<=10"
<=10"
<=10"
<=10"
<=10"
<=10"
<=10"
<=10"
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
+V1.8S_AC26
+V1.8S_N1
+V1.8S_B1
+V1.8S_F26
H_PROCHOT#
ADS#
PRDY#
PREQ#
BNR#
BPRI#
DBR#
DEFER#
DRDY#
DBSY#
BR0#
CONTROL
IERR#
INIT#
LOCK#
RESET#
RS[2]#
RS[1]#
RS[0]#
TRDY#
HIT#
HITM#
1
1
1
1
AC26
C17
C16
C14
AF7
4
B15
B14
A16
A15
C2
D3
D1
D4
C6
H4
G4
G3
N1
F26
B18
A18
B17
C3
N2
A10
B10
L1
J3
A7
L4
H2
M2
N4
A4
B5
J2
B11
L2
K1
H1
M3
K3
K4
U31C
A3
A6
B4
E4
F3
F2
E2
B1
E1
B2
SOCKET479P
H_PRDY#
H_PREQ#H_A#14
1
H_BR0#
H_IERR#
0.5"-12"
<=10"
<=10"
<=3"
H_RS#2
H_RS#1
H_RS#0
BCLK[0]
BCLK[1]
ITP_CLK[0]
ITP_CLK[1]
A20M#
FERR#
IGNNE#
SLP#
LINT0
LINT1
SMI#
STPCLK#
PWRGOOD
VID[5]
VID[4]
VID[3]
VID[2]
VID[1]
VID[0]
VCCA[3]
VCCA[2]
VCCA[1]
VCCA[0]
THERMDA
THERMDC
THERMTRIP#
PROCHOT#
RSVD5
RSVD4
RSVD3
RSVD2
RSVD1
RSVD0
T107 TPC28t
R271 56Ohm
COMP[3]
COMP[2]
HOSTCLKLEGACY CPU
COMP[1]
COMP[0]
BPM[3]#DPSLP#
BPM[2]#
BPM[1]#
BPM[0]#
GTLREF[3]
GTLREF[2]
GTLREF[1]
GTLREF[0]
MISC
VCCSENSE
VSSSENSE
TEST1
TEST2
TCK
TDO
TMS
TRST#
TDI
H_ADS# 7
H_BNR# 7
H_BPRI# 7
H_DEFER# 7
H_DRDY# 7
H_DBSY# 7
H_BR0# 7
12
H_INIT# 20,32
H_LOCK# 7
H_CPURST# 7
H_RS#[2:0] 7
H_TRDY# 7
H_HIT# 7
H_HITM# 7
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
CPU_COMP3
AB1
CPU_COMP2
AB2
CPU_COMP1
P26
CPU_COMP0
P25
H_BPM#3
C9B7
H_BPM#2
A9
H_BPM#1
B8
H_BPM#0
C8
AC1
G1
E26
H_GTLREF0
AD26
1
C5
1
F23
H_TCK
A13
H_TDI
C12
H_TDO
A12
H_TMS
C11
H_TRST#
B13
AE7
AF6
COMMON CLOCK -> L4
WIDTH: 4.5 mils
SPACE >= 1:2
GROUP SPACE >= 20 mils
LENGTH: 2.2" - 6.5"
+VCCP
VR_VID5 43
VR_VID4 43
VR_VID3 43
VR_VID2 43
VR_VID1 43
VR_VID0 43
T103TPC28t
1
T20 TPC28t
1
T106TPC28t
1
T105TPC28t
1
T21 TPC28t
T88 TPC28t
H_D#15
H_D#14
H_D#13
H_D#12
H_D#11
H_D#10
H_D#9
H_D#8
H_D#7
H_D#6
H_D#4
H_D#2
H_D#1
H_DINV#07
H_DSTBN#07
H_DSTBP#07
H_DINV#17
H_DSTBN#17
H_DSTBP#17
TOPOLOGY 1B:
CPU-ICH-R
CPU-ICH: 0.5" - 12"
ICH-R <= 3"
TOPOLOGY 1B:
CPU-ICH-R
CPU-ICH: 0.5" - 12"
ICH-R <= 3"
TOPOLOGY 1C:
CPU-R-LSC-ICH
CPU-R: 0.5" - 12"
R - LSC<= 3"
LSC-ICH:0.5"-12"
H_THRMTRIP_S#
H_FERR#
H_PROCHOT#
H_D#0
H_D#31
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24 H_D#56
H_D#23
H_D#22
H_D#21
H_D#20
H_D#19
H_D#18
H_D#17
H_D#16
+VCCP
12
R239
56Ohm
+VCCP
12
R71
56Ohm
+VCCP
12
R244
56Ohm
CPU DEBUG PORT
Close to Pin
A8 of CPU
Close to Pin A12 of CPU
Width= 5 mils
Length <= 2"
3
H_PREQ#
H_PRDY#
H_TMS
H_TDO
H_TDI
H_TCK
H_TRST#
U31A
C25
D[15]#
E23
D[14]#
B23
D[13]#
C26
D[12]#
E24
D[11]#
D24
D[10]#
B24
D[9]#
C20
D[8]#
B20
D[7]#
A21
D[6]#
B26
D[5]#
A24
B21
A22
A25
A19
D25
C23
C22
K25
N25
H26
M25
N24
L26
J25
M23
J23
G24
F25
H24
M26
L23
G25
H23
J26
K24
L24
TOPOLOGY 2A:
R-CPU-ICH Y-FORK
CPU-ICH: 0.5" - 12"
R - CPU <= 3"
TOPOLOGY 2B:
MCH-CPU-ICH4
MCH-CPU:0.5"-6.5"
CPU-ICH4:0.5"-12"
TOPOLOGY 3:
CPU-ICH-R-LSC-FWH
CPU-ICH:0.5" - 12"
R - LSC <= 3"
LSC-FWH:0.5"-6"
R261 200Ohm /
R260 56Ohm
CPU JTAG
R250 39Ohm
R247 56Ohm
R248 150Ohm
R246 27.4Ohm
R245 680Ohm
D[4]#
D[3]#
D[2]#
D[1]#
D[0]#
DINV[0]#
DSTBN[0]#
DSTBP[0]#
D[31]#
D[30]#
D[29]#
D[28]#
D[27]#
D[26]#
D[25]#
D[24]#
D[23]#
D[22]#
D[21]#
D[20]#
D[19]#
D[18]#
D[17]#
D[16]#
DINV[1]#
DSTBN[1]#
DSTBP[1]#
SOCKET479P
H_PWRGD
H_DPSLP#
H_INIT#
1 2
1 2
DATA GROUP 0DATA GROUP 1
DSTBN[2]#
DSTBP[2]#
DSTBN[3]#
DSTBP[3]#
12
12
12
12
12
2
D[47]#
D[46]#
D[45]#
D[44]#
D[43]#
D[42]#
D[41]#
D[40]#
D[39]#
D[38]#
D[37]#
D[36]#
DATA GROUP 2DATA GROUP 3
D[35]#
D[34]#
D[33]#
D[32]#
DINV[2]#
D[63]#
D[62]#
D[61]#
D[60]#
D[59]#
D[58]#
D[57]#
D[56]#
D[55]#
D[54]#
D[53]#
D[52]#
D[51]#
D[50]#
D[49]#
D[48]#
DINV[3]#
+VCCP
R73
332Ohm
+VCCP
H_D#47
Y25
H_D#46
AA26
H_D#45
Y23
H_D#44
V26
H_D#43
U25
H_D#42
V24
H_D#41
U26
H_D#40
AA23
H_D#39
R23
H_D#38
R26
H_D#37H_D#5
R24
H_D#36
V23
H_D#35
U23
H_D#34
T25
H_D#33
AA24
H_D#32
Y26
T24
W25
W24
H_D#63
AF26
H_D#62
AF22
H_D#61
AF25
H_D#60
AD21
H_D#59
AE21
H_D#58
AF20
H_D#57
AD24
AF23
H_D#55
AE22
H_D#54
AD23
H_D#53
AC25
H_D#52
AC22
H_D#51
AC20
H_D#50
AB24
H_D#49
AC23
H_D#48
AB25
AD20
AE24
AE25
+VCCP
H_GTLREF0:
12
LENGTH <=0.5"
WIDTH = 5.5 mils
SPACE >= 25 mils
CPU_COMP2 :
Length <= 0.5"
Width = 18 mils(L1/L6)
Space>= 20 mils
CPU_COMP2
CPU_COMP3 :
Length <= 0.5"
Width = 5.5 mils(L1/L6)
Space>= 20 mils
CPU_COMP3
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
H_D#[63:0] 7
DATA GROUP 0,2 -> L1
DATA GROUP 1,3 -> L4
SPACE >= 1:2
GROUP SPACE >=20 mils
LENGTH: 0.5" - 5.5"
H_DINV#2 7
H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#3 7
H_DSTBN#3 7
H_DSTBP#3 7
R75
27.4Ohm
1 2
R76
56Ohm
1 2
A6G
+VCCP
Close to
12
Pin AD26
of CPU
R224
1KOhm
H_GTLREF0
12
Same Side
w/ CPU
R223
2KOhm
CPU_COMP0 :
Length <= 0.5"
Width = 18 mils(L1/L6)
Space>= 20 mils
R221
Title :
Engineer:
1
27.4Ohm
1 2
R222
56Ohm
1 2
CPU-BANIAS(HOST)
John Hung
354Friday, October 15, 2004
CPU_COMP0
CPU_COMP1 :
Length <= 0.5"
Width = 5.5 mils(L1/L6)
Space>= 20 mils
CPU_COMP1
Rev
1.1
of
5
HFM(1.3GHz-1.7GHz): 1.468V
LFM( 600MHz): 0.956V
0.745V - 1.356V(+/- 1.5%)
C0: 25 A
+VCORE
C3: 7.59A
VCC1
D18D8D6
VCC2
D20
VCC3
VCC4
C4: 0.9A
VCC7
VCC6
VCC5
E17E9E7E5D22
VCC8
E19
VCC9
E21
VCC11
VCC10
VCC13
VCC12
F18F8F6
VCC14
F20
VCC15
VCC17
VCC16
VCC19
VCC18
VCC21
VCC20
J21J5H22H6G21G5F22
VCC22
K22
VCC23
VCC25
VCC24
VCC27
VCC26
VCC29
VCC28
Y22Y6W21W5V22V6U5
VCC30
AA5
VCC31
AA7
VCC32
AA9
VCC33
AA11
VCC34
AA13
VCC35
AA15
D D
VCC
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCQ[1]
VCCQ[0]
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16K6L5
W4
P23
C C
12
C35
0.1uF/10V
12
C89
0.1uF/10V
L21M6M22N5N21P6P22R5R21T6T22
VCCP25
U21
4
AB18
AB16
AB14
AB12
AB10
AB8
AB6
AA21
AA19
AA17
VCC46
VCC45
VCC44
VCC43
VCC42
VCC41
VCC40
VCC39
VCC38
VCC37
VCC36
+VCCP+VCCP
1.0V - 1.1V(+/- 5%)
S0-S1M: 2.5 A(CPU,MCH,ICH)
AB20
VCC47
AB22
VCC48
AC9
VCC49
AC11
VCC50
AC13
VCC51
AC15
VCC52
AC17
VCC53
AC19
VCC54
AD8
VCC55
AD10
VCC56
AD12
VCC57
AD14
VCC58
AD16
VCC59
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
AD18
SOCKET479P
VCC60
U31D
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
3
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF11
AF13
AF15
AF17
AF19
AF21
AF24
AD1
AD4
AD7
AD9
AE3
AE6
AE8
AF2
AF5
AF9
AC24
AC21
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS1
A2A5A8
AC18
AC16
VSS159
VSS158
VSS2
VSS3
A11
AC14
AC12
VSS157
VSS156
VSS4
VSS5
A14
A17
AC10
AC8
VSS155
VSS154
VSS6
VSS7
A20
A23
AC5
AC2
AB26
VSS153
VSS152
VSS151
VSS150
VSS8
VSS9
VSS10
VSS11
A26B3B6B9B12
AB23
AB21
VSS149
VSS12
AB19
AB17
VSS148
VSS147
VSS13
VSS14
B16
B19
AB15
AB13
VSS146
VSS145
VSS144
VSS15
VSS16
VSS17
B22
B25C1C4C7C10
AB11
AB9
VSS143
VSS18
AB7
AB5
VSS142
VSS141
VSS19
VSS20
AB3
AA25
VSS140
VSS139
VSS21
VSS22
C13
C15
AA22
AA20
VSS138
VSS137
VSS23
VSS24
C18
C21
AA18
AA16
AA14
VSS136
VSS135
VSS134
VSS25
VSS26
VSS27
C24D2D5D7D9
2
AA12
AA10
AA8
AA6
VSS133
VSS132
VSS131
VSS130
VSS129
GND
VSS28
VSS29
VSS30
VSS31
VSS32
D11
D13
AA4
AA1
VSS128
VSS33
D15
D17
Y24
Y21Y5Y2
VSS127
VSS126
VSS34
VSS35
D19
D21
VSS125
VSS124
VSS123
VSS36
VSS37
VSS38
D23
D26E3E6E8E10
W26
W23
VSS122
VSS39
W22W6W3
VSS121
VSS120
VSS40
VSS41
V25
VSS119
VSS118
VSS42
VSS43
E12
E14
V21V5V4V1U24
VSS117
VSS116
VSS115
VSS114
VSS44
VSS45
VSS46
VSS47
E16
E18
E20
U22U6U2
VSS113
VSS112
VSS111
VSS110
VSS109
VSS48
VSS49
VSS50
VSS51
VSS52
E22
E25F1F4F5F7F9F11
T26
T23
VSS108
VSS53
T21T5T3
VSS107
VSS106
VSS54
VSS55
F13
R25
VSS105
VSS104
VSS56
VSS57
F15
F17
R22R6R4R1P24
VSS103
VSS102
VSS101
VSS100
VSS58
VSS59
VSS60
VSS61
F19
F21
F24G2G6
1
VSS99
VSS98
VSS62
VSS63
P21
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS65
VSS64
G22
U31E
SOCKET479P
P5
P2
N26
N23
N22
N6
N3
M24
M21
M5
M4
M1
L25
L22
L6
L3
K26
K23
K21
K5
K2
J24
J22
J6
J4
J1
H25
H21
H5
H3
G26
G23
+VCORE
B B
A A
12
C359
10UF/6.3V
12
C70
10UF/6.3V
12
C357
10UF/6.3V
M3N : Four 200 uF are located in IMVP4
A3N : Delete 10uF/6.3V from 35pcs to 17pcs
CPU VCORE Decoupling Capacitor
12
C338
10UF/6.3V
12
C358
10UF/6.3V
12
C346
10UF/6.3V
5
12
C368
10UF/6.3V
12
C57
10UF/6.3V
12
C69
10UF/6.3V
12
C369
10UF/6.3V
12
C351
10UF/6.3V
12
C39
10UF/6.3V
12
C51
10UF/6.3V
12
C352
10UF/6.3V
12
C355
10UF/6.3V
12
C343
10UF/6.3V
12
C353
10UF/6.3V
+VCCP
Mid Frequency
Decoupling (Place
around Processor)
High Frequency
Decoupling (Place
underneath
Processor)
using 10uF/6.3V X5R
+VCORE Bulk
Decoupling
4
3
+V3.3S
12
FREQ_SEL8,23
12
+
C538
4.7U
/
CE1
150U/4.0V
+V3.3S
+VCCP (CPU) Decoupling Capacitor
(Place near CPU)
12
12
C34
0.1uF/10V
Vref=1.215V
U53
/
1
IN
OUT
2
GND
3 4
EN ADJ
SI9183DT
R404
/
10KOhm
1 2
34
5
12
C42
0.1uF/10V
5
R400
18.7KOhm
2
Q93B
UM6K1N
/
12
/
61
12
C336
0.1uF/10V
1 2
R397 0Ohm
R399
/
20KOhm
Q93A
UM6K1N
/
1 2
12
12
C344
0.1uF/10V
R398
4.7KOhm
2
+V1.8S_PROC+V1.8S
+V1.8S_PROC
/
C337
0.1uF/10V
12
C537
4.7U
/
12
C340
0.1uF/10V
12
For 855GM /855GME /852GM /852GME:
Load R397
For 852GMV:
Load C537, C538, Q93, R398, R399,
R400, R404, U53
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
C360
0.1uF/10V
C335
0.1uF/10V
A6G
C41
0.1uF/10V
Title :
Engineer:
1
C59
0.1uF/10V
CPU-BANIAS(PWR)
John Hung
12
12
12
Rev
454Friday, October 15, 2004
1.1
of
5
D D
4
3
2
1
C C
Route H_THERMDA and H_THERMDC
on the same layer
------------------OTHER SIG NAL S
12 mils
===============GND
10 mils
=========H_THERMDA(10 mils)
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
12 mils
---------------------OTHER SIGN AL S
Avoid BPSB,Power
B B
+V3.3S_THM+V3.3S
1 2
R243
200Ohm
SCL_3S10,22,23
SDA_3S10,22,23
PM_THRM#20,40
PM_THRM#
(Pull-Up 10K
in Page 35)
A A
SCL_3S
12
Close to Pin A18
& B18 of CPU
Standby Mode: 3uA(Max. 10uA )
Full Active: 0.5mA(Max. 1mA)
+V3.3S_THM
C349
0.1uF/10V
8
7
6
U33
SMBCLK
SMBDATA
ALERT#
1
5
VCC
OVERT
DXP
DXN
GND
MAX6657
4
2
3
OS#_OC
H_THERMDASDA_3S
H_THERMDC
OS#_OC
(Pull-Up 10K
in Page 35)
OS#_OC 40
4"-8"
12
C354
2200P
4"-8"
H_THERMDA 3
H_THERMDC 3
THERMAL SENSOR
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
5
4
3
2
Date: Sheet
Engineer:
A6G
John Hung
Rev
1
554Friday, October 15, 2004
1.1
of
5
D D
DDR Serial Termination
52
U8
V+
V-
LMV321
_DDR_DATA34
_DDR_DATA38
_DDR_DM4
_DDR_DQS4
_DDR_DATA33
_DDR_DATA32
_DDR_DATA37
_DDR_DATA36
_DDR_DATA46
_DDR_DQS5
_DDR_DATA35
_DDR_DATA39
_DDR_DATA40
_DDR_DATA44
_DDR_DATA41
_DDR_DATA45
_DDR_DQS6
_DDR_DATA53
_DDR_DATA52
_DDR_DATA49
_DDR_DATA42
_DDR_DATA47
_DDR_DATA43
_DDR_DM5
_DDR_DATA56
_DDR_DATA60
_DDR_DATA48
_DDR_DATA54
_DDR_DATA50
_DDR_DATA55
_DDR_DATA51
_DDR_DM6
_DDR_DATA63
_DDR_DATA59
_DDR_DATA58
_DDR_DM7
_DDR_DATA62
_DDR_DQS7
_DDR_DATA57
_DDR_DATA61
+V5
DDR_VREF
4
12
C116
0.1uF/10V
1
1.225V-1.275V
S0-S1M:10 mA
(Max. 50 mA)
_DDR_DM0 DDR_DM0
_DDR_DATA7
_DDR_DATA1
_DDR_DATA3
_DDR_DQS0
_DDR_DATA4
_DDR_DATA0
_DDR_DATA5
_DDR_DATA9
_DDR_DATA14
_DDR_DATA12
_DDR_DM1
_DDR_DATA11
_DDR_DATA8
_DDR_DATA2
_DDR_DATA6
_DDR_DATA17
_DDR_DATA16
_DDR_DATA20
C C
_DDR_DATA21
_DDR_DATA10
_DDR_DATA15
_DDR_DQS1
_DDR_DATA13
_DDR_DATA29
_DDR_DATA24
_DDR_DATA19
_DDR_DATA23
_DDR_DATA18
_DDR_DATA22
_DDR_DM2
_DDR_DQS2
_DDR_DATA31
_DDR_DATA27
_DDR_DATA26
_DDR_DATA30
_DDR_DQS3
_DDR_DM3
_DDR_DATA28
_DDR_DATA25
B B
A A
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
Intel suggested that DDR_VREF should be turned
off in S3-S5. But measure the leakage because
there is no +V2.5S.
+V2.5
12
12
5
R89
10KOhm
R90
10KOhm
RN48A10Ohm
RN48B10Ohm
RN48C10Ohm
RN48D10Ohm
RN48E10Ohm
RN48F10Ohm
RN48G10Ohm
RN48H10Ohm
RN47A10Ohm
RN47B10Ohm
RN47C10Ohm
RN47D10Ohm
RN47E10Ohm
RN47F10Ohm
RN47G10Ohm
RN47H10Ohm
RN46A10Ohm
RN46B10Ohm
RN46C10Ohm
RN46D10Ohm
RN46E10Ohm
RN46F10Ohm
RN46G10Ohm
RN46H10Ohm
RN45A10Ohm
RN45B10Ohm
RN45C10Ohm
RN45D10Ohm
RN45E10Ohm
RN45F10Ohm
RN45G10Ohm
RN45H10Ohm
RN44A10Ohm
RN44B10Ohm
RN44C10Ohm
RN44D10Ohm
RN44E10Ohm
RN44F10Ohm
RN44G10Ohm
RN44H10Ohm
12
C118
0.1uF/10V
DDR_DATA7
DDR_DATA1
DDR_DATA3
DDR_DQS0
DDR_DATA4
DDR_DATA0
DDR_DATA5
DDR_DATA9
DDR_DATA14
DDR_DATA12
DDR_DM1
DDR_DATA11
DDR_DATA8
DDR_DATA2
DDR_DATA6
DDR_DATA17
DDR_DATA16
DDR_DATA20
DDR_DATA21
DDR_DATA10
DDR_DATA15
DDR_DQS1
DDR_DATA13
DDR_DATA29
DDR_DATA24
DDR_DATA19
DDR_DATA23
DDR_DATA18
DDR_DATA22
DDR_DM2
DDR_DQS2
DDR_DATA31
DDR_DATA27
DDR_DATA26
DDR_DATA30
DDR_DQS3
DDR_DM3
DDR_DATA28
DDR_DATA25
1
+
3
-
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
7 10
8 9
4 13
3 14
5 12
6 11
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
TP12
TPC28t
4
RN43A10Ohm
RN43B10Ohm
RN43C10Ohm
RN43D10Ohm
RN43E10Ohm
RN43F10Ohm
RN43G10Ohm
RN43H10Ohm
RN42A10Ohm
RN42B10Ohm
RN42G10Ohm
RN42H10Ohm
RN42D10Ohm
RN42C10Ohm
RN42E10Ohm
RN42F10Ohm
RN41A10Ohm
RN41B10Ohm
RN41C10Ohm
RN41D10Ohm
RN41E10Ohm
RN41F10Ohm
RN41G10Ohm
RN41H10Ohm
RN40A10Ohm
RN40B10Ohm
RN40C10Ohm
RN40D10Ohm
RN40E10Ohm
RN40F10Ohm
RN40G10Ohm
RN40H10Ohm
RN39A10Ohm
RN39B10Ohm
RN39C10Ohm
RN39D10Ohm
RN39E10Ohm
RN39F10Ohm
RN39G10Ohm
RN39H10Ohm
1.23125V-1.26875V
S0-S1M:Max. 80 mA
S3: 0 mA
DDR_SMRCOMP
4
3
Thermal Power: ~ 3.8W
LxWxH=37.5x37.5x2.58
DDR_DATA34
DDR_DATA38
DDR_DM4
DDR_DQS4
DDR_DATA33
DDR_DATA32
DDR_DATA37
DDR_DATA36
DDR_DATA46
DDR_DQS5
DDR_DATA35
DDR_DATA39
DDR_DATA40
DDR_DATA44
DDR_DATA41
DDR_DATA45
DDR_DQS6
DDR_DATA53
DDR_DATA52
DDR_DATA49
DDR_DATA42
DDR_DATA47
DDR_DATA43
DDR_DM5
DDR_DATA56
DDR_DATA60
DDR_DATA48
DDR_DATA54
DDR_DATA50
DDR_DATA55
DDR_DATA51
DDR_DM6
DDR_DATA63
DDR_DATA59
DDR_DATA58
DDR_DM7
DDR_DATA62
DDR_DQS7
DDR_DATA57
DDR_DATA61
DDR_DATA0
DDR_DATA1
DDR_DATA2
DDR_DATA3
DDR_DATA4
DDR_DATA6
DDR_DATA7
DDR_DATA8
DDR_DATA9
DDR_DATA10
DDR_DATA11
DDR_DATA12
DDR_DATA13
DDR_DATA14
DDR_DATA15
DDR_DATA16
DDR_DATA17
DDR_DATA18
DDR_DATA19
DDR_DATA20
DDR_DATA21
DDR_DATA22
DDR_DATA23
DDR_DATA24
DDR_DATA25
DDR_DATA26
DDR_DATA27
DDR_DATA28
DDR_DATA29
DDR_DATA30
DDR_DATA31
DDR_DATA32
DDR_DATA33
DDR_DATA34
DDR_DATA35
DDR_DATA36
DDR_DATA37
DDR_DATA38
DDR_DATA39
DDR_DATA40
DDR_DATA41
DDR_DATA42
DDR_DATA43
DDR_DATA44
DDR_DATA45
DDR_DATA46
DDR_DATA47
DDR_DATA48
DDR_DATA49
DDR_DATA50
DDR_DATA51
DDR_DATA52
DDR_DATA53
DDR_DATA54
DDR_DATA55
DDR_DATA56
DDR_DATA57
DDR_DATA58
DDR_DATA59
DDR_DATA60
DDR_DATA61
DDR_DATA62
DDR_DATA63
DDR_VREF
12
C114
0.1uF/10V
AG10
AF10
AE11
AH10
AH11
AG13
AF14
AG11
AD12
AF13
AH13
AH16
AG17
AF19
AE20
AD18
AE18
AH18
AG19
AH20
AG20
AF22
AH22
AF20
AH19
AH21
AG22
AE23
AH23
AE24
AH25
AG23
AF23
AF25
AG25
AH26
AE26
AG28
AF28
AG26
AF26
AE27
AD27
AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17
AJ24
AF2
AE3
AF4
AH2
AD3
AE2
AG4
AH3
AD6
AG5
AG7
AE8
AF5
AH4
AF7
AH6
AF8
AG8
AH9
AH7
AD9
U32B
SDQ[0]
SDQ[1]
SDQ[2]
SDQ[3]
SDQ[4]
SDQ[5]
SDQ[6]
SDQ[7]
SDQ[8]
SDQ[9]
SDQ[10]
SDQ[11]
SDQ[12]
SDQ[13]
SDQ[14]
SDQ[15]
SDQ[16]
SDQ[17]
SDQ[18]
SDQ[19]
SDQ[20]
SDQ[21]
SDQ[22]
SDQ[23]
SDQ[24]
SDQ[25]
SDQ[26]
SDQ[27]
SDQ[28]
SDQ[29]
SDQ[30]
SDQ[31]
SDQ[32]
SDQ[33]
SDQ[34]
SDQ[35]
SDQ[36]
SDQ[37]
SDQ[38]
SDQ[39]
SDQ[40]
SDQ[41]
SDQ[42]
SDQ[43]
SDQ[44]
SDQ[45]
SDQ[46]
SDQ[47]
SDQ[48]
SDQ[49]
SDQ[50]
SDQ[51]
SDQ[52]
SDQ[53]
SDQ[54]
SDQ[55]
SDQ[56]
SDQ[57]
SDQ[58]
SDQ[59]
SDQ[60]
SDQ[61]
SDQ[62]
SDQ[63]
SDQ[64]
SDQ[65]
SDQ[66]
SDQ[67]
SDQ[68]
SDQ[69]
SDQ[70]
SDQ[71]
SMVREF_0
RG82855GME
DDR SYSTEM MEMORY
SDQS[0]
SDQS[1]
SDQS[2]
SDQS[3]
SDQS[4]
SDQS[5]
SDQS[6]
SDQS[7]
SDQS[8]
SMA[0]
SMA[1]
SMA[2]
SMA[3]
SMA[4]
SMA[5]
SMA[6]
SMA[7]
SMA[8]
SMA[9]
SMA[10]
SMA[11]
SMA[12]
SMAB[1]
SMAB[2]
SMAB[4]
SMAB[5]
SCKE[0]
SCKE[1]
SCKE[2]
SCKE[3]
SCS[0]#
SCS[1]#
SCS[2]#
SCS[3]#
SBA[0]
SBA[1]
SRAS#
SCAS#
SWE#
SCK[0]
SCK[0]#
SCK[1]
SCK[1]#
SCK[2]
SCK[2]#
SCK[3]
SCK[3]#
SCK[4]
SCK[4]#
SCK[5]
SCK[5]#
SDM[0]
SDM[1]
SDM[2]
SDM[3]
SDM[4]
SDM[5]
SDM[6]
SDM[7]
SDM[8]
RCVENOUT#
RCVENIN#
SMRCOMP
SMVSWINGL
SMVSWINGH
AG2
AH5
AH8
AE12
AH17
AE21
AH24
AH27
AD15
AC18
AD14
AD13
AD17
AD11
AC13
AD8
AD7
AC6
AC5
AC19
AD5
AB5
AD16
AC12
AF11
AD10
AC7
AB7
AC9
AC10
AD23
AD26
AC22
AC25
AD22
AD20
AC21
AC24
AD25
AB2
AA2
AC26
AB25
AC3
AD4
AC2
AD2
AB23
AB24
AA3
AB4
AE5
AE6
AE9
AH12
AD19
AD21
AD24
AH28
AH15
AC15
AC16
AB1
AJ22
AJ19
DDR_DQS0
DDR_DQS1
DDR_DQS2
DDR_DQS3
DDR_DQS4
DDR_DQS5DDR_DATA5
DDR_DQS6
DDR_DQS7
T111 TPC28t
1
DDR_AA0
DDR_AA1
DDR_AA2
DDR_AA3
DDR_AA4
DDR_AA5
DDR_AA6
DDR_AA7
DDR_AA8
DDR_AA9
DDR_AA10
DDR_AA11
DDR_AA12
DDR_AB1
DDR_AB2
DDR_AB4
DDR_AB5
DDR_DM0
DDR_DM1
DDR_DM2
DDR_DM3
DDR_DM4
DDR_DM5
DDR_DM6
DDR_DM7
DDR_RCVENOUT#
DDR_RCVENIN#
DDR_SMRCOMP
DDR_SMVSWINGL
DDR_SMVSWINGH
11-01
+V2.5_GMCH_SM +V2.5_GMCH_SM +V2.5_GMCH_SM
12
R273
60.4Ohm
12
R272
60.4Ohm
12
C380
0.1uF/10V
0.2 VCCSM +/- 2%
DDR_SMVSWINGL
C401
0.1uF/10V
Close to
Pin AJ22
3
12
R279
604Ohm
12
12
R277
150Ohm
0.8 VCCSM +/- 2%
DDR_SMVSWINGH
C400
0.1uF/10V
Close to
Pin AJ19
2
1
1
1
12
2
_DDR_DATA[63:0] 10,11
_DDR_DM[7:0] 10,11
_DDR_DQS[7:0] 10,11
DDR_AA[12:0] 10,11
DDR_AB[2:1] 10,11
DDR_AB[5:4] 10,11
DDR_CKE0 10,11
DDR_CKE1 10,11
DDR_CKE2 10,11
DDR_CKE3 10,11
DDR_CS0# 10,11
DDR_CS1# 10,11
DDR_CS2# 10,11
DDR_CS3# 10,11
DDR_BS0# 10,11
DDR_BS1# 10,11
DDR_RAS# 10,11
DDR_CAS# 10,11
DDR_WE# 10,11
CLK_DDR0 10
CLK_DDR0# 10
CLK_DDR1 10
CLK_DDR1# 10
CLK_DDR2 10
CLK_DDR2# 10
CLK_DDR3 10
CLK_DDR3# 10
CLK_DDR4 10
CLK_DDR4# 10
CLK_DDR5 10
CLK_DDR5# 10
T112 TPC28t
T110 TPC28t
T109 TPC28t
12
R278
150Ohm
12
R280
604Ohm
1
(MCH-Sighting041)
M-GM system memory interface generates
single pulse CKE events which may cause
Intermittent hangs and display corruptions
when using Micron and Infineon
S0-DIMMs.
MCH-M
Route for COMMAND
1. DDR_AA[12:6],DDR_AA3,DDR_AA0
2. DDR_WE#
3. DDR_RAS#
4. DDR_CAS#
5. DDR_BS0#,DDR_BS1#
Route for CPC
1. DDR_AA[5:4],DDR_AA[2:1]
MCH-M
Route for CPC
1. DDR_AB[5:4],DDR_AB[2:1]
Route for CONTROL
1. DDR_CKE[1:0],DDR_CS[1:0]#
MCH-M
Route for CONTROL
1. DDR_CKE[3:2],DDR_CS[3:2]#
Route for CLOCK
1. CLK_DDR[2:0],CLK_DDR[2:0]#
MCH-M
Route for CLOCK
1. CLK_DDR[5:3],CLK_DDR[5:3]#
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
A6G
Dual DDR
SO-DIMM
Dual DDR
SO-DIMM
Dual DDR
SO-DIMM
Dual DDR
SO-DIMM
Title :
Engineer:
1
NB-MCHM(DDR)
John Hung
654Friday, October 15, 2004
TERMINATION
TERMINATION
TERMINATION
of
Rev
1.1
5
4
3
2
1
HUB_PD[10:0]19
12
R249
37.4Ohm
R49
56Ohm
/
1 2
H_CPURST#
H_A#[31:3]3
H_REQ#[4:0]3
H_ADSTB#03
H_ADSTB#13
_CLK_MCH_BCLK#23
_CLK_MCH_BCLK23
H_DSTBN#03
H_DSTBN#13
H_DSTBN#23
H_DSTBN#33
H_DSTBP#03
H_DSTBP#13
H_DSTBP#23
H_DSTBP#33
H_DINV#03
H_DINV#13
H_DINV#23
H_DINV#33
H_CPURST#3
HUB_PSTRB19
HUB_PSTRB#19
68.1Ohm
11-07
100Ohm
MCH_COMP Signals
MCH_HLZCOMP :
Length <= 0.5"
Width = 18 mils(L1/L6)
Space>= 20 mils
D D
C C
MCH_HLZCOMP
MCH_HYRCOMP :
Length <= 0.5"
Width = 18 mils(L1/L6)
Space>= 20 mils
MCH_HYRCOMP
MCH_HXRCOMP :
Length <= 0.5"
Width =18 mils(L1/L6 )
Space>= 20 mils
MCH_HXRCOMP
1 2
1 2
R235
27.4Ohm
R226
27.4Ohm
MCH_SWING Signals
MCH_HYSWING :
Length <= 0.5"
Width = 18 mils
Space>= 20 mils
1/3(+VCCP) +/- 2%
MCH_HYSWING
C345
B B
A A
0.1uF/10V
Close to
Pin H28
MCH_HXSWING :
Length <= 0.5"
Width = 18 mils
Space>= 20 mils
1/3(+VCCP) +/- 2%
MCH_HXSWING
C328
0.1uF/10V
Close to
Pin B20
+VCCP
12
R240
301Ohm
12
R241
150Ohm
1 2
+V1.2S_GMCH_HI
11-07
+VCCP
12
R225
301Ohm
12
R228
150Ohm
1 2
+VCCP
MCH_HYRCOMP
MCH_HYSWING
MCH_HXRCOMP
MCH_HXSWING
MCH_HDVREF
MCH_HCCVREF
MCH_HAVREF
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HUB_PSTRB
HUB_PSTRB#
MCH_HLZCOMP
+V1.2S_GMCH_HI
12
R251
R253
1 2
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
0.8V +/- 2%
HUB_VSWING_MCH
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
<=6"
W25
AA27
W24
W23
W27
AA28
W28
AB27
AB28
AA26
AD29
AE29
P23
T25
T28
R27
U23
U24
R24
U28
V28
U27
T27
V27
U25
V26
Y24
V25
V23
Y25
Y27
Y26
R28
P25
R23
R25
T23
T26
H28
K28
B20
B18
J28
C27
E22
D18
K27
D26
E21
E18
J25
E25
B25
G19
F15
K21
J21
J17
Y28
Y22
U7
U4
U3
V3
W2
W6
V6
W7
T3
V5
V4
W3
V2
T2
U2
W1
U32A
HA[3]#
HA[4]#
HA[5]#
HA[6]#
HA[7]#
HA[8]#
HA[9]#
HA[10]#
HA[11]#
HA[12]#
HA[13]#
HA[14]#
HA[15]#
HA[16]#
HA[17]#
HA[18]#
HA[19]#
HA[20]#
HA[21]#
HA[22]#
HA[23]#
HA[24]#
HA[25]#
HA[26]#
HA[27]#
HA[28]#
HA[29]#
HA[30]#
HA[31]#
HREQ[0]#
HREQ[1]#
HREQ[2]#
HREQ[3]#
HREQ[4]#
HADSTB[0]#
HADSTB[1]#
BCLK#
BCLK
HYRCOMP
HYSWING
HXRCOMP
HXSWING
HDSTBN[0]#
HDSTBN[1]#
HDSTBN[2]#
HDSTBN[3]#
HDSTBP[0]#
HDSTBP[1]#
HDSTBP[2]#
HDSTBP[3]#
DINV[0]#
DINV[1]#
DINV[2]#
DINV[3]#
CPURST#
HDVREF[0]
HDVREF[1]
HDVREF[2]
HCCVREF
HAVREF
HL[0]
HL[1]
HL[2]
HL[3]
HL[4]
HL[5]
HL[6]
HL[7]
HL[8]
HL[9]
HL[10]
HLSTB
HLSTB#
HLRCOMP
PSWING
HLVREF
RG82855GME
11-07
12
C356
0.1uF/10V
HOST
HUB I/F
0.343V- 0.357V(Typ. 0.35V)
HUB_VREF_MCH
12
C362
0.01UF/10V
HD[0]#
HD[1]#
HD[2]#
HD[3]#
HD[4]#
HD[5]#
HD[6]#
HD[7]#
HD[8]#
HD[9]#
HD[10]#
HD[11]#
HD[12]#
HD[13]#
HD[14]#
HD[15]#
HD[16]#
HD[17]#
HD[18]#
HD[19]#
HD[20]#
HD[21]#
HD[22]#
HD[23]#
HD[24]#
HD[25]#
HD[26]#
HD[27]#
HD[28]#
HD[29]#
HD[30]#
HD[31]#
HD[32]#
HD[33]#
HD[34]#
HD[35]#
HD[36]#
HD[37]#
HD[38]#
HD[39]#
HD[40]#
HD[41]#
HD[42]#
HD[43]#
HD[44]#
HD[45]#
HD[46]#
HD[47]#
HD[48]#
HD[49]#
HD[50]#
HD[51]#
HD[52]#
HD[53]#
HD[54]#
HD[55]#
HD[56]#
HD[57]#
HD[58]#
HD[59]#
HD[60]#
HD[61]#
HD[62]#
HD[63]#
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BREQ0#
BNR#
BPRI#
DBSY#
RS#0
RS#1
RS#2
12
C363
0.1uF/10V
K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18
L28
M25
N24
M28
N28
N27
P27
M23
N25
P28
M26
N23
P26
M27
1 2
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_RS#0
H_RS#1
H_RS#2
R252 287Ohm
R262
11-07
100Ohm
H_D#[63:0] 3
H_ADS# 3
H_TRDY# 3
H_DRDY# 3
H_DEFER# 3
H_HITM# 3
H_HIT# 3
H_LOCK# 3
H_BR0# 3
H_BNR# 3
H_BPRI# 3
H_DBSY# 3
H_RS#[2:0] 3
+V1.2S_GMCH_HI
12
MCH_VREF Signals
MCH_HAVREF:
Length <= 0.5"
Width = 11 mils
Space>= 20 mils
2/3(+VCCP) +/- 2%
MCH_HAVREF
12
C81
0.1uF/10V
MCH_HCCVREF:
Length <= 0.5"
Width = 10 mils
Space>= 20 mils
2/3(+VCCP) +/- 2%
MCH_HCCVREF
12
C376
0.1uF/10V
MCH_HDVREF:
Length <= 0.5"
Width = 11 mils
Space>= 20 mils
2/3(+VCCP) +/- 2%
MCH_HDVREF
12
12
C44
0.1uF/10V
12
C46
0.1uF/10V
C48
0.1uF/10V
12
12
12
C79
1uF/6.3V
C377
1uF/6.3V
C52
1uF/6.3V
+VCCP
12
12
+VCCP
12
12
+VCCP
12
1 2
R67
49.9Ohm
R66
100Ohm
R270
49.9Ohm
R269
100Ohm
R44
49.9Ohm
R46
100Ohm
27.4 ohm (10-003412704) for 855GM/852GM
37.4 ohm (10-003413704) for 855GME
48.7 ohm (10-003414807) for 852GME/852GMV
5
R251:R249:
49.9 ohm (10-003414909) for 855GM/852GM
68.1 ohm (10-003416801) for 855GME
86.6 ohm (10-003418606) for 852GME/852GMV
4
3
R252:
240 ohm (10-003412410) for 855GM/852GM
287 ohm (10-003412817) for 855GME
324 ohm (10-003413214) for 852GME/852GMV
2
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
Engineer:
A6G
1
NB-MCHM(HOST)
John Hung
754Friday, October 15, 2004
of
Rev
1.1
5
4
3
2
1
U32D
C1
VSS0
G1
VSS1
L1
VSS2
U1
VSS3
AA1
VSS4
AE1
VSS5
R2
VSS6
AG3
VSS7
AJ3
D D
C C
B B
A A
VSS8
D4
VSS9
G4
VSS10
K4
VSS11
N4
VSS12
T4
VSS13
W4
VSS14
AA4
VSS15
AC4
VSS16
AE4
VSS17
B5
VSS18
U5
VSS19
Y5
VSS20
Y6
VSS21
AG6
VSS22
C7
VSS23
E7
VSS24
G7
VSS25
J7
VSS26
M7
VSS27
R7
VSS28
AA7
VSS29
AE7
VSS30
AJ7
VSS31
H8
VSS32
K8
VSS33
P8
VSS34
T8
VSS35
V8
VSS36
Y8
VSS37
AC8
VSS38
E9
VSS39
L9
VSS40
N9
VSS41
R9
VSS42
U9
VSS43
W9
VSS44
AB9
VSS45
AG9
VSS46
C10
VSS47
J10
VSS48
AA10
VSS49
AE10
VSS50
D11
VSS51
F11
VSS52
H11
VSS53
AB11
VSS54
AC11
VSS55
AJ11
VSS56
J12
VSS57
AA12
VSS58
AG12
VSS59
A13
VSS60
D13
VSS61
F13
VSS62
H13
VSS63
N13
VSS64
R13
VSS65
U13
VSS66
AB13
VSS67
AE13
VSS68
J14
VSS69
P14
VSS70
T14
VSS71
AA14
VSS72
AC14
VSS73
D15
VSS74
H15
VSS75
N15
VSS76
R15
VSS77
U15
VSS78
AB15
VSS79
AG15
VSS80
F16
VSS81
J16
VSS82
P16
VSS83
RG82855GME
11-07
VSS181
AJ26
VSS
VSS179
VSS180
E28L6T9
5
VSS177
VSS178
C22
D28
VSS174
VSS176
AJ18
AJ20
VSS172
VSS173
AJ10
AJ12
VSS171
AA29
VSS169
VSS170
W29
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
T16
AA16
AE16
A17
D17
H17
N17
R17
U17
AB17
AC17
F18
J18
AA18
AG18
A19
D19
H19
AB19
AE19
F20
J20
AA20
AC20
A21
D21
H21
M21
P21
T21
V21
Y21
AA21
AB21
AG21
B24
F22
J22
L22
N22
R22
U22
W22
AE22
A23
D23
AA23
AC23
AJ23
F24
H24
K24
M24
P24
T24
V24
AA24
AG24
A25
D25
AA25
AE25
G26
J26
L26
N26
R26
U26
W26
AB26
A27
F27
AC27
AG27
AJ27
AC28
AE28
C29
E29
G29
J29
L29
N29
U29
Only 855GME & 852GME can
support AGP function!
AGP_AD[31:0]12
AGP_SBA[7:0]12
3 4
RN34B 100KOHM /
+V1.5S_GMCH_DVO
AGP_IRDY#12
AGP_DEVSEL#12
AGP_TRDY#12
AGP_FRAME#12
AGP_STOP#12
PM_SUSCLK20
_CLK_MCH6623
FREQ_SEL4,23
1
1
G
2
S
+V1.5S_GMCH_DVO
Q94A
UM6K1N
/
4
1 2
R41 100KOhm /
1 2
RN34A 100KOHM /
+V1.5S_GMCH_DVO
/
34
56
12
12
12
78
R50 2.2KOhm /
R45 2.2KOhm /
RN11B 2.2KOhm /
RN11A 2.2KOhm /
RN11C 2.2KOhm /
RN11D 2.2KOhm
+V1.5S_GMCH_DVO
R234
1KOhm
/
1 2
3
32
D
Q54
2N7002
/
12
C374
5P
/
R407 1KOhm /
1 2
R408 1KOhm /
1 2
12
61
RN91A
1KOhm
/
+V1.5S_GMCH_DVO
Q94B
UM6K1N
/
5
+V3.3S
2
R35
1KOhm
AGP_C/BE#012
AGP_ADSTB012
AGP_ADSTB0#12
AGP_C/BE#112
AGP_C/BE#312
AGP_ADSTB112
AGP_ADSTB1#12
AGP_PAR12
AGP_VREF12
AGP_SBSTB12
AGP_SBSTB#12
AGP_GNT#12
AGP_REQ#12
AGP_WBF#12
AGP_RBF#12
AGP_C/BE#212
34
RN91B
1KOhm
/
1 2
34
1 2
/
12
R409
1KOhm
/
R43
100KOhm
AGP_AD3
AGP_AD2
AGP_AD5
AGP_AD4
AGP_AD7
AGP_AD6
AGP_AD8
AGP_C/BE#0
AGP_AD10
AGP_AD9
AGP_AD12
AGP_AD11
AGP_ADSTB0
AGP_ADSTB0#
AGP_AD0
AGP_AD1
AGP_C/BE#1
AGP_AD14
AGP_AD30
AGP_AD13
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_C/BE#3
AGP_AD25
AGP_AD24
AGP_AD27
AGP_AD26
AGP_AD29
AGP_AD28
AGP_ADSTB1
AGP_ADSTB1#
AGP_AD17
AGP_AD16
/
AGP_AD18
AGP_AD31
AGP_IRDY#
AGP_DEVSEL#
AGP_TRDY#
AGP_FRAME#
AGP_STOP#
AGP_AD15
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
ADDDETECT
AGP_PIPE
MCH_GRCOMP
T108 TPC28t
AGP_SBSTB
AGP_SBSTB#
AGP_GNT#
AGP_REQ#
T86TPC28t
T90TPC28t
T87TPC28t
GST
GST1
GST0
GST2
FSB
[2:0]
Freq.
000
400 MHz
001
400 MHz
010
400 MHz
011
400 MHz
100
533 MHz
101
533 MHz
110
533 MHz 333 MHz
111
400 MHz
*GST[2:0] are internal pulled-low.
*Current: 852GME/852GMV may still
use the GST configurations.
*Future: 852GME/852GMV only need
GST2 to strap FSB frequency.
3
U32C
R3
DVOBD[0]
R5
DVOBD[1]
R6
DVOBD[2]
R4
DVOBD[3]
P6
DVOBD[4]
P5
DVOBD[5]
N5
DVOBD[6]
P2
DVOBD[7]
N2
DVOBD[8]
N3
DVOBD[9]
M1
DVOBD[10]
M5
DVOBD[11]
P3
DVOBCLK
P4
DVOBCLK#
T6
DVOBHSYNC
T5
DVOBVSYNC
L2
DVOBBLANK#
M2
DVOBFLDSTL
G2
DVOBCINTR#
M3
DVOBCCLKINT
K5
DVOCD[0]
K1
DVOCD[1]
K3
DVOCD[2]
K2
DVOCD[3]
J6
DVOCD[4]
J5
DVOCD[5]
H2
DVOCD[6]
H1
DVOCD[7]
H3
DVOCD[8]
H4
DVOCD[9]
H6
DVOCD[10]
G3
DVOCD[11]
J3
DVOCCLK
J2
DVOCCLK#
K6
DVOCHSYNC
L5
DVOCVSYNC
L3
DVOCBLANK#
H5
DVOCFLDSTL
K7
MI2CCLK
N6
MI2CDATA
N7
MDVICLK
M6
MDVIDATA
P7
MDDCCLK
T7
MDDCDATA
E5
ADDID[0]
F5
ADDID[1]
E3
ADDID[2]
E2
ADDID[3]
G5
ADDID[4]
F4
ADDID[5]
G6
ADDID[6]
F6
ADDID[7]
L7
DVODETECT
D5
DPMS
F1
GVREF
F7
AGPBUSY#
D1
DVORCOMP
Y3
GCLKIN
1
AA5
RSVD0
F2
RSVD1
F3
RSVD2
B2
RSVD3
B3
RSVD4
D2
RSVD5
D3
RSVD6
D7
RSVD7
L4
RSVD8
1
B12
RSVD9
1
F12
RSVD10
1
D12
RSVD11
RG82855GME
11-07
System
Memory
Freq.
266 MHz
200 MHz 100 MHz
200 MHz
266 MHz
266 MHz
266 MHz
333 MHz
GFX core
Clock
-Low
133 MHz
100 MHz
133 MHz
133 MHz
133 MHz
166 MHz
166 MHz
DVO
GFX core
Clock
-High
200 MHz
200 MHz
133 MHz
266 MHz
200 MHz
266 MHz
266 MHz
250 MHz
GREEN#
DACCLKSMISCNC
REFSET
DDCACLK
DDCADATA
LVDS
DDCPCLK
DDCPDATA
PANELBKLTCTL
PANELBKLTEN
PANELVDDEN
DREFCLK
DREFSSCLK
LCLKCTLA
LCLKCTLB
DPSLP#
PWROK
EXTTS_0
C9
BLUE
D9
BLUE#
C8
GREEN
D8
A7
RED
A8
RED#
H10
HSYNC
J9
VSYNC
E8
B6
G9
G14
IYAM[0]
E15
IYAM[1]
C15
IYAM[2]
C13
IYAM[3]
F14
IYAP[0]
E14
IYAP[1]
C14
IYAP[2]
B13
IYAP[3]
H12
IYBM[0]
E12
IYBM[1]
C12
IYBM[2]
G11
IYBM[3]
G12
IYBP[0]
E11
IYBP[1]
C11
IYBP[2]
G10
IYBP[3]
D14
ICLKAM
E13
ICLKAP
E10
ICLKBM
F10
ICLKBP
B4
C5
G8
F8
A5
C4
GST[0]
C3
GST[1]
C2
GST[2]
A10
LIBG
B7
B17
H9
C6
AA22
DPWR#
Y23
AD28
RSTIN#
J11
D6
AJ1
VSS
B1
NC0
AH1
NC1
A2
NC2
AJ2
NC3
A28
NC4
AJ28
NC5
A29
NC6
B29
NC7
AH29
NC8
AJ29
NC9
AA9
NC10
AJ4
NC11
0.5 VCCDVO +/- 2%
AGP_VREF
Close to
Pin F1
2
CRT_REFSET
LVDS_DDC2BC
LVDS_DDC2BD
LVDS_BACK_ADJ
GST0
GST1
GST2
1
M_LCLKCTLB
+V1.5S_GMCH_DVO
12
C333
0.1uF/10V
R40 137Ohm 1%
1 2
+V3.3S_GMCH_GPIO
3 4
1 2
RN33B 2.2KOhm
RN33A 2.2KOhm
T198TPC28t
1
AGP_ST0 12
AGP_ST1 12
AGP_ST2 12
R227 1.5KOhm
1 2
R492 10KOhm
1 2
R493 10KOhm
1 2
T91TPC28t
H_DPWR# 3
H_DPSLP# 3,20
PCI_RST# 19,29,34
IMVP4_PWRGD 42,43
Width= 10 mils
Space>=20 mils
MCH_GRCOMP
1 2
1 2
12
R233
40.2Ohm
1%
R237
1KOhm
R236
1KOhm
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
A6G
+V3.3S_GMCH_GPIO
R34
10KOhm
1 2
+V3.3S
R33
10KOhm
/
M_LCLKCTLB
1 2
+V1.5S_GMCH_DVO
ADDDETECT
Title :
Engineer:
1
R48
1KOhm
1 2
R47
1KOhm
/
1 2
NB-MCHM(VGA)
John Hung
854Friday, October 15, 2004
of
Rev
1.1
5
4
3
2
1
C74
0.1uF/10V
12
0.1uF/10V
+V1.5S
+V1.5S
CE18
11-08
C38
0.1uF/10V
C30
0.1uF/10V
0.1uF/10V
C47
12
12
+V1.2S_GMCH_CORE
12
C77
0.1uF/10V
+V1.2S_GMCH_HI
12
C73
+V1.2S_GMCH_CORE
12
C36
+V1.5S_GMCH_DVO
12
C60
0.1uF/10V
+V1.5S_GMCH_ALVDS
C329
0.01UF/10V
+V1.5S_GMCH_DLVDS
C56
+
0.1uF/10V
+V2.5_GMCH_TXLVDS
12
C321
0.1uF/10V
+V3.3S_GMCH_GPIO
12
C29
0.1uF/10V
(MCH-Sighting041)
12
12
12
12
12
12
The core supply (1.2V) should be
powered up a minimum of 1ms
before the DVO and GPIO IO
(1.5V and 3.3V) voltage rails.
U32E
J15
AA15
AA17
AA19
W21
G13
B14
B15
B10
D10
A12
P13
T13
N14
R14
U14
P15
T15
N16
R16
U16
P17
T17
H14
V1
Y1
W5
U6
U8
W8
V7
V9
D29
Y2
A6
B16
E1
J1
N1
E4
J4
M4
E6
H7
J8
L8
M8
N8
R8
K9
M9
P9
A9
B9
B8
A11
B11
J13
F9
A3
A4
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCCHL0
VCCHL1
VCCHL2
VCCHL3
VCCHL4
VCCHL5
VCCHL6
VCCHL7
VCCAHPLL
VCCAGPLL
VCCADPLLA
VCCADPLLB
VCCDVO_0
VCCDVO_1
VCCDVO_2
VCCDVO_3
VCCDVO_4
VCCDVO_5
VCCDVO_6
VCCDVO_7
VCCDVO_8
VCCDVO_9
VCCDVO_10
VCCDVO_11
VCCDVO_12
VCCDVO_13
VCCDVO_14
VCCDVO_15
VCCADAC0
VCCADAC1
VSSADAC
VCCALVDS
VSSALVDS
VCCDLVDS0
VCCDLVDS1
VCCDLVDS2
VCCDLVDS3
VCCTXLVDS0
VCCTXLVDS1
VCCTXLVDS2
VCCTXLVDS3
VCCGPIO_0
VCCGPIO_1
RG82855GME
POWER
VTTLF0
VTTLF1
VTTLF2
VTTLF3
VTTLF4
VTTLF5
VTTLF6
VTTLF7
VTTLF8
VTTLF9
VTTLF10
VTTLF11
VTTLF12
VTTLF13
VTTLF14
VTTLF15
VTTLF16
VTTLF17
VTTLF18
VTTLF19
VTTLF20
VTTHF0
VTTHF1
VTTHF2
VTTHF3
VTTHF4
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCQSM0
VCCQSM1
VCCASM0
VCCASM1
11-07
NB
VCC, VCCASM, VCCHL, VCCAGPLL,
VCCADPLLA, VCCADPLLB:
855GM/852GM: 1.2V
855GME: 1.35V
852GME/852GMV: 1.5V
3
G15
H16
H18
J19
H20
L21
N21
R21
U21
H22
M22
P22
T22
V22
Y29
K29
F29
AB29
A26
A20
A18
A22
A24
H29
M29
V29
AC1
AG1
AB3
AF3
Y4
AJ5
AA6
AB6
AF6
Y7
AA8
AB8
Y9
AF9
AJ9
AB10
AA11
AB12
AF12
AA13
AJ13
AB14
AF15
AB16
AJ17
AB18
AF18
AB20
AF21
AJ21
AB22
AF24
AJ25
AF27
AC29
AF29
AG29
AJ6
AJ8
AD1
AF1
M_PWR_VTTF0
M_PWR_VTTF1
M_PWR_VTTF2
M_PWR_VTTF3
M_PWR_VTTF4
C95
0.1uF/10V
12
C58
0.1uF/10V
C27 0.1uF/10V
C25 0.1uF/10V
C334 0.1uF/10V
C350 0.1uF/10V
C364 0.1uF/10V
+V2.5_GMCH_SM
12
+
CE23
150U/4.0V
12
C405
0.1uF/10V
12
C86
0.1uF/10V
12
C99
0.1uF/10V
+V2.5_GMCHQSM
12
C407
0.1uF/10V
R98
1 2
1Ohm
+V1.2S_GMCH_ASM
12
+
12
CE22
100UF
2
1 2
1 2
1 2
1 2
1 2
12
C67
0.1uF/10V
+V2.5
12
C406
0.1uF/10V
12
C408
0.1uF/10V
12
C102
0.1uF/10V
80Ohm/100MHz
12
C71
0.1uF/10V
2.375V - 2.625V(+/- 5%)
S0-S1M: Max. 2.07A
S3: Max. 25 mA
12
C85
0.1uF/10V
+V2.5_GMCH_SM
12
C117
4.7U
L42
+V1.2S_GMCH_HI
21
1.14V - 1.26V(+/- 5%)
S0-S1M: 0.4 A
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
+VCCP
1.0V - 1.1V(+/- 5%)
S0-S1M: 2.5 A(CPU,MCH,ICH)
12
S0-S1M: Max. 0.72A
+
CE20
150U/4.0V
12
C90
0.1uF/10V
12
C87
0.1uF/10V
Title :
Engineer:
A6G
1
NB-MCHM(PWR)
John Hung
954Friday, October 15, 2004
of
Rev
1.1
+V1.2S
1.14V - 1.26V(+/- 5%)
S0-S1M:Max. 1.4 A
D D
+V1.2S_GMCH_CORE
1.14V - 1.26V(+/- 5%)
S0-S1M: 0.3 A
+V1.2S_GMCH_CORE
1.14V - 1.26V(+/- 5%)
S0-S1M: 0.3 A
C C
B B
12
+
CE21
150U/4.0V
L16
80Ohm/100MHz
CE16
150U/4.0V
L38
80Ohm/100MHz
CE14
150U/4.0V
2.375V - 2.625V(+/- 5%)
S0-S3: Max. 50 mA
1.14V - 1.26V(+/- 5%)
S0-S1M:Max. 90 mA
+V1.2S_GMCH_DPLLA
21
12
+
0.1uF/10V
+V1.2S_GMCH_DPLLB
21
12
+
0.1uF/10V
12
C375
10uF/10V
C327
C326
1.425V - 1.575V(+/- 5%)
S0-S1M: Max. 90 mA
0.1uF/10V
+V1.2S_GMCH_CORE
12
12
1.425V - 1.575V(+/- 5%)
0.1uF/10V
+V2.5
L37
21
80Ohm/100MHz
12
C63
10uF/10V
+V1.5S
CE17
+V1.5S
12
0.1uF/10V
0.1uF/10V
12
0.01UF/10V
C75
12
0.1uF/10V
1.14V - 1.26V(+/- 5%)
S0-S1M: 0.3 A
+V1.2S_GMCH_HI
C83
+
C347
10uF/10V
+V1.5S_GMCH_ADAC
C324
C49
1.14V - 1.26V(+/- 5%)
S0-S1M: 0.3 A
150U/4.0V
C330
1.425V - 1.575V(+/- 5%)
S0-S1M: Max. 70 mA
1.425V - 1.575V(+/- 5%)
S0-S1M: Max. 70 mA
11-08
12
+
CE15
22uF/6.3V
+V3.3S
C320
0.1uF/10V
12
C50
12
12
12
C323
0.1uF/10V
22uF/6.3V
12
3.135V - 3.465V(+/- 5%)
A A
5
10uF/10V
4
5
4
3
2
1
+V2.5 +V2.5
DDR_VREF
_DDR_DATA5
D D
_DDR_DQS06,11 _DDR_DM0 6,11
_DDR_DQS16,11
CLK_DDR06
CLK_DDR0#6
_DDR_DQS26,11
_DDR_DQS36,11
C C
_DDR_DATA0 _DDR_DATA1
_DDR_DATA3
_DDR_DATA8
_DDR_DATA13
_DDR_DATA15
_DDR_DATA10
_DDR_DATA20
_DDR_DATA19
_DDR_DATA23
_DDR_DATA25
_DDR_DATA28
_DDR_DATA27
_DDR_DATA31
CON14A
1 2
VREF0 VREF1
3 4
VSS0 VSS1
5 6
DQ0 DQ4
7 8
DQ1 DQ5
9 10
VDD0 VDD1
11 12
DQS0 DM0
13 14
DQ2 DQ6
15 16
VSS2 VSS3
17 18
DQ3 DQ7
19 20
DQ8 DQ12
21 22
VDD2 VDD3
23 24
DQ9 DQ13
25 26
DQS1 DM1
27 28
VSS4 VSS5
29 30
DQ10 DQ14
31 32
DQ11 DQ15
33 34
VDD4 VDD5
35A
A:CK0
37A
A:CK0#
39 40
VSS7 VSS8
41 42
DQ16 DQ20
43 44
DQ17 DQ21
45 46
VDD7 VDD8
47 48
DQS2 DM2
49 50
DQ18 DQ22
51 52
VSS9 VSS10
53 54
DQ19 DQ23
55 56
DQ24 DQ28
57 58
VDD9 VDD10
59 60
DQ25 DQ29
61 62
DQS3 DM3
63 64
VSS11 VSS12
65 66
DQ26 DQ30
67 68
DQ27 DQ31
69 70
VDD11 VDD12
VDD6
VSS6
36
38
DDR_VREF
_DDR_DATA4
_DDR_DATA6
_DDR_DATA2_DDR_DATA7
_DDR_DATA12
_DDR_DATA11
_DDR_DATA14
_DDR_DATA9
_DDR_DATA17
_DDR_DATA16_DDR_DATA21
_DDR_DATA18
_DDR_DATA22
_DDR_DATA24
_DDR_DATA29
_DDR_DATA26
_DDR_DATA30
_DDR_DM1 6,11
_DDR_DM2 6,11
_DDR_DM3 6,11
CLK_DDR36
CLK_DDR3#6
CLK_DDR56
CLK_DDR5#6
DDR_CKE36,11
DDR_CS2#6,11
_DDR_DATA[63:0]6,11
CON14B
37
B:CK0#
89
B:CK2
91
B:CK2#
95
B:CKE1
97
DDR_AA126,11
DDR_AA96,11
DDR_AA76,11
DDR_AB56,11
DDR_AA36,11
DDR_AB16,11
DDR_AA106,11
DDR_BS0#6,11
DDR_WE#6,11
DDR_AA12
DDR_AA9
DDR_AA7
DDR_AB5
DDR_AA3
DDR_AB1
DDR_AA10
DDR_BS0#
DDR_WE#
B:DU/A13
99
B:A12
101
B:A9
105
B:A7
107
B:A5
109
B:A3
111
B:A1
115
B:A10/AP
117
B:BA0
119
B:WE#
121
B:S0#
201
NC0
202
NC1
203
NC2
204
NC3
Dual_DDR_SODIMM_218P
B:CKE0B:CK0
B:A11
B:A8
B:A6
B:A4
B:A2
B:A0
B:BA1
B:RAS#
B:CAS#
B:S1#
B:CK1#
B:CK1
B:SA0
B:SA1
B:SA2
NP_NC7
NP_NC6
NP_NC5
NP_NC4
96B35
100B
102B
106B
108B
110B
112B
116B
118B
120B
122B
158B
160B
194B
196B
198B
208
207
206
205
DDR_AA11
DDR_AA8
DDR_AA6
DDR_AB4
DDR_AB2
DDR_AA0
DDR_BS1#
DDR_RAS#
DDR_CAS#
12
R122 10KOhm
DDR_CKE2 6,11
DDR_AA11 6,11
DDR_AA8 6,11
DDR_AA6 6,11
DDR_AB4 6,11
DDR_AB2 6,11
DDR_AA0 6,11
DDR_BS1# 6,11
DDR_RAS# 6,11
DDR_CAS# 6,11
DDR_CS3# 6,11
CLK_DDR4# 6
CLK_DDR4 6
+V3.3S
FOR +V2.5 DECOUPLING
85 86
DU_0 DU/RESET#
87 88
VSS13 VSS14
CLK_DDR26
CLK_DDR2#6
DDR_CKE16,11 DDR_CKE0 6,11
DDR_AA126,11
DDR_AA96,11
DDR_AA76,11
DDR_AA56,11
DDR_AA36,11
DDR_AA16,11
DDR_AA106,11
DDR_BS0#6,11
DDR_WE#6,11
DDR_CS0#6,11 DDR_CS1# 6,11
B B
_DDR_DQS46,11
_DDR_DQS56,11
_DDR_DQS66,11
_DDR_DQS76,11
A A
SDA_3S5,22,23
SCL_3S5,22,23
5
DDR_AA12
DDR_AA9 DDR_AA8
DDR_AA3
DDR_BS0#
DDR_WE#
_DDR_DATA34
_DDR_DATA38
_DDR_DATA45
_DDR_DATA41
_DDR_DATA43
_DDR_DATA53
_DDR_DATA52
_DDR_DATA48
_DDR_DATA60
_DDR_DATA57
_DDR_DATA62 _DDR_DATA63
_DDR_DATA58 _DDR_DATA59
+V3.3S
12
C168
0.1uF/10V
89A
A:CK2
91A
A:CK2#
93 94
VDD14 VDD15
95A
A:CKE1
97A
A:DU/A13
99A
A:A12
101A
A:A9
103 104
VSS16 VSS17
105A
A:A7
107A
A:A5
109A
A:A3
111A
A:A1
113 114
VDD16 VDD17
115A
A:A10/AP
117A
A:BA0
119A
A:WE#
121A
A:S0#
123 124
DU_1 DU_3
125 126
VSS18 VSS19
127 128
DQ32 DQ36
129 130
DQ33 DQ37
131 132
VDD18 VDD19
133 134
DQS4 DM4
135 136
DQ34 DQ38
137 138
VSS20 VSS21
139 140
DQ35 DQ39
141 142
DQ40 DQ44
143 144
VDD20 VDD21
145 146
DQ41 DQ45
147 148
DQS5 DM5
149 150
VSS22 VSS23
151 152
DQ42 DQ46
153 154
DQ43 DQ47
155 156
VDD22 VDD23
157
VDD24
159
VSS24
161 162
VSS25 VSS26
163 164
DQ48 DQ52
165 166
DQ49 DQ53
167 168
VDD25 VDD26
169 170
DQS6 DM6
171 172
DQ50 DQ54
173 174
VSS27 VSS28
175 176
DQ51 DQ55
177 178
DQ56 DQ60
179 180
VDD27 VDD28
181 182
DQ57 DQ61
183 184
DQS7 DM7
185 186
VSS29 VSS30
187 188
DQ58 DQ62
189 190
DQ59 DQ63
191 192
VDD29 VDD30
193
SDA
195
SCL
197
VDDSPD
199 200
VDDID DU_2
Dual_DDR_SODIMM_218P
4
VSS15
VDD13
A:CKE0
DU/BA2
A:A11
A:A8
A:A6
A:A4
A:A2
A:A0
A:BA1
A:RAS#
A:CAS#
A:S1#
A:CK1#
A:CK1
A:SA0
A:SA1
A:SA2
90
92
96
98
100
102
106
108
110
112
116
118
120
122
158
160
194
196
198
DDR_AA11
DDR_AA6DDR_AA7
DDR_AA0
DDR_BS1#DDR_AA10
DDR_RAS#
DDR_CAS#
_DDR_DATA32_DDR_DATA37
_DDR_DATA33_DDR_DATA36
_DDR_DATA35
_DDR_DATA39
_DDR_DATA44
_DDR_DATA40
_DDR_DATA42_DDR_DATA46
_DDR_DATA47
_DDR_DATA49
_DDR_DATA51
_DDR_DATA50_DDR_DATA54
_DDR_DATA55
_DDR_DATA56
_DDR_DATA61
DDR_AA11 6,11
DDR_AA8 6,11
DDR_AA6 6,11
DDR_AA4 6,11
DDR_AA2 6,11
DDR_AA0 6,11
DDR_BS1# 6,11
DDR_RAS# 6,11
DDR_CAS# 6,11
_DDR_DM4 6,11
_DDR_DM5 6,11
CLK_DDR1# 6
CLK_DDR1 6
_DDR_DM6 6,11
_DDR_DM7 6,11
3
2.375V - 2.625V(+/- 5%)
+V2.5
S0-S3: 8.12 A
12
12
150U/4.0V
+V2.5
12
150U/4.0V
+V2.5
12
+
+
CE26
150U/4.0V
12
+
+
CE24
150U/4.0V
C531
0.1uF/10V
EMI : Close to DDR
socket power plane
of +V2.5
CE25
CE27
+V2.5
DDR_VREF
12
C150
0.1uF/10V
2
CN2A
1 2
0.1U
CN2B
3 4
0.1U
CN2C
5 6
0.1U
CN2D
7 8
0.1U
CN4A
1 2
0.1U
CN4B
3 4
0.1U
CN4C
5 6
0.1U
CN4D
7 8
0.1U
CN5A
1 2
0.1U
CN5B
3 4
0.1U
CN5C
5 6
0.1U
CN5D
7 8
0.1U
CN3A
1 2
0.1U
CN3B
3 4
0.1U
CN3C
5 6
0.1U
CN3D
7 8
0.1U
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
A6G
Title :
Engineer:
1
DUAL DDR SODIMM
John Hung
10 54Friday, October 15, 2004
of
Rev
1.1
5
_DDR_DATA[63:0]6,10
_DDR_DM[8:0]6,10
_DDR_DQS[8:0]6,10
DDR_AA[12:0]6,10
DDR_AB[2:1]6,10
D D
DDR_AB[5:4]6,10
4
3
2
1
FOR +V1.25S DECOUPLINGDDR TERMINATION
+V1.25S+V1.25S +V1.25S +V1.25S
_DDR_DATA7
_DDR_DATA2
_DDR_DATA3
_DDR_DQS0
_DDR_DATA0
_DDR_DATA5
_DDR_DATA4
_DDR_DATA1
_DDR_DATA12
_DDR_DATA10
_DDR_DATA15
C C
B B
DDR_CKE26,10
DDR_CKE06,10
_DDR_DQS1
_DDR_DATA13
_DDR_DATA8
_DDR_DM0
_DDR_DATA6
_DDR_DATA22
_DDR_DM2
_DDR_DATA17
_DDR_DATA16
_DDR_DATA14
_DDR_DATA9
_DDR_DM1
_DDR_DATA11
_DDR_DATA29
_DDR_DATA18
_DDR_DATA25
_DDR_DATA23
_DDR_DATA19
_DDR_DQS2
_DDR_DATA21
_DDR_DATA20
_DDR_DATA31
_DDR_DATA30
_DDR_DATA26
_DDR_DATA27
_DDR_DQS3
_DDR_DM3
_DDR_DATA24
_DDR_DATA28
DDR_AA12
DDR_AA6
DDR_AA8
DDR_AA11
DDR_CKE2
DDR_CKE0
DDR_AA4
DDR_AA2
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
RN58A56Ohm
RN58B56Ohm
RN58C56Ohm
RN58D56Ohm
RN58E56Ohm
RN58F56Ohm
RN58G56Ohm
RN58H56Ohm
RN57A56Ohm
RN57B56Ohm
RN57C56Ohm
RN57D56Ohm
RN57E56Ohm
RN57F56Ohm
RN57G56Ohm
RN57H56Ohm
RN56A56Ohm
RN56B56Ohm
RN56C56Ohm
RN56D56Ohm
RN56E56Ohm
RN56F56Ohm
RN56G56Ohm
RN56H56Ohm
RN55A56Ohm
RN55B56Ohm
RN55C56Ohm
RN55D56Ohm
RN55E56Ohm
RN55F56Ohm
RN55G56Ohm
RN55H56Ohm
RN54A56Ohm
RN54B56Ohm
RN54C56Ohm
RN54D56Ohm
RN54E56Ohm
RN54F56Ohm
RN54G56Ohm
RN54H56Ohm
RN63A56Ohm
RN63B56Ohm
RN63C56Ohm
RN63D56Ohm
RN63E56Ohm
RN63F56Ohm
RN63G56Ohm
RN63H56Ohm
DDR_CKE36,10
DDR_CKE16,10
DDR_BS1#6,10
DDR_CS3#6,10
DDR_RAS#6,10
DDR_CAS#6,10
DDR_CS0#6,10
DDR_CS2#6,10
DDR_CS1#6,10
DDR_AB2
DDR_AB4
DDR_AA5
DDR_AA1
DDR_CKE3
DDR_CKE1
DDR_BS1#
DDR_CS3#
DDR_AA0
DDR_RAS#
DDR_CAS#
DDR_CS0#
DDR_CS2#
DDR_CS1#
_DDR_DATA32
_DDR_DATA33
_DDR_DATA38
_DDR_DATA34
_DDR_DQS4
_DDR_DATA39
_DDR_DATA36
_DDR_DATA35
_DDR_DM4
_DDR_DATA37
_DDR_DATA42
_DDR_DATA47
_DDR_DQS5
_DDR_DATA41
_DDR_DATA45
_DDR_DATA40
_DDR_DATA44
_DDR_DM5
_DDR_DATA55
_DDR_DATA50
_DDR_DATA53
_DDR_DATA49
_DDR_DM6
_DDR_DATA51
_DDR_DATA43
_DDR_DATA46
_DDR_DATA57
_DDR_DATA56
_DDR_DATA60
_DDR_DATA61
_DDR_DATA48
_DDR_DATA54
_DDR_DQS6
_DDR_DATA52
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
RN62A56Ohm
RN62B56Ohm
RN62C56Ohm
RN62D56Ohm
RN62E56Ohm
RN62F56Ohm
RN62G56Ohm
RN62H56Ohm
RN52A56Ohm
RN52B56Ohm
RN52C56Ohm
RN52D56Ohm
RN52E56Ohm
RN52F56Ohm
RN52G56Ohm
RN52H56Ohm
RN61A56Ohm
RN61B56Ohm
RN61C56Ohm
RN61D56Ohm
RN61E56Ohm
RN61F56Ohm
RN61G56Ohm
RN61H56Ohm
RN51A56Ohm
RN51B56Ohm
RN51C56Ohm
RN51D56Ohm
RN51E56Ohm
RN51F56Ohm
RN51G56Ohm
RN51H56Ohm
RN60A56Ohm
RN60B56Ohm
RN60C56Ohm
RN60D56Ohm
RN60E56Ohm
RN60F56Ohm
RN60G56Ohm
RN60H56Ohm
RN50A56Ohm
RN50B56Ohm
RN50C56Ohm
RN50D56Ohm
RN50E56Ohm
RN50F56Ohm
RN50G56Ohm
RN50H56Ohm
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
1 2
0.1U
5 6
0.1U
CN24A
CN24C
CN19A
CN19C
CN22A
CN22C
CN23A
CN23C
CN27A
CN27C
CN26A
CN26C
CN25A
CN25C
CN20A
CN20C
CN28A
CN28C
CN21A
CN21C
CN16A
CN16C
CN17A
CN17C
CN18A
CN18C
CN15A
CN15C
CN14A
CN14C
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
3 4
0.1U
7 8
0.1U
CN24B
CN24D
CN19B
CN19D
CN22B
CN22D
CN23B
CN23D
CN27B
CN27D
CN26B
CN26D
CN25B
CN25D
CN20B
CN20D
CN28B
CN28D
CN21B
CN21D
CN16B
CN16D
CN17B
CN17D
CN18B
CN18D
CN15B
CN15D
CN14B
CN14D
DDR_WE#6,10
DDR_BS0#6,10
A A
5
DDR_WE#
DDR_BS0#
DDR_AA10
DDR_AB1
DDR_AA3
DDR_AB5
DDR_AA7
DDR_AA9
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
RN53A56Ohm
RN53B56Ohm
RN53C56Ohm
RN53D56Ohm
RN53E56Ohm
RN53F56Ohm
RN53G56Ohm
RN53H56Ohm
4
_DDR_DATA59
_DDR_DATA63
_DDR_DM7
_DDR_DATA58
_DDR_DATA62
_DDR_DQS7
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
3
RN59A56Ohm
RN59B56Ohm
RN59C56Ohm
RN59D56Ohm
RN59E56Ohm
RN59F56Ohm
RN59G56Ohm
RN59H56Ohm
DDR TERMINATION
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
2
Date: Sheet
Engineer:
A6G
John Hung
Rev
1
11 54Friday, October 15, 2004
1.1
of
5
4
3
2
1
W26
W25
AA26
AA25
AA27
AG30
AG28
AF28
AD26
M25
W29
W28
AE26
AC26
AE29
M28
AB29
AD28
AD29
AC28
AC29
AA28
AA29
AF29
AD27
AE28
AB28
M29
M26
M27
AB26
AB25
AC25
AK21
AJ23
AJ22
AK22
AJ24
AK24
AG23
AG24
AK25
AJ25
AH28
AJ29
AH27
AE25
AG26
AH30
AH29
AG29
H29
H28
J29
J28
K29
K28
L29
L28
N28
P29
P28
R29
R28
T29
T28
U29
N25
R26
P25
R27
R25
T25
T26
U25
V27
Y26
Y25
N29
U28
P26
U26
N26
V29
V28
V25
Y28
Y29
V26
E8
B6
U56A
AD0
Part 1 of 7
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE#0
C/BE#1
C/BE#2
C/BE#3
PCICLK
RST#
REQ#
GNT#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
INTA#
WBF#
RBF#
AD_STBF_0
AD_STBF_1
SB_STBF
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
SB_STBS
ADSTBS_0
ADSTBS_1
AGPREF
AGPTEST
DBI_LO
DBI_HI
AGP8X_DET#
R2SET
C_R_Pr
Y_G_Y
COMP_B_Pb
H2SYNC
V2SYNC
DDC3CLK
DDC3DATA
SSIN
SSOUT
XTALIN
XTALOUT
TESTEN
TEST_YCLK(NC)
TEST_MCLK(NC)
PLLTEST(NC)
SUS_STAT#
STP_AGP#
AGP_BUSY#
RSTB_MSK(NC)
M11_P
AGP
PWR
PCI / AGPAGP2X4X
8X
DAC2SSCLK
MAN
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
DVOMODE
ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8
ZV_LCDDATA9
DVO / EXT TMDS / GPIOLVDSTMDSDAC1
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23
ZV_LCDCNTL0
ZV_LCDCNTL1
ZV_LCDCNTL2
ZV_LCDCNTL3
(NC)VREFG
TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P
TXOUT_L3N
TXOUT_L3P
TXCLK_LN
TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P
TXCLK_UN
TXCLK_UP
DIGON
BLON
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TXCM
TXCP
DDC2CLK
DDC2DATA
HPD1
HSYNC
VSYNC
RSET
DDC1DATA
DDC1CLK
AUXWIN
DPLUS
DMINUS
THERM
3
GPIO0
AJ5
GPIO1
AH5
AJ4
AK4
AH4
AF4
AJ3
GPIO7
AK3
AH3
AJ2
GPIO10
AH2
AH1
AG3
AG1
GPIO14
AG2
GPIO15
AF3
GPIO16
AF2
DVOMODE
AE10
AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7
ZV_D16
AF7
ZV_D17
AE8
EDID_DAT
AG8
EDID_CLK
AF8
ZV_D20
AE9
AF9
AG10
AF10
AJ10
AK10
AJ11
AH11
VREF_GPIO
AG4
AK16
AH16
AH17
AJ16
AH18
AJ17
AK19
AH19
AK18
AJ18
AG16
AF16
AG17
AF17
AF18
AE18
AH20
AG20
AF19
AG19
AE12
AG12
AJ13
AH14
AJ14
AH15
AJ15
AK15
AH13
AK13
AE13
AE14
DVI_HP
AF12
AK27
R
AJ27
G
AJ26
B
AG25
AH25
RSET
AH26
AF25
AF24
AUXWIN
AF26
AF11
AE11
T236 TPC28t
1
T237 TPC28t
1
RN94C 4.7KOhm
RN94D 4.7KOhm
LVDS_YA0M 17
LVDS_YA0P 17
LVDS_YA1M 17
LVDS_YA1P 17
LVDS_YA2M 17
LVDS_YA2P 17
LVDS_CLKAM 17
LVDS_CLKAP 17
LVDS_YB0M 17
LVDS_YB0P 17
LVDS_YB1M 17
LVDS_YB1P 17
LVDS_YB2M 17
LVDS_YB2P 17
LVDS_CLKBM 17
LVDS_CLKBP 17
LVDS_VDD_EN 17
LVDS_BACK_EN 17
12
R491
8.2KOhm
R458 100KOhm
1 2
CRT_RED 18
CRT_GREEN 18
CRT_BLUE 18
CRT_HSYNC 18
CRT_VSYNC 18
R459 499Ohm
1 2
CRT_DDC2BD 18
CRT_DDC2BC 18
R460 8.2KOhm
1 2
T238 TPC28t
1
T239 TPC28t
1
+V5
12
R475
8.2KOhm
Q102
2N7002
/
PWR_PLY 51
Strap Option
RN93B
3 4
+V3.3S
GPIO[1,0] = [1,1] : REFCLK 2 TAPS EARLIER
THAN FEEDBACK
RN93A
10KOhm
1 2
10KOhm
GPIO1
GPIO0
32
3
D
1
1
G
S
2
GPIO[3,2] = [0,0] : X1CLK & X2CLK ALIGNED
GPIO[6,5,4] = [0,0,0] & AGP8X_DET#=1: 1.5V
, AGP4X , AD16
56
78
+V3.3S
12
12
R469
1KOhm
R470
1KOhm
+V3.3S
GPIO[8] = 0 : NORMAL OPERATION
GPIO[9,13,12,11] = [0,0,0,0] : NO EXT ROM
R471 0Ohm
12
DVOMODE
DVOMODE = 0 : 3.3V ZV SIGNAL
RN94B
3 4
4.7KOhm
RN94A
1 2
ZV_LCDDATA[17,16] = [0,0] : SINGLE
FUNCTION DEVICE
R468 8.2KOhm
+V3.3S
4.7KOhm
12
ZV_D17
ZV_D16
ZV_D20
ZV_LCDDATA[20] = 1 : NO SLAVE VIP HOST
Use GPIO to choose VRAM
type
ATI M11-P(AGP,LVDS)
1
GPIO7
GPIO14
11-13
John Hung
12 54Friday, October 15, 2004
of
Rev
1.1
R472 8.2KOhm /
+V3.3S
1 2
GPIO[7] = 0 : Samsung 4M*32 VRAM
R473 8.2KOhm /
+V3.3S
1 2
RESERVE GPIO10 FOR OTHER USE
+V3.3S
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
2
Date: Sheet
Engineer:
A6G
AGP_AD[31:0]8
A6G uses M11-CL as
external AGP Graphics.
(M11-CL and M11-P are pin-to-pin compatible!)
D D
AGP_C/BE#[3:0]8
_CLK_AGP6623
C C
12
C659
5P
/
11-12
B B
AGP_VREF8
XTALIN XTALOUT
C651
12P
A A
+V3.3S
RN95B
RN95A
12
X8 27Mhz
1 2
R467
12
1MOhm
3 4
10KOhm
1 2
10KOhm
5
12
C650
0.1UF
C652
12
12P
SUS_STAT#
PM_C3_STAT#
BUF_PCI_RST#18,19,24,25,26,31,32
AGP_REQ#8
AGP_GNT#8
AGP_PAR8
AGP_STOP#8
AGP_DEVSEL#8
AGP_TRDY#8
AGP_IRDY#8
AGP_FRAME#8
PCI_INTA#20,22,27
AGP_WBF#8
AGP_RBF#8
AGP_ADSTB08
AGP_ADSTB18
AGP_SBSTB8
AGP_SBSTB#8
AGP_ADSTB0#8
AGP_ADSTB1#8
+V1.5S
+V3.3S
R478 0Ohm
1 2
R479 0Ohm
1 2
R480 0Ohm
1 2
R481 0Ohm
1 2
R482 0Ohm
1 2
R483 0Ohm
1 2
R484 0Ohm
1 2
R485 0Ohm
1 2
R486 0Ohm
1 2
R487 0Ohm
1 2
AGP_SBA[7:0]8
AGP_ST08
AGP_ST18
AGP_ST28
R488 0Ohm
1 2
R489 0Ohm
1 2
R490 0Ohm
1 2
1 2
R452 47Ohm
1 2
R477 8.2KOhm
R453 715 Ohm 1%
R454 8.2KOhm
R455 8.2KOhm /
R456 1KOhm
R457 1KOhm
1 2
1 2
SUS_STAT#20
PM_C3_STAT#20
AGP_BUSY#20,22
12
TV_C18
TV_Y18
TV_CVBS18
12
12
4
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31
AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3
ATI_STOP#
ATI_DEVSEL#
ATI_TRDY#
ATI_IRDY#
ATI_FRAME#
ATI_WBF#
ATI_RBF#
ATI_ADSTB0
ATI_ADSTB1
ATI_SBSTB
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7
ATI_SBSTB#
ATI_ADSTB0#
ATI_ADSTB1#
AGPTEST
1%
AGP_DBI_LO
AGP_DBI_HI
R2SET
SSC_IN
SSC_OUT
XTALIN
XTALOUT
RESET_MASK
5
4
3
2
1
D D
VMA_D[0:63]15 VMB_D[0:63]16
C C
B B
VMA_D0
VMA_D1
VMA_D2
VMA_D3
VMA_D4
VMA_D5
VMA_D6
VMA_D7
VMA_D8
VMA_D9
VMA_D10
VMA_D11
VMA_D12
VMA_D13
VMA_D14
VMA_D15
VMA_D16
VMA_D17
VMA_D18
VMA_D19
VMA_D20
VMA_D21
VMA_D22
VMA_D23
VMA_D24
VMA_D25
VMA_D26
VMA_D27
VMA_D28
VMA_D29
VMA_D30
VMA_D31
VMA_D32
VMA_D33
VMA_D34
VMA_D35
VMA_D36
VMA_D37
VMA_D38
VMA_D39
VMA_D40
VMA_D41
VMA_D42
VMA_D43
VMA_D44
VMA_D45
VMA_D46
VMA_D47
VMA_D48
VMA_D49
VMA_D50
VMA_D51
VMA_D52
VMA_D53
VMA_D54
VMA_D55
VMA_D56
VMA_D57
VMA_D58
VMA_D59
VMA_D60
VMA_D61
VMA_D62
VMA_D63
To A CHANNEL VRAM To B CHANNEL VRAM
U56B
L25
DQA0
L26
DQA1
K25
DQA2
K26
DQA3
J26
DQA4
H25
DQA5
H26
DQA6
G26
DQA7
G30
DQA8
D29
DQA9
D28
DQA10
E28
DQA11
E29
DQA12
G29
DQA13
G28
DQA14
F28
DQA15
G25
DQA16
F26
DQA17
E26
DQA18
F25
DQA19
E24
DQA20
F23
DQA21
E23
DQA22
D22
DQA23
B29
DQA24
C29
DQA25
C25
DQA26
C27
DQA27
B28
DQA28
B25
DQA29
C26
DQA30
B26
DQA31
F17
DQA32
E17
DQA33
D16
DQA34
F16
DQA35
E15
DQA36
F14
DQA37
E14
DQA38
F13
DQA39
C17
DQA40
B18
DQA41
B17
DQA42
B15
DQA43
C13
DQA44
B14
DQA45
C14
DQA46
C16
DQA47
A13
DQA48
A12
DQA49
C12
DQA50
B12
DQA51
C10
DQA52
C9
DQA53
B9
DQA54
B10
DQA55
E13
DQA56
E12
DQA57
E10
DQA58
F12
DQA59
F11
DQA60
E9
DQA61
F9
DQA62
F8
DQA63
M11_P
Part 2 of 7
MEMORY INTERFACE
(MAA13)MAA12
(MAA12)MAA13
(NC)MAA14
A
(NC)MVREFS
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
RASA#
CASA#
WEA#
CSA0#
CSA1#
CKEA
CLKA0
CLKA0#
CLKA1
CLKA1#
MVREFD
DIMA_0
DIMA_1
E22
B22
B23
B24
C23
C22
F22
F21
C21
A24
C24
A25
E21
B20
C19
J25
F29
E25
A27
F15
C15
C11
E11
J27
F30
F24
B27
E16
B16
B11
F10
A19
E18
E19
E20
F20
B19
B21
C20
C18
A18
MEM_VREF_DATA
B7
MEM_VREF_STROBE
B8
D30
B13
VMA_A0
VMA_A1
VMA_A2
VMA_A3
VMA_A4
VMA_A5
VMA_A6
VMA_A7
VMA_A8
VMA_A9
VMA_A10
VMA_A11
VMA_A12
VMA_A13
DQM_A0
DQM_A1
DQM_A2
DQM_A3
DQM_A4
DQM_A5
DQM_A6
DQM_A7
DQS_A0
DQS_A1
DQS_A2
DQS_A3
DQS_A4
DQS_A5
DQS_A6
DQS_A7
VMA_A[0:13] 15
DQM_A[0:7] 15
DQS_A[0:7] 15 DQS_B[0:7] 16
RAS_A# 15
CAS_A# 15
WE_A# 15
CS_A0# 15
CS_A1# 15
CKE_A 15
MEMCLKA0 15
MEMCLKA0# 15
MEMCLKA1 15
MEMCLKA1# 15
VMB_D0
VMB_D1
VMB_D2
VMB_D3
VMB_D4
VMB_D5
VMB_D6
VMB_D7
VMB_D8
VMB_D9
VMB_D10
VMB_D11
VMB_D12
VMB_D13
VMB_D14
VMB_D15
VMB_D16
VMB_D17
VMB_D18
VMB_D19
VMB_D20
VMB_D21
VMB_D22
VMB_D23
VMB_D24
VMB_D25
VMB_D26
VMB_D27
VMB_D28
VMB_D29
VMB_D30
VMB_D31
VMB_D32
VMB_D33
VMB_D34
VMB_D35
VMB_D36
VMB_D37
VMB_D38
VMB_D39
VMB_D40
VMB_D41
VMB_D42
VMB_D43
VMB_D44
VMB_D45
VMB_D46
VMB_D47
VMB_D48
VMB_D49
VMB_D50
VMB_D51
VMB_D52
VMB_D53
VMB_D54
VMB_D55
VMB_D56
VMB_D57
VMB_D58
VMB_D59
VMB_D60
VMB_D61
VMB_D62
VMB_D63
AD6
AD5
AC2
AC3
AD3
U56C
D7
DQB0
F7
DQB1
E7
DQB2
G6
DQB3
G5
DQB4
F5
DQB5
E5
DQB6
C4
DQB7
B5
DQB8
C5
DQB9
A4
DQB10
B4
DQB11
C2
DQB12
D3
DQB13
D1
DQB14
D2
DQB15
G4
DQB16
H6
DQB17
H5
DQB18
J6
DQB19
K5
DQB20
K4
DQB21
L6
DQB22
L5
DQB23
G2
DQB24
F3
DQB25
H2
DQB26
E2
DQB27
F2
DQB28
J3
DQB29
F1
DQB30
H3
DQB31
U6
DQB32
U5
DQB33
U3
DQB34
V6
DQB35
W5
DQB36
W4
DQB37
Y6
DQB38
Y5
DQB39
U2
DQB40
V2
DQB41
V1
DQB42
V3
DQB43
W3
DQB44
Y2
DQB45
Y3
DQB46
AA2
DQB47
AA6
DQB48
AA5
DQB49
AB6
DQB50
AB5
DQB51
DQB52
DQB53
AE5
DQB54
AE4
DQB55
AB2
DQB56
AB3
DQB57
DQB58
DQB59
DQB60
AE1
DQB61
AE2
DQB62
AE3
DQB63
M11_P
Part 3 of 7
(MAB13)MAB12
(MAB12)MAB13
MEMORY INTERFACE
B
MEMVMODE_0
MEMVMODE_1
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
(NC)MAB14
DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7
QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7
RASB#
CASB#
WEB#
CSB0#
CSB1#
CKEB
CLKB0
CLKB0#
CLKB1
CLKB1#
DIMB_0
DIMB_1
ROMCS#
MEMTEST
N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2
E6
B2
J5
G3
W6
W2
AC6
AD2
F6
B3
K6
G1
V5
W1
AC5
AD1
R2
T5
T6
R5
R6
R3
N1
N2
T2
T3
E3
AA3
AF5
C6
C7
C8
VMB_A0
VMB_A1
VMB_A2
VMB_A3
VMB_A4
VMB_A5
VMB_A6
VMB_A7
VMB_A8
VMB_A9
VMB_A10
VMB_A11
VMB_A12
VMB_A13
DQM_B0
DQM_B1
DQM_B2
DQM_B3
DQM_B4
DQM_B5
DQM_B6
DQM_B7
DQS_B0
DQS_B1
DQS_B2
DQS_B3
DQS_B4
DQS_B5
DQS_B6
DQS_B7
MEM_MODE0
MEM_MODE1
MEMTEST
VMB_A[0:13] 16
DQM_B[0:7] 16
RAS_B# 16
CAS_B# 16
WE_B# 16
CS_B0# 16
CS_B1# 16
CKE_B 16
MEMCLKB0 16
MEMCLKB0# 16
MEMCLKB1 16
MEMCLKB1# 16
1 2
R451 47Ohm
1%
+VDD_VRAM+VDD_VRAM
12
R443
1KOhm
R444
1KOhm
MEM_VREF_STROBE
12
C648
0.1UF
MEM_VREF_DATA
12
C646
A A
5
0.1UF
12
C647
10UF/6.3V
12
4
12
C649
10UF/6.3V
12
12
R445
1KOhm
1%1%
R446
1KOhm
1%1%
3
MEM_MODE0
MEM_MODE1
MEMVMODE[1:0]=01 for VDDR 2.5V
MEMVMODE[1:0]=10 for VDDR 1.8V
+V1.8S
12
R447
8.2KOhm
/
12
R448
8.2KOhm
12
R449
8.2KOhm
12
R450
8.2KOhm
/
ATI M11-P(MEMORY IF)
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
2
Date: Sheet
Engineer:
A6G
John Hung
Rev
1
13 54Friday, October 15, 2004
1.1
of
5
4
3
2
1
+VDD_VRAM
<MEMORY I/O>
181.7mA
12
D D
12
C596
0.01U
D59
SS0540
/
+V3.3S
+V2.5S
C C
+V1.8S
+V1.8S
+VDD_VRAM
B B
+V2.5S
+V1.8S
+V1.8S
A A
+V1.8S
1 2
L68
120Ohm/100MHz
21
L69
120Ohm/100MHz
21
L70
120Ohm/100MHz
21
L71
120Ohm/100MHz
21
L72
120Ohm/100MHz
21
L73
120Ohm/100MHz
21
L74
120Ohm/100MHz
21
L75
120Ohm/100MHz
21
5
12
C591
10UF/6.3V
X5R
C592
10UF/6.3V
X5R
12
12
C597
C598
0.01U
0.01U
To solve ATI M10 & M11
LVDS output DPM issue.
12
12
12
12
12
12
12
12
C612
10UF/6.3V
X5R
C614
10UF/6.3V
X5R
C616
10UF/6.3V
X5R
C618
10UF/6.3V
X5R
C620
10UF/6.3V
X5R
C622
10UF/6.3V
X5R
C624
10UF/6.3V
X5R
C626
10UF/6.3V
X5R
12
C613
0.1UF
12
C615
0.1UF
12
C617
0.1UF
12
C619
0.1UF
12
C621
0.1UF
12
C623
0.1UF
12
C625
0.1UF
12
C627
0.1UF
12
12
C593
C594
0.1UF
0.1UF
12
12
C599
C600
1000P
1000P
<LVDS I/O>
122.7mA
+VDDR25
<LVDS Logic>
<TMDS I/O>
30.0mA
+VDDR18
<LVDS PLL>
<TMDS PLL>
6.0mA
+LPVDD
<MEMORY CLOCK>
+VDDRH
<DAC2>
78.7mA
+A2VDD
<DAC>
73.8mA
+AVDD
<PLL>
28.1mA
+PVDD
<MEMORY PLL>
5.8mA
+MPVDD
12
C595
0.1UF
12
C601
1000P
+VDDR25
+VDDR18
+LPVDD
+VDDR18
+VDDRH
+A2VDD
+AVDD
+PVDD
+MPVDD
U56D
T7
VDDR1_1
R4
VDDR1_2(CLKBFB)
R1
VDDR1_3
N8
VDDR1_4
N7
VDDR1_5
M4
VDDR1_6
L27
VDDR1_7
L8
VDDR1_8
J24
VDDR1_9
J23
VDDR1_10
J8
VDDR1_11
J7
VDDR1_12
J4
VDDR1_13
J1
VDDR1_14
H10
VDDR1_15
H13
VDDR1_16
H15
VDDR1_17
H17
VDDR1_18
T8
VDDR1_19
V4
VDDR1_20
V7
VDDR1_21
V8
VDDR1_22
AA1
VDDR1_23
AA4
VDDR1_24
AA7
VDDR1_25
AA8
VDDR1_26
A3
VDDR1_27
A9
VDDR1_28
A15
VDDR1_29
A21
VDDR1_30
A28
VDDR1_31
B1
VDDR1_32
B30
VDDR1_33
D26
VDDR1_34
D23
VDDR1_35
D20
VDDR1_36
D17
VDDR1_37
D14
VDDR1_38
D11
VDDR1_39
D8
VDDR1_40
D5
VDDR1_41
E27
VDDR1_42
F4
VDDR1_43
G7
VDDR1_44
G10
VDDR1_45
G13
VDDR1_46
G15
VDDR1_47
G19
VDDR1_48
G22
VDDR1_49
G27
VDDR1_50
H22
VDDR1_51
H19
VDDR1_52
AD4
VDDR1_53
T4
VDDR1_54
N4
VDDR1_55
D19
VDDR1_56(CLKAFB)
D13
VDDR1_57
AE17
LVDDR_25(LVDDR18_25)_1
AE20
LVDDR_25(LVDDR18_25)_2
AE15
LVDDR_18_1
AF21
LVDDR_18_2
AJ20
LPVDD
AK12 AJ12
TPVDD TPVSS
AF13
TXVDDR_1
AF14
TXVDDR_2
F18
VDDRH0
N6
VDDRH1
AG21
A2VDD_1
AH21
A2VDD_2
AF22
A2VDDQ
AH24
AVDD
AE24
VDD1DI
AE22
VDD2DI
AK28 AJ28
PVDD PVSS
A7 A6
MPVDD MPVSS
4
Part 4 of 7
I/O
M11_P
VDDC_63
VDDC_64
VDDC_65
VDDC_66
VDDC_67
(VDDC18)VDD15_1
(VDDC18)VDD15_2
(VDDC18)VDD15_3
(VDDC18)VDD15_4
(VDDC18)VDD15_5
(VDDC18)VDD15_6
(VDDC18)VDD15_7
(VDDC18)VDD15_8
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8
VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4
VDDR4_5
VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
VDDP_9
VDDP_10
VDDP_11
VDDP_12
VDDP_13
VDDP_14
VDDP_15
VDDP_16
VDDP_17
VDDP_18
VDDP_19
VDDP_20
VDDP_21
AVSSQ
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LPVSS
TXVSSR_1
TXVSSR_2
TXVSSR_3
VSSRH0
POWER
VSSRH1
A2VSSN_1
A2VSSN_2
A2VSSQ
AVSSN
VSS1DI
VSS2DI
AC13
AD13
AD15
AC15
AC17
P8
Y8
AC11
AC20
Y23
L23
H20
H11
AD7
AD19
AD21
AD22
AC22
AC21
AC19
AC8
AG7
AD9
AC9
AC10
AD10
J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
Y27
W30
V23
V24
M23
M24
N30
P23
P27
T23
T24
T30
U27
AD24
AF20
AE19
AE16
AF15
AJ19
AH12
AG13
AG14
F19
M6
AH22
AJ21
AF23
AH23
AE23
AE21
+VGACORE
<VGA CORE>
8236.3mA
12
12
C602
C603
0.01U
0.01U
<CORE to I/O>
39.3mA
<GPIO>
2.7mA
12
12
C632
C631
0.01U
0.01U
<DVO>
2.0mA
<AGP BUS>
65.3mA
12
12
C637
C636
0.01U
0.01U
3
12
12
C604
0.1UF
12
C628
0.1UF
12
C633
0.1UF
12
C638
0.1UF
U56E
A2
VSS_1
A10
VSS_2
A16
VSS_3
A22
VSS_4
A29
VSS_5
C1
VSS_6
C3
VSS_7
C28
VSS_8
C30
VSS_9
D27
VSS_10
D24
VSS_11
D21
VSS_12
D18
VSS_13
D15
VSS_14
D12
VSS_15
D9
VSS_16
D6
VSS_17
D4
VSS_18
F27
VSS_19
G9
VSS_20
G12
VSS_21
G16
VSS_22
G18
VSS_23
G21
VSS_24
G24
VSS_25
H27
VSS_26
H23
VSS_27
H21
VSS_28
H18
VSS_29
H16
VSS_30
H14
VSS_31
H12
VSS_32
H9
VSS_33
H8
VSS_34
H4
VSS_35
K30
VSS_36
K27
VSS_37
K24
VSS_38
K23
VSS_39
AG15
VSS_40
AD12
VSS_41
AE27
VSS_42
AG5
VSS_43
AG9
VSS_44
AG11
VSS_45
AG18
VSS_46
AG22
VSS_47
AG27 AJ1
VSS_48 VSS_98
E4
VSS_49
AB4
VSS_50
M11_P
12
12
C605
0.1UF
12
12
C629
0.1UF
12
12
C634
0.1UF
12
12
C639
0.1UF
Part 5 of 7
CORE GND
C606
10UF/6.3V
C630
10UF/6.3V
C635
10UF/6.3V
C640
10UF/6.3V
C607
10UF/6.3V
L80
120Ohm/100MHz
21
12
C641
10UF/6.3V
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_99
VSS_100
12
12
12
C609
C608
0.1UF
0.1UF
ATI recommands to
have a cleaner Power!
+V1.5S
+V3.3S
+V3.3S
+V1.5S
K8
K7
K1
L4
M30
M8
M7
N23
N24
N27
P4
R7
R8
R23
R24
R30
T27
T1
U4
U8
U23
V30
W7
W8
W23
W24
W27
Y4
AA30
AB27
AB24
AB23
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD30
AD25
AD18
AK2
AK29
AJ30
D10
D25
2
U56F
P17
VDDC_1
P18
VDDC_2
12
C610
C611
0.01U
0.01U
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
P19
VDDC_3
U12
VDDC_4
U13
VDDC_5
U14
VDDC_6
U17
VDDC_7
U18
VDDC_8
U19
VDDC_9
V19
VDDC_10
V18
VDDC_11
V17
VDDC_12
V14
VDDC_13
V13
VDDC_14
V12
VDDC_15
N18
VDDC_16
N17
VDDC_17
N14
VDDC_18
W17
VDDC_19
W18
VDDC_20
W12
VDDC_21
W13
VDDC_22
W14
VDDC_23
N13
VDDC_24
N19
VDDC_25
M19
VDDC_26
M18
VDDC_27
M12
VDDC_28
N12
VDDC_29
M13
VDDC_30
M14
VDDC_31
P12
VDDC_32
P13
VDDC_33
P14
VDDC_34
M17
VDDC_35
W19
VDDC_36
M11_P
L76
60Ohm/100MHz
J10
VDDC_37
J12
VDDC_38
J14
VDDC_39
J15
VDDC_40
J16
VDDC_41
J17
VDDC_42
J19
VDDC_43
J21
VDDC_44
K9
VDDC_45
K22
VDDC_46
M9
VDDC_47
M22
VDDC_48
P9
VDDC_49
P22
VDDC_50
R9
VDDC_51
R22
VDDC_52
T9
VDDC_53
T22
VDDC_54
U9
VDDC_55
U22
VDDC_56
V9
VDDC_57
V22
VDDC_58
Y9
VDDC_59
Y22
VDDC_60
AB9
VDDC_61
AB22
VDDC_62
Part 6 of 7
M10-P
(708 BGA)
M9+X
(708 BGA)
CENTER
ARRAY
<Isolated CORE Power>
+VDDCI
21
12
C642
10UF/6.3V
X5R
U56G
Part 7 of 7
M9+X
(708
BGA)
INNER
ROWS
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
M11_P
Title :
Engineer:
A6G
1
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
12
C643
0.1UF
J9
J11
J13
J18
J20
J22
L9
L22
N9
N22
W9
W22
AA9
AA22
ATI M11-P(PWR)
M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16
W16
M15
R19
T12
12
C644
0.01U
John Hung
14 54Friday, October 15, 2004
of
12
C645
1000P
Rev
1.1
5
VMA_A[13:0]13
VMA_D[0:63]13
4
3
2
1
U58
N4
BA0
M5
BA1
M7
A11
L6
A10
M8
A9
N11
A8/AP
N10
A7
N9
A6
M9
A5
N8
A4
N7
A3
M6
A2
N6
A1
N5
A0
M11
CLK
M12
CLK#
N12
CKE
N2
CS#
M2
RAS#
L2
CAS#
L3
WE#
B13
DQS3
H2
DQS2
H13
DQS1
B2
DQS0
B12
DM3
H3
DM2
H12
DM1
B3
DM0
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
C4
NC1
C11
NC2
H4
NC3
H11
NC4
L12
NC5
L13
NC6
M3
NC7
M4
NC8
N3
NC9
F6
VSS TH1
F7
VSS TH2
F8
VSS TH3
F9
VSS TH4
G6
VSS TH5
G7
VSS TH6
G8
VSS TH7
G9
VSS TH8
H6
VSS TH9
H7
VSS TH10
H8
VSS TH11
H9
VSS TH12
J6
VSS TH13
J7
VSS TH14
J8
VSS TH15
J9
VSS TH16
K4D263238E_GC33
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VMA_D39
B8
VMA_D37
C9
VMA_D38
B9
VMA_D36
B10
VMA_D35
C13
VMA_D34
D12
VMA_D32
D13
VMA_D33
E13
VMA_D53
K3
VMA_D54
K2
VMA_D55
J2
VMA_D52
J3
VMA_D51
G2
VMA_D49
G3
VMA_D50
F2
VMA_D48
F3
VMA_D44
F12
VMA_D45
F13
VMA_D46
G12
VMA_D43
G13
VMA_D47
J12
VMA_D42
J13
VMA_D41
K12
VMA_D40
K13
VMA_D63
E2
VMA_D62
D2
VMA_D61
D3
VMA_D58
C2
VMA_D60
B5
VMA_D59
B6
VMA_D57
C6
VMA_D56
B7
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
12
C576
0.1UF
SWAP
+VDD_VRAM
12
C577
0.1UF
12
12
C578
0.1UF
C579
0.1UF
12
C580
10UF/6.3V
M11
M12
M13
M10
N4
BA0
M5
BA1
M7
A11
L6
A10
M8
A9
N11
A8/AP
N10
A7
N9
A6
M9
A5
N8
A4
N7
A3
M6
A2
N6
A1
N5
A0
CLK
CLK#
N12
CKE
N2
CS#
M2
RAS#
L2
CAS#
L3
WE#
B13
DQS3
H2
DQS2
H13
DQS1
B2
DQS0
B12
DM3
H3
DM2
H12
DM1
B3
DM0
N13
VREF
MCL
L9
RFU1
RFU2
C4
NC1
C11
NC2
H4
NC3
H11
NC4
L12
NC5
L13
NC6
M3
NC7
M4
NC8
N3
NC9
F6
VSS TH1
F7
VSS TH2
F8
VSS TH3
F9
VSS TH4
G6
VSS TH5
G7
VSS TH6
G8
VSS TH7
G9
VSS TH8
H6
VSS TH9
H7
VSS TH10
H8
VSS TH11
H9
VSS TH12
J6
VSS TH13
J7
VSS TH14
J8
VSS TH15
J9
VSS TH16
U57
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
K4D263238E_GC33
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VMA_D29
B8
VMA_D31
C9
VMA_D26
B9
VMA_D30
B10
VMA_D27
C13
VMA_D28
D12
VMA_D24
D13
VMA_D25
E13
VMA_D21
K3
VMA_D22
K2
VMA_D23
J2
VMA_D20
J3
VMA_D19
G2
VMA_D18
G3
VMA_D17
F2
VMA_D16
F3
VMA_D9
F12
VMA_D10
F13
VMA_D12
G12
VMA_D11
G13
VMA_D8
J12
VMA_D15
J13
VMA_D14
K12
VMA_D13
K13
VMA_D0
E2
VMA_D1
D2
VMA_D2
D3
VMA_D3
C2
VMA_D5
B5
VMA_D7
B6
VMA_D6
C6
VMA_D4
B7
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
12
C571
0.1UF
12
12
C572
0.1UF
C573
0.1UF
12
C574
0.1UF
MEMCLKA113
+VDD_VRAM
12
C575
10UF/6.3V
12
R429
56.2Ohm
1%
12
12
R430
56.2Ohm
1%1%
MEMCLKA1#13
SWAP
+VDD_VRAM
SWAP
12
R437
1KOhm
1%
12
R438
1KOhm
1%
C564
0.01U
CKE_A13
CS_A0#13
RAS_A#13
CAS_A#13
WE_A#13
DQS_A413
DQS_A613
DQS_A513
DQS_A713
DQM_A413
DQM_A613
DQM_A513
DQM_A713
12
C568
0.1UF
D D
MEMCLKA013
MEMCLKA0#13
C C
R435
1KOhm
1%
R436
1KOhm
1%
B B
A A
R427
56.2Ohm
1%
R428
56.2Ohm
+VDD_VRAM
12
12
12
12
12
C563
0.01U
CKE_A13
CS_A0#13
RAS_A#13
CAS_A#13
WE_A#13
DQS_A313
DQS_A213
DQS_A113
DQS_A013
DQM_A313
DQM_A213
DQM_A113
DQM_A013
12
C567
0.1UF
CS_A1#13
VMA_A12
VMA_A13
VMA_A11
VMA_A10
VMA_A9
VMA_A8
VMA_A7
VMA_A6
VMA_A5
VMA_A4
VMA_A3
VMA_A2
VMA_A1
VMA_A0
VREF_A1
VMA_A12
VMA_A13
VMA_A11
VMA_A10
VMA_A9
VMA_A8
VMA_A7
VMA_A6
VMA_A5
VMA_A4
VMA_A3
VMA_A2
VMA_A1
VMA_A0
VREF_A2
CS_A1#
VRAM(A CHANNEL)
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
5
4
3
2
Date: Sheet
Engineer:
A6G
John Hung
Rev
1
15 54Friday, October 15, 2004
1.1
of
5
VMB_A[13:0]13
VMB_D[0:63]13 B_D[0:63]
4
3
2
1
U60
N4
BA0
M5
BA1
M7
A11
L6
A10
M8
A9
N11
A8/AP
N10
A7
N9
A6
M9
A5
N8
A4
N7
A3
M6
A2
N6
A1
N5
A0
M11
CLK
M12
CLK#
N12
CKE
N2
CS#
M2
RAS#
L2
CAS#
L3
WE#
B13
DQS3
H2
DQS2
H13
DQS1
B2
DQS0
B12
DM3
H3
DM2
H12
DM1
B3
DM0
N13
VREF
M13
MCL
L9
RFU1
M10
RFU2
C4
NC1
C11
NC2
H4
NC3
H11
NC4
L12
NC5
L13
NC6
M3
NC7
M4
NC8
N3
NC9
F6
VSS TH1
F7
VSS TH2
F8
VSS TH3
F9
VSS TH4
G6
VSS TH5
G7
VSS TH6
G8
VSS TH7
G9
VSS TH8
H6
VSS TH9
H7
VSS TH10
H8
VSS TH11
H9
VSS TH12
J6
VSS TH13
J7
VSS TH14
J8
VSS TH15
J9
VSS TH16
K4D263238E_GC33
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VMB_D38
B8
VMB_D39
C9
VMB_D36
B9
VMB_D35
B10
VMB_D34
C13
VMB_D37
D12
VMB_D33
D13
VMB_D32
E13
VMB_D55
K3
VMB_D54
K2
VMB_D53
J2
VMB_D52
J3
VMB_D51
G2
VMB_D50VMB_D18
G3
VMB_D49
F2
VMB_D48
F3
VMB_D47
F12
VMB_D46
F13
VMB_D45
G12
VMB_D44
G13
VMB_D43
J12
VMB_D42
J13
VMB_D41
K12
VMB_D40
K13
VMB_D63
E2
VMB_D62
D2
VMB_D60
D3
VMB_D61
C2
VMB_D56
B5
VMB_D58
B6
VMB_D59
C6
VMB_D57
B7
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
12
C586
0.1UF
SWAP
12
12
12
C587
0.1UF
C588
0.1UF
C589
0.1UF
12
C590
10UF/6.3V
M11
M12
M13
M10
N4
BA0
M5
BA1
M7
A11
L6
A10
M8
A9
N11
A8/AP
N10
A7
N9
A6
M9
A5
N8
A4
N7
A3
M6
A2
N6
A1
N5
A0
CLK
CLK#
N12
CKE
N2
CS#
M2
RAS#
L2
CAS#
L3
WE#
B13
DQS3
H2
DQS2
H13
DQS1
B2
DQS0
B12
DM3
H3
DM2
H12
DM1
B3
DM0
N13
VREF
MCL
L9
RFU1
RFU2
C4
NC1
C11
NC2
H4
NC3
H11
NC4
L12
NC5
L13
NC6
M3
NC7
M4
NC8
N3
NC9
F6
VSS TH1
F7
VSS TH2
F8
VSS TH3
F9
VSS TH4
G6
VSS TH5
G7
VSS TH6
G8
VSS TH7
G9
VSS TH8
H6
VSS TH9
H7
VSS TH10
H8
VSS TH11
H9
VSS TH12
J6
VSS TH13
J7
VSS TH14
J8
VSS TH15
J9
VSS TH16
U59
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
K4D263238E_GC33
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VMB_D31
B8
VMB_D26
C9
VMB_D29
B9
VMB_D30
B10
VMB_D24
C13
VMB_D28
D12
VMB_D27
D13
VMB_D25
E13
VMB_D23
K3
VMB_D22
K2
VMB_D21
J2
VMB_D20
J3
VMB_D19
G2
G3
VMB_D17
F2
VMB_D16
F3
VMB_D15
F12
VMB_D14
F13
VMB_D13
G12
VMB_D12
G13
VMB_D11
J12
VMB_D10
J13
VMB_D9
K12
VMB_D8
K13
VMB_D1
E2
VMB_D3
D2
VMB_D4
D3
VMB_D5
C2
VMB_D6
B5
VMB_D2
B6
VMB_D7
C6
VMB_D0
B7
C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11
D7
D8
E4
E11
L4
L7
L8
L11
B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10
E5
E7
E8
E10
K6
K7
K8
K9
L5
L10
12
C581
0.1UF
12
12
C582
0.1UF
C583
0.1UF
12
C584
0.1UF
MEMCLKB113
MEMCLKB1#13
+VDD_VRAM +VDD_VRAM
12
C585
10UF/6.3V
R441
1KOhm
1%
R442
1KOhm
1%
R433
56.2Ohm
1%1%
R434
56.2Ohm
1%
+VDD_VRAM
12
12
SWAP
SWAP
12
12
12
C566
0.01U
CKE_B13
CS_B0#13CS_B0#13
RAS_B#13
CAS_B#13
WE_B#13
DQS_B413
DQS_B613
DQS_B513
DQS_B713
DQM_B413
DQM_B613
DQM_B513
DQM_B713
12
C570
0.1UF
VMB_A12
VMB_A13
VMB_A11
VMB_A10
VMB_A9
VMB_A8
VMB_A7
VMB_A6
VMB_A5
VMB_A4
VMB_A3
VMB_A2
VMB_A1
VMB_A0
VREF_B2
CS_B1#
D D
MEMCLKB013
MEMCLKB0#13
C C
R439
1KOhm
1%
R440
1KOhm
1%
B B
A A
R431
56.2Ohm
R432
56.2Ohm
1%
+VDD_VRAM
12
12
12
12
12
C565
0.01U
CKE_B13
RAS_B#13
CAS_B#13
WE_B#13
DQS_B313
DQS_B213
DQS_B113
DQS_B013
DQM_B313
DQM_B213
DQM_B113
DQM_B013
12
C569
0.1UF
CS_B1#13
VMB_A12
VMB_A13
VMB_A11
VMB_A10
VMB_A9
VMB_A8
VMB_A7
VMB_A6
VMB_A5
VMB_A4
VMB_A3
VMB_A2
VMB_A1
VMB_A0
VREF_B1
VRAM(B CHANNEL)
Title :
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
5
4
3
2
Date: Sheet
Engineer:
A6G
John Hung
Rev
1
16 54Friday, October 15, 2004
1.1
of
A
BIOS
BACK_OFF#: When user
pushs "Fn+F7" button,
BIOS activate this pin to
turn off back light.
1 1
BACK_OFF#20
LVDS_BACK_EN12
LID_SW#42
BIOS
BACK_ADJ: KBC
output D/A signal
(adjust voltage level)
to adjust Back light.
BACK_ADJ31
2 2
INTMIC_A37
L33
120Ohm/100MHz
12
C1
0.001uF/50V
21
GND_MIC
D26
RB751V_40
12
1
3
2
D27
RB717F
L31 120Ohm/100MHz
21
L29 120Ohm/100MHz
INTMIC_A_GND_CON
21
INTMIC_A_CON
21
L1 120Ohm/100MHz
0.001uF/50V
12
C291
12
R217
10KOhm
L34
120Ohm/100MHz
2 1
12
C293
0.001uF/50V
B
L30
80Ohm/100MHz
2 1
12
C290
0.1uF/10V
A6G uses D1 R:1.0
Inverter Board
12
C295
1UF/10V
12
C292
0.001uF/50V
+V3.3AAC_BAT_SYS+V3.3S
L35
80Ohm/100MHz
2 1
AC_INV
12
C294
0.1uF/10V
C
CON1
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
WTOB_CON_20P
D
L50
80Ohm/100MHz
2 1
/USB
12
C516
C517
0.1U
0.1U
/USB_EMI
+V5_USB5
+V5
12
+
CE29
100UF/6.3V
/USB
11-10
T240 TPC28t
1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
2122
SIDE1SIDE2
USB_P5USB_P5+
Pin 19 : Add a USB 2.0
Shielding GND cable to
USB module.
USB_PN520
USB_PP520
+V5_USB5
1 4
USB PORT 5 for USB CAMERA
A6G doesn't support
USB WLAN function!
USB_P5-
L51
90Ohm/100MHz
/USB
2 3
USB_P5+
+V5
12
/USB_EMI
E
C12
0.1U
1 2
/USB
3 3
3132
LVDS_CLKAP12
LVDS_CLKAM12
LVDS_YA2P12
LVDS_YA2M12
LVDS_YA1P12
LVDS_YA1M12
LVDS_YA0P12
LVDS_YA0M12
4 4
LVDS_ACLKP
LVDS_ACLKN LVDS_CLKBM
LVDS_YA2N
LVDS_YA1P
LVDS_YA1N
LVDS_YA0P
LVDS_YA0N
ID0
ID2
CON2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
WTOB_2X15P
SIDE1SIDE2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
LCD CABLE ID: PID3 PID2 PID1 PID0
15.1 XGA 1 1 0 1
15.1 SXGA+ 1 0 1 1
15.4 WXGA 1 1 1 0
15.4 WSXGA+ 0 1 1 1
5 5
A
LVDS_CLKBP
2
4
6
LVDS_YB2PLVDS_YA2P
8
LVDS_YB2M
10
12
LVDS_YB1P
14
LVDS_YB1M
16
18
LVDS_YB0P
20
LVDS_YB0M
22
24
ID1
26
ID3
28
30
B
+V3.3S_LCD+V3.3S_LCD
12
C296
0.1UF/25V
ID0
ID1
ID2
ID3
LVDS_CLKBP 12
LVDS_CLKBM 12
LVDS_YB2P 12
LVDS_YB2M 12
LVDS_YB1P 12
LVDS_YB1M 12
LVDS_YB0P 12
LVDS_YB0M 12
PID_0 20
PID_1 20
1 2
10KOhm
3 4
10KOhm
5 6
10KOhm
7 8
10KOhm
PID_2 20
PID_3 20
RN6A
RN6B
RN6C
RN6D
+V3.3S
C
+V12S
R219
R12
10KOhm
1 2
Q53A
UM6K1N
34
Q53B
UM6K1N
R218
47KOhm
1 2
5
LVDS_VDD_EN12
1MOhm
1 2
61
2
D
LCD Power
1 2
+V3.3S_LCD_C
6
5
4
80Ohm/100MHz
12
C10
0.1uF/10V
R11
100Ohm
L2
21
A6G
12
D2
1N4148W-A2
+V3.3S+V3.3S
SI3456DV
Q52
1
D
2
S
3
G
12
C302
47pF/50V
ASUSTek COMPUTER INC. NB1
Size Project Name
Custom
Date: Sheet
12
C298
0.1uF/10V
Engineer:
T199
TPC28t
1
12
Title :
E
3-3.6V
S0-S1M:410 mA
(500 mA Max.)
+V3.3S_LCD
12
C2
1UF/10V
C7
10uF/10V
LVDS & BACKLIGHT
John Hung
17 54Friday, October 15, 2004
Rev
1.1
of
Loading...