Asus A3V,A3VP Schematics

5

4

3

CP

U

2

1

DOTHAN

D D

LVD

S

PAGE 25

CR

T

PAGE 26

TV

OUT

PAGE 26

C C

CO

PO

AUDI

IN

STANT KEY

B B

M PORT

RTBAR

SI

R

O DJ KEY

PAGE 34

PAGE 28

PAGE 17

PAGE 40

PAGE 40

SUP
LPC47N2

KBC

ATI
M24/26P

PAGE 12,13,14,15,16

FWH

PAGE 28

ER I/O

17

PAGE 17

38857

PAGE 27

AZALIA CODEC

PAGE 29,30,31

LPC
33MHz

Azali

PCI-E

a

CD

HDD

ROM

PAGE 3,4

PAGE 6,7,8,9,10

PAGE 18,19,20

PAGE 38

PAGE 38

53

3MHZ

FSB
533MHz

MCH-M

Alviso

DMI inte

ICH6-M

IDE

rface

DDR2

PCI
33MHz

BT M

PAGE 22,23,24

PAGE 34

odule

DDR2
SO-DIMM

R5C841

PAGE 35,36,37

MINI-PCI 1

WIRE LESS

10/100 LAN
RTL8100CL

PAGE 32

PAGE 33,34

PCMCIA

1394

CARD REA

PAGE 21

DER

CLOC
GENERATO

FAN + SENSOR

PAGE 5

Power On Sequenc

PAGE 42,43

PAGE 36

PAGE 37

PAGE 35

K

R

e

0

PAGE 39

USB

USB CCD

PAGE 25

Title :

BLOCK DIAGRAM

Size

Project Name

Custom

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Miller Liu

1

Sheet

1

Rev

1.1

55

of

MDC Header

PAGE 34

A A

5

4

USB 2.
X

4

5

P.5

1

A/D_DOCK_I

D D

AC_BAT_SY

SUSC#_PW

N

(Regulator

S

R

L78L05

P.4

5

MIC5233BM

TPS5102

P.5

2

(UMC4N

)

5

0

)

4

+5VCHG

+5VO

(20mA)

+3VA

+5VA

P.5

1

SWITCH
(F02JK2E

+12V

)

+3VALWAY

+5VALWAY

3

2

1

+5VLCM

LM4040BI

(Regulator

S

S

+3VSUS

+5VSUS

P.5

M

1

)

+2.5VRE

F

+5V

P.4

5

SUSC#_PW

C C

SUSC#_PW

R

R

MAX8743EE

TPS5102

P.4

0

6

I

+3V

+1.8V

P.5

2

UMC4N

+12VS

+5VS
+3VS

SI4800D

SUSB#_PW

+5VO

SUSB#_PW

B B

CPU_VRO

SUSC#_PW
SUSB#_PW

+5MCH_O

A A

5

R

N

R
R

K

P.4

7

MAX8578EU

P.4

6

MAX8743EE

P.4

7

MAX1844EE

CPU_VRO

MAX198

N
7

(Controllor

B

+VCCP

I

+1.05V

+ATI_VCOR

P

P.4

4

)

VR_VID0 - VR_VID5, STP_CPU#, PM_DPRSLPVR

4

R

O

E

DELAY_VR_PWRG
CLK_PWR_GD

Y

+1.8VS

+1.5VS

P.4

+3VS

CPU_F_SE

SUSB#_PW

SUSB#_PW

SUSB#_PW

L

R

R

MIC49150BM

R

8

SI9183D

P.4

8

CM8562

P.5

3

LM358ADR
SI4800BD

P.5

3

T

&

Y

M

+1.8VS_PRO

+0.9VS

+2.5VS
+2.5VO

+1.2VS

+VCORE

C

P

(27A)

D,

#

, PM_PSI#

Power Block Diagram

Title :

Size

Project Name

Custom

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Miller Liu

2

Sheet

1

Rev

1.1

55

of

5

H_A20M#

H_INTR

H_NMI

H_SMI#

H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

1
1

1

-STEP

AA2

Y3

AA3

U1

Y1
Y4

W2

T4

W1

V2

R3

V3

U4

P4

U3

T1
P1
T2
P3

R2

AF1
AE1
AF3
AD6
AE2
AD5
AC6
AB4
AD2
AE4
AD3
AC3
AC7
AC4
AF4
AE5

C19

TPC28t
TPC28t

L0

U48B

A[16]#
A[15]#
A[14]#
A[13]#
A[12]#
A[11]#
A[10]#
A[9]#
A[8]#
A[7]#
A[6]#
A[5]#
A[4]#
A[3]#
ADSTB[0]#
REQ[4]#
REQ[3]#
REQ[2]#
REQ[1]#
REQ[0]#

A[31]#
A[30]#
A[29]#
A[28]#
A[27]#
A[26]#
A[25]#
A[24]#
A[23]#
A[22]#
A[21]#
A[20]#
A[19]#
A[18]#
A[17]#
ADSTB[1]#

DPWR#

SOCKET479P

AC26

M0417

H_A#[16..3]

6

D D

H_ADSTB#0

6

H_REQ#[4..0]

6

H_A#[31..17]

6

C C

H_ADSTB#1

6

H_DPWR#

6

R20

R21

GND

B B

A A

18

H_PWRGD

r0402

12

r0402

12

T28TPC28t

1

PM_PSI#

44

CPU_BSEL0

21,43

CPU_BSEL1

21

49.9Ohm

49.9Ohm

7,18

1%
1%

CPU_THRM_DA

5

CPU_THRM_DC

5

PM_THRMTRIP#
H_PROCHOT_S#

5

H_A#16
H_A#15
H_A#14
H_A#13
H_A#12
H_A#11
H_A#10
H_A#9
H_A#8
H_A#7
H_A#6
H_A#5
H_A#4
H_A#3

H_REQ#4
H_REQ#3
H_REQ#2
H_REQ#1
H_REQ#0

H_A#31
H_A#30
H_A#29
H_A#28
H_A#27
H_A#26
H_A#25
H_A#24
H_A#23
H_A#22
H_A#21
H_A#20
H_A#19
H_A#18
H_A#17

CLK_CPU_BCLK

21

CLK_CPU_BCLK#

21

18

18
18
18

H_CPUSLP#

6,18

18

H_FERR#
H_IGNNE#
H_DPSLP#

18

18

18

H_STPCLK#

+VCCA_RSVD

+VCCA_PROC

T27TPC28t
T217

T211

A-STEP B

FSB BSEL1 BSEL0 BSE

Bclk

100

400
533

0 0 1
0 1 0

133

5

4

ADS#
PRDY#
PREQ#

BNR#

BPRI#

DBR#

ADDRESS GROUP 0ADDRESS GROUP 1

DEFER#

DRDY#
DBSY#

BR0#

CONTROL

IERR#

INIT#

LOCK#

RESET#

RS[2]#
RS[1]#
RS[0]#

TRDY#

HIT#

HITM#

U48C

B15

BCLK[0]

B14

BCLK[1]

A16

ITP_CLK[0]

A15

ITP_CLK[1]

C2

A20M#

D3

FERR#

A3

IGNNE#

B7

DPSLP#

A6

SLP#

D1

LINT0

D4

LINT1

B4

SMI#

C6

STPCLK#

E4

PWRGOOD

H4

VID[5]

G4

VID[4]

G3

VID[3]

F3

VID[2]

F2

VID[1]

E2

VID[0]

VCCA[3]

N1

VCCA[2]

B1

VCCA[1]

F26

VCCA[0]

B18

THERMDA

A18

THERMDC

C17

THERMTRIP#

B17

PROCHOT#

E1

RSVD5

C16

RSVD4

C3

RSVD3

C14

RSVD2

AF7

RSVD1

B2

RSVD0

SOCKET479P

Dothan FS
Min Ty
VCCA 1.425V 1.5
Min Ty
ICCA

4

N2
A10
B10

L1
J3

A7

L4
H2
M2

N4

A4

B5

J2

B11
L2
K1
H1

M3

K3
K4

TPC28t

TPC28t

H_IERR#

COMP[3]
COMP[2]

HOSTCLKLEGACY CPU

COMP[1]
COMP[0]

BPM[3]#
BPM[2]#
BPM[1]#
BPM[0]#

GTLREF[3]
GTLREF[2]
GTLREF[1]
GTLREF[0]

MISC

VCCSENSE

VSSSENSE

B533

H_RS#2
H_RS#1
H_RS#0

TEST1
TEST2

TCK
TDO

TMS

TRST#

1

1

TDI

T222
R19

r0402

/

T214

R44

r0402

TPC28t

1

R25

H_COMP3

AB1

H_COMP2

AB2

H_COMP1

P26

H_COMP0

P25

C9
A9
B8
C8

AC1
G1
E26

GTL_REF0

AD26

R45

C5

R108

F23

R32

A13

R18

C12

R24

A12

R23

C11

R30

B13

VCCSENSE

AE7

VSSSENSE

AF6

p Max

V 1.575V
p Max
120mA

H_ADS#

56Ohm

H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BR0#

56Ohm

H_INIT#

H_LOCK#

T3

8

/

H_CPURST#

H_RS#[0..2]
H_TRDY#

H_HIT#
H_HITM#

R39
R40
R523
R524

/

1 2

/

1 2

1 2
1 2

1 2
1 2

R487

R484

6

6

6

6

6

6

18

6

54.9Ohm

12

6

6

6

1 2
1 2

r0402

1KOhm
1KOhm

r0402

27.4Ohm
150Ohm

54.9Ohm

/

12

39Ohm

8.2KOhm

+VCCP

6

+VCCP

6

6

1%

54.9Ohm

12

27.4Ohm

54.9Ohm

12

27.4Ohm

H_DPRSTP#

1%

54.9Ohm

/

12

54.9Ohm

/

12

+VCCP

1%

1%

GND

GND

1%
1%

3

18

+VCCP

GND

H_VID1
H_VID0

3

GND

+VCCP

R522

1KOhm

1%

r0402

1 2

R521

2KOhm

1%

r0402

1 2

GND

GND

CAP 0.1UF/16V (0603) X7R (104)

H_VID4
H_VID3
H_VID2
H_VID5

R41
R43

6

6

6

6

12

C901

0.1U

4/13

1 2
3 4
5 6
7 8

1 2
1 2

H_DINV#0

6

H_DSTBN#0

H_DSTBP#0

H_DINV#1

6

H_DSTBN#1

H_DSTBP#1

120mA / 2

0Ohm
0Ohm
0Ohm
0Ohm

r0402
r0402

2

H_D#15

C25

H_D#14
H_D#13
H_D#12
H_D#11

H_D#9
H_D#8
H_D#7
H_D#6
H_D#5
H_D#4
H_D#3
H_D#2
H_D#1
H_D#0

H_D#31
H_D#30
H_D#29
H_D#28
H_D#27
H_D#26
H_D#25
H_D#24
H_D#23
H_D#22
H_D#21
H_D#20
H_D#19
H_D#18
H_D#17
H_D#16

Layout n

ote:
COMP0 and COMP2 need to be Z
Best estimate is 18mil wide trace
14mil if on internal layer. S
Traces should be shorter than 0.5". R

COMP1, COMP3 should be ro
traces shorter

D[15]#

E23

D[14]#

B23

D[13]#

C26

D[12]#

E24

D[11]#

D24

D[10]#

B24

D[9]#

C20

D[8]#

B20

D[7]#

A21

D[6]#

B26

D[5]#

A24

D[4]#

B21

D[3]#

A22

D[2]#

A25

D[1]#

A19

D[0]#

D25

DINV[0]#

C23

DSTBN[0]#

C22

DSTBP[0]#

K25

D[31]#

N25

D[30]#

H26

D[29]#

M25

D[28]#

N24

D[27]#

L26

D[26]#

J25

D[25]#

M23

D[24]#

J23

D[23]#

G24

D[22]#

F25

D[21]#

H24

D[20]#

M26

D[19]#

L23

D[18]#

G25

D[17]#

H23

D[16]#

J26

DINV[1]#

K24

DSTBN[1]#

L24

DSTBP[1]#

SOCKET479P

than 0.5"

0mil

+VCCA_PROC

RN2A
RN2B
RN2C

RN2D
0Ohm
0Ohm

+VCCA_PROC

12

C656
10uF/10V

c0805

VR_VID4
VR_VID3
VR_VID2
VR_VID5

VR_VID1
VR_VID0

2

44
44
44
44

44
44

U48A

DATA GROUP 0DATA GROUP 1

o=27.4ohm traces.

uted as Zo=55ohm

FSB 400MHz ­FSB 533MHz -

R733

0Ohm

1 2

R0603

12

+

C652

0.01UF

c0402

GNDGND GND

D[47]#
D[46]#
D[45]#
D[44]#
D[43]#
D[42]#
D[41]#
D[40]#
D[39]#
D[38]#
D[37]#
D[36]#

DATA GROUP 2DATA GROUP 3

D[35]#
D[34]#
D[33]#
D[32]#

DINV[2]#
DSTBN[2]#
DSTBP[2]#

D[63]#
D[62]#
D[61]#
D[60]#
D[59]#
D[58]#
D[57]#
D[56]#
D[55]#
D[54]#
D[53]#
D[52]#
D[51]#
D[50]#
D[49]#
D[48]#

DINV[3]#
DSTBN[3]#
DSTBP[3]#

for outer layers and

ee RDDP of Banias.

12

C61
10uF/10V

c0805

H_D#46

AA26

H_D#45

Y23

H_D#44

V26

H_D#43

U25

H_D#42H_D#10

V24

H_D#41

U26

H_D#40

AA23

H_D#39

R23

H_D#38

R26

H_D#37

R24

H_D#36

V23

H_D#35

U23

H_D#34

T25

H_D#33

AA24

H_D#32

Y26
T24
W25
W24

H_D#63

AF26

H_D#62

AF22

H_D#61

AF25

H_D#60

AD21

H_D#59

AE21

H_D#58

AF20

H_D#57

AD24

H_D#56

AF23

H_D#55

AE22

H_D#54

AD23

H_D#53

AC25

H_D#52

AC22

H_D#51

AC20

H_D#50

AB24

H_D#49

AC23

H_D#48

AB25
AD20
AE24
AE25

efer to latest CS layout

> 1.8V
> 1.5V

+VCCA_RSVD

12

+

12

C653

C662

0.01UF

10uF/10V

c0402

c0805

H_D#47

Y25

Place near CPU pin

H_PWRGD
H_PROCHOT_S#

Size

Project Name

Custom

Tuesday, August 02, 2005

Date:

R42
R22

A3V

12

+

C68

0.01UF

c0402

GND GNDGNDGND GND

r0402

1 2

r0402

1

H_D#[0..63]

H_DINV#2
H_DSTBN#2
H_DSTBP#2

H_DINV#3
H_DSTBN#3
H_DSTBP#3

12

C56
10uF/10V

c0805

200Ohm
56Ohm

Title :

Engineer:

Sheet

1

6

6

6
6

6

6
6

12

+

C66

0.01UF

c0402

1%

+VCCP

DOTHAN CPU(1)

Miller_Liu

3

M0417

of

Rev

1.1

55

5

Dothan FS

B533

LFM TYP

+VCCP

D D

C C

B B

VCC 1.14V 1.2V
C4 C
ICC 0.9A 7.59

U48D

W4

VCCQ[1]

P23

VCCQ[0]

D10

VCCP1

D12

VCCP2

D14

VCCP3

D16

VCCP4

E11

VCCP5

E13

VCCP6

E15

VCCP7

F10

VCCP8

F12

VCCP9

F14

VCCP10

F16

VCCP11

K6

VCCP12

L5

VCCP13

L21

VCCP14

M6

VCCP15

M22

VCCP16

N5

VCCP17

N21

VCCP18

P6

VCCP19

P22

VCCP20

R5

VCCP21

R21

VCCP22

T6

VCCP23

T22

VCCP24

U21

VCCP25

VCC70

VCC71

VCC72

AF14

AF16

AF18

VCC69

AF12

VCC67

VCC68

AF8

AF10

HFM

3 C0

VCC

VCC63

VCC64

VCC65

VCC66

AE13

AE15

AE17

AE19

1.356V

A 27A

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8

VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60

VCC62

VCC61

SOCKET479P

AE11

AE9

D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18

+VCORE

4

AF24

AF21

AF19

AF17

AF15

AF13

U48E

A2

VSS1

A5

VSS2

A8

VSS3

A11

VSS4

A14

VSS5

A17

VSS6

A20

VSS7

A23

VSS8

A26

VSS9

B3

VSS10

B6

VSS11

B9

VSS12

B12

VSS13

B16

VSS14

B19

VSS15

B22

VSS16

B25

VSS17

C1

VSS18

C4

VSS19

C7

VSS20

C10

VSS21

C13

VSS22

C15

VSS23

C18

VSS24

C21

VSS25

C24

VSS26

D2

VSS27

D5

VSS28

D7

VSS29

D9

VSS30

D11

VSS31

D13

VSS32

D15

VSS33

D17

VSS34

D19

VSS35

D21

VSS36

D23

VSS37

D26

VSS38

E3

VSS39

E6

VSS40

E8

VSS41

E10

VSS42

E12

VSS43

E14

VSS44

E16

VSS45

E18

VSS46

E20

VSS47

E22

VSS48

E25

VSS49

F1

VSS50

F4

VSS51

F5

VSS52

F7

VSS53

F9

VSS54

F11

VSS55

F13

VSS56

F15

VSS57

F17

VSS58

F19

VSS59

F21

VSS60

F24

VSS61

G2

VSS62

G6

VSS63

G22

VSS64

AF11

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

G23

G26H3H5

H21

H25J1J4J6J22

3

AF9

AF5

AF2

AE26

AE23

AE20

AE18

AE16

AE14

AE12

AE10

AE8

AE6

AE3

AD25

AD22

AD19

AD17

AD15

AD13

AD11

AD9

AD7

AD4

AD1

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS163

VSS162

GND

VSS95

VSS94

VSS93

VSS92

VSS91

VSS90

VSS89

VSS88

VSS87

VSS86

VSS85

VSS84

VSS83

VSS82

VSS81

VSS80

VSS79

VSS71

VSS78

VSS72

VSS73

VSS74

VSS75

VSS76

VSS77

P2

N26

N23

N22N6N3

M24

M21M5M4M1L25

L22L6L3

K26

K23

K21

J24K2K5

P5

VSS160
VSS159
VSS158

VSS161

VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100

VSS99
VSS98
VSS97

VSS96

SOCKET479P

AC24
AC21
AC18
AC16
AC14
AC12
AC10
AC8
AC5
AC2
AB26
AB23
AB21
AB19
AB17
AB15
AB13
AB11
AB9
AB7
AB5
AB3
AA25
AA22
AA20
AA18
AA16
AA14
AA12
AA10
AA8
AA6
AA4
AA1
Y24
Y21
Y5
Y2
W26
W23
W22
W6
W3
V25
V21
V5
V4
V1
U24
U22
U6
U2
T26
T23
T21
T5
T3
R25
R22
R6
R4
R1
P24
P21

2

MOBILE DOTHAN VID TAB

Volta

ge

VID[5.

.0]

0 0 0 0 0 0 1.7
0 0 0 0 0 1 1.6
0 0 0 0 1 0 1.6
0 0 0 0 1 1 1.6
0 0 0 1 0 0 1.6
0 0 0 1 0 1 1.6
0 0 0 1 1 0 1.6
0 0 0 1 1 1 1.5
0 0 1 0 0 0 1.5
0 0 1 0 0 1 1.5
0 0 1 0 1 0 1.5
0 0 1 0 1 1 1.5
0 0 1 1 0 0 1.5
0 0 1 1 0 1 1.5
0 0 1 1 1 0 1.4
0 0 1 1 1 1 1.4
0 1 0 0 0 0 1.4
0 1 0 0 0 1 1.4
0 1 0 0 1 0 1.4
0 1 0 0 1 1 1.4
0 1 0 1 0 0 1.3
0 1 0 1 0 1 1.3
0 1 0 1 1 0 1.3
0 1 0 1 1 1 1.3
0 1 1 0 0 0 1.3
0 1 1 0 0 1 1.3
0 1 1 0 1 0 1.2
0 1 1 0 1 1 1.2
0 1 1 1 0 0 1.2
0 1 1 1 0 1 1.2
0 1 1 1 1 0 1.2
0 1 1 1 1 1 1.2

08V
92V
76V
60V
44V
28V
12V
96V
80V
64V
48V
32V
16V
00V
84V
68V
52V
36V
20V
04V
88V
72V
56V
40V
24V
08V
92V
76V
60V
44V
28V
12V

VID[5.

1 0 0 0 0 0 1.1
1 0 0 0 0 1 1.1
1 0 0 0 1 0 1.1
1 0 0 0 1 1 1.1
1 0 0 1 0 0 1.1
1 0 0 1 0 1 1.1
1 0 0 1 1 0 1.1
1 0 0 1 1 1 1.0
1 0 1 0 0 0 1.0
1 0 1 0 0 1 1.0
1 0 1 0 1 0 1.0
1 0 1 0 1 1 1.0
1 0 1 1 0 0 1.0
1 0 1 1 0 1 0.9
1 0 1 1 1 0 0.9
1 0 1 1 1 1 0.9
1 1 0 0 0 0 0.9
1 1 0 0 0 1 0.9
1 1 0 0 1 0 0.9
1 1 0 0 1 1 0.8
1 1 0 1 0 0 0.8
1 1 0 1 0 1 0.8
1 1 0 1 1 0 0.8
1 1 0 1 1 1 0.8
1 1 1 0 0 0 0.8
1 1 1 0 0 1 0.7
1 1 1 0 1 0 0.7
1 1 1 0 1 1 0.7
1 1 1 1 0 0 0.7
1 1 1 1 0 1 0.7
1 1 1 1 1 0 0.7
1 1 1 1 1 1 0.7

1

LE

.0]

Volta

ge

96V
80V
64V
48V
32V
16V
00V
84V
68V
52V
36V
20V
04V
88V
72V
56V
40V
24V
08V
92V
76V
60V
44V
28V
12V
96V
80V
64V
48V
32V
16V
00V

GND

B533

p Max

V 1.102V

p Max

2.5A

12

12

+VCC
(Pl

ace near CPU)

C567

C621

0.1UF

0.1UF

c0402

c0402

P (CPU) Decoupling Capacitor

2

12

C569

0.1UF

c0402

C619

0.1UF

c0402

GNDGND

Size

Custom

Tuesday, August 02, 2005

Date:

C622

0.1UF

c0402

Project Name

GNDGND GND

A3V

12

12

12

12

C566

0.1UF

c0402

GNDGND

C155
10uF/10V

c0805

Title :

12

DOTHAN CPU(2)

Engineer:

Sheet

1

C615
10uF/10V

c0805

Miller Liu

4

12

C161

0.1UF

c0402

Rev

1.1

55

of

12

10uF/10V

12

10uF/10V

12

10uF/10V

12

10uF/10V

c0805

C574

C594

C576

C181

GND

12

10uF/10V

12

10uF/10V

12

10uF/10V

12

10uF/10V

c0805

C133

C191

C629

C102

GND

Mid Frequency
Decoupling (Place
around
Processor)

High Frequency
Decoupling (Place
underneath
Processor) using
10uF/6.3V X5R

+VCORE
Bulk
Decoupling

1.0V - 1.

2V(+/- 5%)

S0-S1M: 2.

5

A(CPU,MCH,ICH)

+VCCP

12

+

12

C568

0.1UF

CE26

c0402

150U/4.0V

GND

Four 200 uF are
located i
IM

3

n

VP4

Dothan FS
Min Ty
VCCP 0.997V 1.05
Min Ty
ICCP

12

C570

0.1UF

c0402

GND

GND GND GNDGND

12

C620

0.1UF

c0402

+VCORE

12

C587
10uF/10V

c0805

12

C166

10uF/10V

12

C182

12

10uF/10V

10uF/10V

C183

A A

CPU VCORE Decoupling Capacitor

12

12

12

12

12

12

10uF/10V

c0805

C578
10uF/10V

c0805

C184
10uF/10V

C608
10uF/10V

C586

12

12

12

+

5

C596
10uF/10V

c0805

C178
10uF/10V

C606
10uF/10V

C624

0.01UF

12

12

12

C628

10uF/10V

c0805

C157

10uF/10V

C123

10uF/10V

C98
10uF/10V

c0805

12

C561
10uF/10V

c0805

12

C158
10uF/10V

12

C126

10uF/10V

12

C573
10uF/10V

c0805

12

10uF/10V

c0805

12

10uF/10V

12

10uF/10V

12

+

0.01UF

C176

C180

C124

C623

12

10uF/10V

c0805

12

10uF/10V

12

10uF/10V

12

10uF/10V

c0805

C105

C159

C125

C101

12

10uF/10V

12

10uF/10V

12

10uF/10V

12

10uF/10V

c0805

C179

C572

C110

C160

4

5

4

3

2

1

Fan Speed Control

Using a OP AMP and
fine-tuning the level,

D D

SW: FAN_PWM mus
be low dur

C C

ing S3

CPU FAN will be forced on:

1) Thermal Sensor
Over-temperture

2) PROCHOT asserted(CPU)

3) WATCHDOG asserted(KBC)

t

FAN_PWM

R734
300KOhm

1 2

C878
10UF/6.3V

+5VS_FAN

12

GND

we can improve the fan
speed accuracy.

c0402

C246

GND

1 2

A+

3

A-

2

B+

5

B-

6

LM3

WATCHDOG

27

+

-

+

-

U12

58MX

1000PF

+12

V

8

VCC

1

AO

BO

7
4

GND

R134

GND

OS#_OC

12

GND

R155
10KOhm

r0402

1 2

+3V

56

32

3

D

1

1

G

S

2

GND

S

RN21C
10KOhm

+5V

GND

330Ohm

5

Q14
2N7002

S

12

C265

0.1UF

c0402

+3V

M0602

GND

12

+

CE29
47UF/6.3V

+5VS_FAN

GND

+3V

S

12

R735
10KOhm

r0402

D56
1N4148W-A2

1 2

CPU

+5V

S

12

R813
10KOhm

r0402

M0601

FAN

FANSP1

+3V

GND

S

78

12

RN21D
10KOhm

C686
100PF

c0402

Q22
AP3310H

D

S

2

3

G

1

S

34

RN21B

10KOhm

61

Q95A
UM6K1N

2

34

Q95B
UM6K1N

GNDGND

When fan speed is
very slow, after RC
integrator the level
of FANSP1 will be
very low that may
make south bridge do
the wrong detection.

+5VS_FAN

12

C842

0.1UF

/

GND

GND

1
2
3

HOLD1

HOLD2

GND

45

CON14

WTOB_CON_3P

GND

+3V

T_S

C880

0.1UF

c0402

ADT_VGA_P

S

U63

1

SDA

2

SCL

3

GND

4

VCC

12

WM

5

VID0

6

VID1

7

VID2

8

VID3

9

TACH3

10

PWM2/SMBALERT#

11

TACH1

TACH4/ADDRESS_SELECT/THERM#

12 13

TACH2

NTD. 20.64

SMBus Address: 0x2E

GND

PWM1/XTO

Vccp

2.5V/SMBALERT#
12V/VID5

5V/THERM#

VID4

D1+
D2+

PWM3/ADDRESS_ENABLE#

0418

ADT7463

+VCORE

24
23
22
21
20
19
18
17

D1-

16
15

D2-

14

GND

B B

T_S

1 2

R0603

SMB_DA
SMB_CLK_S

0Ohm

tput

SMB_DA

18,21,22,23

SMB_CLK_S

18,21,22,23

FAN_PWM

R739

FANSP1

Pin

10 & Pin 24 set inverting PWM Mode

Set INV=1 to invert PWM ou

A A

Modified Fan Control Circuit
Change MAX6657*2 -> ADT7463

5

4

ADT_D1+
ADT_D2+

ADT_CPU_PWM#

ADT_SMBALE

ADT_THERM#

ADT_D1-

ADT_D2-

ADD_SEL_EN#

3

C879
1000P

C0603

C881
1000P

C0603

R736

RT#

R737
R738

12

12

1 2

R0603

1 2

R0603

1 2

R0603

RN21A

10KOhm

0Ohm
0Ohm
0Ohm

12

Pin 13

1

X 5C **
0 1 5A
0

0 58

FAN_PWM

PM_THERM#13,18
OS#_OC

42

+3

VS

CPU_THRM_DA

CPU_THRM_DC

VGA_THRM_DA

VGA_THRM_DC 12

H_PROCHOT_S#

3

3

12

3

Pin 14 SMB Addr

2

Route H_THERMDA and H_THERMDC
on the same layer

-----------------­ 12 mils
===============GND
10 mils
=========H_THERMDA(10 mils)
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
12 mils

----------------

OTHER SIGNALS

-----OTHER SIGNALS

Avoid BPSB,Power

Title :

Size

Project Name

Custom

Tuesday, August 02, 2005

Date:

A3V

Engineer:

TH

Sheet

1

ERMAL SERSOR,FAN

Miller Liu

Rev

5

1.1

55

of

5

H_XRCOMP

R57

24.9Ohm

1%

D D

C C

B B

A A

1 2

GND

+VCCP

R51

54.9Ohm

1%

1 2

+VCCP

R52
221Ohm

1%
r0402

1 2

R59
100Ohm

1%
r0402

1 2

GND

R86

24.9Ohm

1%

1 2

GND

+VCCP

R68

54.9Ohm

1%

1 2

+VCCP

R77
221Ohm

1%
r0402

1 2

R76
100Ohm

1%
r0402

1 2

GND GND GND

12

GND

12

H_XSCOMP

H_XSWING

C94

0.1UF

c0402

H_YRCOMP

H_YSCOMP

H_YSWING

C163

0.1UF

c0402

GND

12

10uF/10V

12

C152
10uF/10V

c0805

C93

c0805
/

/

4

H_D#[0..63]

3

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING

3

U6D

E4

HD0#

E1

HD1#

F4

HD2#

H7

HD3#

E2

HD4#

F1

HD5#

E3

HD6#

D3

HD7#

K7

HD8#

F2

HD9#

J7

HD10#

J8

HD11#

H6

HD12#

F3

HD13#

K8

HD14#

H5

HD15#

H1

HD16#

H2

HD17#

K5

HD18#

K6

HD19#

J4

HD20#

G3

HD21#

H3

HD22#

J1

HD23#

L5

HD24#

K4

HD25#

J5

HD26#

P7

HD27#

L7

HD28#

J3

HD29#

P5

HD30#

L3

HD31#

U7

HD32#

V6

HD33#

R6

HD34#

R5

HD35#

P3

HD36#

T8

HD37#

R7

HD38#

R8

HD39#

U8

HD40#

R4

HD41#

T4

HD42#

T5

HD43#

R1

HD44#

T3

HD45#

V8

HD46#

U6

HD47#

W6

HD48#

U3

HD49#

V5

HD50#

W8

HD51#

W7

HD52#

U2

HD53#

U1

HD54#

Y5

HD55#

Y2

HD56#

V4

HD57#

Y7

HD58#

W1

HD59#

W3

HD60#

Y3

HD61#

Y6

HD62#

W2

HD63#

C1

HXRCOMP

C2

HXSCOMP

D1

HXSWING

T1

HYRCOMP

L1

HYSCOMP

P1

HYSWING

ALVISO_BGA1257

HADSTB0#
HADSTB1#

HBREQ0#

HCPURST#

HCLKINN

HOST

HCLKINP

HDEFER#

HDINV0#
HDINV1#
HDINV2#
HDINV3#

HDPWR#

HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#

HEDRDY#

HPCREQ#

HCPUSLP#

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HADS#

HVREF
HBNR#
HBPR#

HDBSY#

HHIT#

HHITM#

HLOCK#
HREQ0#

HREQ1#
HREQ2#
HREQ3#
HREQ4#

HRS0#
HRS1#
HRS2#

HTRDY#

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

F8
B9
E13
J11
A5
D5
E7
H10

AB1
AB2

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_ADS#
H_ADSTB#0
H_ADSTB#1

H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
TP_H_EDRDY#

TP_H_PCREQ#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2

R490

r0402

1 2

2

TPC28t

0Ohm

H_ADS#

3

H_ADSTB#0

3

H_ADSTB#1

3

H_BNR#

3

H_BPRI#

3

H_BR0#

3

H_CPURST#

CLK_MCH_BCLK#
CLK_MCH_BCLK

H_DBSY#

3

H_DEFER#

3

H_DINV#0

3

H_DINV#1

3

H_DINV#2

3

H_DINV#3

3

H_DPWR#

3

H_DRDY#

3

H_DSTBN#0

3

H_DSTBN#1

3

H_DSTBN#2

3

H_DSTBN#3

3

H_DSTBP#0

3

H_DSTBP#1

3

H_DSTBP#2

3

H_DSTBP#3

3

H_HIT#

3

H_HITM#

3

T2

4

1

3

TPC28t

H_A#[31..3]

21

21

1

H_LOCK#
H_REQ#[4..0]

H_RS#[0..2]

H_CPUSLP#
H_TRDY#

T223

1

3

+VCCP

R498
100Ohm

1%
r0402

H_VREF

3

3

3

3,18

3

1 2

1 2

R497
200Ohm

r0402
1%

12

C585

0.1UF

c0402

GNDGND

Alviso MCH(1

Title :

Size

Project Name

Custom

5

4

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Sheet

1

Miller Liu

6

)

Rev

1.1

55

of

5

DMI_TXN[0..3]

19

DMI_TXP[0..3]

19

D D

DMI_RXN[0..3]

19

DMI_RXP[0..3]

19

M_CLK_DDR0

23

M_CLK_DDR1

23

M_CLK_DDR3

22

M_CLK_DDR4

22

M_CLK_DDR#0

23

M_CLK_DDR#1

23

M_CLK_DDR#3

22

M_CLK_DDR#4

22

M_CKE[0..3]

22,23,24

C C

M_CS#[0..3]

22,23,24

M_ODT[0..3]

22,23,24

M_VREF_MCH

B B

12

C201
1UF/10V

GND GND

A A

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_
DMI_
DMI_
DMI_

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

TP_SM

TP_SM

TP_SMCK

TP_SMCK
M_CKE0

M_CKE1
M_CKE2
M_CKE3

M_CS#0
M_CS#1
M_CS#2
M_CS#3

M_OCDCOMP0
M_OCDCOMP1

M_ODT
M_ODT
M_ODT
M_ODT

M_RCOMPN
M_RCOMPP

SMXSL
SMYSLEW

M_VREF_MCH

12

C203

0.1UF

c0402

EW

TXP0
TXP1
TXP2
TXP3

CK2

CK5

0
1
2
3

AA31
AB35
AC31
AD35

Y31
AA35
AB31
AC35

AA33
AB37
AC33
AD37

Y33
AA37
AB33
AC37

AM33

AL1
AE11

AJ34

AF6
AC10

AN33

AK1

#2

AE10

AJ33

AF5

#5

AD10
AP21

AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22
AF16

AP14

AL15
AM11
AN10

AK10
AK11
AF37

AD1
AE27
AE28

AF9

AF10

U6A

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

ALVISO_BGA1257

+2.5VS

R472
R473

+1.8V

GND

DMIDDR MUXING

PM

DREF_CLKN

CLK

DREF_SSCLKN

DREF_SSCLKP

NC

r0402

1 2

r0402

1 2

R520

1 2

R517

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

DREF_CLKP

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

NC9
NC10
NC11

10KOhm
10KOhm

12

G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

J23
J21
H22
F5
AD30
AE29

A24
A23
C37
D37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

80.6Ohm

80.6Ohm

PM_
PM_

R471

TPC28t
TPC28t

CFG5
CFG6
CFG7
CFG8

CFG9

TPC28t
TPC28t
TPC28t
TPC28t
TPC28t
TPC28t

CFG16

TPC28t

CFG18

CFG19

TPC28t
TPC28t
TPC28t

TPC28t
TPC28t
TPC28t
TPC28t

PM_
PM_

1 2

GND

EXTTS#0
EXTTS#1

M_RCOMPN

M_RCOMPP

4

r0402

1 2

T221

1

T225

1

T215

1

T216

1

T220

1

T224

1

T212

1

T229

1

T227

1

T218

1

T226

1

T228

1

T2

1

T2

1

T219

1

T213

1

EXTTS#0
EXTTS#1

r0603

R741

R742

33KOhm

R0603

1KOhm

+2.5VS

MCH_SEL1

21

MCH_SEL0

21

CFG5

11

CFG6

11

CFG7

11

CFG8

11

CFG9

11

CFG16

11

CFG18

11

CFG19

11

6
5

12

C581

0.1UF

c0402

12

10KOhm

GND

PM_BMBUSY#

PM_THRMTRIP#

PLT_
DREFCLK#

DREFCLK

R512

40.2Ohm

1%

1 2

/

GND

+2.5VS

18

3,18

RST#

12,17,18,19,27,28,38,40

21

21

M_OCDCOMP0
M_OCDCOMP1

R511

40.2Ohm

1%

1 2

/

GND

D78

1 2

1 2

1N4148W-A2

Before the C1 step, R53,R54 unmount

CLK_MCH_3GPLL#

21

CLK_MCH_3GPLL

21

R740
10KOhm

r0402

Layout Note:
Route as short
as possible.

+VCCP

MCH_PWROK

GND

43,44

M0417

3

U6F

GND

AB29
AC29

H24
H25

A15
C16
A17

J18
B15
B16
B17

E24
E23
E21
D21
C20
B20
A19
B19
H21
G21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP

TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC

DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET

LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

ALVISO_BGA1257

T232

1

T230

1

T236

1

T231

1

TPC28t

TPC28t

TPC28t

TPC28t

EXP_ICOMPO

MISCTVVGALVDS

PCI-EXPRESS GRAPHICS

TP_SM

TP_SM

TP_SMCK

TP_SMCK

EXP_COMPI

EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

EXP_TXN7

EXP_TXN8

EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8

EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

CK2

CK5

#2

#5

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

2

R477

PCIENB_RXN0
PCIENB_RXN1
PCIENB_RXN2
PCIENB_RXN3
PCIENB_RXN4
PCIENB_RXN5
PCIENB_RXN6
PCIENB_RXN7
PCIENB_RXN8
PCIENB_RXN9
PCIENB_RXN10
PCIENB_RXN11
PCIENB_RXN12
PCIENB_RXN13
PCIENB_RXN14
PCIENB_RXN15

PCIENB_RXP0
PCIENB_RXP1
PCIENB_RXP2
PCIENB_RXP3
PCIENB_RXP4
PCIENB_RXP5
PCIENB_RXP6
PCIENB_RXP7
PCIENB_RXP8
PCIENB_RXP9
PCIENB_RXP10
PCIENB_RXP11
PCIENB_RXP12
PCIENB_RXP13
PCIENB_RXP14
PCIENB_RXP15

PCIENB_TXN0
PCIENB_TXN1
PCIENB_TXN2
PCIENB_TXN3
PCIENB_TXN4
PCIENB_TXN5
PCIENB_TXN6
PCIENB_TXN7
PCIENB_TXN8
PCIENB_TXN9
PCIENB_TXN10
PCIENB_TXN11
PCIENB_TXN12
PCIENB_TXN13
PCIENB_TXN14
PCIENB_TXN15

PCIENB_TXP0
PCIENB_TXP1
PCIENB_TXP2
PCIENB_TXP3
PCIENB_TXP4
PCIENB_TXP5
PCIENB_TXP6
PCIENB_TXP7
PCIENB_TXP8
PCIENB_TXP9
PCIENB_TXP10
PCIENB_TXP11
PCIENB_TXP12
PCIENB_TXP13
PCIENB_TXP14
PCIENB_TXP15

1 2

+1.5VS_PCIE

24.9Ohm

PCIENB_RXN[0..15]

PCIENB_RXP[0..15]

PCIENB_TXN0
PCIENB_TXP0

PCIENB_TXN1
PCIENB_TXP1

PCIENB_TXN2
PCIENB_TXP2

PCIENB_TXN3
PCIENB_TXP3

PCIENB_TXN4
PCIENB_TXP4

PCIENB_TXN5
PCIENB_TXP5

PCIENB_TXN6
PCIENB_TXP6

PCIENB_TXN7
PCIENB_TXP7

PCIENB_TXN8
PCIENB_TXP8

PCIENB_TXN9
PCIENB_TXP9

PCIENB_TXN10
PCIENB_TXP10

PCIENB_TXN11
PCIENB_TXP11

PCIENB_TXN12
PCIENB_TXP12

PCIENB_TXN13
PCIENB_TXP13

PCIENB_TXN14
PCIENB_TXP14

PCIENB_TXN15
PCIENB_TXP15

C559

C107

C563

C118

C571

C138

C580

C153

C590

C167

C600

C173

C611

C186

C625

C196

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

1

12

12

C558

C99

C560

C113

C565

C130

C575

C144

C588

C156

C595

C169

C607

C175

C618

C192

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

PCIEG_RXN0
PCIEG_RXP0

0.1UF

PCIEG_RXN1
PCIEG_RXP1

0.1UF

PCIEG_RXN2
PCIEG_RXP2

0.1UF

PCIEG_RXN3
PCIEG_RXP3

0.1UF

PCIEG_RXN4
PCIEG_RXP4

0.1UF

PCIEG_RXN5
PCIEG_RXP5

0.1UF

PCIEG_RXN6
PCIEG_RXP6

0.1UF

PCIEG_RXN7
PCIEG_RXP7

0.1UF

PCIEG_RXN8
PCIEG_RXP8

0.1UF

PCIEG_RXN9
PCIEG_RXP9

0.1UF

PCIEG_RXN10
PCIEG_RXP10

0.1UF

PCIEG_RXN11
PCIEG_RXP11

0.1UF

PCIEG_RXN12
PCIEG_RXP12

0.1UF

PCIEG_RXN13
PCIEG_RXP13

0.1UF

PCIEG_RXN14
PCIEG_RXP14

0.1UF

PCIEG_RXN15
PCIEG_RXP15

0.1UF

PCIEG_RXN[0..15]

PCIEG_RXP[0..15]

12

12

Alviso

Sheet

PCIE(2)

Miller Liu

7

Rev

1.1

55

of

Title :

Size

Project Name

Custom

5

4

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

1

5

M_A_DQ[0..63]

23

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37

M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AG35
AH35

AL35
AL37

AH36

AJ35

AK37

AL34

AM36

AN35

AP32
AM31
AM34
AM35

AL32

AM32

AN31

AP31

AN28

AP28

AL30
AM30
AM28

AL28

AP27
AM27
AM23
AM22

AL23

AM24

AN22

AP22

AM9

AP11

AP10

AM7
AN5
AN6
AN3

AM6
AM3

AG2
AG1

AM2
AH3
AG3

AD6
AC4

AD4
AD5

AL9
AL6
AP7

AL7

AP3
AP6

AL4
AK2

AK3

AL3

AF3
AE3

AF2
AF1

U6B

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

ALVISO_BGA1257

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4

DDR SYSTEM MEMORY A

SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#

SA_RCVENIN#

SA_RCVENOUT#

SA_WE#

AK15
AK16
AL21

AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3

AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5

AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4

AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15

AN15
AP16
AF29
AF28
AP15

4

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_
M_A_
M_A_
M_A_
M_A_
M_A_
M_A_
M_A_
M_A_
M_A_
M_A_A
M_A_A
M_A_A
M_A_A

TPC28t
TPC28t

3

M_B_DQ[0..63]

M_A_B

S#0

23,24

M_A_B

S#1

23,24

M_A_B

S#2

23,24

M_A_DM[0..7]

M_A_DQS[0..7]

M_A_DQS#[0..7]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

10
11
12
13

T234

1

T237

1

M_A_A[0..13]

M_A_CAS#
M_A_RAS#

M_A_WE#23,24

23,24
23,24

23

23

23

23,24

22

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37M_A_DQ38
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AE31

AE32
AG32
AG36

AE34

AE33

AF31

AF30
AH33
AH32

AK31
AG30
AG34
AG33
AH31

AJ31

AK30

AJ30
AH29
AH28

AK29
AH30
AH27
AG28

AF24
AG23

AJ22

AK22
AH24
AH23
AG22

AJ21
AG10

AH11
AH10

AG9
AG8
AH8

AK9
AK6
AH5

AK8

AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5

AJ9
AJ7
AJ4

AJ8
AJ5

U6C

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

ALVISO_BGA1257

2

SB_BS0#
SB_BS1#
SB_BS2#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7

DDR SYSTEM MEMORY B

SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

AJ15
AG17
AG21

AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7

AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_

A0

M_B_

A1

M_B_

A2

M_B_

A3

M_B_

A4

M_B_

A5

M_B_

A6

M_B_

A7

M_B_

A8

M_B_

A9

M_B_A

10

M_B_A

11

M_B_A

12

M_B_A

13

TPC28t
TPC28t

1

M_B_B

S#0

22,24

M_B_B

S#1

22,24

M_B_B

S#2

22,24

M_B_DM[0..7]

M_B_DQS[0..7]

M_B_DQS#[0..7]

M_B_A[0..13]

M_B_CAS#

T233

1

T235

1

M_B_RAS#

M_B_WE#22,24

22,24
22,24

22

22

22

22,24

A A

Alviso DDR2 SLOT (

Title :

Size

Project Name

Custom

5

4

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Miller Liu

8

Sheet

1

3)

Rev

1.1

55

of

2.5V/2

mA

+2.5VS

D D

VTT

0.9475V/1.05V
/

12

C70

0.1UF

c0402

C C

GND

12

2.5V/0.

B B

+1.5VS

PCIE-1

1.425V/1.5V/
/ /

L29
80Ohm/100Mhz

+1.5VS

L30
80Ohm/100Mhz

A A

5

12

/1.1025V

/640mA

+VCCP

VCCP_GMCH_CAP1
VCCP_GMCH_CAP2

VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

12

C69

0.1UF

c0402

GNDGND

15mA

+2.5VS

L28

120Ohm/100Mhz

.5V

21

21

/

5

L8

2 1

150Ohm/100Mhz

C71

0.1UF

c0402

12

C109

0.1UF

c0402

GND

C174

0.1UF

c0402

GND

21

1.575V
1500mA

+2.5VS_CRTDAC

12

+

VTT50

VTT51

C72

0.1UF

c0402

1 2

+1.5VS_3GPLL

12

C617

0.1UF

c0402

+1.5VS_PCIE

12

+

CE12
150U/4.0V

/

GND

C74

0.01UF

c0402

VTT49

G37

GND

+1.5VS

VTT48

VSSA_3GBG

GND

GND

VTT47

VCCA_3GBG

F37

12

12

C616
10uF/10V

c0805

12

GND

VTT45

VTT46

VCCA_3GPLL2

Y27

C200
10uF/10V

c0805

C562

0.1UF

c0402

12

C591

0.1UF

c0402

VTT42

VTT43

VTT44

VCCA_3GPLL0

VCCA_3GPLL1

J37

Y29

Y28

12

GND

L94

120Ohm/100Mhz

VTT41

VCC3G6

VTT40

VCC3G5

L37

C579

0.1UF

c0402

Layout N
Route caps withi
Alviso. Route FB withi
Al

viso.

12

C593
10uF/10V

c0805

GND

GND

A6

VTT34

VTT35

VTT36

VTT37

VTT39

VTT38

VCC3G0

VCC3G1

VCC3G2

VCC3G3

VCC3G4

AF18

AE37

W37

U37

R37

N37

21

12

GND

4

ote: VssA_CRTDAC

n 250mil of

n 3" of

12

+

CE25
150U/4.0V

VTT23

VTT24

VTT25

VTT26

VTT27

VTT28

VTT29

VTT30

VTT31

VTT32

VTT33

VCCSM64

VCCTX_LVDS0

VCCTX_LVDS1

VCCTX_LVDS2

VCCA_SM0

VCCA_SM1

VCCA_SM2

VCCA_SM3

AE1

B28

A28

A27

AF20

AP19

AF19

GND

12

GND

C665

0.1UF

c0402

4

+

CE27
150U/4.0V

2.5V/6

2.5V/2

R10

P10

N10

M10

K10

J10Y9W9U9R9P9N9M9L9J9N8M8N7M7N6M6N5M5N4M4N3M3N2M2B2V1N1M1G1

VTT17

VTT18

VTT19

VTT20

VTT21

VTT22

VCCSM58

VCCSM59

VCCSM60

VCCSM61

VCCSM62

VCCSM63

AC11

AB11

AB10

AB9

AP8

AM1

No

te: All VCCSM pins

shorted internally.

V1.8_DDR_CAP6
V1.8_DDR_CAP4
V1.8_DDR_CAP3

+1.8V

1.5V/25

+1.5VS_DDRDLL

1.5V/4

+1.5VS_MPLL

8mA

mA

L11

K11

W10

V10

U10

T10

VTT11

VTT12

VTT13

VTT14

VTT15

VTT16

VCCSM52

VCCSM53

VCCSM54

VCCSM55

VCCSM56

VCCSM57

AJ12

AH12

AG12

AF12

AE12

AD11

12

C205

0.1UF

c0402

12

+

DDR2-1.8V(2

1.7V/1.8V
/ /

0mA

5mA

12

+

GND

Route VssA_
from GMCH to decoupl
cap

ground lead and than

connect to the gnd pl

R11

P11

N11

M11

VTT7

VTT8

VTT9

VTT10

VCCSM48

VCCSM49

VCCSM50

VCCSM51

AN12

AM12

AL12

AK12

12

C217

0.1UF

c0402

CE28
150U/4.0V

Slot)

/1.9V

2.4A

CE10
100UF/4V

CRTDAC GND

W11

V11

U11

T11

VTT3

VTT4

VTT5

VTT6

VCCSM44

VCCSM45

VCCSM46

VCCSM47

AG13

AF13

AE13

AP12

12

C233

0.1UF

c0402

GND

12

C632

0.1UF

c0402

+1.8V

GND

120Ohm/100Mhz

12

C187

0.1UF

c0402

GND

K13

J13

K12

VTT0

VTT1

VTT2

VCCSM41

VCCSM42

VCCSM43

AL13

AK13

AJ13

AH13

12

GND

12

+

CE14
150U/4.0V

/

VCCSM40

3

L21

21

ing

ane

E19

G19

H20

VCC_SYNC

VSSA_CRTDAC

VCCA_CRTDAC1

VCCSM35

VCCSM36

VCCSM37

VCCSM38

VCCSM39

AE15

AE14

AP13

AN13

AM13

No
shorted internally.

12

C234

0.1UF

c0402

C627
10uF/10V

c0805

+1.8V

12

+

CE13
150U/4.0V

/

GND

3

+1.5VS_HPLL

1.5V/4

5mA

12

+

CE11
100UF/4V

GND

1.5V/4

12

+

100UF/4V

GND

AC2

AC1

B23

C35

AA1

AA2

F19

VCCA_HPLL

VCCA_MPLL

VCCA_DPLLA

VCCA_DPLLB

VCCH_MPLL1

VCCH_MPLL0

VCCA_CRTDAC0

VCCSM26

VCCSM27

VCCSM28

VCCSM29

VCCSM30

VCCSM31

VCCSM32

VCCSM33

VCCSM34

AE24

AE23

AE22

AE21

AE20

AE19

AE18

AE17

AE16

te: All VCCSM pins

12

12

C211

0.1UF

c0402

GND

GND

+1.5VS_DPLLB

0mA

CE23

GND

V18

T18

K18

K17

VCC45

VCC46

VCC47

VCC48

POWE

VCCSM22

VCCSM23

VCCSM24

VCCSM25

AH25

AG25

AF25

AE25

C220

0.1UF

c0402

12

C195

0.1UF

c0402

12

C556

0.1UF

c0402

U19

K19

W18

VCC42

VCC43

VCC44

VCCSM19

VCCSM20

VCCSM21

AL25

AK25

AJ25

L26

21

120Ohm/100Mhz

L89

21

120Ohm/100Mhz

1.5V/4

0mA

1.5V/15

W20

U20

T20

K20

V19

VCC37

VCC38

VCC39

VCC40

VCC41

R

VCCSM14

VCCSM15

VCCSM16

VCCSM17

VCCSM18

AF26

AE26

AP25

AN25

AM25

V1.8_DDR_CAP5
V1.8_DDR_CAP2
V1.8_DDR_CAP1

+2.5VS

C62
10uF/10V

c0805

0mA

K21

AG26

2

+1.5VS

D53

1

+1.5VS_DPLLA

12

+

CE3
100UF/4V

GND

H27

K26

H26

K25

J25

K24

K23

K22

VCC29

VCC30

VCC31

VCC32

VCC33

VCC34

VCC35

VCC36

VCCSM6

VCCSM7

VCCSM8

VCCSM9

VCCSM10

VCCSM11

VCCSM12

VCCSM13

AC27

AP26

AN26

AM26

AL26

AK26

AJ26

AH26

12

12

C554

0.1UF

c0402

GND

120Ohm/100Mhz

12

C63

0.1UF

c0402

GND

R27

P27

N27

M27

L27

K27

J27

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

VCC27

VCC28

VCCHV2

VCCSM0

VCCSM1

VCCSM2

VCCSM3

VCCSM4

VCCSM5

A21

AM37

AH37

AP29

AD28

AD27

2

2

21

12

V27

VCC18

C599
10uF/10V

c0805

J28

H28

G28

VCC16

VCC17

VCCA_LVDS

A25

A35

BAT54C

D54

1
2

BAT54C

12

C577
10uF/10V

c0805

GND GND

P28

N28

M28

L28

K28

VCC11

VCC12

VCC13

VCC14

VCC15

VCCDQ_TVDAC

VCCD_LVDS0

VCCD_LVDS1

VCCD_LVDS2

D19

H17

B26

B25

GND

Date:

VCC10

VCCD_TVDAC

L7

GND GND

U27

T27

VCC19

VCC20

VCCHV0

VCCHV1

B22

B21

R476

1KOhm

r0402

1 2

3

Alviso C
Min Typ
VCC 1V 1.05
Min Typ
ICC

+VCCP

3

12

C564
10uF/10V

c0805

M29

K29

J29

V28

U28

T28

R28

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

VCCA_TVDACB1

VCCA_TVDACC0

VCCA_TVDACC1

VCCA_TVBG

VSSA_TVBG

C18

F18

E18

H18

G18

Size

Project Name

Custom

Tuesday, August 02, 2005

ore

R478

1KOhm

r0402

1 2

12

C604

0.1UF

c0402

T29

R29

N29

VCC0

VCC1

VCC2

VCCA_TVDACA0

VCCA_TVDACA1

VCCA_TVDACB0

F17

E17

D18

A3V

U6G
ALVISO_BGA1257

Max
V 1.1V
Max

3.7A

12

C582

0.1UF

c0402

GND

Engineer:

1

+3

VS

12

GND

Title :

Sheet

1

+2.5VS

C592

0.1UF

c0402

Alvis

o POWER (4)

Miller Liu

9

Rev

1.1

55

of

5

D D

AL24

AN24

A26

E26

G26

J26

B27

E27

G27

W27

AA27

AB27

AF27

AG27

AJ27

AL27

AN27

E28

W28

AA28

AB28

AC28

A29

D29

E29

F29

G29

H29

GND

VSS267

VSS266

VSS265

VSS264

VSS263

VSS262

VSS261

VSS129

VSS128

VSS127

VSS126

VSS125

VSS124

VSS123

VSS122

VSS121

VSS120

VSS119

VSS118

VSS117

VSS116

VSS115

VSS114

VSS113

VSS112

VSS111

VSS110

4

L29

P29

U29

V29

W29

AA29

AD29

AG29

AJ29

AM29

C30

Y30

AA30

AB30

AC30

AE30

AP30

D31

E31

F31

G31

H31

J31

K31

L31

M31

N31

P31

R31

T31

U31

V31

W31

VSS99

VSS98

VSS97

VSS96

VSS95

VSS94

VSS93

VSS92

VSS91

VSS90

VSS89

VSS88

VSS87

VSS86

VSS85

VSS84

VSS83

VSS82

VSS81

VSS80

VSS79

VSS78

VSS109

VSS108

VSS107

VSS106

VSS105

VSS104

VSS103

VSS102

VSS101

VSS100

VSS77

3

AD31

AG31

AL31

A32

C32

Y32

AA32

AB32

AC32

AD32

AJ32

AN32

D33

E33

F33

G33

H33

J33

K33

L33

M33

N33

P33

R33

T33

U33

V33

W33

AD33

AF33

AL33

C34

AA34

VSS76

VSS75

VSS74

VSS73

VSS72

VSS71

VSS70

VSS69

VSS68

VSS67

VSS66

VSS65

VSS64

VSS63

VSS62

VSS61

VSS60

VSS59

VSS58

VSS57

VSS56

VSS55

VSS54

VSS53

VSS52

VSS51

VSS50

VSS49

VSS48

VSS47

VSS46

VSS45

VSS44

2

AB34

AC34

AD34

AH34

AN34

B35

D35

E35

F35

G35

H35

J35

K35

L35

M35

N35

P35

R35

T35

U35

V35

W35

Y35

AE35

C36

AA36

AB36

AC36

AD36

AE36

AF36

AJ36

AL36

VSS43

VSS42

VSS41

VSS40

VSS39

VSS38

VSS37

VSS36

VSS35

VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

VSS28

VSS27

VSS26

VSS25

VSS24

VSS23

VSS22

VSS21

VSS20

VSS19

VSS18

VSS17

VSS16

VSS15

VSS14

VSS13

VSS12

VSS11

1

AN36

E37

H37

K37

M37

P37

T37

V37

Y37

AG37

U6H

VSS4

VSS3

VSS2

ALVISO_BGA1257

VSS1

VSS0

VSS9

VSS8

VSS7

VSS6

VSS5

VSS10

VSS

VSSALVDS

VSS271

VSS270

VSS269

VSS268

VSS260

VSS259

VSS258

VSS257

VSS256

VSS255

VSS254

VSS253

VSS252

VSS251

VSS250

VSS249

VSS248

VSS247

VSS246

VSS245

VSS244

VSS243

VSS242

VSS241

VSS240

VSS239

VSS238

VSS237

VSS236

VSS235

VSS234

VSS233

VSS232

VSS231

VSS230

VSS229

VSS228

VSS227

VSS226

VSS225

VSS224

VSS223

VSS222

VSS221

VSS220

VSS219

VSS218

VSS217

VSS216

VSS215

VSS214

VSS213

VSS212

VSS211

VSS210

VSS209

VSS208

VSS207

VSS206

VSS205

VSS204

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS162

VSS161

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

VSS140

VSS139

VSS138

VSS137

VSS136

VSS135

VSS134

VSS133

VSS132

VSS131

VSS163

B36Y1D2G2J2L2P2T2V2

C C

AD2

AE2

AH2

AL2

AN2A3C3

AA3

AB3

AC3

AJ3C4H4L4P4U4Y4

AF4

AN4E5W5

AL5

AP5B6J6L6P6T6AA6

AC6

AE6

AJ6G7V7

AA7

AG7

AK7

AN7C8E8L8P8Y8AL8A9H9K9T9V9AA9

AC9

AE9

AH9

AN9

D10

L10

Y10

AA10

F11

H11

Y11

AA11

AF11

AG11

AJ11

AL11

AN11

B12

D12

J12

A14

B14

F14

J14

K14

AG14

AJ14

AL14

AN14

C15

K15

A16

D16

H16

K16

AL16

C17

G17

AF17

AJ17

AN17

A18

B18

AL18

C19

H19

J19

T19

W19

AG19

AN19

A20

D20

E20

F20

G20

V20

AK20

C21

F21

AF21

AN21

A22

D22

E22

J22

AH22

AL22

U18

H23

VSS130

AF23

B24

D24

F24

J24

AG24

AJ24

GND

+1.8V

B B

+VCCP

A A

5

AB12

AC12

AD12

AB13

AC13

AD13

AC14

AD14

AC15

AD15

AC16

AD16

AC17

AD17

AC18

AD18

AC19

AD19

AC20

AD20

AC21

AD21

AC22

AD22

AC23

AD23

AC24

AD24

AC25

AD25

AC26

AD26

L17

M17

N17

P17

T17

U17

V17

W17

L18

M18

N18

P18

R18

Y18

L19

M19

N19

P19

R19

Y19

L20

M20

N20

P20

R20

Y20

L21

M21

N21

P21

T21

U21

V21

W21

L22

M22

N22

P22

R22

T22

U22

V22

W22

L23

M23

N23

P23

R23

T23

U23

V23

W23

L24

M24

N24

P24

R24

T24

U24

V24

W24

L25

M25

N25

P25

R25

T25

U25

V25

W25

L26

M26

N26

P26

R26

T26

VCC_NCTF9

VCC_NCTF8

VCC_NCTF7

VCC_NCTF6

VCC_NCTF5

VCC_NCTF4

VCC_NCTF78

VCC_NCTF77

VCC_NCTF76

VCC_NCTF75

VCC_NCTF74

VCC_NCTF73

VCC_NCTF72

VCC_NCTF71

VCC_NCTF70

VCC_NCTF69

VCC_NCTF68

VCC_NCTF67

VCC_NCTF66

VCC_NCTF65

VCC_NCTF64

VCC_NCTF63

VCC_NCTF62

VCC_NCTF61

VCC_NCTF60

VCC_NCTF59

VCC_NCTF58

VCC_NCTF57

VCC_NCTF56

VCC_NCTF55

VCC_NCTF54

VCC_NCTF53

VCC_NCTF52

VCC_NCTF51

VCC_NCTF50

VCC_NCTF49

VCC_NCTF48

VCC_NCTF47

VCC_NCTF46

VCC_NCTF45

VCC_NCTF44

VCC_NCTF43

VCC_NCTF42

VCC_NCTF41

VCC_NCTF40

VCC_NCTF39

VCC_NCTF38

VCC_NCTF37

VCC_NCTF36

VCC_NCTF35

VCC_NCTF34

VCC_NCTF33

VCC_NCTF32

VCC_NCTF31

VCC_NCTF30

VCC_NCTF29

VCC_NCTF28

VCC_NCTF27

VCC_NCTF26

VCC_NCTF25

VCC_NCTF24

VCC_NCTF23

VCC_NCTF22

VCC_NCTF21

VCC_NCTF20

VCC_NCTF19

VCC_NCTF18

VCC_NCTF17

VCC_NCTF16

VCC_NCTF15

VCC_NCTF14

VCC_NCTF13

VCC_NCTF12

VCC_NCTF11

VCCSM_NCTF9

VCCSM_NCTF8

VCCSM_NCTF7

VCCSM_NCTF6

VCCSM_NCTF5

VCCSM_NCTF4

VCCSM_NCTF3

VCCSM_NCTF2

VCCSM_NCTF1

VCCSM_NCTF31

VCCSM_NCTF30

VCCSM_NCTF29

VCCSM_NCTF28

VCCSM_NCTF27

VCCSM_NCTF26

VCCSM_NCTF25

VCCSM_NCTF24

VCCSM_NCTF23

VCCSM_NCTF22

VCCSM_NCTF21

VCCSM_NCTF20

VCCSM_NCTF19

VCCSM_NCTF18

VCCSM_NCTF17

VCCSM_NCTF16

VCCSM_NCTF15

VCCSM_NCTF14

VCCSM_NCTF13

VCCSM_NCTF12

VCCSM_NCTF11

VCCSM_NCTF10

VTT_NCTF17

VTT_NCTF16

VTT_NCTF15

VTT_NCTF14

VTT_NCTF13

L12

M12

N12

P12

R12

T12

4

VCCSM_NCTF0

VTT_NCTF12

VTT_NCTF11

VTT_NCTF10

VTT_NCTF9

VTT_NCTF8

VTT_NCTF7

VTT_NCTF6

VTT_NCTF5

VTT_NCTF4

VTT_NCTF3

VTT_NCTF2

VTT_NCTF1

VTT_NCTF0

VSS_NCTF68

VSS_NCTF67

VSS_NCTF66

VSS_NCTF65

VSS_NCTF64

VSS_NCTF63

VSS_NCTF62

U12

V12

W12

L13

M13

N13

P13

R13

T13

U13

V13

W13

Y12

AA12

Y13

AA13

L14

M14

N14

NCT

F

VSS_NCTF61

VSS_NCTF60

VSS_NCTF59

VSS_NCTF58

VSS_NCTF57

VSS_NCTF56

VSS_NCTF55

VSS_NCTF54

VSS_NCTF53

VSS_NCTF52

VSS_NCTF51

VSS_NCTF50

VSS_NCTF49

VSS_NCTF48

VSS_NCTF47

VSS_NCTF46

VSS_NCTF45

VSS_NCTF44

VSS_NCTF43

VSS_NCTF42

VSS_NCTF41

VSS_NCTF40

VSS_NCTF39

VSS_NCTF38

VSS_NCTF37

VSS_NCTF36

VSS_NCTF35

VSS_NCTF34

VSS_NCTF33

VSS_NCTF32

VSS_NCTF31

VSS_NCTF30

VSS_NCTF29

VSS_NCTF28

VSS_NCTF27

VSS_NCTF26

VSS_NCTF25

VSS_NCTF24

VSS_NCTF23

VSS_NCTF22

VSS_NCTF21

VSS_NCTF20

VSS_NCTF19

VSS_NCTF18

VSS_NCTF17

P14

R14

T14

U14

V14

W14

Y14

AA14

AB14

L15

M15

N15

P15

R15

T15

U15

V15

W15

Y15

AA15

AB15

L16

M16

N16

P16

R16

T16

U16

V16

W16

Y16

AA16

AB16

R17

Y17

AA17

AB17

AA18

AB18

AA19

AB19

AA20

AB20

R21

Y21

AA21

3

2

VCC_NCTF10

VSS_NCTF16

VSS_NCTF15

VSS_NCTF14

VSS_NCTF13

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

AB21

Y22

AA22

AB22

Y23

AA23

AB23

Date:

VCC_NCTF3

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

VSS_NCTF6

VSS_NCTF5

VSS_NCTF4

VSS_NCTF3

Y24

AA24

AB24

Y25

AA25

AB25

Size

Project Name

Custom

Tuesday, August 02, 2005

U26

Y26

V26

VCC_NCTF2

VSS_NCTF2

AA26

A3V

VCC_NCTF1

VSS_NCTF1

W26

U6E

ALVISO_BGA1257

VCC_NCTF0

VSS_NCTF0

AB26

GND

+VCCP

Engineer:

Title :

Sheet

1

Alviso GND (5

Miller Liu

10 55

of

)

Rev

1.1

5

4

3

2

1

CFG[17..3] have internal
CFG[19..18] have internal pulld
SDVO

CRTL_DATA has internal pulldown

resistor

s.

D D

SDVOCRTL_
LOW = N
device
(Def

CFG5 : LOW = DMI

HIGH = DMI X 4 (Def

CFG5

7

R466

2.2KOhm

r0402
/

1 2

GND

C C

CFG7

: CPU STRAP

CFG7

7

GND

R470

2.2KOhm

r0402
/

1 2

LOW = Mob
HIGH

X 2

ault)

ile Prescott

= Dothan CPU (Default)

o SDVO

present

ault)

pullup resistors.

own resistors.

DATA :

CFG6 : LOW = DDR2 SDR

HIGH = DDR SDRAM

CFG6

7

R469

2.2KOhm

r0402

1 2

GND

CFG8 : PCI-X P

CFG8

7

GND

R468

2.2KOhm

r0402
/

1 2

LOW
HIGH

AM

(Default)

OWER Saving

= PCI-X POWER Saving

(Default)

B B

CFG9 : PCIE GRAP

CFG9

7

1 2

GND

HIC LANE

LOW =

REVERSE LANE

HIGH = NORMAL OPERATION (Defaul

R465

2.2KOhm

r0402
/

t)

CFG18 : VCC SELECT

+2.5VS

A A

1 2

CFG18

7

5

LOW = 1.05V (Defau
HIGH =

R474

2.2KOhm

r0402
/

1.5V

lt)

4

CFG16 : FSB

CFG16

7

CFG1

CFG19

7

DYNAMIC ODT

LOW = Dynamic
HIGH = Dynamic

R467

2.2KOhm

r0402
/

1 2

GND

9 : VTT SELECT

+2.5VS

LOW = 1.05V (Defau
HIGH =

R475

2.2KOhm

r0402
/

1 2

3

1.2V

ODT Disabled

ODT Enabled (Default)

lt)

GMCH Stra

Title :

Size

Project Name

Custom

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Sheet

1

pping

Miller Liu

11 55

of

Rev

1.1

-1.25% Down
Spectrum fo
Attenuat

1
2
3
4 5

R744
22Ohm

R0603
/

1 2

5

U68

XIN
VSS
SRS
ModOUT

P1819B

/

ion

XOUT

VDD
PD#
REF

Spread

r EMI

PCIENB_RXP0
PCIENB_RXN0

PCIENB_RXP1
PCIENB_RXN1

PCIENB_RXP2
PCIENB_RXN2

PCIENB_RXP3
PCIENB_RXN3

PCIENB_RXP4
PCIENB_RXN4

PCIENB_RXP5
PCIENB_RXN5

PCIENB_RXP6
PCIENB_RXN6

PCIENB_RXP7
PCIENB_RXN7

PCIENB_RXP8
PCIENB_RXN8

PCIENB_RXP9
PCIENB_RXN9

PCIENB_RXP10
PCIENB_RXN10

PCIENB_RXP11
PCIENB_RXN11

PCIENB_RXP12
PCIENB_RXN12

PCIENB_RXP13
PCIENB_RXN13

PCIENB_RXP14
PCIENB_RXN14

PCIENB_RXP15
PCIENB_RXN15

8
7
6

1 2

C32

1 2

C50

1 2

C28

1 2

C58

1 2

C27

1 2

C16

1 2

C39

1 2

C20

1 2

C41

1 2

C35

1 2

C29

1 2

C44

1 2

C33

1 2

C48

1 2

C24

1 2

C46

+3V

21

L104
120Ohm/100MHz

/

12

12

C883

2.2UF/6.3V

c0603
/

PLACE BETWEEN PIN6.7

GND

7,17,18,19,27,28,38,40

1 2

C882

0.01U

C0603

R745
22Ohm

R0603
/

/

VGA_CLK_IN

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

1 2

C31

1 2

C51

1 2

C23

1 2

C59

1 2

C22

1 2

C17

1 2

C40

1 2

C21

1 2

C42

1 2

C36

1 2

C30

1 2

C45

1 2

C34

1 2

C49

1 2

C25

1 2

C47

PLT_

M0417

PCIENB_RXP[0..15]

7

PCIENB_RXN[0..15]

7

D D

C C

VGA_SSC_IN

R743
0Ohm

R0603
/

1 2

GND

B B

MEM_SSIN

Spread Spectrum

R60

6.8KOhm

R0603

R0603

1 2

0Ohm

VGA_CLK_IN

0Ohm

VGA_SSC_IN

/

THERM_SCLK
THERM_SDATA

R746

27MHz_V

GA

21

A A

5

1 2

R747

1 2

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

+3V

RST#

S

R54

6.8KOhm

1 2

4

PCIEG_RXP[0..15]

7

PCIEG_RXN[0..15]

7

PCIEG_TXP
PCIEG_TXN0

PCIEG_TXP
PCIEG_TXN1

PCIEG_TXP
PCIEG_TXN2

PCIEG_TXP
PCIEG_TXN3

PCIEG_TXP
PCIEG_TXN4

PCIEG_TXP
PCIEG_TXN5

PCIEG_TXP
PCIEG_TXN6

PCIEG_TXP
PCIEG_TXN7

PCIEG_TXP
PCIEG_TXN8

PCIEG_TXP
PCIEG_TXN9

PCIEG_TXP1
PCIEG_TXN10

PCIEG_TXP1
PCIEG_TXN11

PCIEG_TXP1
PCIEG_TXN12

PCIEG_TXP1
PCIEG_TXN13

PCIEG_TXP1
PCIEG_TXN14

PCIEG_TXP1
PCIEG_TXN15

1
2
3 4

/

GND

1 2

R461
121Ohm

12

4

0

1

2

3

4

5

6

7

8

9

0

1

2

3

4

5

U7

A

VCC

B

GND

NC7S08M5X
R714

0Ohm

26

GND

+1.2VS_PCIE

5

Y

TV_Y

26

TV_C

26

TV_CVB

M0417

R460

71.5Ohm

1 2

CLK_PCIE_PEG

21

CLK_PCIE_PEG#

21

M0506

+3

VS

S

GND

R56

1 2

R61

1 2

R66

PCIE_RST#

R55
R491

1 2

TV_Y
TV_C

TV_CVB

R481

R46

R479

PCIEG_RXP0

PCIEG_RXN0

PCIEG_RXP1

PCIEG_RXN1

PCIEG_RXP2

PCIEG_RXN2

PCIEG_RXP3

PCIEG_RXN3

PCIEG_RXP4

PCIEG_RXN4

PCIEG_RXP5

PCIEG_RXN5

PCIEG_RXP6

PCIEG_RXN6

PCIEG_RXP7

PCIEG_RXN7

PCIEG_RXP8

PCIEG_RXN8

PCIEG_RXP9

PCIEG_RXN9

PCIEG_RXP10

PCIEG_RXN10

PCIEG_RXP11

PCIEG_RXN11

PCIEG_RXP12

PCIEG_RXN12

PCIEG_RXP13

PCIEG_RXN13

PCIEG_RXP14

PCIEG_RXN14

PCIEG_RXP15

PCIEG_RXN15

PCIEG_TXP
PCIEG_TXN0
PCIEG_TXP
PCIEG_TXN1
PCIEG_TXP
PCIEG_TXN2
PCIEG_TXP
PCIEG_TXN3
PCIEG_TXP
PCIEG_TXN4
PCIEG_TXP
PCIEG_TXN5
PCIEG_TXP
PCIEG_TXN6
PCIEG_TXP
PCIEG_TXN7
PCIEG_TXP
PCIEG_TXN8
PCIEG_TXP
PCIEG_TXN9
PCIEG_TXP1
PCIEG_TXN10
PCIEG_TXP1
PCIEG_TXN11
PCIEG_TXP1
PCIEG_TXN12
PCIEG_TXP1
PCIEG_TXN13
PCIEG_TXP1
PCIEG_TXN14
PCIEG_TXP1
PCIEG_TXN15

12

T30TPC28t

1

12

S

12

12

12

3

U47A

AH30

PCIE_RX0P

AG30

PCIE_RX0N

AG29

PCIE_RX1P

AF29

PCIE_RX1N

AE29

PCIE_RX2P

AE30

PCIE_RX2N

AD30

PCIE_RX3P

AD29

PCIE_RX3N

AC29

PCIE_RX4P

AB29

PCIE_RX4N

AB30

PCIE_RX5P

AA30

PCIE_RX5N

AA29

PCIE_RX6P

Y29

PCIE_RX6N

W29

PCIE_RX7P

W30

PCIE_RX7N

V30

PCIE_RX8P

V29

PCIE_RX8N

U29

PCIE_RX9P

T29

PCIE_RX9N

T30

PCIE_RX10P

R30

PCIE_RX10N

R29

PCIE_RX11P

P29

PCIE_RX11N

N29

PCIE_RX12P

N30

PCIE_RX12N

M30

PCIE_RX13P

M29

PCIE_RX13N

L29

PCIE_RX14P

K29

PCIE_RX14N

K30

PCIE_RX15P

J30

PCIE_RX15N

0

AF26

PCIE_TX0P

AE26

1
2
3
4
5
6
7
8
9

0
1
2
3
4
5

150Ohm
100Ohm
10KOhm

1KOhm
715 Ohm

1KOhm

1KOhm

10KOhm

PCIE_TX0N

AC25

PCIE_TX1P

AB25

PCIE_TX1N

AC27

PCIE_TX2P

AB27

PCIE_TX2N

AC26

PCIE_TX3P

AB26

PCIE_TX3N

Y25

PCIE_TX4P

W25

PCIE_TX4N

Y27

PCIE_TX5P

W27

PCIE_TX5N

Y26

PCIE_TX6P

W26

PCIE_TX6N

U25

PCIE_TX7P

T25

PCIE_TX7N

U27

PCIE_TX8P

T27

PCIE_TX8N

U26

PCIE_TX9P

T26

PCIE_TX9N

P25

PCIE_TX10P

N25

PCIE_TX10N

P27

PCIE_TX11P

N27

PCIE_TX11N

P26

PCIE_TX12P

N26

PCIE_TX12N

L25

PCIE_TX13P

K25

PCIE_TX13N

L27

PCIE_TX14P

K27

PCIE_TX14N

L26

PCIE_TX15P

K26

PCIE_TX15N

AF27

PCIE_REFCLKP

AE27

PCIE_REFCLKN

AC23

PCIE_CALRP

AB24

PCIE_CALRN

AB23

PCIE_CALI

AE25

PCIE_TEST

AD25

PERSTb

AD24

PERSTb_MASK

AH21

R2SET

AK21

Y_G

AJ22

C_R_PR

AK22

COMP_B_PB

AJ24

H2SYNC

AK24

V2SYNC

AG22

DDC3CLK

AG23

DDC3DATA

AJ23

SSIN

AH24

SSOUT

AH28

XTALIN

AJ29

XTALOUT

AH27

TESTEN

E8

TEST_YCLK

B6

TEST_MCLK

AF25 AF11

PLLTEST

AH25

STEREOSYNC

216CPIAKA11F

PCI EXPRESS

DAC2

SS

CLK

Part 1 of 6

GPIO_PWRCNTL

GPIO_MEMSSIN

DVO / EXT TMDS / GPIOTMDSDAC1

LVDS

GPIO__AUXWIN

THERM

3

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8

GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14

DVOVMODE
DVPDATA_0

DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8

DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

DVPCNTL_0

DVPCNTL_1

DVPCNTL_2

DVPCNTL_3

VREFG

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN
TXCLK_UP

DIGON

BLON
TX0M

TX0P

TX1M

TX1P

TX2M

TX2P
TXCM
TXCP

DDC2CLK

DDC2DATA

HPD1

HSYNC
VSYNC

RSET

DDC1DATA

DDC1CLK

DPLUS

DMINUS

2

AJ5
AH5
AJ4
AK4
AH4
AF4
AJ3
AK3
AH3
AJ2
AH2
AH1
AG3
AG1
AG2
AF3

MEM_SSIN

AF2

R80

AE10

1 2

AH6
AJ6
AK6
AH7
AK7
AJ7
AH8
AJ8
AH9
AJ9
AK9
AH10
AE6
AG6
AF6
AE7

TPC28t

1

AF7

TPC28t

1

AE8
AG8
AF8

TPC28t

1

AE9

MEM_ID0

AF9

MEM_ID1

AG10

MEM_ID2

AF10
AJ10

AK10
AJ11
AH11

AG4

AH15
AH16
AJ16
AJ17
AJ18
AK18
AJ20
AJ21
AK19
AJ19
AG16
AG17
AF16
AF17
AE18
AE19
AF19
AF20
AG19
AG20

AE12
AG12

AK13
AJ13
AJ14
AJ15
AK15
AK16
AJ12
AK12

AE13
AE14

AF12
AK27

R

AJ27

G

AJ26

B

AJ25
AK25

AH26
AG25

AF24
AG24

AE11

100KOhm

499Ohm

GND

1 2

10KOhm

ATI_PERF#

0Ohm

T5

3

T5

1

T4

7

7 8

10KOhm

5 6

10KOhm

1 2

10KOhm

3 4

10KOhm

LVDS_YA0M
LVDS_YA0P
LVDS_YA1M
LVDS_YA1P
LVDS_YA2M
LVDS_YA2P

LVDS_CLKAM
LVDS_CLKAP
LVDS_YB0M
LVDS_YB0P
LVDS_YB1M
LVDS_YB1P
LVDS_YB2M
LVDS_YB2P

LVDS_CLKBM
LVDS_CLKBP

LVDS_VDD_EN

R78

10KOhm

1 2

R72
R69

1 2

CRT_RED
CRT_GREEN
CRT_BLUE

CRT_DDC_DATA
CRT_DDC_CLK

OTEMP13
VGA_THRM_DA
VGA_THRM_DC

2

T5

7

TPC28t

1

GND

RN20D
RN20C
RN20A
RN20B

25

25

25

25

25

25

25
25

25

25

25

25

25

25

25
25

LVDS_BACK_EN

/

12
12

/

R71

R47

26

26

R53

12

5
5

25

GND

12

33Ohm
33Ohm

GND

GND

T5
T3

+3V

C188

0.1UF

GND

25

CRT_RED
CRT_GREEN
CRT_BLUE

CRT_HSYNC
CRT_VSYNC

M0417

S

R88

100Ohm

1 2

R89

100Ohm

1 2

SCL_MEMSS
SDA_MEMSS27

26

26

26

26
26

Size

Custom

Date:

1
1

TPC28t

1 2

TPC28t

EDID_DAT
EDID_CLK

4.7KOhm

3 4

4.7KOhm

5 6

4.7KOhm

7 8

4.7KOhm

25
25

MEM_ID0

MEM_ID1
MEM_ID2

R85

10KOhm

MEM_ID2

0
0

0

1

1

1 1

27

Place TV and
resistor

CRT_RED
CRT_GREEN
CRT_BLUE

TV_C
TV_Y
TV_CVBS

Project Name

A3V

Tuesday, August 02, 2005

12

GND GND

MEM_ID1 MEM_ID0

1

+3V

S

RN1A
RN1B
RN1C
RN1D

12

12

R79

10KOhm

GND

0
0

1

0

0

CRT termination

s close to ASIC

R708
R709
R710

R702
R703
R704

Title :

Engineer:

1

R87

R84
R83

R82

10KOhm

0
1

0

0

1

0

1 2
1 2
1 2

1 2
1 2
1 2

Sheet

HYNIX 64MB

HYNIX
128M

HYNIX

256M
Sams
64M

B
Sams
128M
Samsun
256M

150Ohm
150Ohm
150Ohm

ATI_M2

6P_MAIN(1)

Miller Liu

12 55

+3V

S

10KOhm

12

/
12
12

/

B

B

ung

ung

B

B

150Ohm
150Ohm
150Ohm

GND

GND

of

/

10KOhm

g

1%
1%
1%

10KOhm

1%
1%
1%

Rev

1.1

5

MDA[63..0]

15

D D

C C

B B

U47B

MDA0

H28

VSS169

MDA1

H29

VSS170

MDA2

J28

VSS180

MDA3

J29

VSS181

MDA4

J26

VSS178

MDA5

H25

VSS166

MDA6

H26

VSS167

MDA7

G26

VSS149

MDA8

G30

VSS152

MDA9 MDB9

D29

VSS82

MDA10

D28

VSS81

MDA11

E28

VSS107

MDA12

E29

VSS108

MDA13

G29

VSS151

MDA14

G28

VSS150

MDA15

F28

VSS133

MDA16

G25

VSS148

MDA17

F26

VSS131

MDA18

E26

VSS106

MDA19

F25

VSS130

MDA20

E24

VSS104

MDA21

F23

VSS128

MDA22

E23

VSS103

MDA23

D22

VSS78

MDA24

B29

VSS38

MDA25

C29

VSS64

MDA26

C25

VSS60

MDA27

C27

VSS62

MDA28

B28

VSS37

MDA29

B25

VSS34

MDA30

C26

VSS61

MDA31

B26

VSS35

MDA32

F17

VSS124

MDA33

E17

VSS97

MDA34

D16

VSS75

MDA35

F16

VSS123

MDA36

E15

VSS95

MDA37

F14

VSS121

MDA38

E14

VSS94

MDA39

F13

VSS120

MDA40

C17

VSS52

MDA41

B18

VSS27

MDA42

B17

VSS26

MDA43

B15

VSS24

MDA44

C13

VSS48

MDA45

B14

VSS23

MDA46

C14

VSS49

MDA47

C16

VSS51

MDA48

A13

VSS5

MDA49

A12

VSS4

MDA50

C12

VSS47

MDA51

B12

VSS21

MDA52

C10

VSS45

MDA53

C9

VSS44

MDA54

B9

VSS18

MDA55

B10

VSS19

MDA56

E13

VSS93

MDA57

E12

VSS92

MDA58

E10

VSS90

MDA59

F12

VSS119

MDA60

F11

VSS118

MDA61

E9

VSS89

MDA62

F9

VSS116

MDA63

F8

VSS115

216CPIAKA11F

Part 2 of 6

NC_DIMA1
NC_DIMA0

MEMORY CHANNEL A MEMORY CHANNEL B

VSS102

VSS31
VSS32
VSS33
VSS58

VSS57
VSS127
VSS126

VSS56

VSS10

VSS59

VSS11
VSS101

VSS29

VSS54
VSS177

VSS134
VSS105

VSS12
VSS122

VSS50

VSS46

VSS91
VSS179

VSS135
VSS129

VSS36

VSS96

VSS25

VSS20
VSS117

VSS8
VSS98
VSS99

VSS100
VSS125

VSS28

VSS30
VSS55

VSS53

VSS7

MVREFA
MVREFM

4

MAA[13..0]

15

MDB[63..0]

QSA[7..0]

15

15

MVREFD

12

GND

MVREFS

12

GND

16

C626

0.1UF

C613

0.1UF

MEM_VDD

MEM_VDD

MA

A0

E22

MA

A1

B22

MA

A2

B23

MA

A3

B24

MA

A4

C23

MA

A5

C22

MA

A6

F22

MA

A7

F21

MA

A8

C21

MA

A9

A24

MAA

10

C24

MAA

11

A25

MAA

12

E21

MAA

13

B20
C19

DQMA#0

J25

DQMA#1

F29

DQMA#2

E25

DQMA#3

A27

DQMA#4

F15

DQMA#5

C15

DQMA#6

C11

DQMA#7

E11

QSA0

J27

QSA1

F30

QSA2

F24

QSA3

B27

QSA4

E16

QSA5

B16

QSA6

B11

QSA7

F10
A19
E18
E19
E20
F20
B19

B21
C20

C18
A18

B7
B8

D30
B13

MVREFD

MVREFS

RASA#
CASA#
WEA#
CSA0#
CSA1#
CKEA

CLKA0
CLKA0#

CLKA1
CLKA1#

DQMA#[7..0]

15
15

15

15
15

15

15

15

15

15

1 2

1 2

1 2

1 2

R506
100Ohm

R505
100Ohm

R503
100Ohm

R502
100Ohm

3

AA2
AA6
AA5
AB6
AB5
AD6
AD5
AE5
AE4
AB2
AB3
AC2
AC3
AD3
AE1
AE2
AE3

D7

F7

E7
G6
G5

F5

E5
C4

B5
C5

A4

B4
C2
D3
D1
D2
G4
H6
H5

J6

K5

K4

L6

L5
G2

F3
H2

E2

F2

J3

F1
H3
U6
U5
U3

V6
W5
W4

Y6

Y5
U2

V2

V1

V3
W3

Y2

Y3

U47C

VSS71
VSS114
VSS88
VSS141
VSS140
VSS112
VSS86
VSS42
VSS17
VSS43
VSS2
VSS16
VSS40
VSS68
VSS66
VSS67
VSS139
VSS157
VSS156
VSS174
VSS186
VSS185
VSS194
VSS193
VSS137
VSS111
VSS153
VSS84
VSS110
VSS172
VSS109
VSS154
VSS244
VSS243
VSS241
VSS252
VSS259
VSS258
VSS268
VSS267
VSS240
VSS249
VSS248
VSS250
VSS257
VSS264
VSS265
VSS269
VSS272
VSS271
VSS277
VSS276
VSS293
VSS292
VSS301
VSS300
VSS274
VSS275
VSS280
VSS281
VSS291
VSS297
VSS298
VSS299

216CPIAKA11F

Part 3 of 6

NC_MEMVMODE_1

NC_DIMB0
NC_DIMB1

MEMTEST

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8

MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

VSS205
VSS195
VSS197
VSS191
VSS190
VSS196
VSS198
VSS212
VSS204
VSS183
VSS184
VSS171
VSS211
VSS209
VSS208

VSS87

VSS14
VSS173
VSS138
VSS260
VSS256
VSS284
VSS290

VSS113

VSS15
VSS187
VSS136
VSS251
VSS255
VSS283
VSS289

VSS215
VSS231
VSS232
VSS217
VSS218
VSS216
VSS202

VSS203
VSS229

VSS230

ROMCSb

GPIO17

N5
M1
M3
L3
L2
M2
M5
P6
N3
K2
K3
J2
P5
P3
P2

E6
B2
J5
G3
W6
W2
AC6
AD2

F6
B3
K6
G1
V5
W1
AC5
AD1

R2
T5
T6
R5
R6
R3
N1

N2
T2

T3

E3
AA3

AF5
C6

C7
C8

2

MA

B0

MA

B1

MA

B2

MA

B3

MA

B4

MA

B5

MA

B6

MA

B7

MA

B8

MA

B9

MAB

10

MAB

11

MAB

12

MAB

13

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

Default Pul

MEMVMO
MEMVMO

R81

1 2

DE0
DE1

RASB#
CASB#
WEB#
CSB0#
CSB1#
CKEB
CLKB0

CLKB0#
CLKB1

CLKB1#

OTEMP12

MAB[13..0]

16
16

16

16
16

16

16

16

16

16

240Ohm

DQMB#[7..0]

QSB[7..0]

l High

GND

1

16

16

16

FOR M2

+3V

S

12

R106
10KOhm

/

Q13

32

3

2N7002

D

/

1

1

G

S

2

GND

4

C6 C7

0

1

1

0

1 1

VDD_18(1.8V/5mA)

R97

0Ohm

/

1 2

VDDR1

2.5V

1.8V

2.8V

+1.8VS

R94

4.7KOhm

/
1 2

R92

4.7KOhm

/
1 2

GND

PM_THERM#5,18

4.7KOhm

/
1 2

12

GND

0420

R95

R93

4.7KOhm

/

M26 : Memory Interface Signals(all control, address, data,
mask and strobe) : Signaling level restricted to 1.8V

A A

5

only

M24
M26

M24CSP
M26CSP

DIMA_0/

P
P

NC

connect to Vss

4

DIMA_1

DIMB_0/

DIMB_1

NC

connect to Vss

===>>

3

VDD

1.8V

2.5V

M26

R1

MEMVMODE_0

GND

+1.8VS

GPIO17

MEMVMODE_1

+1.8VS

GND

NC

2

Size

Project Name

Custom

Tuesday, August 02, 2005

Date:

A3V

Title :

Engineer:

Sheet

1

ATI_

M26P_Memory(2)

Miller Liu

13 55

of

Rev

1.1

5

MEM_VDD

12

12

C190

0.1UF

D D

MEM_VDD

+ATI_VCORE

C C

+1.8VS

120Ohm/100Mhz

B B

C92

10uF/10V

C81

10uF/10V

A A

C643

10uF/10V

GND GND

12

C189

C177

1000PF

0.1UF

3MM_OPEN_5MIL

JP33

1 2

1 2

R559,R566 must to near
ATI CHIP

L18

21

12

C127

10uF/10V

+A2VDD

12

12

GND

+AVDD

12

12

C557

1UF/10V

GND

+MPVDD

12

12

C634

1UF/10V

12

C73

0.1UF

GND

120Ohm/100Mhz

(MAX: 1.6A)

+1.2VS_PCIE

LVDDR

L13

12

C88
1000PF

M0506

R495

0Ohm

12

C165
1000PF

LVDDR_18(1.8V/60mA)

12

12

C116

C128

100PF

1UF/10V

GND

C100
1UF/10V

+2.5VS

0408

12

C91

10uF/10V

GND

+PVDD

12

C54

10uF/10V

5

12

C552

1UF/10V

12

C84

0.1UF

21

+1.2VS_PCIE

12

12

C154
10uF/10V

GND

L14

21

120Ohm/100Mhz

+1.8VS

+A2VDDQ

12

C85

1UF/10V

12

C82
1000PF

VDD_MEM_CLK

12

12

C95

C89

0.1UF

22UF/6.3V

L107
80Ohm/100Mhz

M0506

12

C584

10uF/10V

12

C131

1UF/10V

+A2VDD

L11

120Ohm/100Mhz

10uF/10V

12

C168

0.1UF

GND

12

C137

1UF/10V

21

C77

12

C119

0.1UF

12

C111
1000PF

PCIE_PVDD_12

21

12

C114

0.1UF

GND

12

100PF

12

GND

C149

12

C545

22UF/6.3V

v1.1

2A

+PNL_IO

+PNL_PLL

+VDDI

12

C78
1UF/10V

4

12

C646

22UF/6.3V

VDD_MEM_CLK

+A2VDD
+A2VDDQ
+AVDD

+PVDD
+MPVDD

4

VDDC37
VDDC40
VDDC41
VDDC38
VDDC39

VDD15_4
VDD15_5
VDD15_7
VDD15_8
VDD15_2
VDD15_1
VDD15_3
VDD15_6

VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_4
VDDR3_1
VDDR3_3
VDDR3_2

VDDR4_5
VDDR4_3
VDDR4_1
VDDR4_2
VDDR4_4

NC1
NC2
NC3
NC4
NC5
NC6
NC7

AVSSQ

LVSSR1
LVSSR4
LVSSR2
LVSSR3

LPVSS

TPVSS

TXVSSR3
TXVSSR1
TXVSSR2

VSSRH0
VSSRH1

A2VSSN2
A2VSSN1

A2VSSQ

AVSSN

VSS1DI
VSS2DI

PVSS

MPVSS

1 2

AC13
AD13
AD15
AC15
AC17

P8
Y8
AC11
AC20
H20
H11
M23
Y23

AD7
AD19
AD21
AC22
AC8
AC21
AC19

AG7
AD9
AC9
AC10
AD10

AG26
AK29
AJ30
AG28
AG27

N24
N23
P23

U23
T23
V23
W23

D9
D13
D19
D25
E4
T4
AB4

AD22

AF18
AH17
AG15
AG18

AH18AH19

AH14
AG13
AG14

F19
M6

AH20
AG21

AF22
AH22

AE24

AJ28

+3

VS

U47D

T7

VDDR1_45

R4

VDDR1_44

R1

VDDR1_43

N8

VDDR1_42

N7

VDDR1_41

M4

VDDR1_39

L8

VDDR1_37

K23

VDDR1_35

K24

VDDR1_36

N4

VDDR1_40

J8

VDDR1_34

J7

VDDR1_33

J4

VDDR1_32

J1

VDDR1_31

H10

VDDR1_25

H13

VDDR1_26

H15

VDDR1_27

H17

VDDR1_28

T8

VDDR1_46

V4

VDDR1_47

V7

VDDR1_48

V8

VDDR1_49

AA1

VDDR1_50

AA4

VDDR1_51

AA7

VDDR1_52

AA8

VDDR1_53

A3

VDDR1_1

A9

VDDR1_2

A15

VDDR1_3

A21

VDDR1_4

A28

VDDR1_5

B1

VDDR1_6

B30

VDDR1_7

D26

VDDR1_15

D23

VDDR1_14

D20

VDDR1_13

D17

VDDR1_12

D14

VDDR1_11

D11

VDDR1_10

D8

VDDR1_9

D5

VDDR1_8

E27

VDDR1_16

F4

VDDR1_17

G7

VDDR1_18

G10

VDDR1_19

G13

VDDR1_20

G15

VDDR1_21

G19

VDDR1_22

G22

VDDR1_23

G27

VDDR1_24

H22

VDDR1_30

H19

VDDR1_29

AD4

VDDR1_54

L23

VDDR1_38

AE16

LVDDR_25_1

AE17

LVDDR_25_2

AF15

LVDDR_18_1

AE15

LVDDR_18_2

LPVDD

AH13 AH12

TPVDD

AF13

TXVDDR1

AF14

TXVDDR2

F18

VDDRH0

N6

VDDRH1

AF21

A2VDD2

AE20

A2VDD1

AF23

A2VDDQ

AH23

AVDD

AE23

VDD1DI

AE22 AE21

VDD2DI

AK28

PVDD

A7 A6

MPVDD

216CPIAKA11F

Part 4 of 6

PCIE_VDDR_12_1
PCIE_VDDR_12_5
PCIE_VDDR_12_4
PCIE_VDDR_12_3
PCIE_VDDR_12_2

PCIE_PVDD_12_2
PCIE_PVDD_12_1
PCIE_PVDD_12_3

PCIE_PVDD_18_2
PCIE_PVDD_18_1
PCIE_PVDD_18_3
PCIE_PVDD_18_4

I/O

POWER

D16

MMSZ46

/

GND

3

81T1

PCIE_PVDD_12

TPC28t
TPC28t
TPC28t
TPC28t
TPC28t
TPC28t
TPC28t

3

2.4V

12

12

C14622UF/6.3V

C14822UF/6.3V

MMSZ46

12

C197

PCIE_PVDD_18

T289

1

T290

1

T291

1

T292

1

T293

1

T294

1

T295

1

DIODE SUPPLIES POW
TO VDDC RA
WHILE VDDC
STABALIZES DURING POWER

12

12

C12222UF/6.3V

C1360.1UF

c0402

/

12

D11

81T1

12

12

C202

C170

22UF/6.3V

2.2UF/6.3V

0408

PCIE_PVDD Decoupling Capacitor
Place near Ball as close as possible

L10

+1.5VS

120Ohm/100Mhz

+1.8VS

12

C1430.1UF

0.1UF

c0402

12

C923
10uF/10V

IL

REGULATOR

12

C1150.1UF

c0402

VDD15

12

C97

0.1UF

c0402

GND

12

21

c0402

12

C164

C925

0.1UF

ER

12

+3

0.1UF

12

C162

L108

ON

12

C1030.1UF

C1040.1UF

c0402

c0402

VS

L25

21

120Ohm/100Mhz

c0402

12

C926

1000PF

GND

22UF/6.3V

L12

21

L9

L96
L6
L20

12

C1410.1UF

c0402

+3V

S

M0506

+1.2VS_PCIE

12

C922
10uF/10V

12

C134

0.1UF

21

120Ohm/100Mhz

120Ohm/100Mhz

21

80Ohm/100Mhz

21

120Ohm/100Mhz

21

120Ohm/100Mhz

21

120Ohm/100Mhz

1.2V

+ATI_VCORE

12

12

C1080.1UF

C1500.1UF

c0402

GND

12

C13
22UF/6.3V

VDD15

12

C87

0.1UF

GND

+A2VDDQ

+AVDD

PCIE_PVDD_18

+MPVDD

+PVDD

+PNL_PLL

2

U47F

P17

VDDC16

P18

VDDC17

P19

VDDC18

U12

VDDC19

U13

VDDC20

U14

VDDC21

U17

VDDC22

U18

VDDC23

U19

VDDC24

V19

VDDC30

V18

VDDC29

12

12

C1450.1UF

C1420.1UF

c0402

c0402

c0402

12

12

C117

C139

0.1UF

0.1UF

GND

12

12

C57

C64

1000PF

0.1UF

GND

12

C546
22UF/6.3V

GND

v1.1

v1.1

2

12

C1210.1UF

c0402

12

C106

12

12

0.1UF

C90

0.1UF

C1120.1UF

12

12

C1320.1UF

c0402

c0402

L19

120Ohm/100Mhz

12

C120

0.1UF

GND

Size

Custom

Date:

V17

C9622UF/6.3V

V14
V13
V12
N18
N17

N14
W17
W18
W12
W13
W14

N13

N19
M19

21

M18
M12

N12
M13
M14

P12

P13

P14
M17
W19

216CPIAKA11F

U47E

A2

VSS1

A10

VSS3

A16

VSS6

A22

VSS9

A29

VSS13

C1

VSS39

C3

VSS41

C28

VSS63

C30

VSS65

D27

VSS80

D24

VSS79

D21

VSS77

D18

VSS76

D15

VSS74

D12

VSS73

D10

VSS72

D6

VSS70

D4

VSS69

F27

VSS132

G9

VSS142

G12

VSS143

G16

VSS144

G18

VSS145

G21

VSS146

G24

VSS147

H27

VSS168

H23

VSS165

H21

VSS164

H18

VSS163

H16

VSS162

H14

VSS161

H12

VSS160

H9

VSS159

H8

VSS158

H4

VSS155

J23

VSS175

J24

VSS176

AD12

VSS294

AG5

VSS302

AG9

VSS303

AG11

VSS304

R7

VSS219

P4

VSS210

M7

VSS199

M8

VSS200

L4

VSS192

K1

VSS182

K7

VSS188

K8

VSS189

R8

VSS220

T1

VSS228

216CPIAKA11F

Project Name

A3V

Tuesday, August 02, 2005

VDDC28
VDDC27
VDDC26
VDDC25
VDDC11
VDDC10
VDDC9
VDDC34
VDDC35
VDDC31
VDDC32
VDDC33
VDDC8
VDDC12
VDDC6
VDDC5
VDDC1
VDDC7
VDDC2
VDDC3
VDDC13
VDDC14
VDDC15
VDDC4
VDDC36

1

Part 6 of 6

CENTER ARRAY

Part 5 of 6

CORE GND

Title :

Engineer:

Sheet

1

VSS201
VSS207
VSS206
VSS213
VSS214
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS233
VSS234
VSS235
VSS263
VSS254
VSS253
VSS246
VSS247
VSS239
VSS238
VSS237
VSS236

VDDCI4
VDDCI1
VDDCI2
VDDCI3

VSS242
VSS245
VSS261
VSS262
VSS266
VSS279
VSS278
VSS273
VSS282
VSS285
VSS286
VSS295
VSS287
VSS288
VSS296
VSS306
VSS305

PCIE_VSS1
PCIE_VSS2
PCIE_VSS6
PCIE_VSS5
PCIE_VSS3
PCIE_VSS4
PCIE_VSS7
PCIE_VSS9

PCIE_VSS8
PCIE_VSS12
PCIE_VSS10
PCIE_VSS11
PCIE_VSS13
PCIE_VSS14
PCIE_VSS15
PCIE_VSS17
PCIE_VSS16
PCIE_VSS18
PCIE_VSS19
PCIE_VSS21
PCIE_VSS22
PCIE_VSS20
PCIE_VSS23
PCIE_VSS26
PCIE_VSS24
PCIE_VSS25
PCIE_VSS30
PCIE_VSS31
PCIE_VSS27
PCIE_VSS28
PCIE_VSS29
PCIE_VSS32
PCIE_VSS33
PCIE_VSS34
PCIE_VSS37
PCIE_VSS35
PCIE_VSS36
PCIE_VSS38
PCIE_VSS39
PCIE_VSS40

ATI_M2

Miller Liu

14 55

M16
N16
N15
P15
P16
R18
R17
R16
R15
R14
R13
R12
T13
T14
T15
W15
V16
V15
U15
U16
T19
T18
T17
T16

GND

W16
M15
R19
T12

U4
U8
W7
W8
Y4
AB8
AB7
AB1
AC4
AC12
AC14
AD16
AC16
AC18
AD18
AK2
AJ1

K28
L28
M27
M26
M24
M25
M28
P28
N28
R25
R23
R24
R26
R27
R28
T28
T24
U28
V24
V26
V27
V25
V28
Y28
W24
W28
AA26
AA27
AA23
AA24
AA25
AA28
AB28
AC28
AD28
AD26
AD27
AE28
AF28
AH29

GND

6P_POWER(3)

Rev

1.1

of

5

MAA[13..0]

13

D D

CKEA

13

CSA0#

13

RASA#

13

CASA#

13

WEA#

13

QSA[7..0]

13

C C

B B

A A

13

MEM_VDD

GND

DQMA#[7..0]

R74

1KOhm

1 2

R73

1KOhm

1 2

12

CSA1#

13

C135

5

0.1UF

MAA

12

MAA

13

MAA

11

MAA

10

MA

A9

MA

A8

MA

A7

MA

A6

MA

A5

MA

A4

MA

A3

MA

A2

MA

A1

MA

A0

R_CLKA0
R_CLKA0#

QSA0
QSA2
QSA1
QSA3

DQMA#0
DQMA#2
DQMA#1
DQMA#3

MEM_VREF_U5

GND

GND

U5

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

HY5DU283222AF_33

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1

VSSQ2

VSSQ3

VSSQ4

VSSQ5

VSSQ6

VSSQ7

VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

B8
C9
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
K12
K13
E2
D2
D3
C2
B5
B6
C6
B7

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

GND

MDA5

MDA7
MDA4
MDA6
MDA1
MDA2
MDA0
MDA3

MDA22

MDA21
MDA20
MDA23
MDA16
MDA17
MDA19
MDA18

MDA10

MDA9
MDA11
MDA12
MDA8
MDA15
MDA13
MDA14

MDA31

MDA30
MDA29
MDA26
MDA28
MDA27
MDA24
MDA25

4

MEM_VDD

MEM_VDD

MEM_VDD

4

12

22UF/6.3V

MEM_VDD

MDA[31..0]

C185

12

C129

22UF/6.3V

13

12

C610

0.01uF/25V

12

C597

0.1UF

12

C598

0.1uF/10V

12

C147

1UF/16V

MEM_VDD

12

C603

0.1UF

12

C602

0.01uF/25V

GND

1 2

1 2

GND

R90

1KOhm

R91
1KOhm

12

C151

1UF/16V

12

C614
1000PF

3

MEM_VREF_U9

12

C204

0.1UF

12

C609

0.1UF

GND

3

MAA
MAA

MAA
MAA
MA

A9

MA

A8

MA

A7

MA

A6

MA

A5

MA

A4

MA

A3

MA

A2

MA

A1

MA

A0

R_CLKA1
R_CLKA1#
CKEA
CSA0#
RASA#
CASA#
WEA#

QSA4
QSA6
QSA5
QSA7

DQMA#4
DQMA#6
DQMA#5
DQMA#7

GND

CSA1#

2

MDA[63..32]

13

13

13

13

12

C236

22UF/6.3V

12

C230

22UF/6.3V

CLKA0

CLKA0#

CLKA1

CLKA1#

13

12

C648

0.01uF/25V

12

C666

0.1UF

R483

R486

R489

R493

12

C647

0.1uF/10V

12

C212

1UF/16V

Size

Project Name

Custom

Tuesday, August 02, 2005

Date:

12

10Ohm

12

10Ohm

12

10Ohm

12

10Ohm

12

C654

0.1UF

12

C655

0.01uF/25V

R_CLKA0

12

R500
56Ohm

12

R499
56Ohm

R_CLKA0#

R_CLKA1

12

R519
56Ohm

12

R518
56Ohm

R_CLKA1#

GND

A3V

1 2

1 2

12

C213

1UF/16V

12

C664

1000PF

12
13

11
10

GND

U9

N4

BA0

M5

BA1

M7

A11

L6

A10

M8

A9

N11

A8/AP

N10

A7

N9

A6

M9

A5

N8

A4

N7

A3

M6

A2

N6

A1

N5

A0

M11

CLK

M12

CLK#

N12

CKE

N2

CS#

M2

RAS#

L2

CAS#

L3

WE#

B13

DQS3

H2

DQS2

H13

DQS1

B2

DQS0

B12

DM3

H3

DM2

H12

DM1

B3

DM0

N13

VREF

M13

MCL

L9

RFU1

M10

RFU2

C4

NC1

C11

NC2

H4

NC3

H11

NC4

L12

NC5

L13

NC6

M3

NC7

M4

NC8

N3

NC9

F6

VSS TH1

F7

VSS TH2

F8

VSS TH3

F9

VSS TH4

G6

VSS TH5

G7

VSS TH6

G8

VSS TH7

G9

VSS TH8

H6

VSS TH9

H7

VSS TH10

H8

VSS TH11

H9

VSS TH12

J6

VSS TH13

J7

VSS TH14

J8

VSS TH15

J9

VSS TH16

HY5DU283222AF_33

+1.8VS

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

JP4

1 2

1 2

1MM_OPEN_5MIL

/

JP28

1 2

1 2

1MM_OPEN_5MIL

/

JP3

1 2

1 2

1MM_OPEN_5MIL

/

B8
C9
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
K12
K13
E2
D2
D3
C2
B5
B6
C6
B7

C3
C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

MEM_VDD

0408

MDA36

MDA38
MDA37
MDA39
MDA34
MDA32
MDA33
MDA35

MDA52

MDA53
MDA54
MDA55
MDA48
MDA50
MDA49
MDA51

MDA44

MDA45
MDA46
MDA43
MDA42
MDA47
MDA41
MDA40

MDA62

MDA58
MDA63
MDA61
MDA60
MDA57
MDA59
MDA56

MEM_VDD

MEM_VDD

MEM_VDD

MEM_VDD

GND

2

C583
470P

C645
470P

12

C663

0.1UF

GND

Title :

Engineer:

1

GND

1

GND

ATI_M

Sheet

26P_EXTMEM_A(4)

Miller Liu

15 55

of

Rev

1.1

5

MAB[13..0]

13

D D

R_CLKB0
R_CLKB0#

CKEB

13

CSB0#

13

RASB#

13

CASB#

13

WEB#

13

QSB[7..0]

13

DQMB#[7..0]

C C

B B

A A

13

MEM_VDD

GND

1 2

1 2

R148

1KOhm

R149

1KOhm

12

C261

CSB1#

13

MEM_VREF_U11

0.1UF

GND

QSB0
QSB3

QSB1

QSB2

DQMB#0
DQMB#3

DQMB#1

DQMB#2

MAB
MAB

MAB
MAB
MA
MA
MA
MA
MA
MA
MA
MA
MA
MA

B9
B8
B7
B6
B5
B4
B3
B2
B1
B0

12

N4

13

M5

11

M7

10

L6

M8
N11
N10

N9

M9

N8

N7

M6

N6

N5

M11
M12
N12

N2

M2

L2
L3

B13

H2
H13

B2

B12

H3
H12

B3

N13
M13

L9

M10

C4
C11

H4
H11

L12
L13

M3

M4

N3

F6
F7
F8

F9
G6
G7
G8
G9
H6
H7
H8
H9

J6

J7

J8

J9

U11

BA0
BA1

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

CLK
CLK#
CKE
CS#
RAS#
CAS#
WE#

DQS3
DQS2
DQS1
DQS0

DM3
DM2
DM1
DM0

VREF
MCL
RFU1
RFU2
NC1

NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

VSS TH1
VSS TH2
VSS TH3
VSS TH4
VSS TH5
VSS TH6
VSS TH7
VSS TH8
VSS TH9
VSS TH10
VSS TH11
VSS TH12
VSS TH13
VSS TH14
VSS TH15
VSS TH16

VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

HY5DU283222AF_33

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8

VSSQ9
VSSQ10
VSSQ11
VSSQ12

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

4

MDB[31..0]

13

MDB4

B8

MDB5

C9

MDB3

B9

MDB7

B10

MDB6

C13

MDB2

D12

MDB0

D13

MDB1

E13

MDB24

K3

MDB26

K2

MDB31

J2

MDB30

J3

MDB28

G2

MDB29

G3

MDB27

F2

MDB25

F3

MDB14

F12

MDB15

F13

MDB13

G12

MDB12

G13

MDB11

J12

MDB10

J13

MDB9

K12

MDB8

K13

MDB22

E2

MDB23

D2

MDB21

D3

MDB20

C2

MDB18

B5

MDB19

B6

MDB17

C6

MDB16

B7
C3

C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

MEM_VDD

MEM_VDD

MEM_VDD

12

22UF/6.3V

MEM_VDD

C223

12

C264

22UF/6.3V

12

C685

0.01uF/25V

12

C674

0.1UF

12

C679

0.1uF/10V

12

C248

1UF/16V

1KOhm

1KOhm

12

C675

0.1UF

12

C684

0.01uF/25V

MEM_VDD

R144

R145

GND

GND

12

12

12

C215

1UF/16V

12

C682

1000PF

3

MEM_VREF_U10

12

C258

0.1uF/10V

12

GND

C673

0.1UF

R_CLKB1
R_CLKB1#
CKEB
CSB0#
RASB#
CASB#
WEB#

CSB1#

QSB4
QSB7

QSB5
QSB6

DQMB#4
DQMB#7

DQMB#5
DQMB#6

GND

GND

MAB
MAB

MAB
MAB
MA
MA
MA
MA
MA
MA
MA
MA
MA
MA

12

N4

13

M5

11

M7

10

L6

B9

M8

B8

N11

B7

N10

B6

N9

B5

M9

B4

N8

B3

N7

B2

M6

B1

N6

B0

N5

M11
M12

N12

N2
M2

L2
L3

B13

H2

H13

B2

B12

H3

H12

B3

N13

M13

L9

M10

C4

C11

H4

H11

L12
L13

M3
M4
N3

F6
F7
F8

F9
G6
G7
G8
G9
H6
H7
H8
H9

J6

J7

J8

J9

U10

BA0
BA1

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

CLK
CLK#
CKE
CS#
RAS#
CAS#
WE#

DQS3
DQS2
DQS1
DQS0

DM3
DM2
DM1
DM0

VREF
MCL
RFU1
RFU2
NC1

NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

VSS TH1
VSS TH2
VSS TH3
VSS TH4
VSS TH5
VSS TH6
VSS TH7
VSS TH8
VSS TH9
VSS TH10
VSS TH11
VSS TH12
VSS TH13
VSS TH14
VSS TH15
VSS TH16

VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16

VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20

HY5DU283222AF_33

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9

VSS10

2

MDB[63..32]

13

MDB39

B8

MDB35

C9

MDB37

B9

MDB36

B10

MDB34

C13

MDB33

D12

MDB32

D13

MDB38

E13

MDB63

K3

MDB60

K2

MDB61

J2

MDB62

J3

MDB58

G2

MDB59

G3

MDB56

F2

MDB57

F3

MDB45

F12

MDB44

F13

MDB47

G12

MDB46

G13

MDB42

J12

MDB40

J13

MDB41

K12

MDB43

K13

MDB52

E2

MDB55

D2

MDB54

D3

MDB53

C2

MDB51

B5

MDB50

B6

MDB49

C6

MDB48

B7
C3

MEM_VDD

C5
C7
C8
C10
C12
E3
E12
F4
F11
G4
G11
J4
J11
K4
K11

D7
D8
E4
E11
L4
L7
L8
L11

B4
B11
D4
D5
D6
D9
D10
D11
E6
E9
F5
F10
G5
G10
H5
H10
J5
J10
K5
K10

E5
E7
E8
E10
K6
K7
K8
K9
L5
L10

GNDGNDGND

MEM_VDD

MEM_VDD

12

22UF/6.3V

MEM_VDD

C218

12

C222

22UF/6.3V

12

C676

0.01uF/25V

12

C672

0.1UF

13

13
13

13

Place 10 ohm
close to M26

CLKB0

CLKB0#
CLKB1

CLKB1#

12

C681

0.1uF/10V

12

C256

1UF/16V

R515

R516
R513

R514

12

C683

0.1UF

12

C669

0.01uF/25V

12

1UF/16V

GND

12

1000PF

10Ohm

10Ohm
10Ohm

10Ohm

C257

C680

1

R_CLKB0

12

12

R556
56Ohm

C688
470P

1 2

12

R557
56Ohm

R_CLKB0#

12

R_CLKB1

12

12

R541
56Ohm

1 2

12

R544
56Ohm

R_CLKB1#

12

12

C671

0.1UF

GND

C678
470P

GND

GND

ATI_M

Sheet

26P_EXTMEM_B(5)

Miller Liu

16 55

of

Rev

1.1

Title :

Size

Project Name

Custom

5

4

3

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

1

5

4

M0601

3

2

1

Super I/O

D D

U29

VS

r0402

GND

D33

1N4148W-A2

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

nRTS1
nCTS1
nDTR1
nRI1
nDCD1
IO_PME#
VTR
VSS1
CLOCKI
LAD0
VCC1
LAD1
LAD2
LAD3
LFRAME#
LDRQ#

LPC47N217

+3V

S

R330
10KOhm

r0402

1 2

12

S

12

C388

0.1UF

c0402

CLK_SIO14

34

SER_DTRA#

34

SER_RIA#

34

SER_DCDA#

34

C410
10PF

c0402

/

19,32,33,35

18,27,28,32,36

1 2

GND

PCI_PME#

18,19

LPC_AD0
LPC_AD1

LPC_AD2
LPC_AD3

LPC_FRAME#

LPC_DRQ#0

18,27,28,32,36
18,27,28,32,36

18,27,28,32,36
18,27,28,32,36

7,12,18,19,27,28,38,40

18,25,33,34,40,43,49,52

R337

PLT_

RST#

SUSB#

0Ohm

/

12

+3

+3V

GND

21

C C

SER_RTSA#

34

SER_CTSA#

34

34

+3V

S

SER_DSRA#34SER_TXDA

SER_RXDA

LPT_PD6

LPT_PD7

SLCT_ACK#

SLCT_PE

SLCT_BUSY

LPT_SLCT

SLCT_STB#

SLCT_AFD#

SLCT_ERROR#

64

PE

nALF

TXD1

RXD1

nDSR1

nSTROBE

PCI_RESET#

LPCPD#

CLKRUN#

PCI_CLK

SER_IRQ

171819202122232425262728293031

GND

GND

PD7

VSS4

SLCT

nACK

VCC4

BUSY

nERROR

VSS2

GP40

GP41

GP42

VCC2

GP43

GP44

GP45

12

C409

0.1UF

c0402

GND

C402
10PF

c0402

1 2

/

GND

LPT_PD5

LPT_PD4

495051525354555657585960616263

PD4

PD5

PD6

nSLCTIN

IRMODE/IRRX3

GP14/IRQIN2
GP13/IRQIN1

GP12/IO_SMI#

GP11/SYSOPT

GP46

GP47

GP10

32

INT_SERIRQ
CLK_SIOPCI

GND

PD3
PD2
PD1

VCC3

PD0

VSS3
nINIT

GP23

IRTX2
IRRX2

+3V

GND

LPT_PD3

48

LPT_PD2

47

LPT_PD1

46
45

LPT_PD0

44
43

SLCT_SLIN#

42

SLCT_INIT#

41
40
39
38
37
36
35

R301

34

R308

33

+3

VS

18,19,27,32,35

21

+3V

S

12

C399

0.1UF

c0402

SIR_T
SIR_RX

X

+3V

+3V

S

12

12

C398

0.1UF

c0402

GND

GND

GND

0Ohm

r0402

12

1 2

2.7KOhm

GND

Pin 33
pull down -> I/O Address 02E Hex

S

C395
10uF/10V

c0805

+3

VS

S

12

GND

SIOSMI#

C411
10uF/10V

c0805

+3V

S

+3V

S

R302
10KOhm

r0402

1

1 2

1

G

3

2

32

D

S

Q38

2N7002

Keep From Leakage Current

SIO_SMI#

18,19

+3V

+3

VS

SIR

S

RN28A
RN28B
RN28C
RN28D
RN27A
RN27B
RN27C
RN27D
RN8A
RN8B
RN8C
RN8D

R593

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

12

C749

0.1UF

GNDGND

10Ohm

12

C747

4.7U

GND

12

C741

0.1UF

+VCC_IRED
SIR_T

X

SIR_RX
+3VS_LED_SIR

GND

U53

1

IRED_Anode

2

IRED_Cathode

3

Txd

4

Rxd

5

NC

6

VCC1/SD

7

SC

8

GND

TFDU4100_TR3

+5V

D79

B B

A A

1 2

SS0540

5

RN37A
RN37B
RN37C
RN37D

RN39A
RN39B
RN39C
RN39D

RN41A
RN41B
RN41C
RN41D

RN43A
RN43B
RN43C
RN43D

R748

2.7KOhm

1 2

2.7KOhm

3 4

2.7KOhm

5 6

2.7KOhm

7 8

2.7KOhm

1 2

2.7KOhm

3 4

2.7KOhm

5 6

2.7KOhm

7 8

2.7KOhm

1 2

2.7KOhm

3 4

2.7KOhm

5 6

2.7KOhm

7 8

2.7KOhm

1 2

2.7KOhm

3 4

2.7KOhm

5 6

2.7KOhm

7 8

2.7KOhm

12

R0603

LPT_PD1
SLCT_INIT#
LPT_PD2
SLCT_SLIN#

LPT_PD7
SLCT_ACK#
SLCT_BUSY
SLCT_PE

LPT_PD3
LPT_PD4
LPT_PD5
LPT_PD6

SLCT_

STB#
SLCT_AFD#
LPT_PD0
SLCT_ERROR#

LPT_

SLCT

RN38A

1 2

R749

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

33Ohm

3 4

33Ohm

5 6

33Ohm

7 8

33Ohm

1 2

R0603

RN38B
RN38C
RN38D

RN40A
RN40B
RN40C
RN40D

RN42A
RN42B
RN42C
RN42D

RN44A
RN44B
RN44C
RN44D

4

LAYOUT CAN

LPT_L_PD1
SLCT_L_INIT#
LPT_L_PD2
SLCT_L_SLIN#

LPT_L_PD7
SLCT_L_ACK#
SLCT_L_BUSY
SLCT_L_PE

LPT_L_PD3
LPT_L_PD4
LPT_L_PD5
LPT_L_PD6

SLCT_L_
SLCT_L_AFD#
LPT_L_PD0
SLCT_L_ERROR#

LPT_L_

33Ohm

SLCT

STB#

SWAP

LPT_L_PD1

28
SLCT_L_INIT#
LPT_L_PD2
SLCT_L_SLIN#

LPT_L_PD7
SLCT_L_ACK#
SLCT_L_BUSY
SLCT_L_PE

LPT_L_PD3
LPT_L_PD4
LPT_L_PD5
LPT_L_PD6

SLCT_L_
SLCT_L_AFD#
LPT_L_PD0
SLCT_L_ERROR#

LPT_L_

3

SLCT

STB#

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

28

SIO LPC47

Title :

Size

Project Name

Custom

2

Date:

A3V

Tuesday, August 02, 2005

Engineer:

Sheet

1

N217

Miller Liu

17 55

of

Rev

1.1