Apple iPad Mini 2 (Retina) Schematics

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

SCH AND BOARD PART NUMBERS

QTY

PART#

D

820-4124

C

B

DESCRIPTION

1

SCH,MLB-C1,X200

1

PCBF,MLB-C1,X200

PDF CSA

TABLE_TABLEOFCONTENTS_HEAD

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CONTENTS
TABLE OF CONTENTS
BLOCK DIAGRAM: SYSTEM
BOM TABLES
SOC: MAIN
SOC: I/OS
SOC: NAND
SOC: DP,MIPI
SOC: SRAM, IO PWRS
SOC: VDD, SRAM, CPU, GPU PWRS
SOC: MISC & ALIASES
IO: TRISTAR
NAND STORAGE
TOUCH: SUPPORT CKT & CONN
AUDIO: HP FLEX CONN
AUDIO: L81 CODEC
AUDIO: CS35L19A AMPS
BUTTON: CONN
VIDEO: EDP SUPPORT & CONN
SENSOR: OSCAR
CAMERA: FF-ALS CONN & FILTERS

7

REFERENCE DESIGNATOR(S)

SCH1051-0886

PCB1

BOM OPTION

3456

REV ECN

MLB-C1

X200

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

SYNC MASTER

N/A N/A

J85_MLB_B

J72_MLB_C

N/A

N/A

N/A

MLB

N/A

N/A

N/A

N/A N/A

MLB

N/A

N/A

KAVITHA

KAVITHA

N/A N/A

J85 MLB_C

J72_MLB_C

J85 MLB_C

DATE

04/02/2013

11/26/2012

04/18/2011

05/05/2011

04/18/2011

05/04/2012

04/18/2011

04/18/2011

04/11/2011

05/04/2012

06/21/2010

03/31/2011

01/18/2012

01/18/2012

12/05/2012

11/26/2012

12/03/2012

LAST_MODIFIED=Tue Oct 29 15:52:27 2013

TABLE_TABLEOFCONTENTS_HEAD

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TABLE_TABLEOFCONTENTS_ITEM

CSAPDF

CONTENTS

27

SENSOR: ACCEL, COMPASS, GYRO

28

SENSOR: PROX

29

CAMERA: REAR CONN & FILTERS

30

CELL:AP INTERFACE & DEBUG CONNECTORS

32

CELL: BASEBAND PMU (1 0F 2)

33

CELL: BASEBAND PMU (2 OF 2)

34

CELL: BASEBAND (1 OF 2)

35

CELL: BASEBAND (2 OF 2)

36

CELL: RF TRANSCEIVER (1 0F 2)

37

CELL: RF TRANSCEIVER (2 OF 2)

38

CELL: RX MATCHING

39

CELL: RF TRANSCEIVER (3 OF 4)

40

CELL: PENTABAND PA

41

CELL: BAND 2/3 PAD

42

CELL: BAND 7/20 PAD

43

CELL: BAND 5/8 PAD

44

CELL: 2G PA

45

CELL: PA DCDC CONVERTER

46

CELL: ASM AND HB LTE FRONT-END

47

CELL: RX DIVERSITY

48

CELL: GPS

49

CELL: ANTENNA FEEDS

57

IO: FILTERS & HOTBAR CONN

58

WIFI/BT: MODULE

75

POWER: BATTERY CONNECTOR

81

PMU: ANYA PAGE 1

82

PMU: ANYA PAGE 2

83

PMU: ANYA PAGE 3

84

PMU: ANYA PAGE 4

85

POWER: PP1V8_SW

90

SEP: EEPROM & SOC DEBUG

93

TEST: TP/HOLES/FIDUCIALS

94

TEST: EE TP/PP

121

POWER: ALIASES

SYNC MASTER

N/A N/A
J85 MLB_C
N/A N/A

RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87

RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87

RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87

RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87

RADIO_MLB_87
RADIO_MLB_87
RADIO_MLB_87

RADIO_MLB_87
N/A
WIFI_DEV
N/A N/A

J72_MLB_C
J85 MLB_C
J72_MLB_C
J72_MLB_C

J85 MLB_C
J72_MLB_C
J85 MLB_C

J72_MLB_C
J72_MLB_C

DATE

12/05/12

10/29/2013
10/29/2013
10/29/2013
10/29/2013

10/29/2013
10/29/2013
10/29/2013

10/29/2013
10/29/2013
10/29/2013
10/29/2013

10/29/2013
10/29/2013
10/29/2013
10/29/2013

10/29/2013
10/29/2013
10/29/2013

10/29/2013
04/18/2011
05/20/2013

11/26/2012
12/03/2012
11/26/2012
11/26/2012

11/26/2012
11/26/2012
12/03/12

11/26/2012
11/26/2012

A

0002535199

DESCRIPTION OF REVISION

PRODUCTION RELEASED

12

CK
APPD

DATE

2014-01-13

D

C

B

A

DRAWING

8 7 6 5 4 2 1

3

DRAWING TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SCH,MLB-C1,X200

Apple Inc.

R

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

1 OF 121

SHEET

1 OF 54

SIZE

A

D

8 7 6 5 4 3

WWW.AliSaler.Com

12

ISP1_I2C

GRAPE

SPI1

MIPI1C

ISP0_I2C

CUMULUS

CUMULUS

D

MIPI0C

HSIC2
UART1

FRONT CAMERA

REAR CAMERA

D

MIMO

WIFI/BT ANT

WIFI/BT

UART2

I2S3

BT_I2S

CSA 58

WIFI/BT ANT

NOT ON

ALCATRAZ

DISPLAY/

TOUCH PANEL

EDP

C

BACKLIGHT

HSIC1

I2S4

UART3

CELLULAR/

HSIC1

JTAG
USART

USB

CSA 31-46

GPS

WIFI-ONLY CONFIG

PRIMARY CELLULAR ANT
DIVERSITY CELLULAR ANT

GPS ANT

C

SIM CARD

UART5

BUTTON FLEX

HOME BUTTON

B

PMU

ANYA

CSA 81-84

HALL EFF

1-3

BATTERY

CSA 75

OSCAR

CSA 24

DWI
I2C0

UART4
I2C1

USB2.0

UART0
UART6

I2C0

I2C2

TRISTAR

CSA 13

B

I2S1

COMPASS

CSA 17

SPI BUS

ACCELEROMETER

CSA 27CSA 27CSA 27

GYRO

I2C3

FMI0

FMI1

SPI2

I2S0
I2S2

SPI
ASP

XSP

AMP

CSA 20

MBUS

AMP

CSA 20

RIGHT

SPEAKER

LEFT
SPEAKER

L81

A

PROX SENSOR

ALS

CSA 28

AUDIO
CODEC

NAND FLASH

CSA 14

6 3

HP

MIC1 MIC2

CSA 19

SYNC_MASTER=J85_MLB_B

PAGE TITLE

BLOCK DIAGRAM: SYSTEM

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/02/2013

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

2 OF 121

SHEET

2 OF 54

124578

SIZE

A

D

8 7 6 5 4 3

12

Page Notes

Power aliases required by this page:
(NONE)

Signal aliases required by this page:
(NONE)

SOC

PART#

339S0207

PART NUMBER

DESCRIPTION

QTY

H6P + 1GB ELPIDA

1

ALTERNATE FOR
PART NUMBER

339S0207339S0208

BOM OPTION

REFERENCE DESIGNATOR(S)

U0652

REF DES

COMMENTS:

HYNIX DDR

U0652

CRITICAL BOM OPTION

CRITICAL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

BOM options provided by this page:

D

C

BOM OPTIONS

COMMON
ALTERNATE

16GB_PROD
32GB_PROD
64GB_PROD
128GB_PROD

DEVELOPMENT_JTAG_TAP
JTAG_DAP
MLB (WDOG TO PMU)

WIFI BOM OPTIONS

ANDGATE_TI
FERRITE_TY
FERRITE_TDK

BOM GROUP

BASIC

BOM OPTIONS

COMMON,ALTERNATE

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

PMU

PART#

343S0656

FLASH CONFIGURATIONS

PART#

335S0922 32GB

335S0924

PART NUMBER

335S0931 335S0922

335S0932

DESCRIPTION

QTY

1

IC,PMU,ANYA,D2089A1,OTPXX,FCCSP342

QTY

DESCRIPTION

1

TOS,19NM,PPN1.5,C,DDP,16GB

TOS,19NM,PPN1.5,C,QDP,32GB

1

1

TOS,19NM,PPN1.5,C,ODP,64GB

1

TOS,19NM,PPN1.5,C,12DP,64GB

1

TOS,19NM,PPN1.5,C,16DP,128GB

ALTERNATE FOR
PART NUMBER

335S0921335S0930

335S0923

BOM OPTION

16GB

32GB

64GB

REFERENCE DESIGNATOR(S)

U8100

REFERENCE DESIGNATOR(S)

U1400

U1400

U1400

U1400

U1400

REF DES

COMMENTS:

U1400

HYNIX 20NM PPN1.5 16GB

HYNIX 20NM PPN1.5 32GB

U1400

HYNIX 20NM PPN1.5 64GB

U1400

CRITICAL BOM OPTION

CRITICAL

BOM OPTION

16GB335S0921

64GB335S0923

96GB335S0929

128GB

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

D

C

U2200

TABLE_5_HEAD

TABLE_5_ITEM

WIFI

PART NUMBER

ALTERNATE FOR
PART NUMBER

339S0213339S0223

BOM OPTION

REF DES

U5800

COMMENTS:

QTY

PART#

353S4272

NOTE: FOLLOWING J72, U2200 USES 353S3672 FOOTPRINT (353S4272 HAS SMALLER PADS DUE TO NEW DFM RULES)

TABLE_ALT_HEAD

TABLE_ALT_ITEM

4.3UF CAP

PART NUMBER

DESCRIPTION

IC,SLG5AP1423V,PWR SW,GREENFET3,4A,TDFN8

1

ALTERNATE FOR
PART NUMBER

138S0657138S0702

BOM OPTION

REFERENCE DESIGNATOR(S)

U2200

REF DES

COMMENTS:

RDAR #13988471

C1009,C1015,...

BOM OPTION

TABLE_ALT_HEAD

TABLE_ALT_ITEM

MECHANICAL PARTS

PART#

B

806-6207

806-7613

DESCRIPTION

QTY

1

FENCE,TALL,MLB,X221

FENCE,RADIO,MLB,C BRD,X221

1

REFERENCE DESIGNATOR(S)

PD_FENCE_MLB

PD_CAN_RADIO

CRITICAL BOM OPTION

CRITICAL

CRITICAL

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

B

GYRO

PART#

338S1192

BARCODE LABEL/EEEE CODES

PART#

825-7639

825-7639

825-7639

825-7639

825-7639

825-7639

825-7639

A

825-7639

825-7639

825-7639

DESCRIPTION

QTY

EEEE FOR 639-5393 (X200C1 GOOD)

1

EEEE FOR 639-5394 (X200C1 BETTER)

1

EEEE FOR 639-5385 (X200C1 BEST)

1

EEEE FOR 639-5386 (X200C1 BEST+)

1

EEEE FOR 639-5387 (X200C1 ULTIMATE)

1

EEEE FOR 639-5388 (X200C1 GOOD IVS)

1

EEEE FOR 639-5389 (X200C1 BETTER IVS)

1

EEEE FOR 639-5390 (X200C1 BEST IVS)

1

EEEE FOR 639-5391 (X200C1 BEST+ IVS)

1

EEEE FOR 639-5392 (X200C1 ULTIMATE IVS)

1

REFERENCE DESIGNATOR(S)

FNJD

FNJ5

FNJ9

FNJH

FNJ6

FNJ8

FNJF

FNJC

FNJ7

FNJG

CRITICAL BOM OPTION

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL

EEEE_X200C_GOOD

EEEE_X200C_BETTER

EEEE_X200C_BEST

EEEE_X200C_BEST+

EEEE_X200C_ULTIMATE

EEEE_X200C_GOOD_IVS

EEEE_X200C_BETTER_IVS

EEEE_X200C_BEST_IVS

EEEE_X200C_BEST+_IVS

EEEE_X200C_ULTIMATE_IVS

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

132S0391 CRITICAL

132S0288

ACCEL

PART#

PART NUMBER

DESCRIPTION

QTY

1

GYRO, ST MICRO

1

GYRO, INVENSENSE

CAP 0.01UF 25V 0201

1

CAP 0.1UF 16V 0201

1

DESCRIPTION

QTY

1

IC,ACCEL,3-AXIS,DIG,BMA282,LGA14

ALTERNATE FOR
PART NUMBER

338S1233 ST MICRO - DISQUAL’ED
338S1114 OLD ACCEL - ST MICRO
338S1191 OLD ACCEL - ST MICRO

BOM OPTION

REFERENCE DESIGNATOR(S)

U2720

U2720

C2726

C2726

REFERENCE DESIGNATOR(S)

U2700

REF DES

COMMENTS:

CRITICAL BOM OPTION

CRITICAL

CRITICAL338S1218

CRITICAL

CRITICAL BOM OPTION

CRITICAL338S1163

TABLE_ALT_HEAD

GYRO_STMICRO

GYRO_INVENSENSE

GYRO_STMICRO

GYRO_INVENSENSE

6 3

TABLE_5_HEAD

TABLE_5_ITEM

338S1158 OLD GYRO - ST MICRO

TABLE_5_ITEM

OLDER INVENSENSE P/N 338S1135
OLD INVENSENSE P/N 338S1200 (3/22/13)

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

SYNC_MASTER=J72_MLB_C

PAGE TITLE

BOM TABLES

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

4 OF 121

SHEET

3 OF 54

124578

SIZE

A

D

8 7 6 5 4 3

WWW.AliSaler.Com

H6P: JTAG, USB, PLL, HSIC, XTAL

12

D

NOTE: CANDIDATE FOR COST-SAVINGS

(REPLACE WITH XW LATER?)

=PP1V8_PLL_SOC

54

R0622

1 2

0.00

=PP1V2_HSIC_SOC

54

C0690

0.22UF

20%

6.3V
X5R

0201

01005

1

2

1

C0651

0.1UF

20%

6.3V

2

X5R-CERM

C0691

0.22UF

6.3V
0201

20%
X5R

C

=PP1V8_SOC

4 5 7

10 18 54

JTAG_SOC_TDI

4

52

JTAG_SOC_TMS

4

11 52

JTAG_SOC_TCK

4

11 52

B

1

R0647

100K

1%
1/32W
MF
01005

2

1

R0646

100K

1%
1/32W
MF
01005

2

10 11 24 48 52

10 18 54

8

1

2

4 5 7

IN

R0645

100K

1%
1/32W
MF
01005

=PP1V8_SOC

RESET_SOC_L

1

R0617

100K

1%
1/32W
MF
01005

2

1

C0618

1000PF

10%

6.3V

2

X5R-CERM
01005

HSIC2_BB_DATA

24 27 53

BI

HSIC2_BB_STB

24 27 53

BI

HSIC1_WLAN_DATA

44 53

BI

HSIC1_WLAN_STB

44 53

BI

1.8V TOLERANT

10 52

10 52

4

52

4

11 52

4

11 52

10

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

JTAG_SOC_SEL

IN

JTAG_SOC_TRST_L

IN

JTAG_SOC_TDI

IN

JTAG_SOC_TMS

IN

JTAG_SOC_TCK

IN

SOC_HOLD_RESET

IN

NC_HSIC0_DATA
NC_HSIC0_STB

HSIC1_BB_DATA
HSIC1_BB_STB

HSIC2_WLAN_DATA
HSIC2_WLAN_STB

NC_JTAG_SOC_TRTCK

TP_JTAG_SOC_TDO

52

1

2

PP1V8_PLL_SOC_F

52

1

C0648

0.01UF

10%

6.3V

2

X5R
0100501005

A26

HSIC0_DATA

B26

HSIC0_STB

A27

HSIC1_DATA

B27

HSIC1_STB

AM33

HSIC2_DATA

AM34

HSIC2_STB

D28

JTAG_SEL

D27

JTAG_TRTCK

E28

JTAG_TRST*

E27

JTAG_TDO

F27

JTAG_TDI

F28

JTAG_TMS

C28

JTAG_TCK

F29

RESET*

E29

CFSB

D29

HOLD_RESET

H16

FUSE1_FSRC

1

C0608

2

G22

G23

AM31

(3X 13MA)

HSIC_VDD120

HSIC_VDD122

HSIC_VDD121

0.01UF

10%

6.3V
X5R
01005

HSIC_VDD120

HSIC_VDD121

HSIC_VDD122

VDDIO18_GRP3

OMIT

U0652

H6P

POP-1GB-DDR

FCMSP

SYM 1 OF 13

VDDIO18_GRP1

F24

U16

AE20

(1MA)

(6X 1MA)

VDD_ANA_PLL

VDD_ANA_PLL_CCC

VDDIO18_GRP4

ANALOGMUXOUT

USB_ANALOGTEST

TST_CLKOUT

FAST_SCAN_CLK

(25MA)

F23

(25MA)

USB_DVDD

USB_VDD330

(5.4MA)

USB_DP
USB_DM

USB_VBUS

USB_ID

USB_REXT

WDOG

TESTMODE

XI0
XO0

F25
E25

E26

B29
A29

D26

D23

E24

E23

AD4

AC3

AD3

AB3

NC_USB_ANALOGTEST

=PP1V0_USB_SOC

1

C0627

0.01UF

10%

6.3V

2

X5R
01005

=PP3V3_USB_SOC

1

C0630

0.1UF

20%

6.3V

2

X5R-CERM
01005

XTAL_SOC_24M_I
XTAL_SOC_24M_O

NC_ANALOGMUXOUT

USB_VBUS_DETECT_R

NC_USB_ID

WDOG_SOC

SOC_TEST_CLKOUT

SOC_FAST_SCAN_CLK

SOC_TESTMODE

54

54

TBD: XTAL PASSIVES WILL CHANGE ON H6P WITH FIRST HW BUILD

1

R0655

OUT

IN

IN

USB_SOC_P
USB_SOC_N

10

TP0600

TP

TP-P55

10

10 52

1.00M

1%

1/32W

MF

01005

11 52

BI

11 52

BI

R0651

68.1K

1%

1/32W

MF

01005

24.000MHZ-30PPM-9.5PF-60OHM

USB_REXT

R0640

1.33K

1 2

1%

1/32W

USB_VBUS_DETECT

1

2

2

R0642

200

1%
1/32W
MF
01005

01005

Y0602

1.60X1.20MM-SM

SOC_24M_O

MF

USBHS ON/OFF TOLERANCE 5V/1.98V

46

IN

NOTE: NEW USB_REXT
VALUE FOR H6 = 200 OHM
OLD (H5) VALUE: 44.2 OHM

42

1 3

C0607

12PF

1 2

5%

16V

CERM

01005

C0613

12PF

1 2

5%

16V

CERM

01005

D

C

B

A

HSIC_VSS120

HSIC_VSS121

HSIC_VSS122

H20

H21

AM32

USB_VSSA0

H23

6 3

SYNC_MASTER=N/A

PAGE TITLE

SOC: MAIN

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/18/2011

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

6 OF 121

SHEET

4 OF 54

124578

SIZE

A

D

8 7 6 5 4 3

SOC I/OS

12

R0720

33.2

1%

1/32W

MF

01005

I2S0_CODEC_ASP_MCK

15 53

OUT

D

I2S1_SPKAMP_MCK

16 53

OUT

1 2

R0721

33.2

1%

1/32W

MF

01005

1 2

I2S0_CODEC_ASP_MCK_R
I2S0_CODEC_ASP_BCLK

15

OUT

I2S0_CODEC_ASP_LRCK

15

OUT

I2S0_CODEC_ASP_DIN

15

IN

I2S0_CODEC_ASP_DOUT

15

OUT

I2S1_SPKAMP_MCK_R
I2S1_SPKAMP_BCLK

16 53

OUT

I2S1_SPKAMP_LRCK

16 53

OUT

I2S1_SPKAMP_DIN

16 53

IN

I2S1_SPKAMP_DOUT

16 53

OUT

NC_GPIO_GYRO_IRQ1

I2S2_CODEC_XSP_BCLK

15

OUT

I2S2_CODEC_XSP_LRCK

15 53

OUT

I2S2_CODEC_XSP_DIN

15

IN

I2S2_CODEC_XSP_DOUT

15 53

OUT

GPIO_SPKAMP_RIGHT_IRQ_L

16

IN

I2S3_SOC2BT_BCLK

10

OUT

I2S3_SOC2BT_LRCK

10

OUT

I2S3_BT2SOC_DATA

10

IN

I2S3_SOC2BT_DATA

10

OUT

BB_JTAG_TCK

24 27 52

OUT

BB_JTAG_TMS

24 27 52

OUT

BB_JTAG_TDI

24 27 52

OUT

BB_JTAG_TDO

24 27 52

IN

BB_JTAG_TRST_L

24 27 52

OUT

AL32
AL31
AJ31
AK31

AL33
AL34
AK33
AJ32
AK34

AJ33
AJ34
AH31
AH34

AG31
AG32
AH33
AF31
AG34

AE31
AF33
AE32
AD31
AE33

C30

E30

I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT

I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT

I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT

I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT

I2S4_MCK
I2S4_BCLK
I2S4_LRCK
I2S4_DIN
I2S4_DOUT

C

AV10
AN12
AT10
AP11

AN6
AP5
AT5
AV5

AU5
AV4
AU4
AR5

AU6
AR6
AP7
AN8

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

10

IN

10

IN

10

IN

13 52

IN

13 52

OUT

13

OUT

13 52

OUT

15 53

IN

15 53

OUT

15 53

OUT

15

OUT

GPIO_BOARD_ID2
GPIO_BOARD_ID1
GPIO_BOARD_ID0

NC_SPI0_SSIN

SPI1_GRAPE_MISO
SPI1_GRAPE_MOSI
SPI1_GRAPE_SCLK
SPI1_GRAPE_CS_L

SPI2_CODEC_MISO
SPI2_CODEC_MOSI
SPI2_CODEC_SCLK
SPI2_CODEC_CS_L

NC_SPI1_NAVAJO_MISO
NC_SPI1_NAVAJO_MOSI
NC_SPI1_NAVAJO_SCLK
NC_GPIO_NAVAJO2SOC_INT

OMIT

U0652

H6P

POP-1GB-DDR

FCMSP

SYM 3 OF 13

CRITICAL

VDDIO18_GRP2

VDDIO18_GRP2

VDDIO18_GRP1

VDDIO18_GRP1

VDDIO18_GRP1

SEP_7816UART0_RST
SEP_7816UART0_SCL
SEP_7816UART0_SDA

VDDIO18_GRP1

SEP_7816UART1_RST
SEP_7816UART1_SCL
SEP_7816UART1_SDA

SIO_7816UART0_RST
SIO_7816UART0_SCL
SIO_7816UART0_SDA
SIO_7816UART1_RST
SIO_7816UART1_SCL

VDDIO18_GRP2

SIO_7816UART1_SDA

DISP_VSYNC

I2C0_SCL
I2C0_SDA

I2C1_SCL
I2C1_SDA

I2C2_SCL
I2C2_SDA

I2C3_SCL
I2C3_SDA

DWI_CLK

DWI_DI
DWI_DO

SOCHOT0
SOCHOT1

AV6
AR7

AP8
AU7

AT11
AR11

W30
W32

AP19
AT18
AT19

AR1
AP3
AP2
AR4
AR2
AP4

AB33
AA31
AB31
AA33
AA32
AA34

AP18
AP17

AN17

I2C0_SCL_1V8
I2C0_SDA_1V8

I2C1_SOC2OSCAR_SWDCLK_1V8

I2C1_SOC2OSCAR_SWDIO_1V8

I2C2_SCL_1V8
I2C2_SDA_1V8

I2C3_SCL_1V8
I2C3_SDA_1V8

TP_SOC_TST_CPUSWITCH_OUT

NC_SEP_7816UART0_RST

SEP_I2C0_SCL
SEP_I2C0_SDA

NC_SEP_7816UART1_RST
NC_SEP_7816UART1_SCL
NC_SEP_7816UART1_SDA

HSIC1_WLAN2SOC_REMOTE_WAKE
HSIC1_WLAN2SOC_DEVICE_RDY
HSIC1_SOC2WLAN_HOST_RDY
HSIC2_BB2SOC_REMOTE_WAKE
HSIC2_BB2SOC_DEVICE_RDY
HSIC2_SOC2BB_HOST_RDY

DISPLAY_SYNC

DWI_AP_CLK

DWI_AP_DO

SOCHOT0_L
SOCHOT1_L

24 28

5

OUT

BI

OUT

BI

OUT

BI

IN

OUT

OUT

BI

5

28

24 28

49 52

OUT

OUT

44 53

44 53

5

5

5

48 52

48 53

5

44 53

5

13

11 48 52

5

11 48 52

16 52

5

16 52

20 22

5

20 22

51

5

51

48

TRISTAR
PMU

5

OUT

5

BI

SPK AMPS

ALS
PROX

19

19

GPIO_BTN_HOME_L

5

13 48

IN

GPIO_BTN_ONOFF_L

5

17 48

IN

GPIO_BTN_VOL_UP_L

17

IN

GPIO_BTN_VOL_DOWN_L

17

IN

GPIO_BTN_SRL_L

5

17 48

IN

GPIO_SOC2BEACON_EN

OUT

GPIO_SOC2AJ_HS4_SHUNT_EN
GPIO_SOC2AJ_HS3_SHUNT_EN

14

OUT

GPIO_BOARD_REV0

10

IN

GPIO_BOARD_REV1

10

IN

GPIO_BOARD_REV2

10

IN

GPIO_CODEC_IRQ_L

15 52

IN

GPIO_SOC2BB_WAKE_MODEM

28 52

OUT

GPIO_GRAPE_IRQ_L

13 52

IN

BB_IPC_GPIO

28

IN

GPIO_ALS_IRQ_L

20

IN

GPIO_BOARD_ID3

10

IN

GPIO_BB2SOC_RESET_DET_L

24 28

IN

GPIO_BOOT_CONFIG0

10

IN

GPIO_PMU2SOC_IRQ_L

48

IN

GPIO_SOC2PMU_KEEPACT

5

48

OUT

GPIO_GRAPE_RST_L

13 52

OUT

GPIO_BB2SOC_GPS_SYNC

28

IN

GPIO_SOC2BB_RADIO_ON_L

24 26 52

IN

NC_GPIO_BB_HSIC_DEV_RDY

GPIO_BOOT_CONFIG1

10

IN

GPIO_FORCE_DFU

5

52

IN

TP_GPIO_DFU_STATUS

GPIO_BOOT_CONFIG2

10

IN

GPIO_BOOT_CONFIG3

10

IN

GPIO_SOC2OSCAR_DBGEN

19

OUT

GPIO_SOC2BB_RST_L

24 26 52

OUT

GPIO_PROX_IRQ_L

22

IN

GPIO_BB2SOC_GSM_TXBURST

28

IN

GPIO_SPKAMP_RST_L

5

16

OUT

GPIO_BT_WAKE

44 53

OUT

GPIO_TS2SOC2PMU_INT

11 48

IN

GPIO_SPKAMP_LEFT_IRQ_L

16

IN

GPIO_SOC2LCD_PWREN

18

OUT

AC5
AB1
AB2
AD1
AD5
AE4
AF1
AE2
AE5
AF3
AF4
AF2
AG1
AG3
AG4
AH3
AH2
AH4
AG5
AJ5
AJ4

AK2
AP13
AP12
AR13
AN14
AT12
AT13
AV13
AP14
AU13
AP15
AR14
AT14
AT15
AP16
AR16
AT16
AT17

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38

POP-1GB-DDR

SYM 2 OF 13

CRITICAL

VDDIO18_GRP1

OMIT

U0652

H6P

FCMSP

TMR32_PWM0
TMR32_PWM1
TMR32_PWM2

UART0_RXD
UART0_TXD

UART1_CTSN
UART1_RTSN

UART1_RXD
UART1_TXD

UART2_CTSN
UART2_RTSN

UART2_RXD
UART2_TXD

VDDIO18_GRP1

UART3_CTSN
UART3_RTSN

UART3_RXD
UART3_TXD

UART4_CTSN
UART4_RTSN

UART4_RXD
UART4_TXD

UART5_RTXD

UART6_RXD
UART6_TXD

VDDIO18_GRP2 VDDIO18_GRP2

AC31
AD34
AC32

AR19
AR18

AL2
AL4
AK4
AK3

AL5
AM3
AM2
AM1

AN3
AN4
AP1
AN1

AV3
AU3
AT3
AT2

AM5

W31
Y31

OSCAR_TIME_SYNC_HOST_INT
GPIO_SPKAMP_KEEPALIVE

CLK_32K_SOC2CUMULUS

UART0_SOC_RXD
UART0_SOC_TXD

UART1_BT2SOC_RTS_L
UART1_SOC2BT_RTS_L
UART1_BT2SOC_TX
UART1_SOC2BT_TX

NC_UART2_CTS
NC_UART2_RTS

UART2_WLAN2SOC_TX
UART2_SOC2WLAN_TX

UART3_BB2SOC_RTS_L
UART3_SOC2BB_RTS_L
UART3_BB2SOC_TX
UART3_SOC2BB_TX

PMU_GPIO_OSCAR2PMU_HOST_WAKE
GPIO_OSCAR_RESET_L

UART4_OSCAR2SOC_RXD
UART4_SOC2OSCAR_TXD

UART5_BATT_RTXD

UART6_TS_ACC_RXD
UART6_TS_ACC_TXD

IN
OUTOUT
OUT

IN
OUT

IN
OUT

IN
OUT

IN
OUT

IN
OUT

IN
OUT

IN
OUT

IN
OUT

BI

IN
OUT

19

5

16 52 14

13 52

11 52

11 52

44

44

44 53

44 53

44 53

44 53

24 28

24 28

11 24 28 52

11 24 28 52

19 48

19

19 53

19 53

45 48

11 52

11 52

D

C

=PP1V8_S2R_MISC

5

B

A

51 54

=PP1V8_ALWAYS

54

=PP1V8_S2R_MISC

5

51 54

=PP1V8_SOC

4 5 7

10 18 54

=PP1V8_S2R_MISC

5

51 54

R0771

220K

1 2

5%

1/32W

MF

01005

R0770

220K

1 2

5%

1/32W

MF

01005

R0765

220K

1 2

5%

1/32W

MF

01005

R0754

100K

1 2

5%

1/32W

MF

01005

R0755

100K

1 2

5%

1/32W

MF

01005

GPIO_BTN_HOME_L

GPIO_BTN_ONOFF_L

GPIO_BTN_SRL_L

(SCREEN ROTATION LOCK)

SOCHOT0_L

SOCHOT1_L

=PP1V8_SOC

4 5 7

5

13 48

5

17 48

5

17 48

5

49 52

5

48

6 3

10 18 54

I2C0_SDA_1V8

5

11 48 52

I2C0_SCL_1V8

5

11 48 52

I2C2_SDA_1V8

5

16 52

I2C2_SCL_1V8

5

16 52

I2C3_SDA_1V8

5

20 22

I2C3_SCL_1V8

5

20 22

SEP_I2C0_SDA

5

51

SEP_I2C0_SCL

5

51

I2C1_SOC2OSCAR_SWDIO_1V8

5

19

I2C1_SOC2OSCAR_SWDCLK_1V8

5

19

1

1

R0700

2.2K

5%
1/32W
MF
01005MF01005

2

2

R0701

2.2K

5%
1/32W

1

R0702

1.8K

5%
1/32W
MF
01005

2

1

R0703

1.8K

5%
1/32W

MF
01005

2

1

2.2K

5%
1/32W
MF
01005

2

1

R0705R0704

2.2K

5%
1/32W
MF
01005

2

1

R0750

2.2K

5%
1/32W
MF
01005

2

1

R0751

2.2K

5%
1/32W
MF
01005

2

NOSTUFF

1

R0752

2.2K

5%
1/32W
MF
01005

2

NOSTUFF

1

R0753

2.2K

5%
1/32W
MF
01005

2

1

R0739

100K

1%
1/32W
MF
01005

2

1

100K

1%
1/32W
MF
01005

2

GPIO_SPKAMP_RST_L
GPIO_SOC2PMU_KEEPACT
HSIC1_SOC2WLAN_HOST_RDY
GPIO_FORCE_DFU
GPIO_SPKAMP_KEEPALIVE

1

R0736R0735

100K

1%
1/32W
MF
01005

2

1

R0737

100K

1%
1/32W
MF
01005

2

SYNC_MASTER=N/A

PAGE TITLE

1

R0738

100K

1%
1/32W
MF
01005

2

SOC: I/OS

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

5

16

5

48

5

44 53

5

52

5

16 52

SYNC_DATE=05/05/2011

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

7 OF 121

SHEET

5 OF 54

124578

SIZE

B

A

D

OUT

OUT

OUT

OUT

OUT

BI
BI
BI
BI
BI
BI
BI
BI

OUT

BI
BI
BI
BI
BI
BI
BI
BI

BI BI

OUT
OUT
OUT
OUT

PPN0_ALE

PPN0_CEN0
PPN0_CEN1

PPN0_CLE

PPN0_DQS

PPN0_IO0
PPN0_IO1
PPN0_IO2
PPN0_IO3
PPN0_IO4
PPN0_IO5
PPN0_IO6
PPN0_IO7

PPN0_REN

PPN0_VREF

PPN0_WEN

PPN0_ZQ

PPN1_ALE

PPN1_CEN0
PPN1_CEN1

PPN1_CLE

PPN1_IO0
PPN1_IO1
PPN1_IO2
PPN1_IO3
PPN1_IO4
PPN1_IO5
PPN1_IO6

PPN1_REN

PPN1_VREF

PPN1_WEN

PPN1_ZQ

PPN1_DQS

PPN1_IO7

SYM 4 OF 13

VSS

VSS

SYM 11 OF 13

VSS

VSS

SYM 12 OF 13

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

VDDIO18_GRP3

12 52

12

12

12

12

12

12

12

12 53

12

12

12

12

100K

1/32W

1%
MF

01005

R0831

MF

R0832

100K

1%
1/32W

01005

12 52

12

12

12

12

12

12

12

12

12 53 12

12

12

12

12

10%

0.01UF

X5R
01005

6.3V

C0860

C0861

10%

0.01UF

X5R
01005

6.3V

R0860

50K

MF

1/32W
01005

1%

R0861

50K

MF

1/32W

1%

01005

U0652

POP-1GB-DDR

H6P

FCMSP

OMIT

CRITICAL

01005

R0870

1%

240

1/32W

MF

01005

R0871

1%

240

MF

1/32W

FCMSP

POP-1GB-DDR

H6P

U0652

OMIT

CRITICAL

FCMSP

POP-1GB-DDR

H6P

U0652

OMIT

CRITICAL

SYNC_DATE=04/18/2011

SYNC_MASTER=N/A

SOC: NAND

NC_PPN1_CEN1NC_PPN0_CEN1

FMI1_CE0_L

PPVREF_FMI_SOC

FMI0_AD<4>

FMI0_AD<0>

FMI0_CE0_L

FMI0_WE_L

FMI0_AD<7>

FMI0_AD<6>

FMI0_AD<5>

FMI0_AD<2>

FMI0_AD<1>

FMI0_DQS

FMI0_ALE

FMI1_AD<1>

FMI1_AD<0>

FMI1_AD<2>

FMI1_AD<4>

FMI1_AD<3>

FMI1_AD<7>

FMI1_AD<6>

FMI1_AD<5>

FMI1_CLE

FMI1_ALE

FMI1_DQS

=PP1V8_NAND_SOC

FMI0_ZQ FMI1_ZQ

FMI1_WE_L
FMI1_RE_LFMI0_RE_L

FMI0_CLE

FMI0_AD<3>

=PP1V8_NAND_SOC

051-0886

A.0.0

8 OF 121

6 OF 54

1

2

1

2

2

1

2

1

1

2

1

2

A31

G32
H31

B31

D34

B32
C32
C33
C34
F32
F33
F34
G34

D33

D31

A32

E33

N34

R32
P32

P31

M34
M33
L32
M32
K32
J32
H33

L31

N31

N32

K33

L34

H34

1 2 1 2

A11

A1

AA3

AF29

AJ30

A3
A4
A5
A7
A9

A13
A14
A16
A18
A25
A28
A30
A33
A34
AA1
AA2

AA4

AA8
AA10
AA12
AA14
AA16
AA18
AA22
AA24
AA26
AA28
AA30

AB5

AB7

AB9
AB11

AB15
AB17
AB19
AB21
AB23
AB25
AB27
AB29
AB32

AC4

AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26
AC28
AC30
AC34

AD2

AD7

AD9
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD25
AD29
AD32

AE3

AE8
AE10
AE12

AE16
AE18
AE22
AE24
AE26
AE28

AF5

AF7

AF9
AF11
AF13
AF15
AF17
AF19

AF21
AF23

AF32
AG2
AG8
AG10
AG12
AG14
AG16
AG18
AG20
AG22
AG24
AG26
AG28
AG30
AH5
AH7
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH25
AH27
AH29
AH32
AJ1
AJ3
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ22
AJ24
AJ26

AK5
AK7
AK9
AK11
AK13
AK15
AK17
AK19
AK21
AK23
AK27
AK29
AK32
AL3
AL6
AL8
AL10
AL12
AL14
AL16
AL18
AL20
AL22
AL24
AL26
AL28
AL30
AM4
AM7
AM18
AM30
AN2
AN5
AN7
AB6
AM9
AM11
AM13
AN16
AM15
AN19
AN20
AN21
AN22
AN23
AN24

AJ28

A2

AB13

AE14

AN31

AP25
AP26

E10
E11
E12

G28

G26

G15

G14

G13

G12

G11

G10

G9

G8

G7

G6

G5

G4

G3

G1

F31

F30

F26

F15

F14

F13

F12

F10

F9

F8

F7

F6

F5

F4

F3

F2

E34

E32

E31

E22

E21

E20

E19

E18

E15

E14

E13

E8

E7

E5

E4

E3

E1

D22

D21

D20

D19

D18

D17

D15

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

C31

C29

C27

C26

C23

C22

C19

C18

C17

C16

C15

C13

C11

C10

C9

C7

C6

C5

C3

C2

C1

B34

B33

B30

B28

B25

B19

B18

B17

B16

B15

B13

B12

B11

B10

B9

B8

B7

B6

B5

B4

B2

B1

AV34

AV33

AV20

AV18

AV16

AV14

AV11

AV9

AV2

AV1

AU34

AU33

AU21

AU18

AU16

AU11

AU2

AU1

AT32

AT31

AT30

AT29

AT28

AT27

AT26

AT25

AT24

AT23

AT22

AT21

AT20

AT6

AT4

AT1

AR32

AR20

AR17

AR15

AR12

AR8

AR3

AP28

AP27

AP24

AN33

AN32

AR29

AR28

AR25

AR24

AR22

AR21

E9

C12

AP21

AP20

AP6

AN34

AP32

AR23

E6

C24
AP30
AP31

D32

D16

AP29

6

54

6

54

WWW.AliSaler.Com

OUT
OUT

OUT

BI

IN
IN

OUT
OUT

OUT
OUT

BI

OUT

OUT

OUT

IN
IN

IN
IN

DP_PAD_AUXN

DP_PAD_AUXP

DP_PAD_AVDD_AUX

DP_PAD_AVDD0

DP_PAD_AVDD1

DP_PAD_AVDD2

DP_PAD_AVDD3

DP_PAD_AVDDP0

DP_PAD_AVDDX

DP_PAD_AVSS_AUX

DP_PAD_AVSS0

DP_PAD_AVSS1

DP_PAD_AVSS2

DP_PAD_AVSS3

DP_PAD_AVSSP0

DP_PAD_AVSSX

DP_PAD_DC_TP

DP_PAD_DVDD

DP_PAD_DVSS

DP_PAD_R_BIAS

DP_PAD_TX0N

DP_PAD_TX0P

DP_PAD_TX1N

DP_PAD_TX1P

DP_PAD_TX2N

DP_PAD_TX2P

DP_PAD_TX3N

DP_PAD_TX3P

EDP_HPD

SYM 6 OF 13

MIPI0C_DPDATA0

SENSOR1_RST

SENSOR1_CLK

MIPI1C_DPDATA0

SENSOR0_RST

SENSOR0_ISTRB

SENSOR0_CLK

MIPI1D_VREG_0P4V

MIPI1D_VDD18

MIPI1C_DPDATA1

MIPI1C_DPCLK

MIPI1C_DNDATA1

MIPI1C_DNDATA0

MIPI1C_DNCLK

MIPI0D_VREG_0P4V

MIPI0D_VDD18

MIPI0D_DPCLK
MIPI0D_DNCLK

MIPI0C_DPDATA2

MIPI0C_DPDATA1

MIPI0C_DNDATA2

MIPI0C_DNDATA1

MIPI_VSS

ISP0_SDA

ISP0_SCL

ISP1_SCL

MIPI0C_DPDATA3
MIPI0C_DNDATA3

MIPI0C_DPCLK

MIPI0D_DNDATA3

MIPI0D_DPDATA3

MIPI0D_DNDATA2

MIPI0D_DPDATA2

MIPI0D_DNDATA1

MIPI0D_DPDATA1

MIPI0C_DNCLK

MIPI0D_DPDATA0
MIPI0D_DNDATA0

MIPI_VDD10

SENSOR1_ISTRB

MIPI0C_DNDATA0

ISP1_SDA

SENSOR0_XSHUTDOWN

SENSOR1_XSHUTDOWN

SYM 5 OF 13

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI
BI

OUT

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(2MA)

(2MA)

(55MA)

VDDIO18_GRP1

VDDIO18_GRP1

MIPI_VDD10

(50MA)

(50MA)

(1MA)

(50MA)

(14MA)

(50MA)

VDDIO18_GRP3

(14MA)

(10MA)

DISPLAYPORT

20 52

20 52

20 52

20 52

20 53

20 53

R0940

49.9

01005

01005

5%

2.2K

1/32W
MF

R0932

1/32W

R0933

01005

5%

2.2K

MF

20 53

20 53

R0941

01005

100

23 52

23 52

01005

5%

2.2K

1/32W
MF

R0931

01005

2.2K

5%
1/32W
MF

R0930

23 52

23 52

23 53

23 53

23 53

23 53

23 53

23 53

CRITICAL

OMIT

U0652

FCMSP

POP-1GB-DDR

H6P

C0962

20%

0.1UF

X5R-CERM

6.3V
01005

20%

0204

1UF

4V
X6S

C0930

CRITICAL

OMIT

U0652

POP-1GB-DDR

H6P

FCMSP

C0957

1.0UF

0201-1

6.3V
X5R

20%

18 53

18 53

18 53

18 53

18 53

18 53

18

18

18

18 53

18 53

R0900

01005

MF

1/32W

4.99K

1%

NOSTUFF

01005

6.3V
X5R

0.01UF

10%

C0950

C0958

01005

16V
NP0-C0G-CERM

8.2PF

+/-0.5PF

1/32W

0%

0.00

MF

R0901

01005

C0951

16V
01005

5%

56PF

NP0-C0G

C0952

01005

16V
NP0-C0G-CERM

8.2PF

+/-0.5PF

01005

NP0-C0G

C0953

56PF

5%
16V

0201

20%
X5R

6.3V

C0954

0.22UF

C0955

0201-1

6.3V
X5R

1.0UF

20%

C0956

0201-1

6.3V
X5R

1.0UF

20%

SOC: DP,MIPI

SYNC_MASTER=MLB

SYNC_DATE=05/04/2012

=PP1V8_MIPI_SOC

NC_MIPI1D_VREG

NC_MIPI0D_VREG

NC_SENSOR1_XSHUTDOWN

NC_SENSOR1_ISTRB

NC_SENSOR0_ISTRB
NC_SENSOR0_XSHUTDOWN

NC_MIPI0C_CAM_REAR_DATA_P2
NC_MIPI0C_CAM_REAR_DATA_N2

MIPI0C_CAM_REAR_DATA_P<0>

EDP_DATA_P<1>

PP1V8_EDP_AVDD_AUX

=PP1V8_SOC

ISP0_CAM_REAR_SCL
ISP0_CAM_REAR_SDA

ISP0_CAM_REAR_CLK

ISP1_CAM_FRONT_CLK_R

MIPI1C_CAM_FRONT_DATA_P<0>

ISP0_CAM_REAR_CLK_R

NC_MIPI1C_CAM_FRONT_DATA_P1

MIPI1C_CAM_FRONT_CLK_P

NC_MIPI1C_CAM_FRONT_DATA_N1

MIPI1C_CAM_FRONT_DATA_N<0>

MIPI1C_CAM_FRONT_CLK_N

NC_MIPI0D_DPCLK
NC_MIPI0D_DNCLK

MIPI0C_CAM_REAR_DATA_P<1>
MIPI0C_CAM_REAR_DATA_N<1>

NC_MIPI0C_CAM_REAR_DATA_P3
NC_MIPI0C_CAM_REAR_DATA_N3

MIPI0C_CAM_REAR_CLK_P

NC_MIPI0D_DNDATA3

NC_MIPI0D_DPDATA3

NC_MIPI0D_DNDATA2

NC_MIPI0D_DPDATA2

NC_MIPI0D_DNDATA1

NC_MIPI0D_DPDATA1

MIPI0C_CAM_REAR_CLK_N

NC_MIPI0D_DPDATA0
NC_MIPI0D_DNDATA0

MIPI0C_CAM_REAR_DATA_N<0>

=PP1V0_MIPI_SOC

=PP1V8_EDP_SOC

SOC_EDP_R_BIAS

EDP_AUX_N

EDP_AUX_P

TP_EDP_PAD_DC_TP

EDP_DATA_N<0>

EDP_DATA_P<0>

EDP_DATA_N<1>

EDP_DATA_N<2>

EDP_DATA_P<2>

EDP_DATA_N<3>

EDP_DATA_P<3>

EDP_HPD

ISP1_CAM_FRONT_SDA

ISP1_CAM_FRONT_SCL

ISP0_CAM_REAR_SHUTDOWN_L

ISP1_CAM_FRONT_CLK

ISP1_CAM_FRONT_SHUTDOWN_L

=PP1V0_EDP_PAD_DVDD_SOC

051-0886

A.0.0

9 OF 121

7 OF 54

1 2

1

2

1

2

1 2

1

2

1

2

B20

A20

F18

F19

F20

F21

F22

G18

F17

G17

H19

G19

G20

G21

H18

H17

E16

F16

G16

E17

B21

A21

B22

A22

B23

A23

B24

A24

D30

2

1

2

1

AU27

AT9

AU9

AT33

AN28

AT8

AN10

AV8

AR30

AR31

AP33

AR33

AP34

AT34

AR34

AR27

AR26

AU30
AV30

AU24

AU26

AV24

AV26

AM28

AM27

AM26

AM25 AN29

AV7

AT7

AU8

AU23
AV23

AU25

AV28

AU28

AV29

AU29

AV31

AU31

AV25

AU32
AV32

AN25

AN26

AN27

AM29

AL25

AR10

AV27

AP9

AR9

AP10

2

1

1

2

2

1

2

1

1 2

2

1

2

1

2

1

2

1

2

1

2

1

54

4 5

10 18 54

54

54

54

DDR1_VREF_CA

DDR0_VREF_CA

DDR1_RREF_DQ

VSS

DDR0_CKEIN

DDR0_VDD_CKE

DDR1_RREF_CA

DDR0_RREF_CA

DDR0_RREF_DQ

DDR0_VREF_DQ
DDR1_VREF_DQ

VDDCA

VDD2

VDD1

VDDQ

DDR1_VDD_CKE

DDR1_CKEIN

SYM 7 OF 13

VDDIOD_DDR1CA

VDDIOD_DDR0CA

VDDIO18_GRP4

VSS

VDDIO18_GRP2

VDDIO18_GRP1

VDDIOD_DDRDQ

VDDIO18_GRP3

SYM 9 OF 13

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(DDR IMPEDANCE CONTROL)

ON 5/6/12, BY MANU G

NOTE: CKEIN CONFIRMED 1.8V TOLERANT

CAPS FOR VDDIOD ARE SHARED WITH VDDQ

(45MA)

(500MA)

SHARED WITH VDDIOD)

(CURRENT CONSUMPTION

(CURRENT CONSUMPTION

SHARED WITH VDDIOD)

(<1MA)
(<1MA)

(1000MA)

(20MA)

(31MA)

(2MA)

(65MA)

(GPIO,UART,SPI,I2C)
(SENSOR,SOCHOT,PMU)

CAPS FOR VDDIO18_X ARE SHARED WITH VDDIODX

NOSTUFF

0.01UF

10%

6.3V

C1056

X5R

01005

R1056

01005

1.00K

MF

1%
1/32W

R1055

01005

1/32W
MF

1%

1.00K

X5R

6.3V

01005

NOSTUFF

C1054

0.01UF

10%

R1053

01005

MF

1%

1.00K

1/32W

R1054

01005

1%
1/32W

1.00K

MF

0204

1UF

20%
4V
X6S

C1007

1UF

0204

20%
4V
X6S

C1006

R1031

MF
01005

240

1%
1/32W

01005

MF

R1001

240

1/32W

1%

01005

0.1UF

C1000

20%

6.3V

X5R-CERM

C1009

0610

4V

4.3UF

X5R-CERM

20%

20%
4V
X7S
0204

0.47UF

C1004

20%
4V
X5R-CERM
0610

4.3UF

C1015

0610

4V

20%
X5R-CERM

4.3UF

C1027

OMIT

CRITICAL

U0652

H6P

POP-1GB-DDR

FCMSP

4V
0204

20%
X6S

1UF

C1029

4V
0204

X7S

20%

0.47UF

C1026

X6S

1UF

4V
0204

20%

C1028

20%

0.47UF

X7S
0204

4V

C1031

X6S
0204

1UF

20%
4V

C1071

20%
4V
X7S

0.47UF

0204

C1073

402

4.7UF

X5R

6.3V

20%

C1070

X6S

4V

20%

1UF

0204

C1072

H6P

POP-1GB-DDR

FCMSP

OMIT

CRITICAL

U0652

0201

FL1000

1KOHM-25%-0.2A

X5R-CERM

10V

20%

1.0UF

0201-1

C1042

01005

MF

R1000

240

1/32W

1%

R1030

MF
01005

240

1%
1/32W

NOSTUFF

X5R

10%

01005

0.01UF

6.3V

C1002

R1005

01005

1/32W
MF

2.21K

1%

R1006

01005

MF

2.21K

1%
1/32W

NOSTUFF

6.3V

C1052

0.01UF

X5R

10%

01005

01005

MF

2.21K

1%
1/32W

R1051

R1052

01005

MF

1/32W

1%

2.21K

SOC: SRAM, IO PWRS

SYNC_MASTER=N/A

SYNC_DATE=04/18/2011

DDR0_CA_ZQ

DDR0_DQ_ZQ

DDR1_CA_ZQ

=PP1V2_S2R_DDR_SOC

PPVREF_DDR1_DQ

MAX_NECK_LENGTH=3 MM

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.2MM

VOLTAGE=0.6V

VOLTAGE=0.6V

MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM

MAX_NECK_LENGTH=3 MM

PPVREF_DDR1_CA

VOLTAGE=0.6V

MIN_LINE_WIDTH=0.3MM

MAX_NECK_LENGTH=3 MM

MIN_NECK_WIDTH=0.2MM

PPVREF_DDR0_DQ

MIN_LINE_WIDTH=0.3MM

MAX_NECK_LENGTH=3 MM

VOLTAGE=0.6V

PPVREF_DDR0_CA

=PP1V2_VDDQ_DDR

=PP1V2_S2R_DDR

=PP1V2_VDDQ_DDR

=PP1V2_S2R_DDR

PPVREF_DDR1_DQ

PPVREF_DDR0_DQ

=PP1V2_VDDQ_DDR

=PP1V8_S2R_DDR

RESET_SOC_L

=PP1V8_VDDIO18_SOC

=PP1V2_VDDIOD_SOC

PP1V8_XTAL

PPVREF_DDR1_CA

=PP1V2_S2R_DDR

DDR1_DQ_ZQ

PPVREF_DDR0_CA

051-0886

A.0.0

10 OF 121

8 OF 54

NET_SPACING_TYPE=PWR

NET_SPACING_TYPE=PWR

NET_SPACING_TYPE=PWR

MIN_NECK_WIDTH=0.15 MM

NET_SPACING_TYPE=PWR

2

1

1

2

1

2

2

1

1

2

1

2

2

1

2

1

1

2

1

2

2

1

2

1

2

1

2

1

2

1

Y33

AU17

T4

H27

K9

H25

J31

J20

G30
G31
G33
H1
H2
H3
H4
H5

H29
H32
J2
J3
J4
J5

J10
J12

J18

J22
J24
J26
J28
J30

K1

K3
K4

K7

K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
K31
K34
L2

J6
J8

J14

K5

AP22

AP23

AC33

AU15

F11

D14

U4

AB34
AF34
AV12
AV15

R34
W34

AC2

AD33

C20

G2

J33

L3

P33

U2
U33
Y34

AJ2

AG33

AU10
AU14

AU22
AV17

AU20

C8

C4

C14
D24

AK1

AE34

B3

D25

B14

E2
J34
P34

V33

U1

AU12

AV22

AU19

A6

A8

C25

C21

J1

F1

L1

R1

N1

V1
A10
A12
A15
A17
A19

AE1

AC1

AH1
AL1

Y1

K2

J16

U31

U32

AV21

AV19

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

AG6

AE6

AC6

Y30

AM17

Y19
Y21
Y23
Y27
Y29
Y32

AM8

AM12

Y17

Y15

Y13

Y9

Y5

Y4

Y2

W33

W28

W26

W24

W22

W20

W18

W16

W12

W8

W5

W3

V34

V32

V30

V27

V25

V15

V13

V9

V7

V5

V4

V3

V2

U34

U30

V29

U29

T29

R29

AM24

AM23

AM22

AM21

AM20

Y6

W10

W14

U6

T6

G29

G24

P30

H30
K30
M30

W2

T11

T9

T7

V23

V21

V19

V17

U22

U20

U18

U14

U12

U10

U8

U5

U3

T34

T33

T32

T31

T30

T27

T25

T23

T21

T19

T17

T15

T13

T5

T3

T2

T1

R33

AH30

AD30

AM19

AM10

AH6

AD6

V11

Y3

Y7

Y11

AA6

H10
H11
H12
H13
H14
H15

M6
N6
P6
R6

V6
W6

AM14
AM16

H9

W4

W1

U28

U26

H6
H7
H8

U24

G27

G25

AJ6
AE30

21

2

1

1

2

1

2

2

1

1

2

1

2

2

1

1

2

1

2

54

8

8

8

8

8

54

8

54

8

54

8

54

8

8

8

54

54

4

10 11 24 48 52

9

54

54

52

8

8

54

8

WWW.AliSaler.Com

VDD_SENSE

VDDVDD

SYM 10 OF 13

SYM 8 OF 13

VDD_ANA_TMPSADC0
VDD_ANA_TMPSADC1
VDD_ANA_TMPSADC2
VDD_ANA_TMPSADC3

VDD_SRAM_SOC

VSS

VDD_SRAM_CPU

VDD_GPUVDD_CPU

VDD_GPU_SENSE

VDD_SENSE_CPU

SYM 13 OF 13

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(VDD BALLS = VDD_SOC PWR DOMAIN)

7,500MA FOR G3 GPU

@125C

@1.1V/1.2GHZ

10,800MA FOR CPU0+1

@1.1V

@125C

(2.5MA)

(2.5MA)

(2.5MA)

(2.5MA)

@125C
@1.0V

(1500MA)

1,500MA FOR CYCLONE + M$ SRAM

(THERMAL VIRUS)

@1.0V

@125C

2,500MA FOR VDD_SOC

POP-1GB-DDR

H6P

FCMSP

U0652

OMIT

CRITICAL

20%
4V

0610

4.3UF

X5R-CERM

C1148

20%

C1151

1UF

4V
X6S
0204

4V

0.47UF

20%

C1153

X7S
0204

0204

X6S

C1150

1UF

20%
4V

X7S

4V

20%

0204

C1152

0.47UF

FCMSP

POP-1GB-DDR

H6P

U0652

OMIT

CRITICAL

C1160

20%

0.1UF

01005

6.3V
X5R-CERM

OMIT

POP-1GB-DDR

H6P

U0652

CRITICAL

FCMSP

CRITICAL

C1103

4V
X5R-CERM

4.3UF

0610

20%

C1102

X5R-CERM

4.3UF

0610

20%
4V

CRITICAL

C1101

4V

20%
X5R-CERM

4.3UF

0610

CRITICALCRITICAL

C1100

0610

20%
4V
X5R-CERM

4.3UF

C1109

CRITICAL

0204

X6S

4V

20%

1UF

C1114

+/-0.5PF

8.2PF

01005

NP0-C0G-CERM

16V

C1108

CRITICAL

1UF

20%
4V
X6S
0204

C1107

CRITICAL

1UF

20%
4V
X6S
0204

0201

0.22UF

20%
X5R

6.3V

C1113

C1106

20%

1UF

4V
0204

X6S

CRITICAL

4V

20%

1UF

C1105

0204

X6S

CRITICAL

0201

0.22UF

20%
X5R

6.3V

C1112

C1111

0.47UF

20%

0204

X7S

4V

CRITICAL

0204

X6S

20%

C1104

1UF

4V

CRITICAL

0204

20%

0.47UF

C1110

CRITICAL

X7S

4V

C1118

CRITICAL

4V
X5R-CERM
0610

4.3UF

20%

C1117

CRITICAL

4.3UF

4V

20%

0610

X5R-CERM

C1122

4V

20%
X5R-CERM

4.3UF

0610

CRITICAL

C1126

20%

1UF

4V
0204

X6S

CRITICAL

C1121

CRITICAL

4V

20%
X5R-CERM

4.3UF

0610

C1125

1UF

20%
4V
X6S
0204

CRITICAL

C1116

20%
X5R

4V
0402

15UF

C1115

20%
X5R

4V
0402

15UF

4.3UF

0610

X5R-CERM

20%
4V

CRITICAL

C1120

C1124

20%

1UF

4V
X6S
0204

CRITICAL

4.3UF

X5R-CERM
0610

20%
4V

CRITICAL

C1119

C1123

20%

1UF

4V
0204

X6S

CRITICAL

C1130

20%

1UF

4V
X6S
0204

CRITICAL

C1129

20%

1UF

4V
X6S
0204

CRITICAL

C1134

01005

8.2PF

NP0-C0G-CERM

16V

+/-0.5PF

0201

0.22UF

20%

C1133

6.3V
X5R

C1128

20%

1UF

4V
0204

X6S

CRITICAL

C1127

1UF

20%
4V

0204

X6S

CRITICAL

C1132

CRITICAL

0204

X6S

4V

20%

1UF

C1131

CRITICAL

0204

X6S

4V

20%

1UF

C1138

4V
0204

0.47UF

20%

CRITICAL

X7S

0.47UF

4V

20%

0204

CRITICAL

C1142

X7S

C1137

4V

20%

0204

0.47UF

CRITICAL

X7S

CRITICAL

4V

20%

0204

C1141

0.47UF

X7S

0201

6.3V
X5R

C1145

0.22UF

20%

C1136

20%

0204

4V

0.47UF

CRITICAL

X7S

C1140

CRITICAL

4V
0204

0.47UF

20%
X7S

20%

CRITICAL

C1135

0.47UF

4V
X7S
0204

C1139

CRITICAL

20%

0.47UF

0204

4V
X7S

01005

20%

6.3V
X5R

0.22UF

C1144

01005

20%

6.3V

0.22UF

X5R

C1143

CRITICAL

C1187

X7S

4V

20%

0.47UF

0204

CRITICAL

C1186

20%
4V

0204

0.47UF

X7S

CRITICAL

C1185

0.47UF

20%

0204

X7S

4V

CRITICAL

C1184

20%

0204

X7S

4V

0.47UF

CRITICAL

C1183

0204

4V

1UF

20%
X6S

CRITICAL

C1182

4V

1UF

20%
X6S

0204

C1194

8.2PF

+/-0.5PF

01005

NP0-C0G-CERM

16V

0.22UF

X5R

6.3V

20%

01005

C1193C1192

01005

20%

6.3V
X5R

0.22UF

C1191

01005

20%

6.3V
X5R

0.22UF

C1190

01005

20%

6.3V
X5R

0.22UF

CRITICAL

20%

1UF

4V
0204

X6S

C1181

CRITICAL

20%

0204

1UF

4V
X6S

C1180

CRITICAL

20%

1UF

4V
X6S

C1179

0204

CRITICAL

X6S

4V

20%

1UF

0204

C1178

CRITICAL

0610

4V

20%
X5R-CERM

4.3UF

C1177

CRITICAL

4V
X5R-CERM

4.3UF

0610

20%

C1176

CRITICAL

20%
X5R-CERM

4.3UF

0610

4V

C1175

CRITICAL

4.3UF

0610

4V

20%
X5R-CERM

C1174

CRITICAL

4V

20%

4.3UF

0610

X5R-CERM

C1173

CRITICAL

X5R-CERM

4V

20%

4.3UF

0610

C1172

15UF

0402

4V
X5R

20%

C1171

15UF

0402

4V

20%
X5R

C1170

0.47UF

0204

4V
X7S

20%

C1189

CRITICAL

0204

4V
X7S

20%

0.47UF

CRITICAL

C1188

SOC: VDD, SRAM, CPU, GPU PWRS

SYNC_MASTER=N/A

SYNC_DATE=04/18/2011

=PPVDD_CPU

=PPVDD_GPU

PPVDD_CPU_SOC_SENSE

PPVDD_GPU_SOC_SENSE

=PP1V8_VDDIO18_SOC

=PPVDD_SRAM_SOC

PPVDD_SOC_SOC_SENSE

=PPVDD_SOC

051-0886

A.0.0

11 OF 121

9 OF 54

P20
P22

K10

K8

K18

K16

K14

K12

K6

J29

J27

J23

J21

J19

J17

J15

J13

J11

AK6
AK20

R7

V31

R17

U23

R25

V22

J25

N27

N17

N15

N13

AN11

Y20

Y18

Y16

W19

W17

W7

V28

V26

V24

V20

V18

V16

V14

U27

U25

U21

U19

U17

U7

T28

T26

T24

T22

T20

T18

T16

T14

R27

R23

R21

R19

R15

R13

P28

P24

P18

P16

P14

P12

P10

P8

N29

N25

N23

N21

N19

N11

N9

N7

M26

M24

M22

M20

M18

M16

M14

M12

M10

L27

L25

L23

L21

L19

L17

L15

L13

L11

L9

L7

K28

J9

J7

H28

H24

AN9

AL23

AK30

AN18

AF30

AF20

AF6

AE21

AN15

AD20

AN13

AB20

AB14

AA17

K20

AA7

U15

P26

M28

L29

AA19

R11

R9

K26

K24

K22

H26

AH20

AB30

M8

2

1

2

1

2

1

2

1

2

1

R28
R30
R31

AJ20
AA20

AB4
H22

AA9
AA11
AA13
AA15

AB8

T10

T12

U11

L4
L5
L6
L8
L10
L12
L14
L16
L18
L20
L22
L24
L26
L28
L30
L33
M1
M2
M3
M4
M5
M7
M9
M11
M13
M15
M17
M19
M21

N3

N5
N8
N10
N12
N14
N16
N18
N20
N22
N24
N26
N28
N30

P1
P2
P3
P4

P7
P9
P11
P13

P17
P19
P21
P23
P25
P27
P29
R2
R3
R4
R5
R8
R10

R16
R18

R24
R26

T8

U9

W13

V10

V8

U13

W15

W11

W9

V12

Y8

AD24
AD26
AD28
AE23
AE25
AE27
AF24
AF26
AF28
AK25

Y25

M23
M25
M27
M29
M31
N2

N4

N33

P5

P15

R12

R22

R14

R20

Y14

Y12

Y10

2

1

AL29

AL9

AL7

AL19

AC29
AD22

AL13

AL11

AK8

AK14

AK10

AJ9

AJ19

AJ17

AJ15

AH8

AH16

AH12

AG13

AB18

AF8

AF18

AF10

AE9

AE7

AE19

AE17

AB16

AE13

AE11

AD8

AD18

AD16

AD14

AD12

AD10

AB10

AB26

AB24

Y28

Y26

Y24

Y22

W27

W25

W21

AA29

AL27

AL21

AK28

AJ29

AJ25

AJ23

AA27

AJ21

AH26

AH24

AH22

AG21

AB12

AC9

AC19

AF27

AF25

AC27

AC25

AB28

AC23

AC21

AE15

AG9

AG7

AC11

AA25

AA23

AC17

AC15

AC13

AF12
AF14
AF16

AG23

AG27

AF22

AE29

AD27

AK12

AJ7

AJ13

AH18

AH14

AH10

AG15

AC7

AA21

AB22

AG11

AG17

AJ11

AK16
AK18

AL15
AL17

AA5

AM6

AN30

AG19

AG25

AG29

AH28

AJ27

AK22
AK24
AK26

W29

W23

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

54

54

53

8

54

54

53

54

OUT

CLK

RESET

DETGND

GND

GND

GND

GND

GND

I/O

DETECT

VCC VPP

OUT

BIIN

IN

SCHEMATIC DEFINED CONSTRAINTS (YES/NO)

CKPLUS RULE EXCEPTIONS

TABLE_DASHBOARD_INFO

REQUIRED

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

EVT101

BOARD_ID[1]

MLB_C

SIM CARD

SPI0 TEST MODE

MLB

BOARD REVISION

S/W READ FLOW

2. DISABLE PU AND ENABLE PD

1. SET GPIO AS INPUT

BOARD_ID[0]

ID[3-0] SYSTEM

1. SET GPIO AS INPUT

BOOT_CONFIG[3-0]

2. DISABLE PU AND ENABLE PD

BOOT_CONFIG[3] (GPIO29)

S/W READ FLOW

BOOT_CONFIG[0] (GPIO18)

BOOT_CONFIG[2] (GPIO28)

BOARD ID

3. READ

BOARD_ID[3]

BOARD_ID[2]

BRD_REV[2-0]

3. READ

1. SET GPIO AS INPUT

S/W READ FLOW

3. READ

BOOT_CONFIG[1] (GPIO25)

BOOT CONFIG ID

1010 J85 AP
1011 J85 DEV

1100 J86 AP
1101 J86 DEV

1110 J87 AP
1111 J87 DEV

MLB_B

0000

0010

JTAG

SPI0

0011

0001

2. ENABLE PU AND DISABLE PD

NAND <-- SELECTED
NAND TEST MODE

ID_J85_J87

2.2K

5%

01005

1/32W
MF

R1205

01005

5%
MF

1/32W

2.2K

R1201

NOSTUFFNOSTUFF

2.2K

1/32W

5%

R1200

MF
01005 01005

5%

2.2K

1/32W
MF

R1203

NOSTUFF

MF

1/32W

2.2K

5%

R1206

ID_DEV

01005

ID_J86_J87

5%

2.2K

01005

1/32W
MF

R1204

R1260

5%

100

MF

1/32W
01005

01005

1/32W

2.2K

5%
MF

R1213

4

52

100

5%
1/32W
MF
01005

R1210

01005

R1250

0%

0.00

1/32W

MF

NOSTUFF

SIM-CARD-X113-X223

F-ST-SM

CELL

J3000

24 28 52

24 28 52 24 28 52

24 28 52

C3002

CELL

CERM

6.3V

5%

100PF

01005

01005

MF

1/32W

1%

CELL

15.00K

R3000

C3001

0402

X5R

10%
16V

1.0UF

CELL

01005

MF

1/32W

5%

2.2K

R1202

1/32W

5%

100

R1211

01005

MF

NOSTUFF

2.2K

01005

5%
MF

R1207

1/32W

2.2K

MF

5%

R1208

01005

1/32W

NOSTUFF

5%

2.2K

01005

1/32W
MF

R1209

NO

SYNC_DATE=04/11/2011

SYNC_MASTER=N/A

SOC: MISC & ALIASES

GPIO_BOOT_CONFIG2

SIMCRD_CLK_CONN

SIMCRD_RST_CONN

PP_LDO6_RUIM_1V8

NC_J3000_5

SIMCRD_IO_CONN

SIM_TRAY_DETECT

MAKE_BASE=TRUE

WDOG_SOC

WDOG_SOC2PMU_RESET_IN

MAKE_BASE=TRUE

I2S3_BT2SOC_DATA I2S4_BT2SOC_DATA
I2S3_SOC2BT_DATA

MAKE_BASE=TRUE

I2S4_SOC2BT_DATA

I2S3_SOC2BT_BCLK

MAKE_BASE=TRUE

I2S4_SOC2BT_BCLK

I2S3_SOC2BT_LRCK

MAKE_BASE=TRUE

I2S4_SOC2BT_LRCK

RESET_SOC_L

JTAG_SOC_TRST_L

JTAG_SOC_SEL

GPIO_BOARD_ID1

GPIO_BOARD_REV1

SOC_FAST_SCAN_CLK

GPIO_BOARD_ID2

GPIO_BOARD_REV2

GPIO_BOOT_CONFIG3

GPIO_BOARD_REV0

GPIO_BOARD_ID3

SOC_HOLD_RESET

SOC_TESTMODE

=PP1V8_SOC

=PP1V8_SOC

GPIO_BOARD_ID0

GPIO_BOOT_CONFIG0

GPIO_BOOT_CONFIG1

051-0886

A.0.0

12 OF 121

10 OF 54

1

2

1

2

1

2

1

2

1

2

1

2

1 2

1

2

1

2

1 2

3

2

8

111012

4

9

6

7

1

5

2

1

1

2

2

1

1

2

1

2

1

2

1

2

1

2

5

24 25 27 52

4

48

5

44

5

44

5

44

5

44

4 8

11 24 48 52

4

52

5

5

4

5

5

5

5

5

4

4

52

4 5 7

10 18 54

4 5 7

10 18 54

5

5

5

WWW.AliSaler.Com

OUT

IN

OUT

OUT

OUT

DIG_DP

DVSS

DVSS

DVSS

DIG_DN

USB1_DP
USB1_DN

USB0_DP

UART0_TX

USB0_DN

UART1_TX

UART0_RX

UART2_TX

UART1_RX

JTAG_CLK

UART2_RX

JTAG_DIO

ACC_PWR

VDD_3V0

VDD_1V8

P_IN
ACC1
ACC2

DP1
DN1

DP2
DN2

CON_DET_L

HOST_RESET

SWITCH_EN

SDA

INT

SCL

BYPASS

POW_GATE_EN*

BRICK_ID

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

343S0658 = TRISTAR 2, A1

TRISTAR

343S0614 = TRISTAR 1

TO USB BB MUX

(T’S OFF TO H4A UART4)

AP USB

ACCESSORY UART

AP DEBUG UART

TRISTAR BYPASS FOR 3V LDO

BB DEBUG UART

343S0639 = TRISTAR 2, A0

998-5855 = TRISTAR 2, TC

46

4 8

10 24 48 52

48

CRITICAL

C1303

1.0UF

X5R-CERM

10V

20%
0201-1

0.1UF

6.3V

C1302

10%
CERM-X5R

0201

0.1UF

X5R-CERM

C1300

01005

6.3V

20%

0.1UF

20%

6.3V
X5R-CERM
01005

C1301

5

48

+/-0.5PF
16V

01005

8.2PF

C1321

NP0-C0G-CERM

C1320

16V
01005

NP0-C0G-CERM

8.2PF

+/-0.5PF

C1322

16V
NP0-C0G-CERM
01005

+/-0.5PF

8.2PF

R1370

MF

0.00

0%

1/32W
01005

15

C1360

10V

20%
X5R-CERM

1.0UF

0201-1

CRITICAL

C1361

10%

1UF

402

X5R

25V

CBTL1610A1UK

U1300

CRITICAL

WLCSP

SYNC_DATE=N/A

SYNC_MASTER=N/A

IO: TRISTAR

MIKEY_TS_P
MIKEY_TS_N

USB_BB_P
USB_BB_N

USB_SOC_P

UART6_TS_ACC_TXD

USB_SOC_N

UART0_SOC_TXD

UART6_TS_ACC_RXD

UART3_BB2SOC_TX

UART0_SOC_RXD

JTAG_SOC_TCK

UART3_SOC2BB_TX

JTAG_SOC_TMS

=PP3V0_S2R_TRISTAR

PPVBUS_PROT

PPOUT_E75_ACC_ID1
PPOUT_E75_ACC_ID2

E75_DPAIR1_P
E75_DPAIR1_N

E75_DPAIR2_P
E75_DPAIR2_N

TS_CON_DET_L

TS2PMU_RESET_IN

RESET_SOC_L

I2C0_SDA_1V8

GPIO_TS2SOC2PMU_INT

I2C0_SCL_1V8

TRISTAR_BYPASS

NET_SPACING_TYPE=PWR

VOLTAGE=3V
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.1MM

MAX_NECK_LENGTH=0.5MM

OVP_SW_EN_L

PMU_USB_BRICKID

L81_MBUS_REF

=PP1V8_S2R_TRISTAR

=PP3V3_ACC

051-0886

A.0.0

13 OF 121

11 OF 54

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

2

1

C3

F5C1A6

C4

A1
B1

A3

E2

B3

F2

E1

D2

F1

A5

D1

B5

D5

F4

F3

F6
C5
E5

A2
B2

A4
B4

E3

B6

E4

D3

C6

D4

E6

D6

C2

15 52

15 52

24 52 53

24 52 53

4

52

5

52

4

52

5

52

5

52

5

24 28 52

5

52

4

52

5

24 28 52

4

52

54

46 52

43

43

43

43

43

43

43

5

48 52

5

48 52

48

54 54

IN
IN
IN
IN

IN

IN

IN
IN
IN
IN

IN

IN

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

IO0-1

IO7-1

IO6-1

IO3-1
IO4-1
IO5-1

IO1-1
IO2-1

IO7-0

IO5-0
IO6-0

IO4-0

IO2-0
IO3-0

IO1-0

IO0-0

VCC

CLE1

CE1*

CLE0

CE0*

WE0*

ALE0

RE0

RE0*

DQS0*

R/B0*

DQS0

ALE1
WE1*

RE1

RE1*

DQS1

DQS1*

R/B1*

ZQ

VREF

VSSQ

VSS

VCCQ

VDDI

TMSC

TCKC

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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PAGE

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A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

ENSURE TRACE INDUCTANCE < 2NH

LAYOUT NOTE FOR U1400 VDDI:

C1413

2.2UF

X5R-CERM
0201

20%
4V

20%

C1412

15UF

4V
0402

X5R

20%

C1411

15UF

4V
0402

X5R

20%

C1410

4V
X5R

15UF

0402

C1404

20%
4V
X7S

0.47UF

0204

C1407

1UF

20%
X5R

6.3V
02010204

20%

C1405

X6S

4V

1UF

6

52

6

6

6

6

6

53

6

52

6

6

6

6

6

R1454

MF

1%

243

1/32W
01005

0201

20%
4V

C1450

2.2UF

X5R-CERM

6

6

6

6

53

6

6

6

6

6

6

6

6

6

6

6

6

OMIT

LGA-12X17

U1400

CRITICAL

XXNM-XGBX8-MLC-PPN1.5-ODP

R1460

01005

1%
1/32W
MF

50K

R1461

01005

1%
1/32W
MF

50K

6.3V
01005

C1460

X5R

0.01UF

10%

6.3V
01005

C1461

X5R

0.01UF

10%

16V

5%

01005

NP0-C0G

C1491

27PF

16V

5%

01005

NP0-C0G

27PF

C1490

27PF

16V

5%

01005

NP0-C0G

C1492

NP0-C0G
01005

5%
16V

27PF

C1494

27PF

NP0-C0G
01005

5%
16V

C1493

10UF

6.3V
CERM-X5R
0402-2

20%

C1402

20%
CERM-X5R

6.3V
0402-2

10UF

C1401

6.3V

20%

10UF

CERM-X5R
0402-2

C1400

20%

0402-2

CERM-X5R

6.3V

10UF

C1480

1UF

20%

C1406

6.3V
X5R
0201

SYNC_DATE=05/04/2012

NAND STORAGE

SYNC_MASTER=MLB

=PP3V3_NAND

FMI1_AD<3>
FMI1_AD<4>

FMI0_AD<4>

FMI0_CE0_L

NC_U1400_RE0

FMI1_CE0_L

FMI_ZQ_U1400

FMI0_AD<5>

FMI0_RE_L

PPVREF_FMI_NAND

=PP1V8_NAND

FMI1_AD<0>

FMI1_AD<7>

FMI1_AD<6>

FMI1_AD<5>

FMI1_AD<1>

FMI0_AD<7>

FMI0_AD<6>

FMI0_AD<2>
FMI0_AD<3>

FMI0_AD<1>

FMI0_AD<0>

FMI1_CLE

FMI0_CLE

FMI0_WE_L

FMI0_ALE

FMI0_DQS

FMI1_ALE
FMI1_WE_L

NC_U1400_RE1

FMI1_RE_L

FMI1_DQS

NC_U1400_DQS1

TP_TMSC_U1400

TP_TCKC_U1400

TP_U1400_RB0

NC_U1400_DQS0

TP_U1400_RB1

=PP1V8_NAND

PPVDDI_NAND

FMI1_AD<2>

051-0886

A.0.0

14 OF 121

12 OF 54

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1

2

2

1

G1

G7

J7

N3
N5
L7

J1
L1

H6

K6
J5

L5

J3
K2

H2

G3

F2M6B6

C3

C5

A3

A5

E3

C1

B4
C7

F4

E5

H4

D2
E1

D4
D6

M4
K4

E7

A1

G5

OA8

OF8G0OE0

OD8

OC8

N7

OE8

OD0

OC0

A7M2L3F6B2

OF0

G8

N1

OB8

OB0

OA0

1

2

1

2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

54

12 48 54

53

53

53

53

12 48 54

WWW.AliSaler.Com

CAP

ON S

D

VDD

GND

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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NOTICE OF PROPRIETARY PROPERTY:

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PAGE TITLE

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IV ALL RIGHTS RESERVED

R

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SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

TOUCH SUBSYSTEM

(PLUG - FLEX 998-4527)

RCPT - MLB 998-4526 -> 516S1054

LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION

0.38 DCR

1/32W

MF

R1752

0.00

0%

01005

J1700

503304-2010

CRITICAL

F-ST-SM-1

MF

R1790

1/32W

1.00K

1%

01005

R1753

0.00

01005

MF

0%

1/32W

NOSTUFF

C1761

27PF

5%
NP0-C0G

16V
01005

0201

C1702

X7R-CERM

16V

1000PF

10%

X5R

10V

10%

1UF

402

C1701

27PF

01005

16V
NP0-C0G

5%

C1700

L1700

0201

240OHM-350MA

1000PF

16V
X7R-CERM
0201

C1705

10%

C1704

0201

X5R

6.3V

20%

1UF

0201

10%

1000PF

X7R-CERM

C1708

16V

X5R

6.3V

20%

1UF

0201

C1707

5%

27PF

NP0-C0G

C1703

16V
01005

240OHM-350MA

0201

L1701

0201-2

240-OHM-0.2A-0.8-OHM

L1702

01005

5%

27PF

NP0-C0G

16V

C1706

6.3V
X5R

1UF

20%
0201

C1752

CRITICAL

SLG5AP302

U1700

TDFN

CRITICAL

C1750

0201

10%

0.1UF

X5R-CERM

16V

CRITICAL

C1751

10%
X7R

10V

4700PF

201

CRITICAL

1%

100K

R1751

MF

1/32W
01005

X5R-CERM

10UF

C1753

20%
0402-2

10V

CRITICAL

01005

150OHM-25%-200MA-0.7DCR

L1760

C1760

27PF

5%
NP0-C0G

16V
01005

TOUCH: SUPPORT CKT & CONN

SYNC_MASTER=N/A

SYNC_DATE=06/21/2010

PP1V8_GRAPE_SW

GPIO_BTN_HOME_L

GPIO_BTN_HOME_FILT_L

GPIO_BTN_HOME_R_L

PP3V0_S2R_HALL_FILT

DISPLAY_SYNC_R

SPI1_GRAPE_MOSI

SPI1_GRAPE_MISO

GPIO_GRAPE_IRQ_L

CLK_32K_SOC2CUMULUS

SPI1_GRAPE_CS_L

PP1V8_GRAPE_FILT

GPIO_GRAPE_RST_L

GPIO_BTN_HOME_FILT_L

NC_PMU_GPIO_HALL_IRQ_4

PMU_GPIO_MB_HALL3_IRQ
PMU_GPIO_MB_HALL2_IRQ
PMU_GPIO_MB_HALL1_IRQ

PP5V25_GRAPE_FILT

SPI1_GRAPE_SCLK_R

SPI1_GRAPE_SCLK

DISPLAY_SYNC

=PP3V0_S2R_HALL

PP3V0_S2R_HALL_FILT

VCC_MAIN_GRAPE_RAMP

=PP1V8_GRAPE

=PPVCC_MAIN_GRAPE

=PP1V8_S2R_GRAPE

=PP5V25_GRAPE

PP5V25_GRAPE_FILT

PP1V8_GRAPE_FILT

051-0886

A.0.0

17 OF 121

13 OF 54

1 2

13

17

24

23

19

11

15

9

7

5

1
3

18
20

12
14
16

8

10

6

4

2

22
21

1 2

1 2

2

1

2

1

2

1

2

1

21

2

1

2

1

2

1

2

1

2

1

21

21

2

1

2

1

7

2 5

3

18

2

1

2

1

1

2

2

1

21

2

1

52

5

48 13 52

13 52

52

5

52

5

52

5

52

5

52

5

52

13 52

5

52

13 52

48

48

48

13 52

52

5

5

54 13 52

54

54

54

54 13 52

13 52

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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NOTICE OF PROPRIETARY PROPERTY:

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SHEET

IV ALL RIGHTS RESERVED

R

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SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(P/N 510S0761 - FLEX)

P/N 510S0760 - MLB

AUDIO_JACK_FLEX RET1

AUDIO_JACK_FLEX MIC2

AUDIO_JACK_FLEX MIC1

AUDIO_JACK_FLEX RET2

PER DAVE BREECE

J1800

CRITICAL

AA07A-S016VA1

F-ST-SM-COMBO

0201-2

L1800

240-OHM-0.2A-0.8-OHM

C1800

NP0-C0G

16V

27PF

5%

01005

0.1UF

10%

6.3V

C1801

CERM-X5R
0201

NP0-C0G

16V

27PF

5%
01005

C1802

R1850

0%

0.00

MF

1/32W
01005

NOSTUFF

NP0-C0G

16V

5%

C1850

01005

27PF

01005

5%
16V
NP0-C0G

56PF

C1821

5%
16V
NP0-C0G

56PF

C1820

01005 01005

C1822

56PF

NP0-C0G

16V

5%5%
16V
NP0-C0G

56PF

01005

C1830

AUDIO: HP FLEX CONN

SYNC_DATE=03/31/2011

SYNC_MASTER=N/A

MIN_NECK_WIDTH=0.06 MM

VOLTAGE=2.65V

PP_LDO14_2V65

LAT_SW2_CTL

GPIO_SOC2AJ_HS3_SHUNT_EN

PP1V8_DMIC_FILT

LAT_SW1_CTL

CONN_HP_LEFT_FILT

CONN_HP_RIGHT_FILT

CONN_HP_HS3_FILT

CONN_HP_HEADSET_DET_FILT

CONN_HP_HS3_REF_FILT

GPIO_SOC2AJ_HS4_SHUNT_EN

DMIC1_FF_SCLK_FILT

DMIC1_FF_SD

CONN_HP_HS4_REF_FILT

CONN_HP_HS4_FILT

DMIC1_FF_SCLK

=PP1V8_DMIC

051-0886

A.0.0

18 OF 121

14 OF 54

20

19

18
17

15

13

11

9

7

1

16

14

12

10

8

6

4

2

5

3

21

2

1

2

1

2

1

1 2

2

1

2

1

2

1

2

1

2

1

25 32 33 39 40

28 52

5

24 28 52

15

15

15

15

15

5

15

15

15

15

54

WWW.AliSaler.Com

IN

IN
IN

IN
IN
IN
IN

IN
IN
IN
IN

OUT
OUT

IN

OUT

IN

OUT
OUT

IN

IN

IN

IN

BI
BI

OUT

OUT

SYM 2 OF 2

DMIC1_SCLK

DMIC2_SD

MCLK

GND13

GND0

TSTI2

TSTI1

TSTI0

GND18

GND17

GND16

GND15

GND14

GND12

GND11

GND10

GND9

GND8

GND7

GND6

GND5

GND4

GND3

GND2

GND1

RESET*

WAKE*

INT*

CDOUT

CDIN

CCLK

XSP_SDOUT

XSP_SDIN_DAC2_MUTE

XSP_LRCK_FSYNC

XSP_SCLK

ASP_SDOUT

ASP_SDIN

ASP_LRCK

ASP_SCLK

DMIC2_SCLK

DMIC1_SD

CS*

MBUS_REF

SYM 1 OF 2

FLYP

MIC4_BIAS_FILT

AIN3+

AIN1-

FLYN

GNDA

MIC1_BIAS

MIC2_BIAS_FILT_IN
MIC2_BIAS_FILT

MIC2_BIAS

AIN2+
AIN2M

MIC2_BIAS_IN

AIN3-

MIC3_BIAS

MIC3_BIAS_FILT

AIN4+
AIN4-

MIC4_BIAS

GNDP

GNDD

GNDHS

+VCP_FILT

FILT-

FILT+

LINEOUT_REF

LINEOUTB

LINEOUTA

HPDETECT

HS4_REF

HS3_REF

HS4

HS3

HPOUTB

HPOUTA

DN

DP

AOUT2-

AOUT2+

AOUT1_M

AOUT1+

GNDCP

-VCP_FILT

VA

VCP1

VD

VP0VLVP1

VPROG_CP

VPROG_MB

SPEAKER_VQ

AIN1+

MIC1_BIAS_FILT

GNDHS

FLYC

VCP0

IN

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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NOTICE OF PROPRIETARY PROPERTY:

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PAGE TITLE

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IV ALL RIGHTS RESERVED

R

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DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

DIGITAL MIC

TO HEADPHONE JACK

TO THE HP CONNECTOR

U1900 DECAPS CHANGED ON 5/24/12 PER RADAR #11485846

NOTE:

PLACE R1930 & R1931 CLOSE TO U3600

MIKEY BUS FILTER

PLACE L1900 TO 1905 CLOSE

14

0402

10UF

CERM-X5R

CRITICAL

20%

6.3V

C1910

XW1900

SHORT-8L-0.25MM-SM

NOSTUFF

CRITICAL

20%
X5R

4.7UF

C1907

402

6.3V

CRITICAL

4.7UF

X5R

20%

402

6.3V

C1908

22

01005

5%

1/32W

MF

R1912

22

MF

1/32W

5%

01005

R1913

14

14

5

5

22

01005

MF5%

1/32W

R1910

MF

01005

5%

22

R1911

1/32W

5

5

5

5

53

5

53

5

5

5

53

5

53

5

53

5

53

5

52

48 52

48

C1912

X5R

6.3V
402

20%

4.7UF

MF

1/20W

2.21K

1%

R1901

201

0201-1

20%

1.0UF

C1911

X5R

6.3V

1.00K

5%
1/32W
MF
01005

NOSTUFF

R1940

14

14

11

XW1902

NOSTUFF

SHORT-8L-0.25MM-SM

0201 CERM-X5R

0.1UF

10%

6.3V

C1916

0201 CERM-X5R

0.1UF

10%

6.3V

C1917

SHORT-8L-0.25MM-SM

XW1903

NOSTUFF

R1931

5%
MF

12

201

1/20W

R1930

5%

MF

201

1/20W

12

C1932

5%
25V

0201

NP0-CERM

100PF

SIGNAL_MODEL=EMPTY

C1931

5%

100PF

0201

NP0-CERM

25V

NOSTUFF

C1930

5%
NP0-CERM

25V

100PF

0201

SIGNAL_MODEL=EMPTY

11 52

11 52

L1900

FERR-33-OHM-0.8A-0.09-OHM

0201

L1901

FERR-33-OHM-0.8A-0.09-OHM

0201

L1902

FERR-33-OHM-0.8A-0.09-OHM

0201

L1903

FERR-33-OHM-0.8A-0.09-OHM

0201

L1904

01005

120-OHM-210MA

L1905

120-OHM-210MA

01005

14

14

C1990

01005

16V
NP0-C0G

100PF

5%

C1991

5%

100PF

NP0-C0G

16V
01005

0201

R1950

1.00

1%

1/20W

MF-LF

0201-1

1.0UF

20%

6.3V

CRITICAL

X5R

C1951

X5R

C1950

4.7UF

CRITICAL

20%

402

6.3V

0201

R1951

1/20W

1%

1.00

MF-LF

MF

1/20W

1%

R1952

255K

201

C1913

0.1UF

10%

0201

X5R-CERM

10V

5%
1/20W
MF

0

R1953

201

U1900

WLCSP

CS42L81-CWZR-A1

CRITICAL

WLCSP

U1900

CS42L81-CWZR-A1

0.1UF

0201

X5R-CERM

10V

C1914

10%

CRITICAL

X5R-CERM

4.7UF

20%
10V

0402

C1909C1904

10V

X5R-CERM

0201

10%

0.1UF

20%

6.3V
X5R-CERM
01005

C1915

0.1UF

20%

01005

X5R-CERM

6.3V

0.1UF

C1902

0201

10%

0.1UF

X5R-CERM

10V

CRITICAL

C1903

4.7UF

CRITICAL

6.3V

C1901

X5R
402

20%

4.7UF

C1905

X5R

6.3V

20%

402

C1906

20%

4.7UF

6.3V
402 X5R

14

L1920

240-OHM-0.2A-0.8-OHM

0201-2

C1920

4700PF

10%
10V
X7R
201

NOSTUFF

R1920

01005

3.3K

1/32W

5%
MF

14

SYNC_DATE=01/18/2012

AUDIO: L81 CODEC

SYNC_MASTER=KAVITHA

338S1213 338S1116

RADAR:13373870 SSMC FAB

U1900

155S0773 155S0453

L1904,L1905

RADAR:11100717

=PP1V7_VA_VCP

NO_TEST=TRUE

NC_MIC4_BIAS

MIN_NECK_WIDTH=0.1MM

MIN_LINE_WIDTH=0.15MM

CODEC_HP_HS4_REF

=PP1V8_AUDIO

L81_FLYP

0.15MM

0.3MM

L81_FLYC

0.15MM

0.3MM

GND_AUDIO_CODEC

MIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.15MM

PP1V7_VCP

VOLTAGE=1.7V

NO_TEST=TRUE

AIN1P

NO_TEST=TRUE

AIN1N

L81_MIC2_BIAS

L81_MIC2_BIAS_FILT_IN

HP_MIC_POS

MIC1_BIAS_FILT

NO_TEST=TRUE

SPI2_CODEC_MISO

SPI2_CODEC_MOSI

SPI2_CODEC_SCLK

SPI2_CODEC_CS_L

L81_MBUS_REF

I2S2_CODEC_XSP_DOUT

L81_FILT

0.30MM

L81_PVCP

0.15MM

GND_AUDIO_CODEC

L81_NVCP

0.30MM

0.15MM

NO_TEST=TRUE

NC_RIGHT_CH_OUT_N

NO_TEST=TRUE

NC_RIGHT_CH_OUT_P

L81_AIN2_POS

VOLTAGE=4.2V
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.15MM

PPVCC_VPROG_CP

=PPVCC_MAIN_AUDIO

GND_AUDIO_CODEC

MIC4_BIAS_FILT

NO_TEST=TRUE

MIN_NECK_WIDTH=0.15MM

PPVCC_VPROG_MB

VOLTAGE=4.2V
MIN_LINE_WIDTH=0.3MM

L81_FLYN

0.15MM

0.3MM

PPVCC_VPROG_MB_F

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.3MM

VOLTAGE=4.2V

0.15MM

0.20MM

GND_AUDIO_CODEC

VOLTAGE=0V

I2S2_CODEC_XSP_SDOUT

I2S2_CODEC_XSP_DIN

DMIC1_FF_SCLK

DMIC1_FF_SD

I2S0_CODEC_ASP_SDOUT

I2S0_CODEC_ASP_DIN

L81_DMIC1_FF_SD

NC_DMIC2_SCLK

NO_TEST=TRUE

I2S0_CODEC_ASP_BCLK
I2S0_CODEC_ASP_LRCK
I2S0_CODEC_ASP_DOUT

I2S2_CODEC_XSP_BCLK
I2S2_CODEC_XSP_LRCK

GPIO_CODEC_IRQ_L
PMU_GPIO_CODEC_HS_INT_L

I2S0_CODEC_ASP_MCK

L81_DMIC1_FF_SCLK

PMU_GPIO_CODEC_RST_L

=PP1V8_AUDIO

CODEC_MIC_BIAS_FILT

MAKE_BASE=TRUE

NC_MIC3_BIAS

NO_TEST=TRUE

NO_TEST=TRUE

NC_MIC1_BIAS

AIN4P
AIN4N

MAKE_BASE=TRUE

CODEC_AIN

AIN3P
AIN3N

AIN1N

AIN1P

MIC1_BIAS_FILT

MIC4_BIAS_FILT

MIC3_BIAS_FILT

L81_MIC2_BIAS_IN

L81_AIN2_NEG

CODEC_HP_HS3

CODEC_HP_RIGHT

MIN_LINE_WIDTH=0.20MM MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM

CODEC_HP_HS3

MIN_LINE_WIDTH=0.50MM MIN_NECK_WIDTH=0.20MM

CODEC_HP_HS4

MIN_NECK_WIDTH=0.15MM

CODEC_HP_LEFT

MIN_LINE_WIDTH=0.20MM

L81_MBUS_P

CONN_HP_HS3_FILT

MIN_LINE_WIDTH=0.50MM
MIN_NECK_WIDTH=0.20MM

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.20MM

CONN_HP_RIGHT_FILT

MIN_LINE_WIDTH=0.20MM

CONN_HP_LEFT_FILT

MIN_NECK_WIDTH=0.15MM

CODEC_HP_DET_R

MIN_LINE_WIDTH=0.50MM

CONN_HP_HS4_FILT

MIN_NECK_WIDTH=0.20MM

L81_MBUS_N

AIN4N

NO_TEST=TRUE

MIC3_BIAS_FILT

NO_TEST=TRUE

NO_TEST=TRUE

AIN3N

NO_TEST=TRUE

AIN3P

CONN_HP_HEADSET_DET_FILT

CODEC_HP_DET

NO_TEST=TRUE

NC_LEFT_CH_OUT_N

CODEC_HP_DET

CODEC_HP_HS4

HP_MIC_NEG

NO_TEST=TRUE

AIN4P

NO_TEST=TRUE

NC_LEFT_CH_OUT_P

NO_TEST=TRUE

NC_CODEC_LINE_OUT_R

NC_CODEC_LINE_OUT_L

NO_TEST=TRUE

MIN_NECK_WIDTH=0.1MM

MIN_LINE_WIDTH=0.15MM

CONN_HP_HS3_REF_FILT

MIN_NECK_WIDTH=0.1MM

CONN_HP_HS4_REF_FILT

MIN_LINE_WIDTH=0.15MM

L81_MIC2_BIAS_FILT

CODEC_HP_HS3_REF

MIN_NECK_WIDTH=0.1MM

MIN_LINE_WIDTH=0.15MM

L81_MBUS_N

L81_MBUS_P MIKEY_TS_P

MIKEY_TS_N

NC_SPEAKER_VQ

051-0886

A.0.0

19 OF 121

15 OF 54

2

1

21

1 2

1 2

1 2
1 2

1 2

1 2

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2

1

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2

2 1

1 2

1 2

2 1

1 2

1 2

2

1

2

1

2

1

21

21

21

21

21

21

2

1

2

1

1 2

2

1

2

1

1 2

1 2

2

1

1

2

B2

B7

C8

G5

C6

D4

C7

C4

J5

H7

H5

G7

G6

F8

F7

F6

F5

E7

E6

E5

D8

D7

D6

D5

D3

C9

B10

B9

A7

B8

A6

A4

A5

B5

B4

A1

A2

B3

A3

B6

B1

C5

K5

H10

F2

C3

E4

K10

G2

H2

K3
F3

G4

C1
D1

J3

C2

H4

G3

D2
E2

F4

E10

A10

J2

H9

F1

E1

H6

J6

K6

H8

J7

K7

K1

J1

K8

J8

K4

J4

D9

D10

F9

F10

J9
K9

G1

G9

A9E8A8

E9

G10

H1

C10

E3

H3

K2

J10

G8

2

1

2

1

2

1

2

1

2

1

2

1

2

1

12

12

21

2

1

1 2

16 54

52

15 54

15 52

15

15

15

15 52

16 54

15 52

15

15 52

15 54

15

15

15

15

15

15

15

15

15

15 52

52

15 52

15 52

52

15

52

15

15

15

15

15

15

15

15 52

15

52

15

15

FILT+

SCL

VP

SDA

VA

ADO

VBST

SW

GNDA

IREF+

OUT+
OUT-

ISENSE+

ISENSE-

VSENSE+

VSENSE-

LDO_FILT

GNDP

INT*

RESET*

ALIVE

MCLK

SCLK

LRCK/FSYNC

SDIN

SDOUT

VER1

FILT+

SCL

VP

SDA

VA

ADO

VBST

SW

GNDA

IREF+

OUT+
OUT-

ISENSE+

ISENSE-

VSENSE+

VSENSE-

LDO_FILT

GNDP

INT*

RESET*

ALIVE

MCLK

SCLK

LRCK/FSYNC

SDIN

SDOUT

VER1

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

SPEAKER CONNECTOR

UPDATED: DEC 13

BY MARCH 2013. C0 FIXES PROCESS ISSUES.

2. THE CURRENT VERSION OF L19 IS B0 AND WILL CHANGE TO C0

REMOVED BASED ON PERFORMANCE ON J65

1. ALL THE EMI/DESSENSE FILTER COMPONENTS HAVE BEEN

I2C ADDRESS: 1000000X

PLACE XWS CLOSE TO CONNECTOR

LEFT SPEAKER AMP

I2C ADDRESS: 1000001X

RIGHT SPEAKER AMP

TFA302610A-SM

2.2UH-20%-3.3A-0.115OHM

L2050

U2040

WLCSP

CS35L19B-CWZR/C0

WLCSP

U2050

CS35L19B-CWZR/C0

CRITICAL

0402-1

X5R-CERM

20%
10V

10UF

C2094C2092

0.1UF
10%
10V

X5R-CERM

0201

C2093

10V

10%

0.1UF

X5R-CERM

0201

X5R-CERM

10UF

CRITICAL

C2095

10V

20%

0402-1

CRITICAL

X5R-CERM
0402-1

20%
10V

10UF

C2091

CRITICAL

C2090

10V

20%

0402-1

X5R-CERM

10UF

10V

C2042

CRITICAL

X5R-CERM

4.7UF

0402

20%

SIGNAL_MODEL=EMPTY

SM

XW2051

SIGNAL_MODEL=EMPTY

SM

XW2050

SIGNAL_MODEL=EMPTY

SM

XW2040

SIGNAL_MODEL=EMPTY

SM

XW2041

C2054

10V
0201

10%

0.1UF

X5R-CERM

C2055

603

X5R

10V

20%

10UF

CRITICAL

R2051

201

MF

1%

44.2K

1/20W

6.3V
CERM-X5R

0.1UF

10%

C2056

0201

4.7UF

X5R-CERM1

CRITICAL

C2058

6.3V

20%

402

402

C2057

20%

CRITICAL

4.7UF

X5R-CERM1

6.3V

R2041

201

MF

1%
1/20W

44.2K

X5R-CERM1

4.7UF

C2048

402

20%

6.3V

CRITICAL

20%

0402

10V

X5R-CERM

C2041

CRITICAL

4.7UF

CRITICAL

C2051

0402

10V

20%

4.7UF

X5R-CERM

C2043

0402

X5R-CERM

10V

CRITICAL

4.7UF

20%

CRITICAL

TFA302610A-SM

L2040

2.2UH-20%-3.3A-0.115OHM

10%

C2044

X5R-CERM

0.1UF

10V
0201

CRITICAL

10UF

C2045

20%
10V
X5R
603

CERM-X5R

10%

6.3V

0.1UF

C2046

0201

X5R-CERM1

CRITICAL

C2047

20%

6.3V

4.7UF

402

MF

1%

1/4W

0.100

R2050

CRITICAL

0402

1%
MF

1/4W

CRITICAL

0.100

R2040

0402

CRITICAL

C2052

X5R-CERM

4.7UF

0402

10V

20%

CRITICAL

C2053

20%
10V

0402

4.7UF

X5R-CERM

SIGNAL_MODEL=EMPTY

XW2077

SM

XW2076

SM

SIGNAL_MODEL=EMPTY

XW2075

SIGNAL_MODEL=EMPTY

SM

SIGNAL_MODEL=EMPTY

SM

XW2074

SYNC_MASTER=KAVITHA

AUDIO: CS35L19A AMPS

SYNC_DATE=01/18/2012

GPIO_SPKAMP_KEEPALIVE

I2C2_SDA_1V8

I2S1_SPKAMP_MCK

SPKR_L_CONN_P

SPKR_L_CONN_P

MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.5 MM

I2S1_SPKAMP_DIN

SPKR_R_VSENSE_N

SPKR_R_VSENSE_N

SPKR_R_CONN_P

SPKR_R_CONN_P

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MM

=PP1V7_VA_VCP

SPKR_R_SES_P

SPKR_L_SES_P

SPKR_L_VSENSE_N

SPKR_L_VSENSE_N

=PPVCC_MAIN_AUDIO

SPKR_L_VSENSE_P

SPKR_L_VSENSE_P

SPKR_R_VSENSE_P

SPKR_R_VSENSE_P

L19_R_SWITCH

PP1V7_VA_VCP

I2S1_SPKAMP_BCLK
I2S1_SPKAMP_LRCK

GPIO_SPKAMP_RIGHT_IRQ_L

L19_L_LDO_FILT

L19_R_LDO_FILT

GPIO_SPKAMP_RST_L

NET_SPACING_TYPE=PWR

L19_L_VBOOST

L19_R_IREF

L19_L_FILT

L19_L_SWITCH

L19_L_IREF

GPIO_SPKAMP_LEFT_IRQ_L

I2S1_SPKAMP_BCLK
I2S1_SPKAMP_LRCK
I2S1_SPKAMP_DOUT

I2C2_SDA_1V8

GPIO_SPKAMP_KEEPALIVE

I2C2_SCL_1V8

GPIO_SPKAMP_RST_L

I2S1_SPKAMP_MCK

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MM

SPKR_L_CONN_N

SPKR_L_CONN_N

SPKR_L_P

MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM

SPKR_L_SES_N

MIN_LINE_WIDTH=0.5 MM

SPKR_R_CONN_N

MIN_NECK_WIDTH=0.2 MM

SPKR_R_CONN_N

SPKR_R_P

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MM

L19_R_FILT

I2C2_SCL_1V8

I2S1_SPKAMP_DIN

I2S1_SPKAMP_DOUT

NET_SPACING_TYPE=PWR

L19_R_VBOOST

=PPVCC_MAIN_AUDIO

SPKR_R_SES_N

=PP1V7_VA_VCP

20 OF 121

A.0.0

051-0886

4 OF 4

16 OF 54

21

F2

D1D6A4

B1

C1

D5

F5

C7

A5

A1

A2

D4

F4

F3

B5

B6

C6

E4

C4

C3

B4

B3

B7

D2
C2

E1

F1

E2

E3

C5

D3

A3

A7

A6

D7

E7

E6

F6

F7

E5

B2

F2

D1D6A4

B1

C1

D5

F5

C7

A5

A1

A2

D4

F4

F3

B5

B6

C6

E4

C4

C3

B4

B3

B7

D2
C2

E1

F1

E2

E3

C5

D3

A3

A7

A6

D7

E7

E6

F6

F7

E5

B2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1

2

2

1

1 2

1 2

1

2

1 2

2

1

2

1

2

1

21

2

1

2

1

2

1

1 2

1 2

1 2

2

1

2

1

1 2

1 2

1 2

1 2

5

16 52

5

16 52

5

16 53

16 43 52 16 43

52

5

16 53

16

16

16 43 52 16 43

52

15 16 54

16

16

15 16 54

16

16

16

16

47 52 54

5

16 53

5

16 53

5

5

16

5

5

16 53

5

16 53

5

16 53

5

16 52

5

16 52

5

16 52

5

16

5

16 53

16 43 52 16 43

52

16 43
52

16 43 52

5

16 52

5

16 53

5

16 53

15 16 54 15 16 54

WWW.AliSaler.Com

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BUTTON CONNECTOR

(MOVED HERE TO SUPPORT COST FORMAT)

(REF DES PRESERVED FOR LAYOUT)

516S0828

01005

MF

1%

1/32W

1.00K

R2900

01005

MF

1/32W

1%

1.00K

R2901

01005

MF

1%

1/32W

1.00K

R2902

01005

1/32W

MF

1%

1.00K

R2903

12.8V-100PF

201-1

DZ2960

12.8V-100PF

201-1

DZ2961

201-1

12.8V-100PF

DZ2962

12.8V-100PF

201-1

DZ2963

CRITICAL

J2960

F-ST-SM

503548-1010

25V
0201

CERM

82PF

5%

C2963

0201-2

240-OHM-0.2A-0.8-OHM

L2963

82PF

5%
25V

0201

CERM

C2962

0201-2

240-OHM-0.2A-0.8-OHM

L2962

82PF

25V
0201

CERM

5%

C2961

0201-2

240-OHM-0.2A-0.8-OHM

L2961

CERM
0201

25V

82PF

5%

C2960

0201-2

240-OHM-0.2A-0.8-OHM

L2960

BUTTON: CONN

SYNC_DATE=N/A

SYNC_MASTER=N/A

GPIO_BTN_ONOFF_R_L

GPIO_BTN_VOL_UP_R_L

GPIO_BTN_VOL_DOWN_R_L

GPIO_BTN_SRL_R_L

GPIO_BTN_VOL_DOWN_L

GPIO_BTN_VOL_UP_L

GPIO_BTN_ONOFF_L

GPIO_BTN_SRL_L

GPIO_BTN_ONOFF_L_FILT

GPIO_BTN_VOL_UP_L_FILT
GPIO_BTN_SRL_L_FILT

GPIO_BTN_VOL_DOWN_L_FILT

051-0886

A.0.0

21 OF 121

17 OF 54

1 2

1 2

1 2

1 2

1

2

1

2

1

2

1

2

1

5

3

10

8

6

4

9

7

2

13

11 12

14

2

1

21

2

1

21

2

1

21

2

1

21

5

5

5

48

5

48

52

52

52

52

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN
IN
IN
IN

IN

IN

IN

NC

IN

OUT

SYM_VER-2

SYM_VER-2

SYM_VER-2

SYM_VER-2

SYM_VER-2

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

GND

VDD

D

SON

CAP

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

REVIEW: 4700PF 0201 132S0187

EDP CONNECTOR SUPPORT

LAYOUT NOTE:
PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION

REVIEW: CAN/SHOULD WE USE 132S0316, 0.1UF 20%, 01005

RDAR://PROBLEM/12579948

RDAR://PROBLEM/12579963

TO REDUCE THE 2.5V FROM THE TCON TO 1.8V TO THE AP?

REVIEW: WILL THE DISPLAY INCLUDE A VOLTAGE DIVIDER

RDAR://PROBLEM/12579981

P/N 516S1056

NOTE:

HOWEVER TO BE CONSERVATIVE, DIVIDER CKT IS NOT REMOVED

PER GREG DE MERCEY, EDP_HPD PIN IS 2.5V TOLERANT

BACK-UP DELAYED PWREN CKT

7

C2221

NP0-C0G-CERM

50V

56PF

2%

0201

18

18

18 53

18 53

18 53

18 53

18 53

18 53

18 53

18 53

L2240

01005

240-OHM-25%-0.20A-1.0DCR

C2260

27PF

NP0-C0G

16V

5%
01005

5%

R2243

MF

1/32W
01005

100K

18 53

18 53

18 53

18 53

18 53

18 53

18 53

18 53

18

18

C2232

16V
01005

NP0-C0G-CERM

15PF

5%

F-ST-SM-1

CRITICAL

AA07A-S032-VA1

J2201

L2201

0402A

CRITICAL

FERR-120-OHM-1.5A

47

47

47

47

47

18 52

47

CERM

C2230

82PF

0201

5%
25V

18 52

1/32W

MF

01005

R2250

7.5K

5%

U2201

CRITICAL

SOT891

74LVC1G32

LCM_PWR_EN_OR_GATE

LCM_PWR_EN_OR_GATE

0.1UF

6.3V

20%

01005

X5R-CERM

C2270

5

18

01005

0.00

0%

R2290

MF

1/32W

LCM_PWR_EN_OR_GATE

CRITICAL

C2202

20%

10UF

0402

6.3V
CERM-X5R

5

18

1/32W

MF

0%

0.00

R2291

01005

LCM_PWR_EN_RES

0.1UF

X5R-CERM

C2203

0201

16V

10%

R2242

1/32W
01005

MF

5%

20.0K

+/-0.5PF

C2233

50V
C0G-CERM

8.2PF

201

0402

220-OHM-1A

L2200

CRITICAL

3.25-OHM-0.1A-2.4GHZ

L2242

CRITICAL

TAM0605-4SM

5%

R2241

100K

MF
01005

1/32W

3.25-OHM-0.1A-2.4GHZ

L2212

CRITICAL

TAM0605-4SM

3.25-OHM-0.1A-2.4GHZ

L2222

CRITICAL

TAM0605-4SM

3.25-OHM-0.1A-2.4GHZ

CRITICAL

L2232

TAM0605-4SM

C2250

01005

0.1UF

6.3V X5R-CERM

20%

C2251

6.3V

0.1UF

X5R-CERM

20%

01005

C2242

0.1UF

6.3V X5R-CERM

20%

01005

20%

0.1UF

C2243

6.3V X5R-CERM

01005

0.1UF

C2244

X5R-CERM

20%

01005

6.3V

0.1UF

C2245

6.3V X5R-CERM

20%

01005

0.1UF

C2246

6.3V X5R-CERM

20%

01005

0.1UF

C2247

6.3V X5R-CERM

20%

01005

0.1UF

C2248

6.3V X5R-CERM

20%

01005

3.25-OHM-0.1A-2.4GHZ

L2202

CRITICAL

TAM0605-4SM

C2249

0.1UF

6.3V X5R-CERM

20%

01005

0201

16V

0.1UF

X5R-CERM

C2239

10%

5

18

7

7

MF

100K

5%
1/32W

01005

R2205

7

53

7

53

7

53

7

53

7

53

7

53

7

53

7

53

TDFN

CRITICAL

U2200

SLG5AP304V

OMIT

C2240

0201

0.1UF

X5R-CERM

16V

10%

0402

10%
X7R

3900PF

C2241

50V

VIDEO: EDP SUPPORT & CONN

SYNC_MASTER=J85 MLB_C

SYNC_DATE=12/05/2012

155S0667 155S0583

RDAR://PROBLEM/8616060, RADAR://PROBLEM/9015335

L2242,L2810,L2811,L2812,L2813,L2814,L2710,L2711,L2712,L6030,L6031

EDP_DATA_EMI_CONN_P<0>

EDP_DATA_EMI_CONN_N<0>

EDP_DATA_EMI_CONN_P<1>

EDP_DATA_EMI_N<1>

EDP_DATA_EMI_P<1>

EDP_AUX_EMI_N

EDP_AUX_EMI_P

EDP_AUX_P

LCM_OFF_L

EDP_DATA_N<1>

EDP_DATA_N<0>

EDP_DATA_P<0>

EDP_DATA_N<2>

PPVCC_MAIN_LCD_SW_CONN

=PPLED_REG_A

PPLED_BACK_REG_A

GPIO_SOC2LCD_PWREN

LCD_RAMP

EDP_AUX_EMI_CONN_N

EDP_AUX_EMI_CONN_P

EDP_DATA_EMI_CONN_N<1>

EDP_DATA_EMI_CONN_P<2>

EDP_DATA_EMI_CONN_N<2>

EDP_DATA_EMI_CONN_P<3>

EDP_DATA_EMI_CONN_N<3>

EDP_AUX_N

EDP_DATA_EMI_P<0>

EDP_DATA_EMI_N<0>

EDP_DATA_EMI_N<2>

EDP_DATA_P<1>

EDP_DATA_EMI_P<2>

EDP_DATA_EMI_P<3>

EDP_DATA_P<2>

EDP_DATA_N<3>

EDP_DATA_P<3>

PPVCC_MAIN_LCD_SW

EDP_HPD

EDP_HPD_2P5EDP_HPD_EMI

PPVCC_MAIN_LCD_SW_CONN

EDP_DATA_EMI_CONN_N<2>
EDP_DATA_EMI_CONN_P<2>

EDP_DATA_EMI_CONN_N<1>
EDP_DATA_EMI_CONN_P<1>

EDP_DATA_EMI_CONN_N<3>EDP_HPD_EMI

EDP_AUX_EMI_CONN_P

EDP_DATA_EMI_CONN_N<0>
EDP_DATA_EMI_CONN_P<0>

EDP_AUX_EMI_CONN_N

EDP_DATA_EMI_CONN_P<3>

LED_IO_5_A

LED_IO_6_A

LED_IO_4_A

LED_IO_2_A

LED_IO_3_A

LED_IO_1_A

PPLED_BACK_REG_A

=PPVCC_MAIN_LCD

GPIO_SOC2LCD_PWREN

NC_U2201_5

GPIO_SOC2LCD_PWREN

GATE2LCD_PWREN

=PP1V8_SOC

EDP_DATA_EMI_N<3>

051-0886

A.0.0

22 OF 121

18 OF 54

2

1

21

2

1

1

2

2

1

9
11
13
15
17

3

7

14
16
18

12

10

8

4
6

2

31

29

19
21
23
25
27

32

30

26
28

24

22

20

5

1

3334

3536

21

2

1

1 2

2

6

1

4

35

2

1

1 2

2

1

1 2

2

1

1

2

2

1

21

4

32

1

1

2

4

32

1

4

32

1

4

32

1

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

4

32

1

1 2

2

1

1

2

8 1

3

52

7

2

1

2

1

53

53

18 52

54 18 52

53

53

53

53

53

18

18

54

4 5 7

10 54

53

WWW.AliSaler.Com

OUT
OUT

OUT

IN

IN

IN

VSS

VSS

RESET*

P0_10

P0_9

P0_8

P0_7

P0_4
P0_5

P0_3

P0_2

P0_1

P0_0

DBGEN

P0_20
P0_21
P0_22

P0_18
P0_19

P0_15

P0_17

P0_16

P0_14

P0_12

P0_11

VDDC

VDDIO

VDDC

P0_13

P0_6

OUT

IN

IN

BI

IN

IN

OUT

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

RDAR://PROBLEM/12580012

COMPARE SENSOR CONNECTIONS WITH N51, IDENTIFY AND UNDERSTAND DIFFERENCES

REVIEW: N51 HAS OSCAR I2C CONNECTED TO RF CAM I2C

OSCAR CORE = 1.2V HIBERNATE (NEED TO RUN IN S2R)

APN 337S4416

NOTE: I2C1 IS ASSUMED TO USE PUSH-PULL INSTEAD OF OPEN-DRAIN

OSCAR

REVIEW:NEED PU ON CS?
RDAR://PROBLEM/12579997

OSCAR VDDIO = 1.8V HIBERNATE (NEED TO WAKE HOST)

28 44 52

28 44 52

21

21

MF

5%

15.0

01005

1/32W

R2405

R2406

MF

1/32W

5%

15.0

01005

21

5

MF

1/32W

0.00

0%

R2450

01005

CRITICAL

WLCSP

U2400

LPC18A1UK-CPA1

0201-1

6.3V
X5R

20%

1.0UF

C2400

X5R

6.3V

1.0UF

20%

0201-1

C2401

5%

100K

R2400

01005

1/32W
MF

5

53

5

53

5

5

48 52

5

5

48

5

21

21

21

21

21

21

21

21

SENSOR: OSCAR

SYNC_MASTER=J72_MLB_C

SYNC_DATE=11/26/2012

GPIO_OSCAR_RESET_L

GPIO_SOC2OSCAR_DBGEN

TP_OSCAR_P0_22
GPIO_SOC2OSCAR_DBGEN_R

SPI_OSCAR_MISO

SPI_OSCAR2ACCEL_CS_L
SPI_OSCAR2GYRO_CS_L

=PP1V2_S2R_OSCAR

UART4_OSCAR2SOC_RXD

I2C1_SOC2OSCAR_SWDCLK_1V8

OSCAR2RADIO_CONTEXT_A
OSCAR2RADIO_CONTEXT_B

SPI_OSCAR_SCLK

SPI_OSCAR_MOSI

I2C1_SOC2OSCAR_SWDIO_1V8

PMU_GPIO_OSCAR2PMU_HOST_WAKE

OSCAR_TIME_SYNC_HOST_INT

SPI_OSCAR2COMPASS_CS_L

COMPASS2OSCAR_INT

ACCEL2OSCAR_INT2

GYRO2OSCAR_INT1

GYRO2OSCAR_INT2

ACCEL2OSCAR_INT1

=PP1V8_S2R_OSCAR

SPI_OSCAR_MOSI_R

=PP1V8_S2R_OSCAR

SPI_OSCAR_SCLK_R

UART4_SOC2OSCAR_TXD

PMU_GPIO_CLK_32K_OSCAR

NC_ISP0_CAM_REAR_SDA

NC_ISP0_CAM_REAR_SCL

051-0886

A.0.0

24 OF 121

19 OF 54

1 2

1 2

1 2

D6

B1

E4

A2

A3

E1

D4

D5
E2

C5

E6

E5

E3

D2

B6
D1
A6

C3
C4

B4

B5

A5

B3

B2

A1

C1C2C6

A4

D3

2

1

2

1

1

2

54 19 54

19 54

IN1
IN2

IN4

IN3

OUT1
OUT2
OUT3
OUT4

GND

IN1
IN2

IN4

IN3

OUT1
OUT2
OUT3
OUT4

GND

OUT

IN

BI

IN

BI

OUT

IN

IN

OUT

OUT

OUT

SYM_VER-2

SYM_VER-2

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

ISP1_CAM_FRONT_SHUTDOWN_L

HIGH = TURN ON CAMERA

LOW = SHUT DOWN CAMERA

VGA FRONT CAMERA CONNECTOR

516S0876 RCPT MLB

516S0869 PLUG FLEX

F-ST-SM

503548-1820

CRITICAL

J2601

10%

01005

6.3V
X5R-CERM

1000PF

C2602

X5R

1UF

6.3V
0201

20%

C2601

0201

240OHM-350MA

L2600

C2600

5%
16V

56PF

01005

NP0-C0G

SM

XW2600

R2601

1/32W
MF
01005

1%

100K

1208

U2601

400MHZ-0.1A-27PF

X5R-CERM

1000PF

01005

10%

6.3V

C2605

0201

20%

6.3V

1UF

X5R

C2604

56PF

C2603

5%
NP0-C0G

16V
01005

6.3V

10%

1000PF

01005

X5R-CERM

C2608

1UF

0201

20%

6.3V
X5R

C2607

5%
16V

56PF

C2606

01005

NP0-C0G

1208

400MHZ-0.1A-27PF

U2600

7

53

0201

240OHM-350MA

L2601

240-OHM-0.2A-0.8-OHM

0201-2

L2602

7

52

7

52

7

52

5

22

5

5

22

7

52

7

53

7

53

7

53

90-OHM-50MA

TCM0605-1

L2610

90-OHM-50MA

TCM0605-1

L2611

150OHM-25%-200MA-0.7DCR

01005

L2660

SYNC_DATE=12/03/2012

SYNC_MASTER=J85 MLB_C

CAMERA: FF-ALS CONN & FILTERS

ISP1_CAM_FRONT_SHUTDOWN_L_F

I2C3_SCL_1V8_F

GPIO_ALS_IRQ_L_F

PP1V8_CAM_FRONT_FILT

ISP1_CAM_FRONT_SHUTDOWN_L

I2C3_SCL_1V8
GPIO_ALS_IRQ_L

I2C3_SDA_1V8

ISP1_CAM_FRONT_CLK

ISP1_CAM_FRONT_SDA
ISP1_CAM_FRONT_SCL

=PP3V0_ALS

=PP1V8_CAM_FRONT

ISP1_CAM_FRONT_CLK_F

I2C3_SDA_1V8_F

ISP1_CAM_FRONT_SCL_F

ISP1_CAM_FRONT_SDA_F

=PP2V9_CAM_FRONT

MIPI1C_CAM_FRONT_CLK_FILT_N

MIPI1C_CAM_FRONT_CLK_FILT_P

MIPI1C_CAM_FRONT_DATA_FILT_N<0>

MIPI1C_CAM_FRONT_DATA_FILT_P<0>

GPIO_ALS_IRQ_L_F

I2C3_SCL_1V8_F I2C3_SDA_1V8_F

ISP1_CAM_FRONT_CLK_F_R

ISP1_CAM_FRONT_SHUTDOWN_L_F

ISP1_CAM_FRONT_SDA_F
ISP1_CAM_FRONT_SCL_F

PP2V9_AVDD_CAM_FRONT_FILT

GND_AVDD_CAM_FRONT

PP1V8_CAM_FRONT_FILT

PP3V0_ALS_FILT

ISP1_CAM_FRONT_CLK_F_R

ISP1_CAM_FRONT_CLK_F

MIPI1C_CAM_FRONT_DATA_FILT_N<0>

MIPI1C_CAM_FRONT_DATA_FILT_P<0>

MIPI1C_CAM_FRONT_DATA_P<0>

MIPI1C_CAM_FRONT_DATA_N<0>

MIPI1C_CAM_FRONT_CLK_FILT_N

MIPI1C_CAM_FRONT_CLK_FILT_P

MIPI1C_CAM_FRONT_CLK_P

MIPI1C_CAM_FRONT_CLK_N

NC_U2601_5NC_U2601_1

PP3V0_ALS_FILT

GND_AVDD_CAM_FRONT

VOLTAGE=0V

NET_SPACING_TYPE=GND

MIN_NECK_WIDTH=0.15 MM

MIN_LINE_WIDTH=0.15 MM

PP2V9_AVDD_CAM_FRONT_FILT

MAX_NECK_LENGTH=3 MM

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR

VOLTAGE=2.9V

051-0886

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20 OF 54

6

21

17

15

13

11

9

7

5

3

12

4

8
10
12
14
16
18

1920

22

2

1

2

1

21

2

1

1 2

1

2

2

1

2

1

2

1

2

1

2

1

2

1

21

21

4

32

1

4

32

1

21

20

20

20

20

54

54

20

20

20

20

54

20 53

20 53

20 53

20 53

20

20 20

20

20

20

20

20

20

20

20

20 20

20 53

20 53

20 53

20 53

20

20

20

WWW.AliSaler.Com

OUT

IN
IN

IN

IN

OUT

OUT

IN

OUT

IN
IN

IN

OUT

DRDY

SCL/SK
SDA/SI

VDD

RSV SO

VSS

TST1

TRG

VID

CAD0
CAD1

RST*

CSB*

INT2

DEN

INT1

GND

CS

SDO/SA0

SDA/SDI/SDO

SCL/SPC

VDD_IO

DRDY/

RES2

RES1

RES0

VDD

RES/VDD

CAP

GND

INT2

INT1

RES

RES

RES

CS

RES

RES

SDO/SA0

SCL/SPC

SDA/SDI/SDO

VDD

VDD_IO

GND

OUT

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

11V CHARGE PUMP

COMPASS

TO VID WHEN NOT USED

APN 338S1014

TIE CSB* TO VID FOR I2C MODE

GYRO

ACCELEROMETER

MF

1/32W
01005

0.00

0%

R2727

19

0%

0.00

MF

1/32W
01005

R2757

19 21

19 21

C2701

20%

6.3V

01005

0.1UF

X5R-CERM

C2700

CERM-X5R

6.3V

20%

10UF

0402-2

19 21

120-OHM-25%-250MA-0.5DCR

01005

L2700

19

19

19

20%

6.3V

C2725

0.1UF

X5R-CERM

01005

0402-2

10UF

CERM-X5R

6.3V

20%

C2723

19 21

20%

6.3V

C2721

0.1UF

X5R-CERM
01005

01005

120-OHM-25%-250MA-0.5DCR

L2702

19 21

01005

MF

1/32W

15.0

5%

R2747

01005

L2741

120-OHM-25%-250MA-0.5DCR

19 21

19 21

C2726

0.1UF

0201

10%
16V
X5R-CERM

OMIT

19

19

C2711

6.3V
01005

20%
X5R-CERM

0.1UF

C2710

6.3V

20%
X5R

0201-1

1.0UF

XW2700

SHORT-10L-0.25MM-SM

CSP

U2710

AK8963C

CRITICAL

01005

120-OHM-25%-250MA-0.5DCR

L2701

CKPLUS_WAIVE=PWRTERM2GND

CRITICAL

AP3GDL20HAB18TR

U2720

LGA

OMIT

MF

1/32W

0.00

0%

R2750

01005

SHORT-10L-0.25MM-SM

XW2701

X5R-CERM

0.1UF

01005

6.3V

20%

C2750

OMIT

AP2DHAB26TR

CRITICAL

U2700

LGA

19

19

SYNC_DATE=N/A

SYNC_MASTER=N/A

SENSOR: ACCEL, COMPASS, GYRO

NO_TEST=TRUE

NC_COMPASS_TST1

GND_COMP

GYRO_DEN

SPI_OSCAR_MISO_GYRO

PP3V0_COMP

GYRO_RES_VDD

GYRO2OSCAR_INT1

SPI_OSCAR2GYRO_CS_L

SPI_OSCAR_MOSI

SPI_OSCAR_SCLK

=PP1V8_S2R_GYRO

GYRO2OSCAR_INT2

PP3V0_GYRO

GYRO_PUMP

SPI_OSCAR_MISO

=PP3V0_S2R_ACCEL

SPI_OSCAR_MISO

=PP3V0_S2R_GYRO

=PP3V0_S2R_COMP

SPI_OSCAR2COMPASS_CS_L

PP1V8_COMP

NO_TEST=TRUE

NC_COMPASS_TRG

SPI_OSCAR_MISO_COMP1

NC_COMPASS_RSV

NO_TEST=TRUE

SPI_OSCAR_MOSI

SPI_OSCAR_SCLK

COMPASS2OSCAR_INT

=PP1V8_S2R_COMP

SPI_OSCAR_MISO

PP1V8_COMP

GND_COMP

GND_COMP

=PP1V8_S2R_ACCEL

PP3V0_ACCEL

SPI_OSCAR_MOSI

SPI_OSCAR_SCLK

SPI_OSCAR_MISO_ACCEL

SPI_OSCAR2ACCEL_CS_L

ACCEL2OSCAR_INT2

ACCEL2OSCAR_INT1

051-0886

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21 OF 54

1 2

1 2

2

1

2

1

21

2

1

2

1

2

1

21

1 2

21

2

1

2

1

2

1

21

A1

A3
A4

B1

B3 B4

C1

C2

C3

C4

D1
D2

D4

A2

21

8

7

13

5

4

3

2

1

6

11

10

9

16

15

14

12

1

2

2

1

5

6

13

14

12

4

11

10

3

1
2

8

7

9

21

54

19 21

54

19 21

54

54

21

54

21

21

21

54

ADD0

SCLK

CIN1

CIN3
CIN4

CIN12

CIN11

CIN6

CIN9

CIN8

CIN10

CIN2

CIN5

CIN0

ACSHIELD

GND

BIAS

SDA

VDRIVE

VCC

ADD1

INT*

GPIO

CIN7

TP

NC

NC

NC

NC

NC

NC
NC
NC

NC

NC

BI

IN

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

516S0872

PROX SENSOR

CHOSE CIN NUMBERS FOR LAYOUT EASE

PCB: ENSURE ACSHIELD PLANE UNDER

VDRIVE RAIL

READ: 0X59, WRITE: 0X58

353S2964

CONNECTED TO MLB INTERCONNECT.

THEREFORE,PROX GPIO IS NOT

PROX GPIO WILL NOT BE USED.

INT IS 1.8V LEVEL.

1.8 MA MAX

0.5 PF

REF CAP TO MEASURE

NEED EXTERNAL

JUST IN CASE

U3200, NO GND PLANE NEAR PROX_CIN NETS..

INT* IS OPEN DRAIN PU RAIL MATCH VDRIVE

VDRIVE FOR: I2C AND GPIO

CIN9 SENSOR ELECTRODE

CIN7 DUMMY

AND ALSO TIE TO CONNECTOR.

A PLANE UNDER PROX_CIN NETS

PCB: ACSHIELD NEEDS TO BE

I2C ADDRESS: 0101100+R/W

PROX

C2804

6.3V

0.1UF

X5R-CERM

20%

01005

PROX

C2805

68PF

5%

6.3V

NP0-C0G

01005

PROX

R2800

MF

2.0K

1/32W

1%

01005

PROX

R2801

MF

100K

1%

1/32W
01005

PROX

0201

0.01UF

C2802

10%
10V

X5R-CERM

PROX

C2800

X5R
402

10%

6.3V

2.2UF

PROX

C2803

+/-0.05PF

201

CERM

25V

0.5PF

PROX

C2801

0.1UF

6.3V

X5R-CERM

20%

01005

PROX

C2806

5%

68PF

6.3V

NP0-C0G

01005

PROX

C2807

NP0-C0G

201

25V

27PF

1%

PROX

U2800

WLCSP

AD7149

CRITICAL

PROX

L2801

68NH-2%-320MA-1.0OHM

0402

CRITICAL

PROX

CRITICAL

L2807

68NH-2%-320MA-1.0OHM

0402

PROX

CRITICAL

0603

L2808

390NH-2%-170MA-4.0OHM

PROX

0603

L2802

CRITICAL

390NH-2%-170MA-4.0OHM

PROX

L2803

68NH-2%-320MA-1.0OHM

0402

CRITICAL

PROX

0603

L2804

CRITICAL

390NH-2%-170MA-4.0OHM

5

20

PROX

0201-2

240-OHM-0.2A-0.8-OHM

L2800

5

20

PROX

J2800

503548-0620

CRITICAL

F-ST-SM

5

SENSOR: PROX

SYNC_MASTER=J85 MLB_C

SYNC_DATE=12/05/12

ACSHIELD_SB

NC_J2800_6

NC_J2800_2
NC_J2800_4

PROX_CIN9_CONN

PROX_ACSHIELD_CONN

=PP1V8_PROX

PP3V0_SENSOR_PROX_FILT

I2C3_SCL_1V8

PROX_GPIO PROX_CIN9

CIN9

ACSH_SB

PROX_CIN1

TP_PROX_CIN2

PROX_CIN7

CIN7

GPIO_PROX_IRQ_L

=PP3V0_PROX

I2C3_SDA_1V8

PROX_CIN7_CONN

PROX_BIAS

=PP1V8_PROX

051-0886

A.0.0

28 OF 121

22 OF 54

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1

D1

C1

A3

A4
C3

E5

D5

B4

C5

C4

D4

B3

A5

D3

E4

E2

E3

E1

C2

D2

B1

A1

A2

B5

B2

2 1

2 12 1

2 1

2 12 1

2 1

8

21

10

9

3 4
5 6

7

22 54

54

22 54

WWW.AliSaler.Com

BI

IN

IN

SYM_VER-2

SYM_VER-2

SYM_VER-2

OUT

OUT

OUT

OUT

OUT

OUT

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

REAR CAMERA CONNECTOR

APN: 516S0973

PLUG: 516S0974

X5R-CERM

10%

01005

6.3V

1000PF

C2902C2901

402

1UF

10%
10V
X5R

5%
16V

C2900

56PF

01005

NP0-C0G

L2900

240OHM-350MA

0201

7

52

6.3V
X5R-CERM

10%

1000PF

01005

C2905C2904

10%

402

1UF

10V
X5R

16V

5%

56PF

NP0-C0G
01005

C2903

240OHM-350MA

0201

L2901

C2908

10%

01005

X5R-CERM

6.3V

1000PF

C2907

X5R

10V

1UF

402

10%5%

16V

56PF

NP0-C0G

C2906

01005

240OHM-350MA

0201

L2902

10%

C2911

X5R-CERM

6.3V

1000PF

01005

1UF

10V
402

10%
X5R

C2910

16V

5%

56PF

NP0-C0G
01005

C2909

240OHM-350MA

0201

L2903

7

52

C2970

5%

56PF

NP0-C0G

16V
01005

5%
16V

56PF

01005

NP0-C0G

C2971

16V

5%
NP0-C0G

C2972

56PF

01005

C2973

16V

5%
NP0-C0G

56PF

01005

F-ST-SM

AA07-S022VA1

J2950

CRITICAL

7

52

90-OHM-50MA

TCM0605-1

L2910

TCM0605-1

L2911

90-OHM-50MA

90-OHM-50MA

TCM0605-1

L2912

7

53

7

53

7

53

7

53

7

53

7

53

XW2950

SM

XW2951

SM

150OHM-25%-200MA-0.7DCR

01005

L2950

7

52

1000PF

6.3V
01005

10%
X5R-CERM

C2980

R2950

01005

1/32W
MF

100K

1%

CAMERA: REAR CONN & FILTERS

SYNC_MASTER=N/A

SYNC_DATE=N/A

=PP2V9_CAM_REAR

CAM_REAR_VSYNC

VOLTAGE=2.9V

PP2V9_AVDD_CAM_REAR_FILT

MIN_NECK_WIDTH=0.2 mm

MAX_NECK_LENGTH=3 MM

MIN_LINE_WIDTH=0.6 mm
NET_SPACING_TYPE=PWR

MAX_NECK_LENGTH=5 MM

NET_SPACING_TYPE=GND

MIN_NECK_WIDTH=0.1 MM

VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm

GND_CAM_AVDD

=PP1V3_CAM_REAR

=PP2V6_CAM_REAR_AF

=PP1V8_CAM_REAR

ISP0_CAM_REAR_CLK_F

MIPI0C_CAM_REAR_CLK_FILT_P

MIPI0C_CAM_REAR_DATA_FILT_P<0>

MIPI0C_CAM_REAR_DATA_FILT_N<0>

MIPI0C_CAM_REAR_DATA_FILT_P<1>

MIPI0C_CAM_REAR_CLK_FILT_N

MIPI0C_CAM_REAR_DATA_FILT_N<1>

ISP0_CAM_REAR_CLK

MIPI0C_CAM_REAR_DATA_N<0>

MIPI0C_CAM_REAR_DATA_P<0>

MIPI0C_CAM_REAR_CLK_N

MIPI0C_CAM_REAR_CLK_P

MIPI0C_CAM_REAR_DATA_N<1>

MIPI0C_CAM_REAR_DATA_P<1>

MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR

MAX_NECK_LENGTH=3 MM

PP2V6_CAM_REAR_AF_FILT

VOLTAGE=2.6V

GND_AF_AVDD

MAX_NECK_LENGTH=5 MM

NET_SPACING_TYPE=GND

MIN_NECK_WIDTH=0.1 MM

VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm

PP1V8_CAM_REAR_FILT

ISP0_CAM_REAR_SDA

ISP0_CAM_REAR_SCL

ISP0_CAM_REAR_SHUTDOWN_L

PP1V3_CAM_REAR_FILT

051-0886

A.0.0

29 OF 121

23 OF 54

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2

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21

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1

2

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21

2

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2

1

2

1

21

2

1

2

1

2

1

21

2

1

2

1

2

1

2

1

25
26

24
23

22

20

18

16

10

14

12

8

6

4

2

21

19

17

15

7

9
11
13

5

3

1

4

3

2

1

4

32

1

4

32

1

1 2

1 2

21

2

1

1

2

54

54

54

54

53

53

53

53

53

53

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

BI

BI

IN

OUT

IN

IN

IN

OUT

OUT

IN

OUT

IN

IN

OUT

OUT

OUT

IN

IN

OUT

BI

BI

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

GPIO53/BOOT_CONFIG_1

SIM CARD ESD PROTECTION

48

PROBE POINTS

GPIO48/BOOT_CONFIG_6

DEBUG CONNECTOR

BOOT_HSIC_OPTION

BOOT_NAND_OPTION

SW REGISTER

GPIO53/BOOT_CONFIG_1

GPIO48/BOOT_CONFIG_6

ENABLE SAHARA PROTOCOL

BOOT_USB_OPTION 0X03

BOOT_DEFAULT_OPTION

BOOT OPTIONS

0X00

0X01

0X08

47

X

0X02

VALUE

X

X

X

6

GPIO/BOOT_CONFIG CONFIGURATION

0

1

1

1

1

0 0 1 0 X X X

000

0

000

0

0

5

49

0340500

51

1

0

100

1

10

0

52253054

0

1 0

X

X

X

X

55

0

BOOT_CONFIG

X

AP INTERFACE & DEBUG CONNECTORS

GPIO51/BOOT_CONFIG_3

GPIO54/BOOT_CONFIG_0

SM

P4MM

PP3002

P4MM

SM

PP3001

SM

P4MM

PP3000

NOSTUFF

F-ST-SM

MM4829-2702

J3001

NOSTUFF

F-ST-SM

MM4829-2702

J3002

P4MM

SM

PP3009

SM

P4MM

PP3008

SM

P4MM

PP3010

P4MM

SM

PP3011

SM

P4MM

PP3012

SM

P4MM

PP3013

SM

P4MM

PP3003

NOSTUFF

10K

MF
01005

5%
1/32W

R3002

NOSTUFF

5%

10K

1/32W
MF
01005

R3003

28

24 28 33 39 40

28 48 52

28 39 40

14 24 28 52

27 52

5

27 52

5

27 52

5

27 52

5

27 52

5

27 52

27 52

27

27

26 27

26 48 52

NOSTUFF

M-ST-SM

AXE654124

J3003

5

28

5

28

5

28

27 48 52

5

28

5

28

5

11 28 52

28

5

11 28 52

4 8
10

11 48 52

5

26 52

26 52

25 33 34 35 36 37 38 54

24 25 27 28 30 52

5

26 52

11 52 53

NOSTUFF

SHORT-10L-0.25MM-SM

XW3002

NOSTUFF

SHORT-10L-0.25MM-SM

XW3003

11 52 53

CELL

12V-33PF

01005-1

C3000

CELL

ESD0P2RF-02LS

TSSLP-2-1

U3001

CELL

TSSLP-2-1

ESD0P2RF-02LS

U3000

CELL

TSSLP-2-1

ESD0P2RF-02LS

U3003

CELL

TSSLP-2-1

ESD0P2RF-02LS

U3002

CELL:AP INTERFACE & DEBUG CONNECTORS

UART3_BB2SOC_RTS_L

PMU_GPIO_BB_VBUS_DET

PMU_GPIO_BB2PMU_HOST_WAKE

GPIO_51

ANT_SEL_1

ANT_SEL_2

LAT_SW1_CTL

BB_JTAG_RTCLK

BB_JTAG_TDI

BB_JTAG_TDO

BB_JTAG_TCK

BB_JTAG_TRST_L

BB_JTAG_TMS

DEBUG_RST_L

USB_BB_DEBUG_P

USB_BB_DEBUG_N

PMIC_RESOUT_L

PMU_GPIO_PMU2BBPMU_RST_L

HSIC2_SOC2BB_HOST_RDY

GPIO_BB2SOC_RESET_DET_L

HSIC2_BB2SOC_DEVICE_RDY

UART3_SOC2BB_RTS_L

UART3_SOC2BB_TX

UART3_BB2SOC_TX

RESET_SOC_L

CKPLUS_WAIVE=SINGLE_NODENET

GPIO_SOC2BB_RADIO_ON_L

PS_HOLD_PMIC

=PPBATT_VCC_BB

PP_SMPS3_MSME_1V8

GPIO_SOC2BB_RST_L

USB_BB_N

USB_BB_P

GPIO_DEBUG_LED

SIM_TRAY_DETECT

SIMCRD_CLK_CONN

SIMCRD_IO_CONN

SIMCRD_RST_CONN

PP_LDO6_RUIM_1V8

UART_BB2WLAN_LTE_COEX

SLEEP_CLK_32K

WTR_SSBI_PRX_DRX

WTR_RF_ON

19P2M_MDM

PMIC_SSBI

BB_ERROR_FLAG

LAT_SW1_CTL

PP_SMPS3_MSME_1V8

WTR_SSBI_TX_GPS

WTR_RX_ON

HSIC2_BB_DATA

HSIC2_BB_STB

UART_WLAN2BB_LTE_COEX

ANT_SEL_1

051-0886

A.0.0

30 OF 121

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1

423

1

423

1

1

1

1

1

1

1

1

1

2

1

2

50

42
44
46
48

32
34
36
38
40

26

22
24

28
30

16

14

12

18
20

2

10

8

6

4

49

47

45

43

41

33

31

29

27

25

23

21

35
37
39

7

5

3

1

19

17

15

9
11
13

52
54

51
53

55

58 57

56

21

21

1

2

21

21

2 1

2 1

10 28 52

10 28 52

10 28 52

10 28 52

10 25 27 52

28 44

26 27

28 29

28 29

26 27

26 27

28

14 24 28 52

24 25 27 28 30 52

28 29

28 29

4

27 53

4

27 53

28 44

24 28 33 39 40

WWW.AliSaler.Com

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN
IN

VDD_S4

VSW_S5

VSW_S3

VSW_S2

VREG_XO

VREG_S5

VREG_S4

VREG_RFCLK

VREG_L9

VREG_L8

VREG_L7

VREG_L6

VREG_L5

VREG_L4

VREG_L3

VREG_L2

VREG_L14

VREG_L13

VREG_L12

VREG_L11

VREG_L10

VOUT_LVS1

VDD_XO

VDD_S5

VDD_S2

VDD_S1

VDD_L9

VDD_L8

VDD_L7

VDD_L5_L6_L13_L14

VDD_L4

VDD_L2_L3

VDD_L12

VDD_L10_L11

REF_GND

REF_BYP

VSW_S5_2

VREG_S3

VSW_S4

VDD_S3

VSW_S1

VREG_S1

VREG_S2

VREG

(SYM 5 OF 5)

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

INTERNAL USE ONLY

INTERNAL USE ONLY

PMU (1 OF 2)

24 33 34 35 36 37 38 54

4.7UF

20%

0402

10V
X5R-CERM

C3204

X5R-CERM
0402

10V

20%

4.7UF

C3205

4.7UF

20%
10V

0402

X5R-CERM

C3206

X5R-CERM

4.7UF

10V

20%

0402

C3207

0402

X5R-CERM

10V

20%

4.7UF

C3208

SHORT-10L-0.1MM-SM

XW3200

X5R-CERM

6.3V

20%

0.1UF

01005

C3209

41

27

0402-2

20%

6.3V
CERM-X5R

10UF

C3200

26 27

2.2UH-20%-2.34A-0.113OHM

2520-SM

CRITICAL

L3204

2.2UH-20%-1.2A-0.15OHM

0806

CRITICAL

L3203

22UF

6.3V
X5R-CERM-1
603

20%

C3224

22UF

20%

6.3V
X5R-CERM-1
603

C3225

2.2UH-20%-1.2A-0.15OHM

CRITICAL

0806

L3202

0806

2.2UH-20%-1.2A-0.15OHM

CRITICAL

L3201

X5R-CERM-1

22UF

603

20%

6.3V

C3226

22UF

X5R-CERM-1
603

20%

6.3V

C3228

X5R-CERM-1
603

20%

22UF

6.3V

C3229

25 52

27

25 30 52

NOSTUFF

4V
X5R
01005

20%

0.1UF

C3227

24 25 27 28 30 52

27 30

0806

2.2UH-20%-1.2A-0.15OHM

CRITICAL

L3200

1.0UF

6.3V
X5R

20%

0201-1

C3230

27 52

27

25 52

25 30 52

24 25 27 28 30 52

BGA

PM8018-0

CRITICAL

U3300

27

27

27

27

0402-2

6.3V
CERM-X5R

20%

10UF

C3201

27

27

14 32 33 39 40

27

10 24 27 52

6.3V
X5R

1.0UF

20%

0201-1

C3210

6.3V

20%
X5R

1.0UF

0201-1

C3212

1.0UF

X5R

20%

6.3V
0201-1

C3214

20%

6.3V
X5R

1.0UF

0201-1

C3217

X5R

20%

6.3V

1.0UF

0201-1

C3211

1.0UF

X5R

6.3V

20%

0201-1

C3213

6.3V

20%
X5R

1.0UF

0201-1

C3215

20%
X5R

1.0UF

6.3V
0201-1

C3216

0402-2

CERM-X5R

20%

6.3V

10UF

C3202

1.0UF

X5R

6.3V

20%

0201-1

C3219

10UF

0402-2

CERM-X5R

20%

6.3V

C3221

0402-2

CERM-X5R

10UF

6.3V

20%

C3223

0402-2

6.3V

20%

10UF

CERM-X5R

C3218

0402-2

CERM-X5R

10UF

6.3V

20%

C3220

10UF

20%

6.3V
CERM-X5R
0402-2

C3222

1.0UF

6.3V
X5R

20%

0201-1

C3231

01005

5%

56PF

NP0-C0G

16V

C3203

CELL: BASEBAND PMU (1 0F 2)

S1_GND S2_GND S3_GND S4_GND S5_GND

PP_LDO4_VDDA_3V3
PP_LDO5_GPS_LNA_2V5

PP_LDO1

REF_BYP

PP_LDO3_AMUX_1V8

PP_LDO2_XO_HS_1V8

S5_GND

PP_SMPS5_DSP_1V05

S4_GND

S3_GND

S2_GND

S1_GND

PP_LVS1

PP_VREG

PP_SMPS4_RF2_2V05
PP_SMPS3_MSME_1V8

PP_SMPS5_DSP_1V05

PP_LDO6_RUIM_1V8

PP_LDO14_2V65

PP_LDO13_VDDPX_2V95

PP_LDO7_DAC_1V8
PP_LDO8_VDDPX_1V2

PP_LDO12_MDSP_SW_1V05

PP_LDO9_PLL_1V05

PP_LDO11_MDSP_FW_1V05

PP_LDO10_ADSP_1V05

PP_SMPS1_MSMC_1V05

PP_VSW_S1

REF_GND

PP_VSW_S2

PP_SMPS2_RF1_1V3

PP_VSW_S3

=PPBATT_VCC_BB

PP_SMPS4_RF2_2V05

PP_SMPS3_MSME_1V8

PP_VSW_S5

PP_VSW_S4

051-0886

A.0.0

32 OF 121

25 OF 54

2

1

2

1

2

1

2

1

2

1

21

2

1

2

1

1 2

21

2

1

2

1

21

21

2

1

2

1

2

1

2

1

21

2

1

98

24

88

82

87

48

42

90

20

76

105

13

77

54

63

17

11

84

32

31

29

23

43

55

65

53

8

101

89

95

104

70

58

75

5

78

44

64

59

34

28

100
12
81

18

6

92
97
79

83

102

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

25
26

25
26

25
26

25
26

25
26

52

25 26

25 26

25 26

25 26

25 26

IN

OUT

MPP_06

MPP_05

MPP_04

MPP_03

MPP_02

MPP_01

GPIO_06

GPIO_05

GPIO_04

GPIO_03

GPIO_02

GPIO_01

(SYM 4 OF 5)

MPP MISC

NC
NC
NC
NC
NC
NC

NC
NC

BI

IN

IN

IN

IN

GND_S3

GND_S2

GND_S1

GND_S4

GND_S5

GND

VCOIN

(SYM 3 OF 5)

INPUT PWR

NC

OPT_1

PM_RESIN_N

KPD_PWR*

BAT_ID

LED_DRV_N

OPT_2

PM_MDM_INT_N

PM_USR_INT_N

PON_RESET*

PON_TRIG

SSBI

PS_HOLD

(SYM 1 OF 5)

CONTROL

NC
NC

OUT
OUT

NC

OUT

IN

NC

NC

OUT

IN

OUT

OUT

GND0

XTAL_32K_OUT

XTAL_32K_IN

XTAL_19M_OUT

XTAL_19M_IN

XOADC_GND

XO_THERM

XO_OUT_D0_EN

XO_OUT_D0

XO_OUT_A1

XO_OUT_A0

SLEEP_CLK

RSVD

GND1

(SYM 2 OF 5)

CLOCKS

IN

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PMU (2 OF 2)

1 (1.8V)
0 (NC, PD)

BB GPIO_29

JXX
NXX

BOARD_ID

1.3V

1.1V

PRODUCT_ID

PROTO1

PA_ID

0.3V

0.5V

1.1V

7.5

7.6

7.7

8.7

8.6

8.5

TO MINIMIZE THERMAL DRIFT

GND NEEDS TO BE CLEARED UNDER THIS CRYSTAL

1.3V

0.1V

AP SECTION NEEDS ITS OWN THERMISTOR PLACED NEAR THE PA’S.

PVT

DVT

PROTO2

PROTO2

MAV VER

1.7V

1.5V

EVT2

EVT1

0.7V

0.9V

REVISION

1.5V

1.5V

28

27

BGA

CRITICAL

PM8018-0

U3300

1%
MF

01005

1/32W

100K

R3304

1/32W

100K

MF

1%

01005

R3305

24 27

5

24 52

28

24 48 52

5

24 52

20.0K

5%

01005

MF

1/32W

R3301

1.00K

1/32W
01005

5%
MF

R3300

PM8018-0

BGA

U3300

SM

XW3304

SHORT-10L-0.25MM-SM

XW3303

SM

XW3302

SHORT-10L-0.25MM-SM

XW3301

SM

XW3300

PM8018-0

BGA

U3300

28

28

24 27

25 26 27

19.200MHZ

2.0X1.6-SM

CRITICAL

Y3300

24 27

27

24 27

29

SHORT-10L-0.1MM-SM

XW3305

100K

MF

1/32W

1%

01005

R3303

X5R-CERM
01005

10%

6.3V

1000PF

C3300

PM8018-0

BGA

U3300

MF

1/32W

1%

499K

01005

R3307

1%
MF

1/32W
01005

100K

R3306

25 26 27

CELL: BASEBAND PMU (2 OF 2)

VREF_DAC_BIAS

VDDPX_BIAS

GPIO_SOC2BB_RST_L

S3_GND

S4_GND

S5_GND

S1_GND

S2_GND

PMIC_SSBI

PS_HOLD_PMIC

PMU_GPIO_PMU2BBPMU_RST_L

GPIO_SOC2BB_RADIO_ON_L

PM_USR_IRQ_L
PM_MDM_IRQ_L

PMIC_RESOUT_L

PP_LDO3_AMUX_1V8

19P2M_XTAL_OUT

19P2M_MDM

19P2M_CLK_EN

SLEEP_CLK_32K

19P2M_XTAL_IN

19P2M_WTR

XO_THERM_Y1

XO_GND

PS_HOLD

BOARD_ID PA_ID

PP_LDO3_AMUX_1V8

051-0886

A.0.0

33 OF 121

26 OF 54

80

73

72

66

67

85

49

71

60

50

38

33

1

2

1

2

1 2

1 2

56

30

96

103

91

36
93
99
94

39
51
61

46
52
40

57

1 2

21

1 2

21

1 2

62

16

69

35

86

74

14

21

4

41

68

47

3

24

1

2

1

1

2

2

1

27

15

3

2

1

22

10

9

25

37

19

26

7

45

1

2

1

2

25

25

25

25

25

24 52

WWW.AliSaler.Com

IN

NC

EBI2_AD_0
EBI2_AD_1

EBI2_AD_6

EBI2_AD_5

EBI2_AD_7

EBI1_CAL

EBI2_CLE*
EBI2_ALE*

EBI2_AD_2
EBI2_AD_3
EBI2_AD_4

EBI2_NAND_CS*

EBI2_BUSY*

EBI2_OE*
EBI2_WE*

(2 OF 6)

EBI1_EBI2

NC

NC
NC

NC

NC

NC

NC

NC

IN

NC

NC

NC

NC

IN

IN

IN

IN

VDD_MDSP_SW

GND

VDD_A1

VDD_A1

GND
GND

VDD_A2
VDD_A2

VDD_ADSP

VDD_CORE

VDD_DDR

VDD_MDSP_FW

VDD_MEM

VDD_P1

VDD_P3

VDD_PLL1

VDD_P7

VDD_P4
VDD_P5
VDD_P6

VDD_QFUSE_PRG

VDD_USB_3P3

VDD_USB_1P8

VDD_HVPAD_BIAS

VDD_P2

VDD_PLL2

PWR

(5 OF 6)

IN

IN

IN

IN

IN

IN

BI

BI

NC

TCK

RTCK

MODE_1

MODE_0

CXO
CXO_EN

SDC1_DATA3

SDC1_DATA2

SDC1_CLK

SDC1_DATA1

SDC1_DATA0

SDC1_CMD

USB_HS_DM

USB_HS_ID

USB_HS_VBUS

USB_HS_SYSCLK

TDI

HSIC_CAL

USB_HS_REXT

DNC

TMS

USB_HS_DP

DNC

TDO

RESIN*

TRST*

RESOUT*

HSIC_DATA

HSIC_STB

SRST*
SLEEP_CLK

SSBI_PMIC

DIGITAL

(1 OF 6)

NC

NC
NC

NC

NC

NC

NC

IN

NC

NC

NC

NC

NC

NC

NC

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN IN

IN IN

IN

BI

OUT

IN

IN

IN

IN
IN

IN

IN

IN

IN

GND

GND

GND_ANA

GND

(6 OF 6)

NC

BI

BI

OUT

OUT

NC

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BASEBAND (1 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

25 27

BGA

MDM9615M

U3400

25

0201-1

1.0UF

X5R

6.3V

20%

C3420

1.0UF

X5R

6.3V

20%

0201-1

C3433

25 27

25 26

0201

0.22UF

20%

6.3V
X5R

C3434

MF

1/32W
01005

1%

240

R3403

25

24 25 27 28 30 52

BGA

MDM9615M

U3400

24 25 27 28 30 52

1.0UF

20%

6.3V
X5R
0201-1

C3426

0201-1

6.3V
X5R

20%

1.0UF

C3424

24 25 27 28 30 52

25 27

24 25 27 28 30 52

10 24 25 52

200

1%
MF

01005

1/32W

R3401

24
48

52

24

24

MDM9615M

BGA

U3400

25 27

25 27

X5R

0.1UF

01005

4V

20%

NOSTUFF

C3423

0201-1

20%
X5R

1.0UF

6.3V

C3425

25 30

25 27 52

26

6.3V

20%
X5R

1.0UF

0201-1

C3422

0201-1

1.0UF

6.3V
X5R

20%

C3411

0201-1

X5R

6.3V

1.0UF

20%

C3412

0201-1

X5R

20%

1.0UF

6.3V

C3415

25 27 52

25 27

25 27

MF

1/32W

5%

470K

01005

R3400

25

25 27

24 25 27 28 30 52

0201-1

X5R

6.3V

20%

1.0UF

C3416

0201-1

1.0UF

X5R

6.3V

20%

C3417

0201-1

6.3V
X5R

1.0UF

20%

C3421

24 25 27 28 30 52

25 27

25 27 52

0201-1

X5R

20%

6.3V

1.0UF

C3405

24 25 27
28 30 52

0201-1

1.0UF

6.3V

20%
X5R

C3406

0201-1

6.3V
X5R

1.0UF

20%

C3400

0201-1

20%
X5R

6.3V

1.0UF

C3401

0201-1

1.0UF

6.3V
X5R

20%

C3407

0201-1

1.0UF

X5R

6.3V

20%

C3408

X5R
0201-1

1.0UF

6.3V

20%

C3402

0201-1

1.0UF

6.3V

20%
X5R

C3403

X5R
0201-1

6.3V

20%

1.0UF

C3409

0201-1

1.0UF

6.3V
X5R

20%

C3404

25 27

25 27

0201-1

20%
X5R

6.3V

1.0UF

C3413

0201-1

20%

1.0UF

6.3V
X5R

C3414

25 27

25 27

20%

6.3V
X5R

1.0UF

0201-1

C3431

0201-1

20%

6.3V

1.0UF

X5R

C3418

0201-1

6.3V

20%
X5R

1.0UF

C3419

20%

0.22UF

6.3V
X5R
01005

C3432

24 26

26

24 26

5

24 52

25

5

24 52

5

24 52

5

24 52

24 26

24 52

24 26

0201-1

20%

6.3V
X5R

1.0UF

C3410

CRITICAL

BGA

MDM9615M

U3400

4

24 53

4

24 53

24 52

5

24 52

01005

240

1%

1/32W

MF

R3402

CELL: BASEBAND (1 OF 2)

PP_SMPS1_MSMC_1V05

PP_SMPS1_MSMC_1V05

PP_LDO7_DAC_1V8

PP_LDO9_PLL_1V05

PP_LDO3_AMUX_1V8

PP_LDO4_VDDA_3V3

VDDPX_BIAS

PP_LDO2_XO_HS_1V8

PP_SMPS2_RF1_1V3

PP_LDO12_MDSP_SW_1V05

PP_LDO11_MDSP_FW_1V05

PP_LDO10_ADSP_1V05

PP_SMPS3_MSME_1V8

PP_LVS1

PP_SMPS3_MSME_1V8 PP_SMPS3_MSME_1V8

PP_LDO9_PLL_1V05

PP_SMPS1_MSMC_1V05

PP_LDO10_ADSP_1V05

PP_LDO12_MDSP_SW_1V05

PP_LDO8_VDDPX_1V2

PP_LDO11_MDSP_FW_1V05

SLEEP_CLK_32K

BB_JTAG_TDI

BB_JTAG_TRST_L

DEBUG_RST_L

PMIC_RESOUT_L

PMIC_SSBI

TP_BB_TEST_MODE_1

BB_JTAG_TCK

BB_JTAG_TMS

19P2M_CLK_EN

TP_BB_TEST_MODE_0

HSIC2_BB_STB

BB_JTAG_RTCLK

BB_JTAG_TDO

HSIC2_BB_DATA

50_HSIC_CAL

PP_LDO4_VDDA_3V3

EBI1_CAL

PP_LDO13_VDDPX_2V95

PP_SMPS3_MSME_1V8

PP_LDO9_PLL_1V05

PP_SMPS3_MSME_1V8

PP_LDO6_RUIM_1V8
PP_SMPS3_MSME_1V8
PP_LDO8_VDDPX_1V2

PP_SMPS3_MSME_1V8

RREFEXT

USB_BB_DEBUG_N

USB_BB_DEBUG_P

PMU_GPIO_BB_VBUS_DET

19P2M_MDM

051-0886

A.0.0

34 OF 121

27 OF 54

J20
J19

H21

H19

E21

C21

C20
E20

G19
H20
J21

D21

D19

E19
D20

2

1

2

1

2

1

1 2

F20

N17

N16

N15

T19

F13

J8

AA15

AA7

W9

AA11
AA18

U6
U7

C5
C6
E6
E7
F5

F12

F14

F8
F9

G12

G9

H12

H9

J12
J13

J9

K12
K13

K8
K9

L12
L13

L8
L9

M12
M13

M8
M9

N12
N13

N8
N9

P12

P9

R12

R9

T8
T9

AA20
B19

M20

T15
T16
T17
U14
U15
U16
U17
U19

N19
P15
P16
P17
P19

C17
C18
E17
F17

G13
G14

G7
G8

H13
H14

H7
H8

P13
P14

P7
P8

R13
R14

R7
R8

A14
A19
F21

M1

M21

A15
G1
G21
L1
U1
W19

K17
L17

A11

A2
A3
A7

B13

E10

E12

E16

K21

W12

2

1

2

1

1

2

Y3

Y2

Y19

W20

V20
U21

N21

N20

L21

L20

L19

K19

E11

C12

C10

B12

AA2

A8

A12

E9
C9

B9

B10
A10

E8
C8

W4

C11

A9

AA3

Y20

AA4

U20

C7
B8

Y4

AA19

Y21

2

1

2

1

2

1

2

1

2

1

2

1

1

2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

T11

T7

L16

K16

U2
V19

A21
AA1

L15

M15
M16

R16

R15

N14
P6

P11

F7

F6

U13

AA21

B11
B14
B15

B2
B7

C19

F10
F15
F16
F19

G10
G11
G15
G16
G17

G2

G20

G6

H10
H11
H15
H16

H6

J10
J11
J14
J15

J6
J7

K10
K11
K14
K15
K20

K6
K7

L10
L11
L14

L2
L6
L7

M10
M11

M14

M17
M19

M6
M7

N10
N11

N6
N7

P10

R10
R11

R17
R19

R6

T10
T12
T13
T14

F11
J16

T6

U12

U9

W14

W7

Y11
Y15
Y18

Y7

W13

1 2

52

52

IN

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT
OUT

BI

OUT

OUT

BI

OUT

OUT

OUT

IN

IN

IN

OUT

OUT

IN

OUT

OUT

IN

OUT

OUT
OUT

IN

IN

OUT

IN

OUT

OUT

IN

IN

GND

VCC

SI/SIO0

WP*/SIO2

SCLK

CS*

NC/SIO3

NC

SO/SIO1

OUT

IN

OUT

IN

OUT
OUT

BBRX_QP_CH1

BBRX_QP_CH0

TX_DAC0_QP

BBRX_IP_CH1

BBRX_IM_CH0

TX_DAC0_IREF

DAC0_VREF

GNSS_BB_QP

GNSS_BB_IP

BBRX_IP_CH0

GNSS_BB_QM

GNSS_BB_IM

BBRX_QM_CH1

BBRX_QM_CH0

TX_DAC0_IM

BBRX_IM_CH1

TX_DAC1_IP
TX_DAC1_IM

DNC

BBRX_QP_CH2
BBRX_QM_CH2

BBRX_IM_CH2

TX_DAC0_QM

TX_DAC0_IP

TX_DAC1_QM

TX_DAC1_QP

BBRX_IP_CH2

ANALOG

(4 OF 6)

(3 OF 6)

GPIO

GPIO_9

GPIO_8

GPIO_20

GPIO_15

GPIO_23

GPIO_7

GPIO_2

GPIO_1

GPIO_85

GPIO_17

GPIO_24

GPIO_18

GPIO_22

GPIO_21

GPIO_5
GPIO_6

GPIO_3

GPIO_0

GPIO_84

GPIO_13

GPIO_12

GPIO_16

GPIO_19

GPIO_86
GPIO_87

GPIO_4

GPIO_80

GPIO_82
GPIO_83

GPIO_81

GPIO_11

GPIO_10

GPIO_14

GPIO_78
GPIO_79

GPIO_70

GPIO_77

GPIO_69

GPIO_71

GPIO_66
GPIO_67
GPIO_68

GPIO_64
GPIO_65

GPIO_62

GPIO_60

GPIO_63

GPIO_61

GPIO_56

GPIO_59

GPIO_58

GPIO_57

GPIO_53

GPIO_55

GPIO_49

GPIO_52

GPIO_54

GPIO_50
GPIO_51

GPIO_47

GPIO_46

GPIO_43

GPIO_48

GPIO_27

GPIO_25

GPIO_44

GPIO_42

GPIO_45

GPIO_41

GPIO_28

GPIO_26

GPIO_39

GPIO_38

GPIO_36

GPIO_40

GPIO_29
GPIO_30

GPIO_35

GPIO_37

GPIO_34

GPIO_31

GPIO_33

GPIO_32

GPIO_72

GPIO_75

GPIO_74

GPIO_73

GPIO_76

NC

IN

NC
NC
NC

NC

NC

NC

NC

NC

IN

NC
NC

NC
NC

NC
NC

NC
NC
NC
NC

IN

NC
NC
NC

NC

NC

NC

NC

NC
NC
NC

IN

NC
NC
NC
NC

NC

NC

NC

NC

NC

NC

IN

NC

NC

IN

IN

NC

NC

NC

OUT

NC

NC
NC

NC

IN

OUT

BI

OUT
OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

BI

OUT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PRODUCT_ID
JXX

NXX

0 (NC, PD)

1 (1.8V)

GPIO_29

RESERVED FOR FUTURE PRODUCT ID USE

GRFC_0

GRFC_39

GRFC_38

GRFC_10

GRFC_13

GRFC_9

GRFC_5
GRFC_6

GRFC_2

GRFC_37

GRFC_28

GRFC_21
GRFC_22

GRFC_24

GRFC_26

GRFC_36

GRFC_35

GRFC_4

GRFC_8

GRFC_18

GRFC_3

GRFC_11

GRFC_25

LAT_SW3_CTL

BOOT_CONFIG_0

GRFC_7

GRFC_1

GRFC_20

GRFC_19

GRFC_15

GRFC_14

BOOT_CONFIG_6

BOOT_CONFIG_4

GRFC_33

GRFC_27

BASEBAND (2 OF 2)

BOOT_CONFIG_5

GRFC_34

BOOT_CONFIG_3
BOOT_CONFIG_2

WLAN_TX_BLANK NEEDS TO CONNECT TO AP

BOOT_CONFIG_1

GRFC_23

GRFC_29
GRFC_30
GRFC_31
GRFC_32

01005

20%
X5R

4V

0.1UF

C3520

5

24

5

24

5

24

5

11 24 52

5

11 24 52

5

24

34

38

01005

20%

0.1UF

4V
X5R

C3500

10 24 52

24 29

24 29

26

26

38

5

33 34 35 36 37

36

32 33

24 29

5

5

24 29

26

29

24 48 52

24

44 52

29

33 34 35 36

33

24 44

24 44

38

29

14 24 52

37

37

29

5

52

24

29

5

24

24

29

24 25 27 28 30 52

CRITICAL

WLCSP

MX25U1635EBAI-10G

SERIAL-SPI-2MX8-1.8V

U3520

5

29

35

29

33

33

CRITICAL

MDM9615M

BGA

U3400

MDM9615M

CRITICAL

BGA

U3400

01005-1

70-OHM-300MA

L3520

29

29

29

29

29

0.00

0%

01005

MF

1/32W

R3530

1/32W

MF

0%

0.00

01005

R3531

19 44 52

19 44 52

39

24 25 27 28 30 52

01005

10K

5%
1/32W
MF

R3502

14 52

10 24 52

10 24 52

10 24 52

29

29

29

29

29

29

24 39 40

24 33 39 40

33 39 40

26

39 40

39

CELL: BASEBAND (2 OF 2)

GPIO_BB2SOC_RESET_DET_L

PM_MDM_IRQ_L

HSIC2_SOC2BB_HOST_RDY

HSIC2_BB2SOC_DEVICE_RDY

OSCAR_CONTEXT_B_MDM

WLAN_TX_BLANK

WTR_GP_DATA1

GPH

GPH

WTR_GP_DATA0

BB_ERROR_FLAG

PP_SMPS3_MSME_1V8_FILT

OSCAR_CONTEXT_A_MDM

ANT_SEL_2

TX_BB_I_P
TX_BB_I_N

TX_BB_Q_P

SIMCRD_CLK_CONN

SIMCRD_RST_CONN

SPI_CS_L

PP_SMPS3_MSME_1V8

SPI_DATA_MOSI

OSCAR2RADIO_CONTEXT_B

PRX_BB_I_P
PRX_BB_I_N
PRX_BB_Q_P
PRX_BB_Q_N

DRX_BB_I_P

3P4T_SEL_0

DRX_BB_I_N

PA_ON_B7_B20

DRX_BB_Q_P

BB_IPC_GPIO

PP_SMPS3_MSME_1V8

DRX_BB_Q_N

GPS_BB_I_P

GPIO_DEBUG_LED

GPIO_SOC2BB_WAKE_MODEM

GPS_BB_I_N

GSM_PA_HB_EN

GSM_PA_LB_EN

GPS_BB_Q_P

BB_PDM

UART_BB2WLAN_LTE_COEX

UART_WLAN2BB_LTE_COEX

PA_MB_CTL1

PA_BS

GPS_BB_Q_N

PMU_GPIO_BB2PMU_HOST_WAKE

WTR_BB_TX_DAC_IREF

VREF_DAC_BIAS

WTR_SSBI_PRX_DRX

HSIC2_BB2SOC_REMOTE_WAKE

GPIO_BB2SOC_GPS_SYNC

WTR_SSBI_TX_GPS

SPI_CLK

PA_MB_CTL0

PA_ON_B5_B8

PS_HOLD

PM_USR_IRQ_L

WTR_RX_ON
WTR_RF_ON

SIM_TRAY_DETECT

SPI_CS_L

PA_ON_B2_B3

SPI_DATA_MISO

UART3_SOC2BB_TX
UART3_BB2SOC_TX

UART3_SOC2BB_RTS_L

UART3_BB2SOC_RTS_L

SPI_DATA_MOSI

OSCAR2RADIO_CONTEXT_A

ANT_SEL_1

SPI_CLK

B40_FILT_SELECT

LAT_SW1_CTL

ANT_SEL_3

GPIO_BB2SOC_GSM_TXBURST

PA_R1

DCDC_MODE

ANT_SEL_0

GPIO_51

DCDC_EN

3P4T_SEL_1

ANT_SEL_4

LAT_SW2_CTL

TX_BB_Q_N

SPI_DATA_MISO

SIMCRD_IO_CONN

PP_SMPS3_MSME_1V8

051-0886

A.0.0

35 OF 121

28 OF 54

2

1

2

1

E3 B2

E2

D3

D2

A4

B3

C2

F1
F4

C3

Y9

Y8

Y5

Y10

W8

W6

W5

W11

W10

U8

U11

U10

AA9

AA8

AA6

AA10

Y14
AA14

Y17

V21

H17

AA17

AA16

AA12

W15
W16

W18

AA5

Y6

AA13

Y13

W21
Y12
Y16

J17

W17

A13

A16

A17

A18

A20

A4

A5

A6

B1

B16

B17

B18

B20

B21

B3
B4

B5

B6

C1

C13

C14

C15

C16

C2
C3

C4

D1

D2
D3

E1

E13

E14

E15

E2
E3

F1

F2

F3

G3

G5
H1
H2

H3
H5

J1

J2

J3

J5

K1

K2

K3

K5

L3

L5

M2

M3

M5

N1
N2

N3

N5

P1

P2

P20

P21

P3

P5

R1

R2

R20

R21

R3

R5

T1

T2

T20
T21

T3

T5

U3

U5

V1

V2

V3

W1

W2

W3

Y1

21

1 2

1 2

1

2

28

28

28

28

28

28

28

28

24 25 27 28 30 52

WWW.AliSaler.Com

IN

IN
IN

IN

OUT

GP_DATA0
GP_DATA1
GP_DATA2
DNC
DNC

XO_IN

SSBI_TX_GNSS
SSBI_PRX_DRX

RF_ON

RX_ON

RBIAS

VTUNE_PRX

PDET_IN

DNC

TX_HB

TX_MB4

TX_MB3

TX_MB2

TX_MB1

TX_BB_IM

TX_BB_IP

TX_LB4

TX_LB2
TX_LB3

TX_LB1

GND

DNC

DAC_REF

TX_BB_QM

TX_BB_QP

SYM 2 OF 5

TX

NC

NC

NC
NC

NC

NC

NC

PRX_LB1_INP
PRX_LB1_INM

PRX_LB2_INM

PRX_LB3_INP
PRX_LB3_INM

PRX_MB1_INP

PRX_BB_IP

PRX_BB_QP

PRX_BB_IM

DNC

PRX_BB_QM

PRX_HB_INM

PRX_MB3_INM

PRX_HB_INP

PRX_MB3_INP

PRX_MB2_INM

PRX_MB2_INP

PRX_MB1_INM

PRX_LB2_INP

SYM 3 OF 5

PRX

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

OUT
OUT

OUT

OUT

GND
GND
GND

GND

GND

GND

GND

GND

GND

GND
GND

GND

GND

GND

GND
GND

GND
GND

GND

GND

GND

GND

GND

GND
GND

GND
GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND
GND

SYM 5 OF 5

GND

IN

BI

BI

IN

OUT

OUT

IN

OUT

OUT

IN

IN

IN

IN

IN

IN
IN

IN

IN

DRX_LB1_INM

DRX_LB1_INP

GNSS_INM

GNSS_INP

DRX_HB_INM

DRX_HB_INP

DRX_MB_INM

DRX_MB_INP

DRX_LB2_INM

DRX_LB2_INP

DRX_BB_IM

DRX_BB_IP

DRX_BB_QM

DRX_BB_QP

GNSS_BB_QP

GND

GNSS_BB_QM

GNSS_BB_IP
GNSS_BB_IM

DRX_GPS

SYM 1 OF 5

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

IN

IN
IN

IN
IN

IN
IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

9.0 DB ATTENUATOR

RF TRANSCEIVER (1 OF 2)

TRANSCEIVER GROUND CONNECTIONS

TRANSCEIVER PHASE CONTROL, TX RF & IQ PORTS

DRX TRANSCEIVER RF AND IQ PORTS

PRX TRANSCEIVER RF AND IQ PORTS

40

31

31

26

100PF

16V

5%

NP0-C0G

01005

C3600

01005

0%

1/32W

0.00

MF

R3604

10PF

16V
CERM
01005

5%

NOSTUFF

C3601

32

WTR1605

SM

CRITICAL

U3600

NP0-C0G

5%

01005

56PF

16V

C3602

1%
MF

105

1/32W
01005

R3603

01005

105

1%
1/32W
MF

R3601

1/32W

1%

61.9

MF

01005

R3602

WTR1605

SM

CRITICAL

U3600

31

31

31

40

31

31

31

31

31

28

28

28

28

40

28

28

28

28

WTR1605

SM

CRITICAL

U3600

40

24 28

24 28

24 28

28

28

40

28

28

24 28

28

40

28

28

28

28

28

28

SM

WTR1605

CRITICAL

U3600

37

32

32

32

32

37

32 31

31

32

1%

4.75K

01005

MF

1/32W

R3600

35

40

40

40

40

31

31

CELL: RF TRANSCEIVER (1 0F 2)

100_XCVR_B2_PRX_N

50_XCVR_B1_B3_TX
50_XCVR_B34_B39_TX
50_XCVR_2G_HB_TX

50_XCVR_B7_B38_B40_TX

50_PDET_IN

100_XCVR_GPS_RX_N

100_XCVR_B1_B34_B39_DCS_PRX_N
100_XCVR_B1_B34_B39_DCS_PRX_P

19P2M_WTR

100_XCVR_B3_PRX_N

100_XCVR_B3_PRX_P

100_XCVR_GPS_RX_P

100_XCVR_B5_B18_PRX_N
100_XCVR_B2_PRX_P

100_XCVR_B5_B18_PRX_P

100_XCVR_B8_PRX_P

100_XCVR_B8_PRX_N

GPS_BB_Q_N

GPS_BB_Q_P

GPS_BB_I_N

GPS_BB_I_P

100_XCVR_B7_B38_B40_DRX_N

DRX_BB_Q_P
DRX_BB_Q_N

DRX_BB_I_N

DRX_BB_I_P

100_XCVR_B7_B38_B40_DRX_P

WTR_SSBI_PRX_DRX

WTR_SSBI_TX_GPS

WTR_RF_ON

PRX_BB_Q_N

PRX_BB_Q_P

100_XCVR_B1_B2_B3_B34_B39_DRX_N

PRX_BB_I_N

PRX_BB_I_P

WTR_RX_ON

GPH

WTR_GP_DATA1

100_XCVR_B1_B2_B3_B34_B39_DRX_P

WTR_BB_TX_DAC_IREF

GPHWTR_GP_DATA0

TX_BB_Q_P
TX_BB_Q_N

TX_BB_I_N

TX_BB_I_P

50_XCVR_B2_TX

50_XCVR_B20_TX

100_XCVR_B20_PRX_N

100_XCVR_B20_PRX_P

50_PDET_PAD_IN

100_XCVR_B8_B20_DRX_P
100_XCVR_B8_B20_DRX_N

100_XCVR_B5_B18_DRX_P
100_XCVR_B5_B18_DRX_N

100_XCVR_B7_B38_B40_PRX_P
100_XCVR_B7_B38_B40_PRX_N

50_XCVR_B5_B18_TX

50_XCVR_B8_TX

50_XCVR_2G_LB_TX

50_PDET_PAD_OUT

19P2M_WTR_FILT_IN

19P2M_WTR_IN

WTR_RBIAS

051-0886

A.0.0

36 OF 121

29 OF 54

1 2

1 2

2

1

105
121

88

114

96

120

89
80

100

45

60

79

101

93

103

95

112

119

126

138

130

133

132
141

140

134

90

109

139

131

1 2

1

2

1

2

1 2

78
69

54

48
43

36

84

91

92

86

82

15

16

7

8

17

23

30

61

21
20
33

75

9

49

32

19

113

128
104

107

135

106

137
122

94
115

102

129

99

110

123

125
124

52
39

68

47

77

46

142

35

81

64

34

73

59

74

58

41

38

6

27

29
22

14

5

18

10

11

2

12

3

13

4

72

63

57

50

70

1

71

56
62

1 2

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

ALIAS

VDD_RF1_P_FELO
VDD_RF1_P_FELO
VDD_RF1_D_LBLO
VDD_RF1_D_FE

VDD_RF2_P_BB

VDD_DIO

VDD_RF1_T_SYN

VDD_RF2_T_VCO

VDD_RF2_XO

VDD_RF1_T_LO
VDD_RF2_T_BB

VDD_RF1_T_DA

VDD_RF1_T_UPC

VDD_RF2_T_DA

VDD_RF2_D_BB

VDD_RF1_S_PLL

VDD_RF1_S_VCO

VDD_RF1_P_VCO
VDD_RF1_P_PLL
VDD_RF2_S_VCO

VDD_RF2_P_VCO

VDD_RF1_G_BB

VDD_RF1_G_PLL

VDD_RF1_G_VCO

VDD_RF1_G_LNA

VDD_RF2_T_PLL

VDD_RF1_D_MBLO
VDD_RF1_JDET

SRM 4 OF 5

PWR

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

PLACE NEAR U3.117

PLACE NEAR U3.118

RF2_2V05

STAR ROUTING

PLACE NEAR U3.76

PLACE NEAR U3.66

RF1_1V8

STAR ROUTING

STAR ROUTING

PLACE NEAR U3.37 AND U3.55

PLACE NEAR U3.25 AND U3.28

STAR ROUTING

PLACE NEAR U3.53 AND U3.26

PLACE NEAR U3.42

STAR ROUTING

PLACE NEAR U3.98

TRANSCEIVER POWER CONNECTIONS

PLACE NEAR U3.111

PLACE NEAR U3.67

PLACE NEAR U3.51

STAR ROUTING

STAR ROUTING

PLACE NEAR U3.127

PLACE NEAR U3.136

STAR ROUTING

STAR ROUTING

STAR ROUTING

PLACE NEAR U3.116

PLACE NEAR U3.65

PLACE NEAR U3.24 AND U3.31

RF1_1V3

PLACE NEAR U3.40

STAR ROUTING

STAR ROUTING

RF1_1V3

RF TRANSCEIVER (2 OF 2)

PLACE NEAR U3.87

X5R-CERM

6.3V

0.1UF

01005

20%

C3702

20%

0.1UF

01005

6.3V
X5R-CERM

C3703

20%

6.3V

01005

X5R-CERM

0.1UF

C3704

0.1UF

X5R-CERM

6.3V

01005

20%

C3705

NOSTUFF

6.3V

0.1UF

01005

X5R-CERM

20%

C3706

20%

01005

6.3V

0.1UF

X5R-CERM

C3707

0.1UF

X5R-CERM

20%

6.3V

01005

C3708

100PF

NP0-C0G
01005

5%
16V

C3709

20%

01005

6.3V

0.1UF

X5R-CERM

C3710

20%

6.3V

0.1UF

X5R-CERM
01005

C3711

6.3V
X5R-CERM

20%

01005

0.1UF

C3712

01005

20%

6.3V
X5R-CERM

0.1UF

C3713

01005

6.3V

20%
X5R-CERM

0.1UF

C3714

10UF

20%

0402-1

X5R-CERM

10V

C3715

10V

1.0UF

0201-1

X5R-CERM

20%

C3700

X5R-CERM

10UF

10V

20%

0402-1

C3701

20%

0.1UF

X5R-CERM
01005

6.3V

C3717

20%
X5R-CERM

0.1UF

6.3V

01005

C3718

0.1UF

20%

6.3V

01005

X5R-CERM

C3719

20%
X5R-CERM

0.1UF

01005

6.3V

C3720

NOSTUFF

16V
NP0-C0G

100PF

5%

01005

C3716

MF

1/20W

201

0

5%

R3702

16V
NP0-C0G

5%

56PF

01005

C3721

22-OHM-25%-1800MA

0201

R3700

CRITICAL

SM

WTR1605

U3600

CELL: RF TRANSCEIVER (2 OF 2)

PP_RF1_1V3_TX_UPCONVERTER

PP_SMPS4_RF2_2V05_FILT

PP_SMPS4_RF2_2V05

PP_RF2_2V05_TX_PLL

PP_RF1_1V3_JAM_DET

PP_RF1_1V3_TX_SYNTH

PP_RF2_2V05_TX_PLL
PP_RF1_1V3_GPS_LNA

PP_RF1_1V3_GPS_VCO
PP_RF1_1V3_GPS_PLL
PP_RF1_1V3_GPS_DIG

PP_RF2_2V05_PRX_VCO

PP_RF2_2V05_SHDR_VCO

PP_RF1_1V3_PRX_PLL

PP_RF1_1V3_PRX_VCO

PP_RF1_1V3_SHDR_VCO
PP_RF1_1V3_SHDR_PLL

PP_RF2_2V05_DRX_BB

PP_RF2_2V05_TX_DA

PP_RF1_1V3_TX_UPCONVERTER

PP_RF1_1V3_TX_DA

PP_RF2_2V05_TX_BB

PP_RF1_1V3_TX_LO

PP_RF2_2V05_XO_FILT

PP_RF2_2V05_TX_VCO

PP_RF1_1V3_TX_SYNTH

PP_RF1_1V8_DIG

PP_RF1_1V3_PRX_FELO1

PP_RF1_1V3_DRX_FE

PP_RF1_1V3_JAM_DET
PP_RF2_2V05_PRX_BB

PP_RF1_1V3_DRX_LBLO

PP_RF1_1V3_DRX_MBLO

PP_RF2_2V05_XO_FILT

PP_RF2_2V05_TX_VCO

PP_RF2_2V05_SHDR_VCO

PP_RF2_2V05_PRX_VCO

PP_RF2_2V05_PRX_BB

PP_RF2_2V05_TX_DA

PP_RF2_2V05_DRX_BB

PP_RF1_1V3_GPS_DIG

PP_RF1_1V3_GPS_PLL

PP_SMPS2_RF1_1V3_FILT

PP_RF1_1V8_DIG

PP_SMPS3_MSME_1V8

PP_RF1_1V3_PRX_PLL

PP_RF1_1V3_SHDR_PLL

PP_RF1_1V3_PRX_VCO

PP_RF1_1V3_SHDR_VCO

PP_RF1_1V3_TX_LO

PP_RF1_1V3_PRX_FELO1

PP_RF1_1V3_DRX_FE

PP_RF1_1V3_PRX_FELO2

PP_RF1_1V3_DRX_LBLO

PP_RF1_1V3_DRX_MBLO

PP_RF1_1V3_GPS_VCO

PP_RF1_1V3_TX_DA

PP_RF1_1V3_GPS_LNA

PP_RF2_2V05_TX_BB

PP_RF1_1V3_PRX_FELO2

PP_SMPS2_RF1_1V3

PP_SMPS2_RF1_1V3_FILT

051-0886

A.0.0

37 OF 121

30 OF 54

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

21

53
42
28
26

83

87

98

136
127

116
108

118
117

111

44

65

40

76
66
51

67

31

55

37

24

97

25
85

30

25 52

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

24 25 27 28 52

30

30

30

30

30

30

30

30

30

30

30

30

30

30

30

25
27

30

WWW.AliSaler.Com

OUT

OUT

BAL_PORT2

GND

BAL_PORT1

UNBAL_PORT

IN

BI

ANTB40

B38

GND

OUT

BI

BI

BI

OUT

BI

GND

UNB_PORT2 UNB_PORT1

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

RX MATCHING

29

NO_XNET_CONNECTION=TRUE

+/-0.05PF

01005

CERM

16V

0.6PF

C3800

01005

22NH-5%-0.1A

NOSTUFF

L3823

0201

3.6NH+/-0.1NH-400MA

L3814

29

LLP

2.3-2.69GHZ

CRITICAL

U3803

NO_XNET_CONNECTION=TRUE

5%

NP0-C0G

01005

16V

27PF

C3801

33

39

ACFM-2043-AP1

LGA

FIL_DIPLEXER_B38_B40

CRITICAL

U3801

29

33

33

201

5%

0

MF

1/20W

L3817

33

29

39

201

0

5%

1/20W

MF

L3821

01005

NP0-C0G

16V

56PF

5%

NOSTUFF

C3811

0201

0.6NH+/-0.1NH-0.85A

L3813

0.6NH+/-0.1NH-0.85A

0201

L3815

18NH-3%-140MA

01005

L3822

01005

18NH-3%-140MA

L3824

0201

5.6NH-3%-0.35A

CRITICAL

C3810

0201DS

13NH-5%-0.28A

CRITICAL

L3800

0201DS

6.8NH-5%-0.5A

CRITICAL

L3801

0201DS

8.7NH-5%-0.29A

CRITICAL

L3802

0201DS

5.6NH-5%-0.33A

CRITICAL

L3803

TX-BAND40-LTE

SAFEA2G35MB0F57

LGA

CRITICAL

U3802

0201

8.2NH+/-3%-0.25A-0.7OHM

L3808

8.2NH+/-3%-0.25A-0.7OHM

0201

L3809

10NH-3%-140MA

01005

L3810

10NH-3%-140MA

01005

L3812

01005

18NH-3%-140MA

L3811

22NH-5%-0.1A

01005

L3807

9.1NH-3%-220MA

0201

CRITICAL

C3808

6.8NH-3%-0.3A

0201

CRITICAL

C3809

0.7NH-0.8A

0201

CRITICAL

L3805

0.7NH-0.8A

0201

CRITICAL

L3806

5.6NH-3%-0.35A

0201

CRITICAL

L3804

0201

3.3NH+/-0.1NH-0.45A

CRITICAL

L3820

01005

2.7NH+/-0.1NH-200MA

CRITICAL

L3819

25V

+/-0.1PF

0.4PF

C0G-CERM
201

CRITICAL

L3825

0201

2.0NH+/-0.1NH-0.6A

CRITICAL

L3840

34

29

29

35

35

29

29

29

29

36

36

36

36

33

29

29

33

34

29

01005

NO_XNET_CONNECTION=TRUE

5%

16V

NP0-C0G

27PF

C3804

16V

5%

01005

27PF

NP0-C0G

C3806

27PF

5%

16V

NP0-C0G

01005

C3807

29

+/-0.05PF
CERM

01005

16V

0.9PF

C3802

16V
01005

1.2PF

NP0-C0G-CERM

+/-0.05PF

C3805

+/-0.05PF

1.2PF

NO_XNET_CONNECTION=TRUE

NP0-C0G-CERM

16V

01005

C3803

CELL: RX MATCHING

50_B3_DUPLX_RX

100_XCVR_B2_PRX_N

50_3P4T_PRX_OUT

50_B38_B40_SPDT

100_XCVR_B3_PRX_N

50_B38_FILTER

50_B40_FILTER

50_FULL_B40_FILTER

100_XCVR_B3_PRX_P

50_FULL_B40_SPDT

50_B2_DUPLX_RX

100_XCVR_B20_PRX_N

100_XCVR_B20_PRX_P

100_B20_DUPLX_RX_N

100_B20_DUPLX_RX_P

100_XCVR_B8_PRX_N

100_XCVR_B5_B18_PRX_P

100_B8_DUPLX_RX_N

100_B8_DUPLX_RX_P

100_B5_DUPLX_RX_N

100_RX_MODULE_OUT_P

100_XCVR_B7_B38_B40_PRX_N

100_XCVR_B7_B38_B40_PRX_P

100_RX_MODULE_OUT_N

100_XCVR_B1_B34_B39_DCS_PRX_N

100_XCVR_B1_B34_B39_DCS_PRX_P

100_B5_DUPLX_RX_P

100_XCVR_B8_PRX_P

100_XCVR_B5_B18_PRX_N

100_XCVR_B2_PRX_P

50_B7_B38_B40_PRX_BALUN_IN

100_B7_B38_B40_PRX_BALUN_OUT_N

50_FULL_B40_FILTER_MATCH

50_FULL_B40_SPDT_MATCH

50_B40_FILTER_MATCH

100_B7_B38_B40_PRX_MATCH_N

100_B7_B38_B40_PRX_MATCH_P

50_B3_RX_BALUN

50_B2_RX_BALUN

100_B7_B38_B40_PRX_BALUN_OUT_P

051-0886

A.0.0

38 OF 121

31 OF 54

1 2

1

2

1

2

4

1

3

2

1 2

6

987

524

3

1

1 2

1 2

2

1

21

21

21

21

1

2

1

2

1

2

1

2

1

2

235

4 1

21

21

21

21

1

2

1

2

1

2

1

2

21

21

1

2

1

2

21

2

1

21

1 2

1 2

1 2

2

1

2

1

1 2

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT
OUT

OUT

IN

OUT B3

OUT B1

IN B34/B39

IN B1/B3

GND

OUT B34
OUT B39

OUTPUT BAND2

OUTPUT BAND5+18

OUTPUT BAND8

INPUT BAND2

GND

INPUT BAND5+18

THRM

INPUT BAND8

PAD

CTRL

RFIN

GND

RF2

RF1

VDD

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

TX INTERSTAGE FILTERS

NOSTUFF

01005

16V

5%

56PF

NP0-C0G

C3911

29

14 25 33 39 40

28 33

29

29

29

29

29

33

10%
X5R

6.3V

0.01UF

01005

C3909

34

36

36

35

34

33

33

33

16V

5%

01005

NP0-C0G

56PF

C3908

35 29

NOSTUFF

56PF

NP0-C0G
01005

16V

5%

C3902

CRITICAL

AF48

LGA

SAW-BAND-TX-B1-B3-B34-B39

FL3902

NOSTUFF

10NH-3%-140MA

01005

L3907

NOSTUFF

01005

5.1NH-3%-0.16A

L3908

1.5NH+/-0.1NH-220MA

01005

L3909

CRITICAL

LGA

SATGR832MBM0F57

FL3901

CRITICAL

01005

2.0NH+/-0.1NH-0.2A-1.35OHM

C3901

0.00

MF

01005

1/32W

0%

C3903

0.00

MF

1/32W

0%

01005

C3904

01005

0.00

0%

1/32W

MF

C3905

0.00

0%
MF

01005

1/32W

C3910

CRITICAL

01005

10NH-5%-140MA

L3901

CRITICAL

01005

10NH-5%-140MA

L3902

01005

10NH-5%-140MA

L3903

MF

1/32W

0%

01005

0.00

C3914

1/32W

0%

0.00

01005

MF

C3913

NOSTUFF

01005

1.2NH+/-0.1NH-220MA

L3904

CRITICAL

TSLP6-2

BGS12SL6

U3901

01005

2.0NH+/-0.1NH-0.2A-1.35OHM

L3906

01005

1.5NH+/-0.1NH-220MA

R3901

CRITICAL

2.7NH+/-0.1NH-200MA

01005

L3905

3.3PF

16V

01005

+/-0.1PF

NP0-C0G

C3906

01005

1.5NH+/-0.1NH-220MA

C3907

NP0-C0G

01005

100PF

5%

16V

C3912

CELL: RF TRANSCEIVER (3 OF 4)

50_XCVR_B7_B38_B40_TX

PP_LDO14_2V65

PA_MB_CTL0

50_XCVR_B8_TX

50_XCVR_B5_B18_TX

50_XCVR_B2_TX

50_XCVR_B1_B3_TX

50_XCVR_B34_B39_TX

50_B38_B40_TX_SPDT_MATCH

50_B2_TX_SAW_OUT

50_B5_TX_SAW_OUT

50_B8_TX_SAW_OUT

50_B7_TX_FILT_IN

50_B3_TX_SAW_OUT

50_B1_TX_SAW_OUT

50_B34_TX_SAW_OUT
50_B39_TX_SAW_OUT

50_B20_TX_SAW_IN

50_XCVR_B20_TX

50_B7_TX_SPDT_OUT

50_B8_TX_SAW_IN

50_B5_B18_TX_SAW_IN

50_B2_TX_SAW_IN

50_B3_TX_SAW_MATCH

50_B1_TX_SAW_MATCH

50_B34_B39_TX_FILT_IN

50_B1_B3_TX_SAW_IN

50_XCVR_B7_B38_B40_TX_MATCH

50_B38_B40_TX_SPDT_OUT

051-0886

A.0.0

39 OF 121

32 OF 54

2

1

2

1

2

1

2

1

6

7

1

4

10

532

9
8

1

2

1

2

21

11

9

7

468

10

12

1

2

3

13

5

21

1 2

1 2

1 2

1 2

1

2

1

2

1

2

1 2

1 2

1

2

6

5

2

1

3

4

1

2

21

1

2

1 2

1

2

1 2

WWW.AliSaler.Com

OUT

IN
IN

IN

IN

IN

IN

IN

IN

OUT

BI

IN

IN

IN

IN

IN

OUT
OUT

IN

IN

VC1
VC2

DCSRXIN

BAND1ANT

BAND1_TX

GND

VDD

THRM

BAND34_39_RXIN

BAND1_34_39_DCSRXOUT1

BAND1_34_39_DCSRXOUT0

PAD

BI

BI

BI

OUT

IN

IN

IN
IN

IN
IN

VC2

DGND

RF1

GND2

GND1

VC3

VC4

RF7

RF6

RF5

RF2
RF3

VDD

RF4

VC1

IN/OUT

GND

OUT/IN

RFIN_B1

GND

THRM

CPL_IN

CPL_OUT

RFOUT_B1

RFIN_B34
RFIN_B39
RFOUT_B34/B39

RFIN_B38/B40
RFOUT_B38
RFOUT_B40

VBATT

VBS_2

VCC

VBS_1

VBS_0

VMODE

PAD

IN

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

BAND 1/34/39/38/40 TX

B34 HPM 1 0 1 0
B34 LPM 1 0 1 1

B40 LPM 0 1 1 1

B39 HPM 0 0 1 0

B40 HPM 0 1 1 0

B38 LPM 1 1 1 1

B38 HPM 1 1 1 0

B39 LPM 0 0 1 1

B1 LPM X 1 0 1

B1 HPM X 1 0 0

OFF X X 0 0 0

=======================================================

BAND PA POWER MODE PA_BS PA_CTL1 PA_CTL0 PA_R1

34

24 25 34 35 36 37 38 54

34 35 36 37 38

6.3V

20%

0201-1

X5R

1.0UF

C4002

0.1UF

01005

6.3V
X5R-CERM

20%

C4001

36

28 34 35 36

28 32

32

39

39

39

39

14 25 32 33 39 40

32

0.1UF

01005

20%

6.3V
X5R-CERM

C4074

NOSTUFF

01005

+/-0.1PF

1.2PF

NP0-C0G

16V

C4038

32

28

28 34 35 36 37

31

31

01005

16V

56PF

5%
NP0-C0G

C4034

56PF

5%
16V
NP0-C0G
01005

C4033

28 33

28 33

CRITICAL

LGA

LMSWFKJM

U4027

NP0-C0G
01005

16V

56PF

5%

C4053

5%

01005

NP0-C0G

16V

56PF

C4052

56PF

5%
16V

01005

NP0-C0G

C4042

56PF

5%

01005

NP0-C0G

16V

C4041

100PF

5%
16V

01005

NP0-C0G

C4054

NP0-C0G

100PF

01005

5%
16V

C4043

1/32W

0.00

MF

0%

01005

R4065

5%
NP0-C0G

01005

56PF

16V

C4073

NOSTUFF

01005

NP0-C0G

+/-0.05PF

0.5PF

16V

C4055

NOSTUFF

NP0-C0G

25V

56PF

5%

201

C4060

CRITICAL

01005

0%
MF

1/32W

0.00

L4070

31

31

31

31

35

0.00

01005

0%

1/32W

MF

L4012

NOSTUFF

16V

56PF

NP0-C0G
01005

5%

C4023

01005

NP0-C0G

16V

5%

56PF

C4072

0%

01005

1/32W

MF

0.00

R4064

NP0-C0G

56PF

01005

16V

5%

C4012

14 25 32 33 39 40

5%

56PF

NP0-C0G

16V
01005

C4008

24 28 39 40

28 39 40

NP0-C0G
01005

5%
16V

56PF

C4075

16V

5%
NP0-C0G

56PF

01005

C4076

28 33

28 33

0.00

01005

0%
MF

1/32W

L4029

01005

1/32W

MF

0.00

0%

L4030

01005

0.00

MF

1/32W

0%

L4044

0

MF

201

5%

1/20W

C4058

0

5%

201

1/20W

MF

C4048

MF

0

1/20W

5%

201

C4049

CRITICAL

7.5NH-0.30A

0201

L4097

CRITICAL

2.9NH+/-0.1NH-0.5A-0.2OHM

0201

L4083

CRITICAL

0.6PF

CERM

25V

+/-0.05PF

0201

C4063

CRITICAL

0201

8.2NH+/-3%-0.25A-0.7OHM

C4071

CRITICAL

BGA

SKY13477

U4000

CRITICAL

LGA

DEA162025LT-5046B1SJ

1880-2025MHZ

FL4012

0201

25V

+/-0.05PF

C0G-CERM

3.0PF

C4047

10NH-3%-250MA

0201

C4064

15NH+/-3%-0.25A-0.7OHM

0201

C4046

CRITICAL

0201

100PF

NP0-CERM

25V

5%

L4072

0201

12NH+/-3%-0.25A-0.7OHM

C4061

18NH-3%-140MA

01005

C4040

01005

5%

16V

NP0-C0G

100PF

L4020

7.5NH-3%-0.140A

01005

C4037

+/-0.1PF

NP0-C0G

01005

16V

4.0PF

L4045

CRITICAL

0201

5.6NH-3%-0.35A

C4056

CRITICAL

LLP

ACPM-7900-AP1

U4025

CRITICAL

4.0PF

0201

COG-CERM

25V

+/-0.1PF

L4071

NOSTUFF

NP0-C0G

1.2PF

01005

16V

+/-0.1PF

C4039

32

CELL: PENTABAND PA

50_3P4T_PRX_OUT

50_B40_PA_MATCH

50_B38_PA_MATCH

PP_PA

50_B38_B40_PA_IN

50_B1_PA_OUT

50_RX_MOD_B34_B39_IN

50_B34_B39_RX_ASM

3P4T_SEL_0
3P4T_SEL_1

50_B1_RX_MOD_ANT

50_B1_PA_OUT_MATCH

50_RX_MOD_DCS_IN

PP_LDO14_RX_MOD

50_B7_RX_SP3T_IN

50_B34_B39_PA_FILT_IN

50_B34_B39_PA_FILT_OUT

PP_LDO14_3P4T

50_B40_PA_OUT

50_B38_PA_OUT

50_B34_B39_PA_OUT

50_B39_PA_IN

50_B34_PA_IN

50_B1_PA_IN

50_MBPA_CPL_IN

50_B34_TX_SAW_OUT

3P4T_SEL_1

3P4T_SEL_0

ANT_SEL_0

ANT_SEL_1

PP_LDO14_2V65

50_B7_DUPLX_RX

50_B38_FILTER

50_B40_FILTER

50_FULL_B40_FILTER

100_RX_MODULE_OUT_N

100_RX_MODULE_OUT_P

PA_R1

PA_MB_CTL1

50_B1_TX_SAW_OUT

50_B39_TX_SAW_OUT

PP_LDO14_2V65

50_B1_ANT

50_B34_B39_TX_ASM

50_DCS_RX_ASM

50_B38_B40_TX_SPDT_MATCH

PA_MB_CTL0

PA_BS

=PPBATT_VCC_BB

50_B2_B3_CPL_IN

50_B38_B40_TX_MATCH

051-0886

A.0.0

40 OF 121

33 OF 54

2

1

2

1

2

1

2

1

2

1

2

1

8
7

1

17

15

13910

3

2

6

5

4

14

16

19

20

18

12

11

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

2

1

2

1

1 2

1 2

2

1

2

1

1 2

2

1

2

1

2

1

2

1

1 2

1 2

1 2

1 2

1 2

1 2

1

2

1 2

2

1

1

2

C1

B2C5B3

B4

A2

C2

A3

A5

A4

C4
C3

A1

B5

B1

1

2

4

3

1 2

1

2

1

2

1 2

1

2

1

2

1 2

1

2

1 2

1

2

2

9

1

14131618202322

25272829303132

12
24

21

5
4

19

6
17
15

26810

7

3

11

1 2

2

1

THRM_PAD

VEN_B2_B3

CPL_OUT

GND

GND

RX_B2

GND

RX_B3

RFIN_B2

RFIN_B3

VBATT

VCC

CPL_IN

BS

ANT_B2

ANT_B3

VMODE

BI

BI

OUT

IN

IN

IN

IN
IN

IN

IN

OUT

IN

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

BAND 2/3 PAD

B3 LPM 0 1 1

OFF X X 0 X

=====================================================

B2 LPM 1 1 1

B3 HPM 0 1 0
B2 HPM 1 1 0

BAND PA POWER MODE PA_BS PA_ON_B2_B3 PA_R1

0.00

0201

MF

1/20W

1%

R4139

CRITICAL

+/-0.05PF
CERM

25V

0.6PF

0201

C4155

CRITICAL

TQM6M6224

LGA

U4123

X5R

0.22UF

20%

6.3V
01005

C4100

6.3V

20%

0.22UF

X5R
01005

C4101

5%
CERM

6.3V

100PF

01005

C4102

CERM

100PF

5%

01005

6.3V

C4103

NOSTUFF

01005

16V
C0G-CERM

+/-0.05PF

0.5PF

C4104

CRITICAL

0201

3.0NH+/-0.1NH-0.45A

L4136

CRITICAL

3.0NH+/-0.1NH-0.45A

0201

L4138

CRITICAL

0201

COG-CERM

0.5PF

+/-0.05PF
25V

C4154

39

39

35

28 33 35 36 37

28 33 35 36

28

X5R

6.3V

20%

1.0UF

0201-1

C4149

33 35 36 37 38

6.3V

20%

01005

X5R-CERM

0.1UF

C4148

24 25 33 35 36 37 38 54

0%

01005

MF

1/32W

0.00

C4146

32

32

31

33

31

NOSTUFF

25V
CERM
201

+/-0.05PF

0.5PF

C4151

NOSTUFF

0.5PF

25V
CERM

+/-0.05PF

201

C4150

NOSTUFF

9.1NH-3%-140MA

01005

L4122

NOSTUFF

01005

2.2NH+/-0.1NH-200MA

L4182

01005

2.7NH+/-0.1NH-200MA

L4123

C0G-CERM

16V

+/-0.05PF

0.5PF

01005

C4147

CELL: BAND 2/3 PAD

50_B2_DPLX_ANT_MATCH

50_B2_DPLX_ANT

50_B3_TX_PAD_IN

50_B3_DPLX_ANT

50_B3_DUPLX_RX

50_B2_B3_CPL_IN

50_B2_DUPLX_RX

50_B2_TX_SAW_OUT

50_B3_TX_SAW_OUT

=PPBATT_VCC_BB

PP_PA

PA_ON_B2_B3

PA_BS

PA_R1

50_B7_B20_CPL_IN

50_B3_ANT

50_B2_ANT

50_B2_TX_PAD_IN

051-0886

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1 2

2

1

31

30

20

27

23

1

376

5129

1517181921

22

10

11

14

13

28

26

25

2

4

29

8

16

24

2

1

2

1

2

1

2

1

2

1

21

21

2

1

2

1

2

1

1 2

2

1

2

1

1

2

1

2

21

2

1

WWW.AliSaler.Com

VMODE

BS

VEN_B7_B20

VCC

VBATT

RFIN_B20
RFIN_B7

RX_P_B20

GND

RX_N_B20

RX_B7

GND

THRM_PAD

CPL_IN

CPL_OUT

ANT_B7

ANT_B20

BI

IN

BI

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

IN

IN

INPUT_BAND7

INPUT_BAND20

OUTPUT_BAND20

OUTPUT_BAND7

GND

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BAND PA POWER MODE PA_BS PA_ON_B20_B7 PA_R1

BAND 20/7 PAD

B7 HPM 1 1 0

=====================================================
OFF X X 0 X

B20 HPM 0 1 0
B20 LPM 0 1 1

B7 LPM 1 1 1

CRITICAL

LGA

AFEM-790720

U4215

39

NOSTUFF

0201

10NH-3%-250MA

L4257

CRITICAL

CELL

01005

NP0-C0G

16V

+/-0.1PF

1.0PF

C4207

24 25 33 34 36 37 38 54

39

6.3V
01005

20%

0.22UF

X5R

C4235

01005

6.3V

20%

0.22UF

X5R

C4232

CERM

100PF

5%

6.3V
01005

C4233

01005

5%

6.3V

100PF

CERM

C4234

33 34 36 37 38

CERM

100PF

5%

6.3V
01005

C4239

CRITICAL

CELL

6.2NH-0.30A

0201

L4200

CRITICAL

CELL

25V

+/-0.1PF

3.9PF

C0G-CERM
0201

C4208

5%

16V

CERM

01005

22PF

C4231

NOSTUFF

0.8PF

01005

16V
NP0-C0G

+/-0.1PF

CRITICAL

C4228

2.2NH+/-0.1NH-0.6A

0201

C4236

CRITICAL

25V

+/-0.05PF

0.5PF

0201

COG-CERM

L4229

34

01005

3.3NH+/-0.1NH-180MA

CRITICAL

L4254

20%

6.3V
01005

X5R-CERM

0.1UF

C4229

20%
X5R

6.3V
0201-1

1.0UF

C4230

28 33 34 36 37

28 33 34 36

28

29

33

16V

NOSTUFF

01005

NP0-C0G

+/-0.1PF

1.2PF

C4227

31

31

32

01005

NP0-C0G

16V

56PF

5%

C4218

32

NOSTUFF

NP0-C0G

5%

01005

16V

56PF

C4219

CRITICAL

SAWFD847MGA0F57

LGA

FL4211

01005

CRITICAL

2.7NH+/-0.1NH-200MA

L4253

NOSTUFF

01005

2.2NH+/-0.1NH-200MA

C4216

NOSTUFF

25V

+/-0.05PF
CERM

0.5PF

201

L4228

CELL: BAND 7/20 PAD

50_B7_DPLX_ANT

50_B7_TX_FILT_MATCH

50_B20_TX_SAW_MATCH

50_B20_TX_PAD_IN

50_B20_DPLX_ANT

50_B7_B20_CPL_IN

50_PDET_PAD_IN

PA_R1

50_B20_TX_SAW_IN

50_B7_TX_FILT_IN

100_B20_DUPLX_RX_P

100_B20_DUPLX_RX_N

PA_BS

50_B20_ANT

50_B7_ANT

PA_ON_B7_B20

PP_PA

50_B7_DUPLX_RX

=PPBATT_VCC_BB

50_B7_TX_FILT_OUT

50_B7_TX_PAD_IN

50_B20_TX_SAW_OUT

051-0886

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35 OF 54

24

29

30

2

25

26
28

12

10

13

11

22

2119181715914

567

3

1

23

27

42

403941

3738363435

313233

4
20

8

16

1

2

1 2

2

1

2

1

2

1

2

1

2

1

21

2

1

1 2

2

1

21

2

1

21

2

1

2

1

2

1

1 2

2

1

4

1 9

6

532

10

8

7

211

2

2

1

IN

IN

IN

IN

IN

IN

OUT

BI

BI

OUT

OUT

OUT

OUT

ANT_B5

RFIN_B8

BS

VEN_B5_B8

CPL_OUT

CPL_IN

THRM_PAD

GND

VBATT

VCC

VMODE

ANT_B8

RX_P_B5
RX_N_B5

RX_P_B8
RX_N_B8

RFIN_B5

IN

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

BAND PA POWER MODE PA_BS PA_ON_B5_B8 PA_R1

B5 HPM 0 1 0
B8 HPM 1 1 0

B8 LPM 1 1 1

B5 LPM 0 1 1

OFF X X 0 X

=====================================================

BAND 5/8 PAD

32

33 34 35 37 38

0.1UF

20%

6.3V
X5R-CERM
01005

C4318

32

6.3V

20%
X5R

1.0UF

0201-1

C4319

28 33 34 35 37

28 33 34 35

28

33

39

39

31

31

31

31

NP0-C0G
01005

16V

1.2PF

+/-0.1PF

NOSTUFF

C4316

2.2NH+/-0.1NH-200MA

01005

CRITICAL

L4314

01005

2.2NH+/-0.1NH-200MA

CRITICAL

L4315

2.7NH+/-0.1NH-0.50A

0201

CRITICAL

C4320

SKY77493

LGA

CRITICAL

U4358

01005

6.3V

20%

0.22UF

X5R

C4322

01005

6.3V

20%

0.22UF

X5R

C4323

5%

6.3V
CERM
01005

100PF

C4324

5%

100PF

CERM

6.3V
01005

C4325

NP0-C0G
01005

16V

1.2PF

+/-0.1PF

NOSTUFF

C4327

+/-0.1PF
NP0-C0G

01005

16V

1.2PF

NOSTUFF

C4326

22NH-100MA

NOSTUFF

L4317

0201

01005

MF

1/32W

1%

49.9

R4300

25V

+/-0.05PF

0.5PF

0201

CRITICAL

L4316

COG-CERM

16V

+/-0.1PF

2.2PF

NP0-C0G
01005-1

CRITICAL

C4317

2%

25V

0201

C0H-CERM

C4321

18PF

24 25 33 34 35 37 38 54

CELL: BAND 5/8 PAD

50_B8_TX_PAD_IN

50_PA_ISO

50_B5_TX_PAD_IN

50_B5_DPLX_ANT

50_B8_DPLX_ANT

=PPBATT_VCC_BB

100_B5_DUPLX_RX_P

100_B5_DUPLX_RX_N

100_B8_DUPLX_RX_P

50_MBPA_CPL_IN

PA_ON_B5_B8
PA_BS
PA_R1

50_B5_TX_SAW_OUT

PP_PA

50_B8_TX_SAW_OUT

50_B5_ANT

100_B8_DUPLX_RX_N

50_B8_ANT

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1

2

1

2

1

21

21

21

16

28

25

24

20

4

3332313534

36383741394042

27

23

1

376

5129

1517181921

22

29

2

30

8

13
14

11
10

26

2

1

2

1

2

1

2

1

2

1

2

1

1

2

1

2

2

1

2

1

1 2

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IN

IN

OUT

IN

IN
IN

IN

IN

V2G

VBATT

HB_GSM_RF_OUT

LB_GSM_RF_OUT

HB_GSM_RF_IN

LB_GSM_RF_IN

VMODE0

PA_ON2
PA_ON3

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

THRM_PAD

GND

GND

GND

GND

GND

OUT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

HIGH BAND
HIGH BAND

HIGH BAND

BAND

LOW BAND
LOW BAND

LOW BAND

LOW BAND

LOW BAND

HIGH BAND

HIGH BAND

LOW BAND

LOW BAND

2G PA GAIN MODES

EDGE

EDGE

EDGE

EDGE

GSM

GSM

GSM

GSM

GSM

GSM

GSM

LOW

MEDIUM

MEDIUM

HIGH

HIGH

HIGH

LOW

HIGH

LOW

ULTRA LOW

LOW
HIGH
LOW

HIGH
LOW

LOW
HIGH

LOW
HIGH
LOW

HIGH

PA_R1

GAIN MODE

MODE

=======================================================

14 TO 15

2 TO 8

9 TO 15

8 TO 9

10 TO 14

15 TO 19

0 TO 6

7 TO 9

10 TO 15

5 TO 6

7 TO 13

16 TO 19

PCL RANGE

HIGH

ULTRA LOW

LOW

EDGE

2G PA

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

01005

5%

56PF

NP0-C0G

16V

C4489

0201

NOSTUFF

3.6NH+/-0.1NH-400MA

L4439

4V

20%
X5R

01005

0.1UF

C4488

402

4.7UF

20%

6.3V
X5R-CERM1

C4485

33 34 35 36 38

24 25 33 34 35 36 38 54

20%

1.0UF

10V
X5R-CERM
0201-1

C4487

16V
01005

5%
NP0-C0G

100PF

C4486

100PF

5%

01005

16V
NP0-C0G

C4483

39

28 33 34 35 36

28

28

01005

16V

CERM

5%

12PF

C4472

2.7PF

+/-0.1PF

01005-1

NP0-C0G

16V

C4467

NP0-C0G

33PF

01005

5%

16V

C4484

6.0PF

NOSTUFF

NP0-C0G

+/-0.1PF
16V

01005

C4471

2.7NH+/-0.1NH-200MA

01005

L4436

29

0201

NOSTUFF

3.6NH+/-0.1NH-400MA

L4438

29

0201

240OHM-350MA

L4440

LGA

CRITICAL

SKY77355

U4410

CRITICAL

0%

01005

MF

1/32W

0.00

L4435

CRITICAL

3.2NH+/-0.1NH-0.45A-025OHM

0201

L4437

0.00

0201

MF

1/20W

1%

R4437

39

CELL: 2G PA

50_TX_G_HB_ASM

50_TX_G_HB_PAOUT

50_XCVR_2G_LB_TX

=PPBATT_VCC_BB

50_TX_G_LB_PAIN

PA_R1

PP_BATT_VCC_2G_PA

50_TX_G_HB_PAIN

50_TX_G_HB_MCH

50_XCVR_2G_HB_TX

GSM_PA_HB_EN

GSM_PA_LB_EN

PP_PA

50_TX_G_LB_MCH

50_TX_G_LB_PAOUT

50_TX_G_LB_ASM

051-0886

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1

1

2

2

1

2

1

2

1

2

1

2

1

1 21 2

1 2

2

1

1

2

1

2

21

14

7

11

8

1

3

6

4
5

2322212019

181716

15

131210

9

2

1 2

21

1 2

IN

IN

IN

IN

OUT

MODE

VCON

EN

PGND

ACB

ACB

FB

SW

VDD

PVIN

SGND

BGND

BP

SW

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PA DC/DC CONVERTER

PLACE NEAR U1.H3

PLACE NEAR U11.D2

28

1.00K

01005

MF

1/32W

1%

R4500

24 25 33 34 35 36 37 54

28

28

56PF

NP0-C0G

16V

5%

01005

C4502

10%
X5R

0.01UF

01005

6.3V

C4503

6.3V

10%

01005

X5R-CERM

1000PF

C4500

CERM

10UF

20%

6.3V
0402

C4504

MF

1%

1/32W
01005

1.00K

R4534

33 34 35 36 37

CRITICAL

BGA

LM3258

U4500

CRITICAL

6.3V

20%

10UF

0402

CERM-X5R

C4507

CRITICAL

3300PF

6.3V

10%

01005

X5R

C4508

CRITICAL

PIFE20161T-SM

1.5UH-2.0A-0.137OHM

L4500

X5R-CERM
01005

1000PF

6.3V

10%

C4545

CELL: PA DCDC CONVERTER

BB_PDM_FILT

DCDC_ADJ

DCDC_OUT

PP_PA

DCDC_MODE

DCDC_EN

BB_PDM

=PPBATT_VCC_BB

051-0886

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1 2

2

1

2

1

2

1

2

1

1 2

D3

D2

C2

B1

A1

B4

A4

D4

A2

D1

B3

A3

C1

C4

C3

B2

2

1

2

1

1 2

2

1

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BI

IN

IN

BI

IN
IN

BI

TRX9
TRX10

TRX8

TRX7

TRX4
TRX5

TRX3

TRX6

TRX2

TRX1

GND

GND

GND

THRM

GND

HBTX

ANT2

ANT1

RF2

RF1

LBTX

VC1
VC2
VC3

VC5

VC4

VDD

PAD

RF3

VDD

RF2

GND

VC

RF1

BI

BI

BI

IN

IN

IN

IN

IN

BI
BI

IN

BI

BI

BI

BI

BI

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

0 = FULL B40

1 = PARTIAL B40

.

PRIMARY ASM

31

5%

01005

6.3V
CERM

100PF

C4669

14 25 32 33 39 40

6.3V

5%
CERM

01005

100PF

C4668

28

42

37

37

31

MF

1%
1/20W

201

49.9

R4608

49.9

1%
MF

1/20W
201

R4607

C0G-CERM

25V

+/-0.1PF

0.3PF

L4642

201

LGA

RF1495

CRITICAL

U4617

XFLGA

CXA4403GC

CRITICAL

SW4601

56NH-100MA-3.9OHM

0201

L4613

33

C4640

0201

1.8NH+/-0.1NH-600MA

33

36

14 25 32 33 39 40

5%

201

MF

1/20W

0

R4605

24 28 40

24 28 33 40

28 33 40

28 40

01005

100PF

5%

6.3V
CERM

C4622

01005

20%
4V
X5R

0.1UF

C4641

5%

01005

CERM

6.3V

100PF

C4639

01005

CERM

6.3V

5%

100PF

C4664

5%

01005

CERM

6.3V

100PF

C4665

6.3V

5%
CERM

01005

100PF

C4663

01005

100PF

5%

6.3V
CERM

C4666

35

36

28

33

35

33

34

34

CELL: ASM AND HB LTE FRONT-END

50_ASM_ANT

50_B38_B40_SPDT

PP_LDO14_2V65

B40_FILT_SELECT

50_PRI_ANT_COAX

50_TX_G_HB_ASM
50_TX_G_LB_ASM

50_FULL_B40_SPDT

50_DCS_RX_ASM

50_B34_B39_TX_ASM

50_B8_ANT

PP_LDO14_2V65

ANT_SEL_2

ANT_SEL_1

ANT_SEL_0

ANT_SEL_3

50_B7_ANT
50_B5_ANT

ANT_SEL_4

50_B1_ANT

50_B20_ANT

50_B34_B39_RX_ASM

50_B2_ANT

50_RF2_TERM

50_ANT2_TERM

50_TXRX_B38_B40_SPDT

50_TXRX_B38_B40_ASM

50_B3_ANT

051-0886

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1

2

1

1

2

1

2

2

1

17
18

16

15

7
8

6

14

5

4

11

9

1

27

13

10

20

2

19

3

12

21
22
23

25

24

26

2

5

4

3

1

6

1

2

21

1 2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

OUT
OUT

OUT

OUT

OUT
OUT

IN

IN

IN

IN

OUT
OUT

IN

OUT

OUT

B38_ANT

B40_ANT

GND

B38_RX

B40_RX

GPS OUT
GPS OUT
GPS IN

VC3
VC4

VC1
VC2

GND

GND

THRM

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

VDD

ANTENNA

AUX1

BAND 38 IN
BAND 40 IN

AUX2

GND

BAND 8,20 OUT

BAND 8,20 OUT

BAND 5+18 OUT

BAND 5+18 OUT

BAND 1,2,3,34,39 OUT
BAND 1,2,3,34,39 OUT

BAND 7,38,40 OUT
BAND 7,38,40 OUT

PAD

IN

IN

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

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12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

RX DIVERSITY

29

29

29

29

29

29

201

1/20W
MF

1%

49.9

R4739

28 33 39

24 28 39

24 28 33 39

28 39

29

29

NOSTUFF

3.0NH+/-0.1NH-0.45A

0201

L4765

56PF

NP0-C0G

5%
16V

01005

C4710

56PF

16V

NP0-C0G

5%

01005

C4797

10NH-3%-140MA

NOSTUFF

01005

L4740

41

01005

16V

5%

56PF

NP0-C0G

C4736

16V
NP0-C0G

5%

56PF

01005

C4738

NP0-C0G

16V
01005

5%

56PF

C4737

56PF

NP0-C0G

16V

5%

01005

C4739

29

29

5.6NH-3%-140MA

01005

C4755

5.6NH-3%-140MA

01005

C4756

01005

4.7NH-3%-160MA

L4742

BAW-DUAL-RX-B38-B40

LGA

885035

U4722

NOSTUFF

3.0NH+/-0.1NH-0.45A

0201

L4743

5%

201

MF

1/20W

0

R4701

CRITICAL

5%

6.3V

NP0-C0G

0201

27PF

C4794

0

1/20W

MF

201

5%

L4747

1/20W

5%

201

MF

0

L4746

CRITICAL

0201

6.8NH-3%-0.3A

C4799

2.3NH+/-0.1NH-0.50A-0.2OHM

0201

C4708

0201

5.6NH-3%-0.35A

CRITICAL

L4701

0201

5.6PF

NP0-C0G

25V

+/-0.1PF

R4711

CRITICAL

LGA

HFQSWBUUA-239

U4714

14 25 32 33 39

X5R

6.3V

10%

01005

0.01UF

C4798

41

CELL: RX DIVERSITY

50_B38_B40_DRX_FILT_IN

50_GPS_LNA_OUT

100_XCVR_GPS_RX_N

100_XCVR_GPS_RX_P

50_DRX_ANT

50_B38_DRX_FILT_OUT

50_DRX_ASM_MCH

50_B40_DRX_FILT_OUT

100_XCVR_B7_B38_B40_DRX_N

100_XCVR_B7_B38_B40_DRX_P

100_XCVR_B1_B2_B3_B34_B39_DRX_N

100_XCVR_B1_B2_B3_B34_B39_DRX_P

100_XCVR_B5_B18_DRX_P
100_XCVR_B5_B18_DRX_N

100_XCVR_B8_B20_DRX_P

50_B38_B40_DRX_AUX2_OUT

50_B40_DRX_MOD_IN

50_B38_DRX_MOD_IN

50_DRX_MOD_TERM

50_DIVERSITY_SWITCH_MATCH

ANT_SEL_1

ANT_SEL_0

ANT_SEL_3

ANT_SEL_2

50_GPS_DRX_MOD_IN

100_XCVR_GPS_RX_MATCH_P

100_XCVR_GPS_RX_MATCH_N

100_XCVR_B8_B20_DRX_N

PP_LDO14_2V65

051-0886

A.0.0

47 OF 121

40 OF 54

1

2

1

2

2

1

1 2

1

2

2

1

2

1

2

1

2

1

21

21

1

2

8

7

10

96532

1

4

1

2

1 2

1 2

1 2

1 2

1

2

1

2

1

2

1 2

17
18
14

4
3

6
5

343235

31

30

363738

2

8

1315162728

29

7

1

33

12
11

9

10

24

23

26

25

21
22

19
20

2

1

WWW.AliSaler.Com

OUT

CR

GND

OUT

IN

GPS/GNSS

HB/LB

ANT

GND

GND

PON

A0

VCC

GND

AI

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

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NOTICE OF PROPRIETARY PROPERTY:

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IV ALL RIGHTS RESERVED

R

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SIZE

DRAWING NUMBER

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6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

GPS_DRX_ANT

TOP MOUNT

TOP MOUNT

900MHZ TRAP

GPS

787MHZ TRAP

2400MHZ TRAP

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

0201

4.7NH-3%-0.35A

CRITICAL

CELL

L4806

15NH+/-3%-0.25A-0.7OHM

0201

CELL
CRITICAL

L4805

NOSTUFF

0201

27NH-3%-0.140A-2.3OHM

L4802

F-ST-SM

MM5829-2700

CELL

J4800

25V

0.2PF

+/-0.1PF
COG-CERM

201

NOSTUFF

C4801

CRITICAL

CELL

5%
MF

201

0

1/20W

R4801

201

COG-CERM

25V

+/-0.1PF

0.2PF

NOSTUFF

C4802

NOSTUFF

0201

10NH-3%-250MA

L4803

40

25V
C0G

0201

CELL

+/-0.1PF

CRITICAL

5.0PF

C4803

F-RT-SM

MM8930-2600B

CELL

J4802

01005

0.9PF

CELL

16V

CERM

+/-0.05PF

CRITICAL

C4805

40

25

LGA

SASLE1G58AB0F57

CELL

FL4801

CRITICAL

01005

20%

CELL

0.1UF

6.3V
X5R-CERM

C4809

TSNP6

BGA824N6

CELL

CRITICAL

U4801

CRITICAL

01005

CELL

150OHM-25%-200MA-0.7DCR

FL4802

5%

CELL

0

1/20W

MF

201

CRITICAL

L4801

NOSTUFF

201

25V

+/-0.1PF
C0G-CERM

1.3PF

L4807

+/-0.1PF

1.8PF

NP0-C0G

16V

CRITICAL

01005-1

CELL

C4804

0201

CELL

CRITICAL

2.0NH+/-0.1NH-0.6A

C4807

8.2NH+/-3%-0.25A-0.7OHM

CRITICAL

CELL

0201

L4804

CELL: GPS

SYNC_DATE=10/29/2013

SYNC_MASTER=RADIO_MLB_87

50_GPS_ANT_TEST

50_DRX_ANT

50_GPS_DIV_SW_CONN

50_GPS_DIV_SW_CONN

50_GPS_ANT_COAX

50_GPS_LNA_OUT

PP_LDO5_GPS_LNA_2V5

50_GPS_FILT1

50_GPS_DIV_TRI_ANT

50_GPS_LNA_IN

PP_GPS_LNA_2V5

50_GPS_FILT3

50_GPS_FILT2 50_GPS_FILT4

051-0886

A.0.0

48 OF 121

41 OF 54

21

1

2

1

2

423

1

2

1

1 2

2

1

1

2

1 2

1

5

623

4

1 2

9

8

542

7

1

36

2

1

1

6

3

2

4

5

21

1 2

2

1

2

1

21

21

41

41

BI

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

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NOTICE OF PROPRIETARY PROPERTY:

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6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

ANTENNA FEEDS

PRI_ANT COAX

CELL

F-ST-SM

MM5829-2700

J4910

39

CELL: ANTENNA FEEDS

SYNC_MASTER=RADIO_MLB_87

SYNC_DATE=10/29/2013

50_PRI_ANT_COAX

051-0886

A.0.0

49 OF 121

42 OF 54

423

1

WWW.AliSaler.Com

OUT

SYM_VER-1

SYM_VER-1

OUT

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

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NOTICE OF PROPRIETARY PROPERTY:

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R

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SIZE

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THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

0.055 OHM DCR

0.055 OHM DCR

NOTE: SPKR_L_CONN_N AND SPKR_L_CONN_P WERE SWAPPED ON 5/22/12 PER RADAR #11526818

DZ5700

27V-100PF

0402

C5700

201

NP0-C0G

1%

27PF

25V

C5701

10%
X7R

0.01UF

25V
402

0603

FERR-70-OHM-4A

L5700

R5700

201

100K

MF

1/20W

1%

C5702

201

NP0-C0G

1%

27PF

25V

201

C5703

CERM

6.8PF

+/-0.25PF
25V

25V
201

C5704

CERM

6.8PF

+/-0.25PF

NOSTUFF

R5705

1%

100K

MF

1/32W
01005

01005

1%

10K

MF

1/32W

R5706

48

01005

C5705

NP0-C0G-CERM

8.2PF

+/-0.5PF
16V

16V
01005

C5707

8.2PF

+/-0.5PF
NP0-C0G-CERM

90-OHM-50MA

TCM0605-1

L5703

90-OHM-50MA

TCM0605-1

L5704

11

0201-1

14.2V-6PF

DZ5703

CRITICAL

DZ5704

0201-1

14.2V-6PF

CRITICAL

DZ5702

0201-1

14.2V-6PF

CRITICAL

DSF01S30SC

DZ5710

SM-201

CRITICAL

01005

0.00

0%

R5791

1/32W
MF

NOSTUFF

0.00

0%

R5790

1/32W

MF

01005

CRITICAL

D5700

TSSLP-2-1

ESD0P2RF-02LS

D5702

ESD0P2RF-02LS

TSSLP-2-1

CRITICAL

D5703

CRITICAL

TSSLP-2-1

ESD0P2RF-02LS

D5701

ESD0P2RF-02LS

TSSLP-2-1

CRITICAL

NOSTUFF

J5700

HB-SM

MLB-X200

IO: FILTERS & HOTBAR CONN

SYNC_DATE=04/18/2011

SYNC_MASTER=N/A

E75_DPAIR2_CONN_P

E75_DPAIR2_CONN_N

E75_DPAIR1_CONN_N

E75_DPAIR1_CONN_P

=PPVBUS_USB_EMI

E75_DPAIR1_P

E75_DPAIR1_N

E75_DPAIR2_P

E75_DPAIR2_N

=PPVCC_MAIN_DOCK

CONN_DET_L

PPOUT_E75_ACC_ID1_CONN

PPOUT_E75_ACC_ID2_CONN

PPOUT_E75_ACC_ID1

PPOUT_E75_ACC_ID2

PPVBUS_E75_USB_CONN

TS_CON_DET_L

PMU_E75_ACC_DET_L

SPKR_L_CONN_P

SPKR_L_CONN_N

SPKR_L_CONN_N

E75_DPAIR1_CONN_P

SPKR_R_CONN_N

PPOUT_E75_ACC_ID2_CONN

PPOUT_E75_ACC_ID1_CONN

SPKR_R_CONN_N
SPKR_R_CONN_P

CONN_DET_L

E75_DPAIR2_CONN_N

PPVBUS_E75_USB_CONN

E75_DPAIR1_CONN_N

PPVBUS_E75_USB_CONN

E75_DPAIR2_CONN_P

SPKR_R_CONN_P

SPKR_L_CONN_P

FERR-22-OHM-1A-0.055OHM

FERR-22-OHM-1A-0.055OHM

L5701

L5702

0201

0201

051-0886

A.0.0

57 OF 121

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2

2

1

2

1

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1

2

2

1

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1

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1

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2

1 2

2

1

2

1

4

32

1

4

32

1

21

21

A

C

A

C

A

C

K

A

1

2

1 2

1

2

1

2

1

2

1

2

32

4

9

10

14

18

25

23

21

19

17

15

13

11

5
7

3

1

22

20

24

16

12

8

6

2

26

27

28

29

30

31

43 52

43 52

43 52

43 52

54

11

11

11

11

54

43

43 52

43 52

11

11

43

16 43 52

16 43 52

16 43 52

43 52

16 43 52

43 52

43 52

16 43 52

16 43 52

43

43 52

43

43 52

43

43 52

16 43 52

16 43 52

NC

NC
NC
NC
NC

BI

NC

BI

OUT

NC

NC

NC

IN

IN

NC

NC

NC

NC

NC

NC

IN

IN

OUT

IN

IN

IN

IN

OUT

IN

OUT

IN

IN

ANT(COMMON)

LOW(2.4GHZ)

HIGH(5.0GHZ)

GND

GND

INOUT

HI

LO

COM

GND

IN

OUT

OUT

IN

OUT
OUT

IN

OUT

IN

JTAG_SEL

HSIC_DATA
HSIC_STROBE

SDIO_CLK
SDIO_CMD

GPIO0/WL_HOST_WAKE

GPIO1/HOST_READY

GPIO2/WL_TCK

GPIO4/WL_TDI
GPIO5/WL_TDO

GPIO12/WL_TRST*

GPIO11/HSIC_RESUME
GPIO15/WLAN_UART_TX
GPIO14/WLAN_UART_RX

GPIO10/HSIC_DEVICE_READY

GPIO9/AGG_CHANNEL

GPIO3/WL_TMS

SDIO_DATA2

BT_REG_ON

RF_G_1

RF_G_0

RF_A_1

RF_A_0

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

GND_SIGNAL

RF_SW_CTRL11

CLK_32K

VBAT

VBAT

WL_REG_ON

SDIO_DATA3

SDIO_DATA1

SDIO_DATA0

RF_VCC_FEM

RF_VCC_FEM

I2SCLK

I2SDI

I2SDO

I2SWS

BT_PCM_OUT

BT_PCM_IN

BT_UART_CTS*

BT_UART_RTS*

BT_UART_TXD

BT_PCM_CLK

BT_PCM_SYNC

BT_GPIO1/HOSTWAKE

BT_GPIO0/BTWAKE

BT_UART_RXD

BT_GPIO5/LTE_COEX_UART_TX
BT_GPIO4/LTE_COEX_UART_RX

GPIO8

GPIO7

VIO

DUMMY

GPIO6

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

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III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

WIFI/BT: MODULE

MODULE ISOLATION

4

53

4

53

J5820

CRITICAL

MM4829-2702

F-ST-SM

5

53

19 28 52

19 28 52

C5827

0.2PF

+/-0.1PF
25V
COG-CERM

NOSTUFF

201

C5826

0.2PF

25V
COG-CERM
201

+/-0.1PF

NOSTUFF

C5825

25V

+/-0.1PF

0.2PF

201

NOSTUFF

COG-CERM

R5820

0.00

CRITICAL

0201

1%

1/20W

MF

10

10

R5801

1/32W

MF

0.00

0%

01005

R5802

0%

0.00

MF

01005

1/32W

R5800

01005

MF

1/32W

5%

10K

R5803

01005

MF

10K

1/32W

5%

5

53

C5800

4.7UF

X5R-CERM1

6.3V

20%

402

C5801

20%

6.3V
X5R-CERM1

4.7UF

402

R5804

0.00

01005

MF

0%

1/32W

28 52

C5880

0402-2

10UF

20%

6.3V
CERM-X5R

C5881

0402-2

10UF

20%

6.3V
CERM-X5R

C5882

0402-2

10UF

20%

6.3V
CERM-X5R

XW5890

SHORT-10L-0.25MM-SM

48 52

48 52

48 52

24 28

24 28

5

53

5

53

5

53

XW5891

SHORT-10L-0.25MM-SM

XW5892

SHORT-10L-0.25MM-SM

XW5893

SHORT-10L-0.25MM-SM

XW5894

SHORT-10L-0.25MM-SM

XW5895

SHORT-10L-0.25MM-SM

XW5896

SHORT-10L-0.25MM-SM

XW5897

SHORT-10L-0.25MM-SM

C5822

NOSTUFF

0.2PF

+/-0.1PF
25V
COG-CERM
201

C5821

1.1NH+/-0.1NH

0201

CRITICAL

C5815

25V

0.2PF

+/-0.1PF
COG-CERM

201

NOSTUFF

R5830

MF

0201

1%

1/20W

CRITICAL

0.00

C5816

201

+/-0.1PF

0.2PF

25V

NOSTUFF

COG-CERM

R5810

0201

1%

1/20W

MF

CRITICAL

0.00

C5817

201

NOSTUFF

0.2PF

25V

+/-0.1PF
COG-CERM

U5810

CRITICAL

2.4-5.0GHZ

SM

J5810

F-ST-SM

CRITICAL

MM4829-2702

U5811

LGA

CRITICAL

BAW-2436MHZ

885061

L5811

0201

CRITICAL

10NH-3%-250MA

C5810

CRITICAL

0.5PF

+/-0.05PF
25V
CERM
201

C5820

CRITICAL

+/-0.05PF

201

25V

0.5PF

CERM

C5811

0201

2.0NH+/-0.1NH-0.6A

CRITICAL

C5814

CRITICAL

0201

1.0NH+/-0.1NH-0.75A

C5824

0201

CRITICAL

1.0NH+/-0.1NH-0.75A

C5813

+/-0.05PF

0201

CRITICAL

25V

0.2PF

COG-CERM

C5823

CRITICAL

25V

+/-0.05PF

0.2PF

COG-CERM
0201

U5820

SM

DPX205850DT-9038A1SJ

CRITICAL

L5810

8.2NH+/-3%-0.25A-0.7OHM

0201

CRITICAL

R5805

5%

NOSTUFF

10K

MF

1/32W
01005

10

48 53

10

5

5

53

5

5

53

48 52

5

53

U5800

CRITICAL

WIFI-BT-DOPPELBOCK

LGA

WIFI/BT: MODULE

SYNC_DATE=05/20/2013SYNC_MASTER=WIFI_DEV

UART2_WLAN2SOC_TX

HSIC1_SOC2WLAN_HOST_RDY

RF_G_0_DIPLEXER

RF_0_ANT_MATCH_T

RF_A_0_DIPLEXER

UART2_WLAN2SOC_TX_R

HSIC1_SOC2WLAN_HOST_RDY_R

RF_G_0_BAW_MODRF_G_0_BAW_ANT

HSIC1_WLAN_STB

JTAG_WLAN_SEL

=PP1V8_S2R_VDDIO_WLAN_BT

PMU_GPIO_CLK_32K_WLAN

UART_WLAN2BB_LTE_COEX_R

PMU_GPIO_BT_REG_ON

UART_BB2WLAN_LTE_COEX

=PP1V8_S2R_VDDIO_WLAN_BT

HSIC1_WLAN_DATA

PMU_GPIO_BT_REG_ON_R

UART2_SOC2WLAN_TX_R

RF_A_0_MATCH

RF_G_1_MATCH_MOD

RF_1_ANT_MATCH_T

RF_0_ANT

=PPVCC_MAIN_WLAN

UART2_SOC2WLAN_TX

UART_BB2WLAN_LTE_COEX_R

UART_WLAN2BB_LTE_COEX

PMU_GPIO_WLAN_REG_ON

PMU_GPIO_CLK_32K_WLAN_R

PMU_GPIO_WLAN_REG_ON_R

OSCAR2RADIO_CONTEXT_A

WLAN_TX_BLANK

OSCAR2RADIO_CONTEXT_B

=PP1V8_S2R_VDDIO_WLAN_BT

WLAN_GPIO7

UART_BB2WLAN_LTE_COEX_R

UART_WLAN2BB_LTE_COEX_R

UART1_SOC2BT_TX

GPIO_BT_WAKE

PMU_GPIO_BT_HOST_WAKE

I2S4_SOC2BT_LRCK

I2S4_SOC2BT_BCLK

UART1_BT2SOC_TX
UART1_BT2SOC_RTS_L
UART1_SOC2BT_RTS_L

I2S4_SOC2BT_DATA

I2S4_BT2SOC_DATA

=PP3V3_S2R_WIFI_PA

PMU_GPIO_CLK_32K_WLAN_R

JTAG_WLAN_TMS_TX_BLANK

HSIC1_WLAN2SOC_DEVICE_RDY

UART2_SOC2WLAN_TX_R

UART2_WLAN2SOC_TX_R

HSIC1_WLAN2SOC_REMOTE_WAKE

TP_JTAG_WLAN_TRST_L

JTAG_WLAN_TDO_OSCAR_B

JTAG_WLAN_TDI_OSCAR_A

TP_JTAG_WLAN_TCK

HSIC1_SOC2WLAN_HOST_RDY_R

PMU_GPIO_WLAN_HOST_WAKE

PMU_GPIO_WLAN_REG_ON_R

PMU_GPIO_BT_REG_ON_R

RF_A_1_MATCH

RF_A_1_DIPLEXER

RF_1_ANT

RF_G_1_DIPLEXER

RF_G_0_MATCH_MOD

051-0886

A.0.0

58 OF 121

44 OF 54

423

1

2

1

2

1

2

1

1 2

1 2

1 2

1

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2

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1 2

2

1

2

1

2

1

21

21

21

21

21

21

21

21

2

1

21

2

1

1 2

2

1

1 2

2

1

642

5

3

1

423

1

14

235

1

2

2

1

2

1

21

21

21

2

1

2

1

1

3

5

246

1

2

1

2

23

13
14

7
6

22
20
27

26
24
25

2
52
53

1

19

28

10

3

74

62

79

67

5

121815213234404554585960616364656668697372757678808182838485868788

77

33

17

16

4

11

9

8

71

70

49

48

46

47

43
44

39

36

38

41
42

55
56

37

51
50

31

29

35

57

30

44

44

52

44 54

44

44 54

44

44

54

44

44

44

44 54

44

44

54

44

44

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WWW.AliSaler.Com

BI

BI

A

A

A

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

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D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

P/N 516S0906

C7522

33PF

5%

NP0-C0G

16V

01005

10%
16V

C7524

X7R-CERM

0201

1000PF

XW7520

SM

C7523

01005

16V

5%

33PF

NP0-C0G

240-OHM-0.2A-0.8-OHM

FL7500

0201-2

5

48

C7525

16V

5%

01005

27PF

NP0-C0G

45 48 52

TP7500

NOSTUFF

TP-P55

TP7501

NOSTUFF

TP-P55

TP7503

TP-P55

NOSTUFF

CRITICAL

J7500

CPB2304-0101F

F-ST-SM

C7526

01005

16V

NP0-C0G

4.7PF

+/-0.1PF

POWER: BATTERY CONNECTOR

SYNC_DATE=N/A

SYNC_MASTER=N/A

155S0823

RADAR:8391945

155S0644

FL7500,L1702,L1800,L1920,L2602,L2700,L2701,L2702,L2800,L2960,L2961,L2962,L2963,L38014_RF

BATT_NTC

NET_SPACING_TYPE=ANLG

BATT_SNS

NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM

=PPBATT_POS_CONN

BATT_SWI_CONN

BATT_NTC

UART5_BATT_RTXD

=PPBATT_POS_CONN

BATT_SWI_CONN

051-0886

A.0.0

75 OF 121

45 OF 54

2

1

2

1

1 2

2

1

21

2

1

1

1

1

14

13

10

12

9

11

2 1
4 3
6 5
8 7

2

1

46

45 54

45

45 48 52

45 54

45

S

D

G

SYM 1 OF 4

USB/BAT

BUCK

VCC-MAIN

SWITCHED POWER

VBAT
IBAT_S

IBAT0
IBAT1
IBAT2
IBAT3

VDD_BUCK1_01

VDD_BUCK0_01

VDD_BUCK0_23

BUCK5_FB

BUCK4_LX0

BUCK3_FB

BUCK3_LX0

BUCK2_FB

BUCK2_LX0

BUCK1_FB

BUCK6_FB

ACT_DIO

BUCK0_FB

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

BUCK3_SW1

BUCK4_SW1

BUCK4_SW2

BUCK6_BYP0
BUCK6_BYP1
BUCK6_BYP2

CHG_LX0
CHG_LX1
CHG_LX2
CHG_LX3

VBUCK3

VBUCK4

VCC_MAIN_S

VCC_MAIN

VDD_BUCK3

VDD_BUCK6

VPUMP

VBUS

BUCK6_LX0

BUCK3_SW2
BUCK3_SW3

VDD_BUCK5

VDD_BUCK4

VDD_BUCK2

VDD_BUCK1_2

VBUS_OVP_OFF

BUCK4_FB

BUCK5_LX0

HV_CHG_DIS

VCENTER

S

G

D

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

ANYWHERE BET.TRISTAR

R8173- PLACE NEAR PMU

NOTE: FOR NO BATTERY SITUATION

R8172- PLACE NEAR PMU

NOTE: 10V ZENER

RDSON=0.0136@VGS=-2.5V

C8149- PLACE NEAR PMU

LAYOUT NOTE -

RIGHT AT THE PIN

AT EACH VDD INPUT

VCC_MAIN BYPASS

27UF (NO DERATING)

ADDITIONAL DISTRIBUTED

27UF (NO DERATING)

64UF (NO DERATING)

ADDITIONAL DISTRIBUTED

ADDITIONAL DISTRIBUTED

ADDITIONAL DISTRIBUTED
64UF (NO DERATING)

ADDITIONAL DISTRIBUTED
32UF (NO DERATING)

C8137 0201 OKAY IF GRAPE HAS EXT FET

RIGHT AT THE PIN

LAYOUT NOTE: PLACE

LAYOUT NOTE: PLACE

LAYOUT NOTE:
R8146, C8146 CAN BE

AND PMU

USB REVERSE VOLTAGE PROTECTION

+/- 25V

FDMC6676BZ

6.9 A

VGS MAX

CHANNEL
RDS(ON)
IMAX

PLACE TWO 10UF CAP

MOSFET

P-TYPE
27 MOHM @-4.5V

ID=12.0A

ESR MAX=70MOHMESR MAX=70MOHM

DCR=54MOHM MAX

CRITICAL

0402

4V

15UF

X5R

20%

C8101

R8100

1%
MF

0.5

402

1/16W

0402

4V

15UF

CRITICAL

X5R

20%

C8131

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A1

LLP

CRITICAL

BZT52C10LP

DZ8120

CRITICAL

FDMC6676BZ

MLP3.3X3.3

Q8123

1/20W

220K

1%
MF

201

R8130

470K

1/20W

MF

201

NOSTUFF

1%

R8116

4V
0402

15UF

CRITICAL

X5R

20%

C8102

4V
0402

15UF

CRITICAL

X5R

20%

C8103

4V
0402

15UF

CRITICAL

X5R

20%

C8107

4V
0402

15UF

CRITICAL

X5R

20%

C8108

4V
0402

15UF

CRITICAL

X5R

20%

C8100

0201

0.01UF

25V

10%

NOSTUFF

X5R-CERM

C8146

4.7K

MF

201

5%

1/20W

R8146

PLACE_NEAR=U8100.L18:2MM

C8147

X5R-CERM
0603

35V

10%

4.7UF

CRITICAL

201

5%

1/20W

MF

NOSTUFF

4.7K

R8170

CRITICAL

0402

15UF

4V
X5R

20%

C8115

4V
0402

15UF

CRITICAL

X5R

20%

C8105

CRITICAL

15UF

4V
0402

X5R

20%

C8114

20%

15UF

4V
0402

CRITICAL

X5R

C8118

15UF

4V
0402

CRITICAL

X5R

20%

C8122

0402

4V

15UF

CRITICAL

X5R

20%

C8125

0402

15UF

4V

CRITICAL

X5R

20%

C8121

SM

XW8103

15UF

0402

4V

CRITICAL

X5R

20%

C8124

SM

XW8104

20%

0.22UF

C8196

6.3V
X5R
0201

OMIT_TABLE

FCBGA

D2089A0

U8100

6.3V
X5R
0201-1

1.0UF

20%

C8137

20%

10UF

0402

CERM-X5R

6.3V

C8152

CRITICAL CRITICAL

10UF

0402

CERM-X5R

6.3V

C8153

20%

CRITICAL

20%

10UF

0402

CERM-X5R

6.3V

C8154 C8155

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8156

20% 20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8157

C8180

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8179

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8186

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8185

20%

10UF

CERM-X5R

6.3V

CRITICAL

0402

XW8101

SM

C8184

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8151

CERM-X5R

6.3V

20%

10UF

0402

CRITICAL

0402

CERM-X5R

6.3V

10UF

C8178

CRITICAL

20%

C8177

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8150

6.3V
CERM-X5R
0402

10UF

20%

CRITICAL

C8176

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

10UF

CRITICAL

6.3V
CERM-X5R
0402

20%

C8166

10UF

C8165

CRITICAL

6.3V
0402

20%
CERM-X5R

C8164

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

6.3V
0402

CERM-X5R

C8163

CRITICAL

10UF

20%

C8162

6.3V
CERM-X5R
0402

10UF

20%

CRITICAL

C8183

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8182

20%

0402

CERM-X5R

6.3V

CRITICAL

10UF

C8181

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8172

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8171

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8170

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8169

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8188

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8168

6.3V
CERM-X5R
0402

10UF

20%

CRITICAL

C8187

20%

0402

CRITICAL

10UF

6.3V
CERM-X5R

C8167

CRITICAL

6.3V
CERM-X5R

10UF

20%

0402

C8161

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8160

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8159

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C8158

0201

C0G-CERM

C8143

5%
25V

18PF

C8193

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8194

CRITICAL

CERM-X5R

20%

10UF

0402

6.3V

82PF

CERM

5%

0201

25V

C8142

PLACE_NEAR=U8100.F16:10MM

X5R-CERM

CRITICAL

25V

10%

2.2UF

603

C8145

0402

15UF

4V

CRITICAL

X5R

20%

C8104

X5R
0402

15UF

4V

CRITICAL

20%

C8111

15UF

4V
0402

CRITICAL

X5R

20%

C8110

15UF

0402

4V

CRITICAL

X5R

20%

C8119

20%

1.0UF

0201-1

X5R

6.3V

CRITICAL

C8144

0402

15UF

4V

CRITICAL

X5R

20%

C8123

15UF

4V
0402

CRITICAL

X5R

20%

C8126

15UF

4V
0402

CRITICAL

X5R

20%

C8129

15UF

4V
0402

CRITICAL

X5R

20%

C8132

4V
0402

15UF

CRITICAL

X5R

20%

C8109

0402

15UF

4V

CRITICAL

X5R

20%

C8116

4V
0402

15UF

CRITICAL

X5R

20%

C8120

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A2

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A3

6.3V
X5R
0201-1

1.0UF

20%

C81A9

6.3V
X5R
0201-1

1.0UF

20%

C81A8

1.0UH-3.33A-66MOHM

CRITICAL

L8110

PILE20161D-SM

CRITICAL

15UF

4V
0402

X5R

20%

C8112

PILE25201D

2.2UH-2.35A-0.073OHM

L8111

CRITICAL

L8100

PILE25201D

1.0UH-3.51A-0.036OHM

CRITICAL

L8101

PILE25201D

CRITICAL

1.0UH-3.51A-0.036OHM

L8102

CRITICAL

PILE25201D

1.0UH-3.51A-0.036OHM

CRITICAL

L8103

PILE25201D

1.0UH-3.51A-0.036OHM

L8104

PILE25201D

1.0UH-3.51A-0.036OHM

CRITICAL

L8105

CRITICAL

PILE25201D

1.0UH-3.51A-0.036OHM

L8106

CRITICAL

PILE25201D

1.0UH-3.51A-0.036OHM

L8107

1.0UH-3.51A-0.036OHM

CRITICAL

PILE25201D

L8108

1.0UH-3.51A-0.036OHM

CRITICAL

PILE25201D

L8109

PILE25201D

1.0UH-3.51A-0.036OHM

CRITICAL

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A7

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A6

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A5

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A4

0402

4V

15UF

CRITICAL

X5R

20%

C8117

20%

6.3V

CRITICAL

100UF

TANT-POLY

PLACEMENT_NOTE=PLACE NEAR L8225.1

C8190

B1G-1

2.2UH-20%-5.5A-0.054OHM

L8112

PIME061D-SM

CRITICAL

4V
0402

15UF

CRITICAL

X5R

20%

C8106

15UF

4V
0402

CRITICAL

X5R

20%

C8127

SM

XW8102

SM

XW8105

15UF

0402

4V

CRITICAL

X5R

20%

C8130

CRITICAL

6.3V
CERM-X5R
0402

10UF

20%

C81A0

CRITICAL

15UF

X5R
0402

4V

20%

C8113

XW8106

SM

SM

XW8107

402

1UF

CERM

10%

6.3V

C8139

6.3V
X5R
0201-1

1.0UF

20%

C8138

402

CERM

10%

1UF

6.3V

C8136

6.3V
X5R
0201-1

1.0UF

20%

C8135

R8173

201

1/20W

1%
MF

499

PLACE_NEAR=U8100.R17:10MM

C8175

CERM-X5R

6.3V

CRITICAL

10UF

0402

20%

CRITICAL

C8141

TANT-POLY

100UF

6.3V

20%

B1G-1

TANT-POLY

100UF

C8140

CRITICAL

6.3V

20%

PLACEMENT_NOTE=PLACE NEAR L8225.1

B1G-1

PMEG4030ER

CRITICAL

D8100

SOD-123W

PLACE_NEAR=U8100.R17:10MM

0402

C8149

NOSTUFF

25V

10%

0.022UF

X7R

PLACE_NEAR=U8100.R17:2MM

0

R8172

MF

201

1/20W

5%

SHORT-0201

XW8114

C8148

CRITICAL

PLACE_NEAR=U8100.F18:2MM

4.7UF

35V
X5R-CERM
0603

10%

4V
0402

15UF

CRITICAL

X5R

20%

C8128

CRITICAL

Q8104

FDMC6683

MLP3.3X3.3

SYNC_DATE=11/26/2012

PMU: ANYA PAGE 1

SYNC_MASTER=J72_MLB_C

SWITCH_NODE=TRUE

MIN_NECK_WIDTH=0.20MM

BUCK3_LX0

MIN_LINE_WIDTH=0.60MM

MAX_NECK_LENGTH=0.5 MM

DIDT=TRUE

NET_SPACING_TYPE=PWR

OVP_SW_EN_L

PPVBUS_PROT

MIN_NECK_WIDTH=0.15MM

MIN_LINE_WIDTH=0.20MM

VOLTAGE=6.0V

NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM

PPBATT_VCC

PPBATT_VCC

=PPVCC_MAIN_CPU

VBUS_PROT_G

MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=ANLG

BATT_SNS_R

BATT_SNS

NET_SPACING_TYPE=ANLG

ACT_DIO

MIN_LINE_WIDTH=0.2 MM
MIN_NECK_WIDTH=0.1 MM

MAX_NECK_LENGTH=3 MM

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.60MM

PMU_VCENTER

VOLTAGE=6.0V

MIN_NECK_WIDTH=0.20MM

=PPVCC_MAIN_GPU

MAX_NECK_LENGTH=0.5 MM

MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR

BUCK0_LX1

DIDT=TRUE

SWITCH_NODE=TRUE

BUCK0_LX3

SWITCH_NODE=TRUE

MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=0.5 MM

DIDT=TRUE

DIDT=TRUE

MAX_NECK_LENGTH=0.5 MM

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.60MM

BUCK0_LX2

MIN_NECK_WIDTH=0.20MM

SWITCH_NODE=TRUE

PPBATT_POS_RC

VOLTAGE=4.7V

NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM

MIN_LINE_WIDTH=0.30MM
MIN_NECK_WIDTH=0.20MM

MIN_NECK_WIDTH=0.20MM

BUCK0_FB

MIN_LINE_WIDTH=0.25MM

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.25MM

BUCK5_FB

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.25MM

BUCK6_FB

MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM

BUCK1_FB

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.25MM

BUCK2_FB

MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM

BUCK3_FB

MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.20MM

BUCK4_FB

PPVBUS_USB_DCIN

PPVDD_CPU

MAX_NECK_LENGTH=0.5 MM

NET_SPACING_TYPE=PWR

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.60MM

BUCK0_LX0

DIDT=TRUE

SWITCH_NODE=TRUE

PPVDD_GPU

PPVDD_SOC

PP1V8_S2R

PP1V2_S2R

PP1V2_S2R_SW2

PP1V8_S2R_SW3

PP1V8_SW2

MAX_NECK_LENGTH=0.5 MM

MIN_LINE_WIDTH=0.60MM

BUCK1_LX0

MIN_NECK_WIDTH=0.20MM

DIDT=TRUE

NET_SPACING_TYPE=PWR

SWITCH_NODE=TRUE

MAX_NECK_LENGTH=0.5 MM

MIN_LINE_WIDTH=0.60MM
NET_SPACING_TYPE=PWR

DIDT=TRUE

MIN_NECK_WIDTH=0.20MM

BUCK1_LX1

SWITCH_NODE=TRUE

BUCK1_LX2

MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=PWR

DIDT=TRUE

MAX_NECK_LENGTH=0.5 MM

SWITCH_NODE=TRUE

DIDT=TRUE

MAX_NECK_LENGTH=0.5 MM

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.60MM

BUCK2_LX0

MIN_NECK_WIDTH=0.20MM

SWITCH_NODE=TRUE

DIDT=TRUE

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.60MM

MAX_NECK_LENGTH=0.5 MM

BUCK4_LX0

MIN_NECK_WIDTH=0.20MM

SWITCH_NODE=TRUE

MAX_NECK_LENGTH=0.5 MM

NET_SPACING_TYPE=PWR

DIDT=TRUE

MIN_LINE_WIDTH=0.60MM

BUCK5_LX0

MIN_NECK_WIDTH=0.20MM

SWITCH_NODE=TRUE

DIDT=TRUE

MAX_NECK_LENGTH=0.5 MM

MIN_LINE_WIDTH=0.60MM
NET_SPACING_TYPE=PWR

BUCK6_LX0

MIN_NECK_WIDTH=0.20MM

SWITCH_NODE=TRUE

PP1V8_SW1

=PPVCC_MAIN_CPU

=PPVCC_MAIN_GPU

PP1V2_S2R
PP1V2_SW1

PP1V8_S2R

=PPVCC_MAIN_SOC

PPVCC_MAIN

MAX_NECK_LENGTH=3 MM

MIN_NECK_WIDTH=0.20MM

MIN_LINE_WIDTH=0.30MM

PMU_VPUMP

NET_SPACING_TYPE=PWR
VOLTAGE=4.6V

TP_HV_CHG_EN

OVP_SW_EN_L

USB_VBUS_DETECT

VOLTAGE=6.0V

MAX_NECK_LENGTH=3 MM

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.20MM
MIN_NECK_WIDTH=0.15MM

=PPVCC_MAIN_SOC

PPVCC_MAIN

NET_SPACING_TYPE=PWR

MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.20 MM

DIDT=TRUE
SWITCH_NODE=TRUE

SW_CHGA

OVP_SW_EN_L_R

PPVCC_MAIN

PP3V3_S2R

PPVDD_SRAM

46 OF 54

051-0886

A.0.0

81 OF 121

2

1

1

2

2

1

2

1

KA

321

5

4

1

2

1

2

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

1 2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

1 2

2

1

R17
P17

M19
N19
P19
R19

N2

V5

P1
P2

F1

K2

K1

F2

G17

G18

P6

B7

A7

E6

B5

A5

P7

V7

U7

M6

F6

N17

H6

E1
E2
G1
G2
J1
J2
L1
L2

N1

R1
R2
U1
U2

A12
B12
C12
C13

A9
B9
C9
C10
A10

A1
A2
A3

G19
H19
J19
K19

B13
B14
C14

B10
B11
C11

L17

H16
H17
J17
K16
K17
L16

T16

M18
N18

P18
R18

J18

A4
B4

B1

B2
B3

A11

F16
F17
G16

C1

A13
A14

V4

U4

B8

A8

V8

U8

V3

V2

V1

K18
L18
L19

C16

F19

C2

E7

U5

D17

H18

F18

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1 2

2

1

21

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

2

1

2

1

2

1

2

1

2

1

1

2

21

2

1

2

1

1 2

1 2

2

1

2

1

2

1

1 2

1 2

2

1

2

1

2

1

2

1

1

2

2

1

1

2

1

2

K

A

2

1

1 2

12

2

1

2

1

1 253

4

11 46

11 52

46 52 54

46 52 54

46 54

45

46 54

52 54

52 54

52 54

52 54

46 47 52 54

46 47 52 54

52 54

54

52 54

50 52 54

46 54

46 54

46 47 52 54

52 54

46 47 52 54

46 54

46 47 48 49 52 54

11 46

4

46 54

46 47 48 49 52 54

52

46 47 48 49 52 54

52 54

52 54

WWW.AliSaler.Com

LDO INPUT

LDO

SYM 2 OF 4

LCM/GRAPE

LCD BACKLIGHT

XTAL

VDD_LDO9
VDD_LDO10

WLED_LXA0

VDD_LDO13

VDD_LDO11

WLED3_A

WLED2_A

WLED1_A

VOUT_WLED_A

WLED_LXA1

WLED2_B

VLCM3

LCM2_EN

VDD_LDO5

VDD_LDO1_3_4

VDD_LDO7

VDD_LDO6

VOUT_WLED_B

VDD_LCM_SW

VDD_BOOST_LCM

XTAL2

XTAL1

WLED6_B

WLED6_A

WLED5_B

WLED5_A

WLED4_B

WLED4_A

WLED3_B

WLED1_B

WLED_LXB1

WLED_LXB0

VLDO7

VLDO6

VLDO5

VLDO4

VLDO3

VLDO2

VLDO1

VLCM2

VLCM1

VDD_LDO8

VDD_LCM

LCM_FB

BOOST_LCM_LX

VLDO8
VLDO9

VLDO10

ON_BUF

VLDO13

VLDO11

VDD_LDO2

IN

IN

IN

IN

IN

IN

TABLE_ALT_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

Apple Inc.

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

124578

B

D

8 7 6 5 4 3

C

B

A

NOTICE OF PROPRIETARY PROPERTY:

PAGE

12

D

A

C

PAGE TITLE

SHEET

IV ALL RIGHTS RESERVED

R

D

SIZE

DRAWING NUMBER

REVISION

BRANCH

6 3

THE POSESSOR AGREES TO THE FOLLOWING:

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

(NOTE: 2MHZ)

1 CAP PER PIN

LDO INPUTS

(300MA; 1.7-3.0V)

(300MA; 1.2-3.0V)
(150MA; 0.6-1.3V)
(300MA; 1.7-3.0V)
(300MA; 1.7-3.0V)
(5MA; 1.8V; ON_BUFF)

LDO OUTPUTS

(50MA; 2.5-3.3V)

(1000MA; 2.5-3.6V)

(50MA; 2.5-3.3V)

(50MA; 2.5-3.3V)

LDO BYPASS

(5MA; 5.0-6.0V)

(100MA; 5.0-6.0V)

(PPLED_OUT_A)

(100MA; 5.0-6.0V)

(100MA; 1.65-1.805V; BUCK3)

(300MA; 1.7-3.0V)

(150MA; 2.5-3.6V)

C8230

CRITICAL

402

10%

6.3V
X5R

2.2UF

C8201

402

CERM

1UF

6.3V

10%

CRITICAL

D8230

PMEG2005AEL

SOD882

VLS201612E-SM

2.2UH-1.05A-0.195OHM

L8229

CRITICAL

CRITICAL

C8211

0402

4.7UF

10V
X5R-CERM

20%

C8210

20%
X5R-CERM

10V
402

2.2UF

C8212

25V

10UF

20%

0603

X5R-CERM

C8203

1UF

CERM
402

6.3V

10%

PIME051E-SM

4.7UH-3.2A

CRITICAL

L8225

C8254

4.7UF

0603

10%
35V
X5R-CERM

CRITICAL

20%

4.7UF

CRITICAL

C8235

6.3V
X5R
402

50V

56PF

C8259

NP0-C0G-CERM

2%

0201

C8290

10V

20%
X5R-CERM

4.7UF

0402

CRITICAL

5%

C8280

0201

56PF

NP0-C0G-CERM

25V

0201

C8281

5%

56PF

NP0-C0G-CERM

25V

0201

C8282

5%

56PF

NP0-C0G-CERM

25V

0201

5%
25V
NP0-C0G-CERM

56PF

C8283

0201

C8284

5%

56PF

NP0-C0G-CERM

25V

0201

C8285

5%

56PF

NP0-C0G-CERM

25V

C8239

CRITICAL

402

X5R-CERM1

4.7UF

6.3V

20%

10UF

20%

6.3V

CRITICAL

CERM-X5R

0402

C8234

0402

10UF

CERM-X5R

20%

6.3V

CRITICAL

C8240

10UF

0402

CERM-X5R

20%

6.3V

CRITICAL

C8241

6.3V

C8237

CRITICAL

10%

2.2UF

X5R
402

C8242

0201

6.3V
X5R

0.22UF

20%

20%

10UF

0402

CERM-X5R

6.3V

CRITICAL

C8231

CRITICAL

C8215

C0G-CERM

25V

5%

18PF

0201

CRITICAL

Y8200

2012-1

32.768K-20PPM-12.5PF

C0G-CERM

CRITICAL

C8216

5%
25V

18PF

0201

FCBGA

U8100

OMIT_TABLE

D2089A0

R8227

1/32W

MF

1%

1.00

01005

0402

10UF

CERM-X5R

20%

6.3V

CRITICAL

C8232

R8232

1.00

1/32W

1%

MF

01005

R8239

1/32W

1%

MF

01005

1.00

1.00

R8231

1/32W

1%

MF

01005

R8235

1/32W

1.00

1%

MF

01005

18

18

18

18

18

D8228

CRITICAL

PMEG4010BEA

SOD-323

C8253

CRITICAL

X5R-CERM
0603

4.7UF

10%
35V

R8240

1/32W

1%

MF

1.00

01005

2.2UF

X5R

10%

402

6.3V

CRITICAL

C8233

18

CRITICAL

CERM-X5R

6.3V

C8226

0402

20%

10UF

C8252

CRITICAL

X5R-CERM

35V

10%

0603

4.7UF

0603

35V

4.7UF

C8251

CRITICAL

10%
X5R-CERM

0603

C8250

CRITICAL

X5R-CERM

10%

4.7UF

35V

C8238

CRITICAL

6.3V

X5R-CERM1

4.7UF

402

20%

C8200

402

CERM

1UF

10%

6.3V

197S0399 197S0392

Y8200

RDAR://PROBLEM/9936684

PMU: ANYA PAGE 2

SYNC_MASTER=J85 MLB_C

SYNC_DATE=12/03/2012

PP1V3_CAM

PP3V0_SPARE1

PMU_EXTAL

PP3V0_UVLO

PP3V0_ALS

PP1V7_VA_VCP

PP2V6_CAM_AF

PP3V0_S2R_TRISTAR

PP3V0_UVLO

PP3V3_ACC

NC_LDO8

PP6V0_LCM_VBOOST

VOLTAGE=6.0V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MM

MAX_NECK_LENGTH=3 MM

MIN_LINE_WIDTH=0.4MM

NET_SPACING_TYPE=PWR

NET_SPACING_TYPE=PWR

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

DIDT=TRUE

LCM_LX

PP2V9_CAM

PP1V3_CAM
PP1V0_SOC

MAX_NECK_LENGTH=3 MM

NET_SPACING_TYPE=PWR

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4MM

VOLTAGE=6.0V

MIN_NECK_WIDTH=0.2MM

PP6V0_LCM_HI

NO_TEST=TRUE

NC_VLCM2

NO_TEST=TRUE

NC_VLCM3

PP1V8_S2R

PPVCC_MAIN

PP5V25_GRAPE

=PPVCC_MAIN_VDD_LCM

NC_WLED_LXB0

NC_WLED4_B

NC_WLED_LXB1
NC_VOUT_WLED_B
NC_WLED1_B
NC_WLED2_B
NC_WLED3_B

NC_WLED6_B

NC_WLED5_B

PP1V7_VA_VCP

PP3V0_SPARE1

PP1V0_SOC

PP2V9_CAM

PP2V6_CAM_AF

PP3V0_S2R_SENSOR

PP1V8_ALWAYS

PPVCC_MAIN

PP1V2_S2R

PPVCC_MAIN

PP3V0_ALS

PP3V0_S2R_SENSOR

LED_IO_5_A

LED_IO_3_A

LED_IO_4_A

LED_IO_2_A

LED_IO_1_A

LED_IO_6_A

LED_IO6_A_R

LED_IO2_A_R
LED_IO3_A_R
LED_IO4_A_R
LED_IO5_A_R

NC_LCM2_EN

PP3V0_S2R_TRISTAR

PMU_XTAL

PPLED_OUT_A

WLED_LX_A

NET_SPACING_TYPE=PWR
DIDT=TRUE
SWITCH_NODE=TRUE

MIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.6 MM

PP1V8_ALWAYS

PP3V3_ACC

LED_IO1_A_R

=PPVCC_MAIN_LED

A.0.0

051-0886

47 OF 54

82 OF 121

2

1

2

1

A K

1 2

2

1

2

1

2

1

2

1

21

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2 1

2

1

B15
B17

C18

T17

U16

G14

F14

E14

D16

C19

L14

U12

E8

U9

T18

U14

U10

E16

C17
A18

V17

V18

P14

J16

N14

J14

M16

H14

M14

K14

E19

E18

V14

V10

V9

T19

U18

A16

U19

V12

V11

U15

U11

C15

B19

V15
A15
A17

T10

U17

V16

B16

1 2

2

1

1 2

1 2

1 2

1 2

A K

2

1

1 2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

47 52 54

47 52 54

47 52 54

47 52 54

16 47 52 54

47
52

54

47 52 54

47 52 54

47 52 54

54

52

47 52 54

47 52 54

47 52 54

46 52 54

46 47 48 49 52 54

54

54

16 47 52 54

47 52 54

47 52 54

47 52 54

47 52 54

47 52 54

47 52 54

46 47 48 49 52 54

46 52 54

46 47 48 49 52 54

47 52 54

47 52 54

52

52

52

52

52

47 52 54

52 54

47 52 54

47 52 54

52

54

8 7 6 5 4 3

WWW.AliSaler.Com

ALTERNATE FOR
PART NUMBER

138S0706138S0739

R8330

1.00K

1 2

PMU_GPIO_PMU2BBPMU_RST_L

5%

1/32W

MF

01005

NOTE: NEW ON J85

BOM OPTION

PLACE_NEAR=U8100.M17:4MM

1

C8308

1.0UF

20%
10V

2

X5R-CERM
0201-1

NET_SPACING_TYPE=ANLG
MIN_LINE_WIDTH=0.1MM

MIN_NECK_WIDTH=0.1MM

OUT
OUT
OUT
OUT

IN
IN
IN
IN
IN
IN
IN
IN
IN

OUT

IN

OUT

PART NUMBER

1

R8303

200K

1%
1/20W
MF
201

2

PLACE_NEAR=U8100.T11:3MM

1

C8307

1UF

10%
10V

2

X5R
402-1

19 52

44 52

44 52

44 52

5

45

44 52

44 53

24 28 52

15 52

13

5

11

13

13

15

5

19

24 27 52

REVIEW: VERIFY NC ON TDEV2 IS OK

I2C ADDRESS: 0111100X (0X78)

OMIT_TABLE

U8100

D

1

C8300

0.01UF

10%

6.3V

2

X5R
01005

PMU_USB_BRICKID

11

IN

0201

0201

0201

0201

0201

1

2

1

2

1

2

1

2

1

2

CRITICAL

R8327

10KOHM-1%-0.31MA

PLACE_NEAR=U4000.1:10MM

PLACE_SIDE=TOP

(TEMP1 - NEAR BB)

CRITICAL

R8321

10KOHM-1%-0.31MA

C

(TEMP3 - TOP SIDE NEAR WIFI)

(TEMP4 - TOP SIDE NEAR SIM)

(TEMP5 - TOP SIDE NEAR NAND)

B

(TEMP6 TOP SIDE NEAR REAR CAM)

PLACE_NEAR=U5800.30:10MM

PLACE_SIDE=TOP

CRITICAL

R8322

10KOHM-1%-0.31MA

PLACE_NEAR=UJ000.8:10MM

PLACE_SIDE=TOP

CRITICAL

R8323

10KOHM-1%-0.31MA

PLACE_NEAR=U1600.A1:10MM

PLACE_SIDE=TOP

CRITICAL

R8324

10KOHM-1%-0.31MA

PLACE_NEAR=J2800.1:10MM

PLACE_SIDE=TOP

PLACE_NEAR=U8100.R9:10MM

1

C8327

100PF

5%
16V

2

NP0-C0G
01005

PLACE_NEAR=U8100.R13:10MM

1

C8321

100PF

5%
16V

2

NP0-C0G
01005

PLACE_NEAR=U8100.R14:10MM

1

C8322

100PF

5%
16V

2

NP0-C0G
01005

PLACE_NEAR=U8100.L4:10MM

1

C8323

100PF

5%
16V

2

NP0-C0G
01005

PLACE_NEAR=U8100.M4:10MM

1

C8324

100PF

5%
16V

2

NP0-C0G
01005

PA_NTC_P
PA_NTC_N

BOARD_TEMP3_P

52

BOARD_TEMP3_N

BOARD_TEMP4_P

52

BOARD_TEMP4_N

BOARD_TEMP5_P

52

BOARD_TEMP5_N

BOARD_TEMP6_P

52

BOARD_TEMP6_N

PLACE XW AND CAP

CLOSE TO PMU

PLACE_NEAR=U8100.R9:10MM

XW8327

1 2

SM

PLACE_NEAR=U8100.R13:10MM

XW8321

1 2

SM

PLACE_NEAR=U8100.R14:10MM

XW8322

1 2

SM

PLACE_NEAR=U8100.L4:10MM

XW8323

1 2

SM

PLACE_NEAR=U8100.M4:10MM

XW8324

1 2

SM

PLACE_NEAR=U8100.N4:10MM

XW8325

1 2

SM

PLACE_NEAR=U8100.P4:10MM

XW8326

1 2

SM

1

0.01UF

10%

6.3V

2

X5R
01005

10

11

5

IN
IN
IN

1

C8302C8301

0.01UF

10%

6.3V

2

X5R
01005

R8399

0.00

1 2

1%

1/20W

MF

0201

WDOG_SOC2PMU_RESET_IN
TS2PMU_RESET_IN
SOCHOT1_L

4 8

10 11 24 52

5

5

11 52

5

11 52

5

52

5

53

45 52

PMU_ACC_ID
PMU_USB_BRICKID_R

52

ADC_IN7

GPIO_SOC2PMU_KEEPACT

5

IN

PMU_SHDWN

IN

RESET_SOC_L

OUT

GPIO_PMU2SOC_IRQ_L

OUT

I2C0_SCL_1V8

IN

I2C0_SDA_1V8

BI

DWI_AP_CLK

IN

DWI_AP_DO

IN

NC_DWI_AP_DI

BATT_NTC

IN

C8340

100PF

5%

16V

NP0-C0G

01005

IN
IN
IN

IN

GPIO_BTN_HOME_L
GPIO_BTN_ONOFF_L
GPIO_BTN_SRL_L

NC_ANYA_BUTTON4

PMU_E75_ACC_DET_L

5

13

5

17

5

17

43

(INTERNAL PULL-DOWN)

(INTERNAL PULL-DOWN)

(PULLUP INSIDE SOC)

(INTERNAL PULL-DOWN)
(INTERNAL PULL-DOWN)

NO_TEST=TRUE

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=BOARD_TEMP

NET_SPACING_TYPE=ANLG

NET_SPACING_TYPE=ANLG

PMU_TCAL

CRITICAL

2

1

2

1

R8340

3.92K

0.1%
0201
1/20W
MF

RESISTOR FOR TEMP CALIBRATION

D5

BUTTON1

D6

BUTTON2

D7

BUTTON3

D8

BUTTON4

T7

ACC_DET

R12

ACC_ID

P16

BRICK_ID

N16

ADC_IN7

R11

ADC_IN31

T8

KEEPACT

T9

SHDN

R5

RESET_IN1

R6

RESET_IN2

R7

RESET_IN3

R8

RESET*

T15

IRQ*

E12

SCL

E13

SDA

E11

DWI_CK

E10

DWI_DI

E9

DWI_DO

R9

TDEV1

R10

TDEV2

NC

R13

TDEV3

R14

TDEV4

L4

TDEV5

M4

TDEV6

N4

TDEV7

P4

TDEV8

R16

TBAT

R15

TCAL

D2089A0

FCBGA

SYM 3 OF 4

ANALOG

INPUT

REFRENCES

32K

INPUT

DIGITAL

WDOG

RESET

GPIO

I2C & DWI

TEMPERATURE

VDD_REF_A

CLK

ANALOG MUX

IREF
VREF

VDD_REF

VDD_RTC
ADC_REF

OUT_32K

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17

AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_AY
AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_BY

T12

PMU_IREF

NET_SPACING_TYPE=ANLG

V13

PMU_VREF

NET_SPACING_TYPE=ANLG

M17

PMU_VDD_REF

NET_SPACING_TYPE=ANLG

T11
U13

PMU_VDD_RTC

NET_SPACING_TYPE=ANLG

T13

PMU_ADC_REF

T14

NC_PMU_OUT_32K_CLK_GPS

T6

PMU_GPIO_CLK_32K_OSCAR

T5

PMU_GPIO_CLK_32K_WLAN

T4

PMU_GPIO_BT_REG_ON

R3

PMU_GPIO_WLAN_REG_ON

P3

PMU_GPIO_PMU2BBPMU_RST_R_L

N3

UART5_BATT_RTXD

M3

PMU_GPIO_BT_HOST_WAKE

L3

PMU_GPIO_WLAN_HOST_WAKE

K3

PMU_GPIO_BB2PMU_HOST_WAKE

J3

PMU_GPIO_CODEC_HS_INT_L

H3

PMU_GPIO_MB_HALL1_IRQ

G3

GPIO_TS2SOC2PMU_INT

F3

PMU_GPIO_MB_HALL2_IRQ

E3

PMU_GPIO_MB_HALL3_IRQ

D3

PMU_GPIO_CODEC_RST_L

C3

PMU_GPIO_OSCAR2PMU_HOST_WAKE

C4

PMU_GPIO_BB_VBUS_DET

E4

NC_PPVDD_CPU_SOC_SENSE

F4

NC_PPVDD_GPU_SOC_SENSE

G6

NC_PPVDD_SOC_SOC_SENSE

J6

NC_ADC_SMPS1_MSMC_1V05

G4

NC_AMUX_AY

K4

NC_PPVDD_CPU_RAIL_SENSE

J4

NC_PPVDD_GPU_RAIL_SENSE

K6

NC_PPVDD_SOC_RAIL_SENSE

L6

NC_ADC_SMPS3_MSME_1V8

H4

NC_AMUX_BY

1

C8305

0.1UF

10%

6.3V

2

CERM-X5R
0201

1

C8306

0.1UF

10%

6.3V

2

CERM-X5R
0201

REF DES

C8308

12

OUT

COMMENTS:

24 26 52

1

C8310

1000PF

10%

6.3V

2

X5R-CERM
01005

TABLE_ALT_HEAD

TABLE_ALT_ITEM

D

C

B

10KOHM-1%-0.31MA

PLACE_NEAR=U0600.W19:10MM

(TEMP7 - BOTTOM SIDE NEAR SOC)

(TEMP8 - BOTTOM SIDE NEAR PMU)

PLACE_SIDE=BOTTOM

10KOHM-1%-0.31MA

PLACE_NEAR=U8100.K9:10MM

PLACE_SIDE=BOTTOM

CRITICAL

R8325

CRITICAL

R8326

0201

0201

1

2

1

2

A

PART NUMBER

118S0764 118S0717

ALTERNATE FOR
PART NUMBER

107S0208107S0150

BOM OPTION

REF DES

R8321,R8322,R8323,R8324,R8325,R8326

R8340

COMMENTS:

RDAR://PROBLEM/8380367

RDAR://PROBLEM/8380367

PLACE_NEAR=U8100.N4:10MM

1

C8325

100PF

5%
16V

2

NP0-C0G
01005

PLACE_NEAR=U8100.P4:10MM

1

C8326

100PF

5%
16V

2

NP0-C0G
01005

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

BOARD_TEMP7_P

52

BOARD_TEMP7_N

BOARD_TEMP8_P

52

BOARD_TEMP8_N

BUCK6 POWER IS ON IN HIBERNATE DUE TO WIFI PAS
SWITCH NEEDED TO GATE POWER TO NAND AND SOC
REVIEW: CHECK FOR POWER SEQUENCING VOILATIONS BETWEEN PP1V8 AND PP3V3

=PP3V3_S2R_SWITCH

PPVCC_MAIN

46 47 49 52 54

=PP1V8_NAND

12 54

1

R8352

100K

5%
1/32W
MF
01005

2

1

C8350

0.1UF

10%
16V

2

X5R-CERM
0201

VCC_MAIN_PP3V3SW_RAMP

CRITICAL

1

C8352

4700PF

10%
10V

2

X7R
201

54

U8350

SLG5AP1443V

TDFN

7

CAP

VDD

GND

8 1

CRITICAL

D

SON

3

52

6 3

1

C8355

1.0UF

20%

6.3V

2

X5R
0201-1

PP3V3_SW

CRITICAL

1

C8356

10UF

20%
10V

2

X5R-CERM
0402-2

52 54

SYNC_MASTER=J72_MLB_C

PAGE TITLE

PMU: ANYA PAGE 3

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

83 OF 121

SHEET

48 OF 54

124578

SIZE

A

D

8 7 6 5 4 3

12

D

M1
M2

VSS_BUCK01

T1
T2

VSS_BUCK1_12

H1
H2

VSS_BUCK0_12

U6
V6

VSS_BUCK25

A6
B6

VSS_BUCK34

D1
D2

VSS_BUCK06

D18

VSS_WLED

D19

B18

VSS_LCM

C

XW8410

PPVCC_MAIN

46 47 48 52 54

B

=PP3V0_UVLO

54

SHORT-10L-0.1MM-SM

NOSTUFF

R8420

150K

1 2

1%

1/32W

MF

01005

21

VCC_MAIN_UVLO_SENSE

R8451

4.7K

NOSTUFF

R8450

150K

1/32W
01005

NOSTUFF

1

C8460

100PF

5%

6.3V

2

CERM
01005

1/32W

1

01005

1%
MF

2

R8410

75K

1/32W
01005

R8411

50K

1/32W
01005

1

1%
MF

2

MAIN_UVLO_SENSE_R

1

1%
MF

2

UVLO_COMP_NEG

1

1%
MF

2

THROTTLER

=PP3V0_SPARE1

1

C8400

0.1UF

20%

6.3V

2

X5R-CERM
01005

U8400

A3

MAX9039BEBT+

UCSP

B2

VCC

B1

VEE

A1

APN 353S4103

A2

REF

B3

UVLO_COMP_REF

54

THROTTLER_OUT

49

1

R8435

100K

5%
1/32W
MF
01005

2

R8445

0.00

SOCHOT0_R_L

3

D

G

2

Q8440

DMN2990UFA

S

DFN0806-VML0806-COMBO-N78

1

1 2

0%

1/32W

MF

01005

SOCHOT0_L

5

52

OUT

A19
D15
V19

D10
D11
D12
D13
D14
E17

F10
F11
F12
F13

G10
G11
G12
G13

D4
C5
C6
C7
C8
D9

F7
F8
F9

VSS

G7
G8
G9

H7
H8
H9

OMIT_TABLE

U8100

D2089A0

FCBGA

SYM 4 OF 4

VSS

H10
H11
H12
H13
J7
J8
J9
J10
J11
J12
J13
K7
K8
K9
K10
K11
K12
K13
L7
L8
L9
L10
L11
L12
L13
M7
M8
M9
M10
M11
M12
M13
N6
N7
N8
N9
N10
N11
N12
N13
P8
P9
P10
P11
P12
P13
R4
T3
U3

ADD A VIA PER PIN FOR ALL VSS_* AND VSSA_* PINS

D

C

B

R8425

1.00K

UVLO_COMP_REF

49

1 2

1%

1/32W

MF

01005

UVLO_COMP_POS

A

6 3

R8430

255K

1 2

1%

1/32W

MF

01005

SYNC_MASTER=J72_MLB_C

PAGE TITLE

PMU: ANYA PAGE 4

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

84 OF 121

SHEET

49 OF 54

124578

SIZE

A

D

8 7 6 5 4 3

WWW.AliSaler.Com

12

D

SWITCH TO GATE POWER TO SOC AND NAND. NEEDED FOR J72 ROUTING.

CRITICAL

U8550

TPS22924X

CSP

GND

A1

VOUT

B1

C1

PP1V8_EXT_SW

52 54 54

=PP1V8_S2R_EXT_SWITCH

1

2

C8550

10UF

20%
10V
X5R-CERM
0402-2

PP1V8_SW1

46 52 54

1

C8555

0.01UF

10%

6.3V

2

X5R
01005

A2

VIN

B2

C2

ON

C

D

C

B

A

6 3

SYNC_MASTER=J85 MLB_C

PAGE TITLE

POWER: PP1V8_SW

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

85 OF 121

SHEET

50 OF 54

124578

SIZE

B

A

D

8 7 6 5 4 3

12

D

D

DEBUG

TP9002

=PP1V8_S2R_MISC

5

54

C

SEP EEPROM

1

TP-P55

A

C

UNPROGRAMMED P/N: 335S0894

=PP1V8_EEPROM

1

C9000

0.22UF

20%

CRITICAL

B

SEP_I2C0_SCL

5

B1 B2

VCC

U9000

CAT24C08C4A

WLCSP

SCL SDA

VSS

A2 A1

6.3V

2

X5R
0201

SEP_I2C0_SDA

A

6 3

54

B

5

SIZE

A

D

SYNC_MASTER=J72_MLB_C

PAGE TITLE

SEP: EEPROM & SOC DEBUG

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

REVISION

BRANCH

PAGE

SHEET

051-0886

A.0.0

90 OF 121

51 OF 54

124578

8 7 6 5 4 3

WWW.AliSaler.Com

12

TP9300

1

GPIO_CODEC_IRQ_L

A

TP-P5

TP9304

1

PMU_GPIO_CODEC_HS_INT_L

A

TP-P5

TP9303

1

BATT_NTC

A

TP-P5

TP9305

1

PPLED_OUT_A

A

TP-P5

TP9396

1

PP3V0_UVLO

A

TP-P5

TP9397

1

PP3V0_SPARE1

A

TP-P5

D

C

B

A

TP9398

1

SOCHOT0_L

A

TP-P5

TP9312

1

BOARD_TEMP3_P

A

TP-P5

TP9313

1

BOARD_TEMP4_P

A

TP-P5

TP9314

1

BOARD_TEMP5_P

A

TP-P5

TP9315

1

BOARD_TEMP6_P

A

TP-P5

TP9316

1

BOARD_TEMP7_P

A

TP-P5

TP9317

1

BOARD_TEMP8_P

A

TP-P5

TP9318

1

CLK_32K_SOC2CUMULUS

A

TP-P5

TP9320

1

CODEC_HP_DET_R

A

TP-P5

TP9321

1

CODEC_HP_HS3

A

TP-P5

TP9322

1

CODEC_HP_HS3_REF

A

TP-P5

TP9323

1

CODEC_HP_HS4

A

TP-P5

TP9324

1

CODEC_HP_HS4_REF

A

TP-P5

TP9325

1

CODEC_HP_LEFT

A

TP-P5

TP9326

1

CODEC_HP_RIGHT

A

TP-P5

TP9328

1

DISPLAY_SYNC_R

A

TP-P5

TP9329

1

DWI_AP_CLK

A

TP-P5

TP9330

1

E75_DPAIR1_CONN_N

A

TP-P5

TP9331

1

E75_DPAIR1_CONN_P

A

TP-P5

TP9332

1

E75_DPAIR2_CONN_N

A

TP-P5

TP9333

1

E75_DPAIR2_CONN_P

A

TP-P5

TP9334

1

FMI0_CE0_L

A

TP-P5

TP9335

1

FMI1_CE0_L

A

TP-P5

TP9336

1

GND

A

TP-P5

TP9337

1

GND_AUDIO_CODEC

A

TP-P5

TP9338

1

GPIO_BTN_HOME_FILT_L

A

TP-P5

TP9339

1

GPIO_BTN_ONOFF_L_FILT

A

TP-P5

TP9340

1

GPIO_BTN_SRL_L_FILT

A

TP-P5

TP9341

1

GPIO_BTN_VOL_DOWN_L_FILT

A

TP-P5

TP9342

1

GPIO_BTN_VOL_UP_L_FILT

A

TP-P5

TP9343

1

GPIO_FORCE_DFU

A

TP-P5

TP9344

1

GPIO_GRAPE_IRQ_L

A

TP-P5

TP9345

1

GPIO_GRAPE_RST_L

A

TP-P5

TP9346

1

GPIO_SOC2BB_WAKE_MODEM

A

TP-P5

TP9347

1

GPIO_SPKAMP_KEEPALIVE

A

TP-P5

TP9348

1

I2C0_SCL_1V8

A

TP-P5

TP9349

1

I2C0_SDA_1V8

A

TP-P5

TP9350

1

I2C2_SCL_1V8

A

TP-P5

TP9351

1

I2C2_SDA_1V8

A

TP-P5

TP9352

1

ISP0_CAM_REAR_CLK

A

TP-P5

TP9353

1

ISP0_CAM_REAR_SCL

A

TP-P5

TP9354

1

ISP0_CAM_REAR_SDA

A

TP-P5

TP9355

1

ISP0_CAM_REAR_SHUTDOWN_L

A

TP-P5

TP9356

1

ISP1_CAM_FRONT_CLK

A

TP-P5

TP9357

1

ISP1_CAM_FRONT_SCL

A

TP-P5

TP9358

1

ISP1_CAM_FRONT_SDA

A

TP-P5

TP9359

1

ISP1_CAM_FRONT_SHUTDOWN_L

A

TP-P5

TP9360

1

JTAG_SOC_SEL

A

TP-P5

TP9361

1

JTAG_SOC_TCK

A

TP-P5

TP9362

1

JTAG_SOC_TDI

A

TP-P5

TP9363

1

JTAG_SOC_TMS

A

TP-P5

TP9364

1

JTAG_SOC_TRST_L

A

TP-P5

TP9365

1

JTAG_WLAN_SEL

A

TP-P5

TP9366

1

OSCAR2RADIO_CONTEXT_A

A

TP-P5

TP9367

1

OSCAR2RADIO_CONTEXT_B

A

TP-P5

TP9368

1

WLAN_TX_BLANK

A

TP-P5

TP9369

1

LAT_SW1_CTL

A

TP-P5

TP9370

1

LAT_SW2_CTL

A

TP-P5

TP9371

1

A

TP-P5

TP9372

1

LED_IO1_A_R

A

TP-P5

TP9373

1

LED_IO2_A_R

A

TP-P5

TP9374

1

LED_IO3_A_R

A

TP-P5

TP9375

1

LED_IO4_A_R

A

TP-P5

TP9376

1

LED_IO5_A_R

A

TP-P5

TP9377

1

LED_IO6_A_R

A

TP-P5

TP9378

1

MIKEY_TS_N

A

TP-P5

TP9379

1

MIKEY_TS_P

A

TP-P5

5

15

15 48

45 48 44 48

47 54

47 54

47 54

5

49

48

48

48

48

48

48

5

13

15

15

15

15

15

15

15

13

5

48

43

43

43

43

6

12

6

12

15

13

17

17

17

17

5

5

13

5

13

5

28

5

16

5

11 48

5

11 48

5

16

5

16

7

23

7

23

7

23

7

23

7

20

7

20

7

20

7

20

4

10

4

11

4

4

11

4

10

44

19 28 44

19 28 44

28 44

14 24 28

14 28

47

47

47

47

47

47

11 15

11 15

TP9380

1

OVP_SW_EN_L_R

A

TP-P5

TP9382

1

PMU_GPIO_BT_HOST_WAKE

A

TP-P5

TP9383

1

PMU_GPIO_BT_REG_ON

A

TP-P5

TP9384

1

PMU_GPIO_CLK_32K_OSCAR

A

TP-P5

TP9385

1

PMU_GPIO_CLK_32K_WLAN

A

TP-P5

TP9387

1

PMU_USB_BRICKID_R

A

TP-P5

TP9388

1

PP1V0_SOC

A

TP-P5

TP9389

1

PP1V2_S2R

A

TP-P5

TP9390

1

PP1V2_S2R_SW2

A

TP-P5

TP9391

1

PP1V2_SW1

A

TP-P5

TP9393

1

PP1V7_VA_VCP

A

TP-P5

TP9395

1

PP1V8_ALWAYS

A

TP-P5

TP93A0

1

PP1V8_EXT_SW

A

TP-P5

TP93A1

1

PP1V8_GRAPE_FILT

A

TP-P5

TP93A2

1

PP1V8_GRAPE_SW

A

TP-P5

TP93A3

1

PP1V8_PLL_SOC_F

A

TP-P5

TP93A4

1

PP1V8_S2R

A

TP-P5

TP93A6

1

PP1V8_S2R_SW3_COMP

A

TP-P5

TP93A7

1

PP1V8_SW1

A

TP-P5

TP93A8

1

PP1V8_SW2

A

TP-P5

TP93A9

1

PP1V8_XTAL

A

TP-P5

TP93B0

1

PP2V6_CAM_AF

A

TP-P5

TP93B8

1

PP3V0_S2R_HALL_FILT

A

TP-P5

TP93C0

1

PP3V0_S2R_SENSOR

A

TP-P5

TP93C1

1

PP3V0_S2R_TRISTAR

A

TP-P5

TP93C3

1

PP3V3_ACC

A

TP-P5

TP93C4

1

PP3V3_S2R

A

TP-P5

TP93C5

1

PP3V3_SW

A

TP-P5

TP93C6

1

PP5V25_GRAPE_FILT

A

TP-P5

TP93C8

1

PP6V0_LCM_VBOOST

A

TP-P5

TP93C9

1

PPBATT_VCC

A

TP-P5

TP93D0

1

PPLED_BACK_REG_A

A

TP-P5

TP93D1

1

PPOUT_E75_ACC_ID1_CONN

A

TP-P5

TP93D2

1

PPOUT_E75_ACC_ID2_CONN

A

TP-P5

TP93D3

1

PPVBUS_PROT

A

TP-P5

TP93D4

1

PPVBUS_USB_DCIN

A

TP-P5

TP93D5

1

PPVCC_MAIN

A

TP-P5

TP93D6

1

PPVCC_MAIN_LCD_SW_CONN

A

TP-P5

TP93D7

1

PPVDD_CPU

A

TP-P5

TP93D8

1

PPVDD_GPU

A

TP-P5

TP93D9

1

PPVDD_SOC

A

TP-P5

TP93E0

1

PPVDD_SRAM

A

TP-P5

46

44 48

19 48

44 48

48

47 54

46 47 54

46 54

46 54

16 47 54

47 54

50 54

13

13

4

46 47 54

54

46 50 54

46 54

8

47 54

13

47 54

47 54

47 54

46 54

48 54

13

47

46 54

18

43

43

11 46

46 54

46 47 48 49 54

18

46 54

46 54

46 54

46 54

TP93G4

1

PP_SMPS4_RF2_2V05

A

TP-P5

TP93G9

1

SOC_TESTMODE

A

TP-P5

TP93H1

1

SPI1_GRAPE_CS_L

A

TP-P5

TP93H2

1

SPI1_GRAPE_MISO

A

TP-P5

TP93H3

1

SPI1_GRAPE_MOSI

A

TP-P5

TP93H4

1

SPI1_GRAPE_SCLK_R

A

TP-P5

TP93H5

1

SPKR_L_CONN_N

A

TP-P5

TP93H6

1

SPKR_L_CONN_P

A

TP-P5

TP93H7

1

SPKR_R_CONN_N

A

TP-P5

TP93H8

1

SPKR_R_CONN_P

A

TP-P5

TP93I1

1

TP_JTAG_SOC_TDO

A

TP-P5

TP93I2

1

TP_JTAG_WLAN_TCK

A

TP-P5

TP93I3

1

TP_JTAG_WLAN_TRST_L

A

TP-P5

TP93I4

1

UART0_SOC_RXD

A

TP-P5

TP93I5

1

UART0_SOC_TXD

A

TP-P5

TP93I6

1

UART3_BB2SOC_TX

A

TP-P5

TP93I7

1

UART3_SOC2BB_TX

A

TP-P5

TP93I8

1

UART6_TS_ACC_RXD

A

TP-P5

TP93I9

1

UART6_TS_ACC_TXD

A

TP-P5

TP93J0

1

USB_SOC_N

A

TP-P5

TP93J1

1

USB_SOC_P

A

TP-P5

TP93J9

1

PP3V0_ALS

A

TP-P5

TP93JA

1

PP2V9_CAM

A

TP-P5

TP93JB

1

PP1V3_CAM

A

TP-P5

TP93JC

1

PMU_GPIO_WLAN_REG_ON

A

TP-P5

25 30

4

10

5

13

5

13

5

13

13

16 43

16 43

16 43

16 43

4

44

44

5

11

5

11

5

11 24 28

5

11 24 28

5

11

5

11

4

11

4

11

47 54

47 54

47 54

44 48

TP93G1

1

A

TP-P5

TP9301

A

TP-P5

TP93G5

1

A

TP-P5

TP93E1

1

A

TP-P5

TP93H9

1

A

TP-P5

TP93I0

1

A

TP-P5

TP9302

SIMCRD_RST_CONN

A

TP-P5

TP93B9

SIMCRD_CLK_CONN

A

TP-P5

TP93E7

SIMCRD_IO_CONN

A

TP-P5

TP93E8

SIM_TRAY_DETECT

A

TP-P5

TP93F3

1

A

TP-P5

TP93J2

GPIO_SOC2BB_RADIO_ON_L

A

TP-P5

TP93J3

GPIO_SOC2BB_RST_L

A

TP-P5

TP93J4

PMU_GPIO_PMU2BBPMU_RST_L

A

TP-P5

TP9381

1

A

TP-P5

TP93J5

PS_HOLD_PMIC

A

TP-P5

TP9327

1

A

TP-P5

TP9306

1

A

TP-P5

TP9307

1

A

TP-P5

TP9308

1

A

TP-P5

TP9309

1

A

TP-P5

TP9310

1

A

TP-P5

TP9311

1

A

TP-P5

TP93J6

A

TP-P5

TP93J7

A

TP-P5

TP93G6

1

A

TP-P5

TP93J8

A

TP-P5

RF TEST POINTS

PP_SMPS1_MSMC_1V05

PP_SMPS3_MSME_1V8
PP_SMPS5_DSP_1V05
PP_LDO1
TP_BB_TEST_MODE_0
TP_BB_TEST_MODE_1

PP_LDO6_RUIM_1V8

PMU_GPIO_BB2PMU_HOST_WAKE

DEBUG_RST_L
BB_JTAG_RTCLK
BB_JTAG_TCK
BB_JTAG_TDI
BB_JTAG_TDO
BB_JTAG_TMS
BB_JTAG_TRST_L

USB_BB_N

USB_BB_P
RESET_SOC_L

PMU_GPIO_BB_VBUS_DET

6 3

25 27

24 25 27 28 30

25

25

27

27

10 24 28

10 24 28

10 24 28

10 24 28

10 24 25 27

5

24 26

5

24 26

24 26 48

24 28 48

24 26

24 27

24 27

5

24 27

5

24 27

5

24 27

5

24 27

5

24 27

11 24 53

11 24 53

4 8

10 11 24 48

24 27 48

STANDOFFS: P/N 860-1657

STDOFF-3.3X1.8R1.28H-SM

STDOFF-3.3X1.8R1.28H-SM

STD9300

1

STD9301

1

STANDOFF: P/N 860-1683

STDOFF-3.3X2.2R1.35H-SM-1

STD9302

1

PLATED THROUGH HOLES

DRILL SIZE: 1.1MM X 0.4MM

PLATING SIZE: 1.4MM X 0.7MM

SL9300

TH-NSP

1

SL-1.1X0.4-1.4X0.7

SL9303

TH-NSP

1

SL-1.1X0.4-1.4X0.7

SL9304

TH-NSP

1

SL-1.1X0.4-1.4X0.7

SL9305

TH-NSP

1

SL-1.1X0.4-1.4X0.7

MH9300

3P25R2P5

1

860-1688

MH9302

WASHER-BTN-MLB-X221

TH

1

NEAR BUTTON FLEX CONN

SYNC_MASTER=J85 MLB_C

PAGE TITLE

TEST: TP/HOLES/FIDUCIALS

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=12/03/12

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

93 OF 121

SHEET

52 OF 54

124578

SIZE

D

C

B

A

D

8 7 6 5 4 3

12

FOR FRANK (SEG)

EE CHARACTERIZATION TP

PP9450

P4MM

NAND

PLACE_SIDE=BOTTOM

1

SM

SM

SM

SM

SM

SM

SM

PP

1

PP

1

PP

1

PP

1

PP

1

PP

1

PP

FMI0_DQS
FMI0_AD<3>

FMI0_DQS

TP_TCKC_U1400
TP_TMSC_U1400
TP_U1400_RB0
TP_U1400_RB1

PP9401

P4MM

PP9402

P4MM

PP9403

D

P4MM

PP9410

P4MM

PP9411

P4MM

PP9412

P4MM

PP9413

P4MM

PLACE_NEAR=U0652.D34:2MM

PLACE_SIDE=BOTTOM

PLACE_NEAR=U0652.C34:2MM

PLACE_NEAR=U0652.D34:2MM

6

12 53

6

12

6

12

53

12

12

12

12

PP9451

P4MM

1

PPVDD_SOC_SOC_SENSE

PP

SM

1

PPVDD_CPU_SOC_SENSE

PP

SM

DWI

PLACE_SIDE=BOTTOM

AUDIO

PLACE_NEAR=U8100:2MM

PLACE_NEAR=U1900:2MM

5

48

5

15

PP9405

P4MM

PP9406

P4MM

PP

SM

PP

SM

1

DWI_AP_DO

1

I2S0_CODEC_ASP_MCK

PLACE_NEAR=U0652.V31:1MM

PLACE_NEAR=U0652.AN30:1MM

9

9

D

WIFI

5

5

44 48

5

44

44

44

PP9480

P4MM

PP9481

P4MM

PP9482

P4MM

PP9483

P4MM

HSIC1_WLAN2SOC_DEVICE_RDY

PP

SM

HSIC1_WLAN2SOC_REMOTE_WAKE

PP

SM

PMU_GPIO_WLAN_HOST_WAKE

PP

SM

HSIC1_SOC2WLAN_HOST_RDY

PP

SM

GPIO_BT_WAKE

I76

1

PP9416

P4MM

PP9417

P4MM

C

PP9419

P4MM

PP9420

P4MM

PP9421

P4MM

PP9422

P4MM

PP9423

P4MM

PP9424

P4MM

PP9425

P4MM

PP9426

P4MM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

I2S2_CODEC_XSP_LRCK

1

I2S2_CODEC_XSP_DOUT

1

I2S1_SPKAMP_MCK

1

I2S1_SPKAMP_BCLK

1

I2S1_SPKAMP_LRCK

1

I2S1_SPKAMP_DOUT

1

I2S1_SPKAMP_DIN

1

SPI2_CODEC_SCLK

1

SPI2_CODEC_MOSI

1

SPI2_CODEC_MISO

PLACE_NEAR=U1900:2MM

PLACE_NEAR=U1900:2MM

PLACE_NEAR=U2040:2MM

PLACE_NEAR=U2040:2MM

PLACE_NEAR=U2040:2MM

PLACE_NEAR=U2040:2MM

PLACE_SIDE=BOTTOM

PLACE_NEAR=U0652:2MM

PLACE_NEAR=U1900:2MM

PLACE_NEAR=U1900:2MM

PLACE_SIDE=BOTTOM

PLACE_NEAR=U0652:2MM

1

5

15

5

15

5

16

5

16

5

16

5

16

5

16

5

15

5

15

5

15

PP9460

P4MM

PP9462

P4MM

PP9463

P4MM

PP9468

P4MM

PP9469

P4MM

PP9471

P4MM

PP9472

P4MM

PP

SM

1

PP

SM

1

PP

SM

1

PP

SM

1

PP

SM

1

PP

SM

1

PP

SM

HSIC1_WLAN_DATA

HSIC1_WLAN_DATA
HSIC1_WLAN_STB

UART1_BT2SOC_TX
UART1_SOC2BT_TX

UART2_WLAN2SOC_TX
UART2_SOC2WLAN_TX

FOR HSIC CHARACTERIZATION

FUNC_TEST=TRUE

PLACE_NEAR=U0652.AM33:3MM

PLACE_NEAR=U5800.13:3MM

PLACE_NEAR=U5800.14:3MM

PLACE_NEAR=U0652:3MM

PLACE_NEAR=U5800:3MM

PLACE_NEAR=U0652:3MM

PLACE_NEAR=U5800:3MM

5

44

4

44 53

4

44 53

4

44

5

44

5

44

5

44

5

44

C

GRAPE

BASEBAND

FOR HSIC CHARACTERIZATION

PP9428

P4MM

PP9429

P4MM

PP

SM

PP

SM

1

UART4_SOC2OSCAR_TXD

1

UART4_OSCAR2SOC_RXD

OSCAR

UART5

PLACE_SIDE=BOTTOM

PLACE_NEAR=U2400:2MM

PLACE_SIDE=BOTTOM

PLACE_NEAR=U0652:2MM

USB_BB_P

I192

USB_BB_N

PP9465

P4MM

PP9466

P4MM

SM

SM

I193

1

PP

1

PP

HSIC2_BB_STB
HSIC2_BB_DATA

5

19

5

19

B

FUNC_TEST=TRUE

FUNC_TEST=TRUE

PLACE_NEAR=U0652.B27:3MM

PLACE_NEAR=U3400.C7:3MM

11 24 52

11 24 52

4

24 27

4

24 27

B

PROX

HIGH SPEED, NO TEST

MIPI0C_CAM_REAR_CLK_P

I141

MIPI0C_CAM_REAR_CLK_N

I140

MIPI0C_CAM_REAR_DATA_P<0..3>

I139

MIPI0C_CAM_REAR_DATA_N<0..3>

I138

MIPI0C_CAM_REAR_CLK_FILT_P

I142

MIPI0C_CAM_REAR_CLK_FILT_N

I144

MIPI0C_CAM_REAR_DATA_FILT_P<0..3>

I145

MIPI0C_CAM_REAR_DATA_FILT_N<0..3>

I143

MIPI1C_CAM_FRONT_CLK_P

I146

MIPI1C_CAM_FRONT_CLK_N

I149

CAMERA

1

PP9440

P4MM

A

PP9441

P4MM

PP9442

P4MM

PP9443

P4MM

PP9444

P4MM

PP9445

P4MM

PP9446

P4MM

PP9447

P4MM

MIPI1C_CAM_FRONT_CLK_P

PP

SM

1

MIPI1C_CAM_FRONT_CLK_N

PP

SM

1

MIPI1C_CAM_FRONT_DATA_P<0>

PP

SM

1

MIPI1C_CAM_FRONT_DATA_N<0>

PP

SM

1

MIPI0C_CAM_REAR_CLK_P

PP

SM

1

MIPI0C_CAM_REAR_CLK_N

PP

SM

1

MIPI0C_CAM_REAR_DATA_P<0>

PP

SM

1

MIPI0C_CAM_REAR_DATA_N<0>

PP

SM

PLACE_NEAR=U0652.AR33:3MM

PLACE_NEAR=U0652.AR34:3MM

PLACE_NEAR=U0652.AT33:3MM

PLACE_NEAR=U0652.AT34:3MM

PLACE_NEAR=U0652.AU25:3MM

PLACE_NEAR=U0652.AV25:3MM

PLACE_NEAR=U0652.AU27:3MM

PLACE_NEAR=U0652.AV27:3MM

7

20 53

7

20 53

7

20 53

7

20 53

7

23 53

7

23 53

7

23 53

7

23 53

MIPI1C_CAM_FRONT_DATA_P<0>

I150

MIPI1C_CAM_FRONT_DATA_N<0>

I148

MIPI1C_CAM_FRONT_CLK_FILT_P

I147

MIPI1C_CAM_FRONT_CLK_FILT_N

I152

MIPI1C_CAM_FRONT_DATA_FILT_P<0>

I151

MIPI1C_CAM_FRONT_DATA_FILT_N<0>

I153

EDP_DATA_P<0..3>

I187

EDP_DATA_N<0..3>

I185

EDP_DATA_EMI_P<0..3>

I186

EDP_DATA_EMI_N<0..3>

I188

EDP_DATA_EMI_CONN_P<0..3>

I190

EDP_DATA_EMI_CONN_N<0..3>

I189

6 3

NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE

NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE

7

23 53

7

23 53

7

23 53

7

23 53
23
23
23
23
7

20 53
7

20 53
7

20 53
7

20 53
20
20
20
20

7

18
7

18
18
18
18
18

SYNC_MASTER=J72_MLB_C

PAGE TITLE

TEST: EE TP/PP

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

94 OF 121

SHEET

53 OF 54

SIZE

A

D

124578

8 7 6 5 4 3

WWW.AliSaler.Com

POWER CONNECTIONS

12

BUCK0

PPVDD_CPU

46 52

MAKE_BASE=TRUE

D

BUCK1

PPVDD_GPU

46 52

MAKE_BASE=TRUE

BUCK2

PPVDD_SOC

46 52

MAKE_BASE=TRUE

BUCK3

PP1V8_S2R

46 47 52

MAKE_BASE=TRUE

BUCK3_SW

C

B

PP1V8_SW1

46 50 52

MAKE_BASE=TRUE

PP1V8_EXT_SW

50 52

MAKE_BASE=TRUE

PP1V8_SW2

MAKE_BASE=TRUE

PP1V8_S2R_SW3

46

MAKE_BASE=TRUE

PP1V8_S2R_SW3_COMP

52 54

MAKE_BASE=TRUE

BUCK4

PP1V2_S2R

46 47 52

MAKE_BASE=TRUE

=PPVDD_CPU

=PPVDD_GPU

=PPVDD_SOC

=PP1V8_S2R_MISC
=PP1V8_S2R_VDDIO_WLAN_BT
=PP1V8_S2R_TRISTAR
=PP1V8_S2R_DDR
=PP1V8_S2R_GRAPE
=PP1V8_S2R_EXT_SWITCH
=PP1V8_S2R_REAR_CAMERA
=PP1V8_S2R_MESA
=PP1V8_S2R_VDD_CORE_GPS
=PP1V8_S2R_VDD_IO_GPS

=PP1V8_AUDIO
=PP1V8_DMIC
=PP1V8_CAM_FRONT
=PP1V8_CAM_REAR
=PP1V8_PROX

=PP1V8_VDDIO18_SOC
=PP1V8_SOC
=PP1V8_MIPI_SOC
=PP1V8_EDP_SOC
=PP1V8_NAND_SOC

=PP1V8_NAND
=PP1V8_PLL_SOC
=PP1V8_SPKRAMP
=PP1V8_EEPROM
=PP1V8_BEACON

=PP1V8_GRAPE

=PP1V8_S2R_GYRO
=PP1V8_S2R_ACCEL
=PP1V8_S2R_OSCAR

PP1V8_S2R_SW3_COMP

=PP1V8_S2R_COMP

PP1V8_S2R_SW3 SHOULD BE ON IN HIBERNATE
CURRENTLY POWERS OSCAR AND 1.8V RAIL ON SENSOR

=PP1V2_S2R_DDR
=PP1V2_S2R_DDR_SOC
=PP1V2_S2R_CAM_REAR

9

9

9

15

14

20

23

22

8 9

4 5 7

7

7

6

12 48

4

51

5

11

8

13

50

13 46 52

21

21

19

52 54

21

8

8

51

44

10 18

BUCK5

PPVDD_SRAM

46 52

MAKE_BASE=TRUE

BUCK6

PP3V3_S2R

46 52

MAKE_BASE=TRUE

PP3V3_SW

48 52

MAKE_BASE=TRUE

LDO1

PP3V0_SPARE1

47 52

MAKE_BASE=TRUE

LDO2

PP1V7_VA_VCP

16 47 52

MAKE_BASE=TRUE

LDO3

PP3V0_S2R_SENSOR

47 52

MAKE_BASE=TRUE

LDO4

PP3V0_ALS

47 52

MAKE_BASE=TRUE

LDO5

PP3V0_UVLO

47 52

MAKE_BASE=TRUE

=PPVDD_SRAM_CPU
=PPVDD_SRAM_SOC

=PP3V3_S2R_SWITCH
=PP3V3_S2R_WIFI_PA

=PP3V3_EDP_PU
=PP3V3_NAND
=PP3V3_USB_SOC

=PP3V0_SPARE1

=PP1V7_VA_VCP

LDO3 SHOULD BE ON IN HIBERNATE
COMPASS, ACCEL, GYRO, PROX ARE ON OSCAR
HALL EFFECT NEEDS TO BE ON IN HIBERNATE

=PP3V0_S2R_HALL

=PP3V0_S2R_GYRO
=PP3V0_S2R_ACCEL
=PP3V0_S2R_COMP

=PP3V0_ALS
=PP3V0_PROX
=PP3V0_HP_ALS
=PP3V0_IO_ALS

SHOULD IO ALS POWER HERE?

=PP3V0_UVLO

20

22

49

9

48

44

12

4

49

15 16

LDO7

PP3V0_S2R_TRISTAR

47 52

MAKE_BASE=TRUE

LDO7 SHOULD BE ON IN HIBERNATE

=PP3V0_S2R_TRISTAR

11

LDO8

NC_LDO8

47

MAKE_BASE=TRUE

LDO9

PP1V3_CAM

47 52

MAKE_BASE=TRUE

NO_TEST=TRUE

=NC_LDO8

BACKUP RAIL. CAN BE BOOSTED TO MEET

1.1V MIN ON CAMERA IF NEEDED.

=PP1V3_CAM_FRONT

=PP1V3_CAM_REAR

23

LDO10

PP1V0_SOC

47 52

MAKE_BASE=TRUE

=PP1V0_USB_SOC
=PP1V0_MIPI_SOC
=PP1V0_EDP_PAD_DVDD_SOC

4

7

7

LDO11

PP2V6_CAM_AF

47 52

MAKE_BASE=TRUE

13

21

21

21

=PP2V6_CAM_REAR_AF

23

LDO13

PP2V9_CAM

47 52

MAKE_BASE=TRUE

=PP2V9_CAM_FRONT
=PP2V9_CAM_REAR

20

23

CHARGER MAIN

PPVCC_MAIN

46 47 48 49 52

MAKE_BASE=TRUE

BATTERY

PPBATT_VCC

46 52

MAKE_BASE=TRUE

USB POWER INPUT

PPVBUS_USB_DCIN

46 52

MAKE_BASE=TRUE

ON_BUF

PP1V8_ALWAYS

47 52

MAKE_BASE=TRUE

BACKLIGHT BOOST

PPLED_OUT_A

MAKE_BASE=TRUE

=PPVCC_MAIN_AUDIO
=PPVCC_MAIN_LED
=PPVCC_MAIN_DOCK
=PPVCC_MAIN_DEV
=PPVCC_MAIN_CPU
=PPVCC_MAIN_GPU
=PPVCC_MAIN_SOC
=PPVCC_MAIN_GRAPE
=PPVCC_MAIN_LCD
=PPVCC_MAIN_NAVAJO
=PPVCC_MAIN_VDD_LCM
=PPVCC_MAIN_WLAN
=PPVCC_MAIN_GPS

=PPBATT_POS_CONN

=PPBATT_VCC_BB
=PPBATT_AUDIO

=PPVBUS_USB_EMI

=PP1V8_ALWAYS

=PPLED_REG_A

15 16

47

43

46

46

46

13

18

47

44

45

24 25 33 34 35 36 37 38

43

5

18 47 52

D

C

B

BUCK4_SW

PP1V2_SW1

46 52

MAKE_BASE=TRUE

A

PP1V2_S2R_SW2

46 52

MAKE_BASE=TRUE

=PP1V2_VDDQ_DDR
=PP1V2_VDDIOD_SOC
=PP1V2_HSIC_SOC

=PP1V2_S2R_OSCAR

PP1V2_S2R_SW2 SHOULD BE ON IN HIBERNATE
PROVIDE 1.2V TO OSCAR

VLCM1

PP5V25_GRAPE

MAKE_BASE=TRUE

=PP5V25_GRAPE

13 47

SYNC_MASTER=J72_MLB_C

PAGE TITLE

POWER: ALIASES

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=11/26/2012

DRAWING NUMBER

051-0886

REVISION

A.0.0

BRANCH

PAGE

121 OF 121

SHEET

54 OF 54

SIZE

A

D

124578

8

8

4

19

PP3V3_ACC

47 52

MAKE_BASE=TRUE

LDO6

=PP3V3_ACC

11

6 3