Apple IPAD2 K94 CHOPIN MLB PVT Schematic

8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7
K94 CHOPIN MLB
3456
A
ECNREV
0001052699
DESCRIPTION OF REVISION
PRODUCTION RELEASED
12
CK APPD
DATE
2011-01-10
PVT
D
REV. A
D
LAST_MODIFIED=Mon Jan 10 13:11:06 2011
CSAPDF
TABLE_TABLEOFCONTENTS_HEAD
1
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
3
TABLE_TABLEOFCONTENTS_ITEM
4
TABLE_TABLEOFCONTENTS_ITEM
5
TABLE_TABLEOFCONTENTS_ITEM
6
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7
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C
B
A
TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM
12 NAND
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DRAWING
TITLE=BACH ABBREV=DRAWING
CONTENTS
TABLE OF CONTENTS
1
2
BLOCK DIAGRAM: SYSTEM
5
BOM TABLE
AP: MAIN
6
AP: I/Os
8
AP: NAND
AP: TV,DP,MIPI
9
10
AP: PWR
AP: PWR
11
12
AP: MISC & ALIASES
13
AP: VIDEO BUFFER,BB USB MUXES
14
VIDEO: DISPLAY PORT
17
20
VIDEO: MLC
VIDEO: MLC ALIASES
21
22
VIDEO: LVDS CONNECTOR
GRAPE: GROUNDHOG,CONN,BOOST
31
GRAPE: Z1, Z2
36
AUDIO: L63 CODEC
37
AUDIO: SPEAKER AMP
38
AUDIO: HEADPHONE OUT
39
AUDIO: BLANK
42
AUDIO: DETECT/MIC BIAS
AUDIO: HP/MIC FILTERS
43
54
CONNECTOR: CANADA FLEX CONN,SENSOR PANEL ALIASES
55
CONNECTOR: CANADA FLEX FILTERS
CONNECTOR: SENSOR PANEL CONNECTOR
56
IO FLEX: DOCK COMPONENTS
57
59
IO FELX: B2B Connector
CONNECTOR: X23 WIFI/BT
60
61
CONNECTOR: X24 CELLULAR/GPS
SYNC MASTER
MIKE
MIKE2N/A
MIKE
JAMES
JAMES7N/A
JAMES
JAMES
JAMES8N/A
JAMES
JAMES
JAMES
JONATHAN
JAMES
MIKE
MIKE
ALEX
RAMSIN30N/A
RAMSIN N/A
LENG
LENG
LENG
LENG
LENG
LENG
MARK B.
MARK B.
MARK B.27N/A
JAMES
JAMES
MIKE
MIKE
DATE
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
PDF
TABLE_TABLEOFCONTENTS_HEAD
32
TABLE_TABLEOFCONTENTS_ITEM
33
TABLE_TABLEOFCONTENTS_ITEM
34
TABLE_TABLEOFCONTENTS_ITEM
35
TABLE_TABLEOFCONTENTS_ITEM
36
TABLE_TABLEOFCONTENTS_ITEM
37
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TABLE_TABLEOFCONTENTS_ITEM
41
TABLE_TABLEOFCONTENTS_ITEM
42
CSA
73
75
81
82
83
90
93
100
101
102
106
CONTENTS
POWER: ALIASES
POWER: BATTERY CONNECTOR
POWER: PMU
POWER: PMU
POWER: 3.3V VR
DEBUG AND MISC
FCT/ICT TEST/BRACKETS
CONSTRAINTS: ASSIGNMENTS
CONSTRAINTS: ASSIGNMENTS
CONSTRAINTS: MLB RULES
CONSTRAINTS: RF RULES
SYNC MASTER
YOSH
YOSH
YOSH
YOSH
YOSH
MIKE
MIKE
MIKE
MIKE
MIKE
MIKE
87 6 5 4 21
DATE
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
C
B
SIZE
A
D
DRAWING TITLE
CHOPIN MLB
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
1 OF 106
SHEET
1 OF 42
3
345678
21
ISP_I2C1
Z2
CSA 31
SPI1
H4P
MIPI1C
ISP_I2C0
MIPI0C
D
GROUNDHOG
CSA 30 CSA 31
Z1
DUAL-CORE ARM
CORTEX-A9 W/ SMP
850 MHZ
SDIO
UART3
LPDDR2
FF CAMERA
CANADA FLEX
REAR CAMERA
SENSOR PANEL
X23
WIFI/BT
BT_I2S
CSA 60
D
WIFI/BT ANT
2X32-BIT
400MHZ/800MB/S
DISPLAY/
TOUCH PANEL
C
BACKLIGHT
LVDS
MLC
CSA 20
MIPI0D
GPU
DUAL-CORE IMG
SGX543-MP
AUDIO
AE2
USB1.1
UART1 UART2 UART4
SPI2 IPC
USB1.1 USART UMTS GPS
X24
ICE3.0/GPS
CSA 61
CELLULAR ANT
GPS ANT
C
ARM A5 CPU
UART5
USB2.0
PMU
ALISON
BATTERY
UART0
30-PIN
DOCK
DISPLAYPORT
CSA 75
DWI
VIDEO DAC
AMP
I2C0
CSA 81
B
B
AUDIO CODEC
I2C1
VSP
ASP
XSP
PROX SENSOR
SENSOR PANEL SENSOR PANEL
COMPASS
I2C2
I2S2
I2S0
I2S3
FMI3FMI2FMI1FMI0 HSIC0
A
GYRO
SENSOR PANEL SENSOR PANEL
87 5 4 21
ACCELEROMETER
ALS
CANADA FLEX
NAND FLASHNAND FLASH
SD CARD READER
CSA 14 CSA 14
36
L63
CSA 36
CSA 58
LINEOUT
CSA 57
AMP
SPEAKER
AMP
MIC
HP
SYNC_MASTER=MIKE
PAGE TITLE
BLOCK DIAGRAM: SYSTEM
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
2 OF 106
SHEET
2 OF 42
SIZE
A
D
Page Notes
Power aliases required by this page:
(NONE)
Signal aliases required by this page:
(NONE)
BOM options provided by this page:
ALL AVAIL BOM OPTIONS
COMMON ALTERNATE
D
16GB_PROD 32GB_PROD 64GB_PROD
BKLT_PLL DEVELOPMENT_JTAG
DEVELOPMENT_JTAG_TAP JTAG_DAP JTAG_TAP_NOT
SPEAKER INTERNAL_MIC
PORTRAIT_DOCK MLC_DEV
MLC_PROD
K93 K94
345678
21
BOM OPTIONS
PROGRAMMABLE PARTS
SCH AND BOARD P/N
PART#
051-8962
820-3069
QTY
DESCRIPTION
SCH,CHOPIN_AUDIO,MLB,K94
1
1
PCBF,CHOPIN_AUDIO,MLB,K94
REFERENCE DESIGNATOR(S)
SCH1
PCB1
BOM OPTION
D
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
BOM GROUP
BASIC
BOM OPTIONS
COMMON,ALTERNATE
ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS
C
B
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
PD PARTS
QTY
PART#
806-1397
806-1398 FENCE2
806-1399
806-1400 FENCE3
806-1401
TOP BARCODE LABEL/EEE CODES (ONLY ONE IS USED PER BOM)
PART#
QTY
1
825-7651
825-7651
825-7651
825-7651
825-7651
825-7651
825-7651
825-7651
1
1
1
1
1
1
1
1
DESCRIPTION
1
FENCE,GRAPE,MLB,K93/K94
CAN,GRAPE,MLB,K93/K94
1
FENCE,CPU,MLB,K93/K94
1
CAN,CPU,MLB,K93/K94
1
FENCE,NAND,MLB,K93/K94
1
1
CAN,NAND,MLB,K93/K94
DESCRIPTION
EEEE FOR 639-1180 (K93 16G)
EEEE FOR 639-1426 (K93 32G)
EEEE FOR 639-1428 (K93 64G)
EEEE FOR 639-1112 (K94 16G)
EEEE FOR 639-1181 (K94 32G)
EEEE FOR 639-1182 (K94 64G)
EEEE FOR 639-1430 (K95 16G)
EEEE FOR 639-1427 (K95 32G)
EEEE FOR 639-1429 (K95 64G)
REFERENCE DESIGNATOR(S)
FENCE1806-1396
REFERENCE DESIGNATOR(S)
DH36825-7651
DH37
DG99
DFC4
DFC5
DFC6
DH3C
DH3D
DG9C
CAN1
CAN2
CAN3
CRITICAL BOM OPTION
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
BOM OPTION
NOSTUFF
NOSTUFF
NOSTUFF
EEEE_K93_16G
EEEE_K93_32G
EEEE_K93_64G
EEEE_K94_16G
EEEE_K94_32G
EEEE_K94_64G
EEEE_K95_16G
EEEE_K95_32G
EEEE_K95_64G
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
C
B
BOTTOM LABEL TYPE 1
PART#
825-7639 LBL1
825-7639 LBL2
QTY
1
1
DESCRIPTION
631- B/C LABEL
639- B/C LABEL
REFERENCE DESIGNATOR(S)
CRITICAL BOM OPTION
CRITICAL
CRITICAL
BOTTOM LABEL TYPE 2
PART#
825-7640
825-7640
DESCRIPTION
QTY
MATRIX LABEL
1
631- MATRIX LABEL
1
REFERENCE DESIGNATOR(S)
LBL3
LBL4
A
CRITICAL BOM OPTION
CRITICAL
CRITICAL
SYNC_MASTER=MIKE
PAGE TITLE
BOM TABLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
87 5 4 21
36
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
SIZE
A
D
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
5 OF 106
SHEET
3 OF 42
345678
PART NUMBER
D
C
B
A
ALTERNATE FOR PART NUMBER
AU14
AU15
AU16
AU17
AV1
AV2
AV3
AV4
AV5
AV6
AV7
AV8
AV9
AV10
AV11
AV12
AV13
AV14
AV15
AV16
AV17
AV29
AV33
AV34
AW1
AW2
AW4
AW23
AW33
AW34
AY1
AY2
AY3
AY4
AY20
AY22
AY24
AY30
AY31
AY32
AY33
AY34
B1
B2
B7
B9
B10
B12
B13
B15
B17
B18
B20
B22
B23
B28
B29
B30
B32
B33
B34
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C23
C27
C29
C32
C33
D1
D3
D5
D7
D9
D11
D13
D15
D16
D23
BOM OPTION
U0652
H4P-512MB
BGA
SYM 11 OF 12
SC58940X01-A030
VSS VSS
REF DES
COMMENTS:
D27 D32
E1 E2
E3
E4 E6
E8
E10 E12
E14
E16 E17
E18 E19
E20
E21 E22
E23
E25 E26
E27
E28 E30
E31 E32
E34
F1 F2
F3
F5 F19
F20
F21 F22
F23 F25
F26
F29 F30
F31
F32 G1
G3
G4 G7
G8 G9
G10
G12 G13
G14
G15 G16
G17
G18 G19
G20 G21
G22
G25 G28
G29
G30 H1
H2
H3 H5
H7 H8
H10
H12 H14
H16
H18 H20
H22
H24 H25
H29 H30
J1
J2 J3
J4
J7 J9
J11
J13 J15
J17 J19
87 5 4 21
TABLE_ALT_HEAD
NEED TO ADD BOM TABLE FOR ALT P/N OF HYNIX (?)
=PP1V8_H4
457
101332
R0645
100K
12
R0646
100K
12
R0647
100K
12
=PP3V3_USB_H4
4
32
283135
IN
JTAG_AP_TCK
JTAG_AP_TMS
JTAG_AP_TDI
RST_AP_L
4
28 39
4
28 39
4
10 39
1
R0617
10K
1% 1/32W MF 01005
2
=PP1V1_PLL_H4
32
JTAGSEL 0 - PARALLEL
1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG)
PER RADAR #6755237
101332
R0632
100K
12
1%
1/32W
MF
01005
1
1
R0688
42.2K
1/32W
01005
C0618
1000PF
10%
1%
16V
2
X7R
MF
201
2
=PP1V8_H4
457
R0620
12
R0621
12
R0622
12
R0623
12
AP_DDR1_CKEIN_1V2
1
R0689
82.5K
1%
1/32W
MF
01005
2
0.00
0%
1/32W
MF
01005
0.00
0%
1/32W
MF
01005
0.00
0%
1/32W
MF
01005
0.00
0%
1/32W
MF
01005
R0624
0.00
12
0%
MF
1
C0608
0.01UF
10%
6.3V
2
X5R 01005
=PP1V1_USB_H4
4
32
=PP1V2_HSIC_H4
32
R0662
100K
12
1039
OUT
1039
OUT
4
1039
IN
4
2839
OUT
4
2839
OUT
NOSTUFF
XW0604
1/32W
01005
DEVELOPMENT_JTAG_TAP
1
C0651
0.01UF
10%
6.3V
2
X5R 01005
1
C0648
0.01UF
10%
6.3V
2
X5R 01005
1
C0646
0.01UF
10%
6.3V
2
X5R 01005
1
C0644
0.01UF
10%
6.3V
2
X5R 01005
1
C0660
56PF
5%
6.3V
2
NP0-C0G 01005
10
AP_JTAG_SEL
JTAG_AP_TRST_L
JTAG_AP_TDO
JTAG_AP_TDI JTAG_AP_TMS
JTAG_AP_TCK
10
10
10
10
SHORT-01005
12
NOSTUFF
XW0605
SHORT-01005
12
1
C0642
0.01UF
10%
6.3V
2
X5R 01005
TP_HSIC1_AP_DATA TP_HSIC1_AP_STB
NC_HSIC2_AP_DATA
NC_HSIC2_AP_STB
NC_JTAG_AP_RTCK
AP_TESTMODE
AP_TST_STPCLK
TP_AP_TST_CLKOUT
AP_FAST_SCAN_CLK
AP_HOLD_RESET
RST_AP_1V8_L
AP_CFSB
AP_DDR1_CKEIN
PP1V1_PLL4_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V1_PLL3_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V1_PLL2_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V1_PLL1_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP1V1_PLL0_F
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
1
C0643
0.22UF
20%
6.3V
2
X5R 0201
1
C0641
0.01UF
10%
6.3V
2
X5R 01005
A26
A27
C26 D26
N31
M30
N29 M31
M32 N32
N30
P29
M28
P33
P34
T32
P31
P32
W30
G11
R7
D25
HSIC_VDD121
17MA
HSIC1_DATA HSIC1_STB
HSIC2_DATA
HSIC2_STB
JTAG_SEL JTAG_TRTCK
JTAG_TRST*
JTAG_TDO JTAG_TDI
JTAG_TMS
JTAG_TCK
TESTMODE
FUSE1_FSRC
TST_STPCLK TST_CLKOUT
FAST_SCAN_CLK
HOLD_RESET
RESET*
CFSB
DDR0_CKEIN
DDR1_CKEIN
HSIC_VSS121
C25
F24
D24
HSIC_DVDD
7MA
HSIC_VDD122
17MA
HSIC_VSS122
HSIC_DVSS
E24
C24
C19
C20
C21
C18
PLL2_AVDD11
PLL3_AVDD11
PLL1_AVDD11
PLL0_AVDD11
2.5MA EACH
SYM 1 OF 12
U0652
H4P-512MB
BGA
(FOR IC TESTER)
(0=NORMAL)
PLL3_AVSS11
PLL2_AVSS11
PLL1_AVSS11
PLL0_AVSS11
D19
D20
D21
D18
PP1V1_PLL_USB_F
AR10
AT14
C17
C22
PLL4_AVDD11
PLL_USB_AVDD11
2.5MA
MIPI0D_VDD11_PLL
6.5MA
USB_ANALOGTEST
PLL4_AVSS11
PLL_USB_AVSS11
MIPI_VSS_0
D17
D22
AN10
PART#
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
1
C0652
0.01UF
10%
6.3V
2
X5R 01005
PP1V1_MIPID_PLL_F
1
C0661
56PF
5%
6.3V
2
NP0-C0G 01005
C28
H27
H28
USB_DVDD
5MA
USB_VDD330
28MA
MIPI1D_VDD11_PLL
WDOG
XI0
XO0
USB11_DP USB11_DM
USB_DP
USB_DM
USB_VBUS
USB_ID
USB_BRICKID
USB_REXT
USB_VSSAC
USB_VSSA0
USB_DVSS
MIPI_VSS_1
D28
H26
J26
AN11
36
DESCRIPTION
QTY
VOLTAGE=1.1V
MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM
NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
1
C0654
0.1UF
10%
6.3V
2
X5R 201
1
C0627
0.01UF
10%
6.3V
2
X5R 01005
P30
A18
A19
A22
A23
A29 A28
G26
XTAL_24M_I
39
39
XTAL_24M_O
NC_USB_ANALOGTEST
F27
F28
NC_USB_ID
G27
A21
USB_REXT
NOTE: PAGE 4608 H4P UM V0.83
R0625
0.00
12
0%
1/32W
MF
01005
1
C0655
1UF
10%
6.3V
2
CERM 402
1
C0640
1UF
10%
6.3V
2
CERM 402
USB_FS_D_P USB_FS_D_N
USB_D_P
USB_D_N
1
R0642
44.2
1% 1/20W MF 201
2
FL0610
80-OHM-0.2A-0.4-OHM
12
1
2
11 39
BI
11 39
BI
28 39
BI
28 39
BI
21
REFERENCE DESIGNATOR(S)
CRITICAL BOM OPTION
=PP1V1_USB_H4
=PP1V1_MIPI_PLL_H4
=PP1V1_USB_H4
=PP3V3_USB_H4
C0630
0.01UF
10%
6.3V X5R 01005
RST_PMU_IN
1.00M
01005
12
2
DZ0600
GDZT2R5.1B
GDZ-0201
1
SYNC_MASTER=JAMES
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
35
OUT
R0655
1% MF
1/32W
R0640
12
1/32W
01005
USB_AP_VBUS
4
32
22
5%
MF
R
R0651
12
4
32
32
4
32
24.000MHZ-16PF-60PPM
39
24M_O
1
C0613
22PF
5% 16V
2
CERM 01005
100K
5%
1/32W
MF
01005
USB_BRICKID
AP: MAIN
Apple Inc.
PPVBUS_USB
TABLE_5_HEAD
CRITICAL
Y0602
SM-2
13
24
35
OUT
1
2
34
DRAWING NUMBER
051-8962
REVISION
PAGE
6 OF 106
SHEET
C0607
22PF
5% 16V CERM 01005
SYNC_DATE=N/A
A.0.0
4 OF 42
SIZE
D
C
B
A
D
345678
=PP3V0_OPTICAL
=PP1V8_H4
47
101332
I2C0_SDA_1V8
5
10193539
I2C0_SCL_1V8
5
10193539
I2C1_SDA_1V8
5
2539
I2C1_SCL_1V8
5
D
2539
I2C2_SDA_3V0
5
252639
I2C2_SCL_3V0
5
252639
1
R0700
4.7K
5% 1/32W MF 01005
2
1
R0701
4.7K
5% 1/32W MF 01005 01005
2
1
R0702
4.7K
5% 1/32W MF
2
262732
1
R0703
4.7K
5% 1/32W MF 01005
2
1
R0704
1.8K
5% 1/32W MF 01005
2
1
R0705
1.8K
5% 1/32W MF 01005
2
=PP1V8_S2R_MISC
5
2832
=PP1V8_ALWAYS
32
=PP1V8_S2R_MISC
5
2832
(SCREEN ROTATION LOCK)
5
2935
5
2535
5
2535
C
HOME_L
ONOFF_L
SRL_L
R0771
220K
12
5%
1/20W
MF
201
R0770
220K
12
5%
1/20W
MF
201
R0765
220K
12
5%
1/20W
MF
201
HOME_L
5
2935
IN
ONOFF_L
5
2535
IN
PM_BT_WAKE
30
OUT
PM_RADIO_ON
5
31
OUT
RST_DET_L
31
IN
SPI_IPC_SRDY
31
IN
IRQ_PMU_L
35
IN
IRQ_CODEC_L
19
IN
IRQ_GYRO_INT2
5
25
OUT
BOOT_CONFIG_0
10
IN
PM_KEEPACT
5
35
OUT
IRQ_GRAPE_HOST_INT_L
18
OUT
GPS_SYNC
31
OUT
GSM_TXBURST_IND
31
IN
BOOT_CONFIG_1
10
IN
FORCE_DFU
5
37
IN
DFU_STATUS
5
OUT
BOOT_CONFIG_2
10
IN
BOOT_CONFIG_3
10
IN
RST_GPS_L
31
OUT
PM_GPS_STANDBY_L
31
OUT
IRQ_PROX_INT_L
25
OUT
IRQ_GYRO_INT1
25
IN
IRQ_GPS_INT_L
31
IN
TP_IRQ_COMPASS_INT_L IRQ_ACCEL_INT1_L
25
IN
IRQ_ALS_INT_L
26
IN
IRQ_ACCEL_INT2_L
25
IN
AUD_SPKRAMP_MUTE_L
20
OUT
PORT_DOCK_VIDEO_AMP_EN
11
OUT
NC_AP_GPIO2
NC_AP_GPIO3
NC_AP_GPIO4
NC_AP_GPIO5
NC_AP_GPIO6
NC_AP_GPIO8
NC_AP_GPIO10
NC_AP_GPIO14
NC_BOARD_ID_3
NC_AP_GPIO20
NC_AP_GPIO22
NC_GPIO_218
AA3 AA4
AA5
AA6 AA7
AB3 AB4
AB5
AC7 AC4
AD7
AC3 AD6
AD5
AD4 AD3
AE7 AD1
AE1
AE4 AE3
AE2
AF4 AF3
AF7
AF2 AG7
AG6 AG5
AG4
AG3 AG1
AH1
AH2 AH7
AH3
AH4 AJ5
AJ4 AJ3
U30
V30
GPIO0
GPIO1
GPIO2 GPIO3
GPIO4 GPIO5
GPIO6
GPIO7 GPIO8
GPIO9
GPIO10 GPIO11
GPIO12
GPIO13 GPIO14
GPIO15 GPIO16
GPIO17
GPIO18 GPIO19
GPIO20
GPIO21 GPIO22
GPIO23
GPIO24 GPIO25
GPIO26 GPIO27
GPIO28
GPIO29 GPIO30
GPIO31
GPIO32 GPIO33
GPIO34
GPIO35 GPIO36
GPIO37 GPIO38
GPIO39
GPIO_3V0
GPIO_3V1
U0652
H4P-512MB
BGA
SC58940X01-A030
SYM 2 OF 12
1.8V
1.8V/3.0V
GROUP 0
GROUP 1
VSS
A1A2A3A6A7A8A9
EHCI_PORT_PWR0
EHCI_PORT_PWR1 EHCI_PORT_PWR2
TMR32_PWM0
TMR32_PWM1
TMR32_PWM2
3.0V
UART1_CTSN
UART1_RTSN
UART2_CTSN
UART2_RTSN
UART3_CTSN
UART3_RTSN
UART4_CTSN
UART4_RTSN
UART5_RTXD
UART6_CTSN UART6_RTSN
A10
A11
A12
UART0_RXD UART0_TXD
UART1_RXD UART1_TXD
UART2_RXD UART2_TXD
UART3_RXD
UART3_TXD
UART4_RXD
UART4_TXD
UART6_RXD
UART6_TXD
AL7
AL6 AM6
AC30
AA27 AB30
R31 R30
AN4
AM5
AM3 AM1
AP4
AM2 AM4
AN5
AP1
AR2 AR4
AP2
AU1 AT3
AT4
AT1
AR3
AU2 AN3
AU3
AP3
21
AP_GPIO40_BRD_REV0
AP_GPIO41_BRD_REV1
AP_GPIO42_BRD_REV2
NC_AP_GPIO185
NC_AP_GPIO186
NC_AP_GPIO187
UART_0_RXD
UART_0_TXD
UART_1_CTS_L UART_1_RTS_L
UART_1_RXD UART_1_TXD
SRL_L
RST_BB_L
UART_2_RXD UART_2_TXD
UART_3_CTS_L
UART_3_RTS_L
UART_3_RXD UART_3_TXD
UART_4_CTS_L
UART_4_RTS_L
UART_4_RXD
UART_4_TXD
BATTERY_SWI
AUD_VOL_DOWN_L
IPC_GPIO AUD_VOL_UP_L
TP_PROX_GPIO
10
IN
10
IN
10
IN
D
10
IN
10
OUT
10
IN
10
OUT
10
IN
10
OUT
5
25 35
IN
31
OUT
10
IN
10
OUT
10
IN
10
OUT
10
IN
10
OUT
10
IN
10
OUT
10
IN
10
OUT
33 35
OUT
25
IN
31
IN
25
IN
TO DOCK MUX
TO BB USART
TO BB UMTS
TO BT UART
TO GPS UART
C
PM_KEEPACT
R0720
33.2
1%
1/32W
MF
01005
12
I2S_AP_0_MCK_R
1939
OUT
CODEC ASP
B
BB (NOT USED)
CODEC VSP & BT
CODEC XSP
1939
OUT
1939
OUT
1939
IN
1939
OUT
1930
OUT
39
1930
OUT
39
1930
IN
39
1930
OUT
39
1939
OUT
1939
OUT
1939
IN
1939
OUT
I2S_AP_0_BCLK I2S_AP_0_LRCK
I2S_AP_0_DIN
I2S_AP_0_DOUT
NC_I2S_AP_1_MCK NC_I2S_AP_1_BCLK
NC_I2S_AP_1_LRCK NC_I2S_AP_1_DIN
NC_I2S_AP_1_DOUT
NC_I2S_AP_2_MCK
I2S_AP_2_BCLK I2S_AP_2_LRCK
I2S_AP_2_DIN
I2S_AP_2_DOUT
NC_I2S_AP_3_MCK I2S_AP_3_BCLK
I2S_AP_3_LRCK I2S_AP_3_DIN
I2S_AP_3_DOUT
I2S_AP_0_MCK
NC_AP_GPIO216
BOARD_ID_2_SPI_FLASH_DOUT
10
IN
BOARD_ID_1_SPI_FLASH_DIN
10
IN
BOARD_ID_0_SPI_FLASH_CLK
10
IN
TO GRAPE
A
TO BB
NC_SPI_FLASH_CS_L
1740
IN
1740
OUT
1740
OUT
1740
OUT
3140
IN
3140
OUT
3140
IN
3140
OUT
SPI_GRAPE_MISO SPI_GRAPE_MOSI
SPI_GRAPE_SCLK
SPI_GRAPE_CS_L
SPI_IPC_MISO SPI_IPC_MOSI
SPI_IPC_SCLK
SPI_IPC_MRDY
87 5 4 21
Y32
AB33
Y31 AC34
AA32
AC33 AD32
Y34
W34 AC32
V33
V32
U34
U32
V31
T31
W32
U31
T30
W29
W31
AE29
AG34
AE31 AE32
AH32
AF28 AG32
AF31
AF34
AG33 AE27
AE28
I2S0_MCK
I2S0_BCLK I2S0_LRCK
I2S0_DIN I2S0_DOUT
I2S1_MCK
I2S1_BCLK
I2S1_LRCK I2S1_DIN
I2S1_DOUT
I2S2_MCK
I2S2_BCLK I2S2_LRCK
I2S2_DIN I2S2_DOUT
I2S3_MCK
I2S3_BCLK
I2S3_LRCK I2S3_DIN
I2S3_DOUT
SPDIF
SPI0_MISO SPI0_MOSI
SPI0_SCLK
SPI0_SSIN
SPI1_MISO SPI1_MOSI
SPI1_SCLK
SPI1_SSIN
SPI2_MISO SPI2_MOSI
SPI2_SCLK SPI2_SSIN
U0652
H4P-512MB
BGA
SC58940X01-A030
SYM 3 OF 12
DUAL-WIRE INTF
GROUP 6
1.8V/3.0V
GROUP 5
VSS
A13
A14
A15
A16
A17
A20
GROUP 7
FOR PMU
A30
A33
SDIO0_CLK SDIO0_CMD
SDIO0_DATA0
SDIO0_DATA1 SDIO0_DATA2
SDIO0_DATA3
SPI3_MISO SPI3_MOSI
SPI3_SCLK SPI3_SSIN
A34
AA9
I2C0_SCL I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
SWI_DATA
DWI_CLK
DWI_DI
DWI_DO
AD26 AD29
AD31
AE30
AF30 AF29
AA30
AB34
AA31
Y27
AB27 AC26
AB31
AD30 AB26
AB32
AH31
AH29
AH30 AG30
I2C0_SCL_1V8
I2C0_SDA_1V8
I2C1_SCL_1V8 I2C1_SDA_1V8
I2C2_SCL_3V0
I2C2_SDA_3V0
NC_SWI_AP
DWI_AP_CLK DWI_AP_DI
DWI_AP_DO
SDIO_WL_CLK
SDIO_WL_CMD SDIO_WL_DATA<0>
SDIO_WL_DATA<1>
SDIO_WL_DATA<2> SDIO_WL_DATA<3>
NC_SPI_AP_3_MISO NC_SPI_AP_3_MOSI
NC_SPI_AP_3_SCLK
NC_SPI_AP_3_CS_L
1
R0735
5
10 19 35 39
BI
5
10 19 35 39
OUT
5
25 39
BI
5
25 39
OUT
5
25 26 39
BI
5
25 26 39
OUT
35 39
OUT
35 39
IN
35 39
OUT
30 40
OUT
30 40
OUT
30 40
BI
30 40
BI
30 40
BI
30 40
BI
TO WIFI
100K
5% 1/20W MF 201
2
1
R0736
100K
5% 1/32W
01005
2
SYNC_MASTER=JAMES
PAGE TITLE
1
R0737
100K
5% 1/20W MFMF 201
2
1
R0738
100K
5% 1/20W MF 201
2
AP: I/Os
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
36
IRQ_GYRO_INT2
FORCE_DFU
DFU_STATUS
PM_RADIO_ON
1
R0739
100K
5% 1/20W MF 201
2
DRAWING NUMBER
REVISION
PAGE
SHEET
5
35
5
25
5
37
5
5
31
SYNC_DATE=N/A
051-8962
A.0.0
7 OF 106
5 OF 42
SIZE
B
A
D
345678
=PPIO_NAND_H4
69
10
J21
J23 J25
J27
J28 J29
J30
K1
D
C
B
A
K3
K5
K7
K8
K10
K12
K14
K16
K18
K20
K22
K24
K26
K30
K31
K32
L1
L2
L3
L4
L7
L9
L11
L13
L15
L17
L19
L21
L23
L25
L28
L29
L30
L31
L32
L33
M1
M3
VSS VSS
M5
M7
M8
M10
M12
M14
M16
M18
M20
M22
M24
M26
M29
M33
N1
N2
N3
N4
N7
N9
N11
N13
N15
N17
N19
N21
N23
N25
N27
N28
P1
P2
P3
P5
P7
P8
P10
P12
P14
P16
P18
P20
P22
P24
P26
R1
U0652
H4P-512MB
BGA
SYM 12 OF 12
SC58940X01-A030
R3
R4
R9
R11
R13
R15
R17
R19
R21
R23
R25
R27
R29
R34
T1
T2
T3
T5
T7
T8
T10
T12
T14
T16
T18
T20
T22
T24
T26
T29
T33
U1
U3
U4
U7
U9
U11
U13
U15
U17
U19
U21
U23
U25
U27
U28
V1
V2
V3
V5
V7
V8
V10
V12
V14
V16
V18
V20
V22
V24
V26
V28
V34
W1
W2
W3
W4
W7
W9
W11
W13
W15
W17
W19
W21
W23
W25
W27
Y3
Y5
Y7
Y8
Y10
Y12
Y14
Y16
Y18
Y20
Y22
Y24
Y29
Y30
F1CE0_L
6
1239
F1CE1_L
6
1239
F1CE2_L
6
1239
F1CE3_L
6
1239
F0CE0_L
6
1239
F0CE1_L
6
1239
F0CE2_L
6
1239
F0CE3_L
6
1239
=PPIO_NAND_H4
69
10
F1CE4_L
6
1239
F1CE5_L
6
1239
F1CE6_L
6
1239
F1CE7_L
6
1239
F0CE4_L
6
1239
F0CE5_L
6
1239
F0CE6_L
6
1239
F0CE7_L
6
1239
H4P-512MB
F0CE0_L
6
1239
OUT
F0CE1_L
6
1239
OUT
F0CE2_L
6
1239
OUT
F0CE3_L
6
1239
OUT
F0CE4_L
6
1239
OUT
F0CE5_L
6
1239
OUT
F0CE6_L
6
1239
OUT
F0CE7_L
6
1239
OUT
F0AD<0>
1239
BI
F0AD<1>
1239
BI
F0AD<2>
1239
BI
F0AD<3>
1239
BI
F0AD<4>
1239
BI
F0AD<5>
1239
BI
F0AD<6>
1239
BI
F0AD<7>
1239
BI
F0ALE
6
1239
OUT
F0CLE
6
1239
OUT
F0WE_L
6
1239
OUT
F0RE_L
6
1239
OUT
F1CE0_L
6
1239
OUT
F1CE1_L
6
1239
OUT
F1CE2_L
6
1239
OUT
F1CE3_L
6
1239
OUT
F1CE4_L
6
1239
OUT
F1CE5_L
6
1239
OUT
F1CE6_L
6
1239
OUT
F1CE7_L
6
1239
OUT
F1AD<0>
1239
BI
F1AD<1>
1239
BI
F1AD<2>
1239
BI
F1AD<3>
1239
BI
F1AD<4>
1239
BI
F1AD<5>
1239
BI
F1AD<6>
1239
BI
F1AD<7>
1239
BI
F1ALE
6
1239
OUT
F1CLE
6
1239
OUT
F1WE_L
6
1239
OUT
F1RE_L
6
1239
OUT
NC_AP_GPIO76
NC_AP_GPIO93
AV20
AW21 AU19
AU20
AV31 AT31
AV32
AU30
AV18 AU18
AT22
AW19 AV21
AU22 AY21
AR20
AT20
AU21 AT19
AV22
AT21
AN22 AY19
AP20 AT18
AN30
AU34 AU33
AP30
AV25
AU23 AW25
AU25 AU24
AV24
AT23 AV23
AP23
AV19
AN23 AN21
AY25
FMI0_CEN0 FMI0_CEN1
FMI0_CEN2
FMI0_CEN3 FMI0_CEN4
FMI0_CEN5
FMI0_CEN6 FMI0_CEN7
FMI0_IO0
FMI0_IO1 FMI0_IO2
FMI0_IO3
FMI0_IO4 FMI0_IO5
FMI0_IO6
FMI0_IO7
FMI0_ALE FMI0_CLE
FMI0_WEN
FMI0_REN FMI0_DQS
FMI1_CEN0
FMI1_CEN1 FMI1_CEN2
FMI1_CEN3
FMI1_CEN4 FMI1_CEN5
FMI1_CEN6
FMI1_CEN7
FMI1_IO0 FMI1_IO1
FMI1_IO2 FMI1_IO3
FMI1_IO4
FMI1_IO5 FMI1_IO6
FMI1_IO7
FMI1_ALE
FMI1_CLE FMI1_WEN
FMI1_REN FMI1_DQS
AA11
AA13
SYM 4 OF 12
GROUP 3
3.3V
GROUP 2
GROUP 3
3.3V
GROUP 2
AA15
AA17
AA19
1
2
1
2
U0652
VSS
AA21
AA23
R0832
100K
5% 1/32W MF 01005
R0860
100K
5% 1/32W MF 01005
GROUP 2GROUP 2
GROUP 5
GROUP 2GROUP 2
GROUP 4
GROUP 5
GROUP 4
AA25
AA29
R0836
1
100K
5% 1/32W MF 01005
2
R0861
1
100K
5% 1/32W MF 01005
2
BGA
AB1
AB6
FMI2_CEN0 FMI2_CEN1
FMI2_CEN2
FMI2_CEN3 FMI2_CEN4
FMI2_CEN5
FMI2_CEN6 FMI2_CEN7
FMI2_IO0
FMI2_IO1 FMI2_IO2
FMI2_IO3
FMI2_IO4 FMI2_IO5
FMI2_IO6
FMI2_IO7
FMI2_ALE FMI2_CLE
FMI2_WEN
FMI2_REN FMI2_DQS
FMI3_CEN0
FMI3_CEN1 FMI3_CEN2
FMI3_CEN3
FMI3_CEN4 FMI3_CEN5
FMI3_CEN6
FMI3_CEN7
FMI3_IO0 FMI3_IO1
FMI3_IO2 FMI3_IO3
FMI3_IO4
FMI3_IO5 FMI3_IO6
FMI3_IO7
FMI3_ALE
FMI3_CLE FMI3_WEN
FMI3_REN FMI3_DQS
AB8
R0833
1
100K
5% 1/32W MF 01005
2
R0862
1
100K
5% 1/32W MF 01005
2
AY26
AU26
AW26
AV26 AP34
AL32 AK31
AM32
AY29
AR30 AU29
AV28
AY28 AW30
AW28
AU28
AW27
AU27
AV27 AY27
AV30
AT30
AP31 AU31
AU32
AN34 AM33
AM34 AN33
AP33
AL31
AR34 AN32
AM31
AN31 AR32
AP32
AT32 AT34
AT33
AR31 AR33
R0828
1
100K
5% 1/32W MF 01005
2
R0863
1
100K
5% 1/32W MF 01005
2
R0831
1
100K
5% 1/32W MF 01005
2
R0864
1
100K
5% 1/32W MF 01005
2
NC_F2CE0_L NC_F2CE1_L NC_F2CE2_L NC_F2CE3_L
GRAPE_FW_DNLD_EN_L
NC_F2AD<0> NC_F2AD<1> NC_F2AD<2> NC_F2AD<3> NC_F2AD<4> NC_F2AD<5> NC_F2AD<6> NC_F2AD<7>
NC_F2ALE NC_F2CLE NC_F2WE_L NC_F2RE_L
NC_AP_GPIO_110
NC_F3CE0_L NC_F3CE1_L NC_F3CE2_L NC_F3CE3_L
NC_AP_GPIO_147
NC_F3AD<0> NC_F3AD<1> NC_F3AD<2> NC_F3AD<3> NC_F3AD<4> NC_F3AD<5> NC_F3AD<6> NC_F3AD<7>
NC_F3ALE NC_F3CLE NC_F3WE_L NC_F3RE_L
NC_AP_GPIO_135
87 5 4 21
R0825
R0834
1
1
100K
100K
5%
5%
1/32W
1/32W
MF
MF
01005
01005
2
2
R0866
R0865
1
1
100K
100K
5%
5%
1/32W
1/32W
MF
MF
01005
01005
2
2
TP_GPIO_SD_CTRL
RST_GRAPE_L
R0827
1
100K
5% 1/32W MF 01005
2
R0867
1
100K
5% 1/32W MF 01005
2
17
OUT
17
OUT
TP_RST_SD_CTRL_L
TP_CD_SD_CTRL_L
36
10
RST_MLC_L
1
R0878
100K
5% 1/32W MF 01005
2
PM_MLC_PWR_EN
=PPIO_NAND_H4
69
F0WE_L
6
1239
F0RE_L
6
1239
F1WE_L
6
1239
F1RE_L
6
1239
F0ALE
6
1239
F0CLE
6
1239
F1ALE
6
1239
F1CLE
6
1239
OUT
OUT
21
R0800
R0801
R0802
1
100K
5% 1/32W MF 01005
2
R0810
1
100K
5% 1/32W MF
2
14
36
SYNC_MASTER=JAMES
PAGE TITLE
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
1
1
100K
5% 1/32W MF 01005
2
2
R0811
1
100K
5% 1/32W MF 0100501005
2
AP: NAND
100K
5% 1/32W MF 01005
R0812
1
100K
5% 1/32W MF 01005
2
R0803
1
100K
5% 1/32W MF 01005
2
R0813
1
100K
5% 1/32W MF 01005
2
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
8 OF 106
SHEET
6 OF 42
SIZE
D
C
B
A
D
345678
MIN_NECK_MIDTH SHOULD BE 0.2MM
=PP3V0_IO_H4
9
32
D
=PP3V0_VIDEO_H4
7
32
1
2
240-OHM-0.2A-0.8-OHM
=PP3V0_VIDEO_H4
7
32
C
0.1UF
6.3V
1
10%
2
X5R 201
C0956
12
DAC_AP_VREF
R0950
6.34K
1/20W
201
C0951
1UF
10%
6.3V CERM 402
FL0910
0201
DAC_AP_IREF
1
1%
MF
2
1
C0952
0.01UF
10%
6.3V
2
X5R 01005
VOLTAGE=1.8V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
DAC_AP_COMP_FTR
TP_DP_AP_ANALOG_TEST
NOTE: 0.6V ANALOG REF
AP_DP_R_BIAS
0.01UF
6.3V
01005
1
10%
2
X5R
C0950
NOSTUFF
1
C0955
0.1UF
10%
6.3V
2
X5R 201
DAC_AP_COMP
1
R0920
4.99K
1% 1/32W MF 01005
2
J34
K34
H33
H34
1
C0954
0.01UF
10%
6.3V
2
X5R 01005
L27
DAC_AVDD30A
21MA
DAC_VREF
DAC_IREF
DAC_COMP
DP_PAD_DC_TP
DP_PAD_R_BIAS
DAC_AVSS30A
DAC_AVSS30A
M27
K27
K29
DAC_AVDD30D
6MA
<= 5MA
SC58940X01-A030
DAC_AVSS30D
K28
B
VOLTAGE=1.8V MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
10
PP_AP_DP_AVDD_AUX
PP_DP_PAD_AVDD0
PP_DP_PAD_AVDD1
E29
D30
H31
DP_PAD_AVDD0
DP_PAD_AVDD1
63MA 63MA
DP_PAD_AVDD_AUX
SYM 6 OF 12
U0652
H4P-512MB
BGA
DP_PAD_AVSS_AUX
DP_PAD_AVSS1
DP_PAD_AVSS0
D29
C30
G31
1
C0927
0.22UF
20%
6.3V
2
X5R 402
D31
DP_PAD_AVDDP0
5MA
2MA
DP_PAD_AUXP
DP_PAD_AUXN
DP_PAD_TX0P DP_PAD_TX0N
DP_PAD_TX1P
DP_PAD_TX1N
DP_PAD_AVSSP0
C31
1
2
G32
J31
DP_PAD_DVDD
DP_PAD_AVDDX
1.2MA
DAC_OUT3 DAC_OUT2
DAC_OUT1
DP_HPD
DP_PAD_DVSS
DP_PAD_AVSSX
H32
J32
L34J33
M34 N34
1
2
C0926
0.22UF
20%
6.3V X5R X5R 402
10
10
R32
G34
F34
D34
C34
A32 A31
1
R0955
200
1% 1/20W MF 201
2
C0925
0.22UF
20%
6.3V
402
1
2
1
R0956
200
2
1
C0924
2
=PP1V1_DPORT_H4
C0909
0.1UF
10%
6.3V X5R 201
1
1% 1/20W MF 201
2
R0910
0
12
5%
1/20W
32
MF
201
DAC_AP_OUT3 DAC_AP_OUT2
DAC_AP_OUT1
56PF
5%
6.3V NP0-C0G 01005
DP_AP_HPD
DP_AP_AUX_P
DP_AP_AUX_N
DP_AP_TX_P<0> DP_AP_TX_N<0>
DP_AP_TX_P<1>
DP_AP_TX_N<1>
R0957
200
1% 1/20W MF
NOTE: PLACE R0955-57 NEAR U0652
201
1
C0923
56PF
5%
6.3V
2
NP0-C0G 01005
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
BI
BI
=PP1V8_DPORT_H4
YIN
11 40
CVBSIN
11 40
CIN
11 40
13
13 40
13 40
10 13 40
10 13 40
10 13 40
10 13 40
32
REAR CAMERA
=PP1V1_MIPI_H4
32
1
2
2740
IN
2740
IN
2740
OUT
2740
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1440
OUT
1
C0930
1UF
10%
6.3V CERM 402
MIPI0C_AP_DATA_P<0>
MIPI0C_AP_DATA_N<0>
MIPI0C_AP_CLK_P MIPI0C_AP_CLK_N
MIPID_AP_DATA_P<0>
MIPID_AP_DATA_N<0>
MIPID_AP_DATA_P<1>
MIPID_AP_DATA_N<1>
MIPID_AP_DATA_P<2> MIPID_AP_DATA_N<2>
MIPID_AP_DATA_P<3>
MIPID_AP_DATA_N<3>
MIPID_AP_CLK_P MIPID_AP_CLK_N
C0908
0.1UF
10%
6.3V
2
X5R 201
NC_AP_GPIO184
NC_MIPI0C_AP_DATA_P<1>
NC_MIPI0C_AP_DATA_N<1>
NC_MIPI0C_AP_DATA_P<2>
NC_MIPI0C_AP_DATA_N<2>
NC_MIPI0C_AP_DATA_P<3>
NC_MIPI0C_AP_DATA_N<3>
1
C0903
0.1UF
10%
6.3V
2
X5R 201
AA26
AW10 AY10
AW11
AY11
AW13
AY13
AW14
AY14
AW12
AY12
AW5 AY5
AW6
AY6
AW8 AY8
AW9
AY9
AW7
AY7
32
=PP1V8_MIPI_H4
AP10
MIPI_VSYNC
MIPI0C_DPDATA0
MIPI0C_DNDATA0
MIPI0C_DPDATA1
MIPI0C_DNDATA1
MIPI0C_DPDATA2
MIPI0C_DNDATA2
MIPI0C_DPDATA3
MIPI0C_DNDATA3
MIPI0C_DPCLK MIPI0C_DNCLK
MIPI0D_DPDATA0
MIPI0D_DNDATA0
MIPI0D_DPDATA1 MIPI0D_DNDATA1
MIPI0D_DPDATA2
MIPI0D_DNDATA2
MIPI0D_DPDATA3
MIPI0D_DNDATA3
MIPI0D_DPCLK MIPI0D_DNCLK
1
C0907
0.1UF
10%
6.3V
2
X5R 201
AP11
AP13
AP14
MIPI_VDD11
28MA
SC58940X01-A030
AP15
AP16
AP17
AP18
SYM 5 OF 12
GROUP 5
U0652
H4P-512MB
MIPI_VSS
AR12
2MA ???
BGA
AN13
AN15
MIPI0D_VDD18
MIPI1D_VDD18
VOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
VOLTAGE=0.4V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
PP_AP_MIPI1D_0P4V
AR11
AR15
MIPI0D_VREG_0P4V
MIPI1D_VREG_0P4V
ISP0_FLASH
ISP0_PRE_FLASH
ISP0_SCL ISP0_SDA
ISP1_FLASH
ISP1_PRE_FLASH
ISP1_SCL
ISP1_SDA
SENSOR0_CLK
SENSOR0_RST
SENSOR1_CLK SENSOR1_RST
MIPI1C_DPDATA0
MIPI1C_DNDATA0
MIPI1C_DPDATA1 MIPI1C_DNDATA1
MIPI1C_DPCLK
MIPI1C_DNCLK
PP_AP_MIPI0D_0P4V
21
=PP1V8_H4
45
AG31
AG29 AE26
AC29
AJ32
AG28 AC31
AF27
AA33
Y26
AA34 Y33
AW15
AY15
AW17
NC_MIPI1C_AP_DATA_P<1>
AY17
NC_MIPI1C_AP_DATA_N<1>
AW16
AY16
101332
ISP_AP_0_SCL
7
2539
ISP_AP_0_SDA
7
2539
ISP_AP_1_SCL
7
2639
ISP_AP_1_SDA
7
2639
1
C0902
2.2NF
10% 10V
2
X5R 201
1
C0920
2.2NF
10% 10V
2
X5R 201
NC_AP_GPIO153
NC_AP_GPIO152
ISP_AP_0_SCL ISP_AP_0_SDA
NC_AP_GPIO155
NC_AP_GPIO154
ISP_AP_1_SCL ISP_AP_1_SDA
CLK_CAM_RF_R
CLK_CAM_FF_R
MIPI1C_AP_DATA_P<0>
MIPI1C_AP_DATA_N<0>
MIPI1C_AP_CLK_P MIPI1C_AP_CLK_N
1
R0930
4.7K
5% 1/32W MF 01005
2
7
25 39
OUT
7
25 39
BI
7
26 39
OUT
7
26 39
BI
R0900
12
22
R0940
12
22
OUT
OUT
1
R0931
4.7K
5% 1/32W MF 01005
2
REAR CAMERA
FRONT CAMERA
CLK_CAM_RF
PM_REAR_CAM_SHUTDOWN
CLK_CAM_FF
PM_FRONT_CAM_SHUTDOWN
26 40
IN
26 40
IN
FRONT CAMERA
26 40
26 40
1
2
R0932
1.00K
5% 1/32W MF 01005
OUT
OUT
OUT
OUT
27 39
25
26 39
26
1
R0933
1.00K
5% 1/32W MF 01005
2
D
C
B
AN12
AP12
AR14
AR16
AR17
AR18
A
SYNC_MASTER=JAMES
PAGE TITLE
AP: TV,DP,MIPI
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
87 5 4 21
36
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
9 OF 106
SHEET
7 OF 42
SIZE
A
D
345678
21
=PP1V2_S2R_H4
1
R1005
2.21K
1% 1/32W MF 01005
2
1
R1006
2.21K
1%
=PP1V2_VDDQ_H4
8
32
1/32W MF 01005
2
1
R1053
1.00K
1% 1/32W MF 01005
2
1
R1054
1.00K
1% 1/32W MF 01005
2
D
8
32
PPVREF_DDR0_CA
NOSTUFF
1
C1002
0.01UF
10%
6.3V
2
X5R
01005
PPVREF_DDR0_DQ
NOSTUFF
1
C1054
0.01UF
10%
6.3V
2
X5R
01005
8
39
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
8
39
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
C
C1008
10UF
6.3V
=PP1V8_S2R_H4
32
B
8
32
=PP1V2_VDDQ_H4
A
C1027
56PF
6.3V
NP0-C0G
01005
NOSTUFF
1
5%
2
87 5 4 21
32
1
20%
2
X5R 603
C1014
10UF
C1023
10UF
6.3V
=PP1V2_S2R_H4
8
32
=PP1V2_VDDQ_H4
8
32
=PP1V2_S2R_H4
8
C1009
4.3UF
X5R-CERM
1
20%
6.3V 2
X5R 603
1
20%
2
X5R 603
1
R1051
2.21K
1% 1/32W MF 01005
2
0.22UF
1
2
1UF
10%
6.3V CERM
402
20%
6.3V X5R
0201
C1024
4.3UF
X5R-CERM
6.3V
0201
C1004
C1010
1
2
1
2
20%
4V
0610
20%
X5R
NOSTUFF
1
0.01UF
10%
6.3V
2
X5R
01005
NOSTUFF
1
0.01UF
10%
6.3V
2
X5R
01005
20%
6.3V X5R
0201
1UF
10%
6.3V CERM
402
1
2
1
2
C1052
C1056
1
R1052
2.21K
1% 1/32W MF 01005
2
1
R1055
1.00K
1% 1/32W MF 01005
2
1
R1056
1.00K
1% 1/32W MF 01005
2
(DDR IMPEDANCE CONTROL)
20%
4V
0610
C1015
C1019
0.22UF
C1029
0.22UF
PPVREF_DDR1_CA
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
PPVREF_DDR1_DQ
VOLTAGE=0.6V
MIN_NECK_WIDTH=0.2MM MIN_LINE_WIDTH=0.3MM
NET_SPACING_TYPE=VREF MAX_NECK_LENGTH=3 MM
1
C1005
0.22UF
6.3V
2
0201
1
C1011
1UF
6.3V
2
CERM
C1016
1UF
10%
6.3V CERM
402
C1020
0.22UF
20%
6.3V X5R
0201
C1030
1
0.22UF
20%
6.3V 2
X5R
0201
20%
X5R
10%
402
1
2
1
2
8
39
8
39
R1001
12
12
R1000
1
C1006
0.22UF
2
C1012
1
0.01UF
2
C1017
0.01UF
C1021
0.22UF
C1031
0.22UF
20%
6.3V X5R
0201
240
240
6.3V
01005
0201
6.3V
0201
10%
X5R
20%
X5R
20%
X5R
10% 10V X5R 201
1
2
8
32
1%
1/20WMF201
1/20W1%201
1
0.22UF
2
1
2
1
0.01UF
2
1
2
C1026
0.01UF
=PP1V2_S2R_H4
C1000
0.22UF
20%
6.3V X5R
0201
PPVREF_DDR0_CA
8
39
PPVREF_DDR1_CA
8
39
PPVREF_DDR1_DQ
8
39
PPVREF_DDR0_DQ
8
39
MF
1
C1007
20%
6.3V 2
X5R
0201
1
C1013
56PF
5%
6.3V 2
NP0-C0G
01005
NOSTUFF
1
C1018
10%
6.3V 2
X5R
01005
1
C1022
56PF
5%
6.3V6.3V 2
NP0-C0G
01005
NOSTUFF
1
10%
6.3V 2
X5R
01005
1
2
C1001
0.22UF
6.3V
0201
DDR0_ZQ
DDR1_ZQ
=PP1V2_VDDIOD_H4
32
1
C1032
10UF
20%
6.3V 2
X5R 603
1
20%
2
X5R
H11
DDR0_VDDQ_CKE
R8
DDR1_VDDQ_CKE
AY23
DDR0_VREF_CA
AE34
DDR1_VREF_CA
AA1
DDR1_VREF_DQ
A25
DDR0_VREF_DQ
AY18
DDR0_ZQ
AK34
DDR1_ZQ
AD33
AH33 AW20
AW24
VDDCA
80MA
AW29
W33
A24
AA2
AF33 AK33
AL1
AW22 AW31
VDD2
B4
320MA
B5
B25
F33 T34
Y1
A4
A5 AB2
AL2
AL33
AW18
VDD1
AW32
40MA
B26
E33
U33
AC2 AG2
AK2
AN2 AT2
AW3
B3
B6
B8 B11
B14
B16 B19
B21
B24 B27
VDDQ
B31
500MA
(VDDQ = VDDIOD: DON’T DOUBLE COUNT)
D2
D33
G2 G33
K2
K33
M2
N33
R2 R33
U2
Y2
U0652
BGA
H4P-512MB
<1MA
<1MA
SYM 7 OF 12
SC58940X01-A030
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36 VSS_37
VSS_38
VSS_39
VSS
VSS
VSS
VSS
AB10 AB12
AB14
AB16
AB18
AB20
AB22 AB24
AB29
AC1 AC5
AC9
AC11 AC13
AC15
AC17
AC19 AC21
AC23
AC25 AC27
AD2 AD8
AD10
AD12 AD14
AD16
AD18
AD20 AD22
AD24 AD27
AD34
AE5 AE9
AE11
AE13
AE15 AE17
AE19
AE21 AE23
AE25 AE33
AF1
AF5 AF8
AF10
AF12 AF14
AF16
AF18 AF20
AF22 AF24
AF26
AF32 AG9
AG11
AG13 AG15
AG17
AG19 AG21
AG23 AG25
C1036
0.22UF
6.3V
0201
1
20%
2
X5R
C1037
0.22UF
20%
6.3V X5R
0201
=PP1V8_VDDIO18_H4
9
32
C1041
56PF
NP0-C0G
01005
NOSTUFF
C1044
0.22UF
6.3V
0201
6.3V
20%
X5R
1
2
5%
C1038
0.22UF
1
2
1
2
20%
6.3V X5R
0201
C1042
0.22UF
C1045
0.22UF
6.3V
0201
1
2
0201
20%
X5R
C1034
4.3UF
X5R-CERM
0.22UF
20%
X5R
1
2
20%
4V
0610
C1039
6.3V
0201
1
2
1
2
20%
X5R
1
2
C1043
1UF
6.3V6.3V CERM
C1046
1UF
6.3V CERM
C1035
0.22UF
C1040
56PF
NP0-C0G
01005
NOSTUFF
1
10%
2
402
1
10%
2
402
6.3V
0201
6.3V
1
20%
2
X5R
1
5%
2
SYNC_MASTER=JAMES
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
D4
D6 D8
D10
D12 D14
E5
E7 E9
E11
E13 E15
F4 F6
F7
F8 F9
F10
F11 F12
F13
F14 F15
F16 F17
F18
G5 G6
VDDIOD
H4
500MA
H6
(VDDQ = VDDIOD: DON’T DOUBLE COUNT)
J5
J6
K4 K6
L5 L6
M4
M6 N5
N6
P4 P6
R5
R6 T4
T6 U5
U6
V4 V6
W5
W6 Y4
Y6
AA28
AB7
AB28
AC6 AC28
AD28
AE6
AF6
AH6
AN6
VDDIO18
AN7
44MA
AN8
H23
P28
R28
T28
W28
Y28
Apple Inc.
R
U0652
H4P-512MB
BGA
SYM 9 OF 12
SC58940X01-A030
AP: PWR
AM16
AM18 AM20
AM22
AM24 AM26
AM28
AM29 AM30
AN1
AN14 AN16
AN17 AN18
AN19
AN20 AN24
AN25
AN26 AN27
AN28
AN29 AP5
AP6 AP7
AP8
AP9 AP19
VSS
AP21
AP22 AR1
AR5
AR6 AR7
AR8 AR9
AR13
AR19 AR24
AR25
AR26 AR27
AR28
AR29 AT5
AT6 AT7
AT8
AT9 AT10
AT11
AT12 AT13
AT15
AT16
AT17 AT24
AT25 AT26
AT27
AT28 AT29
AU4
AU5
VSS
AU6
AU7
AU8 AU9
AU10 AU11
AU12
AU13
DRAWING NUMBER
051-8962
REVISION
PAGE
10 OF 106
SHEET
8 OF 42
SYNC_DATE=N/A
A.0.0
SIZE
D
C
B
A
D
36
345678
=PPVDD_SOC_H4
32
1
C1100
4.3UF
20%
4V
2
X5R-CERM
0610
NOSTUFF
D
C1108
1
0.22UF
20%
6.3V 2
X5R
0201
C1112
0.22UF
20%
6.3V X5R
0201
1
C
C1117
0.22UF
6.3V
0201
C1121
4.3UF
X5R-CERM
20%
2
X5R
1
20%
4V
2
0610
C1104
56PF
NP0-C0G
1
2
0.22UF
5%
6.3V
01005
C1109
0.22UF
C1113
0.22UF
C1118
6.3V
0201
6.3V
0201
20%
X5R
1
2
6.3V
0201
20%
X5R
20%
X5R
C1101
NOSTUFF
C1105
NP0-C0G
1
2
1
2
1
2
10UF
6.3V
56PF
6.3V
01005
1
20%
2
X5R 603
1
5%
2
C1110
0.22UF
C1114
0.22UF
0.22UF
20%
6.3V X5R
0201
20%
6.3V X5R
0201
C1119
20%
6.3V X5R
0201
C1102
4.3UF
X5R-CERM
0610
NOSTUFF
C1106
56PF
6.3V
NP0-C0G
01005
1
2
1
2
1
2
1
20%
4V
2
1
5%
2
0.22UF
C1115
0.22UF
C1120
0.22UF
C1111
20%
6.3V X5R
0201
20%
6.3V X5R
0201
B
A
87 5 4 21
C1103
4.3UF
X5R-CERM
NOSTUFF
C1107
NP0-C0G
20%
6.3V X5R
0201
1
2
0610
56PF
6.3V
01005
1
2
1
2
1
20%
4V
2
1
5%
2
C1116
0.22UF
6.3V
0201
1
2
6
10
=PPVDD_CPU_H4
32
C1125
10UF
20%
6.3V X5R 603
C1129
56PF
5%
6.3V
NP0-C0G
01005
C1133
0.22UF
20%
6.3V X5R
0201
C1138
0.22UF
20%
6.3V X5R
0201
=PPIO_NAND_H4
C1144
0.22UF
20%
6.3V X5R
0201
=PP3V0_IO_H4
79
32
C1126
4.3UF
X5R-CERM
0610
C1130
56PF
6.3V
NP0-C0G
01005
C1134
0.22UF
6.3V
0201
C1139
0.22UF
6.3V
0201
C1145
0.22UF
6.3V
0201
1UF
10%
6.3V CERM
402
1
20%
4V
2
1
5%
2
1
20%
2
X5R
1
20%
2
X5R
32
1
C1146
20%
X5R
56PF
2
NP0-C0G
NOSTUFF
1
C1181
1UF
10%
6.3V
2
CERM
402
1
C1127
4.3UF
20%
4V
2
X5R-CERM
0610
1
C1131
56PF
5%
6.3V 2
NP0-C0G
01005
1
C1135
0.22UF
20%
6.3V 2
X5R
0201
C1140
1
0.22UF
20%
6.3V 2
X5R
0201
32
=PP1V8_VDDIO18_H4
8
C1150
0.22UF
20%
6.3V X5R
0201
1
C1147
5%
6.3V 2
01005
1
C1182
1UF
10%
6.3V
2
CERM
402
C1136
=PP3V0_IO_H4
79
1
2
1UF
10%
6.3V CERM
402
1
2
1
2
1
2
1
2
1
2
1
2
C1180
C1128
4.3UF
X5R-CERM
0610
C1132
56PF
6.3V
NP0-C0G
01005
0.22UF
6.3V
0201
C1141
0.22UF
6.3V
0201
C1142
0.22UF
6.3V
0201
C1151
0.22UF
1
2
C1160
0.22UF
1
20%
4V
2
1
5%
2
1
20%
2
X5R
1
20%
2
X5R
1
20%
2
X5R
20%
6.3V X5R
0201
C1148
1UF
6.3V CERM
20%
6.3V X5R
0201
0.22UF
NOSTUFF
C1152
56PF
NP0-C0G
01005
C1149
10UF
C1161
0.22UF
6.3V
0201
6.3V
20%
X5R
6.3V
6.3V
0201
1
2
1
5%
2
1
20%
2
X5R 603
1
20%
2
X5R
C1143
1
2
1
10%
2
402
1
2
AA20 AA22
AA24
AB9
AB11
AB13 AB15
AB17
AB19 AB21
AB23
AB25
AC8
AC10 AC12
AC14
AC16 AC18
AC20
AC22 AC24
1
20%
2
X5R
AD9
AD11 AD13
AD15 AD17
AD19
AD21 AD23
AD25
AE8 AE10
AE12
AE14 AE16
AE18 AE20
AE22
AE24
AF9
AF11
AF13 AF15
AF17
AF19 AF21
AF23 AF25
AG8
AG10 AG12
AG14
AG16 AG18
AG20
AG22 AG24
AG26
AH9
AH11
AH13 AH15
AH17
AH19 AH21
AH23
AH25
AJ8
AJ10 AJ12
AJ14
AJ16 AJ18
AJ20
AJ22 AJ24
AJ26
AK9 AK11
AK13 AK15
AK17
AK19 AK21
AK23
AK25
AL8
AL10
AL12 AL14
AL16 AL18
U0652
H4P-512MB
BGA
SYM 10 OF 12
SC58940X01-A030
2100MA
AL20 AL22
AL24 AL26
AM9
AM11 AM13
AM15
AM17 AM19
AM21
AM23 AM25
H9 H13
H15
H17 H19
H21
J8 J10
J12
J14 J16
J18 J20
J22
J24 K9
K11
K13 K15
K17
K19 K21
K23 K25
L8
L10 L12
L14
L16 L18
L20
L22 L24
L26 M9
M11
VDDVDD
M13 M15
M17
M19 M21
M23
M25 N20
N22 N24
N26
P19 P21
P23
P25 P27
R20
R22 R24
R26 T19
T21
T23 T25
T27
U20 U22
U24
U26 V19
V21 V23
V25
V27 W20
W22
W24 W26
Y19
Y21 Y23
Y25
C1137
0.22UF
6.3V
0201
20%
X5R
36
21
AA8 AA10
AA12 AA14
AA16
AA18
N8
N10
N12
N14
N16
N18
P9
P11
P13
P15
P17
R10
R12
R14
R16
R18
T9 T11
T13 T15
VDD_CPU
T17
1900MA
U8 U10
U12
U14 U16
U18
V9 V11
V13 V15
V17
W8 W10
W12
W14 W16
W18
Y9 Y11
Y13 Y15
Y17
G23
G24 U29
VDDIO30
V29
AJ7
AK7
VDDIOD0
AN9
VDDIOD1
10MA
AP24
AP25
AP26 AP27
AP28
VDDIOD2
AR21
24MA
AR22
AR23
AP29
VDDIOD3 AL27 AM27
VDDIOD4
AJ27
AK27
VDDIOD5
AH27
VDDIOD6 AG27
VDDIOD7
SYNC_MASTER=JAMES
PAGE TITLE
U0652
H4P-512MB
BGA
SYM 8 OF 12
SC58940X01-A030
100MA
GPIO[30-39]
9MA
24MA
24MA
24MA
1.8V
UART4
1.8V
FMI[0-2]
3.3V
FMI[0-1]_CEN[4-7]
3.3V
FMI[3]
3.3V
FMI[2-3]_CEN[4-7] SPI3,ISP FLASH NOT USED
SPI1
1MA 1MA
I2C2
3.0V
AP: PWR
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
VSS
VSS
VSS
VSS
VSS
AH5 AH8
AH10 AH12
AH14
AH16 AH18
AH20
AH22 AH24
AH26
AH28 AH34
AJ1 AJ2
AJ6
AJ9 AJ11
AJ13
AJ15 AJ17
AJ19
AJ21 AJ23
AJ25 AJ28
AJ29
AJ30 AJ31
AJ33
AJ34 AK1
AK3
AK4 AK5
AK6 AK8
AK10
AK12 AK14
AK16
AK18 AK20
AK22
AK24 AK26
AK28 AK29
AK30
AK32
AL3 AL4
AL5
AL9
AL11
AL13
AL15
AL17
AL19 AL21
AL23
AL25 AL28
AL29
AL30
AL34 AM7
AM8
AM10
AM12
AM14
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
11 OF 106
SHEET
9 OF 42
SIZE
D
C
B
A
D
345678
21
D
C
BOOT CONFIG ID
BOOT_CONFIG[3] (GPIO29)
BOOT_CONFIG[2] (GPIO28)
BOOT_CONFIG[1] (GPIO25)
BOOT_CONFIG[0] (GPIO18)
BOARD ID
BOARD_ID[3]
BOARD_ID[2]
BOARD_ID[1]
BOARD_ID[0]
BOARD REVISION
AP_GPIO42_BRD_REV2
5
AP_GPIO41_BRD_REV1
5
AP_GPIO40_BRD_REV0
5
=PP1V8_H4
457
101332
BOOT_CONFIG_3
5
BOOT_CONFIG_2
5
BOOT_CONFIG_1
5
BOOT_CONFIG_0
5
BOOT_CONFIG[3-0]
1101
FMI0/1 4/4 CS
1110
FMI0/1 4/4 CS WITH TEST
=PP1V8_H4
101332
457
BOARD_ID_3
BOARD_ID_2_SPI_FLASH_DOUT
5
BOARD_ID_1_SPI_FLASH_DIN
5
BOARD_ID_0_SPI_FLASH_CLK
5
BOARD_ID[3-0]
K93 AP
0100
K93 DEV
0101 0110
K94 AP
0111
K94 DEV
K95 AP
0010 0011
K95 DEV
1
R1207
10K
5% 1/20W MF 201
2
1
R1208
10K
5% 1/20W MF 201
2
1
R1200
10K
5% 1/20W MF 201
2
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
K93-K94
1
R1204
10K
5% 1/32W MF 01005
2
S/W READ FLOW
1. SET GPIO AS INPUT
2. DISABLE PU AND ENABLE PD
3. READ
NOSTUFF
1
R1209
10K
5% 1/20W MF 201
2
K94-K95
1
R1205
10K
5% 1/32W MF 01005
2
1
R1201
10K
5% 1/20W MF 201
2
S/W READ FLOW
K9X_DEV
1
R1206
10K
5% 1/32W MF 01005
2
FMI_TEST
1
R1202
10K
5% 1/20W MF 201
2
FMI_NOTEST
1
R1203
10K
5% 1/32W MF 01005
2
SIGNAL_MODEL=EMPTY NOSTUFF
1
R1250
150
5% 1/20W MF 201
2
DP_TERM_C1250
1
2
PLACEMENT NOTE: NEAR U0652
SIGNAL_MODEL=EMPTY NOSTUFF
1
R1251
150
5% 1/20W MF 201
2
SIGNAL_MODEL=EMPTY NOSTUFF
C1250
100PF
5% 25V CERM 201
DP_AP_TX_P<1>
SIGNAL_MODEL=EMPTY NOSTUFF
1
R1252
150
5% 1/20W MF 201
2
DP_TERM_C1251
1
2
DP_AP_TX_P<0>
DP_AP_TX_N<0>
DP_AP_TX_N<1>
SIGNAL_MODEL=EMPTY NOSTUFF
1
R1253
150
5% 1/20W MF 201
2
SIGNAL_MODEL=EMPTY NOSTUFF
C1251
100PF
5% 25V CERM 201
JTAG
DEVELOPMENT_JTAG_TAP
R1212
0.00
JTAG_DAP
R1210
100
12
AP_JTAG_SEL
JTAG_DAP
R1211
100
12
7
13 40
OUT
7
13 40
OUT
7
13 40
OUT
7
13 40
OUT
JTAG_AP_TRST_L
2-WIRE DAP
DEVELOPMENT_JTAG
JTAG_DAP
39
4
OUT
39
4
10 39
OUT
1039
JTAG_AP_TDO
4
IN
JTAG_AP_TDI
4
OUT
JTAG_AP_TRST_L
4
OUT
SCAN DUMP
DEVELOPMENT_JTAG
DEVELOPMENT_JTAG_TAP
7
PP_AP_DP_AVDD_AUX
MAKE_BASE=TRUE
=PPIO_NAND_H4
69
NOSTUFF
XW0601
NOSTUFF
XW0602
NOSTUFF
XW0603
R1260
100
12
5%
1/32W
MF
01005
SHORT-01005
12
SHORT-01005
12
SHORT-01005
12
12
0%
1/32W
MF
01005
DEVELOPMENT_JTAG_TAP
R1213
0.00
12
0%
1/32W
MF
01005
DEVELOPMENT_JTAG_TAP
R1214
0.00
12
0%
1/32W
MF
01005
PRODUCTION
JTAG_DAP
PP_DP_PAD_AVDD0
PP_DP_PAD_AVDD1
=PP3V3_NAND_H4
AP_TESTMODE
AP_TST_STPCLK
AP_FAST_SCAN_CLK
AP_HOLD_RESET
VIDEO_EMI_C_Y
VIDEO_EMI_Y_PR
VIDEO_EMI_CVBS_PB
7
7
32
4
4
4
4
11 28 40
OUT
IN
IN
11 28 40
11 28 40
D
C
BRD_REV[2-0]
PROTO 1
B
000
001
011
PROTO 2 EVT010
EVT2
DVT100
FOR REFERENCE
BOOT_CONFIG[3:0]
0000 SPI0 0001 SPI3 0010 SPI0 W/TEST 0011 SPI3 W/TEST 0100 FMI0 2CS 0101 FMI0 4CS 0110 FMI0 4CS W/TEST 0111 RESERVED 1000 FMI1 2 CS 1001 FMI1 4 CS 1010 FMI1 4CS W/TEST
1011 RESERVED 1100 FMI0/1 2/2 CS
CURRENT SETTING ->
1101 FMI0/1 4/4 CS
1110 FMI0/1 4/4 CS W/TEST
1111 RESERVED
A
87 5 4 21
S/W READ FLOW
1. SET GPIO AS INPUT
2. ENABLE PU AND DISABLE PD
3. READ
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
23
23
UART_0_RXD
UART_0_TXD
UART_1_CTS_L
UART_1_RTS_L
UART_1_RXD UART_1_TXD
UART_2_RXD UART_2_TXD
UART_3_CTS_L
UART_3_RTS_L
UART_3_RXD
UART_3_TXD
UART_4_CTS_L
UART_4_RTS_L
UART_4_RXD
UART_4_TXD
CHS_SCL
CHS_SDA
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
UART_AP_0_RXD
UART_AP_0_TXD
UART_AP_1_CTS_L
UART_AP_1_RTS_L
UART_AP_1_RXD UART_AP_1_TXD
UART_AP_2_RXD UART_AP_2_TXD
UART_AP_3_CTS_L
UART_AP_3_RTS_L
UART_AP_3_RXD
UART_AP_3_TXD
UART_AP_4_CTS_L
UART_AP_4_RTS_L
UART_AP_4_RXD
UART_AP_4_TXD
I2C0_SCL_1V8
I2C0_SDA_1V8
SYNC_MASTER=JAMES
PAGE TITLE
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
11
IN
11
OUT
31
IN
31
OUT
31
IN
31
OUT
31
IN
31
OUT
30
IN
30
OUT
30
IN
30
OUT
31
IN
31
OUT
31
IN
31
OUT
5
19 35 39
IN
5
19 35 39
OUT
TO DOCK MUX
TO BB USART
TO BB UMTS
TO BT UART
TO GPS UART
AP: MISC & ALIASES
Apple Inc.
R
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
12 OF 106
SHEET
10 OF 42
SIZE
B
A
D
36
345678
21
D
NOTE:
LDO3 PROVIDES 50MA TO BOTH H4P AND U1300
IF THAT’S NOT ENOUGH, STUFF R1371 AND NOSTUFF R1370
=PP3V0_VIDEO_BUF
32
=PP3V0_VIDEO_BUFFER
32
C
YIN
CVBSIN
CIN
R1371
0.00
12
0%
1/32W
MF
01005
NOSTUFF
R1370
0.00
12
0%
1/32W
MF
01005
7
40
IN
7
40
IN
7
40
IN
UART_AP_0_TXD
10
IN
UART_AP_0_RXD
OUT
USB_BB_D_P
3139
BI
USB_BB_D_N USB_FS_D_N
3139
BI
DAC_AP_OUT3
DAC_AP_OUT2
DAC_AP_OUT1
VOLTAGE=3.0V MIN_LINE_WIDTH=0.2MM MIN_NECK_WIDTH=0.1MM NET_SPACING_TYPE=PWR MAX_NECK_LENGTH=3 MM
~15MA
PP3V0_U0900_FILTR
1
C1370
0.1UF
10%
6.3V
2
X5R 201
C1301
C1
C4E2D2
VDH
VDL
VA_1
VA_0
U1300
THS7380IZSYR
UCSP
A3 A2
CH.1_IN
A4 A1
CH.2_IN
B4 B1
CH.3_IN
D4 E4
F3
F4
TX_VLOW RX_VLOW
USB_D+
USB_D-
RX_VHIGH/USB_2D+ TX_VHIGH/USB_2D-
B2
B3
DGNDAGND
D3
CH.1_OUT
CH.2_OUT
CH.3_OUT
E3
VID_EN
USB_1D+
USB_1D-
SEL
1
56PF
5%
6.3V 2
NP0-C0G
01005
PORT_DOCK_VIDEO_AMP_EN
C3
E1 D1
F2
F1
C2
40
40
40
C1300
0.1UF
10%
6.3V X5R 201
BUF_Y_PR
BUF_CVBS_PB
BUF_C_Y
=PP3V2_S2R_USBMUX
1
2
1
R1372
100K
5%
1/32W
MF
01005
2
USB_FS_P_ACC_RX USB_FS_N_ACC_TX
USB_FS_D_P
DOCK_BB_EN
1
R1320
100K
5% 1/32W MF 01005
2
NOTE:
DOCK_BB_EN = 1: DOCK_BB_EN = 0:
32
5
IN
4
BI
4
BI
35
IN
BB USB <-> DOCK SERIAL BB USB <-> H4P FS USB
H4P UART0 <-> DOCK SERIAL
NOTE: PLACE R0960-62 NEAR U0900
JTAG_DAP
R1360
75
12
1%
1/20W
MF
201
JTAG_DAP
R1361
75
12
1%
1/20W
MF
28 39
OUT
28 39 10
39
39
IN
1
R1315
1.00M
5% 1/32W MF 01005
2
201
JTAG_DAP
R1362
75
12
1%
1/20W
MF
201
VIDEO_EMI_Y_PR
VIDEO_EMI_CVBS_PB
VIDEO_EMI_C_Y
10 28 40
OUT
10 28 40
OUT
10 28 40
OUT
B
D
C
B
A
SYNC_MASTER=JAMES
PAGE TITLE
AP: VIDEO BUFFER,BB USB MUXES
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
87 5 4 21
36
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
13 OF 106
SHEET
11 OF 42
SIZE
A
D
345678
21
QTY
PART#
335S0701
PART NUMBER
335S0682 335S0701
335S0790
D
335S0781 335S0701
DESCRIPTION
TOSHIBA 32NM 16GB RAW
1
ALTERNATE FOR PART NUMBER
335S0701
BOM OPTION
16GB_PROD
16GB_PROD
16GB_PROD
REFERENCE DESIGNATOR(S)
U1400
REF DES
COMMENTS:
SAMSUNG 35NM 16GB RAW
U1400
U1400
SAMSUNG 27NM 16GB RAW
U1400
HYNIX 26NM 16GB PPN
BOM OPTION
16GB_PROD
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
32GB FLASH CONFIGURATIONS
1
C1403
82PF
5%
25V
2
CERM
0201
1
C1400
0.1UF
10%
2
X5R 201
1
C1401
0.1UF
10%
6.3V6.3V
2
X5R 201
=PP3V3_NAND
1
C1402
2.2UF
20%
6.3V
2
CERM 402-LF
PART#
335S0701
PART NUMBER
335S0790
12 32
QTY
DESCRIPTION
TOSHIBA 32NM 16GB RAW
2
ALTERNATE FOR PART NUMBER
335S0701335S0682
335S0701
335S0701335S0781
BOM OPTION
32GB_PROD
32GB_PROD
32GB_PROD
REFERENCE DESIGNATOR(S)
U1400,U1410
REF DES
COMMENTS:
SAMSUNG 35NM 16GB RAW
U1400,U1410
SAMSUNG 27NM 16GB RAW
U1400,U1410
U1400,U1410
HYNIX 26NM 16GB PPN
BOM OPTION
32GB_PROD
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
TABLE_5_HEAD
TABLE_5_ITEM
C
B6M6N1
OA8
OB8
OC0
OC8 OD0
OD8
OF0 OF8
G3 G1
H2
J1 J3
L1
K2 N3
L5 N5
K6
L7 J5
J7
H6 G7
A7
IO0_0
IO0_1
IO1_0
IO1_1
IO2_0
IO2_1
IO3_0
IO3_1
IO4_0
IO4_1
IO5_0
IO5_1
IO6_0
IO6_1
IO7_0
IO7_1
INC
INC_VDDI
R
U1400
F0AD<0>
6
1239
BI
F1AD<0>
6
1239
BI
F0AD<1>
6
1239
BI
F1AD<1>
6
1239
BI
F0AD<2>
6
1239
BI
F1AD<2>
6
1239
BI
F0AD<3>
6
1239
BI
F1AD<3>
6
1239
BI
F0AD<4>
6
1239
BI
F1AD<4>
6
1239
BI
F0AD<5>
6
1239
BI
F1AD<5>
6
1239
BI
F0AD<6>
6
1239
BI
F1AD<6>
6
1239
BI
F0AD<7>
6
1239
BI
F1AD<7>
6
1239
BI
R1400
100K
B
12
1/20W
201
12
NAND0_RB
1%
MF
NAND0_VDDL
1
C1404
1UF
10%
6.3V
2
X5R 402
VSS
B2F6L3
OMIT
N7
VCC
VCCQ
C1
ALE0
D2
ALE1
A5
CE0*
LGA
VLGA5-N90
NAND-XXNM-64GX8
CE1*
CE2* CE3*
CE4*
CE5*
CE6*
CE7*
CLE0
CLE1
RE0*
RE1*
R/B0*
R/B1*
WE0*
WE1*
C5
A1 OA0
G5 F2
OB0
OE0
A3 C3
C7
D6
E5 E7
E3
E1
VSSQ
M2
OE8
F0ALE
F1ALE
F0CE0_L F1CE0_L
F0CE1_L
F1CE1_L F0CE4_L
F1CE4_L F0CE5_L
F1CE5_L
F0CLE
F1CLE
F0RE_L F1RE_L
NAND0_RB
F0WE_L
F1WE_L
B6M6N1
OA8
OB8
OC0
OC8 OD0
OD8
OF0 OF8
G3 G1
H2
J1 J3
L1 K2
N3
L5 N5
K6
L7 J5
J7
H6 G7
A7
IO0_0
IO0_1
IO1_0
IO1_1
IO2_0
IO2_1
IO3_0
IO3_1
IO4_0
IO4_1
IO5_0
IO5_1
IO6_0
IO6_1
IO7_0
IO7_1
INC
INC_VDDI
R
U1410
6
12 39
IN
6
12 39
IN
6
39
IN
6
39
IN
6
39
IN
6
39
IN
6
39
IN
6
39
IN
6
39
IN
6
39
IN
6
12 39
IN
6
12 39
IN
6
12 39
IN
6
12 39
IN
12
6
12 39
IN
6
12 39
IN
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
1239
F0AD<0>
6
BI
F1AD<0>
6
BI
F0AD<1>
6
BI
F1AD<1>
6
BI
F0AD<2>
6
BI
F1AD<2>
6
BI
F0AD<3>
6
BI
F1AD<3>
6
BI
F0AD<4>
6
BI
F1AD<4>
6
BI
F0AD<5>
6
BI
F1AD<5>
6
BI
F0AD<6>
6
BI
F1AD<6>
6
BI
F0AD<7>
6
BI
F1AD<7>
6
BI
R1401
100K
12
1/20W
201
12
NAND1_RB
1%
NAND1_VDDL
MF
1
C1414
1UF
10%
6.3V
2
X5R 402
VSS
B2F6L3
64GB FLASH CONFIGURATIONS16GB FLASH CONFIGURATIONS
QTY
PART#
335S0702
PART NUMBER
335S0665 335S0702
335S0791
335S0722
335S0782 335S0702
1
C1413
82PF
5% 25V
2
CERM 0201
OMIT
N7
VCC
VCCQ
C1
ALE0
D2
ALE1
A5
CE0*
LGA
VLGA5-N90
NAND-XXNM-64GX8
M2
VSSQ
OE8
CE1*
CE2* CE3*
CE4*
CE5*
CE6*
CE7*
CLE0
CLE1
RE0*
RE1*
R/B0*
R/B1*
WE0*
WE1*
C5 A1
OA0
G5 F2
OB0
OE0
A3 C3
C7
D6
E5 E7
E3
E1
DESCRIPTION
2
TOSHIBA 32NM 32GB RAW
ALTERNATE FOR PART NUMBER
335S0702
335S0702
1
C1410
0.1UF
10%
6.3V
2
X5R 201
F0ALE
F1ALE
F0CE2_L F1CE2_L
F0CE3_L
F1CE3_L F0CE6_L
F1CE6_L F0CE7_L
F1CE7_L
F0CLE
F1CLE
F0RE_L F1RE_L
NAND1_RB
F0WE_L F1WE_L
BOM OPTION
64GB_PROD
64GB_PROD
64GB_PROD
64GB_PROD
1
2
12
C1411
0.1UF
10%
6.3V X5R 201
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
REFERENCE DESIGNATOR(S)
REF DES
U1400,U1410
U1400,U1410
U1400,U1410
U1400,U1410
1
2
6
12 39
6
12 39
6
39
6
39
6
39
6
39
6
39
6
39
6
39
6
39
6
12 39
6
12 39
6
12 39
6
12 39
6
12 39
6
12 39
U1400,U1410
COMMENTS:
SAMSUNG 35NM 32GB RAW
SAMSUNG 27NM 32GB RAW
SANDISK 32NM 32GB RAW
HYNIX 26NM 32GB PPN
=PP3V3_NAND
C1412
2.2UF
20%
6.3V CERM 402-LF
BOM OPTION
64GB_PROD
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
12 32
TABLE_5_HEAD
TABLE_5_ITEM
D
C
B
A
SYNC_MASTER=JONATHAN
PAGE TITLE
NAND
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
87 5 4 21
36
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
14 OF 106
SHEET
12 OF 42
SIZE
A
D
345678
21
D
D
DISPLAYPORT AC COUPLING
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
12
10% X5R
12
10% X5R
12
10% X5R
12
10% X5R
12
10% X5R
12
10% X5R
6.3V
6.3V
6.3V
6.3V
6.3V
6.3V
DP_EMI_TX_P<0>
201
DP_EMI_TX_N<0>
201
DP_EMI_TX_P<1>
201
DP_EMI_TX_N<1>
201
DP_EMI_AUX_P
201
DP_EMI_AUX_N
201
28 40
OUT
28 40
OUT
28 40
OUT
28 40
OUT
13 28 40
BI
13 28 40
BI
=PP3V0_IO_MISC
1332
DP_EMI_AUX_N
132840
DP_EMI_AUX_P
132840
1
R1720
100K
1% 1/32W MF 01005
2
1
R1723
100K
1% 1/32W MF 01005
2
C
1040
1040
1040
1040
40
40
7
IN
7
IN
7
IN
7
IN
7
BI
7
BI
DP_AP_TX_P<0>
DP_AP_TX_N<0>
DP_AP_TX_P<1>
DP_AP_TX_N<1>
DP_AP_AUX_P
DP_AP_AUX_N
C1702
C1703
C1704
C1705
C1706
C1707
C
DISPLAYPORT HOT PLUG DETECT
=PP3V0_IO_MISC
1332
1
=PP1V8_H4
457
1032
B
R1750
0.00
0%
1/32W
MF
01005
2835
IN
FW_ZENER_PWR
12
DP_BUF_HPD
NOSTUFF
1
R1751
10K
5% 1/32W MF 01005
2
PART NUMBER
1
C1750
0.1UF
10%
6.3V
2
X5R 201
ALTERNATE FOR PART NUMBER
311S0341311S0536
2
1
6
VCC
U1701
74LVC1G07
SOT886
GND
3
BOM OPTION
CRITICAL
YA
4
5
NCNC
REF DES
U1701
A
87 5 4 21
R1731
220K
5% 1/32W MF 01005
2
COMMENTS:
RADAR:8481319
DP_AP_HPD
TABLE_ALT_HEAD
TABLE_ALT_ITEM
36
B
7
OUT
SIZE
A
D
SYNC_MASTER=JAMES
PAGE TITLE
VIDEO: DISPLAY PORT
Apple Inc.
R
NOTICE OF PROPRIETARY PROPERTY:
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
SYNC_DATE=N/A
DRAWING NUMBER
051-8962
REVISION
A.0.0
PAGE
17 OF 106
SHEET
13 OF 42
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