APL3512
Power-Distribution Switches with Soft Start
Features
• 90mΩ High Side MOSFET
• 2A Continuous Current
• Soft-Start Time Programmable by External
Capacitor
• Wide Supply Voltage Range: 2.7V to 5.5V
• Current-Limit and Short-Circuit Protections
• Under-Voltage Lockout Protection
• Reverse Current Blocking when Switch Disabled
• Over-Temperature Protection
• Logic Level Enable Input
APL3512A: Active High
APL3512B: Active Low
• Lead Free and Green Devices Available
(RoHS Compliant)
Applications
• TFT LCD Modules
• Notebook and Desktop Computers
• USB Ports
• High-Side Power Protection Switches
General Description
The APL3512A/B is a power-distribution switch with some
protection functions that can deliver current up to 2A. The
device incorporates a 90mΩ N-channel MOSFET power
switch that is controlled by an enable logic pin and has a
SS pin dedicated to soft-start ramp-up rate control that
can be used in application where the inrush current is
concerned.
The device integrates some protection features, including current-limit protection, short-circuit protection, overtemperature protection, and UVLO. The current-limit and
short-circuit protection can protect down-stream devices
from catastrophic failure by limiting the output current at
current-limit threshold during over-load or short-circuit
events. When V
the current to a lower and safe level. The over-temperature protection function shuts down the N-channel
MOSFET power switch when the junction temperature
rises beyond 140oC and will automatically turns on the
power switch when the temperature drops by 20oC. The
UVLO function keeps the power switch in off state until
there is a valid input voltage present.
The device is available in lead free SOT-23-5, TDFN2x26 and SOP-8 packages with enable active-high(EN) and
active-low(ENB) versions.
drops below VIN-1.5V the devices limit
OUT
Simplified Application Circuit
APL3512A/B
V
IN
EN
Control
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
VIN VOUT
SS
EN/ENB
GND
V
OUT
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APL3512
Pin Configuration
VIN 1
SS 2
GND 3
NC 4
SOP-8
APL3512A
VIN 1
SS 2
GND 3
NC 4
SOP-8
APL3512B
8 VOUT
7 NC
6 EN
5 NC
8 VOUT
7 NC
6 ENB
5 NC
VOUT 1
GND 2
EN 3
VOUT 1
GND 2
ENB 3
SOT-23-5
APL3512A
SOT-23-5
APL3512B
Ordering and Marking Information
APL3512
Assembly Material
Handling Code
Temperature Range
Package Code
EN Function
5 VIN
4 SS
5 VIN
4 SS
Package Code
B : SOT-23-5 K : SOP-8 QB : TDFN2x2-6
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
EN Function
A : Active High B : Active Low
Assembly Material
G : Halogen and Lead Free Device
VIN 1
SS 2 5 NC
GND 3
TDFN2x2-6
APL3512A
VIN 1
SS 2 5 NC
GND 3
TDFN2x2-6
APL3512B
Exposed Pad, connect to large
ground plane for heat dissipation
6 VOUT
4 EN
6 VOUT
4 ENB
APL3512A B: L2AX X - Date Code
APL3512B B: L2BX X - Date Code
APL3512A K:
APL3512B K: XXXXX - Date Code
APL3512A QB: X - Date Code
APL3512B QB: X - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
APL3512A
XXXXX
APL3512B
XXXXX
L12A
X
L12B
X
XXXXX - Date Code
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APL3512
Absolute Maximum Ratings (Note 1)
Symbol Parameter Rating Unit
VIN VIN to GND Voltage -0.3 ~ 6 V
V
VOUT to GND Voltage -0.3 ~ 6 V
OUT
V
, VEN EN, ENB to GND Voltage -0.3 ~ 6 V
ENB
VSS SS to GND Voltage -0.3 ~ 6 V
o
o
o
o
C/W
C
C
C
I
Continuous Output Current Internally Limited A
OUT
TJ Maximum Junction Temperature -40 ~ 150
T
Storage Temperature -65 ~ 150
STG
T
Maximum Lead Soldering Temperature, 10 Seconds 260
SDR
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol Parameter Typical Value Unit
Junction-to-Ambient Resistance in Free Air
θJA
Note 2: θ
is measured with the component mounted on a high effective thermal conductivity test board in free air.
JA
(Note 2)
SOT-23-5
SOP-8
TDFN2x2-6
250
160
225
Recommended Operating Conditions (Note 3)
Symbol
VIN VIN Input Voltage 2.7 ~ 5.5 V
I
OUT Output Current 0 ~2 A
OUT
CSS SS Pin Soft-Start Capacitor
TA Ambient Temperature -40 ~ 85
TJ Junction Temperature -40 ~ 125
Note 3: Refer to the typical application circuit.
Note 4: Attaching a capacitor on SS pin can adjust the V
rate could become internally controlled as if no CSS.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
Parameter Range Unit
(Note 4)
0.3 ~470 nF
soft-start rate. If the CSS is out of the recommended range, the soft-start
OUT
www.anpec.com.tw3
o
C
o
C
APL3512
or SS
Electrical Characteristics
Unless otherwise specified, these specifications apply over VIN=5V, VEN=5V or V
TA=25oC.
Symbol
Parameter Test Conditions
SUPPLY CURRENT
VIN Supply Current
No load, VEN=0V or V
No load, VEN=5V or V
Leakage Current VOUT=GND, VEN=0V or V
Reverse Leakage Current VIN=GND, V
OUT
=5V - - 1
ENB
=0V - 60 100
ENB
ENB
=5V, VEN=0V or V
POWER SWITCH
I
=1.5A, TA=25oC - 90 110
R
DS(ON)
Power Switch On Resistance
OUT
I
=1.5A, TA=-40~85oC - 90 140
OUT
UNDER-VOLTAGE LOCKOUT
VIN UVLO Threshold Voltage VIN rising, TA=-40~85oC 2.3 - 2.65 V
VIN UVLO Hysteresis - 0.2 - V
CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTIONS
I
Current-Limit Threshold VIN=2.7V to 5.5V, TA=-40~85oC 2.5 3.1 4.22 A
LIM
I
Short-Circuit Output Current VIN=2.7V to 5.5V - 0.8 - A
SHORT
SOFT-START CONTROL PIN
SS Current VIN=5V, TA=-40~85oC 1 2 3
VIN=5V, No load, C
=1µF, CSS=10nF,
OUT
TA=-40~85oC
tSS Soft-Start Time
VIN=3.3V, No load, C
TA=-40~85oC
VIN=3.3V, No load, C
=1µF, CSS=10nF,
OUT
=1µF, No C
OUT
tied to VIN, TA=-40~85oC
EN OR ENB INPUT PIN
VIH Input Logic HIGH VIN=2.7V to 5V 2 - - V
VIL Input Logic LOW VIN=2.7V to 5V - - 0.8 V
Input Current - - 1
VOUT Discharge Resistance VEN=0V or V
=5V - 150 -
ENB
OVER-TEMPERATURE PROTECTION (OTP)
TOTP Over-Temperature Threshold TJ rising - 140 -
Over-Temperature Hysteresis - 20 -
=0V and TA=-40~85oC. Typic al values are at
ENB
APL3512A/B
Min. Typ. Max.
=5V - - 1
=5V - - 1
ENB
- 10 - ms
- 6.6 - ms
SS
1 2 3 ms
Unit
µA
µA
µA
µA
mΩ
mΩ
µA
µA
Ω
°C
°C
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Typical Operating Characteristics
Switch On Resistance vs. Junction
Temperature
160
140
(mΩ)
120
DS(on)
VIN=3.3V
100
80
60
40
I
20
Switch On Resistance , R
=1.5A, C
OUT
C
=10µF/X7R
OUT
0
=1µF/X7R,
IN
-50 0 50 100
Junction Temperature (oC)
Supply Current vs. Junction
Temperature
100
V
=5V, R
IN
C
IN =COUT
80
(µA)
CC
60
40
Supply Current, I
20
LOAD
=33µF/Electrolytic
IC Enabled
IC Disabled
VIN=5V
= Open,
150
Switch On Resistance vs. Input
Voltage
130
120
(mΩ)
110
DS(on)
100
90
80
70
I
60
Switch On Resistance, R
50
=1.5A, C
OUT
C
=1µF/X7R, TA=25oC
OUT
2.5 3.0 3.5 4.0 4.5 5.0 5.5
=1µF/X7R,
IN
Input Voltage (V)
Supply Current vs. Input Voltage
80
70
60
(µA)
CC
50
40
R
= Open,
30
20
Supply Current, I
LOAD
C
IN =COUT
10
IC Enabled
=1µF/X7R, TA=25oC
IC Disabled
0
-50 0 50 100
Junction Temperature (oC)
Current-Limit Threshold vs.
Junction Temperature
3.8
3.6
(A)
3.4
LIM
3.2
3.0
2.8
2.6
2.4
Current-Limit Threshold, I
2.2
V
=5V
IN
2.0
-50 0 50 100
Junction Temperature (oC)
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
150
150
00
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
Current-Limit Threshold vs.
Input Voltage
3.8
3.6
(A)
3.4
LIM
3.2
3.0
2.8
2.6
2.4
Current-Limit Threshold, I
2.2
TA =25oC
2.0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage (V)
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APL3512
Typical Operating Characteristics (Cont.)
Short-Circuit Output Current vs.
1.4
(A)
SHORT
TA=25oC
1.2
1.0
0.8
0.6
0.4
0.2
Short-Circuit Output Current, I
0.0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage
Input Voltage (V)
Turn-On Rising Time vs. Junction
Temperature
2.0
V
= 5V, R
IN
C
= 1µF/X7R, C
IN
(ms)
1.5
F
1.0
LOAD
=30Ω,
=33µF/Electrolytic
OUT
Current-Limit Response vs.
Output Peak Current
250
200
150
100
50
Current-Limit Response (µs)
0
0 2 4 6 8 10 12
Output Peak Current (A)
V
IN
VIN UVLO Threshold Voltage vs.
Junction Temperature
3.2
(V)
2.8
VLOC
2.4
2.0
UVLO Rising
UVLO Falling
=5V, TA=25oC
0.5
Turn-On Rising Time, t
0.0
-50 0 50 100
Junction Temperature (oC)
EN Pin Threshold Voltage vs.
2.1
2.0
(V)
1.9
EN
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
EN Pin Threshold Voltage, V
0.9
0.8
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Voltage
EN Rising
R
C
Elctrolytic, TA=25oC
Input Voltage (V)
EN Falling
=50Ω,
LOAD
= C
IN
OUT
=33µF/
150
1.6
1.2
I
=15mA,
UVLO Threshold Voltage, V
IN
V
OUT
C
= 1µF/X7R, C
0.8
IN
-50 0 50 100
OUT
Junction Temperature (oC)
EN Pin Threshold Voltage vs.
Junction Temperature
3.0
(V)
2.5
EN
2.0
1.5
1.0
EN Pin Threshold Voltage, V
V
C
0.5
-50 0 50 100
EN Rising
=5V, R
IN
= C
IN
=50Ω,
LOAD
=33µF/Elctrolytic
OUT
Junction Temperature (oC)
=33µF/Electrolytic
150
EN Falling
150
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Typical Operating Characteristics (Cont.)
SS Current vs. Junction Temperature
3.2
2.8
2.4
(µA)
SS
2.0
1.6
1.2
SS Current, I
0.8
V
=5V
IN
0.4
-50 0 50 100
Junction Temperature (oC)
Turn Off Leakage Current vs.
Junction Temperature
10
V
= 5V, R
IN
C
(µA)
8
LEAK
= C
IN
OUT
6
= 0Ω,
LOAD
=1µF/X7R
150
Output Voltage vs. Output Current
5.0
4.5
4.0
(V)
3.5
OUT
3.0
2.5
2.0
1.5
Output Voltage, V
1.0
0.5
0.0
0 1 2 3 4
Output Current (A)
VIN=5V
VIN=3.3V
TA=25oC
4
2
Turn Off Leakage Current, I
0
-50 0 50 100
Junction Temperature (oC)
150
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Operating Waveforms
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Power On Power Off
V
IN
1
2
3
V
OUT
I
OUT
V
=5V, R
IN
C
=100µF/Electrolytic, SS open
OUT
LOAD
=30Ω, C
CH1: VIN, 2V/Div, DC
CH2: V
CH3: I
, 2V/Div, DC
OUT
, 0.5A/Div, DC
OUT
TIME:5ms/Div
=1µF/MLCC,
IN
V
1
V
2
I
3
V
=5V, R
IN
C
=100µF/Electrolytic, SS open
OUT
LOAD
=30Ω, C
CH1: VIN, 2V/Div, DC
CH2: V
CH3: I
, 2V/Div, DC
OUT
, 0.5A/Div, DC
OUT
TIME:20ms/Div
OUT
OUT
IN
=1µF/MLCC,
IN
Turn On Response Turn Off Response
V
EN
1
V
OUT
2
I
OUT
3
V
=5V, R
IN
C
=100µF/Electrolytic, SS open
OUT
CH1: VEN, 5V/Div, DC
CH2: V
CH3: I
TIME:0.5ms/Div
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
=30Ω, C
LOAD
, 2V/Div, DC
OUT
, 0.5A/Div, DC
OUT
=1µF/MLCC,
IN
1
2
3
V
=5V, R
IN
C
OUT
LOAD
=100µF/Electrolytic, SS open
CH1: VEN, 5V/Div, DC
CH2: V
CH3: I
, 2V/Div, DC
OUT
, 0.5A/Div, DC
OUT
TIME:1ms/Div
V
IN
V
OUT
I
OUT
=30Ω, C
=1µF/MLCC,
IN
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APL3512
Operating Waveforms (Cont.)
The test condition is VIN=5V, TA= 25oC unless otherwise specified.
Soft Start Ramp-up Control Current Limit Response
V
EN
1
CSS=820pF
CSS=3.3nF
CSS=unconnected
or SS tied to V
CSS=4.4nF
IN
CSS=5.6nF
2
CSS=560pF
CSS=330pF
CSS=2.2nF
V
OUT
V
IN
V
OUT
1
2
I
OUT
3
V
=5V, R
IN
C
=33µF/Electrolytic
OUT
LOAD
=30Ω, C
CH1: VEN, 5V/Div, DC
CH2: V
, 2V/Div, DC
OUT
TIME: 0.5ms/Div
Short Circuit Protection
V
OUT
1
2
I
OUT
3
V
=5V, VOUT short to ground,
IN
C
=1µF/MLCC, C
IN
CH1: VIN, 2V/Div, DC
CH2: V
CH3: I
TIME: 100µs/Div
, 2V/Div, DC
OUT
, 20A/Div, DC
OUT
=1µF/MLCC,
IN
V
IN
=33µF/Electrolytic
OUT
V
C
=5V, C
IN
OUT
=1µF/MLCC,
IN
=33µF/Electrolytic
CH1: VIN, 2V/Div, DC
CH2: V
CH3: I
TIME: 2ms/Div
, 2V/Div, DC
OUT
, 1A/Div, DC
OUT
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
tart rate. If
Pin Description
PIN
NO.
SOT-23-5 SOP-8 TDFN2x2-6
1 8 6 VOUT
2 3 3 GND Ground
3 6 4
4 2 2 SS
5 1 1 VIN Power Supply Input. Connect this pin to external DC supply.
- 4, 5, 7
5 NC Internally not connected.
NAME
EN
(APL3512A)
ENB
(APL3512B)
Output Voltage Pin. The output voltage follows the input voltage. When ENB is
high or EN is low the output voltage is discharged by an internal resistor.
Enable Input. Pull this pin to high to enable the device and pull this pin to low to
disable device. The EN pin cannot be left floating.
Enable Input. Pull this pin to high to disable the device and pull this pin to low to
enable device. The ENB pin cannot be left floating.
Soft-Start Control Pin. Connect a capacitor to GND to control the softthe SS pin is left floating or tied to VIN the soft-tart time is 2ms when VIN=5V.
Block Diagram
FUNCTION
VIN
EN/
ENB
UVLO
Charge
Pump
Current
-Limit
Gate Driver and
Control Logic
OTP
Soft-Start
VOUT
SS
GND
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Typical Application Circuit
V
IN
C
IN
1µF
C
SS
10nF
APL3512A/B
VIN VOUT
SS
C
BY
0.1µF
C
OUT
10µF
V
OUT
Controller
EN/ENB
GND
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Function Description
VIN Under-Voltage Lockout (UVLO)
The APL3512A/B power switch is built-in an under-voltage lockout circuit to keep the output shut off until internal
circuitry is operating properly. The UVLO circuit has hysteresis and a de-glitch feature so that it will typically ignore undershoot transients on the input. When input voltage exceeds the UVLO threshold, the output voltage starts
a soft-start to reduce the inrush current.
Power Switch
The power switch is an N-channel MOSFET with a low
R
. The internal power MOSFET does not have the
DS(ON)
body diode. When IC is off, the MOSFET prevents a current flowing from the VOUT back to VIN and VIN to VOUT.
Current-Limit Protection
The APL3512A/B power switch provides the current-limit
protection function. During current-limit, the devices limit
output current at current-limit threshold. For reliable
operation, the device should not be operated in currentlimit for extended period.
Short-Circuit Protection
When the output voltage drops below VIN-1.5V, which is
caused by the over load or short-circuit, the devices limit
the output current down to a safe level. The short circuit
current-limit is us ed to reduce the power dissipation during short-circuit condition. If the junction temperature is
over the thermal shutdown temperature, the device will
enter the thermal shutdown.
V
is the amplitude of input voltage applied to this device,
IN
of which unit is volt.
If the C
is not connected or SS pin is tied to VIN, the soft-
SS
start time is 2ms when VIN=5V.
Enable/Disable
Pull the ENB above 2V, or EN below 0.8V to disable the
device and pull ENB pin below 0.8V or EN above 2V to
enable the device. When the IC is disabled, the supply
current is reduced to less than 1µA. The enable input is
compatible with both TTL and CMOS logic levels. The
EN/ENB pins cannot be left floating.
Over-Temperature Protection
When the junction temperature exceeds 140oC, the internal thermal sense circuit turns off the power FET and
allows the device to cool down. When the device’s junction temperature cools by 20oC, the internal thermal
sense circuit will enable the device, resulting in a pulsed
output during continuous thermal protection. Thermal
protection is designed to protect the IC in the event of
over-temperature conditions. For normal operation, the
junction temperature cannot exceed TJ=+125oC.
Soft-Start
The APLA3512A/B provides an adjustable soft-start circuitry to control rise rate of the output voltage and limit the
current surge during start-up. The soft-start ramp-up rate
is controlled by a capacitor from SS pin to the ground.
Under a specific V
being applied to the APL3512A/B, the
IN
soft start time can be calculated by the following equation:
t
= 0.2 x C
SS
SS
x V
IN
where,
t
is soft-start time of V
SS
rising from 0 to 100%, of which
OUT
unit is second.
C
is the value of the capacitor connected from SS pin to
SS
GND, of which unit is micro-Farad.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
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APL3512
Application Information
Input Capacitor
A 1µF ceramic bypass capacitor from VIN to GND, located
near the APL3512, is strongly recommended to suppress
the ringing during short-circuit fault event. Without the bypass capacitor, the output short may cause sufficient ringing on the input (from supply lead inductance) to damage
internal control circuitry.
Output Capacitor
A low-ESR 10µF MLCC, aluminum electrolytic or tantalum between VOUT and GND is strongly recommended
to reduce the voltage droop during hot-attachment of
downstream peripheral. Higher-value output capacitor is
better when the output load is heavy. Additionally, bypassing the output with a 0.1µF ceramic capacitor improves
the immunity of the device to short-circuit transients.
During soft-start process, the output bulk capacitor draws
inrush current from VIN. If the inrush current reaches
foldback current-limit threshold, namely 0.8A, the output
current will be clamped in 0.8A level. It will take longer to
complete the soft-start process since the soft-start rate
is controlled neither by internal soft-start nor by external
soft-start circuitry. When the C
meets the following
OUT
formula, the soft-start will be controlled by foldback current-limiting:
C
> (0.8xtSS)/V
OUT
IN
Where,
tSS is 1ms when SS is open or tied to VIN, or obtained by
the tss equation, described in the paragraph of Soft-Start
in Functional Desc ription section when C
is used.
SS
If the soft-s tart rate is controlled by the foldback currentlimiting, the soft-start time can be got by the following
equation:
t
SS_Foldback
= (C
x VIN)/0.8
OUT
Soft-Start Capacitor
The APL3512 has a built-in adjustable soft-start c ontrol
for user to set an optimum soft-start time for the application. The s oft-start time can be calculated by the
equation, described in the paragraph of Soft-Start in Functional Description section. Please note that there are minimum and maximum limitations of s oft-start capacitor. If
the value of soft-start capacitor is less than the minimum
limitation or higher than the maximum limitation (please
refer to the Recommended Operating Conditions), the
soft-start time will become internally controlled as if there
is no CSS, tSS=2ms when VIN=5V, for example. If a softstart capacitor is used, please make sure the CSS is in the
recommeded operating range.
Layout Consideration
The PCB layout should be c arefully performed to maximize thermal dissipation and to minimize voltage drop,
droop and EMI. The following guidelines must be
cons idered:
1. Please place the input capacitors near the VIN pin as
clos e as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling highfrequency ripples.
3. Locate APL3512 and output capacitors near the load to
reduce parasitic resistance and inductance for excellent load transient performance.
4. The negative pins of the input and output c apacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep VIN and V
traces as wide and short as possible.
OUT
Recommended Minimum Footprint
0.075
0.1
0.05
0.037
0.02
Unit : Inch
SOT-23-5
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw13
APL3512
Recommended Minimum Footprint
8 7 6 5
6.0
1 2 3 4
0.5
1.3
1.27
Unit : mm
SOP-8
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw14
APL3512
Pack age Information
SOT-23-5
D
e
b c
e1
SEE
VIEW A
E1
E
A
A2A1
L
VIEW A
0.25
GAUGE PLANE
SEATING PLANE
0
MAX.
1.45
0.15
1.30
0.50
0.22
3.10
3.00
1.80
0.60
8
SOT-23-5
MIN.
0.000
0.035
0.003
0.106
0.055
0.012
0
INCHES
MAX.
0.057
0.006
0.051
0.0200.012
0.009
0.122
0.1180.102
0.071
0.037 BSC
0.075 BSC
0.024
8
S
Y
M
B
O
L
A
A1
A2
b
c
D
E
E1
e
e1
L
0
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
MILLIMETERS
MIN.
0.00
0.90
0.30
0.08
2.70
2.60
1.40
0.95 BSC
1.90 BSC
0.30
0
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw15
APL3512
Pack age Information
SOP-8
D
e
S
Y
M
B
O
L
A
A1
A2 1.25
b
c
D
E
E1
e
h
L
MIN. MAX.
0.10
0.31 0.51
0.17 0.25
4.80
5.80
3.80
0.25 0.50
0.40 1.27
SEATING PLANE < 4 mils-T-
SEE VIEW A
E
E1
h X 45
cb
A2
A
A1
VIEW A
SOP-8
MILLIMETERS
1.75
0.25
5.00
6.20
4.00
1.27 BSC 0.050 BSC
L
INCHES
MIN. MAX.
0.004
0.049
0.012 0.020
0.007 0.010
0.189 0.197
0.228 0.244
0.150 0.157
0.010 0.020
0.016 0.050
0.25
GAUGE PLANE
SEATING PLANE
0.069
0.010
0
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
0
8
0
8
www.anpec.com.tw16
APL3512
Pack age Information
TDFN2x2-6
AD
E
b
A1
A3
D2
E2
D2
Pin 1 Corner
e
S
Y
M
B
O
L
A
b
D
E
e
L
MILLIMETERS
MIN. MAX.
0.70
0.00
0.20 REF
0.18 0.30
1.90 2.10
1.00 1.60
1.90 2.10
0.60
0.65 BSC 0.026 BSC
0.30 0.45
0.20K
Note : 1. Followed from JEDEC MO-229 WCCC.
TDFN2x2-6
0.80
0.05
1.00
E2
K
L
INCHES
MIN. MAX.
0.028
0.000
0.008 REF
0.007 0.012
0.075 0.083
0.039 0.063
0.075 0.083
0.024
0.012 0.018
0.008
A1
A3
0.031
0.002
0.039
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw17
APL3512
Carrier Tape & R eel Dimensions
OD0
B0
P0
P2
P1
A
E1
F
W
Application
SOT-23-5
Application
SOP-8
Application
TDFN2x2-6
K0
SECTION A-A
B
A
H
A0
SECTION B-B
OD1
B
T
A
d
T1
A H T1 C d D W E1 F
178.0±2.00 50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
4.0±0.10 4.0±0.10 2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20 3.10±0.20 1.50±0.20
A H T1 C d D W E1 F
330.0±2.00 50 MIN.
12.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
4.0±0.10 8.0±0.10 2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20 5.20±0.20 2.10±0.20
A H T1 C d D W E1 F
178.0±2.00 50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05
P0 P1 P2 D0 D1 T A0 B0 K0
4.0±0.10 4.0±0.10 2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
0.6+0.00
-0.40
2.35+0.20 2.35+0.20 1.30±0.20
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
(mm)
www.anpec.com.tw18
APL3512
Devices Per Unit
Package Type Unit Quantity
SOT-23-5
SOP-8
TQFN2x2-6
Taping Direction Information
SOT-23-5
Tape & Reel 3000
Tape & Reel 2500
Tape & Reel 3000
USER DIRECTION OF FEED
SOP-8
TDFN2x2-6
USER DIRECTION OF FEED
USER DIRECTION OF FEED
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw19
APL3512
Classification Profile
Classification Reflow Profiles
Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly
Preheat & Soak
Temperature min (T
Temperature max (T
Time (T
smin
to T
smax
smin
smax
) (ts)
)
)
Average ramp-up rate
(T
to TP)
smax
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
See Classification Temp in table 1 See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
Average ramp-down rate (Tp to T
smax
)
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max. 3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
20** seconds 30** seconds
6 °C/second max. 6 °C/second max.
6 minutes max. 8 minutes max.
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APL3512
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm 220 °C 220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm 250 °C 245 °C 245 °C
Volume mm3
<350
260 °C 260 °C 260 °C
260 °C 250 °C 245 °C
Volume mm
<350
235 °C 220 °C
Reliability Test Program
Test item Method Description
SOLDERABILITY JESD-22, B102
HOLT JESD-22, A108
PCT JESD-22, A102
TCT JESD-22, A104
HBM MIL-STD-883-3015.7
MM JESD-22, A1 15
Latch-Up JESD 78
3
Volume mm3
350-2000
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Volume mm
≥350
Volume mm3
>2000
3
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright ANPEC Electronics Corp.
Rev. A.6 - Aug., 2012
www.anpec.com.tw21
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