ANPEC APL1582UC-TU, APL1582UC-TR, APL1582GC-TU, APL1582FC-TU, APL1582FC-TR Datasheet

APL1582
DUAL INPUT LOW DROPOUT REGULATOR
Features General Description
••
450mV typ. Dropout at 3A in dual power
••
voltage mode
••
Remote Sense Pin Available
••
••
2% Accuracy Over Temperature Range
••
••
Build-in Over Temperature Protection
••
••
Build-in Current Limit
••
••
5 Pin TO-220, TO-252 and TO-263 Packages
••
••
No Supply Sequencing Problems in Dual
••
Supply Mode
Applications
Microprocessor Supplies
•! Chip Set Supplies
VGA Card Power
LCD Monitor Power
Ordering and Marking Information
APL1582
Handling Cod e Temp. Range Package Cod e
APL1582 F/G/U :
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2003
APL1582 XXXXX
Package Code F : TO-220-5 G : TO-263-5 U : TO-252-5 Temp. Range C : 0 to 70 C Handling Code TU : Tube TR : Tape & Reel
XXXXX - Date Code
°
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APL1582
y
Pin Configuration
5 4 3 2 1
Front View of TO-220-5
Pin Description
PIN
No. Name
1V
SENSE
2ADJ O
3V
4V
OUT
CONTROL
5VINI
I/O Description
I
O
I
V
IN CONTROL
V V
OUT
ADJ V
SENSE
5 4
3 2 1
IN
V
CONTROL
V
OUT
V ADJ
SENSE
V
Front View of TO-252-5/TO-263-5
Positive side of the reference volt age, which all ows remote sens ing to obtain excellent load regulat io n.
Negative side of the reference voltage, which allows to use resistor divider to set an expect output voltage. A small bypass capacitor can be connected from this pin to ground to improve PSRR performance.
Output pin of the regulator, which connects to t he TAB. A m inimum of 10µF capacitor must be connected from this pin to ground to ensure the stability.
Suppl V
pin of the contr ol circuitry, which must be always higher than
OUT
for the device to regulate. (see electrical characteristics)
Power input pin of the regulator, which must be always higher than
OUT
V
for the device to regulate. (see electrical characteristics)
Block Diagram
OUT
IN
V
CONTROL
V
Current
Limit
Thermal
Protection
Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2003
Voltage
Regulation
V
V
ADJ
SENSE
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APL1582
Absolute Maximum Ratings
Symbol Parameter Rating Unit
IN
V
CONTROL
V
JA
Q
D
P
J
T
STG
T
L
T
Electrical Characteristics
Unless otherwise noted these specifications apply over , CIN=1uF , COUT=10uF , TJ=0 to 125°C. Typical values refer to TJ=25°C. VOUT=VSENSE.
Input Voltage 7 V Control Vo ltage 13.2 V Thermal Resistance – Junction to Ambient 62.5 Po w e r D iss ipa t ion Inte rn a lly L imite d W Operating Junction Tem perature Control Section 0 to 125 Power Transistor 0 to 150 Storage Temperature Range -65 to +150 Lead Tem perature (Soldering, 10 second) 260
°C / W
°C
°C °C
Symbol Parameter Test Conditions
V
REF
REG
LINE
REG
LOAD
V
CONTROL-VOUT
VIN-V
OUT
I
LIMIT
I
LMIN
REG
THERMAL
PSRR
I
CONTROL
I
ADJ
Reference Voltage
Line Regulation
Load Regulation (note 1)
V
5.5V , I V
5.5V , I V
3A , V Dropout Voltage (note 2) VIN=2.05V , IO =3A , V Dropout Voltage (note 2) V Current Limit V Minimum Load Current
(note 3)
V
Thermal Regulation 30mS Pulse 0.01 Power Supply Ripple
Rejection Control Pin Current
T
V
V
V Adjust Pin Current V
=2.75 to 12V , VIN=2.05V to
CONTROL
=10mA to 3A , V
O
=2.75V to 12V , VIN=1.75V to
CONTROL
=10mA , V
O
=2.75V , VIN=2.1V , IO =10mA to
CONTROL
CONTROL
CONTROL
CONTROL
J CONTROL
CONTROL ADJ
CONTROL
=0V
ADJ
=2.75V , IO =3A , V =2.75V , VIN=2.05V 3.2 A
=5V , VIN=3.3V , V
=25°C , V
RIPPLE
=5V , VIN=5V , IO=3A , V =2.75V , VIN=2.05V , IO =3A ,
=0V
=2.75V , VIN=2.05V , V
ADJ
=1VPP at 120Hz,
APL1582
MIN TYP MAX
1.225 1.250 1.275 V
3mV
=0V
ADJ
=0V
5mV
=0V 1.10 1.25 V
ADJ
=0V 0.45 V
ADJ
=0V 5 10 mA
ADJ
ADJ
=0V
60 70 dB
33 120 mA
=0V 50 120
ADJ
UNIT
%/W
µA
Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2003
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APL1582
Electrical Characteristics Cont.
Note 1 : Low duty cycle pulse test with Kelvin con­nections are required to maintain data accuracy . Note 2 : Drop-out voltage is defined as the minimum difference between VIN and VOUT required to maintain 1% VOUT regulation .
Application Circuit
5
IN
3.3V
5.0V
GND
V
APL1582
4
CONTROL
V
ADJ
2
R2
125
Note 3 : Minimum load current is defined as the mini­mum current required at the output to maintain VOUT regulation.
3
OUT
V
REF
R1
125
1
SENSE
V
V
-+
2.5V
GND
VOUT = VREF ( 1+ R2 / R1 ) + IADJ * R2R1 is typically in range of 100to 125to satisfy the minimum load current requirement
Copyright ANPEC Electronics Corp. Rev. A.4 - Apr., 2003
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