ANALOG DEVICES W5.0 Utilities Manual

a

W 5.0

a

Loader and Utilities Manual

Revision 2.2, March 2009

Part Number

82-000450-01

Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106

Copyright Information

© 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu­ment may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.

Printed in the USA.

Disclaimer

Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by impli­cation or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark Notice

The Analog Devices logo, VisualDSP++, Blackfin, SHARC, and Tiger­SHARC are registered trademarks of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of
their respective owners.

CONTENTS

PREFACE

Purpose of This Manual ................................................................ xiii

Intended Audience ........................................................................ xiii

Manual Contents ........................................................................... xiv

What’s New in This Manual ........................................................... xiv

Technical or Customer Support ....................................................... xv

Supported Processors ...................................................................... xvi

Product Information ...................................................................... xvi

Analog Devices Web Site .......................................................... xvi

VisualDSP++ Online Documentation ...................................... xvii

Technical Library CD ............................................................. xviii

Notation Conventions .................................................................. xviii

INTRODUCTION

Definition of Terms ...................................................................... 1-2

Program Development Flow .......................................................... 1-7

Compiling and Assembling ...................................................... 1-8

Linking ................................................................................... 1-8

Loading, Splitting, or Both ...................................................... 1-9

VisualDSP++ 5.0 Loader and Utilities Manual iii

CONTENTS

Non-bootable Files Versus Boot-loadable Files ....................... 1-10

Loader Utility Operations ................................................. 1-11

Splitter Utility Operations ................................................ 1-12

Boot Modes ................................................................................ 1-13

No-Boot Mode ..................................................................... 1-13

PROM Boot Mode ............................................................... 1-14

Host Boot Mode ................................................................... 1-14

Boot Kernels .............................................................................. 1-15

Boot Streams .............................................................................. 1-16

File Searches ............................................................................... 1-17

LOADER/SPLITTER FOR ADSP-BF51X/BF52X/BF54X

BLACKFIN PROCESSORS

ADSP-BF51x/BF52x/BF54x Processor Booting ............................. 2-2

ADSP-BF51x/BF52x/BF54x Processor Loader Guide .................... 2-5

Using Blackfin Loader Command Line .................................... 2-6

File Searches ....................................................................... 2-7

File Extensions ................................................................... 2-7

ADSP-BF51x/BF52x/BF54x Blackfin Loader Command-Line

Switches .......................................................................... 2-8

ADSP-BF51x/BF52x/BF54x Multi-DXE Loader Files ........ 2-17

Using VisualDSP++ Loader ................................................... 2-18

Using VisualDSP++ Second-Stage Loader .............................. 2-20

Using VisualDSP++ ROM Splitter ......................................... 2-22

LOADER/SPLITTER FOR ADSP-BF53X/BF561 BLACKFIN

iv VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

PROCESSORS

ADSP-BF53x/BF561 Processor Booting ........................................ 3-2

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/

BF538/BF539 Processor Booting .......................................... 3-3

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor On-Chip Boot ROM .............................. 3-7

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor Boot Streams .......................................... 3-9

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Block Headers and Flags .................................. 3-10

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Initialization Blocks ........................................ 3-13

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 and ADSP-BF535 Processor No-Boot Mode ....... 3-16

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor Memory Ranges ................................... 3-19

ADSP-BF535 Processor Booting ............................................ 3-21

ADSP-BF535 Processor On-Chip Boot ROM .................... 3-23

ADSP-BF535 Processor Second-Stage Loader .................... 3-24

ADSP-BF535 Processor Boot Streams ................................ 3-27

Loader Files Without a Second-Stage Loader .................. 3-28

Loader Files With a Second-Stage Loader ....................... 3-29

Global Headers ............................................................. 3-31

Block Headers and Flags ................................................ 3-32

ADSP-BF535 Processor Memory Ranges ........................... 3-33

Second-Stage Loader Restrictions ................................... 3-34

VisualDSP++ 5.0 Loader and Utilities Manual v

CONTENTS

ADSP-BF561 Processor Booting ............................................ 3-35

ADSP-BF561 Processor On-Chip Boot ROM ................... 3-37

ADSP-BF561 Processor Boot Streams ............................... 3-37

ADSP-BF561 Processor Initialization Blocks ..................... 3-43

ADSP-BF561 Dual-Core Application Management ........... 3-44

ADSP-BF561 Processor Memory Ranges ........................... 3-45

ADSP-BF53x and ADSP-BF561 Multi-Application (Multi-DXE)

Management ...................................................................... 3-46

ADSP-BF531/BF532/BF533/BF534/BF536/BF537 Processor

Compression Support ......................................................... 3-49

Compressed Streams ......................................................... 3-50

Compressed Block Headers ............................................... 3-51

Uncompressed Streams ..................................................... 3-53

Booting Compressed Streams ............................................ 3-54

Decompression Initialization Files ..................................... 3-54

ADSP-BF53x/BF561 Processor Loader Guide ............................. 3-57

Using Blackfin Loader Command Line .................................. 3-58

File Searches ..................................................................... 3-59

File Extensions ................................................................. 3-59

Blackfin Loader Command-Line Switches ......................... 3-60

Using VisualDSP++ Loader ................................................... 3-72

Using VisualDSP++ Compression .......................................... 3-75

Using VisualDSP++ Second-Stage Loader for ADSP-BF535

Processors ........................................................................... 3-76

Using VisualDSP++ ROM Splitter ......................................... 3-78

vi VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

ADSP-BF535 and ADSP-BF531/BF532/BF533/BF534/

BF536/BF537/BF538/BF539 Processor No-Boot Mode .. 3-79

LOADER FOR ADSP-2106X/21160 SHARC PROCESSORS

ADSP-2106x/21160 Processor Booting .......................................... 4-2

Power-Up Booting Process ....................................................... 4-3

Boot Mode Selection ............................................................... 4-5

ADSP-2106x/21160 Boot Modes ............................................. 4-7

EPROM Boot Mode ........................................................... 4-7

Host Boot Mode ............................................................... 4-11

Link Port Boot Mode ........................................................ 4-15

No-Boot Mode ................................................................. 4-16

ADSP-2106x/21160 Boot Kernels ......................................... 4-16

ADSP-2106x/21160 Processor Boot Steams ....................... 4-17

Boot Kernel Modification and Loader Issues ...................... 4-19

ADSP-2106x/21160 Interrupt Vector Table ........................... 4-22

ADSP-2106x/21160 Multi-Application (Multi-DXE) Management

4-23

ADSP-2106x/21160 Processor ID Numbers ...................... 4-24

ADSP-2106x/21160 Processor Loader Guide ............................... 4-25

Using ADSP-2106x/21160 Loader Command Line ................ 4-26

File Searches ..................................................................... 4-27

File Extensions .................................................................. 4-27

ADSP-2106x/21160 Loader Command-Line Switches ....... 4-28

Using VisualDSP++ Interface (Load Page) .............................. 4-32

VisualDSP++ 5.0 Loader and Utilities Manual vii

CONTENTS

LOADER FOR ADSP-21161 SHARC PROCESSORS

ADSP-21161 Processor Booting .................................................... 5-2

Power-Up Booting Process ....................................................... 5-3

Boot Mode Selection ............................................................... 5-4

ADSP-21161 Processor Boot Modes ........................................ 5-5

EPROM Boot Mode ........................................................... 5-5

Host Boot Mode ................................................................. 5-9

Link Port Boot Mode ........................................................ 5-12

SPI Port Boot Mode ......................................................... 5-14

No-Boot Mode ................................................................. 5-16

ADSP-21161 Processor Boot Kernels ..................................... 5-16

ADSP-21161 Processor Boot Streams ................................ 5-17

Boot Kernel Modification and Loader Issues ...................... 5-18

Rebuilding a Boot Kernel File ....................................... 5-18

Rebuilding a Boot Kernel Using Command Lines .......... 5-19

Loader File Issues .......................................................... 5-20

ADSP-21161 Processor Interrupt Vector Table ....................... 5-21

ADSP-21161 Multi-Application (Multi-DXE) Management .. 5-21

Boot From a Single EPROM ............................................. 5-22

Sequential EPROM Boot .................................................. 5-22

Processor ID Numbers ...................................................... 5-23

ADSP-21161 Processor Loader Guide ......................................... 5-24

Using ADSP-21161 Loader Command Line .......................... 5-25

File Searches ..................................................................... 5-27

viii VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

File Extensions .................................................................. 5-27

Loader Command-Line Switches ....................................... 5-28

Using VisualDSP++ Interface (Load Page) .............................. 5-32

LOADER FOR ADSP-2126X/2136X/2137X/2146X SHARC

PROCESSORS

ADSP-2126x/2136x/2137x/2146x Processor Booting .................... 6-2

Power-Up Booting Process ....................................................... 6-3

Boot Mode Selection ............................................................... 6-4

ADSP-2126x/2136x/2137x/2146x Processors Boot Modes ....... 6-5

PROM Boot Mode ............................................................. 6-5

Packing Options for External Memory ............................. 6-7

Packing and Padding Details ............................................ 6-7

SPI Port Boot Modes ........................................................... 6-7

SPI Slave Boot Mode ...................................................... 6-8

SPI Master Boot Modes ................................................. 6-10

Booting From an SPI Flash ............................................ 6-16

Booting From an SPI PROM (16-bit address) ................ 6-16

Booting From an SPI Host Processor ............................. 6-17

Internal Boot Mode .......................................................... 6-17

ADSP-2126x/2136x/2137x/2146x Processors Boot Kernels .... 6-19

Boot Kernel Modification and Loader Issues ...................... 6-20

Rebuilding a Boot Kernel File ........................................ 6-20

Rebuilding a Boot Kernel Using Command Lines .......... 6-21

Loader File Issues .......................................................... 6-21

VisualDSP++ 5.0 Loader and Utilities Manual ix

CONTENTS

ADSP-2126x/2136x/2137x/2146x Processors Interrupt Vector

Table ...................................................................................6-22

ADSP-2126x/2136x/2137x/2146x Processor Boot Streams ..... 6-23

ADSP-2126x/2136x/2137x/2146x Processor Block Tags .... 6-23

INIT_L48 Blocks ......................................................... 6-26

INIT_L16 Blocks ......................................................... 6-27

INIT_L64 Blocks ......................................................... 6-28

FINAL_INIT Blocks .................................................... 6-28

ADSP-2136x/2137x/2146x Multi-Application (Multi-DXE)

Management ...................................................................... 6-33

ADSP-2126x/2136x/2137x/2146x Processors Compression

Support .............................................................................. 6-35

Compressed Streams ......................................................... 6-36

Compressed Block Headers ............................................... 6-37

Uncompressed Streams ..................................................... 6-38

Overlay Compression ....................................................... 6-39

Booting Compressed Streams ............................................ 6-39

Decompression Kernel File ............................................... 6-40

ADSP-2126x/2136x/2137x/2146x Processor Loader Guide ......... 6-41

Using ADSP-2126x/2136x/2137x/2146x Loader Command

Line .................................................................................. 6-42

File Searches ................................................................. 6-43

File Extensions ............................................................. 6-43

Loader Command-Line Switches ................................... 6-44

Using VisualDSP++ Interface (Load Page) .......................... 6-49

x VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

LOADER FOR TIGERSHARC PROCESSORS

TigerSHARC Processor Booting .................................................... 7-2

Boot Type Selection ................................................................. 7-3

TigerSHARC Processor Boot Kernels ....................................... 7-4

Boot Kernel Modification .................................................... 7-5

TigerSHARC Loader Guide .......................................................... 7-5

Using TigerSHARC Loader Command Line ............................. 7-6

File Searches ....................................................................... 7-8

File Extensions .................................................................... 7-8

TigerSHARC Command-Line Switches ............................... 7-9

Using VisualDSP++ Interface (Load Page) .............................. 7-12

SPLITTER FOR SHARC AND TIGERSHARC

PROCESSORS

Splitter Command Line ................................................................. 8-2

File Searches ............................................................................ 8-3

Output File Extensions ............................................................ 8-4

Splitter Command-Line Switches ............................................. 8-5

VisualDSP++ Interface (Split Page) ................................................ 8-9

FILE FORMATS

Source Files .................................................................................. A-1

C/C++ Source Files ................................................................. A-2

Assembly Source Files ............................................................. A-2

Assembly Initialization Data Files ........................................... A-2

VisualDSP++ 5.0 Loader and Utilities Manual xi

CONTENTS

Header Files ............................................................................ A-3

Linker Description Files .......................................................... A-4

Linker Command-Line Files .................................................... A-4

Build Files .................................................................................... A-4

Assembler Object Files ............................................................ A-5

Library Files ............................................................................ A-5

Linker Output Files ................................................................ A-5

Memory Map Files .................................................................. A-6

Loader Output Files in Intel Hex-32 Format ............................ A-6

Loader Output Files in Include Format .................................... A-8

Loader Output Files in Binary Format ..................................... A-9

Output Files in Motorola S-Record Format ............................ A-10

Splitter Output Files in Intel Hex-32 Format ......................... A-12

Splitter Output Files in Byte-Stacked Format ......................... A-12

Splitter Output Files in ASCII Format ................................... A-14

Debugger Files ............................................................................ A-15

Format References ...................................................................... A-16

UTILITIES

hexutil – Hex-32 to S-Record File Converter ................................. B-2

elf2flt – ELF to BFLT File Converter ............................................ B-3

fltdump – BFLT File Dumper ....................................................... B-4

INDEX

xii VisualDSP++ 5.0 Loader and Utilities Manual

PREFACE

Thank you for purchasing Analog Devices, Inc. development software for
Analog Devices embedded processors.

Purpose of This Manual

The VisualDSP++ 5.0 Loader and Utilities Manual contains information
about the loader/splitter program for Analog Devices processors.

The manual describes the loader/splitter operations for these processors
and references information about related development software. It also
provides information about the loader and splitter command-line
interfaces.

Intended Audience

The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. The manual assumes the audience has a
working knowledge of the appropriate processor architecture and instruc­tion set. Programmers who are unfamiliar with Analog Devices processors
can use this manual, but should supplement it with other texts, such as
hardware reference and programming reference manuals, that describe
their target architecture.

VisualDSP++ 5.0 Loader and Utilities Manual xiii

CONTENTS

Manual Contents

The manual contains:

• Chapter 1, “Introduction”

• Chapter 2, “Loader/Splitter for ADSP-BF51x/BF52x/BF54x

Blackfin Processors”

• Chapter 3, “Loader/Splitter for ADSP-BF53x/BF561 Blackfin

Processors”

• Chapter 4, “Loader for ADSP-2106x/21160 SHARC Processors”

• Chapter 5, “Loader for ADSP-21161 SHARC Processors”

• Chapter 6, “Loader for ADSP-2126x/2136x/2137x/2146x SHARC

Processors”

• Chapter 7, “Loader for TigerSHARC Processors”

• Chapter 8, “Splitter for SHARC and TigerSHARC Processors”

• Appendix A, “File Formats”

• Appendix B, “Utilities”

What’s New in This Manual

This revision of the VisualDSP++ 5.0 Loader and Utilities Manual docu-
ments loader and splitter functionality that is new to VisualDSP++ 5.0
and updates (up to update 6), including support for new SHARC
processors.

In addition, modifications and corrections based on errata reports against
the previous revision of the manual have been made.

xiv VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following
ways:

• Visit the Embedded Processing and DSP products Web site at

http://www.analog.com/processors/technical_support

• E-mail tools questions to

[e-mail]

• E-mail processor questions to

[e-mail] (World wide support)
[e-mail] (Europe support)
[e-mail] (China support)

• Phone questions to 1-800-ANALOGD

• Contact your Analog Devices, Inc. local sales office or authorized
distributor

• Send questions by mail to:

Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA

VisualDSP++ 5.0 Loader and Utilities Manual xv

CONTENTS

Supported Processors

Loader and utility programs of VisualDSP++ 5.0 supports the following
Analog Devices, Inc. processors.

• Blackfin® (ADSP-BFxxx)

•SHARC® (ADSP-21xxx)

• TigerSHARC® (ADSP-TSxxx)

The majority of the information in this manual applies to all processors.
For a complete list of processors supported by VisualDSP++ 5.0, refer to
the online Help.

Product Information

Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.

Analog Devices Web Site

The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.

To access a complete technical library for each processor family, go to

http://www.analog.com/processors/technical_library. The manuals

selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.

xvi VisualDSP++ 5.0 Loader and Utilities Manual

CONTENTS

Also note,

MyAnalog.com is a free feature of the Analog Devices Web site

that allows customization of a Web page to display only the latest infor­mation about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals. MyAn-

alog.com

provides access to books, application notes, data sheets, code

examples, and more.

Visit MyAnalog.com to sign up. If you are a registered user, just log on.
Your user name is your e-mail address.

VisualDSP++ Online Documentation

Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documenta­tion. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.

For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.

VisualDSP++ 5.0 Loader and Utilities Manual xvii

CONTENTS

Each documentation file type is described as follows.

File Description

.chm Help system files and manuals in Microsoft help format

.htm or
.html

.pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the

Dinkum Abridged C++ library and FLEXnet License Tools software documenta­tion. Viewing and printing the
Explorer 6.0 (or higher).

.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

.html files requires a browser, such as Internet

Technical Library CD

The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals, Visu­alDSP++ software manuals, and hardware tools manuals for the following
processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and
ADSP-219x.

To order the technical library CD, go to http://www.analog.com/proces-

sors/technical_library, navigate to the manuals page for your

processor, click the request CD check mark, and fill out the order form.

Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.

Notation Conventions

Text conventions used in this manual are identified and described as fol­lows. Additional conventions, which apply only to specific chapters, may
appear throughout this document.

xviii VisualDSP++ 5.0 Loader and Utilities Manual

Example Description

L

a

[

CONTENTS

Close command
(File menu)

{this | that} Alternative required items in syntax descriptions appear within curly

[this | that] Optional items in syntax descriptions appear within brackets and sepa-

[this,…] Optional item lists in syntax descriptions appear within brackets delim-

.SECTION Commands, directives, keywords, and feature names are in text with

filename Non-keyword placeholders appear in text with italic style format.

Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close com­mand appears on the File menu).

brackets and separated by vertical bars; read the example as this or that.
One or the other is required.

rated by vertical bars; read the example as an optional this or that.

ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of

letter gothic font.

Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.

Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...

A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.

this.

War ni ng : Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word War ni ng
appears instead of this symbol.

VisualDSP++ 5.0 Loader and Utilities Manual xix

Notation Conventions

xx VisualDSP++ 5.0 Loader and Utilities Manual

1 INTRODUCTION

The majority of this manual describes the loader utility (or loader) pro­gram as well as the process of loading and splitting, the final phase of the
application development flow.

Most of this chapter applies to all 8-, 16-, and 32-bit processors. Informa­tion specific to a particular processor, or to a particular processor family, is
provided in the following chapter.

• Chapter 2, “Loader/Splitter for ADSP-BF51x/BF52x/BF54x

Blackfin Processors”

• Chapter 3, “Loader/Splitter for ADSP-BF53x/BF561 Blackfin

Processors”

• Chapter 4, “Loader for ADSP-2106x/21160 SHARC Processors”

• Chapter 5, “Loader for ADSP-21161 SHARC Processors”

• Chapter 6, “Loader for ADSP-2126x/2136x/2137x/2146x SHARC

Processors”

• Chapter 7, “Loader for TigerSHARC Processors”

• Chapter 8, “Splitter for SHARC and TigerSHARC Processors”

• Appendix A, “File Formats”

• Appendix B, “Utilities”

VisualDSP++ 5.0 Loader and Utilities Manual 1-1

Definition of Terms

L

The code examples in this manual have been compiled using
VisualDSP++ 5.0. The examples compiled with another version of
VisualDSP++ may result in build errors or different output;
although, the highlighted algorithms stand and should continue to
stand in future releases of VisualDSP++.

Definition of Terms

Loader and Loader Utility

The term loader refers to a loader utility that is part of the VisualDSP++
development tools suite. The loader utility post-processes one or multiple
executable (.dxe) files, extracts segments that have been declared by the

TYPE(RAM) command in a Linker Description File (.ldf), and generates a

loader file (.ldr). Since the .dxe file meets the Executable and Linkable
Format (ELF) standard, the loader utility is often called elfloader utility.
See also “Loader Utility Operations” on page 1-11.

Splitter Utility

The splitter utility is part of the VisualDSP++ development tools suite.
The splitter utility post-processes one or multiple executable (.dxe) files,
extracts segments that have been declared by the TYPE(R0M) command a
Linker Description File (.ldf), and generates a file consisting of processor
instructions (opcodes). If burned into an EPROM or flash memory device
which connects to the target processor’s system bus, the processor can
directly fetch and execute these instructions. See also “Splitter Utility

Operations” on page 1-12.

Splitter and loader jobs can be managed either by separate utility pro­grams or by the same program (see “Non-bootable Files Versus

Boot-loadable Files” on page 1-10). In the later case, the generated output

file may contain code instructions and boot streams.

1-2 VisualDSP++ 5.0 Loader and Utilities Manual

Introduction

Loader File

A loader file is generated by the loader utility. The file typically has the

.ldr extension and is often called an LDR file. Loader files can meet one

of multiple formats. Common formats are Intel hex-32, binary, or ASCII
representation. Regardless of the format, the loader file describes a boot
image, which can be seen as the binary version of the loader file. See also

“Non-bootable Files Versus Boot-loadable Files” on page 1-10.

Loader Command Line

If invoked from a command-line prompt, the loader and splitter utilities
accept numerous control switches to customize the loader file generation.

Loader Property Page

The loader property page is part of the Project Options dialog box of the
VisualDSP++ graphical user interface. The property page is a graphical
tool that assists in composing the loader utility’s command line.

Boot Mode

Most processors support multiple boot modes. A boot mode is determined
by special input pins that are interrogated when the processor awakes from
either a reset or power-down state. See also “Boot Modes” on page 1-13.

Boot Kernel

A boot kernel is software that runs on the target processor. It reads data
from the boot source and interprets the data as defined in the boot stream
format. The boot kernel can reside in an on-chip boot ROM or in an
off-chip ROM device. Often, the kernel has to be pre-booted from the
boot source before it can be executed. In this case, the loader utility puts a
default kernel to the front of the boot image, or, allows the user to specify
a customized kernel. See also “Boot Kernels” on page 1-15.

VisualDSP++ 5.0 Loader and Utilities Manual 1-3

Definition of Terms

Boot ROM

A boot ROM is an on-chip read-only memory that holds the boot kernel
and, in some cases, additional advanced booting routines.

Second-Stage Loader

A second-stage loader is a special boot kernel that extends the default boot­ing mechanisms of the processor. It is typically booted by a first-stage
kernel in a standard boot mode configuration. Afterward, it executes and
boots in the final applications. See also “Boot Kernels” on page 1-15.

Boot Source

A boot source refers to the interface through which the boot data is loaded
as well as to the storage location of a boot image, such as a memory or host
device.

Boot Image

A boot image that can be seen as the binary version of a loader file. Usually,
it has to be stored into a physical memory that is accessible by either the
target processor or its host device. Often it is burned into an EPROM or
downloaded into a flash memory device using the VisualDSP++ Flash Pro­grammer plug-in.

The boot image is organized in a special manner required by the boot ker­nel. This format is called a boot stream. A boot image can contain one or
multiple boot streams. Sometimes the boot kernel itself is part of the boot
image.

Boot Stream

A boot stream is basically a list of boot blocks. It is the data structure that is
processed and interpret by the boot kernel. The VisualDSP++ loader util­ity generates loader files that contain one or multiple boot streams. A boot

1-4 VisualDSP++ 5.0 Loader and Utilities Manual

Introduction

stream often represents one application. However, a linked list of multiple
application-level boot streams is referred to as a boot stream. See also

“Boot Streams” on page 1-16.

Boot Host

A boot host is a processor or programmable logic that feeds the device con­figured in a slave boot mode with a boot image or a boot stream.

Boot Block

Multiple boot blocks form a boot stream. These blocks consist of boot data
that is preceded by a block header. The header instructs the boot kernel
how to interpret the payload data. In some cases, the header may contain
special instructions only. In such blocks, there is likely no payload data
present.

Boot Code

Boot code is used to refer to all boot relevant ROM code. Boot code typi­cally consists of the pre-boot routine and the boot kernel.

Boot Strapping

If the boot process consists of multiple steps, such as pre-loading the boot
kernel or managing second-stage loaders, this is called boot strapping or
boot ROM.

Initialization Code

Initialization code or initcode is part of a boot stream for Blackfin proces­sors and can be seen as a special boot block. While normally all boot
blocks of an application are booted in first and control is passed to the
application afterward, the initialization code executes at boot time. It is
common that an initialization code is booted and executed before any
other boot block. This initialization code can customize the target system
for optimized boot processing.

VisualDSP++ 5.0 Loader and Utilities Manual 1-5

Definition of Terms

Global Header

Some boot kernels expect a boot stream to be headed by a special informa­tion tag. The tag is referred to as a global header.

Callback Routine

Some processors can optionally call a user-defined routine after a boot
block has been loaded and processed. This is referred to as a callback rou-
tine. It provides hooks to implement checksum and decompression
strategies.

Slave Boot

The term slave boot spawns all boot modes where the target processor
functions as a slave. This is typically the case when a host device loads data
into the target processor’s memories. The target processor can wait pas­sively in idle mode or support the host-controlled data transfers actively.
Note that the term host boot usually refers only to boot modes that are
based on so-called host port interfaces.

Master Boot

The term master boot spawns all boot modes where the target processor
functions as master. This is typically the case when the target processor
reads the boot data from parallel or serial memories.

Boot Manager

A boot manager is a firmware that decides what application has to be
booted. An application is usually represented by a VisualDSP++ project
and stored in a .dxe file. The boot manger itself can be managed within an
application

.dxe file, or have its own separate .dxe file. Often, the boot

manager is executed by so-called initialization codes.

In slave boot scenarios, boot management is up to the host device and
does not require special VisualDSP++ support.

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Multi-.dxe Boot

Introduction

A loader file may can contain data of multiple application (
the loader utility was invoked by specifying multiple .dxe files. Either a
boot manager decides what application has to be booted exclusively or,
alternatively, one application can terminate and initiate the next applica­tion to be booted. In some cases, a single application can also consist of
multiple .dxe files.

Next .dxe File Pointer

If a loader file contains multiple applications, some boot stream formats
enable them to be organized as a linked list. The next .dxe pointer (NDP)
is simply a pointer to a location where the next application’s boot stream
resides.

Preboot Routine

A preboot routine is present in the boot ROM of parts that feature OTP
memory on a processor. Preboot reads OTP memory and customizes sev­eral MMR registers based on factory and user instructions, as programmed
to OTP memory. A preboot routine executes prior to the boot kernel.

.dxe) files if

Program Development Flow

Figure 1-1 is a simplified view of the application development flow.

The development flow can be split into three phases:

1. Compiling and Assembling

2. Linking

3. Loading, Splitting, or Both

A brief description of each phase follows.

VisualDSP++ 5.0 Loader and Utilities Manual 1-7

Program Development Flow

SOURCE

FILES

ASSEMBLER

AND/OR

COMPILER

.ASM , .C, .CPP

PROCESSOR

LOADER

AND/OR

SPLITTER

EXTERNAL

MEMORY

BOOTING

UPON

RESET

TARGET SYSTEM

.DOJ

.DXE

.LDR

LINKER

Figure 1-1. Program Development Flow

Compiling and Assembling

Input source files are compiled and assembled to yield object files. Source
files are text files containing C/C++ code, compiler directives, possibly a
mixture of assembly code and directives, and, typically, preprocessor com­mands. The assembler and compiler are documented in the

VisualDSP++ 5.0 Assembler and Preprocessor Manual and
VisualDSP++ 5.0 C/C++ Compiler and Library Manual, which are part of

the online help.

Linking

Under the direction of the linker description file (LDF) and linker set­tings, the linker consumes separately-assembled object and library files to
yield an executable file. If specified, the linker also produces the shared
memory files and overlay files. The linker output (
the ELF standard, an industry-standard format for executable files. The
linker also produces map files and other embedded information
(DWARF-2) used by the debugger.

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.dxe files) conforms to

Introduction

These executable files are not readable by the processor hardware directly.
They are neither supposed to be burned onto an EPROM or flash memory
device. Executable files are intended for VisualDSP++ debugging targets,
such as the simulator or emulator. Refer to the VisualDSP++ 5.0 Linker
and Utilities Manual and online Help for information about linking and
debugging.

Loading, Splitting, or Both

Upon completing the debug cycle, the processor hardware needs to run on
its own, without any debugging tools connected. After power-up, the
processor’s on-chip and off-chip memories need to be initialized. The pro­cess of initializing memories is often referred to as booting. Therefore, the
linker output must be transformed to a format readable by the processor.
This process is handled by the loader and/or splitter utility. The
loader/splitter utility uses the debugged and tested executable files as well
as shared memory and overlay files as inputs to yield a processor-loadable
file.

VisualDSP++ 5.0 includes these loader and splitter utilities:

• elfloader.exe (loader utility) for Blackfin, TigerSHARC, and
SHARC processors. The loader utility for Blackfin processors also
acts as a ROM splitter utility when evoked with the corresponding
switches.

• elfspl21k.exe (ROM splitter utility) for TigerSHARC and
SHARC processors.

VisualDSP++ 5.0 Loader and Utilities Manual 1-9

Program Development Flow

The loader/splitter output is either a boot-loadable or non-bootable file.
The output is meant to be loaded onto the target. There are several ways
to use the output:

• Download the loadable file into the processor’s PROM space on an
EZ-KIT Lite
VisualDSP++ Help for information on the Flash Programmer.

• Use VisualDSP++ to simulate booting in a simulator session (cur­rently supported on the ADSP-21060, ADSP-21061,
ADSP-21065L, ADSP-21160, and ADSP-21161 processors). Load
the loader file and then reset the processor to debug the booting
routines. No hardware is required: just point to the location of the
loader file, letting the simulator to do the rest. You can step
through the boot kernel code as it brings the rest of the code into
memory.

• Store the loader file in an array for a multiprocessor system. A mas­ter (host) processor has the array in its memory, allowing a full
control to reset and load the file into the memory of a slave
processor.

®

board via the Flash Programmer plug-in. Refer to

Non-bootable Files Versus Boot-loadable Files

A non-bootable file executes from an external memory of the processor,
while a boot-loadable file is transported into and executes from an internal
memory of the processor. The boot-loadable file is then programmed into
an external memory device (burned into EPROM) within your target sys­tem. The loader utility outputs loadable files in formats readable by most
EPROM burners, such as Intel hex-32 and Motorola S formats. For
advanced usage, other file formats and boot modes are supported.

See “File Formats” on page A-1.

A non-bootable EPROM image file executes from an external memory of
the processor, bypassing the built-in boot mechanisms. Preparing a
non-bootable EPROM image is called splitting. In most cases (except for

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