ANALOG DEVICES W4.5 Utilities Manual

W 4.5

Loader and Utilities Manual

Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106

Revision 1.0, April 2006

Part Number

82-000450-01

Printed in the USA.

Disclaimer

Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark Notice

The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, Blackfin, the Blackfin logo, SHARC, the SHARC logo, TigerSHARC, the TigerSHARC logo, CROSSCORE, and the CROSSCORE logo are registered trademarks of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of their respective owners.

PREFACE

Purpose of This Manual ................................................................ xiii

Intended Audience ........................................................................ xiii

Manual Contents ........................................................................... xiv

What’s New in This Manual ........................................................... xiv

Technical or Customer Support ....................................................... xv

Supported Processors ...................................................................... xvi

Product Information ..................................................................... xvii

MyAnalog.com ........................................................................ xvii

Processor Product Information ................................................ xviii

Related Documents ................................................................ xviii

Online Technical Documentation ............................................. xix

Accessing Documentation From VisualDSP++ ....................... xx

Accessing Documentation From the Web ............................... xx

Printed Manuals ........................................................................ xx

VisualDSP++ Documentation Set ......................................... xxi

Hardware Tools Manuals ...................................................... xxi

Processor Manuals ................................................................ xxi

Data Sheets .......................................................................... xxi

VisualDSP++ 4.5 Loader and Utilities Manual iii

CONTENTS

Notation Conventions .................................................................. xxii

INTRODUCTION

Definition of Terms ...................................................................... 1-2

Program Development Flow .......................................................... 1-6

Compiling and Assembling ..................................................... 1-7

Linking ................................................................................... 1-7

Loading, Splitting, or Both ...................................................... 1-8

Non-bootable Files Versus Boot-loadable Files ......................... 1-9

Loader Utility Operations ................................................. 1-10

Splitter Utility Operations ................................................ 1-11

Boot Modes ................................................................................ 1-12

No-Boot Mode ..................................................................... 1-12

PROM Boot Mode ............................................................... 1-13

Host Boot Mode ................................................................... 1-13

Boot Kernels .............................................................................. 1-14

Boot Streams .............................................................................. 1-15

File Searches ............................................................................... 1-16

LOADER/SPLITTER FOR BLACKFIN PROCESSORS

Blackfin Processor Booting ............................................................ 2-2

ADSP-BF535 Processor Booting .............................................. 2-2

ADSP-BF535 Processor On-Chip Boot ROM ..................... 2-4

ADSP-BF535 Processor Second-Stage Loader ...................... 2-6

ADSP-BF535 Processor Boot Streams ................................. 2-8

iv VisualDSP++ 4.5 Loader and Utilities Manual

CONTENTS

Loader Files Without a Second-Stage Loader .................... 2-9

Loader Files With a Second-Stage Loader ....................... 2-10

Global Headers ............................................................. 2-12

Blocks, Block Headers, and Flags ................................... 2-13

ADSP-BF535 Processor Memory Ranges ........................... 2-14

Second-Stage Loader Restrictions ................................... 2-15

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/

BF538/BF539 Processor Booting ........................................ 2-16

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor On-Chip Boot ROM ............................ 2-19

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor in SPI Slave Boot Mode ........................ 2-21

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539Processor in SPI Master Boot Mode ...................... 2-23

SPI Memory Detection Routine .................................... 2-25

ADSP-BF534/BF536/BF537 TWI Master Boot Mode

(BMODE = 101) ........................................................... 2-27

ADSP-BF534/BF536/BF537 TWI Slave Boot Mode

(BMODE = 110) ........................................................... 2-29

ADSP-BF534/BF536/BF537 UART Slave Mode Boot via

Master Host (BMODE = 111) ........................................ 2-30

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor Boot Streams ........................................ 2-33

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Blocks, Block Headers, and Flags ..................... 2-33

Initialization Blocks ...................................................... 2-36

VisualDSP++ 4.5 Loader and Utilities Manual v

CONTENTS

ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/

BF539 Processor Memory Ranges ................................... 2-40

ADSP-BF561 and ADSP-BF566 Processor Booting ............... 2-42

ADSP-BF561/BF566 Processor Boot Streams .................... 2-44

ADSP-BF561/BF566 Processor Initialization Blocks .......... 2-49

ADSP-BF561/BF566 Dual-Core Application Management 2-50

ADSP-BF53x and ADSP-BF561/BF566 Multi-Application

(Multi-DXE) Management ................................................. 2-51

ADSP-BF561/BF566 Processor Memory Ranges .................... 2-54

ADSP-BF531/BF532/BF533/BF534/BF536/BF537 Processor

Compression Support ......................................................... 2-55

Compressed Streams ......................................................... 2-56

Compressed Block Headers ............................................... 2-57

Uncompressed Streams ..................................................... 2-59

Booting Compressed Streams ............................................ 2-60

Decompression Initialization Files ..................................... 2-60

Blackfin Processor Loader Guide ................................................. 2-62

Using Blackfin Loader Command Line .................................. 2-62

File Searches ..................................................................... 2-63

File Extensions ................................................................. 2-64

Blackfin Loader Command-Line Switches ......................... 2-65

Using Base Loader ................................................................. 2-73

Using Compression ............................................................... 2-76

Using Second-Stage Loader ................................................... 2-77

Using ROM Splitter .............................................................. 2-79

vi VisualDSP++ 4.5 Loader and Utilities Manual

CONTENTS

ADSP-BF535 and ADSP-BF531/BF532/BF533/BF534/

BF536/BF537/BF538/BF539 Processor No-Boot Mode .. 2-79

LOADER FOR ADSP-2106X/21160 SHARC PROCESSORS

ADSP-2106x/21160 Processor Booting .......................................... 3-2

Power-Up Booting Process ....................................................... 3-3

Boot Mode Selection ............................................................... 3-5

ADSP-2106x/21160 Boot Modes ............................................. 3-7

EPROM Boot Mode ........................................................... 3-7

Host Boot Mode ............................................................... 3-11

Link Port Boot Mode ........................................................ 3-15

No-Boot Mode ................................................................. 3-16

ADSP-2106x/21160 Boot Kernels ......................................... 3-16

ADSP-2106x/21160 Processor Boot Steams ....................... 3-17

Boot Kernel Modification and Loader Issues ...................... 3-19

ADSP-2106x/21160 Interrupt Vector Table ........................... 3-22

ADSP-2106x/21160 Multi-Application (Multi-DXE) Management

3-23

ADSP-2106x/21160 Processor ID Numbers ...................... 3-24

ADSP-2106x/21160 Processor Loader Guide ............................... 3-25

Using ADSP-2106x/21160 Loader Command Line ................ 3-26

File Searches ..................................................................... 3-27

File Extensions .................................................................. 3-27

ADSP-2106x/21160 Loader Command-Line Switches ....... 3-28

Using VisualDSP++ Interface (Load Page) .............................. 3-32

VisualDSP++ 4.5 Loader and Utilities Manual vii

CONTENTS

LOADER FOR ADSP-21161 SHARC PROCESSORS

ADSP-21161 Processor Booting .................................................... 4-2

Power-Up Booting Process ....................................................... 4-3

Boot Mode Selection ............................................................... 4-4

ADSP-21161 Processor Boot Modes ........................................ 4-5

EPROM Boot Mode ........................................................... 4-5

Host Boot Mode ................................................................. 4-9

Link Port Boot Mode ........................................................ 4-12

SPI Port Boot Mode ......................................................... 4-14

No-Boot Mode ................................................................. 4-16

ADSP-21161 Processor Boot Kernels ..................................... 4-16

ADSP-21161 Processor Boot Streams ................................ 4-17

Boot Kernel Modification and Loader Issues ...................... 4-18

Rebuilding a Boot Kernel File ....................................... 4-18

Rebuilding a Boot Kernel Using Command Lines .......... 4-19

Loader File Issues .......................................................... 4-20

ADSP-21161 Processor Interrupt Vector Table ....................... 4-21

ADSP-21161 Multi-Application (Multi-DXE) Management .. 4-21

Boot From a Single EPROM ............................................. 4-22

Sequential EPROM Boot .................................................. 4-22

Processor ID Numbers ...................................................... 4-23

ADSP-21161 Processor Loader Guide ......................................... 4-24

Using ADSP-21161 Loader Command Line .......................... 4-25

File Searches ..................................................................... 4-27

viii VisualDSP++ 4.5 Loader and Utilities Manual

Contents

File Extensions .................................................................. 4-27

Loader Command-Line Switches ....................................... 4-28

Using VisualDSP++ Interface (Load Page) .............................. 4-32

LOADER FOR ADSP-2126X/2136X/2137X SHARC

PROCESSORS

ADSP-2126x/2136x/2137x Processor Booting ............................... 5-2

Power-Up Booting Process ....................................................... 5-3

Boot Mode Selection ............................................................... 5-4

ADSP-2126x/2136x/2137x Processors Boot Modes .................. 5-5

PROM Boot Mode ............................................................. 5-5

Packing Options for External Memory ............................. 5-6

Packing and Padding Details ............................................ 5-8

SPI Port Boot Modes ........................................................... 5-8

SPI Slave Boot Mode ...................................................... 5-9

SPI Master Boot Modes ................................................. 5-10

Booting From an SPI Flash ............................................ 5-16

Booting From an SPI PROM (16-bit address) ................ 5-16

Booting From an SPI Host Processor ............................. 5-17

Internal Boot Mode .......................................................... 5-17

ADSP-2126x/2136x/2137x Processors Boot Kernels ............... 5-19

Boot Kernel Modification and Loader Issues ...................... 5-20

Rebuilding a Boot Kernel File ........................................ 5-20

Rebuilding a Boot Kernel Using Command Lines .......... 5-21

Loader File Issues .......................................................... 5-21

VisualDSP++ 4.5 Loader and Utilities Manual ix

ADSP-2126x/2136x/2137x Processors Interrupt Vector Table 5-22

ADSP-2126x/2136x/2137x Processor Boot Streams ............... 5-23

ADSP-2126x/2136x/2137x Processor Block Tags .............. 5-23

INIT_L48 Blocks ......................................................... 5-26

INIT_L16 Blocks ......................................................... 5-27

INIT_L64 Blocks ......................................................... 5-28

FINAL_INIT Blocks .................................................... 5-29

ADSP-2136x/2137x Multi-Application (Multi-DXE) Management

5-33

ADSP-2126x/2136x/2137x Processors Compression Support . 5-35

Compressed Streams ......................................................... 5-36

Compressed Block Headers ............................................... 5-37

Uncompressed Streams ..................................................... 5-39

Overlay Compression ....................................................... 5-39

Booting Compressed Streams ............................................ 5-39

Decompression Kernel File ............................................... 5-40

ADSP-2126x/2136x/2137x Processor Loader Guide .................... 5-41

Using ADSP-2126x/2136x/2137x Loader Command Line ..... 5-42

File Searches ..................................................................... 5-43

File Extensions ................................................................. 5-43

Loader Command-Line Switches ....................................... 5-44

Using VisualDSP++ Interface (Load Page) ............................. 5-49

LOADER FOR TIGERSHARC PROCESSORS

TigerSHARC Processor Booting .................................................... 6-2

x VisualDSP++ 4.5 Loader and Utilities Manual

Contents

Boot Type Selection ................................................................. 6-3

TigerSHARC Processor Boot Kernels ....................................... 6-4

Boot Kernel Modification .................................................... 6-5

TigerSHARC Loader Guide .......................................................... 6-5

Using TigerSHARC Loader Command Line ............................. 6-6

File Searches ....................................................................... 6-8

File Extensions .................................................................... 6-8

TigerSHARC Command-Line Switches ............................... 6-9

Using VisualDSP++ Interface (Load Page) .............................. 6-12

SPLITTER FOR SHARC AND TIGERSHARC

PROCESSORS

Splitter Command Line ................................................................. 7-2

File Searches ............................................................................ 7-4

Output File Extensions ............................................................ 7-4

Splitter Command-Line Switches ............................................. 7-5

VisualDSP++ Interface (Split Page) ................................................ 7-9

FILE FORMATS

Source Files .................................................................................. A-2

C/C++ Source Files ................................................................. A-2

Assembly Source Files ............................................................. A-3

Assembly Initialization Data Files ........................................... A-3

Header Files ........................................................................... A-4

Linker Description Files ......................................................... A-4

VisualDSP++ 4.5 Loader and Utilities Manual xi

Linker Command-Line Files .................................................... A-4

Build Files .................................................................................... A-5

Assembler Object Files ............................................................ A-5

Library Files ............................................................................ A-6

Linker Output Files ................................................................ A-6

Memory Map Files .................................................................. A-7

Loader Output Files in Intel Hex-32 Format ............................ A-7

Loader Output Files in Include Format .................................. A-10

Loader Output Files in Binary Format ................................... A-11

Output Files in Motorola S-Record Format ............................ A-11

Splitter Output Files in Intel Hex-32 Format ......................... A-13

Splitter Output Files in Byte-Stacked Format ......................... A-14

Splitter Output Files in ASCII Format ................................... A-15

Debugger Files ............................................................................ A-16

Format References ...................................................................... A-17

UTILITIES

hexutil – Hex-32 to S-Record File Converter ................................. B-2

elf2flt – ELF to BFLT File Converter ............................................ B-3

fltdump – BFLT File Dumper ....................................................... B-4

INDEX

xii VisualDSP++ 4.5 Loader and Utilities Manual

PREFACE

Thank you for purchasing VisualDSP++® 4.5, Analog Devices, Inc. development software for digital processing (DSP) applications.

Purpose of This Manual

The VisualDSP++ 4.5 Loader and Utilities Manual contains information about the loader/splitter program for the following Analog Devices, Inc. processors: Blackfin® (ADSP-BF5xx), SHARC® (ADSP-21xxx), and TigerSHARC® (ADSP-TSxxx).

The manual describes the loader/splitter operations for these processors and references information about related development software. It also provides information about the loader and splitter command-line interfaces.

Intended Audience

The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual, but should supplement it with other texts (such as the appropriate hardware reference and programming reference manuals) that describe your target architecture.

VisualDSP++ 4.5 Loader and Utilities Manual xiii

Manual Contents

The manual contains:

• Chapter 1, “Introduction”

• Chapter 2, “Loader/Splitter for Blackfin Processors”

• Chapter 3, “Loader for ADSP-2106x/21160 SHARC Processors”

• Chapter 4, “Loader for ADSP-21161 SHARC Processors”

• Chapter 5, “Loader for ADSP-2126x/2136x/2137x SHARC

Processors”

• Chapter 6, “Loader for TigerSHARC Processors”

• Chapter 7, “Splitter for SHARC and TigerSHARC Processors”

• Appendix A, “File Formats”

• Appendix B, “Utilities”

What’s New in This Manual

Information in this VisualDSP++ 4.5 Loader and Utilities Manual applies to all Analog Devices, Inc. processors listed in “Supported Processors”.

Refer to the product release notes for information on new and updated VisualDSP++ 4.5 features and other product related information.

xiv VisualDSP++ 4.5 Loader and Utilities Manual

Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following ways:

• Visit the Embedded Processing and DSP products Web site at

http://www.analog.com/processors/technicalSupport

• E-mail tools questions to

processor.tools.support@analog.com

• E-mail processor questions to

processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)

• Phone questions to 1-800-ANALOGD

Preface

• Contact your Analog Devices, Inc. local sales office or authorized distributor

• Send questions by mail to:

Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA

VisualDSP++ 4.5 Loader and Utilities Manual xv

Supported Processors

The following is the list of Analog Devices, Inc. processors supported in VisualDSP++ 4.5.

Blackfin (ADSP-BFxxx) Processors

The name “Blackfin” refers to a family of 16-bit, embedded processors. VisualDSP++ currently supports the following Blackfin processors.

ADSP-BF531 ADSP-BF532 (formerly ADSP-21532)

ADSP-BF533 ADSP-BF534

ADSP-BF535 (formerly ADSP-21535) ADSP-BF536

ADSP-BF537 ADSP-BF538

ADSP-BF539 ADSP-BF561

ADSP-BF566 AD6531

AD6532 AD6900

AD6901 AD6902

AD6903

SHARC (ADSP-21xxx) Processors

The name “SHARC” refers to a family of high-performance, 32-bit, floating-point processors that can be used in speech, sound, graphics, and imaging applications. VisualDSP++ currently supports the following SHARC processors.

ADSP-21020 ADSP-21060 ADSP-21061 ADSP-21062

ADSP-21065L ADSP-21160 ADSP-21161 ADSP-21261

ADSP-21262 ADSP-21266 ADSP-21267 ADSP-21362

ADSP-21363 ADSP-21364 ADSP-21365 ADSP-21366

xvi VisualDSP++ 4.5 Loader and Utilities Manual

Preface

ADSP-21367 ADSP-21368 ADSP21369 ADSP-21371

ADSP21375

TigerSHARC (ADSP-TSxxx) Processors

The name “TigerSHARC” refers to a family of floating-point and fixed-point [8-bit, 16-bit, and 32-bit] processors. VisualDSP++ currently supports the following TigerSHARC processors.

ADSP-TS101 ADSP-TS201 ADSP-TS202 ADSP-TS203

Product Information

You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from the printed publications (manuals).

Analog Devices is online at www.analog.com. Our Web site provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.

MyAnalog.com

MyAnalog.com is a free feature of the Analog Devices Web site that allows

customization of a Web page to display only the latest information on products you are interested in. You can also choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more.

Registration

Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as a means to select the information you want to receive.

VisualDSP++ 4.5 Loader and Utilities Manual xvii

Product Information

If you are already a registered user, just log on. Your user name is your e-mail address.

Processor Product Information

For information on embedded processors and DSPs, visit our Web site at

http://www.analog.com/processors, which provides access to technical

publications, data sheets, application notes, product overviews, and product announcements.

You may also obtain additional information about Analog Devices and its products in any of the following ways.

• E-mail questions or requests for information to

processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)

• Fax questions or requests for information to

1-781-461-3010 (North America) +49-89-76903-157 (Europe)

Online Technical Documentation

Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary

VisualDSP++ 4.5 Loader and Utilities Manual xix

.pdf files of most manuals are also provided.

Product Information

Each documentation file type is described as follows.

File Description

.chm Help system files and manuals in Help format

.htm or .html

.pdf VisualDSP++ and processor manuals in Portable Documentation Format (PDF).

Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the Internet Explorer 5.01 (or higher).

Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

.html files requires a browser, such as

Accessing Documentation From VisualDSP++

From the VisualDSP++ environment:

• Access VisualDSP++ online Help from the Help menu’s Contents, Search, and Index commands.

• Open online Help from context-sensitive user interface items (toolbar buttons, menu commands, and windows).

Accessing Documentation From the Web

Download manuals at the following Web site:

http://www.analog.com/processors/resources/technicalLibrary/manuals

Select a processor family and book title. Download archive (.

zip) files, one

for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.

Printed Manuals

For general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.

xx VisualDSP++ 4.5 Loader and Utilities Manual

Preface

VisualDSP++ Documentation Set

To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals may be purchased only as a kit.

If you do not have an account with Analog Devices, you are referred to Analog Devices distributors. For information on our distributors, log onto

http://www.analog.com/salesdir/continent.asp.

Hardware Tools Manuals

To purchase EZ-KIT Lite™ and in-circuit emulator (ICE) manuals, call 1-603-883-2430. The manuals may be ordered by title or by product number located on the back cover of each manual.

Processor Manuals

Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1-800-ANALOGD (1-800-262-5643), or downloaded from the Analog Devices Web site. Manuals may be ordered by title or by product number located on the back cover of each manual.

Data Sheets

All data sheets (preliminary and production) may be downloaded from the Analog Devices Web site. Only production (final) data sheets (Rev. 0, A, B, C, and so on) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643); they also can be downloaded from the Web site.

To have a data sheet faxed to you, call the Analog Devices Faxback System at 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. If the data sheet you want is not listed, check for it on the Web site.

VisualDSP++ 4.5 Loader and Utilities Manual xxi

Notation Conventions

Text conventions used in this manual are identified and described as follows.

Example Description

{this | that} Alternative required items in syntax descriptions appear within curly

brackets and separated by vertical bars; read the example as this or

that. One or the other is required.

[this | that] Optional items in syntax descriptions appear within brackets and sepa-

rated by vertical bars; read the example as an optional this or that.

[this,…] Optional item lists in syntax descriptions appear within brackets

delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of

.SECTION Commands, directives, keywords, and feature names are in text with

letter gothic font.

this.

filename Non-keyword placeholders appear in text with italic style format.

Note: For correct operation, ... A Note provides supplementary information on a related topic. In the

[

xxii VisualDSP++ 4.5 Loader and Utilities Manual

Additional conventions, which apply only to specific chapters, may appear throughout this document.

online version of this book, the word Note appears instead of this symbol.

Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...

A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol.

Warn in g: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Wa rn in g appears instead of this symbol.

1 INTRODUCTION

The majority of this manual describes the loader utility (or loader) program as well as the process of loading and splitting, the final phase of the application development flow.

Most of this chapter applies to all 8-, 16-, and 32-bit data processors. Information specific to a particular target processor, or to a particular processor family, is provided in the following chapter.

• Chapter 2, “Loader/Splitter for Blackfin Processors”

• Chapter 3, “Loader for ADSP-2106x/21160 SHARC Processors”

• Chapter 4, “Loader for ADSP-21161 SHARC Processors”

• Chapter 5, “Loader for ADSP-2126x/2136x/2137x SHARC

Processors”

• Chapter 6, “Loader for TigerSHARC Processors”

• Chapter 7, “Splitter for SHARC and TigerSHARC Processors”

• Appendix A, “File Formats”

• Appendix B, “Utilities”

VisualDSP++ 4.5 Loader and Utilities Manual 1-1

The code examples in this manual have been compiled using VisualDSP++ 4.5. The examples compiled with another version of VisualDSP++ may result in build errors or different output; although, the highlighted algorithms stand and should continue to stand in future releases of VisualDSP++.

Definition of Terms

Loader and Loader Utility

The term loader refers to a loader utility that is part of the VisualDSP++ development tools suite. The loader utility post-processes one or multiple executable (.dxe) files, extracts segments that have been declared by the

TYPE(RAM) command in a Linker Description File (.ldf), and generates a

loader file (.ldr). Since the .dxe file meets the Executable and Linkable Format (ELF) standard, the loader utility is often called elfloader utility. See also “Loader Utility Operations” on page 1-10.

Splitter Utility

The splitter utility is part of the VisualDSP++ development tools suite. The splitter utility post-processes one or multiple executable (.dxe) files, extracts segments that have been declared by the TYPE(R0M) command a Linker Description File (.ldf), and generates a file consisting of processor instructions (opcodes). If burned into an EPROM or flash memory device which connects to the target processor’s system bus, the processor can directly fetch and execute these instructions. See also “Splitter Utility

Operations” on page 1-11.

Splitter and loader jobs can be managed either by separate utility programs or by the same program (see “Non-bootable Files Versus

Boot-loadable Files” on page 1-9). In the later case, the generated output

file may contain code instructions and boot streams.

Loader File

A loader file is generated by the loader utility. The file typically has the

.ldr extension and is often called an LDR file. Loader files can meet one

of multiple formats. Common formats are Intel-hex, binary, or ASCII representation. Regardless of the format, the loader file describes a boot image, which can be seen as the binary version of the loader file. See also

“Non-bootable Files Versus Boot-loadable Files” on page 1-9.

1-2 VisualDSP++ 4.5 Loader and Utilities Manual

Introduction

Loader Command Line

If invoked from a command-line prompt, the loader and splitter utilities accept numerous control switches to customize the loader file generation.

Loader Property Page

The loader property page is part of the Project Options dialog box of the VisualDSP++ graphical user interface. The property page is a graphical tool that assists in composing the loader utility’s command line.

Boot Mode

Most processors support multiple boot modes. A boot mode is determined by special input pins that are interrogated when the processor awakes from either a reset or power-down state. See also “Boot Modes” on page 1-12.

Boot Kernel

A boot kernel is software that runs on the target processor. It reads data from the boot source and interprets the data as defined in the boot stream format. The boot kernel can reside in an on-chip boot ROM or in an off-chip ROM device. Often, the kernel has to be pre-booted from the boot source before it can be executed. In this case, the loader utility puts a default kernel to the front of the boot image, or, allows the user to specify a customized kernel. See also “Boot Kernels” on page 1-14.

Boot ROM

A boot ROM is an on-chip read-only memory that holds the boot kernel and, in some cases, additional advanced booting routines.

Second-Stage Loader

A second-stage loader is a special boot kernel that extends the default booting mechanisms of the processor. It is typically booted by a first-stage kernel in a standard boot mode configuration. Afterward, it executes and boots in the final applications. See also “Boot Kernels” on page 1-14.

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Definition of Terms

Boot Source

A boot source refers to the interface through which the boot data is loaded as well as to the storage location of a boot image, such as a memory or host device.

Boot Image

A boot image that can be seen as the binary version of a loader file. Usually, it has to be stored into a physical memory that is accessible by either the target processor or its host device. Often it is burned into an EPROM or downloaded into a flash memory device using the VisualDSP++ Flash Programmer plug-in.

The boot image is organized in a special manner required by the boot kernel. This format is called a boot stream. A boot image can contain one or multiple boot streams. Sometimes the boot kernel itself is part of the boot image.

Boot Stream

A boot stream is basically a list of boot blocks. It is the data structure that is processed and interpret by the boot kernel. The VisualDSP++ loader utility generates loader files that contain one or multiple boot streams. A boot stream often represents one application. However, a linked list of multiple application-level boot streams is referred to as a boot stream. See also

“Boot Streams” on page 1-15.

Boot Block

Multiple boot blocks form a boot stream. These blocks consist of boot data that is preceded by a block header. The header instructs the boot kernel how to interpret the payload data. In some cases, the header may contain special instructions only. In such blocks, there is likely no payload data present.

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Introduction

Initialization Code

Initialization code is part of a boot stream and can be seen as a special boot block. While normally all boot blocks of an application are booted in first and control is passed to the application afterward, the initialization code executes at boot time. It is common that an initialization code is booted and executed before any other boot block. This initialization code can customize the target system for optimized boot processing.

Global Header

Some boot kernels expect a boot stream to be headed by a special information tag. The tag is referred to as a global header.

Boot Strapping

If the boot process consists of multiple steps, such as pre-loading the boot kernel or managing second-stage loaders, this is called boot strapping.

Slave Boot

The term slave boot spawns all boot modes where the target processor functions as a slave. This is typically the case when a host device loads data into the target processor’s memories. The target processor can wait passively in idle mode or support the host-controlled data transfers actively. Note that the term host boot usually refers only to boot modes that are based on so-called host port interfaces.

Master Boot

The term master boot spawns all boot modes where the target processor functions as master. This is typically the case when the target processor reads the boot data from parallel or serial memories.

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Program Development Flow

Boot Manager

A boot manager is a firmware that decides what application has to be booted. An application is usually represented by a VisualDSP++ project and stored in a application .dxe file, or have its own separate .dxe file. Often, the boot manager is executed by so-called initialization codes.

In slave boot scenarios, boot management is up to the host device and does not require special VisualDSP++ support.

Multi-.dxe Boot

A loader file may consist of multiple applications if the loader utility was invoked by specifying multiple .dxe files. Either a boot manager decides what application has to be booted exclusively or, alternatively, one application can terminate and initiate the next application to be booted. In some cases, a single application can also consist of multiple .dxe files.

.dxe file. The boot manger itself can be managed within an

Next .dxe File Pointer

If a loader file contains multiple applications, some boot stream formats enable them to be organized as a linked list. The next .dxe pointer or (NDP) is simply a pointer to a location where the next application’s boot stream resides.

Program Development Flow

Figure 1-1 is a simplified view of the application development flow.

The development flow can be split into three phases:

1. “Compiling and Assembling”

2. “Linking”

3. “Loading, Splitting, or Both”

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Introduction

SOURCE

FILES

.ASM, .C, .CP P

ASSEMBLER

AND/OR

COMPILER

PROCESSOR

.DOJ

TARG E T S YSTEM

BOOTING

UPON

RESET

LINKER

EXTERNAL

MEMORY

.DXE

.LDR

LOADER

AND/OR

SPLITTER

Figure 1-1. Program Development Flow

A brief description of each phase follows.

Compiling and Assembling

Input source files are compiled and assembled to yield object files. Source files are text files containing C/C++ code, compiler directives, possibly a mixture of assembly code and directives, and, typically, preprocessor commands. The assembler and compiler are documented in the VisualDSP++

4.5 Assembler and Preprocessor Manual and VisualDSP++ 4.5 C/C++ Compiler and Library Manual, which are part of the online help.

Linking

Under the direction of the linker description file (LDF) and linker settings, the linker consumes separately-assembled object and library files to yield an executable file. If specified, the linker also produces the shared memory files and overlay files. The linker output (.dxe files) conforms to

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Program Development Flow

the ELF standard, an industry-standard format for executable files. The linker also produces map files and other embedded information (DWARF-2) used by the debugger.

These executable files are not readable by the processor hardware directly. They are neither supposed to be burned onto an EPROM or flash memory device. Executable files are intended for VisualDSP++ debugging targets, such as the simulator or emulator. Refer to the VisualDSP++ 4.5 Linker and Utilities Manual and online Help for information about linking and debugging.

Loading, Splitting, or Both

Upon completing the debug cycle, the processor hardware needs to run on its own, without any debugging tools connected. After power-up, the processor’s on-chip and off-chip memories need to be initialized. The process of initializing memories is often referred to as booting. Therefore, the linker output must be transformed to a format readable by the processor. This process is handled by the loader and/or splitter utility. The loader/splitter utility uses the debugged and tested executable files as well as shared memory and overlay files as inputs to yield a processor-loadable file.

VisualDSP++ 4.5 includes these loader and splitter utilities:

elfloader.exe (loader utility) for Blackfin, TigerSHARC, and

• SHARC processors. The loader utility for Blackfin processors also acts as a ROM splitter utility when evoked with the corresponding switches.

• elfspl21k.exe (ROM splitter utility) for TigerSHARC and SHARC processors.

The loader/splitter output is either a boot-loadable or non-bootable file. The output is meant to be loaded onto the target. There are several ways to use the output:

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+ 268 hidden pages

ANALOG DEVICES W4.5 Utilities Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

CONTENTS

PREFACE

Purpose of This Manual

Intended Audience

Manual Contents

What’s New in This Manual

Technical or Customer Support

Supported Processors

Product Information

MyAnalog.com

Processor Product Information

Related Documents

Online Technical Documentation

Accessing Documentation From VisualDSP++

Accessing Documentation From the Web

Printed Manuals

VisualDSP++ Documentation Set

Hardware Tools Manuals

Processor Manuals

Data Sheets

Notation Conventions

1 INTRODUCTION

Definition of Terms

Program Development Flow

Compiling and Assembling

Linking

Loading, Splitting, or Both