ANALOG DEVICES W4.0 Loader Manual
W 4.0
Loader Manual
Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106
Revision 1.0, January 2005
Part Number
82-000420-05
a
a
Copyright Information
© 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written
consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, the VisualDSP logo, Blackfin,
the Blackfin logo, SHARC, the SHARC logo, TigerSHARC, the TigerSHARC logo, Crosscore, the Crosscore logo, and EZ-KIT Lite are
registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ....................................................... xv
Supported Processors ...................................................................... xvi
Product Information ..................................................................... xvii
MyAnalog.com ........................................................................ xvii
Processor Product Information ................................................ xviii
Related Documents ................................................................ xviii
Online Technical Documentation ............................................. xix
Accessing Documentation From VisualDSP++ ....................... xx
Accessing Documentation From Windows ............................. xx
Accessing Documentation From the Web .............................. xxi
Printed Manuals ....................................................................... xxi
VisualDSP++ Documentation Set ......................................... xxi
Hardware Tools Manuals ..................................................... xxii
Processor Manuals ............................................................... xxii
VisualDSP++ 4.0 Loader Manual iii
CONTENTS
Data Sheets ........................................................................ xxii
Notation Conventions ................................................................. xxiii
INTRODUCTION
Program Development Flow .......................................................... 1-2
Compiling and Assembling ..................................................... 1-2
Linking ................................................................................... 1-3
Loading, Splitting, or Both ...................................................... 1-3
Non-bootable Files Versus Boot-loadable Files ......................... 1-4
Loader Operations .............................................................. 1-5
Splitter Operations ............................................................. 1-6
Booting Modes ............................................................................. 1-6
No-Boot Mode ....................................................................... 1-7
PROM Boot Mode ................................................................. 1-7
Host Boot Mode ..................................................................... 1-8
Boot Kernels ................................................................................ 1-8
Loader Tasks ................................................................................. 1-9
Boot Streams .............................................................................. 1-10
File Searches ......................................................................... 1-11
LOADER/SPLITTER FOR BLACKFIN PROCESSORS
Blackfin Processor Booting ............................................................ 2-2
ADSP-BF535 Processor Booting .............................................. 2-2
ADSP-BF535 Processor On-Chip Boot ROM ..................... 2-3
ADSP-BF535 Processor Second-Stage Loader ...................... 2-5
iv VisualDSP++ 4.0 Loader Manual
CONTENTS
ADSP-BF535 Processor Boot Streams .................................. 2-8
Loader Files Without a Second-Stage Loader .................... 2-9
Loader Files With a Second-Stage Loader ....................... 2-11
Global Headers ............................................................. 2-13
Blocks, Block Headers, and Flags ................................... 2-14
ADSP-BF535 Processor Memory Ranges ........................... 2-15
Second-Stage Loader Restrictions ................................... 2-16
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor Booting ........................................ 2-17
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor On-Chip Boot ROM ................ 2-19
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor Boot Streams ............................ 2-21
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Blocks, Block Headers, and Flags ......... 2-21
Initialization Blocks ...................................................... 2-24
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor Memory Ranges ........................ 2-28
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor SPI Slave Mode Boot via
Master Host (BMODE = 10) .......................................... 2-30
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/
BF538/BF539 Processor SPI Master Mode Boot via
SPI Memory (BMODE = 11) ......................................... 2-32
SPI Memory Detection Routine .................................... 2-34
ADSP-BF534/BF536/BF537 Processor Booting ................. 2-35
ADSP-BF561 and ADSP-BF566 Processor Booting ................ 2-37
VisualDSP++ 4.0 Loader Manual v
CONTENTS
ADSP-BF561 Processor Boot Streams ............................... 2-38
ADSP-BF561/BF566 Processor Memory Ranges ............... 2-43
ADSP-BF561/BF566 Processor Initialization Blocks .......... 2-44
ADSP-BF561/BF566 Multiple .DXE Booting ............... 2-45
ADSP-BF53x and ADSP-BF561/BF566 Multiple .DXE
Booting .............................................................................. 2-46
Blackfin Processor Loader Guide ................................................. 2-49
Using the ADSP-BF5xx Blackfin Loader Command Line ....... 2-49
File Searches ..................................................................... 2-50
File Extensions ................................................................. 2-51
Command-Line Switches .................................................. 2-51
Using the Base Loader ........................................................... 2-57
Using the Second-Stage Loader .............................................. 2-59
Using the ROM Splitter ........................................................ 2-62
No-Boot Mode ................................................................. 2-62
LOADER FOR ADSP-TSXXX TIGERSHARC PROCESSORS
ADSP-TSxxx TigerSHARC Processor Booting ............................... 3-2
Boot Type Selection ................................................................ 3-3
Boot Kernels ........................................................................... 3-4
Boot Kernel Modification ................................................... 3-5
TigerSHARC Loader Guide .......................................................... 3-5
Using TigerSHARC Loader Command Line ............................ 3-6
File Searches ....................................................................... 3-8
File Extensions ................................................................... 3-8
vi VisualDSP++ 4.0 Loader Manual
CONTENTS
Command-Line Switches ..................................................... 3-8
Using VisualDSP++ Interface (Load Page) .............................. 3-12
LOADER FOR ADSP-2106X/21160 SHARC PROCESSORS
ADSP-2106x/21160 Processor Booting .......................................... 4-2
Power-Up Booting Process ....................................................... 4-3
Boot Mode Selection ............................................................... 4-5
Boot Types .............................................................................. 4-7
EPROM Booting ................................................................ 4-7
Host Booting .................................................................... 4-11
Link Booting .................................................................... 4-15
No-Boot Mode ................................................................. 4-16
Boot Kernels ......................................................................... 4-16
Blocks and Block Headers ................................................. 4-17
Boot Kernel Modification and Loader Issues ...................... 4-19
Interrupt Vector Table ........................................................... 4-22
Multiprocessor EPROM Booting ........................................... 4-23
Processor ID Numbers ........................................................... 4-24
ADSP-2106x/21160 Processor Loader Guide ............................... 4-25
Using the ADSP-2106x/21160 Loader Command Line .......... 4-26
File Searches ..................................................................... 4-27
File Extensions .................................................................. 4-27
Loader Command-Line Switches ....................................... 4-28
Using the VisualDSP++ Interface (Load Page) ........................ 4-31
VisualDSP++ 4.0 Loader Manual vii
CONTENTS
LOADER FOR ADSP-21161 SHARC PROCESSORS
ADSP-21161 Processor Booting .................................................... 5-2
Power-Up Booting Process ....................................................... 5-3
Boot Mode Selection ............................................................... 5-3
Boot Types .............................................................................. 5-4
EPROM Booting ................................................................ 5-5
Host Booting ...................................................................... 5-9
Link Port Booting ............................................................. 5-12
SPI Port Booting .............................................................. 5-14
No-Boot Mode ................................................................. 5-16
Boot Kernels ......................................................................... 5-16
Blocks and Block Headers ................................................. 5-17
Boot Kernel Modification and Loader Issues .......................... 5-18
Rebuilding a Boot Kernel File ........................................... 5-18
Rebuilding a Boot Kernel Using Command Lines .............. 5-19
Loader File Issues .............................................................. 5-20
Interrupt Vector Table ........................................................... 5-21
Multiprocessor EPROM Booting ........................................... 5-21
Booting From a Single EPROM ........................................ 5-22
Sequential EPROM Booting ............................................. 5-22
Processor ID Numbers ...................................................... 5-23
ADSP-21161 Processor Loader Guide ......................................... 5-24
Using ADSP-21161 Loader Command Line .......................... 5-24
File Searches ..................................................................... 5-26
viii VisualDSP++ 4.0 Loader Manual
CONTENTS
File Extensions .................................................................. 5-27
Loader Command-Line Switches ....................................... 5-27
Using VisualDSP++ Interface (Load Page) .............................. 5-27
LOADER FOR ADSP-2126X/2136X SHARC PROCESSORS
ADSP-2126x/2136x Processor Booting .......................................... 6-2
Power-Up Booting Process ....................................................... 6-3
Boot Type Selection ................................................................. 6-4
Boot Types .............................................................................. 6-4
PROM Boot Mode ............................................................. 6-5
Packing Options for External Memory ............................. 6-6
Packing and Padding Details ............................................ 6-7
SPI Port Boot Modes ........................................................... 6-8
SPI Slave Boot Mode ....................................................... 6-9
SPI Master Boot Mode .................................................. 6-10
Booting From an SPI Flash ............................................ 6-14
Booting From an SPI PROM (16-Bit Address) ............... 6-16
Booting From an SPI Host Processor ............................. 6-16
Internal Boot Mode .......................................................... 6-17
Boot Kernels ......................................................................... 6-18
Boot Kernel Modification and Loader Issues ...................... 6-19
Rebuilding a Boot Kernel File ........................................ 6-19
Rebuilding a Boot Kernel Using Command Lines .......... 6-20
Loader File Issues .......................................................... 6-20
Interrupt Vector Table ........................................................... 6-21
VisualDSP++ 4.0 Loader Manual ix
CONTENTS
Loader File Section Header .................................................... 6-22
ADSP-2126x/2136x Data Tags ......................................... 6-22
INIT_L48 Blocks ......................................................... 6-24
INIT_L16 Blocks ......................................................... 6-26
INIT_L64 Blocks ......................................................... 6-26
FINAL_INIT Blocks .................................................... 6-27
ADSP-2126x/2136x Processor Loader Guide ............................... 6-32
Using the ADSP-2126x/2136x Loader Command Line .......... 6-32
File Searches ..................................................................... 6-34
File Extensions ................................................................. 6-34
Loader Command-Line Switches ....................................... 6-34
Using the VisualDSP++ Interface (Load Page) ........................ 6-34
SPLITTER FOR SHARC AND TIGERSHARC
PROCESSORS
SHARC and TigerSHARC Splitter Command Line ....................... 7-2
File Searches ........................................................................... 7-4
Output File Extensions ........................................................... 7-4
Command-Line Switches ......................................................... 7-5
VisualDSP++ Interface (Split Page) ............................................... 7-8
FILE FORMATS
Source Files .................................................................................. A-2
C/C++ Source Files ................................................................. A-2
Assembly Source Files .............................................................. A-3
x VisualDSP++ 4.0 Loader Manual
CONTENTS
Assembly Initialization Data Files ........................................... A-3
Header Files ........................................................................... A-4
Linker Description Files ......................................................... A-4
Linker Command-Line Files ................................................... A-5
Build Files ................................................................................... A-5
Assembler Object Files ............................................................ A-6
Library Files ........................................................................... A-6
Linker Output Files ................................................................ A-6
Memory Map Files ................................................................. A-7
Loader Output Files in Intel Hex-32 Format ........................... A-7
HEXUTIL Utility .............................................................. A-9
Loader Output Files in Include Format ................................. A-10
Loader Output Files in Binary Format ................................... A-11
Splitter Output Files in Motorola S-Record Format ............... A-11
Splitter Output Files in Intel Hex-32 Format ........................ A-13
Splitter Output Files in Byte Stacked Format ......................... A-13
Splitter Output Files in ASCII Format .................................. A-15
Debugger Files ........................................................................... A-15
Format References ...................................................................... A-17
INDEX
VisualDSP++ 4.0 Loader Manual xi
CONTENTS
xii VisualDSP++ 4.0 Loader Manual
PREFACE
Thank you for purchasing VisualDSP++® 4.0, Analog Devices, Inc. development software for digital signal processing (DSP) applications.
Purpose of This Manual
The VisualDSP++ 4.0 Loader Manual contains information about the
loader/splitter program for the following Analog Devices, Inc. processors—SHARC
Blackfin
The manual describes the loader/splitter operations for these processors
and references information about related development software. It also
provides information about the loader and splitter command-line
interfaces.
®
®
(ADSP-21xxx), TigerSHARC® (ADSP-TSxxx), and
(ADSP-BFxxx).
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual, but should supplement it with other texts
(such as the appropriate hardware reference and programming reference
manuals) that describe your target architecture.
VisualDSP++ 4.0 Loader Manual xiii
Manual Contents
Manual Contents
The manual contains:
• Chapter 1, “Introduction”
• Chapter 2, “Loader/Splitter for Blackfin Processors”
• Chapter 3, “Loader for ADSP-TSxxx TigerSHARC Processors”
• Chapter 4, “Loader for ADSP-2106x/21160 SHARC Processors”
• Chapter 5, “Loader for ADSP-21161 SHARC Processors”
• Chapter 6, “Loader for ADSP-2126x/2136x SHARC Processors”
• Chapter 7, “Splitter for SHARC and TigerSHARC Processors”
• Appendix A, “File Formats”
What’s New in This Manual
Information in this VisualDSP++ 4.0 Loader Manual applies to all Analog
Devices, Inc. processors listed in “Supported Processors”.
Refer to VisualDSP++ 4.0 Product Release Bulletin for information on new
and updated VisualDSP++ 4.0 features and other product release
information.
xiv VisualDSP++ 4.0 Loader Manual
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
• Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
• E-mail tools questions to
dsptools.support@analog.com
• E-mail processor questions to
dsp.support@analog.com
• Phone questions to 1-800-ANALOGD
• Contact your Analog Devices, Inc. local sales office or authorized
distributor
Preface
• Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
VisualDSP++ 4.0 Loader Manual xv
Supported Processors
Supported Processors
The following is the list of Analog Devices, Inc. processors supported in
VisualDSP++ 4.0.
Blackfin (ADSP-BFxxx) Processors
The name “Blackfin” refers to a family of 16-bit, embedded processors.
VisualDSP++ currently supports the following Blackfin processors.
ADSP-BF531 ADSP-BF532 (formerly ADSP-21532)
ADSP-BF533 ADSP-BF534
ADSP-BF535 (formerly ADSP-21535) ADSP-BF536
ADSP-BF537 ADSP-BF538
ADSP-BF539 ADSP-BF561
ADSP-BF566 AD6532
SHARC (ADSP-21xxx) Processors
The name “SHARC” refers to a family of high-performance, 32-bit,
floating-point processors that can be used in speech, sound, graphics, and
imaging applications. VisualDSP++ currently supports the following
SHARC processors.
ADSP-21020 ADSP-21060 ADSP-21061 ADSP-21062
ADSP-21065L ADSP-21160 ADSP-21161 ADSP-21261
ADSP-21262 ADSP-21266 ADSP-21267 ADSP-21363
ADSP-21364 ADSP-21365 ADSP-21366 ADSP-21367
ADSP-21368 ADSP-21369
xvi VisualDSP++ 4.0 Loader Manual
Preface
TigerSHARC (ADSP-TSxxx) Processors
The name “TigerSHARC” refers to a family of floating-point and
fixed-point [8-bit, 16-bit, and 32-bit] processors. VisualDSP++ currently
supports the following TigerSHARC processors.
ADSP-TS101 ADSP-TS201 ADSP-TS202 ADSP-TS203
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at
www.analog.com. Our Web site provides infor-
mation about a broad range of products—analog integrated circuits,
amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests.
sheets, code examples, and more.
Registration
Visit
Registration takes about five minutes and serves as a means to select the
information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
MyAnalog.com provides access to books, application notes, data
www.myanalog.com to sign up. Click Register to use MyAnalog.com.
VisualDSP++ 4.0 Loader Manual xvii
Product Information
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publica-
tions, data sheets, application notes, product overviews, and product
announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
• E-mail questions or requests for information to
dsp.support@analog.com
• Fax questions or requests for information to
1-781-461-3010 (North America)
+49-89-76903-157 (Europe)
• Access the FTP Web site at
ftp ftp.analog.com (or ftp 137.71.25.69)
ftp://ftp.analog.com
Related Documents
For information on product related development software, see these
publications:
• VisualDSP++ 4.0 User’s Guide
• VisualDSP++ 4.0 Getting Started Guide
• VisualDSP++ 4.0 C/C++ Compiler and Library Manual for SHARC
Processors
• VisualDSP++ 4.0 C/C++ Compiler and Library Manual for
TigerSHARC Processors
• VisualDSP++ 4.0 C/C++ Compiler and Library Manual for Blackfin
Processors
xviii VisualDSP++ 4.0 Loader Manual
Preface
• VisualDSP++ 4.0 Linker and Utilities Manual
• VisualDSP++ 4.0 Assembler and Preprocessor Manual
• VisualDSP++ 4.0 Product Release Bulletin
• VisualDSP++ 4.0 Kernel (VDK) User’s Guide
• VisualDSP++ 4.0 Quick Installation Reference Card
For hardware information, refer to your processors’s hardware reference,
programming reference, or data sheet. All documentation is available
online. Most documentation is available in printed form.
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/resources/technicalLibrary
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary
VisualDSP++ 4.0 Loader Manual xix
.PDF files of most manuals are also provided.
Product Information
Each documentation file type is described as follows.
File Description
.CHM Help system files and manuals in Help format
.HTM or
.HTML
.PDF VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the
Internet Explorer 4.0 (or higher).
Viewing and printing the
Reader (4.0 or higher).
.PDF files requires a PDF reader, such as Adobe Acrobat
.HTML files requires a browser, such as
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD-ROM at any time
by running the Tools installation. Access the online documentation from
the VisualDSP++ environment, Windows
®
Explorer, or the Analog
Devices Web site.
Accessing Documentation From VisualDSP++
From the VisualDSP++ environment:
• Access VisualDSP++ online Help from the Help menu’s Contents,
Search, and Index commands.
• Open online Help from context-sensitive user interface items (toolbar buttons, menu commands, and windows).
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
xx VisualDSP++ 4.0 Loader Manual
Preface
Help system files (.
located in the
The
Docs folder also contains the Dinkum Abridged C++ library and the
CHM) are located in the Help folder, and .PDF files are
Docs folder of your VisualDSP++ installation CD-ROM.
FlexLM network license manager software documentation.
Using Windows Explorer
• Double-click the
tem, to access all the other
vdsp-help.chm file, which is the master Help sys-
.CHM files.
• Double-click any file that is part of the VisualDSP++ documentation set.
Using the Windows Start Button
• Access VisualDSP++ online Help by clicking the Start button and
choosing Programs, Analog Devices, VisualDSP++, and
VisualDSP++ Documentation.
Accessing Documentation From the Web
Download manuals at the following Web site:
http://www.analog.com/processors/resources/technicalLibrary/manuals
Select a processor family and book title. Download archive (.ZIP) files, one
for each manual. Use any archive management software, such as WinZip,
to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
VisualDSP++ 4.0 Loader Manual xxi
Product Information
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
Hardware Tools Manuals
To purchase EZ-KIT Lite™ and In-Circuit Emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
xxii VisualDSP++ 4.0 Loader Manual
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
Example Description
Preface
Close command
(File menu)
{this | that} Alternative required items in syntax descriptions appear within curly
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
brackets and separated by vertical bars; read the example as
that. One or the other is required.
rated by vertical bars; read the example as an optional
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this.
this or
this or that.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for devices
users. In the online version of this book, the word Wa rnin g appears
instead of this symbol.
VisualDSP++ 4.0 Loader Manual xxiii
Notation Conventions
L
Additional conventions, which apply only to specific chapters, may
appear throughout this document.
xxiv VisualDSP++ 4.0 Loader Manual
1 INTRODUCTION
The majority of this manual describes the loader program (or loader utility) as well as the process of loading and splitting, the final phase of an
application program’s development flow.
Most of this chapter applies to all 8-, 16-, and 32-bit data processors.
Information applicable to a particular target processor, or to a particular
processor family, is provided in the following chapters.
• Chapter 2, “Loader/Splitter for Blackfin Processors”
• Chapter 3, “Loader for ADSP-TSxxx TigerSHARC Processors”
• Chapter 4, “Loader for ADSP-2106x/21160 SHARC Processors”
• Chapter 5, “Loader for ADSP-21161 SHARC Processors”
• Chapter 6, “Loader for ADSP-2126x/2136x SHARC Processors”
• Chapter 7, “Splitter for SHARC and TigerSHARC Processors”
L
VisualDSP++ 4.0 Loader Manual 1-1
The code examples in this manual have been compiled using
VisualDSP++ 4.0. The examples compiled with another version of
VisualDSP++ may result in build errors or different output;
although, the highlighted algorithms stand and should continue to
stand in future releases of VisualDSP++.
Program Development Flow
Program Development Flow
Figure 1-1 is a simplified view of the application development flow.
Figure 1-1. Program Development Flow and Booting Sequence
The development flow can be split into three phases:
1. “Compiling and Assembling”
2. “Linking”
3. “Loading, Splitting, or Both”
A brief description of each phase follows.
Compiling and Assembling
Input source files are compiled and assembled to yield object files. Source
files are text files containing C/C++ code, compiler directives, possibly a
mixture of assembly code and directives, and, typically, preprocessor commands. Refer to the VisualDSP++ 4.0 Assembler and Preprocessor Manual
1-2 VisualDSP++ 4.0 Loader Manual
Introduction
or the VisualDSP++ 4.0 C/C++ Compiler and Library Manual for your
processor, and online help for information about the assembler and
compiler.
Linking
Under the direction of the Linker Description File (LDF) and linker settings, the linker consumes separately-assembled object and library files to
yield an executable file. If specified, the linker also produces the shared
memory files and overlay files. The linker output (.
the Executable and Linkable Format (ELF), an industry-standard format
for executable files. The linker also produces map files and other embedded information (DWARF-2) used by the debugger.
These executable files are not readable by the processor hardware directly.
They are neither supposed to be burned onto an EPROM or flash memory
device. Executable files are intended for VisualDSP++ debugging targets,
such as the simulator or emulator. Refer to the VisualDSP++ 4.0 Linker
and Utilities Manual and online Help for information about linking and
debugging.
DXE files) conforms to
Loading, Splitting, or Both
Upon completing the debug cycle, the processor hardware needs to run on
its own, without any debugging tools connected. After power-up, the
processor’s on-chip and off-chip memories need to be initialized. The process of initializing memories is often referred to as booting. Therefore, the
linker output must be transformed to a format readable by the processor.
This process is handled by the loader/splitter program. The loader/splitter
uses the debugged and tested executable files as well as shared memory and
overlay files as inputs to yield a processor-loadable file.
VisualDSP++ 4.0 Loader Manual 1-3
Program Development Flow
VisualDSP++ 4.0 includes these loader/splitter programs:
•
elfloader.exe (loader) for Blackfin, TigerSHARC, and SHARC
processors. The loader for Blackfin processors acts also as a ROM
splitter when invoked with the corresponding option settings or
switches.
•
elfspl21k.exe (splitter) for TigerSHARC and SHARC processors.
The loader/splitter output is either a boot-loadable or non-bootable file.
The output is meant to be loaded onto the target. There are several ways
to use the output:
• Download the loadable file into the processor PROM space on an
EZ-KIT Lite
®
board via the Flash Programmer plug-in. Refer to
VisualDSP++ Help for information on the Flash Programmer.
• Use VisualDSP++ to simulate booting in a simulator session (where
supported). Load the loader file and then reset the processor to
debug the booting routines. No hardware is required: just point to
the location of the loader file, letting the simulator to do the rest.
You can step through the boot kernel code as it brings the rest of
the code into memory.
• Store the loader file in an array on a multiprocessor system. A master (host) processor has the array in its memory, allowing a full
control to reset and load the file into the memory of a slave
processor.
Non-bootable Files Versus Boot-loadable Files
A non-bootable file executes from an external memory of the processor,
while a boot-loadable file is transported into and executes from an internal
memory of the processor. The boot-loadable file is then programmed
(burned into EPROM) into an external memory device within your target
system. The loader outputs loadable files in formats readable by most
1-4 VisualDSP++ 4.0 Loader Manual
Introduction
EPROM burners, such as Intel hex-32 and Motorola S formats. For
advanced usage, other file formats and boot modes are supported. (See
“File Formats” on page A-1.)
A non-bootable EPROM image file executes from an external memory of
the processor, bypassing the built-in boot mechanisms. Preparing a
non-bootable EPROM image is called splitting. In most cases (except for
Blackfin processors), developers working with floating- and fixed-point
processors use the splitter instead of the loader to produce a non-bootable
memory image file.
A booting sequence of the processor and application program design dictate the way loader/splitter program is called to consume and transform
executable files:
• For Blackfin processors, splitter and loader operations are handled
by the loader program,
elfloader.exe. The splitter is invoked by a
different set of command-line switches than the loader.
• For TigerSHARC and SHARC processors, splitter operations are
handled by the splitter program,
elfspl21k.exe.
Loader Operations
You can run the loader from the IDDE. In order to do so, change the
project type from DSP Executable to DSP Loader File.
Loader operations depend on loader options, which control how the
loader processes executable files into boot-loadable files, letting you select
features such as kernels, boot modes, and output file formats. These
options are set on the Load page of the Project Options dialog box in the
VisualDSP++ Integrated Development and Development Environment
(IDDE) or on the loader command line. Option settings on the Load page
correspond to switches typed on the
elfloader.exe command line.
VisualDSP++ 4.0 Loader Manual 1-5
Booting Modes
Splitter Operations
Splitter operations depend on splitter options, which control how the
splitter processes executable files into non-bootable files:
• For Blackfin processor, the loader program includes the ROM
splitter capabilities invoked through the Load page, the ROM
splitter options category of the Project Options dialog box. Refer
to “Using the ROM Splitter” on page 2-62. Option settings on the
Load page correspond to switches typed on the
command line.
• For ADSP-21xxx SHARC and ADSP-TSxxx TigerSHARC processors, change the project type to DSP splitter file. The splitter
options are set via the Split page of the Project Options dialog box.
Refer to “Splitter for SHARC and TigerSHARC Processors” on
page 7-1. Option settings on the Splitter page correspond to
switches typed on the
elfspl21k.exe command line.
elfloader.exe
Booting Modes
Once an executable file is fully debugged, the loader is ready to convert
the executable file into a processor-loadable (or boot-loadable) file. The
loadable file can be automatically downloaded (booted) to the processor
after power-up or after a software reset. The way the loader creates a
boot-loadable file depends upon how the loadable file is booted into the
processor.
The boot mode of the processor is determined by sampling one or more of
the input flag pins. Booting sequences, highly processor-specific, are
detailed in the following chapters.
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