ANALOG DEVICES UG-156 Service Manual

Evaluation Board User Guide
One Technology Way P. O . Box 9106 Norwood, MA 02062-9106, U.S.A. Tel : 781.329.4700 Fax : 781.461.3113 www.analog.com
UG-156
Evaluation Board for Dual, High Speed Operational Amplifiers
(8-Lead SOIC and Exposed Paddle)

FEATURES

Enables quick breadboarding/prototyping User-defined circuit configuration Edge-mounted SMA connector provisions Easy connection to test equipment and other circuits Two independent op amp configurations Instrumentation amplifier configuration capable

GENERAL DESCRIPTION

The EB-O8RE-2Z is designed to aid in the evaluation of dual, high speed operational amplifiers. The EB-O8RE-2Z is a bare board (that is, there are no components soldered to the board) that enables users to quickly prototype a variety of operational amplifier circuits, which minimizes risk and reduces time to market. The EB-O8RE-2Z evaluation board supports any of the Analog Devices, Inc., dual, high speed operational amplifiers in an 8-lead SOIC package with an exposed paddle.
Figure 1 shows the component side of the evaluation board, and Figure 2 shows the circuit side of the evaluation board. Figure 3 shows the evaluation board schematic.
The 4-layer evaluation board accepts edge-mounted SMA connectors on both inputs and outputs, which allows efficient and quick connection to test equipment or other circuitry.
The board ground plane, component placement, and power supply bypassing are optimized for maximum circuit flexibility and performance. The evaluation board uses a variety of SMT component case sizes: 0402, 0508, 0603, and 7343.
Figure 4 and Figure 6 show the evaluation board assembly drawings. Figure 5 and Figure 7 show the metal layout pattern for connecting the board to the op amp and to the supporting circuitry.

EVALUATION BOARD COMPONENT AND CIRCUIT SIDE DIAGRAMS

Figure 1. EB-O8RE-2Z Component Side of Evaluation Board
09133-001
Figure 2. EB-O8RE-2Z Circuit Side of Evaluation Board
09133-002
Rev. 0 | Page 1 of 8
UG-156 Evaluation Board User Guide

TABLE OF CONTENTS

Features .............................................................................................. 1
General Description ......................................................................... 1
Evaluation Board Component and Circuit Side Diagrams ......... 1
Revision History ............................................................................... 2

REVISION HISTORY

5/10—Revision 0: Initial Version
Evaluation Board Schematic, Assembly Drawings, and Board
Layouts ................................................................................................3
Ordering Information .......................................................................5
Bill of Materials ..............................................................................5
Rev. 0 | Page 2 of 8
Evaluation Board User Guide UG-156

EVALUATION BOARD SCHEMATIC, ASSEMBLY DRAWINGS, AND BOARD LAYOUTS

JPSLD02
2
1
JP1
–VS
JP2
EPAD
PWR
1
JPSLD02
2
1
*
MOLEX22-23-2031
3
2
*
*
*
*
*
*
*
*
*
*
09133-003
LAB-BOARD
UNIV DUAL HI G H S P E E D O P AM P EVAL BD
AGND
+VS
–VS
SOIC-2R
*
*USER-DEFINED VALUE.
*
*
*
*
*
*
*
*
*
*
*
Figure 3. EB-O8RE-2Z Universal Evaluation Board Schematic
Rev. 0 | Page 3 of 8
Loading...
+ 5 hidden pages