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ADAU1361 Evaluation Board
PACKAGE CONTENTS
ADAU1361 evaluation board
USBi control interface board
USB cable
Evaluation board documentation/quick-start guide
SUPPORTING DOCUMENTATION
ADAU1361 data sheet
AN-1056 Application Note, Capless Headphone Virtual Ground
Short-Circuit Protection for the ADAU1361 and ADAU1761
AN-1006 Application Note, Using the EVAL-ADUSB2EBZ
AN-1007 Application Note, Using the ADAU1761 in DSP
Bypass Mode to Emulate an ADAU1361
SigmaStudio Help (included in software installation)
EVALUATION BOARD BLOCK DIAGRAM
GENERAL DESCRIPTION
This user guide explains the design and setup of the ADAU1361
evaluation board.
The EVAL-ADAU1361Z includes both single-ended and differential stereo line-level analog audio inputs as well as a digital
audio interface. Single-ended and differential analog outputs are
also provided, as well as a stereo capless headphone output.
The USBi provides power and the I
the evaluation board. A switch allows the ADAU1361 to operate at
either 3.3 V or 1.8 V. The SigmaStudio™ programming software is
used for all register controls and SigmaDSP® core programming.
A header is included for interfacing to stereo digital microphones.
2
C communications interface to
I2C COMMUNICATI ONS
DIGITAL
MIC
INPUTS
ANALOG
AUDIO
INPUTS
INTERFACE (USBi )
ADAU1361
Figure 1.
POWER
SUPPLY
OUTPUTS
ANALOG
AUDIO
08957-001
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Evaluation Board Schematics and Artwork ...................................7
Ordering Information .................................................................... 10
Bill of Materials ........................................................................... 10
Rev. 0 | Page 2 of 12
Evaluation Board User Guide UG-119
SETTING UP THE EVALUATION BOARD—QUICK START
SigmaStudio SOFTWARE INSTALLATION
To install the SigmaStudio software, follow these steps:
1. Open the provided .zip file and extract the files to your PC.
Alternately, insert the SigmaStudio CD into the PC optical
drive and locate the SigmaStudio folder on the CD.
2. If Microsoft® .NET Framework Version 2.0 is not already
installed on the PC, install it by double-clicking dotnetfx.exe.
3. Install SigmaStudio by double-clicking setup.exe and
following the prompts. A computer restart is not required.
HARDWARE SETUP, USBi
To set up the USBi hardware, follow these steps:
1. Plug the USBi ribbon cable into Header J1.
2. Connect the USB cable to your computer and to the USBi.
3. When prompted for drivers, follow these steps:
a) Choose Install from a list or a specific location.
b) Choose Search for the best driver in these locations.
c) Check the box for Include this location in the search.
d) The USBi driver is located in C:\Program Files\
Analog Devices Inc\Sigma Studio\USB drivers.
e) Click Next.
f) If prompted to choose a driver, select CyUSB.sys.
g) If the PC is running Windows® XP and you receive the
message that the software has not passed Windows
Logo testing, click Continue Anyway.
SWITCH AND JUMPER SETTINGS
To configure the board for stereo analog input and output, make
sure that the switches and jumpers are set as follows (see Figure 2).
•The ADAU1361 uses the on-board oscillator as a master
clock source (S5 switched to OSC).
•Regulator output VDD is set for 3.3 V operation
(S1 switched to 3.3 V).
• Power is supplied by USB (J5 is connected with a jumper).
• AVDD is connected to VDD (J17 connected).
• IOVDD and AVDD operate at VDD (J16 connected).
• DAC_SDATA and ADC_SDATA are tied together to loop-
back data from ADC to DAC (jumper across two bottom
right pins of J6).
2
•I
C control mode is hardwired on board.
POWERING THE BOARD
The board can be powered either by the USBi or by an external
power supply. For the board to run independently from the
computer, disconnect Jumper J5 and connect the power supply
at J2. The power indicator LED D1 should now be lit.
CONNECTING AUDIO CABLES
In this example, the board is set up for stereo analog inputs and
stereo analog outputs, using 3.5 mm (1/8”) cables.
1. Connect the audio source to Input Jack J24.
2. Connect Output Jack J19 to your headphones.
Figure 2. Evaluation Board Setup and Configuration
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Rev. 0 | Page 3 of 12
UG-119 Evaluation Board User Guide
SETTING UP THE REGISTERS IN SigmaStudio
This section details how to pass an audio signal from the ADC
inputs to the DAC outputs using the headphone drivers. The
codec is configured with SigmaStudio.
1. Create a new project. The Hardware Configuration
tab opens.
2. Drag an ADAU1361 cell and a USBi cell into the blank
work area.
3. Connect the USBi cell to the ADAU1361 cell by clicking
and dragging from the top blue output pin of the USBi cell
to the green input pin of the ADAU1361 cell.
Your screen should now resemble Figure 3.
1. In the IC1-ADAU1361 Register Controls tab, select the 3
and 4 in Capless HP Out option from the Automatic
Startup list and click Load Preset (see Figure 4).
This locks the PLL and sets up the registers for proper
routing of the record and playback paths. If the PLL has
successfully locked, then the box under PLL Lock Bit
should turn from red to green.
2. Start playing the audio source; you should hear audio on the
The ADAU1361 is a low power, stereo audio codec that
supports stereo 48 kHz record and playback at 14 mW from a
1.8 V analog supply. The stereo audio ADCs and DACs support
sample rates from 8 kHz to 96 kHz as well as a digital volume
control.
The SigmaStudio graphical development tool is used to configure
the ADAU1361. SigmaStudio’s outputs can be used to easily
integrate the ADAU1361 in a system.
The record path includes an integrated microphone bias circuit
and six inputs. The inputs can be mixed and muxed before the
ADC, or they can be configured to bypass the ADC. The
ADAU1361 includes a stereo digital microphone input.
The ADAU1361 includes five high power output drivers (two
differential and three single-ended) that support stereo headphones, an earpiece, or other output transducers. AC-coupled
or capless configurations are supported. Individual fine level
controls are supported on all analog outputs. The output mixer
stage allows for flexible routing of audio.
POWER
The evaluation board uses the ADP3336 low dropout voltage
regulator to generate either 3.3 V or 1.8 V for the board. The
output voltage VDD of the ADP3336 is set with external resistors
that can be switched with S1 to select either 3.3 V or 1.8 V
outputs (see Tab le 1).
Table 1. VDD Voltage Settings
Voltage Regulator Output (V) S1 Setting
3.3 Up
1.8 Down
The maximum operating current draw from this board is
approximately 75 mA. This maximum value is reached with
VDD = 3.3 V, headphone outputs enabled, and all LEDs
enabled.
Typically, the regulator input comes from the USBi 5 V dc USB
supply on Header J1. This supply is enabled with a jumper on
J5. To use another 5 V dc supply source, remove the jumper
on J5 and connect the other supply either on the J2 power jack
(positive tip) or via soldering leads from a supply such as a
battery to J3. On J3, Pin 1 (square pad) is ground, and Pin 2
(circle pad) is the power connection.
When the ADP3336 is outputting a regulated voltage, LED D1
is illuminated red.
VDD is connected to the AVDD pin of the ADAU1361 with
Jumper J17. To connect the ADAU1361 IOVDD pin to the same
supply, connect J16, also. These headers can also be used to
separate the supplies of the ADAU1361 from the rest of the
board and to connect an external supply to the ADAU1361.
L1 and C24 are connected to the AVDD pin of the ADAU1361
and function as an L-C filter to reject high frequency power
supply noise common in GSM mobile applications. This filter
is tuned to approximately 1.5 GHz.
ANALOG AUDIO INPUT
The EVAL-ADAU1361Z has three ac-coupled 1/8” input jacks:
two mono differential jacks and one stereo single-ended jack.
The tips of the differential input jacks, J20 and J22 (labeled IN 1
and IN 2), are connected to the negative input of the ADAU1361,
and the rings are connected to the positive input. The stereo
single-ended input on J24 (labeled IN 3) is connected to the
LAUX and RAUX inputs of the ADAU1361. IN 1 and IN 2 can
also be configured to bias a microphone. This is enabled by
connecting the MICBIAS pin of the ADAU1361 to the tip of the
input connectors with Jumper J15 and Jumper J18.
At VDD = 3.3 V, the full-scale analog input level of the EVALADAU1361Z is 1.0 V rms (1.0 V rms on the single-ended
inputs and 0.5 V rms on each of the two pins of the differential
inputs). The full-scale input level scales with VDD.
ANALOG AUDIO OUTPUT
The EVAL-ADAU1361Z has four 1/8” output jacks: two
mono differential, one stereo single-ended, and one stereo
capless headphone output. The differential outputs on J21
and J25 (labeled DIFF OUT L and DIFF OUT R, respectively,
are biased at AVDD/2 V. The tips of the differential output jacks
are connected to the positive output of the ADAU1361, and the
rings are connected to the negative outputs. J23 is a stereo,
single-ended, ac-coupled output.
At VDD = 3.3 V, the full-scale analog output level of the
EVAL-ADAU1361Z is 1.0 V rms (1.0 V rms on the single-ended
outputs and 0.5 V rms on each of the two pins of the differential
outputs). The differential line outputs of the ADAU1361 can
each be boosted by 6 dB to 2.0 V rms. The full-scale output level
scales with VDD.
Note that Jack J21 and Jack J25 tie the ring to the sleeve, resulting
in a floating ground output. Be aware of this when connecting
to these outputs.
Table 2. Analog and Digital Audio Connectors
Jack Function
J4 Stereo digital microphone input
J6 Serial data port input/output
J19 Capless headphone output
J20 Left differential input
J21 Left differential output
J22 Right differential input
J23 Stereo single-ended line output
J24 Stereo single-ended line input
J25 Right differential output
Rev. 0 | Page 5 of 12
UG-119 Evaluation Board User Guide
CLOCKING THE EVALUATION BOARD
The EVAL-ADAU1361Z requires a master clock to operate. The
source of this clock is set by Switch S5 (see Table 3 ).
Table 3. Master Clock Source Settings
Clock Source S5 Setting
Do Not Use—Function Disabled on USBi Up
MCLK from Header J6 Middle
On-Board 12.288 MHz Clock Oscillator (U3) Down
EXTERNAL DIGITAL AUDIO HEADER
The LRCLK, BCLK, ADC_SDATA, and DAC_SDATA pins of
the ADAU1361 can be connected to external devices with the
5 × 2 header, J6. The pins on the top row of J6 are connected to
ground; the pins on the bottom row are the signals indicated on
the silkscreen.
DIGITAL MICROPHONE AND JACK DETECTION
INPUT
A pair of digital microphones can be connected to the evaluation board on Header J4. The pin connections for J4 are
detailed on the evaluation board silkscreen.
J7 and J8 set up the routing of signals to the JACKDET/MICIN
pin of the ADAU1361. These jumper settings are shown in
Figure 5, Figure 6, and Figure 7; they are also shown on the PCB
silkscreen. Toggling the jack detection signal can be simulated
by setting up the jack detect function on the ADAU1361 and
then inserting and removing Jumper J8 with J7-B (lower
connection) connected.
Figure 6. Jumper Settings (J7 and J8) for Jack Detection (Low Signal Detected)
Figure 7. Jumper Settings (J7 and J8) for Jack Detection (High Signal Detected)
I2C COMMUNICATIONS HEADER
The I2C communications header, J1, provides an interface to the
ADAU1361 communications port. This header connects to the
USBi board (EVAL-ADUSB2), which controls communication
between the evaluation board and SigmaStudio on the PC.
Additionally, a DSP reset line and USB bus power line are
provided. The SigmaStudio hardware configuration for this
setup is shown in Figure 8.
J7J8
J7J8
08957-006
08957-007
J7J8
Figure 5. Jumper Settings (J7 and J8) for Stereo Digital Microphone Input
08957-005
Rev. 0 | Page 6 of 12
Figure 8. Using the EVAL-ADAU1361Z and the USBi with SigmaStudio
08957-008
Evaluation Board User Guide UG-119
EVALUATION BOARD SCHEMATICS AND ARTWORK
STEREO SINGLE-ENDED OUTPUT
J23
R23
100Ω
C23
10µF
ADC_SDATA
DAC_SDATA
15
26
ROUTP
ROUTN
ADC_SDATA27DAC_SDATA
ADDR1/CDATA31SDA/COUT32SCL/CCLK
JACKDET/MICIN
4
30
SDA
JACKDET/MICIN
C20
10µF
R19
R22
10kΩ
LRCLK
29
LRCLK
SCL
100Ω
C17
10µF
C21
10µF
BCLK
C18
0.10µF
7
28
CM
BCLK
AGND
AGND
DGND
MCLK3ADDR0/CLATCH
2
C15
10µF
OPEN
OPEN
OPEN
9.1PF
C24
L1
0.10µF
12
1.2nH
J16
0.10µF
MIC_BIAS
8
1
24
5
C5
10µF
MONO DIFFERENTIAL OUTPUT LEFT
23
J21
19
20
21
LHP
AVDD
MONOOUT
AVDD
IOVDD
DVDDOUT
MICBIAS
LINP11LINN12RINP13RINN14RAUX
10
R13
R14
RHP
OPEN
OPEN
17
16
18
LOUTP
LOUTN
U1
ADAU1361
LAUX
6
J19
CAPLESS
HEADPHONE OUTPUT
R4
R3
R5
0Ω
OPEN
C1
BOARD IS SHIPPED IN CAPLESS MODE.
TO CONVERT TO AC-COUPLED,
REMOVE 0Ω RESISTORS FROM R5, R6, AND R10;
ADD 220µF CAPACITORS TO C1 AND C4 AND 0Ω RESISTOR TO R4.
10µF
C14
VDD
J17
IOVDD
TP3
TP5
C8
10µF
C31
0.10µF
0Ω
+
R6
C16
C11
10µF
DVDD
R2
0Ω
OPEN
+
C4
R10
C22
0.10µF
C10
C7
10µF
08957-009
MONO DIFFERENTIAL OUTPUT RIGHT
J25
R29
R18
10kΩ
9
22
25
C26
10µF
OPEN
R26
OPEN
C28
10µF
IOVDD
IOVDD
VDD
L2
12
C39
12.288MHZ
VDD
4
EXT_MCLK
USB_CLK
124
3
S5-A
0.10µF
568
S5-B
10kΩ
1
OE
3
7
R46
GND
2
U3
OUTPU T
49.9Ω
R47
C27
C19
C6
OPEN
49.9kΩ49.9kΩ49.9kΩ49.9kΩ49.9kΩ49.9kΩ
R12
0Ω
R11
MIC_BIAS
DIFFERENTIAL INPUT 1
C3
OPEN
C2
R7
R9
0.10µF
0Ω
R8
2kΩ
J20
OPEN
R21
R20
0Ω
J18J15
MIC_BIAS
DIFFERENTIAL INPUT 2
C13
OPEN
C12
R15
R17R25
0.10µF
0Ω
R16
2kΩ
J22
STEREO SINGLE-ENDED INPUT
R24
1kΩ
C25
OPEN
OPEN
R28
R27
1kΩ
49.9kΩ RESISTORS ON INPUTS REFERENCE AC COUPLING
CAPACITORS TO GROUND PREVENTING POPS WHEN
'HOT-PLUGGING' INPUTS. NOT NECESSARY FOR
HARDWIRED DESIGN.
J24
Figure 9. Board Schematics, Page 1
Rev. 0 | Page 7 of 12
UG-119 Evaluation Board User Guide
C38
0.10µF
+5V
BRD_RESET
USB_CLK
246
8
10
JACK DETECT SIGNAL
J1
13579
R31
10kΩ
R30
IOVDD
10kΩ
CONTROL PORT INTERFACE
IOVDD
J8
R39
JACKDET/MICIN
AB
J7
JUMPER2SIP3
10kΩ
VDD
HEADER_10WAY_POL
SCL
SDA
BCLK
R48
100Ω
M2
POLARIZING PLUG
R37
10kΩ
246
8
10
1211
LEFT D MIC
RIGHT DMIC
R36
J4
13579
10kΩ
SOCKET_12WAY_UNSHROUD
M1
POLARIZING PLUG
SERIAL DATA INTERFACE
13579
J6
2x5
246
8
10
C41
0.10µF
BCLK
LRCLK
DAC_SDATA
ADC_SDATA
R38
49.9Ω
PLANE DECOUPLING
EXT_MCLK
VDD
DIGITAL MICROPHONE INPUT
1
OUT2OUT3OUT
ADP3336
7IN8IN6
DVDD = +1.8V (SHOWN) OR +3.3 V SUPPLY
C40
0.10µF
C30
0.10µF
C29
0.10µF
100Ω
R1
10nF
R35
C35
5
FB
U2
4
GND
SD
D1
C37
10µF
0.10µF
C36
1V8
3V3
S1
SPDT
R34
140kΩ
169kΩ
R33
147kΩ
C33
0.10µF
RED DIFFUSED
C32
08957-010
TP6
TP4
TP1
TP2
10µF
C34
10kΩ
R32
KA
D4
+5V SUPPLY FROM USBi
+5V
J5
213
J2
RAPC722X
0.10µF
BRD_RESET
OPEN
J3
BATTERY INPUT
Figure 10. Board Schematics, Page 2
Rev. 0 | Page 8 of 12
Evaluation Board User Guide UG-119
08957-011
Figure 11. Board Silkscreen and Parts Placement
Rev. 0 | Page 9 of 12
UG-119 Evaluation Board User Guide
ORDERING INFORMATION
BILL OF MATERIALS
Table 4.
Qty Designator Description Manufacturer Part Number
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the pers onal jurisdiction and venu e of such courts. The United Nations Conventi on on Contracts for the Internation al Sale of Goods shall not apply to this Agreement and is expressly disclaimed.