Analog Devices UG-001, AD9272, AD9273 User Manual
Evaluation Board User Guide
One Technology Way • P. O . Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel : 781.329.4700 • Fax : 781.461.3113 • www.analog.com
UG-001
Evaluating the AD9272/AD9273 for Ultrasound Systems
FEATURES
Full featured evaluation board for the AD9272/AD9273
SPI and alternate clock options
Internal and external reference options
VisualAnalog and SPI Controller software interfaces
EQUIPMENT NEEDED
Analog signal source and antialiasing filter
2 switching power supplies (6.0 V, 2.5 A) CUI EPS060250UH-
PHP-SZ, provided
Linear bench top dc voltage source (0 V to 1.6 V), not
required for CW Doppler mode
PC running Windows 98 (2nd ed.), Windows 2000, Windows ME,
or Windows XP
USB 2.0 port, recommended (USB 1.1 compatible)
AD9272/AD9273 evaluation board
HSC-ADC-EVALCZ FPGA-based data capture kit
For CW Doppler mode: spectrum analyzer
For CW Doppler mode: dc voltage source: +
5 V w/100 mA each
TYPICAL MEASUREMENT SETUP
DOCUMENTS NEEDED
AD9272 and AD9273 data sheets
HSC-ADC-EVALCZ data sheet, High Speed Converter
Evaluation Platform (FPGA-based data capture kit)
AN-905 Application Note, VisualAnalog Converter Evaluation
Tool Version 1.0 User Manual
AN-878 Application Note, High Speed ADC SPI Control Software
AN-877 Application Note, Interface to High Speed ADCs via SPI
SOFTWARE NEEDED
VisualAnalog
SPI Controller
GENERAL DESCRIPTION
This document describes the AD9272/AD9273 evaluation
board, which provides all of the support circuitry required to
operate the AD9272/AD9273 in their various modes and
configurations. The application software used to interface with
the devices is also described.
The AD9272/AD9273 data sheet, available at www.analog.com,
provides additional information and should be consulted when
using the evaluation board. All documents and software tools
are available at http://www.analog.com/fifo. For any questions,
send an email to highspeed.converters@analog.com.
Please see the last page for an important warning and disclaimers. Rev. 0 | Page 1 of 24
Figure 1. AD9272-65EBZ/AD9272-80KITZ/AD9273-50EBZ Evaluation Board and HSC-ADC-EVALCZ Data Capture Board
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UG-001 Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Equipment Needed ........................................................................... 1
Documents Needed .......................................................................... 1
Software Needed ............................................................................... 1
General Description ......................................................................... 1
Typical Measurement Setup ............................................................ 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supplies .............................................................................. 3
Input Signals .................................................................................. 3
Output Signals ............................................................................... 3
REVISION HISTORY
2/09—Revision 0: Initial Version
Default Operation and Jumper Selection Settings ....................5
Evaluation Board Software Quick Start Procedures .....................7
Configuring the Board .................................................................7
Using the Software for Testing .....................................................7
Using the Integrated Crossp oint Switch
(CW Doppler Mode) ................................................................. 10
Evaluation Board Schematics and Artwork ................................ 12
Ordering Information .................................................................... 23
Bill of Materials ........................................................................... 23
ESD Caution .................................................................................... 24
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Evaluation Board User Guide UG-001
EVALUATION BOARD HARDWARE
The AD9272/AD9273 evaluation board provides all of the support
circuitry required to operate the AD9272/AD9273 in its various
modes and configurations. Figure 2 shows the typical bench
characterization setup used to evaluate the ac performance of
the AD9272/AD9273. It is critical that the signal sources used for
the analog input and clock have very low phase noise (<1 ps rms
jitter) to realize the optimum performance of the signal chain.
Proper filtering of the analog input signal to remove harmonics
and lower the integrated or broadband noise at the input is
necessary to achieve the specified noise performance (see the
AD9272 or AD9273 data sheet).
See the Evaluation Board Software Quick Start Procedures section
to get started and Figure 21 to Figure 31 for the complete schematics and layout diagrams that demonstrate the routing and
grounding techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz
to 63 Hz. The other end is a 2.1 mm inner diameter jack that
connects to the PCB at P701. Once on the PC board, the 6 V
supply is fused and conditioned before connecting to low dropout
linear regulators that supply the proper bias to each of the various
sections on the board.
When operating the evaluation board in a nondefault condition,
L705, L706, L707, and L709 can be removed to disconnect the
switching power supply. This enables the user to bias each section
of the board individually. Use P602 and P603 to connect a different
supply for each section. At least one 1.8 V supply is needed with
a 1 A current capability for AVDD_DUT and DRVDD_DUT;
however, it is recommended that separate supplies be used for
both analog and digital domains. An additional supply is also
required to supply 3.0 V to the device under test, AVDD2_DUT.
This should also have a 1A current capability. To operate the
evaluation board using the SPI and alternate clock options, a
separate 3.3 V analog supply is needed in addition to the other
supplies. The 3.3 V supply, or AVDD_3P3V, should have a 1 A
current capability.
To bias the crosspoint switch circuitry or CW section and
differential gain drive circuitry, separate +5 V and −5 V supplies
are required at P601. These should each have 1 A current capability.
This section cannot be biased from a 6 V, 2 A wall supply. Separate
supplies are required at P601.
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as Rohde & Schwarz SMA or
HP8644B signal generators or the equivalent. Use a 1 m, shielded,
RG-58, 50 Ω coaxial cable for making connections to the evaluation board. Enter the desired frequency and amplitude (refer to
the specifications in the AD9272 or AD9273 data sheet). The
evaluation board is set up to be clocked from the crystal oscillator, OSC401.
If a different or external clock source is desired, follow the
instructions Clock Circuitry section. Typically, most Analog
Devices evaluation boards can accept ~2.8 V p-p or 13 dBm sine
wave input for the clock. When connecting the analog input
source, it is recommended to use a multipole, narrow-band
band-pass filter with 50 Ω terminations. Analog Devices uses
TTE and K&L Microwave, Inc., band-pass filters. The filter
should be connected directly to the evaluation board.
OUTPUT SIGNALS
The default setup uses the FIFO5 high speed, dual-channel
FIFO data capture board (HSC-ADC-EVALCZ). Two of the
eight channels can then be evaluated at the same time. For more
information on channel settings on these boards and their optional
settings, visit www.analog.com/FIFO.
Rev. 0 | Page 3 of 24
UG-001 Evaluation Board User Guide
T
WALL OUTLE
100V TO 240V AC
47Hz TO 63Hz
SIGNAL
SYNTHESIZER
SPECTRUM
ANALYZER
SWITCHING
POWER
SUPPLY
SWITCHING
POWER
SUPPLY
ANALOG INPUT
CW OUT PUT
AGILENT
POWER SUPPLY
GAIN CONTROL INPUT
6V DC
2A MAX
SIGNAL
SYNTHESIZER
OPTIO NAL CLOCK SOURCE
Figure 2. Evaluation Board Connection
6V DC
2A MAX
PC
RUNNING ADC
ANALYZER
OR VISUAL ANAL OG
USER SOFTWARE
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Rev. 0 | Page 4 of 24
Evaluation Board User Guide UG-001
DEFAULT OPERATION AND JUMPER SELECTION SETTINGS
This section explains the default and optional settings or modes
allowed on the AD9272/AD9273 Rev. A evaluation board.
Power Circuitry
Connect the switching power supply that is supplied in the
evaluation kit between a rated 100 V ac to 240 V ac wall outlet
at 47 Hz to 63 Hz and P701.
Analog Input Front-End Circuit
The evaluation board is set up for a transformer-coupled analog
input with an optimum 50 Ω impedance match of 18 MHz of
bandwidth. For a different bandwidth response, use the
antialiasing filter settings.
VREF
VREF is set to 1.0 V. This causes the ADC to operate with the
internal reference in the 2.0 V p-p full-scale range. A separate
external reference option using the ADR130 is also included on
the evaluation board. Populate R311 with a 0 Ω resistor and remove
C426. Note that ADC full-scale ranges less than 2.0 V p-p are
not supported by the AD9272/AD9273.
RBIAS
RBIAS has a default setting of 10 kΩ (R301) to ground and is used
to set the ADC core bias current. However, note that using other
than a 10 kΩ, 1% resistor for RBIAS may degrade the performance
of the device, depending on the resistor chosen.
Clock Circuitry
The default clock input circuitry is derived from a simple transformer-coupled circuit using a high bandwidth
1:1 impedance ratio transformer (T401) that adds a very low
amount of jitter to the clock path. The clock input is 50 Ω
terminated and ac-coupled to handle single-ended sine wave
types of inputs. The transformer converts the single-ended
input to a differential signal that is clipped before entering the
ADC clock inputs.
The evaluation board is already set up to be clocked from the
crystal oscillator, OSC401. This oscillator is a low phase noise
oscillator from Valpey Fisher (VFAC3-BHL-50MHz/VFAC3BHL-65MHz/VFAC3-BHL-80MHz). If a different clock source
is desired, remove R403, set Jumper J401 to disable the oscillator
from running, and connect the external clock source to the
SMA connector, P401.
A differential LVPECL clock driver can also be used to clock the
ADC input using the AD9515 (U401). Populate R406 and R407
with 0 Ω resistors and remove R415 and R416 to disconnect the
default clock path inputs. In addition, populate C405 and C406
with a 0.1 μF capacitor and remove C409 and C410 to disconnect
the default clock path outputs. The AD9515 has many pinstrappable options that are set to a default mode of operation.
Consult the AD9515 data sheet for more information about
these and other options.
PDWN
To enable the power-down feature, short P303 to the on
position (AVDD) on the PDWN pin.
STBY
To enable the standby feature, short P302 to the on position
(AVDD) on the STBY pin.
GAIN+, GAIN−
To change the VGA attenuation, drive the GAIN+ pin from 0 V
to 1.6 V on J302 using a linear supply and use a single-ended
method to change the VGA gain from 0 dB to 42 dB. U403 is
available for users who wish to drive the gain pins (GAIN±)
differentially. Install R305, R347, and R349 and remove C308,
C309, and R303 to connect the amplifier correctly. Next, apply a
dc voltage source to P601, connecting the +5 V, −5 V, and ground
(0 V) appropriately to bias U403 (AD8138). These benchtop
linear supplies should each have 100 mA of current capability.
If an external source is not available, R337 can be installed to
use the on-board resistive divider for gain adjustment in either
the single-ended or differential case.
Non-SPI Mode
For users who wish to operate the DUT without using SPI,
remove the jumpers on J601. This disconnects the CSB, SCLK,
and SDIO pins from the control bus, allowing the DUT to
operate in its simplest mode. Each of these pins has internal
termination and will float to its respective level. Note that the
device will only work in its default condition.
CWDx+, CWDx−
To use the CWDx± outputs, first apply a dc voltage source to
P601, connecting the +5 V, −5 V, and ground (0 V) appropriately to
bias U402 (AD812). These benchtop linear supplies should each
have 100 mA of current capability.
To view the CWD2+/CWD2− through CWD5+/CWD5− outputs,
jumper together the appropriate outputs on P606 and P607. All
outputs are summed together on the IOP and ION buses, fed to
a 1:4 impedance ratio transformer, and buffered so that the user
can view the output on a spectrum analyzer. This can be configured
to be viewed in single-ended mode (default) or in differential mode
by using a spectrum analyzer. To set the voltage for the appropriate
number of channels to be summed, change the value of R447
and R448 on the primary transformer (T402).
Upon shipment, the CWD0+/CWD0−, CWD1+/CWD1−,
CWD6+/CWD6−, and CWD7+/CWD7− outputs are properly
biased and ready to use with the AD8339 quad I/Q demodulator
and phase shifter. The AD9272/AD9273 evaluation board simply
snaps into place on the AD8339 evaluation board (AD8339EVALZ). Remove the jumpers connected to P3A and P4A on
the AD8339 evaluation board, and snap the standoffs that are
provided with the AD9272/AD9273 into the AD8339 evaluation
board standoff holes in the center of the board. The standoffs
will automatically lock into place and create a direct connection
Rev. 0 | Page 5 of 24
UG-001 Evaluation Board User Guide
between the AD9272/AD9273 CWDx± outputs and the
AD8339 inputs.
DOUTx+, DOUTx−
If an alternative data capture method to the setup described in
Figure 2 is used, optional receiver terminations, R701 to R710, can
be installed next to the high speed backplane connector.
Rev. 0 | Page 6 of 24
Evaluation Board User Guide UG-001
EVALUATION BOARD SOFTWARE QUICK START PROCEDURES
This section provides quick start procedures for using the AD9272/
AD9273 either on the evaluation board or in a system level
design. Both the default and optional settings are described.
CONFIGURING THE BOARD
Before using the software for testing, configure the evaluation
board as follows:
1. Connect the evaluation board to the data capture board as
shown in Figure 1 and Figure 2.
2. Connect one 6 V, 2.5 A switching power supply (such as
the CUI Inc. EPS060250UH-PHP-SZ supplied) to the
AD9272/AD9273 board.
3. Connect one 6 V, 2.5 A switching power supply (such as
the CUI EPS060250UH-PHP-SZ supplied) to the HSCADC-EVALCZ board.
4. Connect the HSC-ADC-EVALCZ board (J6) to the PC
with a USB cable.
5. On the ADC evaluation board, place jumpers on all four
pin pairs of J601 to connect the SPI bus.
6. On the ADC evaluation board, ensure that J401 (OSC_EN)
is jumpered to the on setting to use the on-board 50 MHz/
65 MHz/80 MHz Valpey Fisher VFAC3 oscillator.
7. On the ADC evaluation board, use a clean signal generator
with low phase noise to provide an input signal to the
desired channel. Use a 1 m, shielded, RG-58, 50 Ω coaxial
cable to connect the signal generator. For best results, use a
narrow-band band-pass filter with 50 Ω terminations and
an appropriate center frequency. (Analog Devices uses
TTE, Allen Avionics, and K&L band-pass filters.)
USING THE SOFTWARE FOR TESTING
Setting Up the ADC Data Capture Block
After configuring the board, set up the ADC data capture block
using the following steps:
1. Open VisualAnalog™ on a PC. AD9272 or AD9273 should
be listed in the status bar of the New Canvas window.
Select the template that corresponds to the type of testing
to be performed (see Figure 3).
2. After the template is selected, a message appears, asking if
the default configuration can be used to program the FPGA
(see Figure 4). Click Yes , and the window closes.
If a different program is desired, follow Step 3.
3. To view different channels or change features to settings
other than the default settings, click the Expand Display
button. This is located on the bottom right corner of the
window, as shown in Figure 5.
This process is described in the AN-905 Application Note,
VisualAnalog Converter Evaluation Tool Version 1.0 User
Manual. After you are finished, click the Collapse Display
button (see Figure 6).
Figure 3. VisualAnalog, New Canvas Window
Figure 4. VisualAnalog, Default Configuration Message
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07782-028
Rev. 0 | Page 7 of 24
EXPAND DISPLAY BUTTO N
Figure 5. VisualAnalog Window Toolbar, Collapsed Display
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UG-001 Evaluation Board User Guide
COLLAPSE DISPLAY BUTTON
SETTINGS
BUTTON
Figure 6. VisualAnalog, Main Window
4. Program the HSC-ADC-EVALCZ board’s FPGA to a setting
other than the default setting as described in Step 3. Then
expand the VisualAnalog display and click the Settings
button in the ADC Data Capture block (see Figure 6). The
ADC Data Capture Settings box opens (see Figure 7).
07782-023
Setting Up the SPI Controller
After the ADC data capture board setup is completed, set up the
SPI Controller using the following procedure:
1. Open the SPI Controller software by going to the Start
menu or double-clicking the SPI Controller software
desktop icon. If prompted for a configuration file, select
the appropriate one. If not, check the title bar of the
window to determine which configuration is loaded. If
necessary, choose Cfg Open from the File menu and select
the appropriate one. Note that the CHIP ID(1) field should
be filled to indicate whether the correct SPI Controller
configuration file is loaded or not (see Figure 8).
Figure 7. ADC Data Capture Settings Window, Board Settings Tab
5. Select the Board Settings tab and browse to the appropriate
programming file. If you are using an encode rate <28 MSPS,
select Octal_Low_Speed.bin. If you are using an encode
rate >28 MSPS, select Octal_High_Speed.bin. Next, click
Program; the DONE LED in the HSC-ADC-EVALCZ board
should then turn on. If more than two channels are required
to be displayed, select Octal_High_8-Channel_synchronous
Capture.bin. This canvas allows the user to display all the
channels at once. The drawback is that each FFT display is
only 8k points.
Exit the ADC Data Capture Settings box by clicking OK.
07782-016
Figure 8. SPI Controller, CHIP ID(1) Box
2. Click the New DUT button in the SPI Controller.
NEW DUT BUTTON
07782-025
07782-116
Figure 9. SPI Controller, New DUT Button
3. In the Global tab of the SPI Controller, find the CHIP
GRADE(2) box. Use the drop-down box to select the
correct speed grade, if necessary. See the AD9272 or AD9273
data sheet, the AN-878 Application Note, and the AN-877
Application Note for reference.
Rev. 0 | Page 8 of 24
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