Analog Devices SHARC Processors 82-003536-01 User Manual

a

Getting Started With

SHARC

Revision 3.0, April 2010

®

Processors

Part Number

82-003536-01

Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106

Copyright Information

©2010 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.

Printed in the USA.

Disclaimer

Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices, Inc. is believed to
be accurate and reliable. However, no responsibility is assumed by Analog
Devices, Inc. for its use; nor for any infringement of patents or other rights
of third parties which may result from its use. No license is granted by
implication or otherwise under the patent rights of Analog Devices, Inc.

Trademark and Service Mark Notice

The Analog Devices logo, Blackfin, CROSSCORE, EZ-Extender,
EZ-KIT Lite, SHARC, the SHARC logo, TigerSHARC, and
VisualDSP++ are registered trademarks of Analog Devices, Inc.

EZ-Board is a trademark of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of their
respective owners.

CONTENTS

PREFACE

Purpose of This Manual .................................................................. ix

Intended Audience .......................................................................... ix

Manual Contents ............................................................................. x

What’s New in This Manual ............................................................. x

Technical or Customer Support ........................................................ x

Supported SHARC Processors ......................................................... xi

Product Information ...................................................................... xii

Analog Devices Web Site .......................................................... xii

VisualDSP++ Online Documentation ...................................... xiii

Technical Library CD .............................................................. xiii

INTRODUCTION TO SHARC PROCESSORS

What are SHARC Processors? ........................................................ 1-1

SHARC Applications ............................................................... 1-2

Architecture Overview ............................................................. 1-3

Super Harvard Architecture ................................................. 1-3

Common Architectural Features .......................................... 1-4

Four Generations of SHARC Processors ................................... 1-5

Getting Started With SHARC Processors iii

Contents

Processor Peripherals and Performance .......................................... 1-8

Performance ............................................................................ 1-8

THE EVALUATION PROCESS

Evaluation Tools ........................................................................... 2-1

Selecting Software Development Tools ..................................... 2-2

VisualDSP++ From Analog Devices ..................................... 2-2

Platform and Processor Support ...................................... 2-4

Getting Help and Staying Up to Date ............................. 2-9

Analog Devices Tools Product Line ............................... 2-10

Embedded Processors and DSPs .................................... 2-11

Software Modules ............................................................. 2-12

Selecting Hardware Development Tools ................................. 2-12

Evaluation Systems ........................................................... 2-12

EZ-KIT Lite ................................................................. 2-12

EZ-Board ..................................................................... 2-13

ADSP-21489 EZ-KIT Lite From Analog Devices .......... 2-14

ADSP-21479 EZ-KIT Lite From Analog Devices .......... 2-16

ADSP-21469 EZ-KIT Lite From Analog Devices .......... 2-18

ADSP-21375 EZ-KIT Lite From Analog Devices .......... 2-21

ADSP-21371 EZ-KIT Lite From Analog Devices .......... 2-24

ADSP-21369 EZ-KIT Lite From Analog Devices .......... 2-27

ADSP-21364 EZ-KIT Lite From Analog Devices .......... 2-30

ADSP-21262 EZ-KIT Lite From Analog Devices .......... 2-33

iv Getting Started With SHARC Processors

Contents

EZ-Boards ........................................................................ 2-36

ADSP-21489 EZ-Board From Analog Devices ............... 2-37

ADSP-21479 EZ-Board From Analog Devices ............... 2-40

ADSP-21469 EZ-Board From Analog Devices ............... 2-43

Debug Agent ................................................................. 2-46

EZ-Extender Daughter Boards ....................................... 2-47

SHARC USB EZ-Extender ............................................ 2-47

SHARC EZ-Extender .................................................... 2-49

SHARC Audio EZ-Extender .......................................... 2-51

USB EZ-Extender for Blackfin and SHARC .................. 2-53

JTAG Emulators ............................................................... 2-54

High Performance USB 2.0 JTAG Emulator .................. 2-55

USB 1.1 JTAG Emulator ............................................... 2-58

Selecting the Right Combination of Tools .............................. 2-60

Scenario 1 ......................................................................... 2-60

Scenario 2 ......................................................................... 2-61

Software Development on SHARC Processors ........................ 2-61

SUPPORT OPTIONS

Available Support .......................................................................... 3-1

Analog Devices Web Site ......................................................... 3-1

Processor and Development Tools Selection Information ...... 3-2

Getting Started Information ................................................ 3-2

Applications Notes, EE-Notes, and Other Articles ............... 3-3

Communities-Related Information ...................................... 3-3

Getting Started With SHARC Processors v

Contents

Platform-Related Information ............................................. 3-3

Visual Learning and Development (VLD) ........................... 3-4

Workshops and Seminars ......................................................... 3-4

SHARC Processor Workshops ............................................. 3-4

SHARC Processor Seminars ................................................ 3-5

Processor Documentation ........................................................ 3-5

SHARC Processor Manuals ................................................. 3-5

Hardware Reference Manuals .......................................... 3-6

Programming Reference .................................................. 3-6

Data Sheets ........................................................................ 3-7

Anomalies Lists for Processors and Tools ............................ 3-7

BSDL Files ......................................................................... 3-8

IBIS Models ....................................................................... 3-8

CROSSCORE Tools Documentation ...................................... 3-8

VisualDSP++ Documentation ............................................. 3-9

VisualDSP++ Getting Started Guide ............................... 3-9

VisualDSP++ User’s Guide ............................................ 3-10

VisualDSP++ C/C++ Compiler Library Manual for

SHARC Processors ..................................................... 3-10

VisualDSP++ Runtime Library Manual for SHARC

Processors .................................................................. 3-10

VisualDSP++ Assembler and Preprocessor Manual ......... 3-10

VisualDSP++ Linker and Utilities Manual ..................... 3-11

VisualDSP++ Kernel (VDK) User’s Guide ..................... 3-11

vi Getting Started With SHARC Processors

Contents

VisualDSP++ Loader and Utilities Manual ..................... 3-11

VisualDSP++ Example Programs ................................... 3-12

Hardware Tools Documentation ........................................ 3-13

SHARC EZ-KIT Lite Evaluation System Manual ........... 3-13

SHARC EZ-Board Evaluation System Manual ............... 3-14

SHARC EZ-Extender Manual ....................................... 3-14

VisualDSP++ Help ............................................................ 3-14

Find a Third Party—Faster Time to Market ........................... 3-15

EngineerZone ........................................................................ 3-15

Social Networking Web Sites ................................................. 3-16

MyAnalog.com ...................................................................... 3-16

INDEX

Getting Started With SHARC Processors vii

Contents

viii Getting Started With SHARC Processors

PREFACE

Thank you for your interest in the SHARC® family of processors from
Analog Devices, Inc.

Purpose of This Manual

Getting Started With SHARC Processors provides you with information
about the evaluation process, Analog Devices tools, training, documenta­tion, and other informational resources to assist you in the evaluation of
SHARC processors. This manual describes the resources available to help
you evaluate and design the SHARC processors into your final system.

For engineers already using SHARC processors in their designs, this guide
provides resources and pointers to help transition your system to take
advantage of the newest generation of processors. For detailed descriptions
of processor internal architectures, refer to the applicable hardware refer­ence manual. For detailed descriptions of processor software, refer to the
applicable programming reference manual. A complete list of documents
that support your product can be found at the Analog Devices Web site at:

http://www.analog.com/processors/technical_library

Intended Audience

The primary audiences for this guide are system designers, programmers,
and hardware engineers who want to learn whether a specific SHARC
processor matches design requirements for new applications.

Getting Started With SHARC Processors ix

Manual Contents

Manual Contents

This manual consists of:

• Chapter 1, “Introduction to SHARC Processors”
This chapter briefly describes the processor architecture, available
models, and processor features.

• Chapter 2, “The Evaluation Process”
This chapter focuses on available software and hardware tools.

• Chapter 3, “Support Options”
This chapter describes support (documentation, training, and
more) available during the evaluation and development processes.

What’s New in This Manual

This is Revision 3.0 of Getting Started With SHARC Processors. Changes to
this book from Revision 2.0 include:

• Addition of fourth generation SHARC products

• Corrections of typographic errors and reported document errata

Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following
ways:

• Visit the Embedded Processing and DSP products Web site at:

http://www.analog.com/processors/technical_support

• E-mail tools questions to:

[e-mail]

x Getting Started With SHARC Processors

Preface

• E-mail processor questions to:

[e-mail] (World wide support)
[e-mail] (Europe support)
[e-mail] (China support)

• Phone questions to 1-800-ANALOGD

• Contact your Analog Devices, Inc. local sales office or authorized
distributor

Supported SHARC Processors

The name “SHARC” refers to a family of high performance, 32-bit,
floating-point processors that can be used in speech, sound, graphics, and
imaging applications. VisualDSP++® currently supports the following
SHARC processors:

ADSP-21020 ADSP-21060 ADSP-21061 ADSP-21062

ADSP-21065L ADSP-21160 ADSP-21161 ADSP-21261

ADSP-21262 ADSP-21266 ADSP-21362 ADSP-21363

ADSP-21364 ADSP-21365 ADSP-21366 ADSP-21367

ADSP-21368 ADSP-21369 ADSP-21371 ADSP-21375

ADSP-21462 ADSP-21465 ADSP-21467 ADSP-21469

ADSP-21478 ADSP-21479 ADSP-21483 ADSP-21486

ADSP-21487 ADSP-21488 ADSP-21489

The list of supported SHARC processors is subject to change. For a com­plete and up-to-date listing of SHARC processors refer to:

http://www.analog.com/sharc

Getting Started With SHARC Processors xi

Product Information

Product Information

Product information can be obtained from the Analog Devices Web site,
VisualDSP++ online Help system, and a technical library CD.

Analog Devices Web Site

The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.

To access a complete technical library for each processor family, go to

http://www.analog.com/processors/technical_library. The manuals

selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.

Also note, MyAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest infor­mation about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
MyAnalog.com provides access to books, application notes, data sheets,
code examples, and more.

MyAnalog.com to sign up. If you are a registered user, just log on.

Visit
Your user name is your e-mail address.

xii Getting Started With SHARC Processors

Preface

VisualDSP++ Online Documentation

Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, Dinkum
Abridged C++ library, and FLEXnet License Tools software documenta­tion. You can search easily across the entire VisualDSP++ documentation
set for any topic of interest.

For easy printing, supplementary Portable Documentation Format (.pdf)
files for all manuals are provided on the VisualDSP++ installation CD.

Each documentation file type is described as follows.

File Description

.chm Help system files and manuals in Microsoft® help format

.htm or
.html

.pdf VisualDSP++ and processor manuals in PDF format. Viewing and printing the

Dinkum Abridged C++ library and FLEXnet License Tools software documenta­tion. Viewing and printing the .html files requires a browser, such as Internet
Explorer 6.0 (or higher).

.pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).

Technical Library CD

The technical library CD contains seminar materials, product highlights, a
selection guide, and documentation files of processor manuals,
VisualDSP++ software manuals, and hardware tools manuals for the fol­lowing processor families: Blackfin®, SHARC, TigerSHARC®,
ADSP-218x, and ADSP-219x.

To order the technical library CD, go to http://www.analog.com/proces-

sors/technical_library

processor, click the request CD check mark, and fill out the order form.

, navigate to the manuals page for your

Getting Started With SHARC Processors xiii

Product Information

Data sheets, which can be downloaded from the Analog Devices Web site,
change rapidly, and therefore are not included on the technical library
CD. Technical manuals change periodically. Check the Web site for the
latest manual revisions and associated documentation errata.

xiv Getting Started With SHARC Processors

1 INTRODUCTION TO SHARC

PROCESSORS

This chapter briefly describes the SHARC processor’s architecture and key
features and compares available models.

Topics include:

• “What are SHARC Processors?” on page 1-1

• “Four Generations of SHARC Processors” on page 1-5

What are SHARC Processors?

SHARC is the name of a family of high performance 32-bit floating-point
processors based on a Super Harvard Architecture. SHARC processors
dominate the floating-point digital signal processing market, delivering
exceptional core and memory performance complemented by outstanding
I/O throughput. The industry standard SHARC family makes float­ing-point processing economical for applications where performance and
dynamic range are key considerations such as home, professional, and
automotive audio, medical, and industrial and instrumentation products.

The SHARC processor portfolio currently consists of four generations of
products providing code-compatible solutions, ranging from entry-level
products priced at less than $10 to the highest performance products
offering fixed- and floating-point computational power to 450 MHz/2700
MFLOPs. Regardless of the specific product choice, all SHARC processors
provide a common set of features and functionality usable across many
signal processing markets and applications. This baseline functionality

Getting Started With SHARC Processors 1-1

What are SHARC Processors?

enables the SHARC user to leverage legacy code and design experience,
while transitioning to higher-performance, more highly-integrated
SHARC products.

By integrating on-chip, single-instruction, multiple-data (SIMD) process­ing elements, SDRAM, and I/O peripherals, SHARC processors deliver
breakthrough signal processing performance.

SHARC Applications

The combination of a high performance core surrounded by appropriate
peripherals, a large software library, and award-winning development tools
makes SHARC processors the ideal choice for audio and broad market
processor applications. Here are some applications:

• Home theater/digital home applications. The ADSP-21266,

ADSP-21365, ADSP-21366, ADSP-21367, ADSP-21467,
ADSP-21483, ADSP-21486, and ADSP-21487 processors enable
highly efficient software implementations of audio decode and
postprocessing algorithms, such as Dolby® Digital, Dolby Digital
EX, DTS-ES Discrete 6.1, DTS-ES Matrix 6.1, DTS 96/24™ 5.1,
DTS-HD, DTS Express, MPEG-2 AAC LC, MPEG-2 BC 2ch,
Dolby Pro Logic II, Dolby Pro Logic 2x, Dolby True HD, DTS
Neo:6, DDPlus DCV, Neural Audio, Audyssey room equalization,
and WMA Pro. Libraries of all standard—and many proprietary—
audio algorithms reside in on-chip ROM, eliminating the need for
external ROM.

• Professional audio applications. A number of third generation

(ADSP-2136x) and fourth generation (ADSP-2146x) SHARC pro­cessors are well-suited for professional audio applications requiring
high processing power and advanced on-chip peripherals such as
sample rate conversion, S/PDIF transmitter/receiver, and BGA and
LQFP package options.

1-2 Getting Started With SHARC Processors

• Automotive audio applications. The ADSP-21362, ADSP-21365,
ADSP-21369, ADSP-21371, ADSP-21462, ADSP-21465,
ADSP-21469, ADSP-21472, ADSP-21475, and ADSP-21479
processors, with integration of sample-rate conversion, DTCP
cipher, precision clock generators, and serial ports, are ideal choices
for new multichannel automotive audio designs.

• Broad market use. SHARC processors are available in commercial,
industrial, and automotive temperature grade packages. They are
used in a wide variety of signal processing applications, providing
up to 450 MHz performance in a single-instruction, multiple-data
architecture (SIMD). Applications include imaging, medical
devices, communications, military, test equipment, 3-D graphics,
speech recognition, and motor control.

Architecture Overview

Introduction to SHARC Processors

This section describes architectural features of the SHARC processor.

Super Harvard Architecture

The 32-bit floating-point SHARC processors from Analog Devices are
based on a Super Harvard Architecture that balances exceptional core and
memory performance with outstanding I/O throughput capabilities. This
architecture extends the original concepts of separate program and data
memory buses by adding an I/O processor with its associated dedicated
buses.

In addition to satisfying the demands of the most computationally-inten­sive, real-time signal processing applications, SHARC processors integrate
large memory arrays and application-specific peripherals designed to sim­plify product development and reduce time to market.

Getting Started With SHARC Processors 1-3

What are SHARC Processors?

Common Architectural Features

SHARC processors share the following architectural features.

• 32/40-bit IEEE floating-point math

• 32-bit fixed-point multipliers with 64-bit product and 80-bit accu­mulation

• No arithmetic pipeline. All computations are single cycle.

• Circular buffer addressing supported in hardware

• Sixteen address pointers supporting 16 circular buffers

• Six nested levels of zero-overhead looping in hardware

• Rich algebraic assembly language syntax

• Conditional arithmetic, bit manipulation, divide and square root,
bit field deposit and extract supported by instruction set

• Zero-overhead background transfers at full clock rate without pro­cessor intervention

In the core, every instruction can execute in a single cycle. The buses and
instruction cache provide rapid unimpeded data flow to the core to main­tain the execution rate.

Figure 1-1 shows a detailed block diagram of a single core SHARC 32-bit

processor and the I/O processor (IOP). It illustrates the following archi­tectural features:

• Two processing elements (PEx and PEy), each containing 32-bit
IEEE floating-point computation units—multiplier, arithmetic
logic unit (ALU), shifter, and data register file

• Program sequencer with related instruction cache, interval timer,
and data address generators (DAG1 and DAG2)

1-4 Getting Started With SHARC Processors

Introduction to SHARC Processors

• An SDRAM controller that provides an interface to as many as four
separate banks of industry-standard SDRAM devices

• Up to a maximum of 5M bits of on-chip SRAM and up to 4M bits
of on-chip, mask-programmable ROM

• Input/output processor (IOP) with integrated direct memory
access (DMA) controller, serial peripheral interface (SPI) compati­ble port, and serial ports (SPORTs) for point-to-point
multiprocessor communications

• A variety of audio-centric peripheral modules including a
Sony/Philips digital interface (S/PDIF), sample rate converter
(SRC), and pulse width modulation (PWM)

• JTAG test access port for emulation

Figure 1-1 also shows the three on-chip buses of the

ADSP-21472/21475/21479 processors: the PM bus, DM bus, and I/O
bus. The PM bus provides access to instructions or data. During a single
cycle, these buses let the processor access two data operands from memory,
access an instruction (from cache), and perform a DMA transfer. In addi­tion, Figure 1-1 shows the asychronous memory interface available on the
ADSP-2147x processors.

Four Generations of SHARC Processors

The SHARC architecture has a long history in the floating-point proces­sor market. While architectural enhancements have been made with each
successive processor generation, the common traits of exceptional float­ing-point performance, matched to high-bandwidth memory and I/O
transfers, remains. All four generations of SHARC processors are still in
production, offering a variety of code-compatible options to meet a wide
array of price, performance, and footprint requirements.

Getting Started With SHARC Processors 1-5

What are SHARC Processors?

Internal Memory I/F

Block 0

RAM/ROM

B0D

64-BIT

Instruction

Cache

5Stage

Sequencer

PEx PEy

PMD

64-BIT

IOD0 32-BIT

EPD BUS 64-BIT

Core Bus

Cross Bar

S/PDIF
Tx/Rx

PCG
A

-

D

DPI Routing/Pins

SPI/B UART

Block 1

RAM/ROM

Block 2

RAM

Block 3

RAM

AMI

SDRAM

CTL

EP

External Port Pin MUX

TIMER

1

-

0

SPORT

7

-

0

ASRC

3-0

PWM

3

-

0

DAG1/2

Core

Timer

PDAP/

IDP
7

-

0

TWI

IOD0 BUS

DTCP/

MTM

PCG
C

-

D

PERIPHERAL BUS

32-BIT

CORE

FLAGS/

PWM3

-

1

JTAG

Internal Memory

DMD

64-BIT

PMD 64-BIT

CORE

FLAGS

IOD1
32-BIT

PERIPHERAL BUS

B1D

64-BIT

B2D

64-BIT

B3D

64-BIT

DPI Peripherals

DAI Peripherals

Peripherals

External
Port

SIMD Core

S

THERMAL

DIODE

FFT
FIR

IIR

MLB

SPEP BUS

DMD

64-BIT

FLAGx/IRQx/
TMREXP

WDT

RTC

SHIFT

REG

DAI Routing/Pins

Figure 1-1. ADSP-2147x Processor Block Diagram

First generation SHARC products offer performance of up to
66 MHz/198 MFLOPS and form the cornerstone of the SHARC proces­sor family. Their easy-to-use instruction set architecture that supports
both 32-bit fixed-point and 32/40-bit floating-point data formats, com­bined with large memory arrays and sophisticated communications ports,
make them suitable for a wide array of parallel processing applications
including consumer audio, medical imaging, military, industrial, and
instrumentation.

Second generation SHARC products double the level of signal processing
performance (100 MHz/600 MFLOPS) by utilizing a single-instruction,
multiple-data (SIMD) architecture. This hardware extension doubles the
number of computational resources available to the system programmer.
Second generation products contain dual multipliers, ALUs, shifters, and
data register files, significantly increasing overall system performance in a

1-6 Getting Started With SHARC Processors

Introduction to SHARC Processors

variety of applications. This capability is especially relevant in consumer,
automotive, and professional audio where the algorithms related to stereo
channel processing can effectively utilize the SIMD architecture.

Third generation SHARC products employ an enhanced SIMD architec­ture that extends CPU performance to an impressive 400 MHz/2.4
GFLOPS. These products also integrate a variety of ROM configurations
and audio-centric peripherals designed to decrease time to market and
reduce the overall bill of materials costs. Third generation SHARC audio
processors feature a high level of integrated on-chip peripherals, such as
multichannel audio surround sound decoders and postprocessing algo­rithms, S/PDIF transmitter/receiver, high performance asynchronous
sample rate conversion, PWM channels, code security, and DTCP cipher
for protection of digital data in automobiles. A number of third genera­tion processors are also pin compatible for use with a single hardware
platform. This increased level of performance and peripheral integration
allow third generation SHARC processors to be considered as single chip
solutions for a variety of audio markets.

Fourth generation SHARC products not only increase the core perfor­mance to an industry-leading 450 MHz/2.7 GFLOPS but also boost the
performance with the addition of accelerator blocks implementing the
FIR, IIR, and FFT functions to off-load core activities from being con­sumed by filter processing. Fourth generation SHARC processors
integrate some of the highest memory on-chip RAM with a capacity of
5M bits. Extra memory capacity is further enhanced with the innovative
VISA (variable instruction set architecture) mode where programs can save
up to 30% of code size by reducing the opcodes for many instructions. For
industrial and automotive applications, fourth generation processors also
incorporate a thermal diode to allow customers the flexibility to operate in
higher ambient operating temperature conditions without sacrificing on
overall performance. DTCP cipher for protection of digital data in auto­motive applications is also integrated in automotive parts.

Getting Started With SHARC Processors 1-7

Processor Peripherals and Performance

Integration of peripherals continue with serial ports, SPI ports, S/PDIF
Tx/Rx, and an 8-channel asynchronous sample rate converter block. The
fourth generation SHARC allows data from the serial ports to be directly
transferred to external memory by the DMA controller, again preserving
internal memory space for code and data. The fourth generation processor
also incorporates link ports that allow processor-to-processor communica­tion for data movement. Some fourth generation SHARC processors also
integrate real-time clock (RTC) and watchdog timer functionality. In
addition, a number of fourth generation processors are also pin compati­ble for use with a single hardware platform.

Each SHARC processor provides unique capabilities, while being code
compatible with previous generations of SHARC devices, so legacy code is
easily ported to the newer products. Table 1-1, Table 1-2, Table 1-3,

Table 1-4, and Table 1-5 list key SHARC processor specifications.

more information, view the SHARC processor selection table online at the
Analog Devices Web site at:

For

http://www.analog.com/sharc

Processor Peripherals and Performance

SHARC processors represent a class of devices that combine an extremely
capable single-instruction, multiple-data (SIMD) processor engine with
features like core timers, general-purpose timers, UARTs, and SPI ports.

In addition to advanced peripherals, SHARC processors use a software
programmable, on-chip phase lock loop (PLL) that allows software control
during runtime of core and peripheral clock of the SHARC processors.

Performance

Real-time signal processing tasks are I/O and computationally intensive.
In addition to high speed math units and single cycle instruction

1-8 Getting Started With SHARC Processors

Introduction to SHARC Processors

execution (including single cycle multiply accumulates [MACs]), SHARC
processors are designed for maximum I/O and memory access bandwidth.
This balance of core speed, memory integration, and I/O bandwidth
achieves the sustained performance critical to real-time applications.

Table 1-1. ADSP-2126x SHARC Processor Specifications

ADSP-21261 ADSP-21262 ADSP-21266

Frequency (MHz) 150 200 200

On-Chip RAM 1M bit 2M bit 2M bit

On-Chip ROM 3M bit 4M bit 4M bit

SRC 0 0 0

PWM 0 0 0

UART 0 0 0

SPI 1 1 1

SPDIF 0 0 0

TWI 0 0 0

Timer 3 3 3

SPORT 4 6 6

SRU 1 1 1

DTCP 0 0 0

PCG 2 2 2

Temp. Grade –40°C to +85°C –40°C to +85°C –40°C to +105°C

Execution from Ext. Memory? No No No

Getting Started With SHARC Processors 1-9

Processor Peripherals and Performance

Table 1-2. ADSP-2136x/ADSP-2137x SHARC Processor Specifications

Frequency
(MHz)

On-Chip
RAM

On-Chip
ROM

SRC

PWM

UART

SPI

SPDIF

TWI

Timer

SPORT

SRU

DTCP

PCG

Te m p.
Grade

Execution
from Ext.
Memory?

ADSP­21362

333 333 333 333 333 266,

3M bit 3M bit 3M bit 3M bit 3M bit 2M bit 2M bit 2M bit 1M bit 0.5M bit

4M bit 4M bit 4M bit 4M bit 4M bit 6M bit 6M bit 6M bit 4M bit 2M bit

–128dB 0 –140dB –128dB –128dB –128dB –140dB –128dB 0 0

1111111111

1111122211

2221122222

1111111110

0000011111

3333333322

6666688884

1111111111

1001100000

2222244444

–40°C
to
+85°C

No No No No No No No No Yes Yes

ADSP­21363

–40°C
to
+105°C

ADSP­21364

–40°C
to
+105°C

ADSP­21365

–40°C
to
+85°C

ADSP­21366

–40°C
to
+85°C

ADSP­21367

333,
400

–40°C
to
+85°C

ADSP­21368

333,
400

–40°C
to
+85°C

ADSP­21369

266,
333,
400

–40°C
to
+85°C

ADSP­21371

266 266

0°C to
+70°C

ADSP­21375

0°C to
+70°C

1-10 Getting Started With SHARC Processors

Introduction to SHARC Processors

Table 1-3. ADSP-2146x SHARC Processor Specifications

ADSP-21462 ADSP-21465 ADSP-21467 ADSP-21469

Frequency (MHz) 400 400 450 450

On-Chip RAM 5M bit 5M bit 5M bit 5M bit

On-Chip ROM 0M bit 4M bit 4M bit 0M bit

SRC –128dB –128dB –128dB –128dB

PWM1111

UART1111

SPI 2222

SPDIF1111

TWI1111

Timer2222

SPORT8888

SRU 1111

DTCP1100

PCG4444

Tem p. Gr ade at
450 MHz

Tem p. Gr ade at
400 MHz

Execution from Ext.
Memory?

MLB
(Media Local Bus)

FIR Accelerators Yes Yes Yes Yes

IIR Accelerators Yes Yes Yes Yes

FFT Accelerators Yes Yes Yes Yes

Link Ports2222

Thermal Diode Yes Yes Yes Yes

— — 0°C to +70°C 0°C to +70°C

–40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C

Yes Yes Yes Yes

Yes Yes No No

Getting Started With SHARC Processors 1-11

Processor Peripherals and Performance

Table 1-3. ADSP-2146x SHARC Processor Specifications (Cont’d)

ADSP-21462 ADSP-21465 ADSP-21467 ADSP-21469

DDR2 Interface Yes Yes Yes Yes

VISA Yes Yes Yes Yes

1-12 Getting Started With SHARC Processors

Introduction to SHARC Processors

Table 1-4. ADSP-2147x SHARC Processor Specifications

ADSP-21478 ADSP-21479

Frequency (MHz) 266 266

On-Chip RAM 3M bit 5M bit

On-Chip ROM 0M bit 0M bit

SRC –128dB –128dB

PWM 4 4

UART 1 1

SPI 2 2

SPDIF 1 1

TWI 1 1

Timer 2 2

SPORT 8 8

SRU 1 1

DTCP 0 0

PCG 4 4

Temp. Grade 0°C to +70°C –40°C to +105°C

Execution from Ext. Memory? Yes Yes

MLB (Media Local Bus) No No

FIR Accelerators Yes Yes

IIR Accelerators Yes Yes

FFT Accelerators Yes Yes

Thermal Diode No No

SDRAM Interface Yes Yes

VISA Yes Yes

WDT Yes Yes

RTC Yes Yes

Shift Register Yes Yes

Getting Started With SHARC Processors 1-13

Processor Peripherals and Performance

Table 1-4. ADSP-2147x SHARC Processor Specifications (Cont’d)

ADSP-21478 ADSP-21479

AMI Interface 16 bit Yes Yes

SDRAM Bus Width 16 bit 16 bit

IDP/PDAP Yes Yes

1-14 Getting Started With SHARC Processors

Introduction to SHARC Processors

Table 1-5. ADSP-2148x SHARC Processor Specifications

ADSP-21483 ADSP-21486 ADSP-21487 ADSP-21488 ADSP-21489

Frequency (MHz)

On-Chip RAM

On-Chip ROM

SRC

PWM

UART

SPI

SPDIF

TWI

Timer

SPORT

SRU

PCG

Tem p. Gr ade

Execution from Ext.
Memory?

MLB (Media Local Bus)

FIR Accelerators

IIR Accelerators

FFT Accelerators

WDT

AMI Interface 16 bit

SDRAM Bus Width

IDP/PDAP

400 400 400 400 400

3M bit 5M bit 5M bit 3M bit 5M bit

4M bit 4M bit 4M bit 0M bit 0M bit

–140dB –128dB –128dB –128dB –128dB

44444

11111

22222

11111

11111

33333

88888

11111

44444

–40°C to
+85°C

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

Yes Yes Yes Yes Yes

16 bit 16 bit 16 bit 16 bit 16 bit

Yes Yes Yes Yes Yes

–40°C to
+105°C

–40°C to
+85°C

–40°C to
+85°C

–40°C to
+85°C

Getting Started With SHARC Processors 1-15

Processor Peripherals and Performance

1-16 Getting Started With SHARC Processors