Page 1
2.5 V Precision
T
FEATURES
2.5 voltage output, ±0.6% maximum
Wide input voltage range: 4.5 V to 33 V
Supply current: 1.4 mA maximum
Output voltage temperature coefficient: 50 ppm/°C
maximum
Line regulation: 50 ppm/V maximum
Load regulation: 100 ppm/mA maximum
Extended industrial temperature range: −40°C to +85°C
Low cost
GENERAL DESCRIPTION
The REF03 precision voltage reference provides a stable 2.5 V
output, with minimal change for variations in supply voltage,
ambient temperature, or loading conditions. Single-supply
operation over an input voltage range of 4.5 V to 33 V with
a current drain of 1 mA and good temperature stability is
achieved using an improved band gap design. Primarily
targeted at price sensitive applications, the REF03 is available
in plastic PDIPs and surface-mount small outline plastic
packages. For improved performance or −40°C to +125°C
operation, see the
ADR03 data sheet.
R8
Q8
R7
Q7
Q14
R14
Q13
Voltage Reference
PIN CONFIGURATION
1
NC
REF03
2
V
IN
V
TEMP
GND
NOTES
1. NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
2. TRIM PINAND V
FLOATING IF THEY ARE NOT BEING USED.
TOP VIEW
3
(Not to Scale)
4
PIN SHOULD BE LEFT
TEMP
Figure 1. 8-Lead PDIP (P-Suffix),
8-Lead SOIC (S-Suffix)
Q15
R15
2
8
7
6
5
INPU
NC
NC
V
OUT
TRIM
REF03
00372-001
Q9
C1
R6
R3
Q1
R1
R2
R4
Q4
R5
Q2
Q6
Q5
Q3
Q20
R10
Q10
Figure 2. Simplified Schematic
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Q12
Q11
≈
Q18
Q16
Q19
Q21
1.23V
Q17
R13
R12
16.7kΩ
R11
2kΩ
R9
50kΩ
OUTPUT
6
TRIM
5
GROUND
4
00372-002
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
Page 2
REF03
TABLE OF CONTENTS
Features.............................................................................................. 1
General Description ......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Electrical Specifications ................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
REVISION HISTORY
6/07—Rev. F to Rev. G
Changes to Figure 1.......................................................................... 1
Changes to Applications Section .................................................... 7
Added Figure 15................................................................................ 7
Deleted Figure 21.............................................................................. 7
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide.......................................................... 10
6/04—Data Sheet changed from Rev. E to Rev. F
Updated Formatting...........................................................Universal
Changes to Simplified Schematic................................................... 1
Changes to Electrical Specifications .............................................. 3
Changes to Ordering Guide............................................................ 8
Applications........................................................................................7
Generating an Adjustable Bipolar Voltage Reference...............7
Generating a −2.5 V Reference....................................................7
Boost Transistor Provides High Output Current......................8
CMOS DAC Reference .................................................................8
Outline Dimensions..........................................................................9
Ordering Guide .......................................................................... 10
2/04—Data Sheet changed from Rev. D to Rev. E
Changes to Simplified Schematic....................................................1
Changes to Electrical Specifications ...............................................2
Changes to Ordering Guide.............................................................3
Replaced TPC 1 .................................................................................4
8/03—Data Sheet changed from Rev. C to Rev. D
Updated format...................................................................Universal
Changes to Features ..........................................................................1
Changes to General Description .....................................................1
Replaced Wafer Test Limits..............................................................2
Changes to Electrical Specifications ...............................................2
Changes to Ordering Guide.............................................................3
Added Outline Dimensions .............................................................7
Rev. G | Page 2 of 12
Page 3
REF03
V
V
ELECTRICAL SPECIFICATIONS
@ VIN = 15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1.
REF03G
Parameter Symbol Conditions
Min Typ Max
Output Voltage VO No load 2.485 2.500 2.515 V
Output Voltage Tolerance No load 0.2 0.6 %
Output Voltage
Temperature Coefficient
Line Regulation V
1
TCVO 10 50 ppm/°C
= 4.5 V to 33 V 20 50 ppm/V
IN
0.002 0.005 %/V
Load Regulation IL = 0 mA to 10 mA 60 100 ppm/mA
0.006 0.010 %/mA
Load Current (Sourcing) IL 10 mA
Load Current (Sinking) IS −0.3 −0.5 mA
Short-Circuit Output Current ISC Output shorted to ground 24 mA
Quiescent Supply Current ISY No load 1.0 1.4 mA
Turn-On Settling Time
2
tON To ±0.1% of final value 5 μs
Output Voltage Noise en p-p 0.1 Hz to 10 Hz 6 μV p-p
Output Adjustment Range ∆V
R
TRIM
= 10 kΩ ±6 ±11 %
POT
Input Voltage Range 4.5 15 33 V
Temperature Voltage Output
1
TCVO is measured by the endpoint method, and is equal to
()( )
()
×
2
Guaranteed by design.
3
Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
oo
4085
CVCV
−−
6oo
−
()
125105.2
C
3
Cppm/in
VT 620 mV
+18
Unit
10Ω
2
V
IN
REF03
GND
4
–18V
+
+
10µF
10µF
00372-003
+
2
V
IN
V
REF03
TRIM
GND
4
OUT
6
5
10kΩ
V
OUT
0372-004
Figure 3. Burn-In Circuit Figure 4. Output Voltage Trim Method
Rev. G | Page 3 of 12
Page 4
REF03
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Absolute maximum
ratings apply to both DICE and packaged parts, unless
otherwise noted.
Table 2.
Parameter Rating
Input Voltage 40 V
Output Short-Circuit Duration Indefinite
Operating Temperature Range
REF03G (P-Suffix, S-Suffix) −40°C to +85°C
Storage Temperature Range −65°C to +175°C
Junction Temperature Range −65°C to +175°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 3. Package Thermal Resistance
Package Type θ
1
θ
JA
JC
Unit
8-Lead PDIP (P-Suffix) 110 50 °C/W
8-Lead SOIC (S-Suffix) 160 44 °C/W
1
θJA is specified for worst-case mounting conditions, that is, θJA is specified for
the device in socket for a PDIP package. θJA is specified for the device
soldered to printed circuit board for a SOIC package.
ESD CAUTION
Rev. G | Page 4 of 12
Page 5
REF03
TYPICAL PERFORMANCE CHARACTERISTICS
20
TA = 25°C
19
35
VIN = 15V
30
18
17
16
MAXIMUM LO AD CURRENT (mA)
15
14
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
Figure 5. Maximum Load Current vs. Input Voltage
65
TA = 25°C
60
55
50
LOAD REGULATION (ppm/mA)
25
20
15
10
MAXIMUM LO AD CURRENT (mA)
5
0
–40 –20 0 20 40 60 80 100
00372-005
TEMPERATURE (°C)
00372-008
Figure 8. Maximum Load Current vs. Temperature
1.2
VIN = 15V
1.1
1.0
0.9
QUIESCENT CURRENT (mA)
45
4 8 12 16 20 24 28 32
Figure 6. Load Regulation (∆I
200
TA = 25°C
150
100
50
LOAD REGULATIO N (ppm/V)
0
4 8 12 16 20 24 28 32
INPUT VOLTAGE (–V)
= 10 mA) vs. Input Voltage
L
INPUT VOLTAGE (V)
Figure 7. Line Regulation vs. Input Voltage
0.8
–40 –20 0 20 40 60 80 100
00372-006
TEMPERATURE (°C)
00372-009
Figure 9. Quiescent Current vs. Temperature
= 25°C
10
32
100
320
1000
3200
10000
32000
LINE REGULATION (p pm/V)
00372-010
92
82
72
62
52
42
LINE REGULATIO N (dB)
32
22
10 100 1k 10k 100k 1M
00372-007
FREQUENCY ( Hz)
VIN = 15V
T
A
Figure 10. Line Regulation vs. Frequency
Rev. G | Page 5 of 12
Page 6
REF03
1.4
VIN = 15V
1.3
1.2
1.1
1.0
0.9
0.8
LOAD REG – T EMP/LOAD REG (25°C)
0.7
0.6
–40 –20 0 20 40 60 80 100
Figure 11. Normalized Load Regulation (∆I
TEMPERATURE (° C)
L
= 10 mA) vs. Temperature
00372-011
TA = 25°C
V
= 15V
IN
0.1Hz TO 10Hz
3.2 5.9 8.6
OUTPUT VOLTAGE NOISE (µV p -p)
Figure 13. Typical Distribution of Output Voltage Noise
00372-013
1000
VIN = 15V
T
= 25°C
A
100
10
OUTPUT NOI SE (µV p-p )
1
10 100 1k 10k 100k 1M
FREQUENCY ( Hz)
Figure 12. Wideband Output Noise vs. Bandwidth (0.1 Hz to
Frequency Indicated)
–40°C ≤ TA ≤ +85°C
V
= 15V
IN
00372-012
OUTPUT VOLTAGE TEMPERATURE COEF FICIENT (ppm/ °C)
0153045–45 –30 –15
00372-014
Figure 14. Typical Distribution of Output Voltage Temperature Coefficient
Rev. G | Page 6 of 12
Page 7
REF03
V
V
V
APPLICATIONS
The REF03 provides a stable 2.5 V output voltage with minimal
dependence on load current, line voltage, or temperature. This
voltage is typically used to set an absolute reference point in
data conversion circuits, or in analog circuits such as log amps,
4 mA to 20 mA transmitters, and power supplies. The REF03 is
of particular value in systems requiring a precision reference
using a single 5 V supply rail.
Because an on-board operational amplifier is used to amplify
the basic band gap cell voltage to 2.5 V, supply decoupling is
critical to the transient performance of a voltage reference. The
supply line should be bypassed with a 10 µF tantalum capacitor
in parallel with a 0.01 µF to 0.1 µF ceramic capacitor for best
results, as shown in
Figure 15. The bypass capacitors should
be located as close to the reference as possible. Inadequate
bypassing can lead to instabilities.
Output bypass capacitors are not generally recommended. If
necessary for high frequency output impedance reduction, the
capacitance value used should be at least 1 µF.
If the V
left floating. However, when V
and TRIM pins are not in use, then they should be
TEMP
is being used for temperature
TEMP
compensation, it must be connected to a very high impedance
node in the circuit, such as a noninverting input of a buffer.
GND
NC
NC
V
OUTPUT VOLTAGE
OUT
TRIM
00372-015
INPUT VOLTAGE
NC
V
IN
TEMP
GND
REF03
0.1µF10µF
V
Figure 15. Basic Connections
GENERATING AN ADJUSTABLE BIPOLAR VOLTAGE REFERENCE
There is often a requirement for an adjustable bipolar reference.
A simple method of generating such a reference is to connect
the output of the REF03 to an op amp in an adjustable gain
configuration, as shown in
is then used to generate the desired output voltage from −2.5 V
to +2.5 V.
+
Figure 16. The trimmable resistor
GENERATING A −2.5 V REFERENCE
Often, there is a requirement for a negative reference voltage.
The simplest method of generating a −2.5 V reference with the
REF03 is to connect an op amp in a gain of −1 to the output, as
shown in
2.5 V references.
a negative reference, in which the current-output element is a
PNP transistor, with the REF03 in a servo loop to ensure that
the output remains 2.5 V below ground.
Figure 17. This provides both positive and negative
Figure 18 shows another method of obtaining
+
2
V
IN
V
REF03
GND
4
6
OUT
100kΩ
100kΩ
2
OP97
3
Figure 17. ±2.5 V Reference
+5
1kΩ
2
V
IN
V
OUT
REF03
GND
+6.2V
2kΩ
–5V
4
2N2905
Figure 18. −2.5 V Reference
7
4
V–
6
–2.5V
+2.5V
6
–2.5V
00372-017
00372-018
2
V
IN
V
REF03
GND
4
OUT
6
50kΩ
50kΩ
50kΩ
2
3
OP97
V+
7
4
+15V
6
V
OUT
–2.5V TO +2.5V
00372-016
Figure 16. Adjustable Bipolar Reference
Rev. G | Page 7 of 12
Page 8
REF03
V
V
V
BOOST TRANSISTOR PROVIDES HIGH OUTPUT CURRENT
When applications require more than 10 mA current delivery,
an external boost transistor may be added to the REF03 to pass
the required current without dissipating excessive power within
the IC. The maximum current output to the system is bounded
only by the capabilities of the boost transistor.
this technique, with and without current limiting.
Current limiting may be used to prevent damage to the boost
transistor.
Figure 19A is an example of no current limit, while
Figure 19B shows the limit that occurs when the voltage dropped
across R2 exceeds one V
(0.6 V). The current limit is sensitive
BE
to the variations of the forward drop of the diodes and the
PNP’s V
with temperature, and also decreases with increasing
BE
temperature.
65Ω
2
V
IN
REF03
V
GND
4
OUT
+
2N2905
6
–2.5V
2.49kΩ
–
1N4148
2
V
IN
REF03
V
GND
4
OUT
R1
40Ω
6
2N2905
2.49kΩ
Figure 19 shows
R2
10Ω
–2.5V
0mA TO 100mA
CMOS DAC REFERENCE
The REF03 makes an excellent reference for use with CMOS
and bipolar DACs.
the
AD7393, a 12-bit CMOS DAC. An AD8603 with a common
mode input range that extends to its positive rail can be a good
combination with only 50 A of maximum current consumption.
+5
2
V
IN
REF03
GND
6
V
OUT
4
Figure 20 shows the REF03 connected to
470kΩ 470kΩ
V
DD
AD7393
V
REF
GND
V
OUT
Figure 20. CMOS DAC Reference
AD8603
–2.5V
V
OUT
2.5V TO –2.5V
00372-020
A. NO CURRENT LI MIT B. CURRENT LI MITING
Figure 19. Output Current Boost
00372-019
Rev. G | Page 8 of 12
Page 9
REF03
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
COPLANARITY
0.210 (5.33)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
0.10
CONTROLL ING DIMENSI ONS ARE IN MILLIMETERS; INCH DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DES IGN.
85
1
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-A A
BSC
6.20 (0.2441)
5.80 (0.2284)
4
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
Figure 21. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
S-Suffix
Dimensions shown in millimeters and (inches)
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
MAX
8
1
0.100 (2.54)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
BSC
5
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.015
(0.38)
MIN
SEATING
PLANE
0.005 (0.13)
MIN
0.060 (1.52)
MAX
0.015 (0.38)
GAUGE
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92)
MAX
45°
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
012407-A
CONTROLL ING DIMENS IONS ARE IN INCHES; MILLIMETER DI MENSIONS
(IN PARENTHESES) ARE ROUNDED-OF F INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DES IGN.
CORNER LEADS MAY BE CONFIGURED AS WHOL E OR HALF LEADS.
COMPLIANT TO JEDEC STANDARDS MS-001
Figure 22. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
P-Suffix
Dimensions shown in inches and (millimeters)
Rev. G | Page 9 of 12
070606-A
Page 10
REF03
ORDERING GUIDE
Part Number Initial Accuracy (%) Temperature Coefficient Temperature Range Package Description Package Option
REF03GP 0.2 10 −40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
REF03GPZ
REF03GS 0.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GS-REEL 0.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GS-REEL7 0.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GSZ
REF03GSZ-REEL10.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
REF03GSZ-REEL710.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
1
Z = RoHS Compliant Part.
1
1
0.2 10 −40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
0.2 10 −40°C to +85°C 8-Lead SOIC_N R-8 (P-Suffix)
Rev. G | Page 10 of 12
Page 11
REF03
NOTES
Rev. G | Page 11 of 12
Page 12
REF03
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00372-0-6/07(G)
Rev. G | Page 12 of 12
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