The LTC®6900 is a precision, low power oscillator that is
easy to use and occupies very little PC board space. The
oscillator frequency is programmed by a single external
resistor (R
accuracy operation (≤1.5% frequency error) without the
need for external trim components.
The LTC6900 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. The frequency-setting
resistor can vary from 10k to 2M to select a master
oscillator frequency between 100kHz and 20MHz (5V
supply). The three-state DIV input determines whether the
master clock is divided by 1, 10 or 100 before driving the
output, providing three frequency ranges spanning 1kHz
to 20MHz (5V supply). The LTC6900 features a proprietary
feedback loop that linearizes the relationship between R
and frequency, eliminating the need for tables to calculate
frequency. The oscillator can be easily programmed using
the simple formula outlined below:
f
=10MHz •
OSC
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
). The LTC6900 has been designed for high
SET
100,
DIV Pin = V
⎛
⎜
N•R
⎝
20k
SET
⎞
⎟
⎠
,N=
⎧
⎪
DIV Pin =Open
10,
⎨
⎪
DIV Pin =GND
1,
⎩
+
SET
TYPICAL APPLICATION
Clock Generator
10k ≤ R
SET
≤ 2M
5V
f
OSC
0.1μF
= 10MHz •
1
+
V
OUT
LTC6900
2
GND
3
SET
DIV
6900 TA01a
20k
()
N • R
SET
1kHz ≤ f
5
4
OSC
5V, N = 100
N = 1
≤ 20MHz
OPEN, N = 10
R
vs Desired Output Frequency
SET
10000
1000
(kΩ)
100
SET
R
10
÷100÷10÷1
1
1k100k1M10M
10k
DESIRED OUTPUT FREQUENCY (Hz)
6900 TA01b
100M
6900fa
1
Page 2
LTC6900
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage (V+) to GND .........................–0.3V to 6V
+
DIV to GND ....................................–0.3V to (V
SET to GND ....................................– 0.3V to (V
+ 0.3V)
+
+ 0.3V)
Operating Temperature Range (Note 8)
LTC6900C ............................................–40°C to 85°C
LTC6900I .............................................–40°C to 85°C
GND
SET
TOP VIEW
+
V
1
2
3
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
T
= 150°C, θJA = 256°C/W
JMAX
54OUT
DIV
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
ORDER INFORMATION
LEAD FREE FINISHTAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC6900CS5#PBFLTC6900CS5#TRPBFLTZM5-Lead Plastic TSOT-23–40°C to 85°C
LTC6900IS5#PBFLTC6900IS5#TRPBFLTZM5-Lead Plastic TSOT-23–40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to:
For more information on tape and reel specifi cations, go to:
http://www.linear.com/leadfree/
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. V+ = 2.7V to 5.5V, RL= 5k, CL = 5pF, Pin 4 = V+ unless otherwise noted.
All voltages are with respect to GND.
= 5V 5kHz ≤ f ≤ 10MHz
5kHz ≤ f ≤ 10MHz, LTC6900C
5kHz ≤ f ≤ 10MHz, LTC6900I
1kHz ≤ f < 5kHz
10MHz < f ≤ 20MHz
+
V
= 3V 5kHz ≤ f ≤ 10MHz
5kHz ≤ f ≤ 10MHz, LTC6900C
5kHz ≤ f ≤ 10MHz, LTC6900I
1kHz ≤ f < 5kHz
SET
+
= 3V
= 63.2k
≤ 400k
SET
≤ 400k
SET
≤ 400k
SET
SET
= 20k to 400k
V
= 63.2k
R
SET
+
= 3V to 5V, R
+
Pin 4 = Open, 20k ≤ R
Pin 4 = 0V, 20k ≤ R
Pin 4 = 0V (DIV by 1), R
, 20k ≤ R
+
or Open (DIV Either by 100 or 10)
±0.5
●
●
±0.5±2±1.5
●
●
20
20
●
●
●
●
±0.004%/°C
0.040.1%/V
300ppm/√kHr
49
45
±2
±2
0.1
0.2
0.6
50
50
±1.5
±2.0
±2.5
±2.0
±2.5
400
400
51
55
%
%
%
%
%
%
%
%
%
k
k
%
%
%
%
%
2
6900fa
Page 3
LTC6900
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
All voltages are with respect to GND.
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
V
I
V
V
I
V
V
t
t
+
S
IH
IL
DIV
OH
OL
r
f
Operating Supply Range
Power Supply CurrentR
High Level DIV Input Voltage
Low Level DIV Input Voltage
DIV Input Current (Note 5)Pin 4 = V
High Level Output Voltage (Note 5)V+ = 5V IOH = –1mA
V+ = 5V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, R
+
= 3V Pin 4 = V+ or Floating, RL = ∞
V
Pin 4 = 0V, R
= ∞
L
= ∞
L
V+ = 5V Pin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, R
+
= 3V Pin 4 = V+ or Floating, RL = ∞
V
Pin 4 = 0V, R
= ∞
L
= ∞
L
●
●
●
●
V+ – 0.4V
●
●
●
–4
●
4.8
●
4.5
●
2.7
●
2.2
●
●
●
●
●
0.32
0.29
0.92
0.68
2
–2
4.95
4.8
2.9
2.6
0.05
0.2
0.1
0.4
14
7
19
11
13
6
19
10
0.42
0.38
1.20
0.86
mA
mA
mA
mA
0.5V
4µA
0.15
0.4
0.3
0.7
µA
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of R
(see the Selecting the Divider Setting Resistor
SET
paragraph in the Applications Information section). For these frequencies,
the error is specifi ed under the following assumption: 20k < R
SET
≤ 200k.
Note 3: Frequency accuracy is defi ned as the deviation from the
f
equation.
OSC
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specifi cation is based on characterization and
is not 100% tested. Also, see the Peak-to-Peak Jitter vs Output Frequency
curve in the Typical Performance Characteristics section.
Note 5: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and 90%
power supply levels. These specifi cations are based on characterization.
Note 7: Guaranteed by 5V test.
Note 8: The LTC6900C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LTC6900C is designed, characterized and expected to
meet specifi ed performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6900I is guaranteed to meet
specifi ed performance from –40°C to 85°C.
6900fa
3
Page 4
LTC6900
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Variation vs R
4
TA = 25°C
3
GUARANTEED LIMITS APPLY OVER
20kΩ ≤ R
2
1
0
–1
VARIATION (%)
–2
–3
–4
1k
≤ 400kΩ
SET
10k100k1M
2.0
1.5
1.0
SET
TYPICAL HIGH
TYPICAL LOW
R
(Ω)
SET
6900 G01
Supply Current
vs Output Frequency
TA = 25°C
= 5pF
C
L
÷100, 5V
1.00
0.75
0.50
0.25
–0.25
VARIATION (%)
–0.50
–0.75
–1.00
÷1, 5V
÷10, 5V
Frequency Variation Over
Temperature
R
= 63.4k
SET
÷1 OR ÷10 OR ÷100
TYPICAL
HIGH
0
TYPICAL
LOW
–20020406080
–40
TEMPERATURE (°C)
6900 G02
Output Resistance
vs Supply Voltage
140
120
OUTPUT SOURCING CURRENT
100
80
Peak-to-Peak Jitter
vs Output Frequency
1.0
0.9
0.8
0.7
)
0.6
P-P
0.5
0.4
JITTER (%
0.3
0.2
÷100
0.1
0
1k
OUTPUT FREQUENCY (Hz)
T
= 25°C
A
÷1, VA = 5V
÷1, VA = 3V
÷10
100k1M10k10M
6900 G03
SUPPLY CURRENT (mA)
0.5
÷100, 3V ÷10, 3V ÷1, 3V
0
0
1k10k100k1M10M
OUTPUT FREQUENCY (Hz)
LTC6900 Output Operating at
20MHz, VS = 5V
V+ = 5V, R
1V/DIV
0V
= 10k, CL = 10pF
SET
12.5ns/DIV
6900 G04
6900 G06
OUTPUT RESISTANCE (Ω)
60
OUTPUT SINKING CURRENT
40
2.5 3.0
4.0
3.5
SUPPLY VOLTAGE (V)
LTC6900 Output Operating at
10MHz, VS = 3V
V+ = 3V, R
1V/DIV
0V
= 20k, CL = 10pF
SET
25ns/DIV
4.5
5.0
5.5
6.0
6900 G05
6900 G07
6900fa
4
Page 5
PIN FUNCTIONS
LTC6900
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply
must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
+
of the resistor connected between this pin and V
deter-
mines the oscillator frequency. The voltage on this pin is
+
held by the LTC6900 to approximately 1.1V below the V
voltage. For best performance, use a precision metal fi lm
resistor with a value between 10k and 2M and limit
the capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
of N in the frequency equation. Pin 4 should be tied to GND
BLOCK DIAGRAM
for the ÷1 setting, the highest frequency range. Floating
Pin 4 divides the master oscillator by 10. Pin 4 should be
+
tied to V
for the ÷100 setting, the lowest frequency range.
To detect a fl oating DIV pin, the LTC6900 attempts to pull
the pin toward midsupply. Therefore, driving the DIV pin
high requires sourcing approximately 2µA. Likewise, driving DIV low requires sinking 2µA. When Pin 4 is fl oated,
it should preferably be bypassed by a 1nF capacitor to
ground or it should be surrounded by a ground shield to
prevent excessive coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k and/
or 10pF loads. Heavier loads may cause inaccuracies due
to supply bounce at high frequencies. Voltage transients,
coupled into Pin 5, above or below the LTC6900 power
supplies will not cause latchup if the current into/out of
the OUT pin is limited to 50mA.
= (V+ – V
V
RES
+
V
1
R
SET
I
RES
SET
3
V
BIAS
GND
2
PATENT PENDING
+
–
I
RES
GAIN = 1
) = 1.1V TYPICALLY
SET
ƒ
MO
MASTER OSCILLATOR
= 10MHz • 20kΩ •
I
RES
(V+ – V
SET
PROGRAMMABLE
DIVIDER (N)
(÷1, 10 OR 100)
DIVIDER
)
SELECT
THREE-STATE
INPUT DETECT
V
+
–
+
–
GND
OUT
2µA
DIV
2µA
5
+
4
6900 BD
6900fa
5
Page 6
LTC6900
OPERATION
As shown in the Block Diagram, the LTC6900’s master oscillator is controlled by the ratio of the voltage between the
+
and SET pins and the current (I
V
) is entering the SET
RES
pin. The voltage on the SET pin is forced to approximately
+
1.1V below V
by the PMOS transistor and its gate bias
voltage. This voltage is accurate to ±8% at a particular
input current and supply voltage (see Figure 1).
A resistor R
“locks together” the voltage (V
, connected between the V+ and SET pins,
SET
+
– V
) and current, I
SET
RES
,
variation. This provides the LTC6900’s high precision. The
master oscillation frequency reduces to:
ƒMO=10MHz •
⎛
⎜
⎝
20kΩ
R
SET
⎞
⎟
⎠
The LTC6900 is optimized for use with resistors between
10k and 2M, corresponding to master oscillator frequencies between 100kHz and 20MHz.
To extend the output frequency range, the master oscillator
signal may be divided by 1, 10 or 100 before driving OUT
(Pin 5). The divide-by value is determined by the state of
the DIV input (Pin 4). Tie DIV to GND or drive it below 0.5V
to select ÷1. This is the highest frequency range, with the
master output frequency passed directly to OUT. The DIV
pin may be fl oated or driven to midsupply to select ÷10,
the intermediate frequency range. The lowest frequency
+
range, ÷100, is selected by tying DIV to V
+
within 0.4V of V
, divider setting and output frequency, including the
R
SET
. Figure 2 shows the relationship between
or driving it to
overlapping frequency ranges near 100kHz and 1MHz.
The CMOS output driver has an on resistance that is typi-
cally less than 100. In the ÷1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply
and 11ns with a 3V supply. These times maintain a clean
square wave at 10MHz (20MHz at 5V supply). In the ÷10
and ÷100 modes, where the output frequency is much lower,
slew rate control circuitry in the output driver increases
the rise/fall times to typically 14ns for a 5V supply and
19ns for a 3V supply. The reduced slew rate lowers EMI
(electromagnetic interference) and supply bounce.
1.4
1.3
1.2
SET
– V
+
1.1
= V
RES
V
1.0
0.9
0.8
Figure 1. V+ – V
V+ = 3V
10.1
V+ = 5V
101001000
I
(µA)
RES
Variation with I
SET
6900 F01
RES
10000
1000
(kΩ)
100
SET
R
Figure 2. R
÷100÷10÷1
10
1
10k
1k100k1M10M
DESIRED OUTPUT FREQUENCY (Hz)
vs Desired Output Frequency
SET
100M
6900 F02
6
6900fa
Page 7
APPLICATIONS INFORMATION
LTC6900
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6900’s master oscillator has a frequency range
spanning 0.1MHz to 20MHz. However, accuracy may suffer
if the master oscillator is operated at greater than 10MHz
with a supply voltage lower than 4V. A programmable
divider extends the frequency range to greater than three
decades. Table 1 describes the recommended frequencies
for each divider setting. Note that the ranges overlap; at
some frequencies there are two divider/resistor combinations that result in the desired frequency.
In general, any given oscillator frequency (f
) should
OSC
be obtained using the lowest master oscillator frequency.
Lower master oscillator frequencies use less power and
are more accurate. For instance, f
obtained by either R
10MHz or R
The R
SET
= 200k, N = 10, master oscillator = 1MHz.
SET
= 200k approach is preferred for lower power
= 20k, N = 100, master oscillator =
SET
= 100kHz can be
OSC
and better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTINGFREQUENCY RANGE
< 100kHz
< 20k),
SET
*
÷1 ⇒ DIV (Pin 4) = GND
÷10 ⇒ DIV (Pin 4) = Floating
÷100 ⇒ DIV (Pin 4) = V
*
At master oscillator frequencies greater than 10MHz (R
the LTC6900 may experience reduced accuracy with a supply voltage
less than 4V.
+
>500kHz
50kHz to 1MHz
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resistance,
a simple equation relates resistance with frequency.
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC6900
The oscillator may be programmed by any method that
sources a current into the SET pin (Pin 3). The circuit in
Figure 3 sets the oscillator frequency using a programmable
current source and in the expression for f
is replaced by the ratio of 1.1V/I
R
SET
CONTROL
, the resistor
OSC
. As already
explained in the Operation section, the voltage difference
+
between V
and SET is approximately 1.1V, therefore, the
Figure 3 circuit is less accurate than if a resistor controls
the oscillator frequency.
Figure 4 shows the LTC6900 confi gured as a VCO. A voltage
source is connected in series with an external 20k resistor. The output frequency, f
, will vary with V
OSC
that is the voltage source connected between V
CONTROL
+
and the
,
SET pin. Again, this circuit decouples the relationship
+
between the input current and the voltage between V
and SET; the frequency accuracy will be degraded. The
oscillator frequency, however, will monotonically increase
OSC
CONTROL
1
2
3
10MHz
.
182kHz TO 18MHz (TYPICALLY ±8%)
+
V
LTC6900
GND
SET
N
EXPRESSED IN (A)
5
OUT
4
N = 1
DIV
6900 F03
20kΩ
••I
1.1V
CONTROL
with decreasing V
+
V
I
CONTROL
1µA TO 100µA
0.1µF
Figure 3. Current Controlled Oscillator
CONTROL
ƒ
I
R
= 20k •
SET
(R
SETMIN
= 10k, R
Any resistor, R
oscillator, f
OSC
100
⎛
10MHz
⎜
N•f
⎝
, tolerance adds to the inaccuracy of the
SET
⎞
⎟
⎠
OSC
SETMAX
, N =
= 2M)
⎧
⎪
10
⎨
1
⎪
⎩
.
+
V
CONTROL
0V TO 1.1V
V
0.1µF
+
–
R
SET
20k
ƒ
OSC
TYPICAL f
±0.5%, V
±8%, V
CONTROL
1
2
3
10MHz
N
OSC
CONTROL
+
OUT
V
LTC6900
GND
SET
DIV
6900 F04
20k
•• 1 –
R
SET
ACCURACY
= 0V
= 0.5V
()
Figure 4. Voltage Controlled Oscillator
5
4
N = 1
V
CONTROL
1.1V
6900fa
7
Page 8
LTC6900
APPLICATIONS INFORMATION
POWER SUPPLY REJECTION
Low Frequency Supply Rejection (Voltage Coeffi cient)
Figure 5 shows the output frequency sensitivity to power
supply voltage at several different temperatures. The
LTC6900 has a guaranteed voltage coeffi cient of 0.1%/V
but, as Figure 5 shows, the typical supply sensitivity is
twice as low.
High Frequency Power Supply Rejection
The accuracy of the LTC6900 may be affected when its
power supply generates signifi cant noise with a frequency
content in the vicinity of the programmed value of f
OSC
. If a
switching power supply is used to power the LTC6900, and
if the ripple of the power supply is more than 20mV, make
sure the switching frequency and its harmonics are not
related to the output frequency of the LTC6900. Otherwise,
the oscillator may show additional frequency error.
If the LTC6900 is powered by a switching regulator and
the switching frequency or its harmonics coincide with
the output frequency of the LTC6900, the jitter of the
oscillator output may be affected. This phenomenon will
become noticeable if the switching regulator exhibits
ripples beyond 30mV.
START-UP TIME
The start-up time and settling time to within 1% of the
fi nal value can be estimated by t
START
≅ R
+ 10µs. Note the start-up time depends on R
(3.7µs/k)
SET
and it is
SET
independent from the setting of the divider pin. For instance with R
= 100k, the LTC6900 will settle with 1%
SET
of its 200kHz fi nal value (N = 10) in approximately 380µs.
Figure 6 shows start-up times for various R
resistors.
SET
Figure 7 shows an application where a second set resistor
is connected in parallel with set resistor R
R
SET2
SET1
via
switch S1. When switch S1 is open, the output frequency
of the LTC6900 depends on the value of the resistor R
SET1
.
When switch S1 is closed, the output frequency of the
LTC6900 depends on the value of the parallel combination
of R
SET1
and R
SET2
.
The start-up time and settling time of the LTC6900 with
switch S1 open (or closed) is described by t
START
shown
above. Once the LTC6900 starts and settles, and switch
S1 closes (or opens), the LTC6900 will settle to its new
output frequency within approximately 70µs.
Jitter
The Peak-to-Peak Jitter vs Output Frequency graph, in the
Typical Performance Characteristics section, shows the
typical clock jitter as a function of oscillator frequency and
power supply voltage. The capacitance from the SET pin,
(Pin 3), to ground must be less than 10pF. If this requirement is not met, the jitter will increase.
8
0.15
R
= 63.2k
SET
PIN 4 = FLOATING (÷10)
0.10
0.05
0
FREQUENCY DEVIATION (%)
–0.05
2.5
3.03.54.04.5
SUPPLY VOLTAGE (V)
Figure 5. Supply SensitivityFigure 6. Start-Up Time
25°C
–40°C
85°C
5.05.5
6900 F05
70
60
50
40
30
20
FREQUENCY ERROR (%)
10
–10
63.2k
0
20k
200400800
0
TIME AFTER POWER APPLIED (µs)
400k
600
TA = 25°C
+
= 5V
V
6900 F06
1000
6900fa
Page 9
APPLICATIONS INFORMATION
LTC6900
S1
R
SET1
R
SET2
3V OR 5V
1
2
3
+
V
LTC6900
GND
SET
OUT
DIV
6900 F07
5
÷100
4
÷1
Figure 7
f
= 10MHz •
OSC
OR
+
V
f
= 10MHz •
OSC
÷10
20k
()
N • R
SET1
20k
()
//R
N • R
SET1
SET2
A Ground Referenced Voltage Controlled Oscillator
The LTC6900 output frequency can also be programmed by
steering current in or out of the SET pin, as conceptually
shown in Figure 8. This technique can degrade accuracy
+
as the ratio of (V
– V
dependent of the value of R
SET
) / I
is no longer uniquely
RES
, as shown in the LTC6900
SET
Block Diagram. This loss of accuracy will become noticeable
when the magnitude of I
is comparable to I
PROG
RES
. The
frequency variation of the LTC6900 is still monotonic.
Figure 9 shows how to implement the concept shown in
Figure 8 by connecting a second resistor, R
SET pin and a ground referenced voltage source, V
, between the
IN
IN
.
For a given power supply voltage in Figure 9, the output
frequency of the LTC6900 is a function of V
+
and (V
f
OSC
⎡
⎢
⎢
1+
⎢
⎢
⎣
– V
=
()
SET
10MHz
N
− V
V
IN
V
RES
) = V
•
+
:
RES
20k
RINR
⎛
⎜
•
⎜
⎜
1+
⎜
⎝
SET
1
R
R
IN
SET
•
⎤
⎞
⎥
⎟
⎥
⎟
⎥
⎟
⎟
⎥
⎠
⎦
(1)
, RIN, R
IN
SET
When V
= V+, the output frequency of the LTC6900 as-
IN
sumes the highest value and it is set by the parallel combination of R
, is independent of the value of V
f
OSC
the accuracy of f
When V
and R
IN
OSC
is less than V+, and expecially when VIN ap-
IN
. Also note, the output frequency,
SET
= (V+ – V
RES
SET
is within the data sheet limits.
) so
proaches the ground potential, the oscillator frequency,
, assumes its lowest value and its accuracy is affected
f
OSC
by the change of V
RES
= (V+ – V
by ±8%, assuming the variation of V
perature coeffi cient of V
is 0.02%/°C.
RES
By manipulating the algebraic relation for f
). At 25°C V
SET
+
is ±5%. The tem-
RES
above, a
OSC
varies
simple algorithm can be derived to set the values of external
resistors R
and RIN, as shown in Figure 9.
SET
1. Choose the desired value of the maximum oscillator
frequency, f
voltage V
IN(MAX)
OSC(MAX)
, occurring at maximum input
≤ V+.
2. Set the desired value of the minimum oscillator fre-
quency, f
V
IN(MIN)
3. Choose V
OSC(MIN)
≥ 0.
RES
, occurring at minimum input voltage
= 1.1 and calculate the ratio of RIN/R
SET
from the following:
R
IN
=
R
SET
⎛
f
V
()
IN(MAX)
− V
V
+
RES
OSC(MAX)
−
⎜
f
⎝
OSC(MIN)
⎡
f
()
OSC(MAX)
⎢
f
⎢
OSC(MIN)
⎣
⎞
V
()
⎟
IN(MIN)
⎠
− V
+
−1
⎤
⎥
−1
⎥
⎦
(2)
+
V
0.1µF
R
SET
I
PR
Figure 8. Concept for Programming via Current Steering
1
+
V
LTC6900
2
GND
3
SET
I
RES
OUT
DIV
6900 F08
5
5V
÷100
4
÷10
OPEN
÷1
+
V
+
0.1µF
V
R
SET
RES
–
R
IN
+
V
IN
–
Figure 9. Implementation of Concept Shown in Figure 8
1
2
3
+
V
LTC6900
GND
SET
OUT
DIV
6900 F09
5
f
OSC
5V
÷100
4
÷10
OPEN
÷1
6900fa
9
Page 10
LTC6900
APPLICATIONS INFORMATION
Once RIN/R
R
SET
⎡
V
⎢
()
IN(MAX)
⎢
⎢
⎢
⎢
⎣
is known, calculate R
SET
10MHz
=
N
− V
V
•
+
RES
20k
f
OSC(MAX)
+ V
⎛
R
⎜
R
⎝
SET
RES
IN
from:
SET
•
R
IN
SET
⎤
⎞
⎥
⎟
⎠
⎥
⎥
⎥
⎥
⎦
(3)
⎛
1+
⎜
R
⎝
⎞
⎟
⎠
Example 1:
In this example, the oscillator output frequency has small
excursions. This is useful where the frequency of a system
should be tuned around some nominal value.
+
= 3V, f
Let V
f
OSC(MIN)
OSC(MAX)
= 1.5MHz for VIN = 0V. Solve for RIN/R
Equation (2), yielding R
Equation (4). R
IN
tor values, use R
Figure 10 shows the measured f
= 2MHz for V
IN/RSET
= 9.9R
SET
= 110k (1%) and RIN = 1.1M (1%).
SET
= 9.9/1. R
= 1.089M. For standard resis-
IN(MAX)
vs VIN. The 1.5MHz
OSC
= 3V and
= 110.1k by
SET
SET
by
to 2MHz frequency excursion is quite limited, so the curve
vs V
of f
OSC
is linear.
IN
Example 2:
Vary the oscillator frequency by one octave per volt. As-
sume f
OSC(MIN)
= 1MHz and f
OSC(MAX)
= 2MHz, when the
input voltage varies by 1V. The minimum input voltage is
half supply, that is V
+
= 3V.
V
Equation (2) yields R
= 142.8k. RIN = 1.273R
R
SET
IN/RSET
resistor values, use R
= 1.5V, V
IN(MIN)
IN(MAX)
= 1.273 and Equation (3) yields
= 181.8k. For standard
SET
= 143k (1%) and RIN = 182k
SET
(1%). Figure 11 shows the measured f
= 2.5V and
vs VIN. For VIN
OSC
higher than 1.5V, the VCO is quite linear; nonlinearities
occur when V
becomes smaller than 1V, although the
IN
VCO remains monotonic.
Maximum VCO Modulation Bandwidth
The maximum VCO modulation bandwidth is 25kHz; that
is, the LTC6900 will respond to changes in V
at a rate
IN
up to 25kHz. In lower frequency applications however, the
modulation frequency may need to be limited to a lower
rate to prevent an increase in output jitter. This lower limit
is the master oscillator frequency divided by 20, (f
OSC
/20).
In general, for minimum output jitter the modulation frequency should be limited to f
/20 or 25kHz, whichever
OSC
is less. For best performance at all frequencies, the value
for f
when V
should be the master oscillator frequency (N = 1)
OSC
is at the lowest level.
IN
10
2.00
RIN = 1.1M
1.95
R
= 110k
SET
+
V
= 3V
1.90
N = 1
1.85
1.80
1.75
(MHz)
OSC
f
1.70
1.65
1.60
1.55
1.50
0
0.511.522.53
Figure 10. Output Frequency vs Input Voltage
VIN (V)
6900 F10
3000
RIN = 182k
R
= 143k
SET
+
2500
V
= 3V
N = 1
2000
(kHz)
1500
OSC
f
1000
500
0
0
0.511.522.53
Figure 11. Output Frequency vs Input Voltage
VIN (V)
6900 F11
6900fa
Page 11
APPLICATIONS INFORMATION
LTC6900
Example 3:
+
= 3V, f
V
V
IN(MAX)
R
IN/RSET
OSC(MAX)
= 2.5V, V
= 8.5, R
= 5MHz, f
IN(MIN)
= 43.2k, RIN = 365k
SET
OSC(MIN)
= 0.5V
= 4MHz, N = 1
Maximum modulation bandwidth is the lesser of 25kHz
or f
OSC(MIN)
Maximum V
/20 (4MHz/20 = 200kHz)
modulation frequency = 25kHz
IN
Example 4:
+
= 3V, f
V
V
IN(MAX)
R
IN/RSET
OSC(MAX)
= 2.5V, V
= 3.1, R
= 400kHz, f
IN(MIN)
= 59k, RIN = 182k
SET
OSC(MIN)
= 0.5V
= 200kHz, N = 10
PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
0.95
REF
Maximum modulation bandwidth is the lesser of 25kHz or
f
OSC(MIN)
Maximum V
Table 2. Variation of V
RIN || R
20k0.98V1.03V
40k1.03V1.08V
80k1.07V1.12V
160k1.1V1.15V
320k1.12V1.17V
V
RES
Note: All of the calculations above assume V
≈ 1.1V. For completeness, Table 2 shows the variation of VRES against
various parallel combinations of R
with V
then recalculate the resistor values using the new value for V
/20 calculated at N =1 (2MHz/20 = 100kHz)
modulation frequency = 25kHz
IN
for Various Values of RIN || R
RES
(VIN = V+)V
SET
= Voltage across R
≈ 1.1V, then use Table 2 to get a better approximation of V
RES
SET
2.90 BSC
(NOTE 4)
, V+ = 3VV
RES
RES
and R
IN
(VIN = V+). Calulate fi rst
SET
RES
= 1.1V, although V
SET
, V+ = 5V
.
RES
RES
RES
,
1.22 REF
3.85 MAX
2.62 REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.20 BSC
DATUM ‘A’
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1.4 MIN
0.09 – 0.20
(NOTE 3)
2.80 BSC
1.50 – 1.75
(NOTE 4)
1.00 MAX
PIN ONE
0.95 BSC
0.80 – 0.90
1.90 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.01 – 0.10
S5 TSOT-23 0302 REV B
6900fa
11
Page 12
LTC6900
TYPICAL APPLICATION
THERMISTOR
Temperature-to-Frequency Converter
5V
R
100k
C1
T
0.1µF
R
: YSI 44011 800 765-4974
T
1
2
3
+
V
LTC6900
GND
SET
OUT
DIV
6900 TA02
5
4
Output Frequency vs Temperature
1400
1200
1000
800
600
FREQUENCY (kHz)
400
MAX
TYP
MIN
f
OSC
=
10MHz
10
20k
•
R
T
200
0
–20–100 102030405060708090
TEMPERATURE (°C)
6900 TA03
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LTC17991kHz to 30MHz ThinSOT OscillatorIdentical Pinout, Higher Frequency Operation