ANALOG DEVICES LTC 3824 EMSE Datasheet

LTC3824

High Voltage Step-Down

Controller With 40µA

Quiescent Current

FeaTures

n

Wide Input Range: 4V to 60V

n

Current Mode Constant Frequency PWM

n

Very Low Dropout Operation: 100% Duty Cycle

n

Programmable Switching Frequency:

200kHz to 600kHz

n

Selectable High Efficient Burst Mode® Operation:

40µA Quiescent Current

n

Easy Synchronization

n

8V, 2A Gate Drive (VCC > 10V) for Industrial High

Voltage P-Channel MOSFET

n

Programmable Soft-Start

n

Programmable Current Limit

n

Available in a Small 10-Pin Thermally Enhanced

MSE Package

applicaTions

n

Industrial and Automotive Power Supplies

n

Telecom Power Supplies

n

Distributed Power Systems

DescripTion

The LTC®3824 is a step-down DC/DC controller designed
to drive an external P-channel MOSFET. With a wide input
range of 4V to 60V and a high voltage gate driver, the
LTC3824 is suitable for many industrial and automotive
high power applications. Constant frequency current mode
operation provides excellent performance.

The LTC3824 can be configured for Burst Mode operation.
Burst Mode operation enhances low current efficiency
(only 40µA quiescent current) and extends battery run
time. The switching frequency can be programmed up to
600kHz and is easily synchronizable.

Other features include current limit, soft-start, micropower
shutdown, and Burst Mode disable.

The LTC3824 is available in a 10-lead MSE power package.

L, LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents
including 5731964.

Typical applicaTion

V

5.5V TO 60V

33µF

100V

IN

C

IN

392k

+

0.1µF

5V/2A Buck Converter

C

CAP

0.1µF

CAP

V

CC

SENSE

LTC3824

R

SET

GND

SYNC/MODE

SS

GATE

V

FB

V

C

10k

3.3nF

R

S

0.025Ω

22µH

100pF

51Ω

422k

80.6k

3824 TA01

C

OUT

100µF
×2

Efficiency and Power Loss vs Load Current

100

EFFICIENCY

90

80

70

V

OUT

5V
2A

EFFICIENCY (%)

60

POWER LOSS

50

10 100

LOAD CURRENT (mA)

VIN = 12V

VIN = 40V

VIN = 40V

VIN = 12V

2.5

2.0

POWER LOSS (W)

1.5

1.0

0.5

0

20001000

3824 TA01a

3824fg

1

LTC3824

TOP VIEW

pin conFiguraTionabsoluTe MaxiMuM raTings

(Note 1)

VCC ...........................................................................65V

SS, R
V

C

, VFB .............................................................4V

SET

...............................................................................3V

SYNC/MODE ...............................................................6V

– V

V

CC

..............................................................1V

SENSE

Operating Junction Temperature Range

(Note 2) .................................................. –55°C to 150°C

1

GND

SYNC/MODE

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

2

11

3

R

SET

V

4

C

V

5

FB

MSE PACKAGE

10-LEAD PLASTIC MSOP

= 150°C, θJA = 43°C/W, θJC = 3°C/W

T

JMAX

10

CAP

9

GATE

8

V

CC

SENSE

7

SS

6

Storage Temperature Range ..................... –65° to 150°C

Lead Temperature (Soldering, 10 sec) .................. 300°C

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3824EMSE#PBF LTC3824EMSE#TRPBF LTBRZ 10-Lead Plastic MSOP –40°C to 125°C
LTC3824IMSE#PBF LTC3824IMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –40°C to 125°C
LTC3824HMSE#PBF LTC3824HMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –40°C to 150°C
LTC3824MPMSE#PBF LTC3824MPMSE#TRPBF LTCGZ 10-Lead Plastic MSOP –55°C to 150°C

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3824EMSE LTC3824EMSE#TR LTBRZ 10-Lead Plastic MSOP –40°C to 125°C
LTC3824IMSE LTC3824IMSE#TR LTCGZ 10-Lead Plastic MSOP –40°C to 125°C

LTC3824HMSE LTC3824HMSE#TR LTCGZ 10-Lead Plastic MSOP –40°C to 150°C
LTC3824MPMSE LTC3824MPMSE#TR LTCGZ 10-Lead Plastic MSOP –55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

The l denotes the specifications which apply over the specified operating

elecTrical characTerisTics

junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = 12V, R

= 392k, C

SET

= 0.1µF. No load on any

CAP

outputs, unless otherwise specified.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Supply Voltage (V

Supply Current (I

Supply Current (I

)

CC

) VC ≤ 0.4V (Switching Off), VCC ≤ 60V

VCC

) Burst Mode Operation VCC ≤ 60V, SYNC/MODE Open, VC = 0.6V 40 65 µA

VCC

Supply Current in Shutdown V

V

= 0V (Burst Mode Operation Disable)

SYNC

≤ 25mV, VCC ≤ 60V

C

≤ 25mV, VCC = 12V

V

C

l

4 60 V

0.8 1.3 mA

l

l

9 20

5 10

30

15

µA
µA

µA
µA

Voltage Amplifier gm

Reference Voltage (V

)

REF

LTC3824E/LTC3824I

LTC3824MP/LTC3824H
Transconductance
FB Input Current V

VC = 0.8V, ∆IVC = ±2µA

= V

FB

(Note 3): LTC3824E/LTC3824I

REF

LTC3824MP/LTC3824H

High IVC = 0 1.6 V

V

C

l
l

0.792

0.788

0.788

0.8 0.808

0.812

0.816

220 260 370 µmho

l
l

10
10

30
60

V
V
V

nA
nA

3824fg

2

LTC3824

elecTrical characTerisTics

The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = 12V, R
outputs, unless otherwise specified.

PARAMETER CONDITIONS MIN TYP MAX UNITS

Low IVC = 0 0.35 0.5 V

V

C

Source Current VVC = 0.5V to 1.3V, VFB = V

V

C

Sink Current VVC = 0.7V to 1.3V, VFB = V

V

C

Threshold for Switching Off V

V

C

Soft-Start Current I

Burst Mode Threshold VCC ≤ 60V, VC Rising, SYNC/MODE Open 0.84 V

V

C

Burst Mode Threshold Hysteresis VCC ≤ 60V 0.04 V

V

C

SS

SENSE Voltage at Burst Mode Operation (V

SYNC/MODE

VSS = 0.1V to 1.5V

CC–VSENSE

= 0V (Note 4)

) at 30% Duty Cycle

70% Duty Cycle
Current Limit Threshold (V

CC–VSENSE

) VCC ≤ 60V: LTC3824E/LTC3824I

LTC3824MP/LTC3824H
FB Overvoltage Threshold V
Sense Input Current V

= 1.6V 8 %

C

= V

SENSE

CC

Oscillator

Switching Frequency R

= 392k: LTC3824E/LTC3824I

SET

LTC3824MP/LTC3824H

= 200k

R

SET

Synchronization Pulse Threshold

Rising Edge V

SYNC

on SYNC Pin
Synchronization Frequency Range R

V

RSET

= 392k

SET

R

= 200k

SET

R

= 392k 1.2 V

SET

Minimum On-Time (Measured at GATE Pin) CCM Operation (Note 5) 350 ns
Switching Frequency Foldback V

= 0.3V

FB

Gate Driver

GATE Bias Voltage (V

) 9V ≤ VCC ≤ 60V, I

CC–VCAP

GATE

LTC3824MP/LTC3824H

GATE Bias Voltage (V

GATE High Voltage (V

–GND) 4V ≤ VCC ≤ 8V, I

CAP

CC–VGATE

) 4V ≤ VCC ≤ 60V, I
GATE Peak Source Current C
GATE Low Voltage (V

GATE–VCAP

) 8V ≤ VCC ≤ 60V, I

GATE Peak Sink Current C

= 12V, I

V

CC

6V ≤ V

CC

= 10nF 2.5 A

GATE

4V ≤ V

CC

= 10nF 2.5 A

GATE

GATE

≤ 8V, I

< 8V, I

= 15mA

= 10mA

GATE

= 15mA

GATE

GATE

GATE

= 10mA

GATE

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LTC3824 is tested under pulsed load conditions such that
T

≈ TA. The LTC3824E is guaranteed to meet performance specifications

J

from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design characterization and correlation with statistical process controls.
The LTC3824I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LTC3824H is guaranteed over the –40°C to 150°C
operating junction temperature range. The LTC3824MP is guaranteed

–100mV (V

REF

+100mV (V

REF

= 0V) 15 µA

SYNC

= 0V) 15 µA

SYNC

= 10mA: LTC3824E/LTC3824I

= –15mA 0.5 0.8 V

= 15mA

and tested over the full –55°C to 150°C operating junction temperature
range. High junction temperatures degrade operating lifetimes; operating
lifetime is derated for junction temperatures greater than 125°C. Note that
the maximum ambient temperature consistent with these specifications
is determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors. The junction temperature (T
temperature (T

, in °C) and power dissipation (PD, in Watts) according to

A

the formula:
T

= TA + (PD • θJA)

J

where θ

(in °C/W) is the package junction to ambient thermal

JA

impedance.

= 392k, C

SET

= 0.1µF. No load on any

CAP

l

3

l

2.5

5 7.5

0.4 V

8

30
20

l
l

80 75100

100

120
120

0.1 2 µA

l

170

l

170

l

320 400 460 kHz

200
200

230
240

1.3 V

l

230

l

460

l

35 50 75 kHz

l

7.0

l

6.8

l

6.8 V

0.2 0.85 1.5

l

7.9

7.9

0.1

300
600

8.8

8.9

2.8

0.5 V

0.05

, in °C) is calculated from the ambient

J

µA
µA

mV
mV

mV
mV

kHz
kHz

kHz
kHz

V
V

V
V

V

3824fg

3

LTC3824

FREQUENCY (kHz)

700

elecTrical characTerisTics

Note 3: This parameter is tested in a feedback loop that servos VFB to the
reference voltage with the V

Note 4: This specification represents the maximum voltage on V
switching (GATE pin) is guaranteed to be off. The nominal value of V

pin forced to 1V.

C

where

C

C

Note 5: The LTC3824 typically enters Burst Mode operation when the load
is less than one third the current limit. If minimum on-time is violated,
cycle skipping may occur at higher current levels.

where switching turns off is 0.7V.

Typical perForMance characTerisTics

(V)

CAP

-V

CC

V

8.5

8.4

8.3

8.2

8.1

8.0

7.9

7.8

7.7

7.6

(VCC-V

0 10

) vs I

CAP

20 30 40

I

GATE

GATE

at V

(mA)

DRIVE

Low

50

3824 G01

(mA)

CC

I

ICC vs V

3

2

1

0

0

CC

20 30 40

10

VFB = 0.75V

VFB = 0.85V

VCC (V)

TA = 25°C unless otherwise noted.

Switching Frequency Change

50 60

3824 G02

vs VCC at R

3

2

1

0

–1

ΔFREQUENCY (kHz)

–2

–3

0

20 30 40

10

SET

= 392kΩ

VCC (V)

50 60

3824 G03

0.4

0.2

(mV)

REF

ΔV

–0.2

–0.4

Change vs V

V

REF

0

0

10 20 30 40

CC

VCC (V)

50 60

3824 G04

Switching Frequency vs R

600

500

400

300

200

100

100

200 300

R

(kΩ)

SET

SET

400

3824 G05

(mV)

REF

∆V

–1

–2

∆V

5

4

3

2

1

0

–75 –50

REF

vs Temperature

–25 0 25 50

DIE TEMPERATURE (°C)

75 100 150125

3824 G06

4

3824fg

LTC3824

Typical perForMance characTerisTics

Burst Mode Disabled at
I

V

OUT

10mV/DIV

INDUCTOR

CURRENT

1A/DIV

V

OUT

50mV/DIV

= 200mA, V

LOAD

I

= 200mA

LOAD

Burst Mode Operation V

V

=12V, V

IN

OUT

= 5V, I

OUT

4µs/DIV

LOAD

= 5V

OUT

= 200mA

V

50mV/DIV

INDUCTOR

CURRENT

1A/DIV

3824 G07

= 5V

OUTPUT VOLTAGE

AC COUPLED

100mV/DIV

TA = 25°C unless otherwise noted.

Burst Mode Operation V

V

OUT

=12V, V

IN

OUT

= 3V, I

20µs/DIV

LOAD

OUT

= 200mA

Load Current Step Response

= 3V

3824 G08

INDUCTOR

CURRENT

1A/DIV

50µs/DIV

3824 G09

INDUCTOR

CURRENT

2A/DIV

100µs/DIV

3824 G10

3824fg

5

LTC3824

pin FuncTions

GND (Pin 1): Chip Ground Pin.

SYNC/MODE (Pin 2): Synchronization Input and Burst

Mode Operation Enable/Disable. If this pin is left open
or pulled higher than 2V, Burst Mode operation will be
enabled at light load and the typical threshold of entering
Burst Mode operation is one third of current limit. If this
pin is grounded or the synchronization pulse is present
with a frequency greater than 20kHz then Burst Mode
operation is disabled and the LTC3824 goes into pulse
skipping at light loads. To synchronize the LTC3824, the
duty cycle of the synchronizing pulse can range from 10%
to 70% and the synchronizing frequency has to be higher
than the programmed frequency.

R

(Pin 3): A resistor from R

SET

LTC3824 switching frequency.

VC (Pin 4): The Output of the voltage error amplifier gm
and the control signal of the current mode PWM control
loop. Switching starts at 0.7V, and higher VC corresponds
to higher inductor current. When VC is pulled below 25mV,
the LTC3824 goes into micropower shutdown.

to ground sets the

SET

VFB (Pin 5): Error Amplifier Inverting Input. A resistor
divider to this pin sets the output voltage. When VFB is
less than 0.5V, the switching frequency will fold back to
50kHz to reduce the minimum on-cycle.

SS (Pin 6): Soft-Start Pin. A capacitor on this pin sets
the output ramp-up rate. The typical time for SS to

A

reach the programmed level is (C • 0.8V)/5µ

SENSE (Pin 7): Current Sense Input Pin. A sense re­sistor, R
100mV/RS.

V

CC

ing is required.

GATE (Pin 9): Gate Drive for The External P-channel
MOSFET. Typical peak drive current is 2.5A and the drive
voltage is clamped to 8V when V

CAP (Pin 10): A Low ESR Capacitor of at Least 0.1µF is
required from this pin to V
tor for biasing the gate driver circuitry.

GND (Exposed Pad Pin 11): Ground. Must be soldered
to PCB with expanded metal trace for rated thermal per­formance.

, from VIN to SENSE sets the current limit to

S

(Pin 8): Chip Power Supply. Power supply bypass-

is higher than 9V.

CC

to bypass the internal regula-

CC

.

6

3824fg

block DiagraM

+

1.1V
SS

2.5V1.8V

R

GND

100k

+

–

+

1.5V

SET

M2

SHUTDOWN

Burst Mode
OPERATION

CONTROL

50pF

SYNC/
MODE

R

FREQ

0.3µA

+

–

OSC

LTC3824

SENSE

V

CC

Burst Mode

DISABLE

–

Y1

+

+

2V

+

Y6

–

Q

S

R

OR1

Y2

0.1V

+

0.025V

PWM

–

+

–

+

+

–

1

6

+

+

+

REFERENCE

V

REF

50KHz FOLDBACK

SYNC DISABLE

SLOPE
COMP

–

GM

+

GATE

B1

C

CAP

FB

CAP

0.1µF

D1

+

8V

–

+

E1

M1

+

0.5V

+

Y5

–

D6

D7

D4

5µA

V

0.8V

2.5V

REF

V

IN

R

S

Q1

L

C2

RF2

RF1

V

OUT

C

OUT

applicaTions inForMaTion

Operation

The LTC3824 is a constant frequency current mode buck
controller with programmable switching frequency up to
600kHz.

Referring to the Block Diagram, the LTC3824’s basic
functions include a transconductance amplifier gm to
regulate the output voltage and control the current mode
PWM current loop, the necessary logic to control the
PWM switching cycles, a high speed gate driver to drive
an external high power P-channel MOSFET and a voltage
regulator to bias the gate driver circuit.

V

C

R1
2k

C1
470pF

SS

C

SS

0.1µF

3824 BD

In normal operation each switching cycle starts with switch
turn-on and the inductor current is sampled through the
current sense resistor. This current is amplified and then
compared to the error amplifier output V

to turn the

C

switch off. Voltage loop regulates the output voltage to the
programmed level through the output resistor divider and
the error amplifier. Amplifier E1 regulates the gate drive
low to approximately 8V below V
9V, and C

stabilizes the voltage. Note that when VCC is

CAP

for VCC higher than

CC

lower than 9V, gate drive high will be within 0.5V of VCC
and gate drive low within 1V of ground.

Important features include shutdown, current limit, soft­start, synchronization and low quiescent current.

3824fg

7

LTC3824

applicaTions inForMaTion

Burst Mode Operation

The LTC3824 can be configured for Burst Mode operation to
enhance light load efficiency (only 40µA quiescent current)
and extend battery run time by leaving the SYNC/MODE
pin open or pulling it higher than 2V. In this mode, when
output load drops the loop control voltage VC also drops
and when VC reaches approximately 0.9V at low duty cycle
the LTC3824 goes into sleep mode with the switch turned
off. During sleep mode the output voltage drops and VC
rises up. When VC goes up to around 70mV the LTC3824
will turn on the switch and the burst cycle repeats. If the
SYNC/MODE pin is grounded the Burst Mode operation
will be disabled and the LTC3824 skips cycles at light load.

Oscillation Frequency Setting and Synchronization

The switching frequency of the LTC3824 can be set up to
600kHz by a resistor, R

For 200kHz, R
vs R

graph in the Typical Performance Characteris-

FREQ

= 392k. See the Switching Frequency

FREQ

, from the R

FREQ

pin to ground.

SET

tics section. With a 100ns one-shot timer on-chip, the
LTC3824 provides flexibility on the sync pulse width. The
sync pulse threshold voltage level is about 1.2V.

Short-Circuit Protection

In normal operation when the output voltage is in regulation,

is regulated to 0.8V. If the output is shorted to ground

V

FB

and V

drops below 0.5V the switching frequency will be

FB

reduced to 50kHz to allow the inductor current to discharge
and prevent current runaway. Note that synchronization
is enabled only when V

is above 0.5V.

FB

Soft-Start

During soft-start, the voltage on the SS pin (V

) is the

SS

reference voltage that controls the output voltage and the
output ramps up following V

. The effective range of VSS

SS

is from 0V to 0.8V. The typical time for the output to reach
the programmed level is:

where CSS is the capacitor connected from the SS pin to
GND.

Overvoltage Protection

To achieve good output regulation in Burst Mode operation,
an overvoltage comparator, OVP, with a threshold adap­tive to the V
In Burst Mode operation with low V
threshold is approximately 2% above V

voltage is used to monitor the FB voltage.

C

voltage, the OVP

C

and the V

REF

REF

is also shifted lower by 2% to contain the output ripple
and to keep output regulation constant. As output load
increases, OVP threshold increases with V
to 8% above V

REF

.

voltage to up

C

Shutdown Mode Quiescent Current

When the V

pin is pulled down below 25mV the LTC3824

C

goes into micropower shutdown mode and only draws 7µA.

Output Voltage Programming

With a 0.8V feedback reference voltage, V
voltage, V

, is programmed by a resistor divider as

OUT

, the output

REF

shown in the Block Diagram.

V

Current Sense Resistor R

= 0.8V (1+RF1/RF2)

OUT

and Current Limit

S

The maximum current the LTC3824 can deliver is deter­mined by:

I

OUT(MAX)

= 100mV/RS – I

where 100mV is the internal 100mV threshold across V
and V

SENSE

current. R

, and I

should be placed very close to the power switch

S

is the inductor peak-to-peak ripple

RIPPLE

RIPPLE

/2

CC

with very short traces. Good kelvin sensing is required for
accurate current limit.

• 0.8V

C

tSS=

SS

5μA

3824fg

8

applicaTions inForMaTion

I

L(MAX )

= I

OUT(MAX)

+

I

RIPPLE

2

where I

RIPPLE

=

(V

IN

– V

OUT

) • D

f • L

and Duty Cycle D =

V

OUT

+ V

D

VIN+ V

D

L =

(V

IN–VOUT

) •D

f • 0.4 •I

OUT(MAX)

LTC3824

Inductor Selection

The maximum inductor current is determined by :

VD is the catch diode D1 forward voltage and f is the
switching frequency.

A small inductance will result in larger ripple current,
output ripple voltage and also larger inductor core loss.
An empirical starting point for the inductor ripple current
is about 40% of maximum DC current.

The saturation current level of the inductor should be
sufficiently larger than I

L(MAX)

.

The power dissipated by the MOSFET when the LTC3824
is in continuous mode is given by :

V

OUT+VD

=

VIN+ V

+ K(VIN)2(I

(I

)2(1+δ)R

OUT

D

)(C

OUT

RSS

DS(ON)

)(f)

P

MOSFET

The first term in the equation represents the I2R losses in
the device and the second term is the switching losses. K
(estimated as 1.7) is an empirical factor inversely related
to the gate drive current and has the unit of 1/Amps. The δ
term accounts for the temperature coefficient of the R
of the MOSFET, which is typically 0.4%/°C. C

RSS

DS(ON)

is the
MOSFET reverse transfer capacitance. Figure 1 illustrates
the variation of normalized R

over temperature for

DS(ON)

a typical power MOSFET.

2.0

1.5

1.0

Power MOSFET Selection

Important parameters for the power MOSFET include the
drain-to-source breakdown voltage (BV
voltage (V
to-source voltage, the gate-to-source and gate-to-drain
charges (Q
current (I
(R

TH(JC)

The gate drive voltage is set by the 8V internal regulator.
Consequently, at least 10V V
in high voltage applications.

In order to calculate the junction temperature of the power
MOSFET, the power dissipated by the device must be known.
This power dissipation is a function of the duty cycle, the
load current and the junction temperature itself (due to the
positive temperature coefficient of R
dissipation calculation should be based on the worst-cast
specifications for V
maximum duty cycle, the voltage and temperature ranges,
and the R

), the threshold

DSS

), the on-resistance (R

GS(TH)

and QGD, respectively), the maximum drain

GS

) and the MOSFET’s thermal resistance

D(MAX)

) and R

DS(ON)

.

TH(JA)

rated MOSFETs are required

GS

SENSE(MAX)

of the MOSFET listed in the data sheet.

, the required load current at

DS(ON)

DS(ON)).

) versus gate-

The power

0.5

δ NORMALIZED ON-RESISTANCE

0

–50

Figure 1. Normalized R

0

JUNCTION TEMPERATURE (°C)

50

vs Temperature

DS(ON)

100

150

3824 F01

From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:

= TA + P

T

J

The R
the R

TH(JA)

TH(JC)

MOSFET

to be used in this equation normally includes

for the device plus the thermal resistance from

the case to the ambient temperature (R

can then be compared to the original assumed value

of T

J

• R

TH(JA)

TH(CA)

). This value

used in the calculation.

Output Diode Selection

The catch diode carries load current during the switch
off-time. The average diode current is therefore dependent

3824fg

9

LTC3824

applicaTions inForMaTion

on the P-channel switch duty cycle. At high input voltages
the diode conducts most of the time. As V

the diode conducts only a small fraction of the time.

V

OUT

approaches

IN

The worst condition for the diode is when the output is
shorted to ground. Under this condition the diode must
safely handle the maximum current at close to 100% of
the time. Therefore, the diode must be carefully chosen
to meet the worst case voltage and current requirements.

Under normal conditions, the average current conducted
by the diode is:

= I

I

D

• (1 – D)

OUT

A fast switching Schottky diode must be used to optimize
efficiency.

and C

C

IN

A low ESR input capacitor, C

Selection

OUT

, sized for the maximum

IN

RMS P-channel switch current is required to prevent large
input voltage transients. The maximum RMS capacitor
current is given by:

V

I

RMS=IOUT(MAX)

OUT

V

IN

This formula has a maximum at VIN = 2V

/2. This simple worst-case condition is commonly used

I

OUT

V

V

IN

OUT

– 1

OUT

, where I

RMS

=

for design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design.

The selection of C

is determined by the effective series

OUT

resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable.

The output ripple, ∆V



ΔV

≤ ΔILESR+

OUT




, is determined by:

OUT



1

OUT




8fC

The output ripple is highest at maximum input voltage
since ∆I

increases with input voltage. Multiple capacitors

L

placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR, but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long-term reliability. Ceramic capaci­tors have excellent low ESR characteristics but can have
a high voltage coefficient and audible noise.

Efficiency Considerations

The efficiency of a switching regulator is equal to the output
power divided by the input power. Percentage efficiency
can be expressed as:

% Efficiency = 100%–(L1 + L2 + L3 +......)

where L1, L2, L3...are the individual loss components as a
percentage of the input power. It is often useful to analyze
individual losses to determine what is limiting the efficiency
and which change would produce the most improvement.
Although all dissipative elements in the circuit produce
losses, the following are the main sources:

1. The supply current into V

. The VCC current is the sum

CC

of the DC supply current and the MOSFET driver and
control currents. The DC supply current into the V

CC

pin
is typically about 1mA. The driver current results from
switching the gate capacitance of the power MOSFET;
this current is typically much larger than the DC current.
Each time the MOSFET is switched on and off, a packet
of gate charge Q

throughout the external bypass capacitor, C

V

CC

is transferred from the CAP pin to

G

CAP

.
The resulting dQ/dt is a current that must be supplied
to the capacitor by the internal regulator.

I

PIC = V

= 1mA + f • Q

Q

• I

IN

Q

G

10

3824fg

applicaTions inForMaTion

LTC3824

2. Power MOSFET switching and condution losses:

+ V

V

P

MOSFET

OUT

=

VIN+ V

+ K(VIN)2(I

D

D

OUT

(I

OUT

)(C

)2(1+δ)R

)(f)

RSS

DS(ON)

3. The I2R losses of the current sense resistor:

P

(SENSE R)

= (I

)2 • R • D

OUT

where D is the duty cycle

4. The inductor loss due to winding resistance:

P

(WINDING)

= (I

OUT

)

2

• R

W

5. Loss of the catch diode:

P

(DIODE)

= I

6. Other losses, including C

• VD • (1–D)

OUT

and C

IN

ESR dissipation

OUT

and inductor core losses, generally account for less
than 2% of total losses.

PCB Layout Considerations

Place the LTC3824 and associated components tightly
together and next to the section with power components.

Use a local via to ground plane for all pads that connect to
ground. Use multiple vias for power components.

Connect the current sense input directly to the current
sense resistor pad. V

and SENSE are the inputs of the

CC

internal current sense amplifier and should be connected
as close to the sense resistor pads as possible. A 100pF
capacitor is required across the V

and sense pins for

CC

noise filtering and should be placed as close to the pins
as possible.

Design Example

As an example, the LTC3824 is designed for an automo­tive 5V power supply with the following specifications:

Maximum I

= 2A, typical VIN = 6V to 18V and can reach

OUT

60V briefly during load dump condition, and operating
switching frequency = 400kHz.

For f = 400kHz, R

is chosen to be 180k.

SET

To achieve best performance from a LTC3824 circuit, the PC
board layout must be carefully designed. For lower power
applications, a 2-layer PC board is sufficient. However, at
higher power levels, a multiple layer PC board is recom­mended. Using a solid ground plane under the circuit is
the easiest way to ensure that switching noise does not
affect the operation.

In order to help dissipate the power from the MOSFET and
diode, keep the ground plane on the layers closest to the
layers where power components are mounted. Use power
planes for the MOSFET and diode in order to improve the
spreading of heat from these components into the PCB.

For best electrical performance the LTC3824 circuit should
be laid out as following:

Place all power components in a tight area. This will
minimize the size of high current loops. Orient the input
and output capacitors and current sense resistor in a way
that minimizes the distance between the pads connected
to ground plane.

Allow inductor ripple current to be 0.8A (40% of the
maximum output current) at V

(18V –5V)5V

(400kHz • 0.8A)18V

will be selected based on the ESR that is required

C

L =

OUT

= 18V,

IN

= 12μH

to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design
a 220µF tantalum capacitor is used.

For worse-case conditions C

should be rated for at least

IN

1A ripple current (half of the maximum output current). A
47µF tantalum capacitor is adequate.

A current limit of 3.3A is selected and R

SENSE

can be

calculated by :

R

SENSE

100mV

=

3.3A

= 0.03Ω

and a 25mΩ resistor can be used.

3824fg

11

LTC3824

BOTTOM VIEW OF

Typical applicaTion

V

IN

12.5V TO 60V

33µF
100V

C

IN1

C

IN2

2.2µF
100V

+

301k

0.1µF

package DescripTion

12V 2A Buck Converter

: SANYO 63MV68AX

C

IN1

: TDK C4532X7R2A225M

100pF

C

IN2

: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K

C

OUT

L1: D104C919AS-330M
D1: SS3H9
Q1: Si7465DP

R

S

0.025Ω

Q1

L1

33µH

1000pF

D1

68k

R

GND

SS

SET

CAP

LTC3824

V

C

C

0.1µF

SENSESYNC/MODE

15k

1000pF

CAP

GATE

V

CC

V

FB

MSE Package

10-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1664 Rev G)

113k

8.06k

3824 TA02

V

OUT

12V

1µF

+

C

OUT

270µF

16V
X7R

2A

EXPOSED PAD OPTION

1.88 ± 0.102
(.074 ± .004)

5.23

(.206)

MIN

0.305 ± 0.038

(.0120 ± .0015)

TYP

RECOMMENDED SOLDER PAD LAYOUT

0.254
(.010)

GAUGE PLANE

0.18

(.007)

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.

1.68 ± 0.102

(.066 ± .004)

(.0197)

DETAIL “A”

DETAIL “A”

0.50

BSC

0° – 6° TYP

0.889 ± 0.127
(.035 ± .005)

3.20 – 3.45

(.126 – .136)

0.53 ± 0.152

(.021 ± .006)

SEATING

PLANE

3.00 ± 0.102
(.118 ± .004)

(NOTE 3)

4.90 ± 0.152

(.193 ± .006)

0.17 – 0.27

(.007 – .011)

TYP

1.10

(.043)

MAX

1

10

1 2

0.50

(.0197)

BSC

8910

7

4 5

3

6

1.88

(.074)

1.68

(.066)

DETAIL “B”

0.497 ± 0.076

(.0196 ± .003)

3.00 ± 0.102
(.118 ± .004)

(NOTE 4)

0.86

(.034)

REF

0.1016 ± 0.0508
(.004 ± .002)

MSOP (MSE) 0910 REV G

0.05 REF

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

REF

0.29
REF

3824fg

12

LTC3824

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

F 12/10 E-grade Ordering Information updated to 125°C

EC header corrected to Operation Junction Temperature
Updated/corrected Note 2
Updated Block Diagram
Shutdown section updated
Package updated
Related Parts updated per Marketing request

G 3/11 Updated Temperature Range for MP-grade part

Added LTC3824MP to Electrical Characteristics tables
Updated Note 2
Updated Typical Application

(Revision history begins at Rev F)

2
2
3
7

8
12
14

2

2, 3

3
14

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

3824fg

13

LTC3824

Typical applicaTion

V

IN

4.5V TO 60V

C

33µF

100V

IN1

+

C

IN2

2.2µF
100V

CAP

LTC3824

3V 2A Buck Converter

C

CAP

0.1µF

V

CC

SENSESYNC/MODE

100pF

C

: SANYO 63MV68AX

IN1

: TDK C4532X7R2A225M

C

IN2

: SANYO OSCON, 16SP270M, TDKC2012X7RIC105K

C

OUT

L1: D104C919AS-330M
D1: SS3H9
Q1: Si7465DP

R

S

0.025Ω

301k

0.1µF

R

GND

SS

SET

GATE

V

FB

V

C

15k

1000pF

Q1

L1

D1

33µH

100pF

51Ω

255k

80.6k

3824 TA02a

+

C

OUT

270µF

1µF
16V

V

OUT

3.3V
2A

relaTeD parTs

PART NUMBER DESCRIPTION COMMENTS

LTC3891 60V, Low I

Synchronous Step-Down DC/DC Controller with

Q

99% Duty Cycle and Low 95ns Minimum On-Time

LT3845A 60V, Low I

Synchronous Step-Down DC/DC Controller Adjustable Fixed Operating Frequency 100kHz to 500kHz,

Q

LTC3812-5 60V Synchronous Step-Down DC/DC Controller Constant On-Time Valley Current Mode, 4V ≤ V

LTC3810 100V Synchronous Step-Down DC/DC Controller Constant On-time Valley Current Mode, 4V ≤ V

LTC3890/LTC3890-1 60V, Low I

, Dual 2-Phase Synchronous Step-Down DC/DC

Q

Controllers with 99% Duty Cycle and 95ns Minimum On-Time

LTC3834/LTC3834-1
LTC3835/LTC3835-1

LTC3857/LTC3857-1
LTC3858/LTC3858-1

LTC3859 Low I

, Single Output Synchronous Step-Down DC/DC

Low I

Q

Controllers with 99% Duty Cycle

, Dual Output 2-Phase Synchronous Step-Down DC/DC

Low I

Q

Controllers with 99% Duty Cycle

, Triple Output Buck/Buck/Boost Synchronous DC/DC

Q

Controller

PLL Capable Fixed Operating Frequency 50kHz to 900kHz,
4V ≤ V

4V ≤ V

0.8V ≤ V

0.8V ≤ V

≤ 60V, 0.8V ≤ V

IN

≤ 60V, 1.23V ≤ V

IN

≤ 0.93VIN, TSSOP-16E

OUT

≤ 0.93VIN, SSOP-28

OUT

≤ 24V, IQ = 50µA

OUT

≤ 36V, IQ = 120µA, TSSOP-16E

OUT

PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 60V,

0.8V ≤ V

≤ 24V, IQ = 50µA

OUT

PLL Fixed Frequency 140kHz to 650kHz, 4V ≤ VIN ≤ 36V,

0.8V ≤ V

≤ 10V, IQ = 30µA/80µA

OUT

PLL Fixed Frequency 50kHz to 900kHz, 4V≤ VIN ≤ 38V,

0.8V ≤ V

≤ 24V, IQ = 50µA/170µA

OUT

All Outputs Remain in Regulation Through Cold Crank,

2.5V ≤ V
I

Q

= 55µA

≤ 38V, V

IN

OUT(BUCK)

Up to 24V, V

OUT(BOOST)

≤ 60V,

IN

≤ 60V,

IN

Up to 60V,

14

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

3824fg

LT 0311 REV G • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2006