ANALOG DEVICES LTC 1966 CMS8 Datasheet

Precision Micropower
∆∑ RMS-to-DC Converter

FeaTures DescripTion

n
Simple to Use, Requires One Capacitor
n
True RMS DC Conversion Using DS Technology
n
High Accuracy:
0.1% Gain Accuracy from 50Hz to 1kHz
0.25% Total Error from 50Hz to 1kHz
n
High Linearity:
0.02% Linearity Allows Simple System Calibration
n
Low Supply Current:
155µA Typ, 170µA Max
n
Ultralow Shutdown Current:
0.1µ A
n
Constant Bandwidth:
Independent of Input Voltage
800kHz –3dB, 6kHz ±1%
n
Flexible Supplies:
2.7V to 5.5V Single Supply Up to ±5.5V Dual Supply
n
Flexible Inputs:
Differential or Single-Ended
Rail-to-Rail Common Mode Voltage Range Up to 1V
n
Flexible Output:
Differential Voltage
PEAK
Rail-to-Rail Output Separate Output Reference Pin Allows Level Shifting
n
Wide Temperature Range:
–55°C to 125°C
n
Small Size:
Space Saving 8-Pin MSOP Package
The LTC®1966 is a true RMS-to-DC converter that utilizes an innovative patented DS computational technique. The internal delta sigma circuitry of the LTC1966 makes it sim­pler to use, more accurate, lower power and dramatically more flexible than conventional log antilog RMS-to-DC converters.
The LTC1966 accepts single-ended or differential input signals (for EMI/RFI rejection) and supports crest factors up to 4. Common mode input range is rail-to-rail. Differential input range is 1V
PEAK
Unlike previously available RMS-to-DC converters, the superior linearity of the LTC1966 allows hassle free system calibration at any input voltage.
The LTC1966 also has a rail-to-rail output with a separate output reference pin providing flexible level shifting. The LTC1966 operates on a single power supply from 2.7V to
5.5V or dual supplies up to ±5.5V. A low power shutdown mode reduces supply current to 0.5µA.
The LTC1966 is insensitive to PC board soldering and stresses, as well as operating temperature. The LTC1966 is packaged in the space saving MSOP package which is ideal for portable applications.

applicaTions

n
True RMS Digital Multimeters and Panel Meters
n
True RMS AC + DC Measurements
LTC1966
, and offers unprecedented linearity.

Typical applicaTion

Single Supply RMS-to-DC Converter
2.7V TO 5.5V
V
DD
OUTPUT
DIFFERENTIAL
INPUT
0.1µF
OPT. AC
COUPLING
IN1
LTC1966
OUT RTN
IN2
EN GND
V
SS
C
AVE
1µF
1966 TA01
Quantum Leap in Linearity Performance
)
0.2
RMS
0
mV AC
IN
–0.2
mV DC – V
–0.4
+
V
OUT
OUT
–0.6
–0.8
60Hz SINEWAVES
–1.0
LINEARITY ERROR (V
100 200 300 400
LTC1966, ∆∑
CONVENTIONAL
LOG/ANTILOG
VIN (mV AC
RMS
1966 TA01b
500500 150 250 350 450
1966fb
)
1
LTC1966
(Note 1)
Supply Voltage
to GND ............................................. – 0.3V to 7V
V
DD
to VSS ............................................ –0.3V to 12V
V
DD
to GND ............................................. –7V to 0.3V
V
SS
Input Currents (Note 2) ...................................... ± 10mA
Output Current (Note 3) ..................................... ± 10mA
ENABLE Voltage ....................... V
OUT RTN Voltage ............................... V
Operating Temperature Range (Note 4)
LTC1966C/LTC1966I ............................ –40°C to 85°C
LTC1966H .......................................... –40°C to 125°C
LTC1966MP ....................................... –55°C to 125°C
Specified Temperature Range (Note 5)
LTC1966C/LTC1966I ............................ –40°C to 85°C
LTC1966H .......................................... –40°C to 125°C
LTC1966MP ....................................... –55°C to 125°C
Maximum Junction Temperature ......................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
– 0.3V to VSS + 12V
SS
– 0.3V to V
SS
DD

pin conFiguraTionabsoluTe MaxiMuM raTings

TOP VIEW
GND
1
IN1
2
IN2
3
V
4
SS
MS8 PACKAGE
8-LEAD PLASTIC MSOP
= 150°C, θJA = 220°C/W
T
JMAX
8
ENABLE
7
V
DD
6
OUT RTN
5
V
OUT

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1966CMS8#PBF LTC1966CMS8#TRPBF LTT G 8-Lead Plastic MSOP 0°C to 70°C LTC1966IMS8#PBF LTC1966IMS8#TRPBF LTT H 8-Lead Plastic MSOP –40°C to 85°C LTC1966HMS8#PBF LTC1966HMS8#TRPBF LTT G 8-Lead Plastic MSOP –40°C to 125°C LTC1966MPMS8#PBF LTC1966MPMS8#TRPBF LTT G 8-Lead Plastic MSOP –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = –5V, V V
= 0.5V unless otherwise noted.
ENABLE
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Conversion Accuracy
G
V
LIN
ERR
OOS
Conversion Gain Error 50Hz to 1kHz Input (Notes 6, 7)
Output Offset Voltage (Notes 6, 7)
Linearity Error 50mV to 350mV (Notes 7, 8)
ERR
LTC1966C, LTC1966I LTC1966H, LTC1966MP
LTC1966C, LTC1966I LTC1966H, LTC1966MP
OUTRTN
= 0V, C
l l
l l
l
= 10µF, VIN = 200mV
AVE
±0.1 ±0.3
0.1
0.02 0.15 %
±0.4 ±0.7
0.2
0.4
0.6
RMS
,
mV mV mV
% % %
2
1966fb
LTC1966
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = –5V, V V
= 0.5V unless otherwise noted.
ENABLE
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
PSRR Power Supply Rejection (Note 9)
V
IOS
Input Offset Voltage (Notes 6, 7, 10)
Accuracy vs Crest Factor (CF)
CF = 4 60Hz Fundamental, 200mV CF = 5 60Hz Fundamental, 200mV
Input Characteristics
I
VR
Z
IN
Input Voltage Range (Note 14) Input Impedance Average, Differential (Note 12)
CMRRI Input Common Mode Rejection (Note 13) V V
IMAX
IMIN
Maximum Input Swing Accuracy = 1% (Note 14) Minimum RMS Input
PSRRI Power Supply Rejection V
Output Characteristics
OVR Output Voltage Range Z
OUT
Output Impedance V
CMRRO Output Common Mode Rejection (Note 13) V
OMAX
Maximum Differential Output Swing Accuracy = 2%, DC Input (Note 14)
PSRRO Power Supply Rejection V
Frequency Response
f
1P
f
10P
f
–3dB
1% Additional Error (Note 15) C 10% Additional Error (Note 15) C ±3dB Frequency (Note 15) 800 kHz
Power Supplies
V
DD
V
SS
I
DD
I
SS
Positive Supply Voltage Negative Supply Voltage (Note 16) Positive Supply Current IN1 = 20mV, IN2 = 0V
Negative Supply Current IN1 = 20mV, IN2 = 0V
Shutdown Characteristics
I
DDS
I
SSS
I
IH
Supply Currents V Supply Currents V
ENABLE Pin Current High V
LTC1966C, LTC1966I LTC1966H, LTC1966MP
(Note 11)
RMS
(Note 11)
RMS
Average, Common Mode (Note 12)
Supply (Note 9)
DD
V
Supply (Note 9)
SS
= 0.5V (Note 12)
ENABLE
V
= 4.5V
ENABLE
Supply (Note 9)
DD
V
Supply (Note 9)
SS
= 10µF 6 kHz
AVE
= 10µF 20 kHz
AVE
IN1 = 200mV, IN2 = 0V
= 4.5V
ENABLE
= 4.5V
ENABLE
LTC1966H, LTC1966MP
= 4.5V
ENABLE
OUTRTN
= 0V, C
l l
l
l
l
l
l
l
l
l l
l
l
l
l
l l
l
l
l
l
l
l l
l
= 10µF, VIN = 200mV
AVE
RMS
,
0.02 0.15
0.20
0.3
0.02 0.8
1.0
–1 2 mV
–20 30 mV
V
SS
8
100
V
DD
MΩ MΩ
7 200 µV/V
1 1.05 V
5 mV
250 120
V
SS
75 85
600 300
V
DD
µV/V µV/V
95
30 16 200 µV/V
1.0
1.05 V
0.9 250 501000
500
µV/V µV/V
2.7 5.5 V
–5.5 0 V
155
170 µA
158
12 20 µA
0.5 10 µA
–1
–0.1 µA
–2
–0.3 –0.05 µA
%V %V %V
mV mV
V
V
V
µA
µA
1966fb
3
LTC1966
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, VSS = –5V, V V
= 0.5V unless otherwise noted.
ENABLE
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
IL
V
TH
V
HYS
ENABLE Pin Current Low V
ENABLE Threshold Voltage VDD = 5V, VSS = –5V
ENABLE Threshold Hysteresis 0.1 V
= 0.5V
ENABLE
LTC1966H, LTC1966MP
V
= 5V, VSS = GND
DD
V
= 2.7V, VSS = GND
DD
OUTRTN
= 0V, C
l l
= 10µF, VIN = 200mV
AVE
–2
–1 –0.1 µA
–10
2.4
2.1
1.3
RMS
,
µA
V V V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to V V
. If the inputs are driven beyond the rails, the current should be limited
DD
SS
and
to less than 10mA. Note 3: The LTC1966 output (V
) is high impedance and can be
OUT
overdriven, either sinking or sourcing current, to the limits stated. Note 4: The LTC1966C/LTC1966I are guaranteed functional over
the operating temperature range of –40°C to 85°C. The LTC1966H/ LTC1966MP are guaranteed functional over the operating temperature range of –55°C to 125°C.
Note 5: The LTC1966C is guaranteed to meet specified performance from 0°C to 70°C. The LTC1966C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested nor QA sampled at these temperatures. The LTC1966I is guaranteed to meet specified performance from –40°C to 85°C. The LTC1966H is guaranteed to meet specified performance from –40°C to 125°C. The LTC1966MP is guaranteed to meet specified performance from –55°C to 125°C.
Note 6: High speed automatic testing cannot be performed with C
= 10µF. The LTC1966 is 100% tested with C
AVE
= 22nF. Correlation
AVE
tests have shown that the performance limits above can be guaranteed with the additional testing being performed to guarantee proper operation of all the internal circuitry.
Note 7: High speed automatic testing cannot be performed with 60Hz inputs. The LTC1966 is 100% tested with DC and 10kHz input signals. Measurements with DC inputs from 50mV to 350mV are used to calculate the four parameters: G
ERR
, V
OOS
, V
and linearity error. Correlation tests
IOS
have shown that the performance limits above can be guaranteed with the additional testing being performed to guarantee proper operation of all internal circuitry.
Note 8: The LTC1966 is inherently very linear. Unlike older log/antilog circuits, its behavior is the same with DC and AC inputs, and DC inputs are used for high speed testing.
Note 9: The power supply rejections of the LTC1966 are measured with DC inputs from 50mV to 350mV. The change in accuracy from V V
= 5.5V with VSS = 0V is divided by 2.8V. The change in accuracy from
DD
V
= 0V to VSS = –5.5V with VDD = 5.5V is divided by 5.5V.
SS
= 2.7V to
DD
Note 10: Previous generation RMS-to-DC converters required nonlinear input stages as well as a nonlinear core. Some parts specify a DC reversal error, combining the effects of input nonlinearity and input offset voltage. The LTC1966 behavior is simpler to characterize and the input offset voltage is the only significant source of DC reversal error.
Note 11: High speed automatic testing cannot be performed with 60Hz inputs. The LTC1966 is 100% tested with DC stimulus. Correlation tests have shown that the performance limits above can be guaranteed with the additional testing being performed to verify proper operation of all internal circuitry.
Note 12: The LTC1966 is a switched capacitor device and the input/ output impedance is an average impedance over many clock cycles. The input impedance will not necessarily lead to an attenuation of the input signal measured. Refer to the Applications Information section titled Input Impedance for more information.
Note 13: The common mode rejection ratios of the LTC1966 are measured with DC inputs from 50mV to 350mV. The input CMRR is defined as the change in V input levels of V output CMRR is defined as the change in V V
and OUT RTN = VDD – 350mV divided by VDD – VSS – 350mV.
SS
measured between input levels of VSS to VSS + 350mV and
IOS
– 350mV to VDD divided by VDD – VSS – 350mV. The
DD
measured with OUT RTN =
OOS
Note 14: Each input of the LTC1966 can withstand any voltage within the supply range. These inputs are protected with ESD diodes, so going beyond the supply voltages can damage the part if the absolute maximum current ratings are exceeded. Likewise for the output pins. The LTC1966 input and output voltage swings are limited by internal clipping. The maximum differential input of the LTC1966 (referred to as maximum input swing) is 1V. This applies to either input polarity, so it can be thought of as ±1V. Because the differential input voltage gets processed by the LTC1966 with gain, it is subject to internal clipping. Exceeding the 1V maximum can, depending on the input crest factor, impact the accuracy of the output voltage, but does not damage the part. Fortunately, the LTC1966’s ∆∑ topology is relatively tolerant of momentary internal clipping. The input clipping is tested with a crest factor of 2, while the output clipping is tested with a DC input.
Note 15: The LTC1966 exploits oversampling and noise shaping to reduce the quantization noise of internal 1-bit analog-to-digital conversions. At higher input frequencies, increasingly large portions of this noise are aliased down to DC. Because the noise is shifted in frequency, it becomes a low frequency rumble and is only filtered at the expense of increasingly long settling times. The LTC1966 is inherently wideband, but the output accuracy is degraded by this aliased noise. These specifications apply with C
= 10µF and constitute a 3-sigma variation of the output rumble.
AVE
Note 16: The LTC1966 can operate down to 2.7V single supply but cannot operate at ±2.7V. This additional constraint on V
mathematically as –3 • (V
– 2.7V) ≤ VSS ≤ Ground.
DD
can be expressed
SS
4
1966fb

Typical perForMance characTerisTics

GAIN ERROR (%)
LTC1966
Gain and Offsets vs Input Common Mode
0.5 VDD = 5V
0.4
= –5V
V
SS
0.3
0.2
0.1
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
0
–5
GAIN ERROR
V
OOS
V
IOS
–4 –2
–3
–1
INPUT COMMON MODE (V)
Gain and Offsets vs Output Common Mode
0.5 VDD = 5V
0.4
= –5V
V
SS
0.3
0.2
GAIN ERROR
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
–4 –2
–5
–3
OUTPUT COMMON MODE (V)
V
–1
2
0 54
IOS
0 54
3
1
2
3
1
1966 G03
V
OOS
1966 G06
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
Gain and Offsets vs Input Common Mode
VDD = 5V
= GND
V
SS
0.5 1.5
1.0
0
INPUT COMMON MODE (V)
2.0
V
IOS
V
OOS
GAIN ERROR
3.5
2.5 5.04.5
3.0
Gain and Offsets vs Output Common Mode
VDD = 5V
= GND
V
SS
V
IOS
V
OOS
GAIN ERROR
0.5 1.5
1.0
0
OUTPUT COMMON MODE (V)
2.0
3.5
2.5 5.04.5
3.0
4.0
4.0
1966 G02
1966 G05
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
Gain and Offsets vs Input Common Mode
VDD = 2.7V
= GND
V
0
0
SS
0.3 0.9
0.6 INPUT COMMON MODE (V)
V
IOS
GAIN ERROR
V
OOS
1.5 2.7
1.8
1.2
Gain and Offsets vs Output Common Mode
VDD = 2.7V
= GND
V
SS
GAIN ERROR
0
V
OOS
0.3 0.9
0.6
0
OUTPUT COMMON MODE (V)
V
IOS
1.5 2.7
1.8
1.2
2.1
2.1
2.4
1966 G01
2.4
1966 G04
1.0
0.8
0.6 OFFSET VOLTAGE (mV)
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
1.0
0.8
0.6 OFFSET VOLTAGE (mV)
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
Gain and Offsets vs Temperature
0.5 VDD = 5V
0.4
= –5V
V
SS
0.3
0.2
GAIN ERROR
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
–40 –20
–60
V
IOS
40 602080
0 TEMPERATURE (°C)
V
OOS
100 120
1966 G09
0.5
0.4
0.3 OFFSET VOLTAGE (mV)
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
140
Gain and Offsets vs Temperature
0.5 VDD = 5V
0.4
= GND
V
SS
0.3
0.2
0.1
0
GAIN ERROR
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
–60
–40
–20 0
TEMPERATURE (°C)
402060
80 100 120
Gain and Offsets vs Temperature
1966 G07
1.0
0.8
0.6 OFFSET VOLTAGE (mV)
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
140
1966fb
0.5
0.4
IOS
0.3
0.2
V
OOS
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
140
1966 G08
V
0.5 VDD = 2.7V
0.4
= GND
V
SS
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
–60
–40
–20
V
IOS
GAIN ERROR
V
OOS
402060
0
TEMPERATURE (°C)
80 100 120
5
LTC1966
Typical perForMance characTerisTics
Gain and Offsets vs VSS Supply
0.5 VDD = 5V
0.4
0.3
0.2
GAIN ERROR
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
–6
NOMINAL
–5
SPECIFIED
CONDITIONS
–4
VSS (V)
V
OOS
–2–3–1
Performance vs Large Crest Factors
230
220
210
200
190
180
170
OUTPUT VOLTAGE (mV DC)
160
150
FUNDAMENTAL
FREQUENCY
200mV
RMS
= 4.7µF
C
AVE
= 5V
V
DD
5%/DIV
2 3 5
1
20Hz
100Hz
SCR WAVEFORMS
4
CREST FACTOR
60Hz
6 7 8
V
1966 G11
250Hz
1966 G12
IOS
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0
0.5 VSS = GND
0.4
0.3
OFFSET VOLTAGE (mV)
0.2
0.1
0
–0.1
GAIN ERROR (%)
–0.2
–0.3
–0.4
–0.5
2.5
3.0
AC Linearity
0.20 60Hz SINEWAVES
= 1µF
C
AVE
0.15
)
RMS
0.10
0.05
(mV AC
IN
–0.05
(mV DC) – V
–0.10
OUT
V
–0.15
–0.20
= GND
V
IN2
0
100 200 300 50035050 150 250 450
0
GAIN ERROR
V
3.5
V
(mV AC
IN1
V
IOS
OOS
4.0
VDD (V)
RMS
4.5
Performance vs Crest FactorGain and Offsets vs VDD Supply
5.0
1966 G10
5.5
1
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
201.0 200mV
C
AVE
200.8
V
DD
OFFSET VOLTAGE (mV)
O.1%/DIV
200.6
200.4
200.2
OUTPUT VOLTAGE (mV DC)
200.0
199.8
1.0
SCR WAVEFORMS
RMS
= 10µF
= 5V
1.5 2.5
2.0 3.0 CREST FACTOR
20Hz 60Hz
100Hz
3.5
4.0
4.5
5.0
1966 G15
Output Accuracy vs Signal Amplitude
10
1% ERROR
5
)
RMS
0
(mV
IN
–5
–1% ERROR
–10
(mV DC) – V
OUT
V
–15
–20
400
)
1966 G13
AC INPUT
V
= 3V
DD
0
0.5 1 1.5 2 V
(V
IN1
AC INPUTS = 60Hz SINEWAVES V
= GND
IN2
AC INPUT
= 5V
V
DD
DC INPUT
VDD = 5V
)
RMS
2.5
1966 G24
| (mV)
INDC
– |V
OUTDC
V
6
0.10
0.08
0.06
0.04
0.02
–0.02
–0.04
–0.06
–0.08
–0.10
DC Linearity
C
= 1µF
AVE
= GND
V
IN2
0
–300
–500
–100
V
(mV)
IN1
EFFECT OF OFFSETS MAY BE POSITIVE OR NEGATIVE
100
300
1966 G14
500
Quiescent Supply Currents vs Supply Voltage
200
175
150
125
100
75
50
SUPPLY CURRENT (µA)
25
0
–25
0
2 6
1 5
VDD SUPPLY VOLTAGE (V)
3
4
VSS = GND
I
DD
I
SS
1966 G16
Shutdown Currents vs ENABLE Voltage
250
VDD = 5V
200
150
100
50
I
0
SUPPLY CURRENT (µA)
–50
–100
SS
0
1 2
ENABLE PIN VOLTAGE (V)
I
DD
3 5
I
EN
4 6
1966 G18
ENABLE PIN CURRENT (nA)
500
250
0
–250
–500
1966fb
Typical perForMance characTerisTics
Quiescent Supply Currents vs Temperature
170
VDD = 5V, VSS = –5V
160
VDD = 5V, VSS = GND
150
140
VDD = 2.7V, VSS = GND
(µA)
130
DD
I
120
VDD = 5V, VSS = –5V
110
VDD = 5V, VSS = GND
100
90
–40 –20 6040
–60
0 20 TEMPERATURE (°C)
Bandwidth to 100kHz
202
0.5%/DIV = 47µF
C
AVE
201
200
199
198
197
OUTPUT DC VOLTAGE (mV)
196
195
0
30
40
20
10
INPUT FREQUENCY (kHz)
VDD = 2.7V, VSS = GND
80 100 120 140
1966 G17
70
60 80
50
90
1966 G21
100
40
35
30
25
I
SS
(µA)
20
15
10
5
0
Input Signal Bandwidth
1000
100
10
OUTPUT DC VOLTAGE (mV)
1 100 1K
0.1%
ERROR1%ERROR
INPUT SIGNAL FREQUENCY (Hz)
10K 100K 1M
DC Transfer Function Near Zero
30
V
= GND
IN2
THREE REPRESENTITIVE UNITS
25
20
15
10
(mV DC)
OUT
V
5
0
–5
–10
–20
–15
–10
–5
V
IN1
0
(mV DC)
5
–3dB
10
10%
ERROR
1966 G19
15
1966 G22
LTC1966
Input Signal Bandwidth
202
200
198
196
194 192
190
188
OUTPUT DC VOLTAGE (mV)
186
1%/DIV
184
= 2.2µF
C
AVE
182
1
Common Mode Rejection Ratio vs Frequency
110
100
90
80
70
60
50
40
30
COMMON MODE REJECTION RATIO (dB)
20
20
10 1k 10k 1M
10 100 1000
INPUT FREQUENCY (kHz)
VDD = 5V
= –5V
V
SS
±5V INPUT CONVERSION
TO DC OUTPUT
100
FREQUENCY (Hz)
1966 G20
100k
1966 G23
1966fb
7
LTC1966
––
()

pin FuncTions

GND (Pin 1): Ground. A power return pin. IN1 (Pin 2): Differential Input. DC coupled (polarity is
irrelevant). IN2 (Pin 3): Differential Input. DC coupled (polarity is
irrelevant).
(Pin 4): Negative Voltage Supply. GND to – 5.5V.
V
SS
(Pin 5): Output Voltage. This is high impedance.
V
OUT
The RMS averaging is accomplished with a single shunt capacitor from this node to OUT RTN. The transfer func­tion is given by:
V OUT RTN Average IN IN
()
OUT
=
21
2
 
OUT RTN (Pin 6): Output Return. The output voltage is created relative to this pin. The V are not balanced and this pin should be tied to a low impedance, both AC and DC. Although it is typically tied to GND, it can be tied to any arbitrary voltage, V
RTN < (V
OUT RTN = GND.
(Pin 7): Positive Voltage Supply. 2.7V to 5.5V.
V
DD
ENABLE (Pin 8): An Active Low Enable Input. LTC1966 is debiased if open circuited or driven to V operation, pull to GND, a logic low or even V
– Max Output). Best results are obtained when
DD
and OUT RTN pins
OUT
SS
. For normal
DD
.
SS
< OUT
8
1966fb

applicaTions inForMaTion

LTC1966
START
READ
RMS-TO-DC
CONVERSION
CONTACT LTC BY PHONE OR
AT www.linear.com AND
GET SOME NOW
YOU ALREADY TRY OUT
READ THE TROUBLESHOOTING
GUIDE. IF NECESSARY, CALL
LTC FOR APPLICATIONS SUPPORT
NOT
SURE
NO
DID
THE LTC1966?
YES NO
NO
DO YOU
NEED TRUE RMS-TO-DC
CONVERSION?
YES
DO YOU
HAVE ANY LTC1966s
YET?
YES
NO
DID
YOUR CIRCUIT
WORK?
NO
DO YOU WANT TO
KNOW HOW TO USE THE
LTC1966 FIRST?
FIND SOMEONE WHO DOES
AND GIVE THEM THIS
DATA SHEET
YES
READ THE DESIGN COOKBOOK
CONTACT LTC
AND PLACE YOUR ORDER
YES
WELL ENOUGH THAT YOU
YES
NOW DOES YOUR
RMS CIRCUIT WORK
ARE READY TO BUY
THE LTC1966?
NO
READ THE TROUBLESHOOTING
GUIDE AGAIN OR CALL LTC
FOR APPLICATIONS SUPPORT
1966 TA02
1966fb
9
LTC1966
VV
applicaTions inForMaTion
RMS-TO-DC CONVERSION
Definition of RMS
RMS amplitude is the consistent, fair and standard way to measure and compare dynamic signals of all shapes and sizes. Simply stated, the RMS amplitude is the heating potential of a dynamic waveform. A 1V
AC waveform
RMS
will generate the same heat in a resistive load as will 1V DC.
+
R1V DC
1V AC
RMS
R
R1V (AC + DC) RMS
SAME HEAT
1966 F01
Figure 1
Mathematically, RMS is the root of the mean of the square:
2
=
RMS
Alternatives to RMS
Other ways to quantify dynamic waveforms include peak detection and average rectification. In both cases, an aver­age (DC) value results, but the value is only accurate at the one chosen waveform type for which it is calibrated, typically sine waves. The errors with average rectification are shown in Table 1. Peak detection is worse in all cases and is rarely used.
Table 1. Errors with Average Rectification vs True RMS
AVERAGE
RECTIFIED
WAVEFORM V
Square Wave 1.000 1.000 11% Sine Wave 1.000 0.900 *Calibrate for 0% Error Triangle Wave 1.000 0.866 –3.8% SCR at 1/2 Power,
Θ = 90° SCR at 1/4 Power,
Θ = 114°
RMS
1.000 0.637 –29.3%
1.000 0.536 –40.4%
(V) ERROR*
The last two entries of Table 1 are chopped sine waves as is commonly created with thyristors such as SCRs and Triacs. Figure 2a shows a typical circuit and Figure 2b shows the resulting load voltage, switch voltage and load currents. The power delivered to the load depends on the firing angle, as well as any parasitic losses such as switch ON voltage drop. Real circuit waveforms will also typically have significant ringing at the switching transition, depen­dent on exact circuit parasitics. For the purposes of this data sheet, SCR waveforms refers to the ideal chopped sine wave, though the LTC1966 will do faithful RMS-to-DC conversion with real SCR waveforms as well.
The case shown is for Θ = 90°, which corresponds to 50% of available power being delivered to the load. As noted in Table 1, when Θ = 114°, only 25% of the available power is being delivered to the load and the power drops quickly as Θ approaches 180°.
With an average rectification scheme and the typical calibration to compensate for errors with sine waves, the RMS level of an input sine wave is properly reported; it is only with a nonsinusoidal waveform that errors occur. Because of this calibration, and the output reading in
, the term true RMS got coined to denote the use of
V
RMS
an actual RMS-to-DC converter as opposed to a calibrated average rectifier.
V
LOAD
MAINS
AC
V
V
LOAD
V
I
LOAD
LINE
THY
+
V
LINE
Θ
+
I
LOAD
CONTROL
Figure 2a
Figure 2b
+
1966 F02a
1966 F02b
V
THY
10
1966fb
applicaTions inForMaTion
()
LTC1966
How an RMS-to-DC Converter Works
Monolithic RMS-to-DC converters use an implicit com­putation to calculate the RMS value of an input signal. The fundamental building block is an analog multiply/ divide used as shown in Figure 3. Analysis of this topol­ogy is easy and starts by identifying the inputs and the output of the lowpass filter. The input to the LPF is the calculation from the multiplier/divider; (V
IN
)2/V
OUT
. The lowpass filter will take the average of this to create the output, mathematically:
2
V
OUT
()
=
  
Because V is DC,
2
 
 
V
VVor
()
VVRMS V
V
()
IN
 
V
OUT
 
()
=
OUT
22
OUT IN
OUT IN IN
=
=
V
IN
,
 
V
OUT
OUT
2
 
=
V
IN
V
OUT
()
()
V
()
IN
V
OUT
2
 
and
,
,
2
=
so
,
How the LTC1966 RMS-to-DC Converter Works
The LTC1966 uses a completely new topology for RMS­to-DC conversion, in which a ∆S modulator acts as the divider, and a simple polarity switch is used as the multiplier as shown in Figure 4.
V
IN
D
α
V
OUT
∆–∑
REF
V
IN
±1
LPF
Figure 4. Topology of LTC1966
V
OUT
The ∆S modulator has a single-bit output whose average duty cycle (D) will be proportional to the ratio of the input signal divided by the output. The ∆S is a 2nd order modula­tor with excellent linearity. The single bit output is used to selectively buffer or invert the input signal. Again, this is a circuit with excellent linearity, because it operates at only two points: ±1 gain; the average effective multiplication over time will be on the straight line between these two points. The combination of these two elements again creates a lowpass filter input signal proportional to (VIN)2/V
OUT
,
which, as shown above, results in RMS-to-DC conversion.
2
V
()
IN
V
OUT
V
IN
Figure 3. RMS-to-DC Converter with Implicit Computation
× ÷
LPF
1966 F03
V
OUT
Unlike the prior generation RMS-to-DC converters, the LTC1966 computation does NOT use log/antilog circuits, which have all the same problems, and more, of log/antilog multipliers/dividers, i.e., linearity is poor, the bandwidth changes with the signal amplitude and the gain drifts with temperature.
The lowpass filter performs the averaging of the RMS function and must be a lower corner frequency than the lowest frequency of interest. For line frequency measure­ments, this filter is simply too large to implement on-chip, but the LTC1966 needs only one capacitor on the output to implement the lowpass filter. The user can select this capacitor depending on frequency range and settling time requirements, as will be covered in the Design Cookbook section to follow.
This topology is inherently more stable and linear than log/antilog implementations primarily because all of the signal processing occurs in circuits with high gain op amps operating closed loop.
1966fb
11
LTC1966
applicaTions inForMaTion
More detail of the LTC1966 inner workings is shown in the Simplified Schematic towards the end of this data sheet. Note that the internal scalings are such that the ∆S output duty cycle is limited to 0% or 100% only when VIN
exceeds ± 4 • V
OUT
.
Linearity of an RMS-to-DC Converter
Linearity may seem like an odd property for a device that implements a function that includes two very nonlinear processes: squaring and square rooting.
However, an RMS-to-DC converter has a transfer function, RMS volts in to DC volts out, that should ideally have a 1:1 transfer function. To the extent that the input to output transfer function does not lie on a straight line, the part is nonlinear.
A more complete look at linearity uses the simple model shown in Figure 5. Here an ideal RMS core is corrupted by both input circuitry and output circuitry that have imperfect transfer functions. As noted, input offset is introduced in the input circuitry, while output offset is introduced in the output circuitry.
Any nonlinearity that occurs in the output circuity will cor­rupt the RMS in to DC out transfer function. A nonlinearity in the input circuitry will typically corrupt that transfer function far less, simply because with an AC input, the RMS-to-DC conversion will average the nonlinearity from a whole range of input values together.
But the input nonlinearity will still cause problems in an RMS-to-DC converter because it will corrupt the accuracy as the input signal shape changes. Although an RMS-to-DC converter will convert any input waveform to a DC output, the accuracy is not necessarily as good for all waveforms as it is with sine waves. A common way to describe dy­namic signal wave shapes is crest factor. The crest factor is the ratio of the peak value relative to the RMS value of a waveform. A signal with a crest factor of 4, for instance, has a peak that is four times its RMS value. Because this peak has energy (proportional to voltage squared) that is 16 times (4
2
) the energy of the RMS value, the peak is
necessarily present for at most 6.25% (1/16) of the time. The LTC1966 performs very well with crest factors of 4
or less and will respond with reduced accuracy to signals with higher crest factors. The high performance with crest factors less than 4 is directly attributable to the high linear­ity throughout the LTC1966.
The LTC1966 does not require an input rectifier, as is com­mon with traditional log/antilog RMS-to-DC converters. Thus, the LTC1966 has none of the nonlinearities that are introduced by rectification.
The excellent linearity of the LTC1966 allows calibration to be highly effective at reducing system errors. See System Calibration section following the Design Cookbook.
12
INPUT CIRCUITRY
INPUT OUTPUT
• V
IOS
• INPUT NONLINEARITY
Figure 5. Linearity Model of an RMS-to-DC Converter
IDEAL
RMS-TO-DC
CONVERTER
OUTPUT CIRCUITRY
• V
OOS
• OUTPUT NONLINEARITY
1966 F05
1966fb
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