The LT®1374 is a 500kHz monolithic buck mode switching
regulator. A 4.5A switch is included on the die along with
all the necessary oscillator, control and logic circuitry. High
switching frequency allows a considerable reduction in the
size of external components. The topology is current mode
for fast transient response and good loop stability. Both
fixed output voltage and adjustable parts are available.
A special high speed bipolar process and new design techniques achieve high efficiency at high switching frequency.
Efficiency is maintained over a wide output current range
by using the output to bias the circuitry
supply boost
capacitor to saturate the power switch.
The LT1374 is available in standard 7-pin DD, TO-220, fused
lead SO-8 and 16-pin exposed pad TSSOP packages. Full
cycle-by-cycle short-circuit protection and thermal shutdown are provided. Standard surface mount external parts
may be used, including the inductor and capacitors. There
is the optional function of shutdown or synchronization. A
shutdown signal reduces supply current to 20µA. Synchro-
nization allows an external logic level signal to increase the
internal oscillator from 580kHz to 1MHz.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected by U.S. Patents, Including 6111439, 5668493, 5656965
and by utilizing a
U
TYPICAL APPLICATIO
5V Buck Converter
D2
CMDSH3 OR FMMD914
C2
0.27µF
/2
V
IN
SHDN
BOOST
LT1374-5
GND
V
C
V
SW
BIAS
SENSE
C
1.5nF
C
INPUT
6V TO 25V
* RIPPLE CURRENT RATING ≥ I
** INCREASE L1 TO 10µH FOR LOAD CURRENTS ABOVE 3.5A AND TO 20µH ABOVE 4A
BOOST Pin Voltage ................................................. 38V
BOOST Pin Above Input Voltage ............................. 15V
SHDN Pin Voltage ..................................................... 7V
BIAS Pin Voltage ...................................................... 7V
FB Pin Voltage (Adjustable Part) ............................ 3.5V
UU
W
PACKAGE/ORDER I FOR ATIO
ORDER
FRONT VIEW
7
6
TAB
IS
GND
7-LEAD PLASTIC DD
T
= 125°C, θJA = 30°C/ W
JMAX
WITH PACKAGE SOLDERED TO 0.5 SQUARE INCH
COPPER AREA OVER BACKSIDE GROUND PLANE
OR INTERNAL POWER PLANE. θ
FROM 20°C/W TO >40°C/W DEPENDING ON
MOUNTING TECHNIQUES
*Default is the adjustable output voltage device with FB pin and shutdown function. Option -5 replaces FB with SENSE pin for fixed 5V output applications.
-SYNC replaces SHDN with SYNC pin for applications requiring synchronization. Consult LTC Marketing for parts specified with wider operating
temperature ranges.
2
1374fd
LT1374
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating tempera-
VC Pin to Switch Current Transconductance5.3A/ V
Error Amplifier Source CurrentVFB = 2.1V or V
Error Amplifier Sink CurrentVFB = 2.7V or V
VC Pin Switching ThresholdDuty Cycle = 00.9V
VC Pin High Clamp2.1V
Switch Current LimitVC Open, VFB = 2.1V or V
Slope Compensation (Note 9)DC = 80%0.8A
Switch On Resistance (Note 7)ISW = 4.5A0.070.1Ω
Maximum Switch Duty CycleVFB = 2.1V or V
Switch FrequencyVC Set to Give 50% Duty Cycle460500540kHz
Switch Frequency Line Regulation5V ≤ VIN ≤ 25V, (5V ≤ VIN ≤ 32V for LT1374HV)●00.15%/ V
Frequency Shifting Threshold on FB Pin∆f = 10kHz●0.81.01.3V
Minimum Input Voltage (Note 3)●5.05.5V
Minimum Boost Voltage (Note 4)ISW ≤ 4.5A●2.33.0V
Boost Current (Note 5)ISW = 1A●2035mA
VIN Supply Current (Note 6)V
BIAS Supply Current (Note 6)V
Shutdown Supply CurrentV
Lockout ThresholdVC Open●2.32.382.46V
Shutdown ThresholdsVC Open Device Shutting Down●0.130.370.60V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Gain is measured with a V
switching threshold level to 200mV below the upper clamp level.
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
swing equal to 200mV above the
C
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
1374fd
3
LT1374
TEMPERATURE (°C)
–50
2.430
2.425
2.420
2.415
2.410
100
1374 G03
–250255075125
FEEDBACK VOLTAGE (V)
ELECTRICAL CHARACTERISTICS
Note 5: Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 6: V
supply current is the current drawn when the BIAS pin is held
IN
at 5V and switching is disabled. If the BIAS pin is unavailable or open
circuit, the sum of V
and BIAS supply currents will be drawn by the V
IN
IN
pin.
Note 7: Switch on resistance is calculated by dividing V
to VSW voltage
IN
Note 8: Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance,
refer to the SENSE pin on the fixed voltage parts. Divide values shown by
the ratio V
OUT
Note 9: Slope compensation is the current subtracted from the switch
current limit at 80% duty cycle. See Maximum Output Load Current in the
Applications Information section for further details.
by the forced current (4.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Switch Voltage Drop
500
450
400
350
300
250
200
150
SWITCH VOLTAGE (mV)
100
50
0
0
1
SWITCH CURRENT (A)
125°C
25°C
–40°C
2
3
45
1374 G18
Switch Peak Current Limit
6.5
6.0
5.5
5.0
4.5
4.0
SWITCH PEAK CURRENT (A)
3.5
3.0
0
MINIMUM
20
DUTY CYCLE (%)
40
60
TYPICAL
80
/2.42.
Feedback Pin Voltage
100
1374 G02
Shutdown Pin Bias Current
500
400
300
200
CURRENT (µA)
8
4
0
–50
4
CURRENT REQUIRED TO FORCE SHUTDOWN
(FLOWS OUT OF PIN). AFTER SHUTDOWN,
CURRENT DROPS TO A FEW µA
AT 2.38V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
50100 125
–250
2575
TEMPERATURE (°C)
1374 G04
Standby and Shutdown Thresholds
2.40
STANDBY
2.36
2.32
0.8
START-UP
0.4
SHUTDOWN PIN VOLTAGE (V)
0
–50
–250
SHUTDOWN
50100 125
2575
JUNCTION TEMPERATURE (°C)
1374 G05
Shutdown Supply Current
25
V
= 0V
SHDN
20
15
10
5
INPUT SUPPLY CURRENT (µA)
0
0
5 101520
INPUT VOLTAGE (V)
25
1374 G06
1374fd
LOAD CURRENT (mA)
1
5.8
INPUT VOLTAGE (V)
6.0
6.2
6.4
101001000
1374 G12
5.6
5.4
5.2
5.0
MINIMUM
RUNNING
VOLTAGE
MINIMUM
STARTING
VOLTAGE
INPUT VOLTAGE (V)
0
CURRENT (A)
4.5
4.0
3.5
3.0
5101520
1374 G15
25
L = 20µH
L = 10µH
L = 5µH
V
OUT
= 5V
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1374
Shutdown Supply Current
70
60
50
40
30
20
INPUT SUPPLY CURRENT (µA)
10
0
0
VIN = 25V
0.10.20.30.4
SHUTDOWN VOLTAGE (V)
Frequency Foldback
500
400
300
200
100
0
SWITCHING FREQUENCY (kHz) OR CURRENT (µA)
0
SWITCHING
FREQUENCY
FEEDBACK PIN
CURRENT
0.5
1.0
FEEDBACK PIN VOLTAGE (V)
1.5
VIN = 10V
2.0
1374 G07
1374 G10
2.5
Error Amplifier Transconductance
2500
2000
1500
1000
500
TRANSCONDUCTANCE (µMho)
0
–50
0
–25
JUNCTION TEMPERATURE (°C)
50
25
Switching Frequency
550
540
530
520
510
500
490
FREQUENCY (kHz)
480
470
460
450
–250255075125
–50
TEMPERATURE (°C)
Error Amplifier Transconductance
3000
2500
2000
1500
V
GAIN (µMho)
100
125
1374 G08
75
FB
1000
ERROR AMPLIFIER EQUIVALENT CIRCUIT
R
LOAD
500
10010k100k10M
PHASE
GAIN
R
–3
2 × 10
)(
= 50Ω
1k1M
FREQUENCY (Hz)
OUT
200k
C
12pF
OUT
V
C
1374 G09
200
150
PHASE (DEG)
100
50
0
–50
Minimum Input Voltage
with 5V Output
100
1374 G11
CURRENT (A)
Maximum Load Current
at V
= 10V
OUT
4.5
V
= 10V
OUT
4.0
3.5
3.0
0
5101520
INPUT VOLTAGE (V)
L = 20µH
L = 10µH
L = 5µH
1374 G13
Maximum Load Current
at V
= 3.3V
OUT
4.5
4.0
CURRENT (A)
3.5
V
= 3.3V
OUT
25
3.0
5101520
0
INPUT VOLTAGE (V)
L = 20µH
L = 10µH
L = 5µH
25
1374 G14
Maximum Load Current
at V
= 5V
OUT
1374fd
5
LT1374
UW
TYPICAL PERFOR A CE CHARACTERISTICS
BOOST Pin Current
100
DUTY CYCLE = 100%
90
80
70
60
50
40
30
BOOST PIN CURRENT (mA)
20
10
0
0
12
SWITCH CURRENT (A)
U
3
45
1374 G16
UU
VC Pin Shutdown Threshold
1.4
SHUTDOWN
1.2
1.0
0.8
THRESHOLD VOLTAGE (V)
0.6
0.4
–250255075125
–50
JUNCTION TEMPERATURE (°C)
PI FU CTIO S
FB/SENSE: The feedback pin is the input to the error
amplifier which is referenced to an internal 2.42V source.
An external resistive divider is used to set the output
voltage. The fixed voltage (-5) parts have the divider
included on-chip and the FB pin is used as a SENSE pin,
connected directly to the 5V output. Three additional
functions are performed by the FB pin. When the pin
voltage drops below 1.7V, switch current limit is reduced.
Below 1.5V the external sync function is disabled. Below
1V, switching frequency is also reduced. See Feedback Pin
Function section in Applications Information for details.
BOOST: The BOOST pin is used to provide a drive voltage,
higher than the input voltage, to the internal bipolar NPN
power switch. Without this added voltage, the typical
switch voltage loss would be about 1.5V. The additional
boost voltage allows the switch to saturate and voltage
loss approximates that of a 0.07Ω FET structure. Efficiency improves from 75% for conventional bipolar designs to > 89% for these new parts.
VIN: This is the collector of the on-chip power NPN switch.
This pin powers the internal circuitry and internal regulator
when the BIAS pin is not present. At NPN switch on and off,
high dI/dt edges occur on this pin. Keep the external
bypass and catch diode close to this pin. All trace inductance on this path will create a voltage spike at switch off,
adding to the VCE voltage across the internal NPN. Both V
IN
Inductor Core Loss
1374 G01
20
12
8
CORE LOSS (% OF 5W LOAD)
4
2
1.2
0.8
0.4
0.2
0.12
0.08
0.04
0.02
25
100
1374 G11
1.0
V
= 5V, VIN = 10V, I
OUT
0.1
CORE LOSS (W)
0.01
CORE LOSS IS
INDEPENDENT OF LOAD
CURRENT UNTIL LOAD CURRENT FALLS
LOW ENOUGH FOR CIRCUIT TO GO INTO
DISCONTINUOUS MODE
0.001
05
101520
INDUCTANCE (µH)
= 1A
OUT
TYPE 52
POWDERED IRON
®
Kool Mµ
PERMALLOY
µ = 125
pins of the 16-lead TSSOP package must be shorted
together on the PC board.
GND: The GND pin connection needs consideration for
two reasons. First, it acts as the reference for the regulated
output, so load regulation will suffer if the “ground” end of
the load is not at the same voltage as the GND pin of the
IC. This condition will occur when load current or other
currents flow through metal paths between the GND pin
and the load ground point. Keep the ground path short
between the GND pin and the load and use a ground plane
when possible. The second consideration is EMI caused
by GND pin current spikes. Internal capacitance between
the VSW pin and the GND pin creates very narrow (<10ns)
current spikes in the GND pin. If the GND pin is connected
to system ground with a long metal trace, this trace may
radiate excess EMI. Keep the path between the input
bypass and the GND pin short.
VSW: The switch pin is the emitter of the on-chip power
NPN switch. This pin is driven up to the input pin voltage
during switch on time. Inductor current drives the switch
pin negative during switch off time. Negative voltage is
clamped with the external catch diode. Maximum negative
switch voltage allowed is –0.8V. Both VSW pins of the
16-lead TSSOP package must be shorted together on the
PC board.
1374fd
6
LT1374
U
UU
PI FU CTIO S
SYNC: (Excludes T7 package) The sync pin is used to
synchronize the internal oscillator to an external signal. It
is directly logic compatible and can be driven with any
signal between 10% and 90% duty cycle. The synchronizing range is equal to
1MHz. This pin replaces SHDN on -SYNC option parts. See
Synchronizing section in Applications Information for
details.
SHDN: The shutdown pin is used to turn off the regulator
and to reduce input drain current to a few microamperes.
Actually, this pin has two separate thresholds, one at
2.38V to disable switching, and a second at 0.4V to force
complete micropower shutdown. The 2.38V threshold
functions as an accurate undervoltage lockout (UVLO).
This can be used to prevent the regulator from operating
until the input voltage has reached a predetermined level.
VC: The VC pin is the output of the error amplifier and the
input of the peak switch current comparator. It is normally
initial
operating frequency, up to
used for frequency compensation, but can do double duty
as a current clamp or control loop override. This pin sits
at about 1V for very light loads and 2V at maximum load.
It can be driven to ground to shut off the regulator, but if
driven high, current must be limited to 4mA.
BIAS: (SO-8 and FE16 Packages) The BIAS pin is used to
improve efficiency when operating at higher input voltages and light load current. Connecting this pin to the
regulated output voltage forces most of the internal circuitry to draw its operating current from the output voltage
rather than the input supply. This is a much more efficient
way of doing business if the input voltage is much higher
than the output.
mode of operation is 3.3V
VIN = 20V, V
NC: No Connect. Leave floating or solder to any node.
Minimum output voltage setting for this
. Efficiency improvement at
= 5V, and I
OUT
= 25mA is over 10%.
OUT
W
BLOCK DIAGRA
The LT1374 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
two feedback loops that control the duty cycle of the power
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
Most of the circuitry of the LT1374 operates from an
internal 2.9V bias line. The bias regulator normally draws
power from the regulator input pin, but if the BIAS pin is
connected to an external voltage higher than 3V, bias
power will be drawn from the external source (typically the
regulated output voltage). This will improve efficiency if
the BIAS pin voltage is lower than regulator input voltage.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing the switch to saturate. This
boosted voltage is generated with an external capacitor
and diode. Two comparators are connected to the shutdown pin. One has a 2.38V threshold for undervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
1374fd
7
LT1374
BLOCK DIAGRA
W
INPUT
BIAS*
SYNC
SHDN
SHUTDOWN
COMPARATOR
0.01Ω
+
–
2.9V BIAS
REGULATOR
INTERNAL
V
CC
SLOPE COMP
500kHz
OSCILLATOR
Σ
0.9V
+
–
+
0.4V
3.5µA
+
–
LOCKOUT
COMPARATOR
*BIAS PIN IS AVAILABLE ONLY ON THE S0-8 AND FE16 PACKAGES
–
FOLDBACK
CURRENT
CLAMP
V
C
CURRENT
SENSE
AMPLIFIER
VOLTAGE GAIN = 20
CURRENT
COMPARATOR
Q2
LIMIT
S
R
S
FLIP-FLOP
R
FREQUENCY
SHIFT CIRCUIT
ERROR
AMPLIFIER
= 2000µMho
g
m
DRIVER
CIRCUITRY
–
+
BOOST
Q1
POWER
SWITCH
V
SW
FB
2.42V2.38V
GND
1374 BD
Figure 1. Block Diagram
WUUU
APPLICATIO S I FOR ATIO
FEEDBACK PIN FUNCTIONS
The feedback (FB) pin on the LT1374 is used to set output
voltage and provide several overload protection features.
The first part of this section deals with selecting resistors
to set output voltage and the remaining part talks about
foldback frequency and current limiting created by the FB
pin. Please read both parts before committing to a final
design. The fixed 5V LT1374-5 has internal divider resistors and the FB pin is renamed SENSE, connected directly
to the output.
The suggested value for the output divider resistor (see
Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. The output voltage error
caused by ignoring the input bias current on the FB pin is
less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
Table 1
OUTPUTR1% ERROR AT OUTPUT
VOLTAGER2(NEAREST 1%)DUE TO DISCREET 1%
Ω
(V)(k
)(k
34.991.21+0.23
3.34.991.82+0.08
54.995.36+0.39
64.997.32–0.5
84.9911.5–0.04
104.9915.8+0.83
124.9919.6–0.62
154.9926.1+0.52
Ω
)RESISTOR STEPS
1374fd
8
LT1374
U
WUU
APPLICATIONS INFORMATION
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC and
in the external diode and inductor during short-circuit
conditions. A shorted output requires the switching regulator to operate at very low duty cycles, and the average
current through the diode and inductor is equal to the
short-circuit current limit of the switch (typically 6A for the
LT1374, folding back to less than 3A). Minimum switch on
time limitations would prevent the switcher from attaining
a sufficiently low duty cycle if switching frequency were
maintained at 500kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 1V (see
Frequency Foldback graph). This does not affect operation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
In addition to lower switching frequency, the LT1374 also
operates at lower switch current limit when the feedback
pin voltage drops below 1.7V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This
greatly reduces power dissipation in the IC, diode and
inductor during short-circuit conditions. External synchronization is also disabled to prevent interference with
foldback current limit
foldback operation. Again, it is nearly transparent to the
user under normal load conditions. The only loads that may
be affected are current source loads which maintain full
load current with output voltage less than 50% of final value.
In these rare situations the feedback pin can be clamped
above 1.5V with an external diode to defeat foldback current limit.
Caution:
clamping the feedback pin means that
frequency shifting will also be defeated, so a combination
of high input voltage and dead shorted output may cause
the LT1374 to lose control of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 1V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 5kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 150µA out of the FB pin with 0.6V on the pin (R≤ 4k).
The net result is that reductions in frequency and
DIV
current limit are affected by output voltage divider impedance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage
. High frequency pickup will
increase and the protection accorded by frequency and
current foldback will decrease.
LT1374
VCGND
Q2
TO FREQUENCY
SHIFTING
ERROR
AMPLIFIER
R5
5k
TO SYNC CIRCUIT
1.6V
+
–
Figure 2. Frequency and Current Limit Foldback
2.4V
Q1
R3
1k
R4
1k
V
SW
R1
FB
R2
5k
OUTPUT
5V
+
1374 F02
1374fd
9
LT1374
U
WUU
APPLICATIONS INFORMATION
MAXIMUM OUTPUT LOAD CURRENT
Maximum load current for a buck converter is limited by
the maximum switch current rating (I
This current rating is 4.5A up to 50% duty cycle (DC),
decreasing to 3.7A at 80% duty cycle. This is shown
graphically in Typical Performance Characteristics and as
shown in the formula below:
I
= 4.5A for DC ≤ 50%
P
= 3.21 + 5.95(DC) – 6.75(DC)2 for 50% < DC < 90%
I
P
DC = Duty cycle = V
Example: with V
I
SW(MAX)
Current rating decreases with duty cycle because the
LT1374 has internal slope compensation to prevent current
mode subharmonic switching. For more details, read Application Note 19. The LT1374 is a little unusual in this regard
because it has nonlinear slope compensation which gives
better compensation with less reduction in current limit.
Maximum load current would be equal to maximum
switch current
finite inductor size, maximum load current is reduced by
one-half peak-to-peak inductor current. The following
formula assumes continuous mode operation, implying
that the term on the right is less than one-half of IP.
I
OUT(MAX)
Continuous Mode
For the conditions above and L = 3.3µH,
= 3.21 + 5.95(0.625) – 6.75(0.625)2 = 4.3A
=
OUT/VIN
= 5V, VIN = 8V; DC = 5/8 = 0.625, and;
OUT
for an infinitely large inductor
) of the LT1374.
P
, but with
Note that there is less load current available at the higher
input voltage because inductor ripple current increases.
This is not always the case. Certain combinations of
inductor value and input voltage range may yield lower
available load current at the lowest input voltage due to
reduced peak switch current at high duty cycles. If load
current is close to the maximum available, please check
maximum available current at both input voltage
extremes. To calculate actual peak switch current with a
given set of conditions, use:
For lighter loads where discontinuous operation can be
used, maximum load current is equal to:
I
OUT(MAX)
Discontinuous mode
Example: with L = 1.2µH, V
The main reason for using such a tiny inductor is that it is
physically very small, but keep in mind that peak-to-peak
inductor current will be very high. This will increase output
ripple voltage. If the output capacitor has to be made larger
to reduce ripple voltage, the overall circuit could actually
wind up larger.
=
= 5V, and V
OUT
IN(MAX
) = 15V,
At VIN = 15V, duty cycle is 33%, so IP is just equal to a fixed
4.5A, and I
OUT(MAX)
is equal to:
10
CHOOSING THE INDUCTOR AND OUTPUT CAPACITOR
For most applications the output inductor will fall in the
range of 3µH to 20µH. Lower values are chosen to reduce
physical size of the inductor. Higher values allow more
output current because they reduce peak current seen by
the LT1374 switch, which has a 4.5A limit. Higher values
also reduce output ripple voltage, and reduce core loss.
Graphs in the Typical Performance Characteristics section
show maximum output load current versus inductor size
and input voltage. A second graph shows core loss versus
inductor size for various core materials.
1374fd
Loading...
+ 22 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.