ANALOG DEVICES EVAL-AD7719-EB Service Manual

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Evaluation Board for the AD7719,

a

FEATURES

Full-Featured Evaluation Board for the AD7719
On-Board Reference and Digital Buffers
Various Linking Options
PC Software for Control of AD7719

INTRODUCTION

This Technical Note describes the evaluation board
for the AD7719, Low Voltage, Low Power, 16&24­Bit, Dual Sigma Delta ADC. The AD7719 is a
complete analog front end for low frequency measure­ment applications. The AD7719 is factory calibrated
and therefore does not require field calibration. The
device can accept low level input signals directly from
a transducer and produce a serial digital output. It
employs a sigma-delta conversion technique to realize
up to 24 bits (Main ADC) or 16 bits (Auxiliary ADC)
of no missing codes performance. The selected input
signal is applied to a proprietary programmable gain
(Main ADC only) front end based around an analog
modulator. The modulator output is processed by an
on-chip digital filter. The first notch of this digital
filter can be programmed via an on-chip control
register allowing adjustment of the filter cutoff and
output update rate. Full data on the AD7719 is
available in the AD7719 datasheet available from
Analog Devices and should be consulted in conjunc­tion with this Technical Note when using the evalua­tion board.

The evaluation board interfaces to the parallel port of an
IBM compatible PC. Software is available with the evalu-

16&24-Bit, Dual Sigma Delta ADC

EVAL-AD7719-EB

ation board which allows the user to easily program the
AD7719.

Other components on the AD7719 Evaluation Board
include two AD780s (precision 2.5V references), a

32.7680 kHz crystal and digital buffers to buffer
signals to and from the PC.

OPERATING THE AD7719 EVAL BOARD
Power Supplies

This evaluation board has two analog power supply
inputs: AV
applied between these inputs which is used to provide
the V

DD

Power connections are also required through DGND
& DV

DD

the digital circuitry. DGND and AGND are con­nected together at the AD7719 GND pin. Therefore,
it is recommended not to connect AGND and DGND
elsewhere in the system.

All power supplies are decoupled to their respective
grounds. DV
capacitor and 0.1µF ceramic capacitor at the input to
the evaluation board. It is again decoupled using

0.1µF capacitors as close as possible to each logic
device. AV
capacitor and 0.1µF ceramic capacitor as close as
possible to the AD7719 and also at the reference.

and AGND. An external +5V must be

DD

for the AD7719 and the reference. Digital
. The DVDD is used to provide the DVDD for

is decoupled using a 10µF tantalum

DD

is decoupled using a 10µF tantalum

DD

Fig. 1. Evaluation Board

Set-up

REV. B

Information furnished by Analog Devices is believed to be accurate
and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights
of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of
Analog Devices.

One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106,
U.S.A.
Tel: [phone] Fax: [phone]

EVAL-AD7719-EB

LINK AND SWITCH OPTIONS

There are fourteen link options which must be set for the required operating setup before using the evaluation
board. The functions of these link options are outlined below.

Link No. Function

LK1-LK6 These links are in series with the AIN1 through AIN6 analog inputs respectively.

With these links in place, the analog inputs on the relevant SKT input is connected directly to the
respective AIN input on the part. For example, with LK1 in place, the analog input applied to SKT1
is connected directly to AIN1 of the AD7719.

LK7&8 This option selects the master clock source for the AD7719. The master clock is generated by the

on-board crystal or from an external source via SKT7. This is a double link and both links must
be moved together for the correct operation of the evaluation board.

With both links in position "A", the external clock option is selected and an external clock applied
to SKT7 is routed to the XTAL1 pin of the AD7719.

With both links in position "B", the on-board crystal is selected to provide the master clock to the
AD7719.

LK9 This link is used to select the reference source for the REFIN(-) input of the AD7719.

With this link in position "A", REFIN1(-) is connected directly to AGND.
With this link in position "B", the voltage generated across R10 (IOUT1*R10) is selected as the on-

board reference for REFIN(+). LK10 should also be connected for this set-up to connect R10 and
REFIN(-) to AGND. LK11 & LK12 should also be connected for this set-up to connect IOUT1 to
R10.

With this link in position "C", the REFIN(-) pin is connected to SKT14. An external voltage applied
to SKT14 can now be used as the REFIN(-) for the AD7719.

LK10 This link is used to select the reference source for the REFIN(+) input of the AD7719.

With this link in position "A", REFIN1(+) is connected to the output of the on-board reference
(AD780 - U6).

With this link in position "B", the REFIN1(+) pin is connected to SKT15. An external voltage
applied to SKT15 can now be used as the REFIN(+) for the AD7719.

With this link in position "C", the REFIN(+) pin is connected to AVDD.

This link should be disconnected if using the voltage generated across R10, due to IOUT1.
LK11 This link is used for selecting IOUT1*R10 as a reference voltage.
LK12 This link is used for selecting IOUT1*R10 as a reference voltage.
LK13 This link is used for selecting IOUT1*R10 as a reference voltage.
LK14 This link selects the reference source for the REFIN2 input of the AD7719.

With this link in positon "A", REFIN2 is connected to the output of the on-board reference (AD780

- U2).

With this link in position "B", the REFIN2 pin is connected to SKT16. An external voltage applied

to SKT16 can now be used as the REFIN2 for the AD7719.

SET-UP CONDITIONS

Care should be taken before applying power and signals to the evaluation board to ensure that all link positions
are as per the required operating mode. Table 1 shows the position in which all the links are set when the
evaluation board is sent out.

Table 1: Initial Link and Switch Positions
Link No. Position Function

LK1-LK6 IN Connects analog inputs from SKT1-SKT6 to the input pins AIN1-AIN6 of the
AD7719.

LK7&LK8 B+B Both links in position B to select the on-board crystal as the master clock for the
AD7719.

L K 9 A This connects the REFIN1(-) input of the AD7719 to AGND.

- 2 - Rev. B

EVAL-AD7719-EB

LK10 A The on-board reference (U6) provides the reference voltage for the REFIN1(+) input

of the AD7719.
LK11 OUT IOUT1*R10 not used as REFIN1 voltage reference.
LK12 OUT IOUT1*R10 not used as REFIN1 voltage reference.
LK13 OUT IOUT1*R10 not used as REFIN1 voltage reference.
LK14 A The on-board reference (U2) provides the reference voltage for the REFIN2 input of the

AD7719.

EVALUATION BOARD INTERFACING

Interfacing to the evaluation board is via either a 9-way d-type connector, J4 or a 36-way centronics connector, J1. The
pin-out for the J4 connector is shown in Fig. 2 and its pin designations are given in Table 2. The pin-out for the J1
connector is shown in Fig. 3 and its pin designations are given in Table 3.

J1 is used to connect the evaluation board to the parallel (printer) port of a PC. Connection is via a standard printer cable.
J4 is used to connect the evaluation to any other system. The evaluation board should be powered up before a cable
is connected to either of these connectors.

2431

5

6789

Fig. 2: Pin Configuration for the 9-Way D-Type Connector, J4.

Table 2.: J4 Pin Description

1

1 SCLK Serial Clock. The signal on this pin is buffered before being applied to the SCLK pin of the

AD7719.
2 RDY Logic output. This is a buffered version of the signal on the AD7719 RDY pin
3 CS Chip Select. The signal on this pin is buffered before being applied to the CS pin on the AD7719.
4 RESET Reset Input. Data applied to this pin is buffered before being applied to the AD7719 RESET pin.
5 DIN Serial Data Input. Data applied to this pin is buffered before being applied to the AD7719 DIN pin.
6 DGND Ground reference point for the digital circuitry. Connects to the DGND plane on the Evaluation board.
7 DOUT Serial Data Output. This is a buffered version of the signal on the AD7719 DOUT pin.
8DV

DD

Digital Supply Voltage. If no voltage is applied to the board's DVDD input terminal then the voltage applied

to this pin will supply the DV

for the digital buffers.

DD

9 NC Not Connected.
Note

1

An explanation of the AD7719 functions mentioned here is given in Table 3 below as part of the J1 pin descriptions.

Table 3: 36-Way Connector Pin Description

1 N C No Connect. This pin is not connected on the evaluation board.
2 DIN Serial Data Input. Data applied to this pin is buffered before being applied to the

AD7719 DIN pin. Serial Data Input with serial data being written to the input shift
register on the part. Data from this input shift register is transferred to the calibration
or control registers, depending on the register selection bits of the Communications
Register.

3 RESET Reset Input. The signal on this pin is buffered before being applied to the RESET pin of the

AD7719. RESET is an active low input which resets the control logic, interface logic,
calibration coefficients, digital filter and analog modulator of the part to power-on status.

- 3 -

Rev. B

EVAL-AD7719-EB

18

36

Fig. 3: 36-way Centronics (SKT2) Pin Configuration

4 CS Chip Select. The signal on this pin is buffered before being applied to the CS pin of the

AD7719. CS is an active low Logic Input used to select the AD7719. With this input hard­wired low, the AD7719 can operate in its three-wire interface mode with SCLK, DIN and DOUT
used to interface to the device. CS can be used to select the device in systems with more than
one device on the serial bus or as a frame synchronization signal in communicating with the
AD7719.

5 SCLK Serial Clock. The signal on this pin is buffered before being applied to the SCLK pin of the

AD7719. An external serial clock is applied to this input to read/write serial data from/to the
AD7719. This serial clock can be continuous with all data transmitted in a continuous train
of pulses. Alternatively, it can be non-continuous with the information being transmitted to
the AD7719 in smaller batches of data.

6 SYNC Logic Input. The signal on this pin is buffered before being applied to the SYNC pin of the

AD7719. The SYNC input allows for synchronisation of the digital filters and modulators
across a number of AD7719s. While SYNC is low, the nodes of the digital filter, the filter

control logic and the calibration control logic are held in a reset state.
7-8 N C No Connect. These pins are not connected on the evaluation board.
9DV

10 RDY Logic output. This is a buffered version of the signal on the AD7719 RDY pin. A logic low

11-12 NC No Connect. These pins are not connected on the evaluation board.
1 3 DOUT Serial Data Output. This is a buffered version of the signal on the AD7719 DOUT pin. Serial

14-18 NC No Connect. These pins are not connected on the evaluation board.
19-30 DGND Ground reference point for digital circuitry. Connects to the DGND plane on the evaluation

31-36 NC No Connect. These pins are not connected on the evaluation board.

DD

Digital Supply Voltage. This provides the supply voltage for the buffer chips, U3-U5,

which buffer the signals between the AD7719 and J1/J4.

on this output indicates that either the Main ADC or Auxiliary ADC has valid data in their

data register. The RDY pin will return high upon completion of a read operation of a full output

word. If data is not read RDY will return high prior to the next update indicating to the user

that a read operation should not be initiated. The RDY pin also returns low after the

completion of a calibration cycle. The RDY pin is effectively the NOR of the RDY0 and RDY1

bits in the Status register. If one of the ADCs is disabled the RDY pin reflects the active ADC.

RDY does not return high aftera calibration until the mode bits are written to enabling a new

conversion or calibration.

Data Output with serial data obtained from the output shift register on the AD7719. The output

shift register can contain information from of the on-chip registers depending on the register

selection bits of the Communications Register.

board.

1

19

SOCKETS

There are eighteen sockets relevant to the operation of the AD7719 on this evaluation board. The functions of
these sockets are outlined in Table 4.

Table 4. Socket Functions
Socket Function

J 4 9-way D-Type connector used to interface to other systems.

- 4 - Rev. B

J1 36-way centronics connector used to interface

to PC via parallel printer port.

SKT1 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN1 input of the
AD7719 is applied to this socket.

SKT2 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN2 input of the
AD7719 is applied to this socket.

SKT3 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN3 input of the
AD7719 is applied to this socket.

SKT4 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN4 input of the
AD7719 is applied to this socket.

SKT5 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN5 input of the
AD7719 is applied to this socket.

SKT6 Sub-Miniature BNC (SMB) Connector. The

analog input signal for the AIN6 input of the
AD7719 is applied to this socket.

SKT7 Sub-Miniature BNC (SMB) Connector. The

master clock signal for the XTAL1 input of the
AD7719 is applied to this socket when the
board is configured for an externally applied
master clock.The AD7719 can be operated
with internal clock frequencies in the range

32.768 kHz +/-10%.

SKT8 Sub-Miniature BNC (SMB) Connector. The

output value from AD7719 output pin P1/SW1
is available from this socket.

SKT9 Sub-Miniature BNC (SMB) Connector. The

output value from AD7719 output pin P2/SW2
is available from this socket.

SKT10 Sub-Miniature BNC (SMB) Connector. The

output value from the AD7719 I/O pin P3 is
available from this socket when P3 is
configured as an output. The input signal for
AD7719 I/O pin P3 is applied to this input
when P3 is configured as an input.

SKT11 Sub-Miniature BNC (SMB) Connector. The

output value from the AD7719 I/O pin P4 is
available from this socket when P4 is
configured as an output. The input signal for
AD7719 I/O pin P4 is applied to this input
when P4 is configured as an input.

SKT12 Sub-Miniature BNC (SMB) Connector. The

AD7719 current source pin IOUT1 is connected
to this socket.

EVAL-AD7719-EB

SKT13 Sub-Miniature BNC (SMB) Connector. The

AD7719 current source pin IOUT2 is connected
to this socket.

SKT14 Sub-Miniature BNC (SMB) Connector. The

reference voltage for the REFIN1(-) input of
the AD7719 is applied to this socket when the
board is configured for an externally applied
reference voltage.

SKT15 Sub-Miniature BNC (SMB) Connector. The

reference voltage for the REFIN1(+) input of
the AD7719 is applied to this socket when the
board is configured for an externally applied
reference voltage.

SKT16 Sub-Miniature BNC (SMB) Connector. The

reference voltage for the REFIN2 input of the
AD7719 is applied to this socket when the
board is configured for an externally applied
reference voltage.

CONNECTORS

There are two connectors on the AD7719 evaluation
board as outlined in Table 5.

Table 5. Connector Functions
Connector Functions

J3 PCB Mounting Terminal Block. The

Digital Power Supply to the Evalua­tion Board is provided via this Con­nector if it is not being supplied via
SKT1 or SKT2.

J2 PCB Mounting Terminal Block. The

Analog Power Supply to the Evalua­tion Board must be provided via this
Connector.

SWITCHES

There is one switch on the AD7719 Evaluation board. SW1
is a push-button reset switch. Pushing this switch acti­vates the active low RESET input on the AD7719 which
resets the control logic, interface logic, calibration coeffi­cients, digital filter and analog modulator of the part to
power-on status.

- 5 -

Rev. B

EVAL-AD7719-EB

AD7719 SOFTWARE DESCRIPTION

The AD7719 evaluation board is shipped with a CD-ROM containing software that can be installed onto a standard PC
to control the AD7719.

The software uses the printer port of the PC to communicate with the AD7719, so a Centronics printer cable is used to
connect the PC to the evaluation board.

Software Requirements and Installation

The software runs under Windows ME 2000 NT™ and typically requires 8Mb of RAM.
To install the software the user should start Windows and insert the CD-ROM disc. The installation software should

launch automatically. If not, use Windows Explorer to locate the file 'setup.exe' on the CD-ROM. Double clicking on
this file will start the installation procedure. The user is prompted for a destination directory which is "C:\Program
Files\ANALOG DEVICES\AD7719" by default. Once the directory has been selected the installation procedure will copy
the files into the relevant directories on the hard drive. The installation program will create a Program Group called
"Analog Devices" with sub-group 'AD7719' in the "Start" taskbar. Once the installation procedure is complete the user
can double click on the AD7719 icon to start the program.

Features of the Software

1. The software will allow the user to write to and read from all the registers of the AD7719.

2. Data can be read from the AD7719 and displayed or stored for later analysis.

3. The data that has been read can be exported to other packages such as Mathcad or Excel for further analysis.

- 6 - Rev. B

EVAL-AD7719-EB

What follows is a description of the various windows that appear while the software is being used. Fig. 4. shows the
main screen that appears once the program has started. The printer port that will be used by the software is determined
automatically. There are three possible printer ports that can be handled by the software, LPT1 (standard), LPT2 and
PRN. The user can change to another printer port by clicking on the "Printer Port" dropdown menu. A brief description
of each of the buttons on the main screen follows:

Program AD7719 Allows the user to program or read the on-chip registers of the AD7719.
Read Data from Main ADC Allows the user to read a number of samples from the AD7719 Main ADC.

These samples can be stored for further analysis or just displayed for reference.

Read Data from Aux ADC Allows the user to read a number of samples from the AD7719 Aux ADC. These

samples can be stored for further analysis or just displayed for reference.

Main ADC Noise Analysis Allows the user to perform noise analysis on the data that has been read in from the

Main ADC.

Aux ADC Noise Analysis Allows the user to perform noise analysis on the data that has been read in from the

Aux ADC.

Reset AD7719 Allows the user to perform a software or hardware reset on the AD7719.
Read From File Allows the user to read in previously stored data for display or analysis - user needs

to specify Aux or Main ADC data.

Write To File Allows the user to write the current set of data to a file for later use - user needs to

specify Aux or Main ADC data.

About Provides information about the version of software being used.
Read Dual ADC Allows the user to display samples from the Main and Aux ADCs

simultaneously. These samples can be stored for further analysis or just displayed
for reference.

Quit Ends the program

Fig. 4. The Main Screen

- 7 -

Rev. B