Analog Devices EE164 Application Notes

Engineer To Engineer Note EE-164

a

Technical Notes on using Analog Devices' DSP components and development tools

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Advanced EPROM Boot and No-boot Scenarios with ADSP-219x DSPs

Contributed by Benno Kusstatscher April 15, 2003

Introduction

EPROM or Flash devices are often used to boot
ADSP-2191/95/96 DSPs, but after booting, the
EPROM/Flash is not used anymore.

The goal of this document is to demonstrate that
EPROM/Flash is of use at run-time as well.

It may store coefficient tables, overlays and, last
but not least, the DSP may execute instructions
directly from it.

If you take advantage of the boot device this
way, you may reduce the SRAM requirements of
your application. Perhaps you can choose a
derivative with less on-chip memory, perhaps
you can save an additional external SRAM
device.

This document discusses various scenarios of
advanced Boot EPROM usage. Besides ADSP­2191 specific aspects it will explain how
VisualDSP++

TM

3.01 helps you to manage such

applications.

EPROM Booting Tools Chain

Details of standard EPROM booting are
discussed in application note EE-131 [1]. Just to
complete the picture, this first section provides a
brief overview about the related tool chain.

If you build a VisualDSP++ project during the
development cycle the linker will output a so-

1

Some features discussed require latest patches installed.

Download from: ftp://ftp.analog.com/pub/tools/

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called Executable File (.dxe) that meets the ELF /

DWARF-2

standard. This file is passed to the
debugging tools and contains application data as
well as debugging information.

The DSP itself cannot access such a

(.dxe). It simply expects properly formatted data

Executable File

in the EPROM/Flash. Before you can program
the EPROM/Flash physically you need to
convert the

Executable File (.dxe) into any format

known by the EPROM programming tool.

A common file format for such purposes is the

Enhanced Intel Hex File format. Therefore,

VisualDSP++ provides another utility that post
processes the
boot stream and emits it to a so-called

(.ldr) that meets these Intel Hex conventions. This

post-processor is called

Figure 1 illustrates how to set up the

Options
Loader Utility. If you set the Type field in the Project
Options Dialog to Loader file, VisualDSP++

in order to make VisualDSP++ invoke the

invokes the
to post-process the project’s

Executable File (.dxe). It generates the

Loader File

Loader Utility (elfloader.exe).

Project

Loader Utility during the project build

Executable File (.dxe).

To burn the Loader File (.ldr) into the
EPROM/Flash device externally you may use a
separate programming tool. Flash devices can
also be programmed in circuit, alternatively. Use
the VisualDSP++ plug-in
to download and flash the

ToolsÎFlash Programmer

Loader File (.ldr) through

the JTAG emulator (or even the USB connection
if you are working with the EZ-KIT Lite™).

s

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Figure 1: VisualDSP++ 3.0 Project Options Figure 2: Load Property Page

If the DSP detects EPROM boot configuration
mode after reset, it starts executing the

Kernel

. This is a program residing at the on-chip

Loader

ROM address 0xFF.0000. It is responsible for
the boot process. Initially, the
two control bytes from

/BMS space to determine

Loader Kernel reads

the BMSCTL and EMICTL register settings, such as

Wait states, EMI Clock divider and EMI Bus width (8 or

16 bit).

Once the control registers of the

Interface (EMI) are set up accordingly, the Loader

Kernel

parses the boot stream in the EPROM and

External Memory

completes the boot process without further user
intervention. When the DSP is booted, the

Kernel executes a JUMP instruction to on-chip

Loader

address 0x00.0000 and the user application gets
control over the DSP.

Loader Utility and Loader Kernel hide all the boot

stream details from you. Application note EE­131 [1] provides further explainations.

Using the

Load property page shown in Figure 2

you can choose whether the boot device is 8-bit
or 16-bit wide. Also, you have access to the

states

and to the EMI Clock divider used for EPROM
accesses. According to the speed-grade of the
used EPROM/Flash device you may speed up the
boot process by altering the default values.

The

Opmode field specifies the preferred

hardware setting (SPI0 + SPI1 versus SPORT2)
during booting only. The
useful if the DSP has to share the boot EPROM
with other processors or if multiple boot images
need to be stored in a single EPROM.

The settings shown in Figure 2 make the loader
utility generate

Intel Hex Loader File (.ldr) for 8-bit

EPROM booting. They result in the
command line:

elfloader -proc ADSP-2191

-f HEX -b PROM

-width 8 -opmode 0

-clkdivide 5 -waits 7

-o test test.dxe

Wait

Start address box is

Loader Utility

Advanced EPROM Boot and No-boot Scenarios with ADSP-219x DSPs (EE-164) Page 2 of 16

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Alternatively, one may set the Width field to 16 bit
if the DSP is booted from a 16-bit EPROM or to

8+8 bit if the DSP is booted from two 8-bit

EPROMS in 16-bit mode. In the last case, the

Loader Utility will output two Loader Files (.ldu,.ldl).

Before burning/flashing the

Loader File (.ldr) you

may evaluate it in software. The VisualDSP++

3.0 simulator can read the image file from the
tools command menu

EPROM.Rx

(.ldr)

. The simulator interprets the Loader File

in the same way as the Loader Kernel does.

SettingsÎ SimulatorÎ BootÎ

Once a file is loaded, the simulator boots the
memory content every time a reset is issued until
the menu setting

Booting

is checked again.

SettingsÎ SimulatorÎ BootÎ No

ADSP-219x Memory

Booting is nothing else than initializing RAM

after power-up or system reset. In most of cases
only on-chip SRAM of the ADSP-219x DSPs is
initialized by the boot process.

ADSP-2191 ADSP-2195 ADSP-2196

000000
003FFF
004000
007FFF
008000
00BFFF
00C000
00FFFF

16k x 24 bit

16k x 24 bit

16k x 16 bit

16k x 16 bit

16k x 24 bit

16k x 16 bit

8k x 24 bit

8k x 16 bit

In addition the ADSP-219x DSPs may access
additional external SRAM through the EMI port.
This parallel interface supports both, 8-bit and
16-bit data width.

The ADSP-219x DSPs may address 16M words,
organized as 256

Memory Pages of 64k words size.

Page 0 is reserved for on-chip memory. Page 255
holds the on-chip boot ROM. All accesses to any
of the pages 1 to 254 initiate an off-chip bus
transfer.

24 address line are required to access the
complete 16M address space. To avoid the need
of off-chip address decoders, ADSP-219x DSPs
provide four memory strobes
strobe controls one

Memory Bank, 4M words each.

/MS0 to /MS3. Every

Consistently, the EMI features only 22 address
lines.

Every memory bank has its own control register

MSxCTL. Access parameters such as wait-states

can be controlled individually. Although the

MEMPGx registers may redefine the start page of

the individual memory banks, this application
note always assume the default settings.

Bank 0 (/MS0) 0x010000 – 0x3FFFFF
Bank 1 (/MS1) 0x400000 – 0x7FFFFF
Bank 2 (/MS2) 0x800000 – 0xBFFFFF
Bank 3 (/MS3) 0xC00000 – 0xEFFFFF

Note that the address range of Bank 0 is
overlapped by the on-chip memory page.
Similarly, the boot ROM page overlaps Bank 3.

Figure 3: On-chip Memory Map

Figure 3 illustrates the physical layout of the on­chip memory. The ADSP-2191 has four
independent memory blocks. Two are 24-bit
wide and can store instructions, but may also
store 16-bit data. The other two blocks can only
store 16-bit data. In total, 32k words of 24-bit
memory and 32k of 16-bit memory are integrated
on-chip. These 64k address locations build the
memory page 0. While accessing on-chip
memory, always set the related page registers

DMPG0, DMPG1 and IJPG to zero.

If a 4MWord device is connected to

/MS0, the

lower 64k addresses cannot be access using this
scheme. Typically, devices are much smaller,
and all locations can be reached by address
aliases. For example, device address 0x000000
can be accessed through alias address 0x200000,
if the connected device features less than 22
address lines.

Beside the

/MSx strobes, the EMI features an

additional Boot Memory Select (/BMS) pin. There are
three bits in the
overwrite the normal

E_STAT register, that may

/MSx functionality, for

instruction fetch, DM bus access or PM access

Advanced EPROM Boot and No-boot Scenarios with ADSP-219x DSPs (EE-164) Page 3 of 16

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operations. If set, the the EMI activates the /BMS
strobe instead of the

/MSx ones whenever the

address range 0x010000 to 0xEFFFFF is
accessed, by one of the three operations.

The

Boot Kernel typically reads the boot stream

from the so-called

/BMS. If it is booting off-chip SRAM, the Boot

Kernel manages the

Boot Memory Space by activating

E_STAT bits properly.

Finally, the ADSP-219x DSPs feature an I/O
memory space. This one is typically not booted
and is not described in this document, therefore.

Logical versus Physical Addresses

There is a need to distinguish between logical and

physical parameters. Logical settings describe

memory from the core’s perspective: logical data
width is either 16 or 24 bit wide; logical
addresses are the ones used by program coding.

Physical addresses and memory width may differ
from the logical parameters, especially when
describing off-chip memories.

The physical width of on-chip memory can be
either 16 bit or 24 bit, according to the individual
memory blocks shown in Figure 3. 16-bit
operations to/from 24-bit on-chip memory access
the upper 16-bits of the addressed memory
locations only. 24-bit writes to on-chip 16-bit
memory ignore the lower 8 bits stored in the
register. 24-bit reads from on-chip memory zero
the

PX register.

The

E_BWS bit in the EMICTL register controls,

whether the interface is 8-bit or 16-bit wide.

Logical width Physical width

16 bit 8 bit 2
24 bit 8 bit 4
16 bit 16 bit 1
24 bit 16 bit 2

Table 1: Physical Address Multiply Factor

Address

Multiply

PX

When physical data width does not match the
logical one, multiple physical address locations
are required to built one logical address location.

Consistently, physical addresses are multiples of
logical addresses. The multiply factor depends
on logical to physical data width relationship
(and EMI settings) as shown in Table 1.

When multiplying logical addresses with the
proper factor, the resulting address may be of
theoretical nature. Often the result exceeds the
address range supported by a given memory
devices.

If, for example, a 64kByte SRAM is connected
to

/MS0, and the program performs a 16-bit

access to address 0x011000, the physical address
is not 0x022000. It is 0x002000.

In the general case, the logical to physical
address calculation performs the multiplication
and masks non-existing address bits out,
afterwards.

Whether off-chip data accesses are trade as 16­bit or 24-bit operations is controlled by the

E_DFS bit in the E_STAT register. At run-time this

bit is usually cleared. If set, it helps to load 24-bit
instructions into on-chip memory.

Memory Segment Types

When you are managing EPROM boot scenarios
you need to be familiar with a few basic
commands of the

While processing the

Loader Utility evaluates the individual memory

segments. Memory segments are defined within
the memory layout of the

(.ldf).

Besides the logical address range, every segment
specifies its physical width by the
command. External memory segments set their
physical width according to EMI port settings. It
is possible that the invidual off-chip memory
segments have different width settings. Then,

Linker Description File (.ldf).

Executable File (.dxe) the

Linker Description File

WIDTH()

Advanced EPROM Boot and No-boot Scenarios with ADSP-219x DSPs (EE-164) Page 4 of 16

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t

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t

software must take care, that the E_BWS bit is
managed propely at run-time.

Also, every memory segment has a type. The
dedicated

TYPE() command accepts four different

options:

TYPE(DM RAM)
TYPE(PM RAM)
TYPE(DM ROM)
TYPE(PM ROM)

The Loader Utility ignores all segments declared by
the

TYPE(ROM) option and reads the TYPE(RAM)

segments only. It generates 16-bit boot streams
for

TYPE(DM RAM) segments and 24-bit boot

streams for

TYPE(PM RAM) segments.

Please note that this naming convention is of
historical nature.

TYPE(PM) segments are 24-bit

wide and may contain data and program code. If
a segment holds 16-bit data only, it can be
defined by the

TYPE(DM) command, regardless

whether the containing data is accessed through
the

DM or the PM bus.

MEMORY {
seg_code {

TYPE(PM RAM) WIDTH(24)
START(0x000000) END(0x007FFF)
}

seg_data1 {
TYPE(DM RAM) WIDTH(16)
START(0x008000) END(0x00BFFF)
}

seg_data2 {
TYPE(DM RAM) WIDTH(16)
START(0x00C000) END(0x00FFFF)
}

}

Listing 1: LDF Memory Layout Example

Listing 1 illustrates a very basic example of an
ADSP-2191 memory layout according to Figure

3. It sets up on-chip memory for booting,
because all segments are of

Note that the

Linker Description File (.ldf) does not

describe the boot memory itself. Use the

TYPE(RAM).

Load

property page in Figure 2 to define whether the

DSP is booted from 8-bit or from 16-bit
EPROM.

Booting Off-chip SRAM

So far we discussed booting to internal memory.
If you have additional SRAM connected to the
system bus you may want to initialize its content
at boot-time, too.

This section discusses an example scenario with
an 8-bit boot EPROM connected to
additional 8-bit SRAM that is connected to the
memory strobe

/MS1.

Although the ADSP-2191 Loader Kerne

L

can boot on-chip and off-chip memor
from 8-bit and from 16-bit EPROMs, th

E_BWS bit in the EMICTL register is se

only once. As a result, external SRA
must use the same bus width as the boo
EPROM, if you want to boot it.

This example can still use the project options
shown in Figure 1 and Figure 2. However the

Linker Description File (.ldf) needs to be enriched by

external memory segments.

MEMORY {
seg_code {

TYPE(PM RAM) WIDTH(24)
START(0x000000) END(0x007FFF)
}

seg_data1 {
TYPE(DM RAM) WIDTH(16)
START(0x008000) END(0x00BFFF)
}

seg_data2 {
TYPE(DM RAM) WIDTH(16)
START(0x00C000) END(0x00FFFF)
}

seg_data_ext {
TYPE(DM RAM) WIDTH(8)
START(0x400000) END(0x40FFFF)
}

seg_code_ext {
TYPE(PM RAM) WIDTH(8)
START(0x408000) END(0x417FFF)
}

}

Listing 2: LDF Memory Layout Example

/BMS and an

Advanced EPROM Boot and No-boot Scenarios with ADSP-219x DSPs (EE-164) Page 5 of 16