ANALOG DEVICES CN-0238 Service Manual

Circuit Note

CN-0238

Devices Connected/Referenced

Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s

AD9434

analog, mixed-signal, and RF design challenges. For more
information and/or support, visit w ww.analog.com/CN0238.

ADA4960-1

12-Bit, 500 MSPS 1.8 V Analog-to-Digital
Converter

5 GHz, Ultralow Distortion RF/IF
Differential Amplifier

High Performance, 12-Bit, 500 MSPS Wideband Receiver with Antialiasing Filter

EVALUATION AND DESIGN SUPPORT

Design and Integration Files

Schematics, Layout Files, Bill of Materials

CIRCUIT FUNCTION AND BENEFITS

The circuit shown in Figure 1 is a wideband receiver front end
based on the ADA4960-1 ultralow noise differential amplifier
driver and the AD9434 12-bit, 500 MSPS analog-to-digital

converter (ADC). The third-order Butterworth antialiasing filter is
optimized based on the performance and interface requirements
of the amplifier and ADC. The total insertion loss due to the
filter network, transformer, and other resistive components is
only 1.2 dB.

The overall circuit has a bandwidth of 290 MHz with a pass-band
flatness of 1 dB. The SNR and SFDR measured with a 140 MHz
analog input are 64.1 dBFS and 70.4 dBc, respectively.

1.1dB LOSS

ANALOG

INPUT

+5.4dBm FS

AT 10MHz

INPUT

Z = 50

OVERALL GAIN = 2. 3dB

0.8dB LO SS 0.3dB LOSS

18pF

5

5

22nH

62

3.3pF

62

22nH

0.1µF

0.1µF

18pF

33870101

5

511

5

FS = 1.5V p-p DIFF

+1.8V

1.3pF1k

0.1dB LO SS

XFMR

1:1 Z

ECT1-1-13M

25

25

0.1µF

140

Z

I

0.1µF

RG

= 10k

3.4dB GAI N

+5V

+

VIP

IIP

IIN

VIN

–

0.1µF

75

ADA4960-1

G = 3.4dB

75

0.1µF

Figure 1. 12-Bit, 500 MSPS Wideband Receiver Front End (Simplified Schematic: All Connections and Decoupling Not Shown)

Gains, Losses, and Signal Levels Measured Values at 10 MHz

AD9434

ADC

INTERNAL

INPUT Z

10146-001

Rev. A

Circuits from the Lab™ circuits from Analog Devices have been designed and built by Analog Devices
engineers. Standard engineering practices have been employed in the design and construction of
each circuit, and their function and performance have been tested and verified in a lab environment at
room temperature. However, you are solely responsible for testing the circuit and determining its
suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2011–2012 Analog Devices, Inc. All rights reserved.

CN-0238 Circuit Note

H

CIRCUIT DESCRIPTION

The circuit accepts a single-ended input and converts it to
differential using a wide bandwidth (3 GHz) M/A-COM
ECT1-1-13M 1:1 transformer. The 5 GHz ADA4960-1 differential
amplifier has a differential input impedance of 10 kΩ. Gain can
be adjusted from 0 dB to 18 dB with the selection of the external
gain-setting resistor, RG. The output impedance is 150 Ω
differential.

The ADA4960-1 is an ideal driver for the AD9434, and the fully
differential architecture through the low-pass filter and into the
ADC provides good high frequency common-mode rejection,
as well as minimizes second-order distortion products. The

ADA4960-1 provides a gain of 0 dB to 18 dB, depending on the

external gain resistor. In the circuit, a gain of 3.4 dB was used to
compensate for the insertion loss of the filter network (1.1 dB)
and the transformer (0.1 dB), providing an overall signal gain of

2.3 dB. An input signal of approximately 5.4 dBm produces a
full-scale 1.5 V p-p differential signal at the ADC input.

The antialiasing filter is a third-order Butterworth filter designed
with a standard filter design program. A Butterworth filter was
chosen because of its flat response within the pass band. A third
order filter yields an ac noise bandwidth ratio of 1.05 and can
be designed with the aid of several free filter programs such as
Nuhertz Technologies Filter Free or the Quite Universal Circuit
Simulator (Qucs) Free Simulation.

In order to achieve best performance, the ADA4960-1 should
be loaded with a net differential load of 100 Ω. The 5 Ω series
resistors isolate the filter capacitance from the amplifier output,
and the 62 Ω resistors in parallel with the downstream impedance
yield a net load impedance of 101 Ω when added to the 10 Ω
series resistance.

The 5 Ω resistors in series with the ADC inputs isolate internal
switching transients from the filter and the amplifier. The 511 Ω
resistor in parallel with the ADC serves to reduce the input
impedance of the ADC for more predictable performance.

The third-order Butterworth filter was designed with a source
impedance of 70 Ω, a load impedance of 338 Ω, and a 3 dB
bandwidth of 360 MHz. The calculated values from the
program are shown in Figure 2.

35.0

35.0

Figure 2. Design for Third-Order Differential Butterworth Filter with

Z

22.04n

3.379pF 10.01pF

22.04nH

= 70 Ω, ZL = 338 Ω, FC = 360 MHz

S

338

10146-002

The values chosen for the filter’s passive components were the
closest standard values to those generated by the program.

The internal 1.3 pF capacitance of the ADC was subtracted from
the value of the second shunt capacitor (10.01 pF) to yield a
value of 8.71 pF. In the circuit, this capacitor was realized using
two 18 pF capacitors connected to ground as shown in Figure 1.
This provides the same filtering effect, as well as offering some
ac common-mode rejection.

The measured performance of the system is summarized in Tab le 1 ,
where the 3 dB bandwidth is 290 MHz. The total insertion loss
of the network is approximately 1.1 dB. The bandwidth response is
shown in Figure 3; the SNR and SFDR performance are shown
in Figure 4.

Table 1. Measured Performance of the Circuit

Performance Specs at 1.5 V p-p FS Final Results

Cutoff Frequency (−3 dB) 290 MHz
Pass-Band Flatness (6 MHz to 200 MHz) 1 dB
SNRFS at 140 MHz 64.1 dBFS
SFDR at 140 MHz 70.4 dBc
H2/H3 at 140 MHz 85.0 dBc/70.4 dBc
Overall Gain at 10 MHz 2.3 dB
Input Drive at 10 MHz 5.4 dBm

0

–2

–4

–6

–8

–10

–12

AMPLITUDE (dBFS)

–14

–16

–18

–20

1M 10M 100M 1G

ANALOG INPUT F REQUENCY (Hz)

Figure 3. Pass-Band Flatness Performance vs. Frequency

3dB AT 290MHz

10146-003

Rev. A | Page 2 of 6