ANALOG DEVICES CN-0224 Service Manual

Circuit Note

CN-0224

Dual Port Xpressview 225 MHz HDMI
Receiver

225 MHz, High Performance HDMI
Transmitter with ARC

Rev.0

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whatsoever connected to the use of any Circuits from the Lab circuits. (Continued on last page)

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73

VS/ALSB/FIELD

72

HS

71

69

68

67

DE

P0

P1

P2

42

LLC

3.3V

10kΩ

84

83

SDA

SCL

27

P35

ADV7612"

73

VS/ALSB/FIELD

72

HS

71

69

68

67

DE

P0

P1

P2

42

LLC

84

83

SDA

SCL

27

P35

ADV7612'

47kΩ

3.3V

COMMON VI DEO BUS

SDA

SCL

87

87

CS

0

GND

0

GND

CSCS

HDMI PORT A

HDMI PORT B

HDMI PORT C

HDMI PORT D

RXA_C–/C+

RXA_0–/0+

RXA_1–/1+

RXA_2–/2+

RXA_5V/HPA_A

DDCA_SDA/SC L

RXB_C–/C+

RXB_0–/0+

RXB_1–/1+

RXB_2–/2+

RXB_5V/HPA_B

DDCB_SDA/SC L

RXA_C–/C+

RXA_0–/0+

RXA_1–/1+

RXA_2–/2+

RXA_5V/HPA_A

DDCA_SDA/SC L

RXB_C–/C+

RXB_0–/0+

RXB_1–/1+

RXB_2–/2+

RXB_5V/HPA_B

DDCB_SDA/SC L

47kΩ

10009-001

Circuits from the Lab™ reference circuits are engineered and
tested for quick and easy system integration to help solve today’s
analog, mixed-signal, and RF design challenges. For more
information and/or support, visit www.analog.com/CN0224.

Quad HDMI Input, Fast Switching Multiplexer

Using the ADV7612 Receiver with Extended Temperature Range

EVALUATION AND DESIGN SUPPORT

Design and Integration Files
Schematics, Layout Files, Bill of Materials

Devices Connected/Referenced

ADV7612

ADV7511

CIRCUIT FUNCTION AND BENEFITS

The ADV7612 is a dual port Xpressview™ 225 MHz HDMI®
receiver that allows fast switching between two inputs. The
circuit shown in Figure 1 shows the use of two ADV7612’s
as a quad-input fast switching HDMI receiver.

Figure 1. Dual ADV7612 Circuit (Simplified Schematic: Decoupling, Terminations, Resets, and All Connections Not Shown)

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CN-0224 Circuit Note

51Ω 51Ω 51Ω 51Ω

P0 … P35 P0 … P35

LLC

LLC

LLC

ADV7612

ADV7612

ADV7511

150Ω

3.3V

150Ω

10009-002

This circuit shows the expandability of the ADV7612 in
applications requiring four multiplexed HDMI inputs of up to
225 MHz TMDS (1080p60, 12 bits per channel; 148.5 MHz LLC
pixel clock) or UXGA (1600 × 1200, 10 bits per channel;
162 MHz LLC pixel clock). The circuit offers a cost effective
solution to this application and operates over the extended
industrial temperature range of −40°C to +85°C.

CIRCUIT DESCRIPTION

The ADV7612 provides a receving solution for two HDMI
inputs. Figure 1 shows how to connect two ADV7612’s in
parallel on a common shared video and audio bus, thereby
providing multiplexing of four HDMI inputs. How to set up the

2

I

C communications without bus conflicts and how to switch
between the sources will be shown. A software package is
available showing how to handle communication and
authentication in an HDMI repeater application
(see http://ez.analog.com/community/video).

In order for multiple ADV7612 devices to share the same bus,
we need to consider the output state of the devices, capabilities
of tri-stating buses, and the electrical parameters of the load on
the bus. Additionally, the devices must be controlled from an

2

I

C bus in a non-conflicting manner. The board layout of this
circuit is critical and should follow a straight line using
controlled impedances to reduce risk of reflections and cross­coupling. Complete PCB layouts are contained in the design
support package downloadable at www.analog.com/CN0224-

DesignSupport. An ADV7511 HDMI transmitter was used as a

backend device.

Bus Output States

After resetting, the ADV7612 tri-states pins P0-P35, HS,
VS/FIELD/ALSB, DE, LLC, AP0…AP5, SCLK/INT2, and
MCLK/INT2. These pins can be set to the active state using
registers TRI_PIX, TRI_SYNCS, TRI_LLC, TRI_AUDIO as
described in the UG-216 Hardware User Guide, available at

http://ez.analog.com/docs/DOC-1751.

Video and Audio Bus Loading

Only one
second

resistance (P0…P35) of 10 Ω to 20 Ω (highest drive strength)
and a trace characteristic impedance of 75 Ω, a series resistor of
55 Ω to 65 Ω is required to match the characteristic impedance
of the trace. The maximum capacitance of a tri-stated output
bus driver on the ADV7612 is 20 pF (refer to Electrical
Specifications in the ADV7612 data sheet).

Layout and Termination Considerations

For this design, it is important to make sure the transmission
line is properly terminated and has controlled impedance.
Otherwise, reflections (which may occur on longer lines) can
have a negative impact on transmitted data.

ADV7612 can access the AV bu s es at a time; the

must remain tri-stated. Assumming an output driver

For pixel lines (P0…P35), video synchronization
(VS/FIELD/ALSB, HS, DE), and audio lines (AP0,
AP1/I2S_TDM, AP2...AP5, MCLK/INT2, SCLK/INT2)—other
than LLC—it is suggested to use series termination resistors of
51 Ω at the ADV7612 driver side, and tracks having a
characteristic impedance of 75 Ω.

The line locked clock (LLC) line has the same characteristic
impedance of 75 Ω and should have no series resistor, but
should be terminated at the far end with a symmetrical
termination (150
in Figure 2.

Even though theory suggests a best termination value between
50 Ω and 60 Ω, it was observed during tests that a symmetrical
75 Ω (2 ×150 Ω) termination increases the swing and centers
the signal around mid-supply (1.65 V), which is desireable.The

ADV7511 HDMI transmitter is included on the board and is

used to transmit the multiplexed output of the two ADV7612’s.

Figure 3 to Figure 6 show waveforms for various terminations.
In each case, a symmetrical LLC termination was placed at the
far end (close to the ADV7511), and series termination resistors
as close as possible to the two ADV7612 devices, as shown in
Figure 2.

Measurments were taken on the ADV7511 pins with Tektronix
P6243 FET probes (1 MΩ resistance, 1 GHz bandwidth, less
than 1 pF capacitance) and a Tektronix TDS5104B scope.

From the waveforms we can see that using 2 × 150 Ω
terminations on the LLC line ensures a maximum swing of 3.3 V.

Using 75 Ω on the data lines slows the edges too much. 33 Ω
and 15 Ω on data lines caused undershoots on falling edges
(Figure 5 and Figure 6) and overshoots on rising edges (not
illustrated). Therefore, 2 × 150 Ω was chosen for LLC, and 51 Ω
was used on data lines, which is illustrated in the eye diagrams
shown in Figure 9 and Figure 10.

Rev. 0 | Page 2 of 6

Ω to +3.3 V and to 150 Ω to GND), as shown

Figure 2. Terminations for P0…P35 Data Lines and LLC Traces